[PATCH v3 0/6] drm/xe: Add user commands to WA BB via configfs

[PATCH v3 0/6] drm/xe: Add user commands to WA BB via configfs

[Lucas De Marchi]

Integrate WA BB (aka post context restore bb) with configfs to allow
validation to experiment with the GPU, executing commands on every
context switch.

Setting some registers to experiment:

	# echo 0 > /sys/bus/pci/drivers_autoprobe
	# modprobe xe
	# mkdir  /sys/kernel/config/xe/0000:04:00.0
	# echo '
	rcs cmd 11000001 4F104 DEADDEAD
	rcs reg 4F100 DEADBEEF
	' > /sys/kernel/config/xe/0000\:03\:00.0/ctx_restore_post_bb
	# echo 0000:04:00.0 > /sys/bus/pci/drivers/xe/bind

Testing it worked with intel_reg:

	# intel_reg read mmio:4F100
	(0x0004f100): 0xdeadbeef
	# intel_reg read mmio:4F104
	(0x0004f104): 0xdeaddead

This also prepares the codebase to use the same functions for mid
context restore.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
Changes in v3:
- Minor updates on first patches
- Fix kunit build (without CONFIG_CONFIGFS_FS)
- Fix use of binary attributes failing the expectation of a failed write
  producing an error code
- Link to v2: https://lore.kernel.org/r/20250827-wa-bb-cmds-v2-0-3cdf4d63c72a@intel.com

Changes in v2:
- Drop other refactors and fixes already merged
- Add documentation and make sure it works with intel_reg
- Refactor command parsing to be able to easily extend it for other BBs
  to be added in future.
- Link to v1: https://lore.kernel.org/r/20250523-wa-bb-cmds-v1-0-40b337f71bcd@intel.com
---
Lucas De Marchi (6):
      drm/xe: Update workaround documentation
      drm/xe/configfs: Fix documentation warning
      drm/xe/configfs: Extract function to parse engine
      drm/xe/configfs: Allow to select by class only
      drm/xe/lrc: Allow to add user commands on context switch
      drm/xe/configfs: Add post context restore bb

 drivers/gpu/drm/xe/xe_configfs.c | 367 ++++++++++++++++++++++++++++++++++++---
 drivers/gpu/drm/xe/xe_configfs.h |   6 +
 drivers/gpu/drm/xe/xe_lrc.c      |  25 +++
 drivers/gpu/drm/xe/xe_wa.c       |  45 +++--
 4 files changed, 405 insertions(+), 38 deletions(-)

base-commit: 6a483fa08dd4b4f355b65acc8aa24a335baccd2b
change-id: 20250523-wa-bb-cmds-2a81a7121fc2

Lucas De Marchi

[PATCH v3 1/6] drm/xe: Update workaround documentation

[Lucas De Marchi]

Bring it up to reality, better documenting the existing batch buffers,
OOB rules and fixing some typos.

Bspec: 60122
Reviewed-by: Stuart Summers <stuart.summers@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
v2: s/XE_WA/XE_GT_WA/ where appropriate
---
 drivers/gpu/drm/xe/xe_wa.c | 45 ++++++++++++++++++++++++++++++++-------------
 1 file changed, 32 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
index c1fec526bed08..ca1de2560f2bb 100644
--- a/drivers/gpu/drm/xe/xe_wa.c
+++ b/drivers/gpu/drm/xe/xe_wa.c
@@ -39,7 +39,8 @@
  *   Register Immediate commands) once when initializing the device and saved in
  *   the default context. That default context is then used on every context
  *   creation to have a "primed golden context", i.e. a context image that
- *   already contains the changes needed to all the registers.
+ *   already contains the changes needed to all the registers. See
+ *   drivers/gpu/drm/xe/xe_lrc.c for default context handling.
  *
  * - Engine workarounds: the list of these WAs is applied whenever the specific
  *   engine is reset. It's also possible that a set of engine classes share a
@@ -48,10 +49,10 @@
  *   them need to keeep the workaround programming: the approach taken in the
  *   driver is to tie those workarounds to the first compute/render engine that
  *   is registered.  When executing with GuC submission, engine resets are
- *   outside of kernel driver control, hence the list of registers involved in
+ *   outside of kernel driver control, hence the list of registers involved is
  *   written once, on engine initialization, and then passed to GuC, that
  *   saves/restores their values before/after the reset takes place. See
- *   ``drivers/gpu/drm/xe/xe_guc_ads.c`` for reference.
+ *   drivers/gpu/drm/xe/xe_guc_ads.c for reference.
  *
  * - GT workarounds: the list of these WAs is applied whenever these registers
  *   revert to their default values: on GPU reset, suspend/resume [1]_, etc.
@@ -66,21 +67,39 @@
  *   hardware on every HW context restore. These buffers are created and
  *   programmed in the default context so the hardware always go through those
  *   programming sequences when switching contexts. The support for workaround
- *   batchbuffers is enabled these hardware mechanisms:
+ *   batchbuffers is enabled via these hardware mechanisms:
  *
- *   #. INDIRECT_CTX: A batchbuffer and an offset are provided in the default
- *      context, pointing the hardware to jump to that location when that offset
- *      is reached in the context restore. Workaround batchbuffer in the driver
- *      currently uses this mechanism for all platforms.
+ *   #. INDIRECT_CTX (also known as **mid context restore bb**): A batchbuffer
+ *      and an offset are provided in the default context, pointing the hardware
+ *      to jump to that location when that offset is reached in the context
+ *      restore.  When a context is being restored, this is executed after the
+ *      ring context, in the middle (or beginning) of the engine context image.
  *
- *   #. BB_PER_CTX_PTR: A batchbuffer is provided in the default context,
- *      pointing the hardware to a buffer to continue executing after the
- *      engine registers are restored in a context restore sequence. This is
- *      currently not used in the driver.
+ *   #. BB_PER_CTX_PTR (also known as **post context restore bb**): A
+ *      batchbuffer is provided in the default context, pointing the hardware to
+ *      a buffer to continue executing after the engine registers are restored
+ *      in a context restore sequence.
+ *
+ *   Below is the timeline for a context restore sequence:
+ *
+ *   .. code::
+ *
+ *                        INDIRECT_CTX_OFFSET
+ *                   |----------->|
+ *      .------------.------------.-------------.------------.--------------.-----------.
+ *      |Ring        | Engine     | Mid-context | Engine     | Post-context | Ring      |
+ *      |Restore     | Restore (1)| BB Restore  | Restore (2)| BB Restore   | Execution |
+ *      `------------'------------'-------------'------------'--------------'-----------'
  *
  * - Other/OOB:  There are WAs that, due to their nature, cannot be applied from
  *   a central place. Those are peppered around the rest of the code, as needed.
- *   Workarounds related to the display IP are the main example.
+ *   There's a central place to control which workarounds are enabled:
+ *   drivers/gpu/drm/xe/xe_wa_oob.rules for GT workarounds and
+ *   drivers/gpu/drm/xe/xe_device_wa_oob.rules for device/SoC workarounds.
+ *   These files only record which workarounds are enabled: during early device
+ *   initialization those rules are evaluated and recorded by the driver. Then
+ *   later the driver checks with ``XE_GT_WA()`` and ``XE_DEVICE_WA()`` to
+ *   implement them.
  *
  * .. [1] Technically, some registers are powercontext saved & restored, so they
  *    survive a suspend/resume. In practice, writing them again is not too

-- 
2.50.1

[PATCH v3 2/6] drm/xe/configfs: Fix documentation warning

[Lucas De Marchi]

Fix this warning while building the documentation:

	Documentation/gpu/xe/xe_configfs:9: drivers/gpu/drm/xe/xe_configfs.c:138:
	WARNING: Definition list ends without a blank line; unexpected unindent.

That also makes it better formatted in the output.

While at it, also fix the underline length in "Overview".

Fixes: e2b33fce5eb0 ("drm/xe/configfs: Improve documentation steps")
Reviewed-by: Raag Jadav <raag.jadav@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/xe/xe_configfs.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index 0337811864cd9..acdabb3a6b50d 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -21,7 +21,7 @@
  * DOC: Xe Configfs
  *
  * Overview
- * =========
+ * ========
  *
  * Configfs is a filesystem-based manager of kernel objects. XE KMD registers a
  * configfs subsystem called ``xe`` that creates a directory in the mounted
@@ -34,7 +34,7 @@
  *
  * To create a device, the ``xe`` module should already be loaded, but some
  * attributes can only be set before binding the device. It can be accomplished
- * by blocking the driver autoprobe:
+ * by blocking the driver autoprobe::
  *
  *	# echo 0 > /sys/bus/pci/drivers_autoprobe
  *	# modprobe xe

-- 
2.50.1

[PATCH v3 3/6] drm/xe/configfs: Extract function to parse engine

[Lucas De Marchi]

Move the part that copies the engine to a local buffer so it can be
shared in future for other configfs attributes parsing an engine.

Reviewed-by: Raag Jadav <raag.jadav@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/xe/xe_configfs.c | 32 +++++++++++++++++++++-----------
 1 file changed, 21 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index acdabb3a6b50d..d487c0e0b7ab9 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -283,24 +283,34 @@ static bool lookup_engine_mask(const char *pattern, u64 *mask)
 	return false;
 }
 
+static int parse_engine(const char *s, const char *end_chars, u64 *mask)
+{
+	char buf[MAX_ENGINE_CLASS_CHARS + MAX_ENGINE_INSTANCE_CHARS + 1];
+	size_t len;
+
+	len = strcspn(s, end_chars);
+	if (len >= sizeof(buf))
+		return -EINVAL;
+
+	memcpy(buf, s, len);
+	buf[len] = '\0';
+
+	if (!lookup_engine_mask(buf, mask))
+		return -ENOENT;
+
+	return len;
+}
+
 static ssize_t engines_allowed_store(struct config_item *item, const char *page,
 				     size_t len)
 {
 	struct xe_config_group_device *dev = to_xe_config_group_device(item);
-	size_t patternlen, p;
+	ssize_t patternlen, p;
 	u64 mask, val = 0;
 
 	for (p = 0; p < len; p += patternlen + 1) {
-		char buf[MAX_ENGINE_CLASS_CHARS + MAX_ENGINE_INSTANCE_CHARS + 1];
-
-		patternlen = strcspn(page + p, ",\n");
-		if (patternlen >= sizeof(buf))
-			return -EINVAL;
-
-		memcpy(buf, page + p, patternlen);
-		buf[patternlen] = '\0';
-
-		if (!lookup_engine_mask(buf, &mask))
+		patternlen = parse_engine(page + p, ",\n", &mask);
+		if (patternlen < 0)
 			return -EINVAL;
 
 		val |= mask;

-- 
2.50.1

[PATCH v3 4/6] drm/xe/configfs: Allow to select by class only

[Lucas De Marchi]

For a future configfs attribute, it's desirable to select by engine mask
only as the instance doesn't make sense.

Rename the function lookup_engine_mask() to lookup_engine_info() and
make it return the entry. This allows parse_engine() to still return an
item if the caller wants to allow parsing a class-only string like
"rcs", "bcs", "ccs", etc.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
v2:
- Rename function to lookup_engine_info() and return the entry
  directly instead of the index (Raag Jadav)
- Add named initializer for new entry for consistency (Raag Jadav)
---
 drivers/gpu/drm/xe/xe_configfs.c | 50 ++++++++++++++++++++++++++++------------
 1 file changed, 35 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index d487c0e0b7ab9..f42178a30383c 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -152,6 +152,7 @@ static void set_device_defaults(struct xe_config_device *config)
 struct engine_info {
 	const char *cls;
 	u64 mask;
+	enum xe_engine_class engine_class;
 };
 
 /* Some helpful macros to aid on the sizing of buffer allocation when parsing */
@@ -159,12 +160,12 @@ struct engine_info {
 #define MAX_ENGINE_INSTANCE_CHARS 2
 
 static const struct engine_info engine_info[] = {
-	{ .cls = "rcs", .mask = XE_HW_ENGINE_RCS_MASK },
-	{ .cls = "bcs", .mask = XE_HW_ENGINE_BCS_MASK },
-	{ .cls = "vcs", .mask = XE_HW_ENGINE_VCS_MASK },
-	{ .cls = "vecs", .mask = XE_HW_ENGINE_VECS_MASK },
-	{ .cls = "ccs", .mask = XE_HW_ENGINE_CCS_MASK },
-	{ .cls = "gsccs", .mask = XE_HW_ENGINE_GSCCS_MASK },
+	{ .cls = "rcs", .mask = XE_HW_ENGINE_RCS_MASK, .engine_class = XE_ENGINE_CLASS_RENDER },
+	{ .cls = "bcs", .mask = XE_HW_ENGINE_BCS_MASK, .engine_class = XE_ENGINE_CLASS_COPY },
+	{ .cls = "vcs", .mask = XE_HW_ENGINE_VCS_MASK, .engine_class = XE_ENGINE_CLASS_VIDEO_DECODE },
+	{ .cls = "vecs", .mask = XE_HW_ENGINE_VECS_MASK, .engine_class = XE_ENGINE_CLASS_VIDEO_ENHANCE },
+	{ .cls = "ccs", .mask = XE_HW_ENGINE_CCS_MASK, .engine_class = XE_ENGINE_CLASS_COMPUTE },
+	{ .cls = "gsccs", .mask = XE_HW_ENGINE_GSCCS_MASK, .engine_class = XE_ENGINE_CLASS_OTHER },
 };
 
 static struct xe_config_group_device *to_xe_config_group_device(struct config_item *item)
@@ -253,7 +254,18 @@ static ssize_t engines_allowed_show(struct config_item *item, char *page)
 	return p - page;
 }
 
-static bool lookup_engine_mask(const char *pattern, u64 *mask)
+/*
+ * Lookup engine_info. If @mask is not NULL, reduce the mask according to the
+ * instance in @pattern.
+ *
+ * Examples of inputs:
+ * - lookup_engine_info("rcs0", &mask): return "rcs" entry from @engine_info and
+ *   mask == BIT_ULL(XE_HW_ENGINE_RCS0)
+ * - lookup_engine_info("rcs*", &mask): return "rcs" entry from @engine_info and
+ *   mask == XE_HW_ENGINE_RCS_MASK
+ * - lookup_engine_info("rcs", NULL): return "rcs" entry from @engine_info
+ */
+static const struct engine_info *lookup_engine_info(const char *pattern, u64 *mask)
 {
 	for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
 		u8 instance;
@@ -263,29 +275,33 @@ static bool lookup_engine_mask(const char *pattern, u64 *mask)
 			continue;
 
 		pattern += strlen(engine_info[i].cls);
+		if (!mask && !*pattern)
+			return &engine_info[i];
 
 		if (!strcmp(pattern, "*")) {
 			*mask = engine_info[i].mask;
-			return true;
+			return &engine_info[i];
 		}
 
 		if (kstrtou8(pattern, 10, &instance))
-			return false;
+			return NULL;
 
 		bit = __ffs64(engine_info[i].mask) + instance;
 		if (bit >= fls64(engine_info[i].mask))
-			return false;
+			return NULL;
 
 		*mask = BIT_ULL(bit);
-		return true;
+		return &engine_info[i];
 	}
 
-	return false;
+	return NULL;
 }
 
-static int parse_engine(const char *s, const char *end_chars, u64 *mask)
+static int parse_engine(const char *s, const char *end_chars, u64 *mask,
+			const struct engine_info **pinfo)
 {
 	char buf[MAX_ENGINE_CLASS_CHARS + MAX_ENGINE_INSTANCE_CHARS + 1];
+	const struct engine_info *info;
 	size_t len;
 
 	len = strcspn(s, end_chars);
@@ -295,9 +311,13 @@ static int parse_engine(const char *s, const char *end_chars, u64 *mask)
 	memcpy(buf, s, len);
 	buf[len] = '\0';
 
-	if (!lookup_engine_mask(buf, mask))
+	info = lookup_engine_info(buf, mask);
+	if (!info)
 		return -ENOENT;
 
+	if (pinfo)
+		*pinfo = info;
+
 	return len;
 }
 
@@ -309,7 +329,7 @@ static ssize_t engines_allowed_store(struct config_item *item, const char *page,
 	u64 mask, val = 0;
 
 	for (p = 0; p < len; p += patternlen + 1) {
-		patternlen = parse_engine(page + p, ",\n", &mask);
+		patternlen = parse_engine(page + p, ",\n", &mask, NULL);
 		if (patternlen < 0)
 			return -EINVAL;
 

-- 
2.50.1

[PATCH v3 5/6] drm/xe/lrc: Allow to add user commands on context switch

[Lucas De Marchi]

During validation it's useful to allows additional commands to be
executed on context switch. Fetch the commands from configfs (to be
added) and add them to the WA BB.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
v2: Fix warning when building without configfs
---
 drivers/gpu/drm/xe/xe_configfs.c | 13 +++++++++++++
 drivers/gpu/drm/xe/xe_configfs.h |  6 ++++++
 drivers/gpu/drm/xe/xe_lrc.c      | 25 +++++++++++++++++++++++++
 3 files changed, 44 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index f42178a30383c..21fd153666db8 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -633,6 +633,19 @@ bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev)
 	return ret;
 }
 
+/**
+ * xe_configfs_get_ctx_restore_post_bb - get configfs ctx_restore_post_bb setting
+ * @pdev: pci device
+ *
+ * Return: post_ctx_restore setting in configfs
+ */
+u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
+					enum xe_engine_class class,
+					const u32 **cs)
+{
+	return 0;
+}
+
 int __init xe_configfs_init(void)
 {
 	int ret;
diff --git a/drivers/gpu/drm/xe/xe_configfs.h b/drivers/gpu/drm/xe/xe_configfs.h
index 1402e863b71c0..eff2645b5f593 100644
--- a/drivers/gpu/drm/xe/xe_configfs.h
+++ b/drivers/gpu/drm/xe/xe_configfs.h
@@ -8,6 +8,8 @@
 #include <linux/limits.h>
 #include <linux/types.h>
 
+#include <xe_hw_engine_types.h>
+
 struct pci_dev;
 
 #if IS_ENABLED(CONFIG_CONFIGFS_FS)
@@ -17,6 +19,8 @@ void xe_configfs_check_device(struct pci_dev *pdev);
 bool xe_configfs_get_survivability_mode(struct pci_dev *pdev);
 u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
 bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev);
+u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
+					const u32 **cs);
 #else
 static inline int xe_configfs_init(void) { return 0; }
 static inline void xe_configfs_exit(void) { }
@@ -24,6 +28,8 @@ static inline void xe_configfs_check_device(struct pci_dev *pdev) { }
 static inline bool xe_configfs_get_survivability_mode(struct pci_dev *pdev) { return false; }
 static inline u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev) { return U64_MAX; }
 static inline bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev) { return false; }
+static inline u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
+						      const u32 **cs) { return 0; }
 #endif
 
 #endif
diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index 8f6c3ba478828..13e920a53e3a8 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -16,6 +16,7 @@
 #include "regs/xe_lrc_layout.h"
 #include "xe_bb.h"
 #include "xe_bo.h"
+#include "xe_configfs.h"
 #include "xe_device.h"
 #include "xe_drm_client.h"
 #include "xe_exec_queue_types.h"
@@ -1102,6 +1103,29 @@ static ssize_t setup_timestamp_wa(struct xe_lrc *lrc, struct xe_hw_engine *hwe,
 	return cmd - batch;
 }
 
+static ssize_t setup_configfs_post_ctx_restore_bb(struct xe_lrc *lrc,
+						  struct xe_hw_engine *hwe,
+						  u32 *batch, size_t max_len)
+{
+	struct xe_device *xe = gt_to_xe(lrc->gt);
+	const u32 *user_batch;
+	u32 *cmd = batch;
+	u32 count;
+
+	count = xe_configfs_get_ctx_restore_post_bb(to_pci_dev(xe->drm.dev),
+						    hwe->class, &user_batch);
+	if (!count)
+		return 0;
+
+	if (count > max_len)
+		return -ENOSPC;
+
+	memcpy(cmd, user_batch, count * sizeof(u32));
+	cmd += count;
+
+	return cmd - batch;
+}
+
 static ssize_t setup_invalidate_state_cache_wa(struct xe_lrc *lrc,
 					       struct xe_hw_engine *hwe,
 					       u32 *batch, size_t max_len)
@@ -1203,6 +1227,7 @@ int xe_lrc_setup_wa_bb_with_scratch(struct xe_lrc *lrc, struct xe_hw_engine *hwe
 		{ .setup = setup_timestamp_wa },
 		{ .setup = setup_invalidate_state_cache_wa },
 		{ .setup = setup_utilization_wa },
+		{ .setup = setup_configfs_post_ctx_restore_bb },
 	};
 	struct bo_setup_state state = {
 		.lrc = lrc,

-- 
2.50.1

[PATCH v3 6/6] drm/xe/configfs: Add post context restore bb

[Lucas De Marchi]

Allow the user to specify commands to execute during a context restore.
Currently it's possible to parse 2 types of actions:

	- cmd: the instructions are added as is to the bb
	- reg: just use the address and value, without worrying about
	  encoding the right LRI instruction. This is possibly the most
	  useful use case, so added a dedicated action for that.

This also prepares for future BBs: mid context restore and rc6 context
restore that can re-use the same parsing functions.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
v2:
- use bin attribute to be allow multiline
v3:
- revert attribute back to a simple attribute rather than binary:
  otherwise configfs only calls the callback on the file release and
  ignores the result. With that the user can't rely on the return
  code to know if the setting was accepted.

  To still allow multiline, a method that uses just one syscall should
  be used. In bash, echo will end up using more syscalls. This can be
  workarounded by using heredoc, or simply writing it in C
  (rewrote that listening to
   https://www.youtube.com/watch?v=1S1fISh-pag, you're welcome to review
   listening to that beauty too)
---
 drivers/gpu/drm/xe/xe_configfs.c | 278 ++++++++++++++++++++++++++++++++++++++-
 1 file changed, 276 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index 21fd153666db8..f5fa0d14af38b 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -4,6 +4,7 @@
  */
 
 #include <linux/bitops.h>
+#include <linux/ctype.h>
 #include <linux/configfs.h>
 #include <linux/cleanup.h>
 #include <linux/find.h>
@@ -12,6 +13,7 @@
 #include <linux/pci.h>
 #include <linux/string.h>
 
+#include "instructions/xe_mi_commands.h"
 #include "xe_configfs.h"
 #include "xe_hw_engine_types.h"
 #include "xe_module.h"
@@ -115,6 +117,35 @@
  *
  * This attribute can only be set before binding to the device.
  *
+ * Context restore BB
+ * ------------------
+ *
+ * Allow to execute a batch buffer during any context switches. When the
+ * GPU is restoring the context, it executes additional commands. It's useful
+ * for testing additional workarounds and validating certain HW behaviors.
+ *
+ * Currently this is implemented only for post context restore. Examples:
+ *
+ * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10::
+ *
+ *	# echo 'rcs cmd 11000001 4F100 DEADBEEF' \
+ *		> /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb
+ *
+ * #. Load certain values in a couple of registers (it can be used as a simpler
+ *    alternative to the `cmd`) action::
+ *
+ *	# cat > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb <<EOF
+ *	rcs reg 4F100 DEADBEEF
+ *	rcs reg 4F104 FFFFFFFF
+ *	EOF
+ *
+ *    .. note::
+ *
+ *       When using multiple lines, make sure to use a command that is
+ *       implemented with a single write syscall, like HEREDOC.
+ *
+ * This attribute can only be set before binding to the device.
+ *
  * Remove devices
  * ==============
  *
@@ -123,11 +154,18 @@
  *	# rmdir /sys/kernel/config/xe/0000:03:00.0/
  */
 
+/* Similar to struct xe_bb, but not tied to HW (yet) */
+struct wa_bb {
+	u32 *cs;
+	u32 len; /* in dwords */
+};
+
 struct xe_config_group_device {
 	struct config_group group;
 
 	struct xe_config_device {
 		u64 engines_allowed;
+		struct wa_bb ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
 		bool survivability_mode;
 		bool enable_psmi;
 	} config;
@@ -371,6 +409,227 @@ static ssize_t enable_psmi_store(struct config_item *item, const char *page, siz
 	return len;
 }
 
+static bool wa_bb_read_advance(bool dereference, char **p,
+			       const char *append, size_t len,
+			       size_t *max_size)
+{
+	if (dereference) {
+		if (len >= *max_size)
+			return false;
+		*max_size -= len;
+		if (append)
+			memcpy(*p, append, len);
+	}
+
+	*p += len;
+
+	return true;
+}
+
+static ssize_t wa_bb_show(struct xe_config_group_device *dev,
+			  struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX],
+			  char *data, size_t sz)
+{
+	char *p = data;
+
+	guard(mutex)(&dev->lock);
+
+	for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
+		enum xe_engine_class ec = engine_info[i].engine_class;
+		size_t len;
+
+		if (!wa_bb[ec].len)
+			continue;
+
+		len = snprintf(p, sz, "%s:", engine_info[i].cls);
+		if (!wa_bb_read_advance(data, &p, NULL, len, &sz))
+			return -ENOBUFS;
+
+		for (size_t j = 0; j < wa_bb[ec].len; j++) {
+			len = snprintf(p, sz, " %08x", wa_bb[ec].cs[j]);
+			if (!wa_bb_read_advance(data, &p, NULL, len, &sz))
+				return -ENOBUFS;
+		}
+
+		if (!wa_bb_read_advance(data, &p, "\n", 1, &sz))
+			return -ENOBUFS;
+	}
+
+	if (!wa_bb_read_advance(data, &p, "", 1, &sz))
+		return -ENOBUFS;
+
+	/* Reserve one more to match check for '\0' */
+	if (!data)
+		p++;
+
+	return p - data;
+}
+
+static ssize_t ctx_restore_post_bb_show(struct config_item *item, char *page)
+{
+	struct xe_config_group_device *dev = to_xe_config_group_device(item);
+
+	return wa_bb_show(dev, dev->config.ctx_restore_post_bb, page, SZ_4K);
+}
+
+static void wa_bb_append(struct wa_bb *wa_bb, u32 val)
+{
+	if (wa_bb->cs)
+		wa_bb->cs[wa_bb->len] = val;
+
+	wa_bb->len++;
+}
+
+static ssize_t parse_hex(const char *line, u32 *pval)
+{
+	char numstr[12];
+	const char *p;
+	ssize_t numlen;
+
+	p = line + strspn(line, " \t");
+	if (!*p || *p == '\n')
+		return 0;
+
+	numlen = strcspn(p, " \t\n");
+	if (!numlen || numlen >= sizeof(numstr) - 1)
+		return -EINVAL;
+
+	memcpy(numstr, p, numlen);
+	numstr[numlen] = '\0';
+	p += numlen;
+
+	if (kstrtou32(numstr, 16, pval))
+		return -EINVAL;
+
+	return p - line;
+}
+
+/*
+ * Parse lines with the format
+ *
+ *	<engine-class> cmd <u32> <u32...>
+ *	<engine-class> reg <u32_addr> <u32_val>
+ *
+ * and optionally save them in @wa_bb[i].cs is non-NULL.
+ *
+ * Return the number of dwords parsed.
+ */
+static ssize_t parse_wa_bb_lines(const char *lines,
+				 struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX])
+{
+	ssize_t dwords = 0, ret;
+	const char *p;
+
+	for (p = lines; *p; p++) {
+		const struct engine_info *info = NULL;
+		u32 val, val2;
+
+		/* Also allow empty lines */
+		p += strspn(p, " \t\n");
+		if (!*p)
+			break;
+
+		ret = parse_engine(p, " \t\n", NULL, &info);
+		if (ret < 0)
+			return ret;
+
+		p += ret;
+		p += strspn(p, " \t");
+
+		if (str_has_prefix(p, "cmd")) {
+			for (p += strlen("cmd"); *p;) {
+				ret = parse_hex(p, &val);
+				if (ret < 0)
+					return -EINVAL;
+				if (!ret)
+					break;
+
+				p += ret;
+				dwords++;
+				wa_bb_append(&wa_bb[info->engine_class], val);
+			}
+		} else if (str_has_prefix(p, "reg")) {
+			p += strlen("reg");
+			ret = parse_hex(p, &val);
+			if (ret <= 0)
+				return -EINVAL;
+
+			p += ret;
+			ret = parse_hex(p, &val2);
+			if (ret <= 0)
+				return -EINVAL;
+
+			p += ret;
+			dwords += 3;
+			wa_bb_append(&wa_bb[info->engine_class],
+				     MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1));
+			wa_bb_append(&wa_bb[info->engine_class], val);
+			wa_bb_append(&wa_bb[info->engine_class], val2);
+		} else {
+			return -EINVAL;
+		}
+	}
+
+	return dwords;
+}
+
+static ssize_t wa_bb_store(struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX],
+			   struct xe_config_group_device *dev,
+			   const char *page, size_t len)
+{
+	/* tmp_wa_bb must match wa_bb's size */
+	struct wa_bb tmp_wa_bb[XE_ENGINE_CLASS_MAX] = { };
+	ssize_t count, class;
+	u32 *tmp;
+
+	/* 1. Count dwords - wa_bb[i].cs is NULL for all classes */
+	count = parse_wa_bb_lines(page, tmp_wa_bb);
+	if (count < 0)
+		return count;
+
+	guard(mutex)(&dev->lock);
+
+	if (is_bound(dev))
+		return -EBUSY;
+
+	/*
+	 * 2. Allocate a u32 array and set the pointers to the right positions
+	 * according to the length of each class' wa_bb
+	 */
+	tmp = krealloc(wa_bb[0].cs, count * sizeof(u32), GFP_KERNEL);
+	if (!tmp)
+		return -ENOMEM;
+
+	if (!count) {
+		memset(wa_bb, 0, sizeof(tmp_wa_bb));
+		return len;
+	}
+
+	for (class = 0, count = 0; class < XE_ENGINE_CLASS_MAX; ++class) {
+		tmp_wa_bb[class].cs = tmp + count;
+		count += tmp_wa_bb[class].len;
+		tmp_wa_bb[class].len = 0;
+	}
+
+	/* 3. Parse wa_bb lines again, this time saving the values */
+	count = parse_wa_bb_lines(page, tmp_wa_bb);
+	if (count < 0)
+		return count;
+
+	memcpy(wa_bb, tmp_wa_bb, sizeof(tmp_wa_bb));
+
+	return len;
+}
+
+static ssize_t ctx_restore_post_bb_store(struct config_item *item,
+					 const char *data, size_t sz)
+{
+	struct xe_config_group_device *dev = to_xe_config_group_device(item);
+
+	return wa_bb_store(dev->config.ctx_restore_post_bb, dev, data, sz);
+}
+
+CONFIGFS_ATTR(, ctx_restore_post_bb);
 CONFIGFS_ATTR(, enable_psmi);
 CONFIGFS_ATTR(, engines_allowed);
 CONFIGFS_ATTR(, survivability_mode);
@@ -379,6 +638,7 @@ static struct configfs_attribute *xe_config_device_attrs[] = {
 	&attr_enable_psmi,
 	&attr_engines_allowed,
 	&attr_survivability_mode,
+	&attr_ctx_restore_post_bb,
 	NULL,
 };
 
@@ -387,6 +647,8 @@ static void xe_config_device_release(struct config_item *item)
 	struct xe_config_group_device *dev = to_xe_config_group_device(item);
 
 	mutex_destroy(&dev->lock);
+
+	kfree(dev->config.ctx_restore_post_bb[0].cs);
 	kfree(dev);
 }
 
@@ -636,14 +898,26 @@ bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev)
 /**
  * xe_configfs_get_ctx_restore_post_bb - get configfs ctx_restore_post_bb setting
  * @pdev: pci device
+ * @class: hw engine class
+ * @cs: pointer to the bb to use - only valid during probe
  *
- * Return: post_ctx_restore setting in configfs
+ * Return: Number of dwords used in the post_ctx_restore setting in configfs
  */
 u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
 					enum xe_engine_class class,
 					const u32 **cs)
 {
-	return 0;
+	struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
+	u32 len;
+
+	if (!dev)
+		return 0;
+
+	*cs = dev->config.ctx_restore_post_bb[class].cs;
+	len = dev->config.ctx_restore_post_bb[class].len;
+	config_group_put(&dev->group);
+
+	return len;
 }
 
 int __init xe_configfs_init(void)

-- 
2.50.1

✗ CI.checkpatch: warning for drm/xe: Add user commands to WA BB via configfs

[Patchwork]

== Series Details ==

Series: drm/xe: Add user commands to WA BB via configfs
URL   : https://patchwork.freedesktop.org/series/154119/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
fbd08a78c3a3bb17964db2a326514c69c1dca660
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit f8a73eb9bdc72771773528edf183e617a5dea903
Author: Lucas De Marchi <lucas.demarchi@intel.com>
Date:   Fri Sep 5 22:50:34 2025 -0700

    drm/xe/configfs: Add post context restore bb
    
    Allow the user to specify commands to execute during a context restore.
    Currently it's possible to parse 2 types of actions:
    
            - cmd: the instructions are added as is to the bb
            - reg: just use the address and value, without worrying about
              encoding the right LRI instruction. This is possibly the most
              useful use case, so added a dedicated action for that.
    
    This also prepares for future BBs: mid context restore and rc6 context
    restore that can re-use the same parsing functions.
    
    Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
+ /mt/dim checkpatch 6da3b81612a8f96c0b70981f173381ca05f80ce0 drm-intel
31590e58378a drm/xe: Update workaround documentation
de07bfb11eb1 drm/xe/configfs: Fix documentation warning
1189c84b55de drm/xe/configfs: Extract function to parse engine
3719bb23455d drm/xe/configfs: Allow to select by class only
-:40: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#40: FILE: drivers/gpu/drm/xe/xe_configfs.c:165:
+	{ .cls = "vcs", .mask = XE_HW_ENGINE_VCS_MASK, .engine_class = XE_ENGINE_CLASS_VIDEO_DECODE },

-:41: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#41: FILE: drivers/gpu/drm/xe/xe_configfs.c:166:
+	{ .cls = "vecs", .mask = XE_HW_ENGINE_VECS_MASK, .engine_class = XE_ENGINE_CLASS_VIDEO_ENHANCE },

total: 0 errors, 2 warnings, 0 checks, 105 lines checked
a0d798c7b6b5 drm/xe/lrc: Allow to add user commands on context switch
f8a73eb9bdc7 drm/xe/configfs: Add post context restore bb

✓ CI.KUnit: success for drm/xe: Add user commands to WA BB via configfs

[Patchwork]

== Series Details ==

Series: drm/xe: Add user commands to WA BB via configfs
URL   : https://patchwork.freedesktop.org/series/154119/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[19:46:33] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[19:46:37] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[19:47:06] Starting KUnit Kernel (1/1)...
[19:47:06] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[19:47:07] ================== guc_buf (11 subtests) ===================
[19:47:07] [PASSED] test_smallest
[19:47:07] [PASSED] test_largest
[19:47:07] [PASSED] test_granular
[19:47:07] [PASSED] test_unique
[19:47:07] [PASSED] test_overlap
[19:47:07] [PASSED] test_reusable
[19:47:07] [PASSED] test_too_big
[19:47:07] [PASSED] test_flush
[19:47:07] [PASSED] test_lookup
[19:47:07] [PASSED] test_data
[19:47:07] [PASSED] test_class
[19:47:07] ===================== [PASSED] guc_buf =====================
[19:47:07] =================== guc_dbm (7 subtests) ===================
[19:47:07] [PASSED] test_empty
[19:47:07] [PASSED] test_default
[19:47:07] ======================== test_size  ========================
[19:47:07] [PASSED] 4
[19:47:07] [PASSED] 8
[19:47:07] [PASSED] 32
[19:47:07] [PASSED] 256
[19:47:07] ==================== [PASSED] test_size ====================
[19:47:07] ======================= test_reuse  ========================
[19:47:07] [PASSED] 4
[19:47:07] [PASSED] 8
[19:47:07] [PASSED] 32
[19:47:07] [PASSED] 256
[19:47:07] =================== [PASSED] test_reuse ====================
[19:47:07] =================== test_range_overlap  ====================
[19:47:07] [PASSED] 4
[19:47:07] [PASSED] 8
[19:47:07] [PASSED] 32
[19:47:07] [PASSED] 256
[19:47:07] =============== [PASSED] test_range_overlap ================
[19:47:07] =================== test_range_compact  ====================
[19:47:07] [PASSED] 4
[19:47:07] [PASSED] 8
[19:47:07] [PASSED] 32
[19:47:07] [PASSED] 256
[19:47:07] =============== [PASSED] test_range_compact ================
[19:47:07] ==================== test_range_spare  =====================
[19:47:07] [PASSED] 4
[19:47:07] [PASSED] 8
[19:47:07] [PASSED] 32
[19:47:07] [PASSED] 256
[19:47:07] ================ [PASSED] test_range_spare =================
[19:47:07] ===================== [PASSED] guc_dbm =====================
[19:47:07] =================== guc_idm (6 subtests) ===================
[19:47:07] [PASSED] bad_init
[19:47:07] [PASSED] no_init
[19:47:07] [PASSED] init_fini
[19:47:07] [PASSED] check_used
[19:47:07] [PASSED] check_quota
[19:47:07] [PASSED] check_all
[19:47:07] ===================== [PASSED] guc_idm =====================
[19:47:07] ================== no_relay (3 subtests) ===================
[19:47:07] [PASSED] xe_drops_guc2pf_if_not_ready
[19:47:07] [PASSED] xe_drops_guc2vf_if_not_ready
[19:47:07] [PASSED] xe_rejects_send_if_not_ready
[19:47:07] ==================== [PASSED] no_relay =====================
[19:47:07] ================== pf_relay (14 subtests) ==================
[19:47:07] [PASSED] pf_rejects_guc2pf_too_short
[19:47:07] [PASSED] pf_rejects_guc2pf_too_long
[19:47:07] [PASSED] pf_rejects_guc2pf_no_payload
[19:47:07] [PASSED] pf_fails_no_payload
[19:47:07] [PASSED] pf_fails_bad_origin
[19:47:07] [PASSED] pf_fails_bad_type
[19:47:07] [PASSED] pf_txn_reports_error
[19:47:07] [PASSED] pf_txn_sends_pf2guc
[19:47:07] [PASSED] pf_sends_pf2guc
[19:47:07] [SKIPPED] pf_loopback_nop
[19:47:07] [SKIPPED] pf_loopback_echo
[19:47:07] [SKIPPED] pf_loopback_fail
[19:47:07] [SKIPPED] pf_loopback_busy
[19:47:07] [SKIPPED] pf_loopback_retry
[19:47:07] ==================== [PASSED] pf_relay =====================
[19:47:07] ================== vf_relay (3 subtests) ===================
[19:47:07] [PASSED] vf_rejects_guc2vf_too_short
[19:47:07] [PASSED] vf_rejects_guc2vf_too_long
[19:47:07] [PASSED] vf_rejects_guc2vf_no_payload
[19:47:07] ==================== [PASSED] vf_relay =====================
[19:47:07] ===================== lmtt (1 subtest) =====================
[19:47:07] ======================== test_ops  =========================
[19:47:07] [PASSED] 2-level
[19:47:07] [PASSED] multi-level
[19:47:07] ==================== [PASSED] test_ops =====================
[19:47:07] ====================== [PASSED] lmtt =======================
[19:47:07] ================= pf_service (11 subtests) =================
[19:47:07] [PASSED] pf_negotiate_any
[19:47:07] [PASSED] pf_negotiate_base_match
[19:47:07] [PASSED] pf_negotiate_base_newer
[19:47:07] [PASSED] pf_negotiate_base_next
[19:47:07] [SKIPPED] pf_negotiate_base_older
[19:47:07] [PASSED] pf_negotiate_base_prev
[19:47:07] [PASSED] pf_negotiate_latest_match
[19:47:07] [PASSED] pf_negotiate_latest_newer
[19:47:07] [PASSED] pf_negotiate_latest_next
[19:47:07] [SKIPPED] pf_negotiate_latest_older
[19:47:07] [SKIPPED] pf_negotiate_latest_prev
[19:47:07] =================== [PASSED] pf_service ====================
[19:47:07] =================== xe_mocs (2 subtests) ===================
[19:47:07] ================ xe_live_mocs_kernel_kunit  ================
[19:47:07] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[19:47:07] ================ xe_live_mocs_reset_kunit  =================
[19:47:07] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[19:47:07] ==================== [SKIPPED] xe_mocs =====================
[19:47:07] ================= xe_migrate (2 subtests) ==================
[19:47:07] ================= xe_migrate_sanity_kunit  =================
[19:47:07] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[19:47:07] ================== xe_validate_ccs_kunit  ==================
[19:47:07] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[19:47:07] =================== [SKIPPED] xe_migrate ===================
[19:47:07] ================== xe_dma_buf (1 subtest) ==================
[19:47:07] ==================== xe_dma_buf_kunit  =====================
[19:47:07] ================ [SKIPPED] xe_dma_buf_kunit ================
[19:47:07] =================== [SKIPPED] xe_dma_buf ===================
[19:47:07] ================= xe_bo_shrink (1 subtest) =================
[19:47:07] =================== xe_bo_shrink_kunit  ====================
[19:47:07] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[19:47:07] ================== [SKIPPED] xe_bo_shrink ==================
[19:47:07] ==================== xe_bo (2 subtests) ====================
[19:47:07] ================== xe_ccs_migrate_kunit  ===================
[19:47:07] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[19:47:07] ==================== xe_bo_evict_kunit  ====================
[19:47:07] =============== [SKIPPED] xe_bo_evict_kunit ================
[19:47:07] ===================== [SKIPPED] xe_bo ======================
[19:47:07] ==================== args (11 subtests) ====================
[19:47:07] [PASSED] count_args_test
[19:47:07] [PASSED] call_args_example
[19:47:07] [PASSED] call_args_test
[19:47:07] [PASSED] drop_first_arg_example
[19:47:07] [PASSED] drop_first_arg_test
[19:47:07] [PASSED] first_arg_example
[19:47:07] [PASSED] first_arg_test
[19:47:07] [PASSED] last_arg_example
[19:47:07] [PASSED] last_arg_test
[19:47:07] [PASSED] pick_arg_example
[19:47:07] [PASSED] sep_comma_example
[19:47:07] ====================== [PASSED] args =======================
[19:47:07] =================== xe_pci (3 subtests) ====================
[19:47:07] ==================== check_graphics_ip  ====================
[19:47:07] [PASSED] 12.70 Xe_LPG
[19:47:07] [PASSED] 12.71 Xe_LPG
[19:47:07] [PASSED] 12.74 Xe_LPG+
[19:47:07] [PASSED] 20.01 Xe2_HPG
[19:47:07] [PASSED] 20.02 Xe2_HPG
[19:47:07] [PASSED] 20.04 Xe2_LPG
[19:47:07] [PASSED] 30.00 Xe3_LPG
[19:47:07] [PASSED] 30.01 Xe3_LPG
[19:47:07] [PASSED] 30.03 Xe3_LPG
[19:47:07] ================ [PASSED] check_graphics_ip ================
[19:47:07] ===================== check_media_ip  ======================
[19:47:07] [PASSED] 13.00 Xe_LPM+
[19:47:07] [PASSED] 13.01 Xe2_HPM
[19:47:07] [PASSED] 20.00 Xe2_LPM
[19:47:07] [PASSED] 30.00 Xe3_LPM
[19:47:07] [PASSED] 30.02 Xe3_LPM
[19:47:07] ================= [PASSED] check_media_ip ==================
[19:47:07] ================= check_platform_gt_count  =================
[19:47:07] [PASSED] 0x9A60 (TIGERLAKE)
[19:47:07] [PASSED] 0x9A68 (TIGERLAKE)
[19:47:07] [PASSED] 0x9A70 (TIGERLAKE)
[19:47:07] [PASSED] 0x9A40 (TIGERLAKE)
[19:47:07] [PASSED] 0x9A49 (TIGERLAKE)
[19:47:07] [PASSED] 0x9A59 (TIGERLAKE)
[19:47:07] [PASSED] 0x9A78 (TIGERLAKE)
[19:47:07] [PASSED] 0x9AC0 (TIGERLAKE)
[19:47:07] [PASSED] 0x9AC9 (TIGERLAKE)
[19:47:07] [PASSED] 0x9AD9 (TIGERLAKE)
[19:47:07] [PASSED] 0x9AF8 (TIGERLAKE)
[19:47:07] [PASSED] 0x4C80 (ROCKETLAKE)
[19:47:07] [PASSED] 0x4C8A (ROCKETLAKE)
[19:47:07] [PASSED] 0x4C8B (ROCKETLAKE)
[19:47:07] [PASSED] 0x4C8C (ROCKETLAKE)
[19:47:07] [PASSED] 0x4C90 (ROCKETLAKE)
[19:47:07] [PASSED] 0x4C9A (ROCKETLAKE)
[19:47:07] [PASSED] 0x4680 (ALDERLAKE_S)
[19:47:07] [PASSED] 0x4682 (ALDERLAKE_S)
[19:47:07] [PASSED] 0x4688 (ALDERLAKE_S)
[19:47:07] [PASSED] 0x468A (ALDERLAKE_S)
[19:47:07] [PASSED] 0x468B (ALDERLAKE_S)
[19:47:07] [PASSED] 0x4690 (ALDERLAKE_S)
[19:47:07] [PASSED] 0x4692 (ALDERLAKE_S)
[19:47:07] [PASSED] 0x4693 (ALDERLAKE_S)
[19:47:07] [PASSED] 0x46A0 (ALDERLAKE_P)
[19:47:07] [PASSED] 0x46A1 (ALDERLAKE_P)
[19:47:07] [PASSED] 0x46A2 (ALDERLAKE_P)
[19:47:07] [PASSED] 0x46A3 (ALDERLAKE_P)
[19:47:07] [PASSED] 0x46A6 (ALDERLAKE_P)
[19:47:07] [PASSED] 0x46A8 (ALDERLAKE_P)
[19:47:07] [PASSED] 0x46AA (ALDERLAKE_P)
[19:47:07] [PASSED] 0x462A (ALDERLAKE_P)
[19:47:07] [PASSED] 0x4626 (ALDERLAKE_P)
[19:47:07] [PASSED] 0x4628 (ALDERLAKE_P)
[19:47:07] [PASSED] 0x46B0 (ALDERLAKE_P)
[19:47:07] [PASSED] 0x46B1 (ALDERLAKE_P)
[19:47:07] [PASSED] 0x46B2 (ALDERLAKE_P)
[19:47:07] [PASSED] 0x46B3 (ALDERLAKE_P)
[19:47:07] [PASSED] 0x46C0 (ALDERLAKE_P)
[19:47:07] [PASSED] 0x46C1 (ALDERLAKE_P)
[19:47:07] [PASSED] 0x46C2 (ALDERLAKE_P)
[19:47:07] [PASSED] 0x46C3 (ALDERLAKE_P)
[19:47:07] [PASSED] 0x46D0 (ALDERLAKE_N)
[19:47:07] [PASSED] 0x46D1 (ALDERLAKE_N)
[19:47:07] [PASSED] 0x46D2 (ALDERLAKE_N)
[19:47:07] [PASSED] 0x46D3 (ALDERLAKE_N)
[19:47:07] [PASSED] 0x46D4 (ALDERLAKE_N)
[19:47:07] [PASSED] 0xA721 (ALDERLAKE_P)
[19:47:07] [PASSED] 0xA7A1 (ALDERLAKE_P)
[19:47:07] [PASSED] 0xA7A9 (ALDERLAKE_P)
[19:47:07] [PASSED] 0xA7AC (ALDERLAKE_P)
[19:47:07] [PASSED] 0xA7AD (ALDERLAKE_P)
[19:47:07] [PASSED] 0xA720 (ALDERLAKE_P)
[19:47:07] [PASSED] 0xA7A0 (ALDERLAKE_P)
[19:47:07] [PASSED] 0xA7A8 (ALDERLAKE_P)
[19:47:07] [PASSED] 0xA7AA (ALDERLAKE_P)
[19:47:07] [PASSED] 0xA7AB (ALDERLAKE_P)
[19:47:07] [PASSED] 0xA780 (ALDERLAKE_S)
[19:47:07] [PASSED] 0xA781 (ALDERLAKE_S)
[19:47:07] [PASSED] 0xA782 (ALDERLAKE_S)
[19:47:07] [PASSED] 0xA783 (ALDERLAKE_S)
[19:47:07] [PASSED] 0xA788 (ALDERLAKE_S)
[19:47:07] [PASSED] 0xA789 (ALDERLAKE_S)
[19:47:07] [PASSED] 0xA78A (ALDERLAKE_S)
[19:47:07] [PASSED] 0xA78B (ALDERLAKE_S)
[19:47:07] [PASSED] 0x4905 (DG1)
[19:47:07] [PASSED] 0x4906 (DG1)
[19:47:07] [PASSED] 0x4907 (DG1)
[19:47:07] [PASSED] 0x4908 (DG1)
[19:47:07] [PASSED] 0x4909 (DG1)
[19:47:07] [PASSED] 0x56C0 (DG2)
[19:47:07] [PASSED] 0x56C2 (DG2)
[19:47:07] [PASSED] 0x56C1 (DG2)
[19:47:07] [PASSED] 0x7D51 (METEORLAKE)
[19:47:07] [PASSED] 0x7DD1 (METEORLAKE)
[19:47:07] [PASSED] 0x7D41 (METEORLAKE)
[19:47:07] [PASSED] 0x7D67 (METEORLAKE)
[19:47:07] [PASSED] 0xB640 (METEORLAKE)
[19:47:07] [PASSED] 0x56A0 (DG2)
[19:47:07] [PASSED] 0x56A1 (DG2)
[19:47:07] [PASSED] 0x56A2 (DG2)
[19:47:07] [PASSED] 0x56BE (DG2)
[19:47:07] [PASSED] 0x56BF (DG2)
[19:47:07] [PASSED] 0x5690 (DG2)
[19:47:07] [PASSED] 0x5691 (DG2)
[19:47:07] [PASSED] 0x5692 (DG2)
[19:47:07] [PASSED] 0x56A5 (DG2)
[19:47:07] [PASSED] 0x56A6 (DG2)
[19:47:07] [PASSED] 0x56B0 (DG2)
[19:47:07] [PASSED] 0x56B1 (DG2)
[19:47:07] [PASSED] 0x56BA (DG2)
[19:47:07] [PASSED] 0x56BB (DG2)
[19:47:07] [PASSED] 0x56BC (DG2)
[19:47:07] [PASSED] 0x56BD (DG2)
[19:47:07] [PASSED] 0x5693 (DG2)
[19:47:07] [PASSED] 0x5694 (DG2)
[19:47:07] [PASSED] 0x5695 (DG2)
[19:47:07] [PASSED] 0x56A3 (DG2)
[19:47:07] [PASSED] 0x56A4 (DG2)
[19:47:07] [PASSED] 0x56B2 (DG2)
[19:47:07] [PASSED] 0x56B3 (DG2)
[19:47:07] [PASSED] 0x5696 (DG2)
[19:47:07] [PASSED] 0x5697 (DG2)
[19:47:07] [PASSED] 0xB69 (PVC)
[19:47:07] [PASSED] 0xB6E (PVC)
[19:47:07] [PASSED] 0xBD4 (PVC)
[19:47:07] [PASSED] 0xBD5 (PVC)
[19:47:07] [PASSED] 0xBD6 (PVC)
[19:47:07] [PASSED] 0xBD7 (PVC)
[19:47:07] [PASSED] 0xBD8 (PVC)
[19:47:07] [PASSED] 0xBD9 (PVC)
[19:47:07] [PASSED] 0xBDA (PVC)
[19:47:07] [PASSED] 0xBDB (PVC)
[19:47:07] [PASSED] 0xBE0 (PVC)
[19:47:07] [PASSED] 0xBE1 (PVC)
[19:47:07] [PASSED] 0xBE5 (PVC)
[19:47:07] [PASSED] 0x7D40 (METEORLAKE)
[19:47:07] [PASSED] 0x7D45 (METEORLAKE)
[19:47:07] [PASSED] 0x7D55 (METEORLAKE)
[19:47:07] [PASSED] 0x7D60 (METEORLAKE)
[19:47:07] [PASSED] 0x7DD5 (METEORLAKE)
[19:47:07] [PASSED] 0x6420 (LUNARLAKE)
[19:47:07] [PASSED] 0x64A0 (LUNARLAKE)
[19:47:07] [PASSED] 0x64B0 (LUNARLAKE)
[19:47:07] [PASSED] 0xE202 (BATTLEMAGE)
[19:47:07] [PASSED] 0xE209 (BATTLEMAGE)
[19:47:07] [PASSED] 0xE20B (BATTLEMAGE)
[19:47:07] [PASSED] 0xE20C (BATTLEMAGE)
[19:47:07] [PASSED] 0xE20D (BATTLEMAGE)
[19:47:07] [PASSED] 0xE210 (BATTLEMAGE)
[19:47:07] [PASSED] 0xE211 (BATTLEMAGE)
[19:47:07] [PASSED] 0xE212 (BATTLEMAGE)
[19:47:07] [PASSED] 0xE216 (BATTLEMAGE)
[19:47:07] [PASSED] 0xE220 (BATTLEMAGE)
[19:47:07] [PASSED] 0xE221 (BATTLEMAGE)
[19:47:07] [PASSED] 0xE222 (BATTLEMAGE)
[19:47:07] [PASSED] 0xE223 (BATTLEMAGE)
[19:47:07] [PASSED] 0xB080 (PANTHERLAKE)
[19:47:07] [PASSED] 0xB081 (PANTHERLAKE)
[19:47:07] [PASSED] 0xB082 (PANTHERLAKE)
[19:47:07] [PASSED] 0xB083 (PANTHERLAKE)
[19:47:07] [PASSED] 0xB084 (PANTHERLAKE)
[19:47:07] [PASSED] 0xB085 (PANTHERLAKE)
[19:47:07] [PASSED] 0xB086 (PANTHERLAKE)
[19:47:07] [PASSED] 0xB087 (PANTHERLAKE)
[19:47:07] [PASSED] 0xB08F (PANTHERLAKE)
[19:47:07] [PASSED] 0xB090 (PANTHERLAKE)
[19:47:07] [PASSED] 0xB0A0 (PANTHERLAKE)
[19:47:07] [PASSED] 0xB0B0 (PANTHERLAKE)
[19:47:07] [PASSED] 0xFD80 (PANTHERLAKE)
[19:47:07] [PASSED] 0xFD81 (PANTHERLAKE)
[19:47:07] ============= [PASSED] check_platform_gt_count =============
[19:47:07] ===================== [PASSED] xe_pci ======================
[19:47:07] =================== xe_rtp (2 subtests) ====================
[19:47:07] =============== xe_rtp_process_to_sr_tests  ================
[19:47:07] [PASSED] coalesce-same-reg
[19:47:07] [PASSED] no-match-no-add
[19:47:07] [PASSED] match-or
[19:47:07] [PASSED] match-or-xfail
[19:47:07] [PASSED] no-match-no-add-multiple-rules
[19:47:07] [PASSED] two-regs-two-entries
[19:47:07] [PASSED] clr-one-set-other
[19:47:07] [PASSED] set-field
[19:47:07] [PASSED] conflict-duplicate
[19:47:07] [PASSED] conflict-not-disjoint
[19:47:07] [PASSED] conflict-reg-type
[19:47:07] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[19:47:07] ================== xe_rtp_process_tests  ===================
[19:47:07] [PASSED] active1
[19:47:07] [PASSED] active2
[19:47:07] [PASSED] active-inactive
[19:47:07] [PASSED] inactive-active
[19:47:07] [PASSED] inactive-1st_or_active-inactive
[19:47:07] [PASSED] inactive-2nd_or_active-inactive
[19:47:07] [PASSED] inactive-last_or_active-inactive
[19:47:07] [PASSED] inactive-no_or_active-inactive
[19:47:07] ============== [PASSED] xe_rtp_process_tests ===============
[19:47:07] ===================== [PASSED] xe_rtp ======================
[19:47:07] ==================== xe_wa (1 subtest) =====================
[19:47:07] ======================== xe_wa_gt  =========================
[19:47:07] [PASSED] TIGERLAKE B0
[19:47:07] [PASSED] DG1 A0
[19:47:07] [PASSED] DG1 B0
[19:47:07] [PASSED] ALDERLAKE_S A0
[19:47:07] [PASSED] ALDERLAKE_S B0
[19:47:07] [PASSED] ALDERLAKE_S C0
[19:47:07] [PASSED] ALDERLAKE_S D0
[19:47:07] [PASSED] ALDERLAKE_P A0
[19:47:07] [PASSED] ALDERLAKE_P B0
[19:47:07] [PASSED] ALDERLAKE_P C0
[19:47:07] [PASSED] ALDERLAKE_S RPLS D0
[19:47:07] [PASSED] ALDERLAKE_P RPLU E0
[19:47:07] [PASSED] DG2 G10 C0
[19:47:07] [PASSED] DG2 G11 B1
[19:47:07] [PASSED] DG2 G12 A1
[19:47:07] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[19:47:07] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[19:47:07] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[19:47:07] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
stty: 'standard input': Inappropriate ioctl for device
[19:47:07] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[19:47:07] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[19:47:07] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[19:47:07] ==================== [PASSED] xe_wa_gt =====================
[19:47:07] ====================== [PASSED] xe_wa ======================
[19:47:07] ============================================================
[19:47:07] Testing complete. Ran 298 tests: passed: 282, skipped: 16
[19:47:07] Elapsed time: 33.557s total, 4.198s configuring, 28.993s building, 0.321s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[19:47:07] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[19:47:09] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[19:47:31] Starting KUnit Kernel (1/1)...
[19:47:31] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[19:47:32] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[19:47:32] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[19:47:32] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[19:47:32] =========== drm_validate_clone_mode (2 subtests) ===========
[19:47:32] ============== drm_test_check_in_clone_mode  ===============
[19:47:32] [PASSED] in_clone_mode
[19:47:32] [PASSED] not_in_clone_mode
[19:47:32] ========== [PASSED] drm_test_check_in_clone_mode ===========
[19:47:32] =============== drm_test_check_valid_clones  ===============
[19:47:32] [PASSED] not_in_clone_mode
[19:47:32] [PASSED] valid_clone
[19:47:32] [PASSED] invalid_clone
[19:47:32] =========== [PASSED] drm_test_check_valid_clones ===========
[19:47:32] ============= [PASSED] drm_validate_clone_mode =============
[19:47:32] ============= drm_validate_modeset (1 subtest) =============
[19:47:32] [PASSED] drm_test_check_connector_changed_modeset
[19:47:32] ============== [PASSED] drm_validate_modeset ===============
[19:47:32] ====== drm_test_bridge_get_current_state (2 subtests) ======
[19:47:32] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[19:47:32] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[19:47:32] ======== [PASSED] drm_test_bridge_get_current_state ========
[19:47:32] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[19:47:32] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[19:47:32] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[19:47:32] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[19:47:32] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[19:47:32] ============== drm_bridge_alloc (2 subtests) ===============
[19:47:32] [PASSED] drm_test_drm_bridge_alloc_basic
[19:47:32] [PASSED] drm_test_drm_bridge_alloc_get_put
[19:47:32] ================ [PASSED] drm_bridge_alloc =================
[19:47:32] ================== drm_buddy (7 subtests) ==================
[19:47:32] [PASSED] drm_test_buddy_alloc_limit
[19:47:32] [PASSED] drm_test_buddy_alloc_optimistic
[19:47:32] [PASSED] drm_test_buddy_alloc_pessimistic
[19:47:32] [PASSED] drm_test_buddy_alloc_pathological
[19:47:32] [PASSED] drm_test_buddy_alloc_contiguous
[19:47:32] [PASSED] drm_test_buddy_alloc_clear
[19:47:32] [PASSED] drm_test_buddy_alloc_range_bias
[19:47:32] ==================== [PASSED] drm_buddy ====================
[19:47:32] ============= drm_cmdline_parser (40 subtests) =============
[19:47:32] [PASSED] drm_test_cmdline_force_d_only
[19:47:32] [PASSED] drm_test_cmdline_force_D_only_dvi
[19:47:32] [PASSED] drm_test_cmdline_force_D_only_hdmi
[19:47:32] [PASSED] drm_test_cmdline_force_D_only_not_digital
[19:47:32] [PASSED] drm_test_cmdline_force_e_only
[19:47:32] [PASSED] drm_test_cmdline_res
[19:47:32] [PASSED] drm_test_cmdline_res_vesa
[19:47:32] [PASSED] drm_test_cmdline_res_vesa_rblank
[19:47:32] [PASSED] drm_test_cmdline_res_rblank
[19:47:32] [PASSED] drm_test_cmdline_res_bpp
[19:47:32] [PASSED] drm_test_cmdline_res_refresh
[19:47:32] [PASSED] drm_test_cmdline_res_bpp_refresh
[19:47:32] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[19:47:32] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[19:47:32] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[19:47:32] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[19:47:32] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[19:47:32] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[19:47:32] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[19:47:32] [PASSED] drm_test_cmdline_res_margins_force_on
[19:47:32] [PASSED] drm_test_cmdline_res_vesa_margins
[19:47:32] [PASSED] drm_test_cmdline_name
[19:47:32] [PASSED] drm_test_cmdline_name_bpp
[19:47:32] [PASSED] drm_test_cmdline_name_option
[19:47:32] [PASSED] drm_test_cmdline_name_bpp_option
[19:47:32] [PASSED] drm_test_cmdline_rotate_0
[19:47:32] [PASSED] drm_test_cmdline_rotate_90
[19:47:32] [PASSED] drm_test_cmdline_rotate_180
[19:47:32] [PASSED] drm_test_cmdline_rotate_270
[19:47:32] [PASSED] drm_test_cmdline_hmirror
[19:47:32] [PASSED] drm_test_cmdline_vmirror
[19:47:32] [PASSED] drm_test_cmdline_margin_options
[19:47:32] [PASSED] drm_test_cmdline_multiple_options
[19:47:32] [PASSED] drm_test_cmdline_bpp_extra_and_option
[19:47:32] [PASSED] drm_test_cmdline_extra_and_option
[19:47:32] [PASSED] drm_test_cmdline_freestanding_options
[19:47:32] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[19:47:32] [PASSED] drm_test_cmdline_panel_orientation
[19:47:32] ================ drm_test_cmdline_invalid  =================
[19:47:32] [PASSED] margin_only
[19:47:32] [PASSED] interlace_only
[19:47:32] [PASSED] res_missing_x
[19:47:32] [PASSED] res_missing_y
[19:47:32] [PASSED] res_bad_y
[19:47:32] [PASSED] res_missing_y_bpp
[19:47:32] [PASSED] res_bad_bpp
[19:47:32] [PASSED] res_bad_refresh
[19:47:32] [PASSED] res_bpp_refresh_force_on_off
[19:47:32] [PASSED] res_invalid_mode
[19:47:32] [PASSED] res_bpp_wrong_place_mode
[19:47:32] [PASSED] name_bpp_refresh
[19:47:32] [PASSED] name_refresh
[19:47:32] [PASSED] name_refresh_wrong_mode
[19:47:32] [PASSED] name_refresh_invalid_mode
[19:47:32] [PASSED] rotate_multiple
[19:47:32] [PASSED] rotate_invalid_val
[19:47:32] [PASSED] rotate_truncated
[19:47:32] [PASSED] invalid_option
[19:47:32] [PASSED] invalid_tv_option
[19:47:32] [PASSED] truncated_tv_option
[19:47:32] ============ [PASSED] drm_test_cmdline_invalid =============
[19:47:32] =============== drm_test_cmdline_tv_options  ===============
[19:47:32] [PASSED] NTSC
[19:47:32] [PASSED] NTSC_443
[19:47:32] [PASSED] NTSC_J
[19:47:32] [PASSED] PAL
[19:47:32] [PASSED] PAL_M
[19:47:32] [PASSED] PAL_N
[19:47:32] [PASSED] SECAM
[19:47:32] [PASSED] MONO_525
[19:47:32] [PASSED] MONO_625
[19:47:32] =========== [PASSED] drm_test_cmdline_tv_options ===========
[19:47:32] =============== [PASSED] drm_cmdline_parser ================
[19:47:32] ========== drmm_connector_hdmi_init (20 subtests) ==========
[19:47:32] [PASSED] drm_test_connector_hdmi_init_valid
[19:47:32] [PASSED] drm_test_connector_hdmi_init_bpc_8
[19:47:32] [PASSED] drm_test_connector_hdmi_init_bpc_10
[19:47:32] [PASSED] drm_test_connector_hdmi_init_bpc_12
[19:47:32] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[19:47:32] [PASSED] drm_test_connector_hdmi_init_bpc_null
[19:47:32] [PASSED] drm_test_connector_hdmi_init_formats_empty
[19:47:32] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[19:47:32] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[19:47:32] [PASSED] supported_formats=0x9 yuv420_allowed=1
[19:47:32] [PASSED] supported_formats=0x9 yuv420_allowed=0
[19:47:32] [PASSED] supported_formats=0x3 yuv420_allowed=1
[19:47:32] [PASSED] supported_formats=0x3 yuv420_allowed=0
[19:47:32] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[19:47:32] [PASSED] drm_test_connector_hdmi_init_null_ddc
[19:47:32] [PASSED] drm_test_connector_hdmi_init_null_product
[19:47:32] [PASSED] drm_test_connector_hdmi_init_null_vendor
[19:47:32] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[19:47:32] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[19:47:32] [PASSED] drm_test_connector_hdmi_init_product_valid
[19:47:32] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[19:47:32] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[19:47:32] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[19:47:32] ========= drm_test_connector_hdmi_init_type_valid  =========
[19:47:32] [PASSED] HDMI-A
[19:47:32] [PASSED] HDMI-B
[19:47:32] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[19:47:32] ======== drm_test_connector_hdmi_init_type_invalid  ========
[19:47:32] [PASSED] Unknown
[19:47:32] [PASSED] VGA
[19:47:32] [PASSED] DVI-I
[19:47:32] [PASSED] DVI-D
[19:47:32] [PASSED] DVI-A
[19:47:32] [PASSED] Composite
[19:47:32] [PASSED] SVIDEO
[19:47:32] [PASSED] LVDS
[19:47:32] [PASSED] Component
[19:47:32] [PASSED] DIN
[19:47:32] [PASSED] DP
[19:47:32] [PASSED] TV
[19:47:32] [PASSED] eDP
[19:47:32] [PASSED] Virtual
[19:47:32] [PASSED] DSI
[19:47:32] [PASSED] DPI
[19:47:32] [PASSED] Writeback
[19:47:32] [PASSED] SPI
[19:47:32] [PASSED] USB
[19:47:32] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[19:47:32] ============ [PASSED] drmm_connector_hdmi_init =============
[19:47:32] ============= drmm_connector_init (3 subtests) =============
[19:47:32] [PASSED] drm_test_drmm_connector_init
[19:47:32] [PASSED] drm_test_drmm_connector_init_null_ddc
[19:47:32] ========= drm_test_drmm_connector_init_type_valid  =========
[19:47:32] [PASSED] Unknown
[19:47:32] [PASSED] VGA
[19:47:32] [PASSED] DVI-I
[19:47:32] [PASSED] DVI-D
[19:47:32] [PASSED] DVI-A
[19:47:32] [PASSED] Composite
[19:47:32] [PASSED] SVIDEO
[19:47:32] [PASSED] LVDS
[19:47:32] [PASSED] Component
[19:47:32] [PASSED] DIN
[19:47:32] [PASSED] DP
[19:47:32] [PASSED] HDMI-A
[19:47:32] [PASSED] HDMI-B
[19:47:32] [PASSED] TV
[19:47:32] [PASSED] eDP
[19:47:32] [PASSED] Virtual
[19:47:32] [PASSED] DSI
[19:47:32] [PASSED] DPI
[19:47:32] [PASSED] Writeback
[19:47:32] [PASSED] SPI
[19:47:32] [PASSED] USB
[19:47:32] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[19:47:32] =============== [PASSED] drmm_connector_init ===============
[19:47:32] ========= drm_connector_dynamic_init (6 subtests) ==========
[19:47:32] [PASSED] drm_test_drm_connector_dynamic_init
[19:47:32] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[19:47:32] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[19:47:32] [PASSED] drm_test_drm_connector_dynamic_init_properties
[19:47:32] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[19:47:32] [PASSED] Unknown
[19:47:32] [PASSED] VGA
[19:47:32] [PASSED] DVI-I
[19:47:32] [PASSED] DVI-D
[19:47:32] [PASSED] DVI-A
[19:47:32] [PASSED] Composite
[19:47:32] [PASSED] SVIDEO
[19:47:32] [PASSED] LVDS
[19:47:32] [PASSED] Component
[19:47:32] [PASSED] DIN
[19:47:32] [PASSED] DP
[19:47:32] [PASSED] HDMI-A
[19:47:32] [PASSED] HDMI-B
[19:47:32] [PASSED] TV
[19:47:32] [PASSED] eDP
[19:47:32] [PASSED] Virtual
[19:47:32] [PASSED] DSI
[19:47:32] [PASSED] DPI
[19:47:32] [PASSED] Writeback
[19:47:32] [PASSED] SPI
[19:47:32] [PASSED] USB
[19:47:32] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[19:47:32] ======== drm_test_drm_connector_dynamic_init_name  =========
[19:47:32] [PASSED] Unknown
[19:47:32] [PASSED] VGA
[19:47:32] [PASSED] DVI-I
[19:47:32] [PASSED] DVI-D
[19:47:32] [PASSED] DVI-A
[19:47:32] [PASSED] Composite
[19:47:32] [PASSED] SVIDEO
[19:47:32] [PASSED] LVDS
[19:47:32] [PASSED] Component
[19:47:32] [PASSED] DIN
[19:47:32] [PASSED] DP
[19:47:32] [PASSED] HDMI-A
[19:47:32] [PASSED] HDMI-B
[19:47:32] [PASSED] TV
[19:47:32] [PASSED] eDP
[19:47:32] [PASSED] Virtual
[19:47:32] [PASSED] DSI
[19:47:32] [PASSED] DPI
[19:47:32] [PASSED] Writeback
[19:47:32] [PASSED] SPI
[19:47:32] [PASSED] USB
[19:47:32] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[19:47:32] =========== [PASSED] drm_connector_dynamic_init ============
[19:47:32] ==== drm_connector_dynamic_register_early (4 subtests) =====
[19:47:32] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[19:47:32] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[19:47:32] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[19:47:32] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[19:47:32] ====== [PASSED] drm_connector_dynamic_register_early =======
[19:47:32] ======= drm_connector_dynamic_register (7 subtests) ========
[19:47:32] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[19:47:32] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[19:47:32] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[19:47:32] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[19:47:32] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[19:47:32] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[19:47:32] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[19:47:32] ========= [PASSED] drm_connector_dynamic_register ==========
[19:47:32] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[19:47:32] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[19:47:32] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[19:47:32] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[19:47:32] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[19:47:32] ========== drm_test_get_tv_mode_from_name_valid  ===========
[19:47:32] [PASSED] NTSC
[19:47:32] [PASSED] NTSC-443
[19:47:32] [PASSED] NTSC-J
[19:47:32] [PASSED] PAL
[19:47:32] [PASSED] PAL-M
[19:47:32] [PASSED] PAL-N
[19:47:32] [PASSED] SECAM
[19:47:32] [PASSED] Mono
[19:47:32] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[19:47:32] [PASSED] drm_test_get_tv_mode_from_name_truncated
[19:47:32] ============ [PASSED] drm_get_tv_mode_from_name ============
[19:47:32] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[19:47:32] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[19:47:32] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[19:47:32] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[19:47:32] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[19:47:32] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[19:47:32] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[19:47:32] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[19:47:32] [PASSED] VIC 96
[19:47:32] [PASSED] VIC 97
[19:47:32] [PASSED] VIC 101
[19:47:32] [PASSED] VIC 102
[19:47:32] [PASSED] VIC 106
[19:47:32] [PASSED] VIC 107
[19:47:32] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[19:47:32] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[19:47:32] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[19:47:32] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[19:47:32] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[19:47:32] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[19:47:32] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[19:47:32] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[19:47:32] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[19:47:32] [PASSED] Automatic
[19:47:32] [PASSED] Full
[19:47:32] [PASSED] Limited 16:235
[19:47:32] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[19:47:32] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[19:47:32] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[19:47:32] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[19:47:32] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[19:47:32] [PASSED] RGB
[19:47:32] [PASSED] YUV 4:2:0
[19:47:32] [PASSED] YUV 4:2:2
[19:47:32] [PASSED] YUV 4:4:4
[19:47:32] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[19:47:32] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[19:47:32] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[19:47:32] ============= drm_damage_helper (21 subtests) ==============
[19:47:32] [PASSED] drm_test_damage_iter_no_damage
[19:47:32] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[19:47:32] [PASSED] drm_test_damage_iter_no_damage_src_moved
[19:47:32] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[19:47:32] [PASSED] drm_test_damage_iter_no_damage_not_visible
[19:47:32] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[19:47:32] [PASSED] drm_test_damage_iter_no_damage_no_fb
[19:47:32] [PASSED] drm_test_damage_iter_simple_damage
[19:47:32] [PASSED] drm_test_damage_iter_single_damage
[19:47:32] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[19:47:32] [PASSED] drm_test_damage_iter_single_damage_outside_src
[19:47:32] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[19:47:32] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[19:47:32] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[19:47:32] [PASSED] drm_test_damage_iter_single_damage_src_moved
[19:47:32] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[19:47:32] [PASSED] drm_test_damage_iter_damage
[19:47:32] [PASSED] drm_test_damage_iter_damage_one_intersect
[19:47:32] [PASSED] drm_test_damage_iter_damage_one_outside
[19:47:32] [PASSED] drm_test_damage_iter_damage_src_moved
[19:47:32] [PASSED] drm_test_damage_iter_damage_not_visible
[19:47:32] ================ [PASSED] drm_damage_helper ================
[19:47:32] ============== drm_dp_mst_helper (3 subtests) ==============
[19:47:32] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[19:47:32] [PASSED] Clock 154000 BPP 30 DSC disabled
[19:47:32] [PASSED] Clock 234000 BPP 30 DSC disabled
[19:47:32] [PASSED] Clock 297000 BPP 24 DSC disabled
[19:47:32] [PASSED] Clock 332880 BPP 24 DSC enabled
[19:47:32] [PASSED] Clock 324540 BPP 24 DSC enabled
[19:47:32] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[19:47:32] ============== drm_test_dp_mst_calc_pbn_div  ===============
[19:47:32] [PASSED] Link rate 2000000 lane count 4
[19:47:32] [PASSED] Link rate 2000000 lane count 2
[19:47:32] [PASSED] Link rate 2000000 lane count 1
[19:47:32] [PASSED] Link rate 1350000 lane count 4
[19:47:32] [PASSED] Link rate 1350000 lane count 2
[19:47:32] [PASSED] Link rate 1350000 lane count 1
[19:47:32] [PASSED] Link rate 1000000 lane count 4
[19:47:32] [PASSED] Link rate 1000000 lane count 2
[19:47:32] [PASSED] Link rate 1000000 lane count 1
[19:47:32] [PASSED] Link rate 810000 lane count 4
[19:47:32] [PASSED] Link rate 810000 lane count 2
[19:47:32] [PASSED] Link rate 810000 lane count 1
[19:47:32] [PASSED] Link rate 540000 lane count 4
[19:47:32] [PASSED] Link rate 540000 lane count 2
[19:47:32] [PASSED] Link rate 540000 lane count 1
[19:47:32] [PASSED] Link rate 270000 lane count 4
[19:47:32] [PASSED] Link rate 270000 lane count 2
[19:47:32] [PASSED] Link rate 270000 lane count 1
[19:47:32] [PASSED] Link rate 162000 lane count 4
[19:47:32] [PASSED] Link rate 162000 lane count 2
[19:47:32] [PASSED] Link rate 162000 lane count 1
[19:47:32] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[19:47:32] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[19:47:32] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[19:47:32] [PASSED] DP_POWER_UP_PHY with port number
[19:47:32] [PASSED] DP_POWER_DOWN_PHY with port number
[19:47:32] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[19:47:32] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[19:47:32] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[19:47:32] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[19:47:32] [PASSED] DP_QUERY_PAYLOAD with port number
[19:47:32] [PASSED] DP_QUERY_PAYLOAD with VCPI
[19:47:32] [PASSED] DP_REMOTE_DPCD_READ with port number
[19:47:32] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[19:47:32] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[19:47:32] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[19:47:32] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[19:47:32] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[19:47:32] [PASSED] DP_REMOTE_I2C_READ with port number
[19:47:32] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[19:47:32] [PASSED] DP_REMOTE_I2C_READ with transactions array
[19:47:32] [PASSED] DP_REMOTE_I2C_WRITE with port number
[19:47:32] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[19:47:32] [PASSED] DP_REMOTE_I2C_WRITE with data array
[19:47:32] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[19:47:32] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[19:47:32] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[19:47:32] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[19:47:32] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[19:47:32] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[19:47:32] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[19:47:32] ================ [PASSED] drm_dp_mst_helper ================
[19:47:32] ================== drm_exec (7 subtests) ===================
[19:47:32] [PASSED] sanitycheck
[19:47:32] [PASSED] test_lock
[19:47:32] [PASSED] test_lock_unlock
[19:47:32] [PASSED] test_duplicates
[19:47:32] [PASSED] test_prepare
[19:47:32] [PASSED] test_prepare_array
[19:47:32] [PASSED] test_multiple_loops
[19:47:32] ==================== [PASSED] drm_exec =====================
[19:47:32] =========== drm_format_helper_test (17 subtests) ===========
[19:47:32] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[19:47:32] [PASSED] single_pixel_source_buffer
[19:47:32] [PASSED] single_pixel_clip_rectangle
[19:47:32] [PASSED] well_known_colors
[19:47:32] [PASSED] destination_pitch
[19:47:32] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[19:47:32] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[19:47:32] [PASSED] single_pixel_source_buffer
[19:47:32] [PASSED] single_pixel_clip_rectangle
[19:47:32] [PASSED] well_known_colors
[19:47:32] [PASSED] destination_pitch
[19:47:32] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[19:47:32] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[19:47:32] [PASSED] single_pixel_source_buffer
[19:47:32] [PASSED] single_pixel_clip_rectangle
[19:47:32] [PASSED] well_known_colors
[19:47:32] [PASSED] destination_pitch
[19:47:32] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[19:47:32] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[19:47:32] [PASSED] single_pixel_source_buffer
[19:47:32] [PASSED] single_pixel_clip_rectangle
[19:47:32] [PASSED] well_known_colors
[19:47:32] [PASSED] destination_pitch
[19:47:32] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[19:47:32] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[19:47:32] [PASSED] single_pixel_source_buffer
[19:47:32] [PASSED] single_pixel_clip_rectangle
[19:47:32] [PASSED] well_known_colors
[19:47:32] [PASSED] destination_pitch
[19:47:32] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[19:47:32] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[19:47:32] [PASSED] single_pixel_source_buffer
[19:47:32] [PASSED] single_pixel_clip_rectangle
[19:47:32] [PASSED] well_known_colors
[19:47:32] [PASSED] destination_pitch
[19:47:32] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[19:47:32] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[19:47:32] [PASSED] single_pixel_source_buffer
[19:47:32] [PASSED] single_pixel_clip_rectangle
[19:47:32] [PASSED] well_known_colors
[19:47:32] [PASSED] destination_pitch
[19:47:32] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[19:47:32] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[19:47:32] [PASSED] single_pixel_source_buffer
[19:47:32] [PASSED] single_pixel_clip_rectangle
[19:47:32] [PASSED] well_known_colors
[19:47:32] [PASSED] destination_pitch
[19:47:32] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[19:47:32] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[19:47:32] [PASSED] single_pixel_source_buffer
[19:47:32] [PASSED] single_pixel_clip_rectangle
[19:47:32] [PASSED] well_known_colors
[19:47:32] [PASSED] destination_pitch
[19:47:32] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[19:47:32] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[19:47:32] [PASSED] single_pixel_source_buffer
[19:47:32] [PASSED] single_pixel_clip_rectangle
[19:47:32] [PASSED] well_known_colors
[19:47:32] [PASSED] destination_pitch
[19:47:32] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[19:47:32] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[19:47:32] [PASSED] single_pixel_source_buffer
[19:47:32] [PASSED] single_pixel_clip_rectangle
[19:47:32] [PASSED] well_known_colors
[19:47:32] [PASSED] destination_pitch
[19:47:32] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[19:47:32] ============== drm_test_fb_xrgb8888_to_mono  ===============
[19:47:32] [PASSED] single_pixel_source_buffer
[19:47:32] [PASSED] single_pixel_clip_rectangle
[19:47:32] [PASSED] well_known_colors
[19:47:32] [PASSED] destination_pitch
[19:47:32] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[19:47:32] ==================== drm_test_fb_swab  =====================
[19:47:32] [PASSED] single_pixel_source_buffer
[19:47:32] [PASSED] single_pixel_clip_rectangle
[19:47:32] [PASSED] well_known_colors
[19:47:32] [PASSED] destination_pitch
[19:47:32] ================ [PASSED] drm_test_fb_swab =================
[19:47:32] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[19:47:32] [PASSED] single_pixel_source_buffer
[19:47:32] [PASSED] single_pixel_clip_rectangle
[19:47:32] [PASSED] well_known_colors
[19:47:32] [PASSED] destination_pitch
[19:47:32] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[19:47:32] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[19:47:32] [PASSED] single_pixel_source_buffer
[19:47:32] [PASSED] single_pixel_clip_rectangle
[19:47:32] [PASSED] well_known_colors
[19:47:32] [PASSED] destination_pitch
[19:47:32] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[19:47:32] ================= drm_test_fb_clip_offset  =================
[19:47:32] [PASSED] pass through
[19:47:32] [PASSED] horizontal offset
[19:47:32] [PASSED] vertical offset
[19:47:32] [PASSED] horizontal and vertical offset
[19:47:32] [PASSED] horizontal offset (custom pitch)
[19:47:32] [PASSED] vertical offset (custom pitch)
[19:47:32] [PASSED] horizontal and vertical offset (custom pitch)
[19:47:32] ============= [PASSED] drm_test_fb_clip_offset =============
[19:47:32] =================== drm_test_fb_memcpy  ====================
[19:47:32] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[19:47:32] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[19:47:32] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[19:47:32] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[19:47:32] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[19:47:32] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[19:47:32] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[19:47:32] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[19:47:32] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[19:47:32] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[19:47:32] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[19:47:32] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[19:47:32] =============== [PASSED] drm_test_fb_memcpy ================
[19:47:32] ============= [PASSED] drm_format_helper_test ==============
[19:47:32] ================= drm_format (18 subtests) =================
[19:47:32] [PASSED] drm_test_format_block_width_invalid
[19:47:32] [PASSED] drm_test_format_block_width_one_plane
[19:47:32] [PASSED] drm_test_format_block_width_two_plane
[19:47:32] [PASSED] drm_test_format_block_width_three_plane
[19:47:32] [PASSED] drm_test_format_block_width_tiled
[19:47:32] [PASSED] drm_test_format_block_height_invalid
[19:47:32] [PASSED] drm_test_format_block_height_one_plane
[19:47:32] [PASSED] drm_test_format_block_height_two_plane
[19:47:32] [PASSED] drm_test_format_block_height_three_plane
[19:47:32] [PASSED] drm_test_format_block_height_tiled
[19:47:32] [PASSED] drm_test_format_min_pitch_invalid
[19:47:32] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[19:47:32] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[19:47:32] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[19:47:32] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[19:47:32] [PASSED] drm_test_format_min_pitch_two_plane
[19:47:32] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[19:47:32] [PASSED] drm_test_format_min_pitch_tiled
[19:47:32] =================== [PASSED] drm_format ====================
[19:47:32] ============== drm_framebuffer (10 subtests) ===============
[19:47:32] ========== drm_test_framebuffer_check_src_coords  ==========
[19:47:32] [PASSED] Success: source fits into fb
[19:47:32] [PASSED] Fail: overflowing fb with x-axis coordinate
[19:47:32] [PASSED] Fail: overflowing fb with y-axis coordinate
[19:47:32] [PASSED] Fail: overflowing fb with source width
[19:47:32] [PASSED] Fail: overflowing fb with source height
[19:47:32] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[19:47:32] [PASSED] drm_test_framebuffer_cleanup
[19:47:32] =============== drm_test_framebuffer_create  ===============
[19:47:32] [PASSED] ABGR8888 normal sizes
[19:47:32] [PASSED] ABGR8888 max sizes
[19:47:32] [PASSED] ABGR8888 pitch greater than min required
[19:47:32] [PASSED] ABGR8888 pitch less than min required
[19:47:32] [PASSED] ABGR8888 Invalid width
[19:47:32] [PASSED] ABGR8888 Invalid buffer handle
[19:47:32] [PASSED] No pixel format
[19:47:32] [PASSED] ABGR8888 Width 0
[19:47:32] [PASSED] ABGR8888 Height 0
[19:47:32] [PASSED] ABGR8888 Out of bound height * pitch combination
[19:47:32] [PASSED] ABGR8888 Large buffer offset
[19:47:32] [PASSED] ABGR8888 Buffer offset for inexistent plane
[19:47:32] [PASSED] ABGR8888 Invalid flag
[19:47:32] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[19:47:32] [PASSED] ABGR8888 Valid buffer modifier
[19:47:32] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[19:47:32] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[19:47:32] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[19:47:32] [PASSED] NV12 Normal sizes
[19:47:32] [PASSED] NV12 Max sizes
[19:47:32] [PASSED] NV12 Invalid pitch
[19:47:32] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[19:47:32] [PASSED] NV12 different  modifier per-plane
[19:47:32] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[19:47:32] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[19:47:32] [PASSED] NV12 Modifier for inexistent plane
[19:47:32] [PASSED] NV12 Handle for inexistent plane
[19:47:32] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[19:47:32] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[19:47:32] [PASSED] YVU420 Normal sizes
[19:47:32] [PASSED] YVU420 Max sizes
[19:47:32] [PASSED] YVU420 Invalid pitch
[19:47:32] [PASSED] YVU420 Different pitches
[19:47:32] [PASSED] YVU420 Different buffer offsets/pitches
[19:47:32] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[19:47:32] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[19:47:32] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[19:47:32] [PASSED] YVU420 Valid modifier
[19:47:32] [PASSED] YVU420 Different modifiers per plane
[19:47:32] [PASSED] YVU420 Modifier for inexistent plane
[19:47:32] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[19:47:32] [PASSED] X0L2 Normal sizes
[19:47:32] [PASSED] X0L2 Max sizes
[19:47:32] [PASSED] X0L2 Invalid pitch
[19:47:32] [PASSED] X0L2 Pitch greater than minimum required
[19:47:32] [PASSED] X0L2 Handle for inexistent plane
[19:47:32] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[19:47:32] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[19:47:32] [PASSED] X0L2 Valid modifier
[19:47:32] [PASSED] X0L2 Modifier for inexistent plane
[19:47:32] =========== [PASSED] drm_test_framebuffer_create ===========
[19:47:32] [PASSED] drm_test_framebuffer_free
[19:47:32] [PASSED] drm_test_framebuffer_init
[19:47:32] [PASSED] drm_test_framebuffer_init_bad_format
[19:47:32] [PASSED] drm_test_framebuffer_init_dev_mismatch
[19:47:32] [PASSED] drm_test_framebuffer_lookup
[19:47:32] [PASSED] drm_test_framebuffer_lookup_inexistent
[19:47:32] [PASSED] drm_test_framebuffer_modifiers_not_supported
[19:47:32] ================= [PASSED] drm_framebuffer =================
[19:47:32] ================ drm_gem_shmem (8 subtests) ================
[19:47:32] [PASSED] drm_gem_shmem_test_obj_create
[19:47:32] [PASSED] drm_gem_shmem_test_obj_create_private
[19:47:32] [PASSED] drm_gem_shmem_test_pin_pages
[19:47:32] [PASSED] drm_gem_shmem_test_vmap
[19:47:32] [PASSED] drm_gem_shmem_test_get_pages_sgt
[19:47:32] [PASSED] drm_gem_shmem_test_get_sg_table
[19:47:32] [PASSED] drm_gem_shmem_test_madvise
[19:47:32] [PASSED] drm_gem_shmem_test_purge
[19:47:32] ================== [PASSED] drm_gem_shmem ==================
[19:47:32] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[19:47:32] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[19:47:32] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[19:47:32] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[19:47:32] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[19:47:32] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[19:47:32] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[19:47:32] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[19:47:32] [PASSED] Automatic
[19:47:32] [PASSED] Full
[19:47:32] [PASSED] Limited 16:235
[19:47:32] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[19:47:32] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[19:47:32] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[19:47:32] [PASSED] drm_test_check_disable_connector
[19:47:32] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[19:47:32] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[19:47:32] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[19:47:32] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[19:47:32] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[19:47:32] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[19:47:32] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[19:47:32] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[19:47:32] [PASSED] drm_test_check_output_bpc_dvi
[19:47:32] [PASSED] drm_test_check_output_bpc_format_vic_1
[19:47:32] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[19:47:32] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[19:47:32] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[19:47:32] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[19:47:32] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[19:47:32] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[19:47:32] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[19:47:32] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[19:47:32] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[19:47:32] [PASSED] drm_test_check_broadcast_rgb_value
[19:47:32] [PASSED] drm_test_check_bpc_8_value
[19:47:32] [PASSED] drm_test_check_bpc_10_value
[19:47:32] [PASSED] drm_test_check_bpc_12_value
[19:47:32] [PASSED] drm_test_check_format_value
[19:47:32] [PASSED] drm_test_check_tmds_char_value
[19:47:32] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[19:47:32] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[19:47:32] [PASSED] drm_test_check_mode_valid
[19:47:32] [PASSED] drm_test_check_mode_valid_reject
[19:47:32] [PASSED] drm_test_check_mode_valid_reject_rate
[19:47:32] [PASSED] drm_test_check_mode_valid_reject_max_clock
[19:47:32] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[19:47:32] ================= drm_managed (2 subtests) =================
[19:47:32] [PASSED] drm_test_managed_release_action
[19:47:32] [PASSED] drm_test_managed_run_action
[19:47:32] =================== [PASSED] drm_managed ===================
[19:47:32] =================== drm_mm (6 subtests) ====================
[19:47:32] [PASSED] drm_test_mm_init
[19:47:32] [PASSED] drm_test_mm_debug
[19:47:32] [PASSED] drm_test_mm_align32
[19:47:32] [PASSED] drm_test_mm_align64
[19:47:32] [PASSED] drm_test_mm_lowest
[19:47:32] [PASSED] drm_test_mm_highest
[19:47:32] ===================== [PASSED] drm_mm ======================
[19:47:32] ============= drm_modes_analog_tv (5 subtests) =============
[19:47:32] [PASSED] drm_test_modes_analog_tv_mono_576i
[19:47:32] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[19:47:32] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[19:47:32] [PASSED] drm_test_modes_analog_tv_pal_576i
[19:47:32] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[19:47:32] =============== [PASSED] drm_modes_analog_tv ===============
[19:47:32] ============== drm_plane_helper (2 subtests) ===============
[19:47:32] =============== drm_test_check_plane_state  ================
[19:47:32] [PASSED] clipping_simple
[19:47:32] [PASSED] clipping_rotate_reflect
[19:47:32] [PASSED] positioning_simple
[19:47:32] [PASSED] upscaling
[19:47:32] [PASSED] downscaling
[19:47:32] [PASSED] rounding1
[19:47:32] [PASSED] rounding2
[19:47:32] [PASSED] rounding3
[19:47:32] [PASSED] rounding4
[19:47:32] =========== [PASSED] drm_test_check_plane_state ============
[19:47:32] =========== drm_test_check_invalid_plane_state  ============
[19:47:32] [PASSED] positioning_invalid
[19:47:32] [PASSED] upscaling_invalid
[19:47:32] [PASSED] downscaling_invalid
[19:47:32] ======= [PASSED] drm_test_check_invalid_plane_state ========
[19:47:32] ================ [PASSED] drm_plane_helper =================
[19:47:32] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[19:47:32] ====== drm_test_connector_helper_tv_get_modes_check  =======
[19:47:32] [PASSED] None
[19:47:32] [PASSED] PAL
[19:47:32] [PASSED] NTSC
[19:47:32] [PASSED] Both, NTSC Default
[19:47:32] [PASSED] Both, PAL Default
[19:47:32] [PASSED] Both, NTSC Default, with PAL on command-line
[19:47:32] [PASSED] Both, PAL Default, with NTSC on command-line
[19:47:32] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[19:47:32] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[19:47:32] ================== drm_rect (9 subtests) ===================
[19:47:32] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[19:47:32] [PASSED] drm_test_rect_clip_scaled_not_clipped
[19:47:32] [PASSED] drm_test_rect_clip_scaled_clipped
[19:47:32] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[19:47:32] ================= drm_test_rect_intersect  =================
[19:47:32] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[19:47:32] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[19:47:32] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[19:47:32] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[19:47:32] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[19:47:32] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[19:47:32] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[19:47:32] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[19:47:32] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[19:47:32] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[19:47:32] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[19:47:32] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[19:47:32] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[19:47:32] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[19:47:32] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[19:47:32] ============= [PASSED] drm_test_rect_intersect =============
[19:47:32] ================ drm_test_rect_calc_hscale  ================
[19:47:32] [PASSED] normal use
[19:47:32] [PASSED] out of max range
[19:47:32] [PASSED] out of min range
[19:47:32] [PASSED] zero dst
[19:47:32] [PASSED] negative src
[19:47:32] [PASSED] negative dst
[19:47:32] ============ [PASSED] drm_test_rect_calc_hscale ============
[19:47:32] ================ drm_test_rect_calc_vscale  ================
[19:47:32] [PASSED] normal use
[19:47:32] [PASSED] out of max range
[19:47:32] [PASSED] out of min range
[19:47:32] [PASSED] zero dst
[19:47:32] [PASSED] negative src
[19:47:32] [PASSED] negative dst
[19:47:32] ============ [PASSED] drm_test_rect_calc_vscale ============
[19:47:32] ================== drm_test_rect_rotate  ===================
[19:47:32] [PASSED] reflect-x
[19:47:32] [PASSED] reflect-y
[19:47:32] [PASSED] rotate-0
[19:47:32] [PASSED] rotate-90
[19:47:32] [PASSED] rotate-180
[19:47:32] [PASSED] rotate-270
stty: 'standard input': Inappropriate ioctl for device
[19:47:32] ============== [PASSED] drm_test_rect_rotate ===============
[19:47:32] ================ drm_test_rect_rotate_inv  =================
[19:47:32] [PASSED] reflect-x
[19:47:32] [PASSED] reflect-y
[19:47:32] [PASSED] rotate-0
[19:47:32] [PASSED] rotate-90
[19:47:32] [PASSED] rotate-180
[19:47:32] [PASSED] rotate-270
[19:47:32] ============ [PASSED] drm_test_rect_rotate_inv =============
[19:47:32] ==================== [PASSED] drm_rect =====================
[19:47:32] ============ drm_sysfb_modeset_test (1 subtest) ============
[19:47:32] ============ drm_test_sysfb_build_fourcc_list  =============
[19:47:32] [PASSED] no native formats
[19:47:32] [PASSED] XRGB8888 as native format
[19:47:32] [PASSED] remove duplicates
[19:47:32] [PASSED] convert alpha formats
[19:47:32] [PASSED] random formats
[19:47:32] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[19:47:32] ============= [PASSED] drm_sysfb_modeset_test ==============
[19:47:32] ============================================================
[19:47:32] Testing complete. Ran 616 tests: passed: 616
[19:47:32] Elapsed time: 24.750s total, 1.707s configuring, 22.826s building, 0.188s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[19:47:32] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[19:47:34] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[19:47:42] Starting KUnit Kernel (1/1)...
[19:47:42] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[19:47:42] ================= ttm_device (5 subtests) ==================
[19:47:42] [PASSED] ttm_device_init_basic
[19:47:42] [PASSED] ttm_device_init_multiple
[19:47:42] [PASSED] ttm_device_fini_basic
[19:47:42] [PASSED] ttm_device_init_no_vma_man
[19:47:42] ================== ttm_device_init_pools  ==================
[19:47:42] [PASSED] No DMA allocations, no DMA32 required
[19:47:42] [PASSED] DMA allocations, DMA32 required
[19:47:42] [PASSED] No DMA allocations, DMA32 required
[19:47:42] [PASSED] DMA allocations, no DMA32 required
[19:47:42] ============== [PASSED] ttm_device_init_pools ==============
[19:47:42] =================== [PASSED] ttm_device ====================
[19:47:42] ================== ttm_pool (8 subtests) ===================
[19:47:42] ================== ttm_pool_alloc_basic  ===================
[19:47:42] [PASSED] One page
[19:47:42] [PASSED] More than one page
[19:47:42] [PASSED] Above the allocation limit
[19:47:42] [PASSED] One page, with coherent DMA mappings enabled
[19:47:42] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[19:47:42] ============== [PASSED] ttm_pool_alloc_basic ===============
[19:47:42] ============== ttm_pool_alloc_basic_dma_addr  ==============
[19:47:42] [PASSED] One page
[19:47:42] [PASSED] More than one page
[19:47:42] [PASSED] Above the allocation limit
[19:47:42] [PASSED] One page, with coherent DMA mappings enabled
[19:47:42] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[19:47:42] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[19:47:42] [PASSED] ttm_pool_alloc_order_caching_match
[19:47:42] [PASSED] ttm_pool_alloc_caching_mismatch
[19:47:42] [PASSED] ttm_pool_alloc_order_mismatch
[19:47:42] [PASSED] ttm_pool_free_dma_alloc
[19:47:42] [PASSED] ttm_pool_free_no_dma_alloc
[19:47:42] [PASSED] ttm_pool_fini_basic
[19:47:42] ==================== [PASSED] ttm_pool =====================
[19:47:42] ================ ttm_resource (8 subtests) =================
[19:47:42] ================= ttm_resource_init_basic  =================
[19:47:42] [PASSED] Init resource in TTM_PL_SYSTEM
[19:47:42] [PASSED] Init resource in TTM_PL_VRAM
[19:47:42] [PASSED] Init resource in a private placement
[19:47:42] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[19:47:42] ============= [PASSED] ttm_resource_init_basic =============
[19:47:42] [PASSED] ttm_resource_init_pinned
[19:47:42] [PASSED] ttm_resource_fini_basic
[19:47:42] [PASSED] ttm_resource_manager_init_basic
[19:47:42] [PASSED] ttm_resource_manager_usage_basic
[19:47:42] [PASSED] ttm_resource_manager_set_used_basic
[19:47:42] [PASSED] ttm_sys_man_alloc_basic
[19:47:42] [PASSED] ttm_sys_man_free_basic
[19:47:42] ================== [PASSED] ttm_resource ===================
[19:47:42] =================== ttm_tt (15 subtests) ===================
[19:47:42] ==================== ttm_tt_init_basic  ====================
[19:47:42] [PASSED] Page-aligned size
[19:47:42] [PASSED] Extra pages requested
[19:47:42] ================ [PASSED] ttm_tt_init_basic ================
[19:47:42] [PASSED] ttm_tt_init_misaligned
[19:47:42] [PASSED] ttm_tt_fini_basic
[19:47:42] [PASSED] ttm_tt_fini_sg
[19:47:42] [PASSED] ttm_tt_fini_shmem
[19:47:42] [PASSED] ttm_tt_create_basic
[19:47:42] [PASSED] ttm_tt_create_invalid_bo_type
[19:47:42] [PASSED] ttm_tt_create_ttm_exists
[19:47:42] [PASSED] ttm_tt_create_failed
[19:47:42] [PASSED] ttm_tt_destroy_basic
[19:47:42] [PASSED] ttm_tt_populate_null_ttm
[19:47:42] [PASSED] ttm_tt_populate_populated_ttm
[19:47:42] [PASSED] ttm_tt_unpopulate_basic
[19:47:42] [PASSED] ttm_tt_unpopulate_empty_ttm
[19:47:42] [PASSED] ttm_tt_swapin_basic
[19:47:42] ===================== [PASSED] ttm_tt ======================
[19:47:42] =================== ttm_bo (14 subtests) ===================
[19:47:42] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[19:47:42] [PASSED] Cannot be interrupted and sleeps
[19:47:42] [PASSED] Cannot be interrupted, locks straight away
[19:47:42] [PASSED] Can be interrupted, sleeps
[19:47:42] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[19:47:42] [PASSED] ttm_bo_reserve_locked_no_sleep
[19:47:42] [PASSED] ttm_bo_reserve_no_wait_ticket
[19:47:42] [PASSED] ttm_bo_reserve_double_resv
[19:47:42] [PASSED] ttm_bo_reserve_interrupted
[19:47:42] [PASSED] ttm_bo_reserve_deadlock
[19:47:42] [PASSED] ttm_bo_unreserve_basic
[19:47:42] [PASSED] ttm_bo_unreserve_pinned
[19:47:42] [PASSED] ttm_bo_unreserve_bulk
[19:47:42] [PASSED] ttm_bo_put_basic
[19:47:42] [PASSED] ttm_bo_put_shared_resv
[19:47:42] [PASSED] ttm_bo_pin_basic
[19:47:42] [PASSED] ttm_bo_pin_unpin_resource
[19:47:42] [PASSED] ttm_bo_multiple_pin_one_unpin
[19:47:42] ===================== [PASSED] ttm_bo ======================
[19:47:42] ============== ttm_bo_validate (21 subtests) ===============
[19:47:42] ============== ttm_bo_init_reserved_sys_man  ===============
[19:47:42] [PASSED] Buffer object for userspace
[19:47:42] [PASSED] Kernel buffer object
[19:47:42] [PASSED] Shared buffer object
[19:47:42] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[19:47:42] ============== ttm_bo_init_reserved_mock_man  ==============
[19:47:42] [PASSED] Buffer object for userspace
[19:47:42] [PASSED] Kernel buffer object
[19:47:42] [PASSED] Shared buffer object
[19:47:42] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[19:47:42] [PASSED] ttm_bo_init_reserved_resv
[19:47:42] ================== ttm_bo_validate_basic  ==================
[19:47:42] [PASSED] Buffer object for userspace
[19:47:42] [PASSED] Kernel buffer object
[19:47:42] [PASSED] Shared buffer object
[19:47:42] ============== [PASSED] ttm_bo_validate_basic ==============
[19:47:42] [PASSED] ttm_bo_validate_invalid_placement
[19:47:42] ============= ttm_bo_validate_same_placement  ==============
[19:47:42] [PASSED] System manager
[19:47:42] [PASSED] VRAM manager
[19:47:42] ========= [PASSED] ttm_bo_validate_same_placement ==========
[19:47:42] [PASSED] ttm_bo_validate_failed_alloc
[19:47:42] [PASSED] ttm_bo_validate_pinned
[19:47:42] [PASSED] ttm_bo_validate_busy_placement
[19:47:42] ================ ttm_bo_validate_multihop  =================
[19:47:42] [PASSED] Buffer object for userspace
[19:47:42] [PASSED] Kernel buffer object
[19:47:42] [PASSED] Shared buffer object
[19:47:42] ============ [PASSED] ttm_bo_validate_multihop =============
[19:47:42] ========== ttm_bo_validate_no_placement_signaled  ==========
[19:47:42] [PASSED] Buffer object in system domain, no page vector
[19:47:42] [PASSED] Buffer object in system domain with an existing page vector
[19:47:42] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[19:47:42] ======== ttm_bo_validate_no_placement_not_signaled  ========
[19:47:42] [PASSED] Buffer object for userspace
[19:47:42] [PASSED] Kernel buffer object
[19:47:42] [PASSED] Shared buffer object
[19:47:42] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[19:47:42] [PASSED] ttm_bo_validate_move_fence_signaled
[19:47:42] ========= ttm_bo_validate_move_fence_not_signaled  =========
[19:47:42] [PASSED] Waits for GPU
[19:47:42] [PASSED] Tries to lock straight away
[19:47:42] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[19:47:42] [PASSED] ttm_bo_validate_happy_evict
[19:47:42] [PASSED] ttm_bo_validate_all_pinned_evict
[19:47:42] [PASSED] ttm_bo_validate_allowed_only_evict
[19:47:42] [PASSED] ttm_bo_validate_deleted_evict
[19:47:42] [PASSED] ttm_bo_validate_busy_domain_evict
[19:47:42] [PASSED] ttm_bo_validate_evict_gutting
[19:47:42] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[19:47:42] ================= [PASSED] ttm_bo_validate =================
[19:47:42] ============================================================
[19:47:42] Testing complete. Ran 101 tests: passed: 101
[19:47:42] Elapsed time: 9.953s total, 1.739s configuring, 7.997s building, 0.178s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for drm/xe: Add user commands to WA BB via configfs

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 1937 bytes --]

== Series Details ==

Series: drm/xe: Add user commands to WA BB via configfs
URL   : https://patchwork.freedesktop.org/series/154119/
State : success

== Summary ==

CI Bug Log - changes from xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b_BAT -> xe-pw-154119v1_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (11 -> 11)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-154119v1_BAT that come from known issues:

### IGT changes ###

#### Possible fixes ####

  * igt@xe_vm@bind-execqueues-independent:
    - {bat-ptl-vm}:       [FAIL][1] ([Intel XE#5783]) -> [PASS][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/bat-ptl-vm/igt@xe_vm@bind-execqueues-independent.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/bat-ptl-vm/igt@xe_vm@bind-execqueues-independent.html
    - {bat-ptl-2}:        [FAIL][3] ([Intel XE#5783]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/bat-ptl-2/igt@xe_vm@bind-execqueues-independent.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/bat-ptl-2/igt@xe_vm@bind-execqueues-independent.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#5783]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5783


Build changes
-------------

  * Linux: xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b -> xe-pw-154119v1

  IGT_8524: 8524
  xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b: 78cc74214b6f200319b53d36c4c0ce6974af8d5b
  xe-pw-154119v1: 154119v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/index.html

[-- Attachment #2: Type: text/html, Size: 2589 bytes --]

Re: [PATCH v3 6/6] drm/xe/configfs: Add post context restore bb

[Matt Roper]

On Fri, Sep 05, 2025 at 10:50:34PM -0700, Lucas De Marchi wrote:
> Allow the user to specify commands to execute during a context restore.
> Currently it's possible to parse 2 types of actions:
> 
> 	- cmd: the instructions are added as is to the bb
> 	- reg: just use the address and value, without worrying about
> 	  encoding the right LRI instruction. This is possibly the most
> 	  useful use case, so added a dedicated action for that.
> 
> This also prepares for future BBs: mid context restore and rc6 context
> restore that can re-use the same parsing functions.
> 
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
> v2:
> - use bin attribute to be allow multiline
> v3:
> - revert attribute back to a simple attribute rather than binary:
>   otherwise configfs only calls the callback on the file release and
>   ignores the result. With that the user can't rely on the return
>   code to know if the setting was accepted.
> 
>   To still allow multiline, a method that uses just one syscall should
>   be used. In bash, echo will end up using more syscalls. This can be
>   workarounded by using heredoc, or simply writing it in C
>   (rewrote that listening to
>    https://www.youtube.com/watch?v=1S1fISh-pag, you're welcome to review
>    listening to that beauty too)
> ---
>  drivers/gpu/drm/xe/xe_configfs.c | 278 ++++++++++++++++++++++++++++++++++++++-
>  1 file changed, 276 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
> index 21fd153666db8..f5fa0d14af38b 100644
> --- a/drivers/gpu/drm/xe/xe_configfs.c
> +++ b/drivers/gpu/drm/xe/xe_configfs.c
> @@ -4,6 +4,7 @@
>   */
>  
>  #include <linux/bitops.h>
> +#include <linux/ctype.h>
>  #include <linux/configfs.h>
>  #include <linux/cleanup.h>
>  #include <linux/find.h>
> @@ -12,6 +13,7 @@
>  #include <linux/pci.h>
>  #include <linux/string.h>
>  
> +#include "instructions/xe_mi_commands.h"
>  #include "xe_configfs.h"
>  #include "xe_hw_engine_types.h"
>  #include "xe_module.h"
> @@ -115,6 +117,35 @@
>   *
>   * This attribute can only be set before binding to the device.
>   *
> + * Context restore BB
> + * ------------------
> + *
> + * Allow to execute a batch buffer during any context switches. When the
> + * GPU is restoring the context, it executes additional commands. It's useful
> + * for testing additional workarounds and validating certain HW behaviors.
> + *
> + * Currently this is implemented only for post context restore. Examples:
> + *
> + * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10::
> + *
> + *	# echo 'rcs cmd 11000001 4F100 DEADBEEF' \
> + *		> /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb
> + *
> + * #. Load certain values in a couple of registers (it can be used as a simpler
> + *    alternative to the `cmd`) action::
> + *
> + *	# cat > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb <<EOF
> + *	rcs reg 4F100 DEADBEEF
> + *	rcs reg 4F104 FFFFFFFF
> + *	EOF
> + *
> + *    .. note::
> + *
> + *       When using multiple lines, make sure to use a command that is
> + *       implemented with a single write syscall, like HEREDOC.
> + *
> + * This attribute can only be set before binding to the device.
> + *
>   * Remove devices
>   * ==============
>   *
> @@ -123,11 +154,18 @@
>   *	# rmdir /sys/kernel/config/xe/0000:03:00.0/
>   */
>  
> +/* Similar to struct xe_bb, but not tied to HW (yet) */
> +struct wa_bb {
> +	u32 *cs;
> +	u32 len; /* in dwords */
> +};
> +
>  struct xe_config_group_device {
>  	struct config_group group;
>  
>  	struct xe_config_device {
>  		u64 engines_allowed;
> +		struct wa_bb ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
>  		bool survivability_mode;
>  		bool enable_psmi;
>  	} config;
> @@ -371,6 +409,227 @@ static ssize_t enable_psmi_store(struct config_item *item, const char *page, siz
>  	return len;
>  }
>  
> +static bool wa_bb_read_advance(bool dereference, char **p,
> +			       const char *append, size_t len,
> +			       size_t *max_size)
> +{
> +	if (dereference) {
> +		if (len >= *max_size)
> +			return false;
> +		*max_size -= len;
> +		if (append)
> +			memcpy(*p, append, len);
> +	}
> +
> +	*p += len;
> +
> +	return true;
> +}
> +
> +static ssize_t wa_bb_show(struct xe_config_group_device *dev,
> +			  struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX],
> +			  char *data, size_t sz)
> +{
> +	char *p = data;
> +
> +	guard(mutex)(&dev->lock);
> +
> +	for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
> +		enum xe_engine_class ec = engine_info[i].engine_class;
> +		size_t len;
> +
> +		if (!wa_bb[ec].len)
> +			continue;
> +
> +		len = snprintf(p, sz, "%s:", engine_info[i].cls);
> +		if (!wa_bb_read_advance(data, &p, NULL, len, &sz))
> +			return -ENOBUFS;
> +
> +		for (size_t j = 0; j < wa_bb[ec].len; j++) {
> +			len = snprintf(p, sz, " %08x", wa_bb[ec].cs[j]);
> +			if (!wa_bb_read_advance(data, &p, NULL, len, &sz))
> +				return -ENOBUFS;
> +		}
> +
> +		if (!wa_bb_read_advance(data, &p, "\n", 1, &sz))
> +			return -ENOBUFS;
> +	}
> +
> +	if (!wa_bb_read_advance(data, &p, "", 1, &sz))
> +		return -ENOBUFS;
> +
> +	/* Reserve one more to match check for '\0' */
> +	if (!data)
> +		p++;
> +
> +	return p - data;
> +}
> +
> +static ssize_t ctx_restore_post_bb_show(struct config_item *item, char *page)
> +{
> +	struct xe_config_group_device *dev = to_xe_config_group_device(item);
> +
> +	return wa_bb_show(dev, dev->config.ctx_restore_post_bb, page, SZ_4K);
> +}
> +
> +static void wa_bb_append(struct wa_bb *wa_bb, u32 val)
> +{
> +	if (wa_bb->cs)
> +		wa_bb->cs[wa_bb->len] = val;
> +
> +	wa_bb->len++;
> +}
> +
> +static ssize_t parse_hex(const char *line, u32 *pval)
> +{
> +	char numstr[12];
> +	const char *p;
> +	ssize_t numlen;
> +
> +	p = line + strspn(line, " \t");
> +	if (!*p || *p == '\n')
> +		return 0;
> +
> +	numlen = strcspn(p, " \t\n");
> +	if (!numlen || numlen >= sizeof(numstr) - 1)
> +		return -EINVAL;
> +
> +	memcpy(numstr, p, numlen);
> +	numstr[numlen] = '\0';
> +	p += numlen;
> +
> +	if (kstrtou32(numstr, 16, pval))
> +		return -EINVAL;
> +
> +	return p - line;
> +}
> +
> +/*
> + * Parse lines with the format
> + *
> + *	<engine-class> cmd <u32> <u32...>
> + *	<engine-class> reg <u32_addr> <u32_val>
> + *
> + * and optionally save them in @wa_bb[i].cs is non-NULL.
> + *
> + * Return the number of dwords parsed.
> + */
> +static ssize_t parse_wa_bb_lines(const char *lines,
> +				 struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX])
> +{
> +	ssize_t dwords = 0, ret;
> +	const char *p;
> +
> +	for (p = lines; *p; p++) {
> +		const struct engine_info *info = NULL;
> +		u32 val, val2;
> +
> +		/* Also allow empty lines */
> +		p += strspn(p, " \t\n");
> +		if (!*p)
> +			break;
> +
> +		ret = parse_engine(p, " \t\n", NULL, &info);
> +		if (ret < 0)
> +			return ret;

Should we be validating that the engine class is always 'rcs' here?
BB_PER_CTX_PTR is not supported on BCS, VCS, VECS, or CCS according to
bspec 60265.  Or do we just let the user shoot themselves in the foot if
they want to (since there are already plenty of other ways for them to
do that by mishandling the batchbuffer they specify here)?

Speaking of which, should we be adding some kind of taint if this gets
used?  Based on our prior experience with things like module parameters,
I'm worried that people will post advice on websites like "if you run
these strange commands while loading the driver it can make Game X run
faster!"  Then we wind up with a bunch of end users blindly inserting
unknown behavior on context switch, which can lead to instability and/or
insecurity.  And then we (or the mesa guys) get a bunch of
unreproducible bug reports because the GPU state is getting messed up on
context switch behind the drivers' backs...


Matt

> +
> +		p += ret;
> +		p += strspn(p, " \t");
> +
> +		if (str_has_prefix(p, "cmd")) {
> +			for (p += strlen("cmd"); *p;) {
> +				ret = parse_hex(p, &val);
> +				if (ret < 0)
> +					return -EINVAL;
> +				if (!ret)
> +					break;
> +
> +				p += ret;
> +				dwords++;
> +				wa_bb_append(&wa_bb[info->engine_class], val);
> +			}
> +		} else if (str_has_prefix(p, "reg")) {
> +			p += strlen("reg");
> +			ret = parse_hex(p, &val);
> +			if (ret <= 0)
> +				return -EINVAL;
> +
> +			p += ret;
> +			ret = parse_hex(p, &val2);
> +			if (ret <= 0)
> +				return -EINVAL;
> +
> +			p += ret;
> +			dwords += 3;
> +			wa_bb_append(&wa_bb[info->engine_class],
> +				     MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1));
> +			wa_bb_append(&wa_bb[info->engine_class], val);
> +			wa_bb_append(&wa_bb[info->engine_class], val2);
> +		} else {
> +			return -EINVAL;
> +		}
> +	}
> +
> +	return dwords;
> +}
> +
> +static ssize_t wa_bb_store(struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX],
> +			   struct xe_config_group_device *dev,
> +			   const char *page, size_t len)
> +{
> +	/* tmp_wa_bb must match wa_bb's size */
> +	struct wa_bb tmp_wa_bb[XE_ENGINE_CLASS_MAX] = { };
> +	ssize_t count, class;
> +	u32 *tmp;
> +
> +	/* 1. Count dwords - wa_bb[i].cs is NULL for all classes */
> +	count = parse_wa_bb_lines(page, tmp_wa_bb);
> +	if (count < 0)
> +		return count;
> +
> +	guard(mutex)(&dev->lock);
> +
> +	if (is_bound(dev))
> +		return -EBUSY;
> +
> +	/*
> +	 * 2. Allocate a u32 array and set the pointers to the right positions
> +	 * according to the length of each class' wa_bb
> +	 */
> +	tmp = krealloc(wa_bb[0].cs, count * sizeof(u32), GFP_KERNEL);
> +	if (!tmp)
> +		return -ENOMEM;
> +
> +	if (!count) {
> +		memset(wa_bb, 0, sizeof(tmp_wa_bb));
> +		return len;
> +	}
> +
> +	for (class = 0, count = 0; class < XE_ENGINE_CLASS_MAX; ++class) {
> +		tmp_wa_bb[class].cs = tmp + count;
> +		count += tmp_wa_bb[class].len;
> +		tmp_wa_bb[class].len = 0;
> +	}
> +
> +	/* 3. Parse wa_bb lines again, this time saving the values */
> +	count = parse_wa_bb_lines(page, tmp_wa_bb);
> +	if (count < 0)
> +		return count;
> +
> +	memcpy(wa_bb, tmp_wa_bb, sizeof(tmp_wa_bb));
> +
> +	return len;
> +}
> +
> +static ssize_t ctx_restore_post_bb_store(struct config_item *item,
> +					 const char *data, size_t sz)
> +{
> +	struct xe_config_group_device *dev = to_xe_config_group_device(item);
> +
> +	return wa_bb_store(dev->config.ctx_restore_post_bb, dev, data, sz);
> +}
> +
> +CONFIGFS_ATTR(, ctx_restore_post_bb);
>  CONFIGFS_ATTR(, enable_psmi);
>  CONFIGFS_ATTR(, engines_allowed);
>  CONFIGFS_ATTR(, survivability_mode);
> @@ -379,6 +638,7 @@ static struct configfs_attribute *xe_config_device_attrs[] = {
>  	&attr_enable_psmi,
>  	&attr_engines_allowed,
>  	&attr_survivability_mode,
> +	&attr_ctx_restore_post_bb,
>  	NULL,
>  };
>  
> @@ -387,6 +647,8 @@ static void xe_config_device_release(struct config_item *item)
>  	struct xe_config_group_device *dev = to_xe_config_group_device(item);
>  
>  	mutex_destroy(&dev->lock);
> +
> +	kfree(dev->config.ctx_restore_post_bb[0].cs);
>  	kfree(dev);
>  }
>  
> @@ -636,14 +898,26 @@ bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev)
>  /**
>   * xe_configfs_get_ctx_restore_post_bb - get configfs ctx_restore_post_bb setting
>   * @pdev: pci device
> + * @class: hw engine class
> + * @cs: pointer to the bb to use - only valid during probe
>   *
> - * Return: post_ctx_restore setting in configfs
> + * Return: Number of dwords used in the post_ctx_restore setting in configfs
>   */
>  u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
>  					enum xe_engine_class class,
>  					const u32 **cs)
>  {
> -	return 0;
> +	struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
> +	u32 len;
> +
> +	if (!dev)
> +		return 0;
> +
> +	*cs = dev->config.ctx_restore_post_bb[class].cs;
> +	len = dev->config.ctx_restore_post_bb[class].len;
> +	config_group_put(&dev->group);
> +
> +	return len;
>  }
>  
>  int __init xe_configfs_init(void)
> 
> -- 
> 2.50.1
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

✗ Xe.CI.Full: failure for drm/xe: Add user commands to WA BB via configfs

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 60899 bytes --]

== Series Details ==

Series: drm/xe: Add user commands to WA BB via configfs
URL   : https://patchwork.freedesktop.org/series/154119/
State : failure

== Summary ==

CI Bug Log - changes from xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b_FULL -> xe-pw-154119v1_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-154119v1_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-154119v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (4 -> 4)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-154119v1_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_frontbuffer_tracking@fbc-indfb-scaledprimary:
    - shard-lnl:          NOTRUN -> [FAIL][1]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-2/igt@kms_frontbuffer_tracking@fbc-indfb-scaledprimary.html

  
Known issues
------------

  Here are the changes found in xe-pw-154119v1_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_big_fb@x-tiled-32bpp-rotate-90:
    - shard-dg2-set2:     NOTRUN -> [SKIP][2] ([Intel XE#316])
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-434/igt@kms_big_fb@x-tiled-32bpp-rotate-90.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
    - shard-adlp:         [PASS][3] -> [DMESG-FAIL][4] ([Intel XE#4543])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-adlp-2/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-adlp-8/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html

  * igt@kms_big_fb@y-tiled-32bpp-rotate-270:
    - shard-bmg:          NOTRUN -> [SKIP][5] ([Intel XE#1124])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-1/igt@kms_big_fb@y-tiled-32bpp-rotate-270.html

  * igt@kms_big_fb@yf-tiled-16bpp-rotate-270:
    - shard-lnl:          NOTRUN -> [SKIP][6] ([Intel XE#1124])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-2/igt@kms_big_fb@yf-tiled-16bpp-rotate-270.html

  * igt@kms_big_fb@yf-tiled-8bpp-rotate-0:
    - shard-dg2-set2:     NOTRUN -> [SKIP][7] ([Intel XE#1124])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-434/igt@kms_big_fb@yf-tiled-8bpp-rotate-0.html

  * igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p:
    - shard-bmg:          [PASS][8] -> [SKIP][9] ([Intel XE#2314] / [Intel XE#2894])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-1/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html

  * igt@kms_bw@linear-tiling-1-displays-2560x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#367]) +1 other test skip
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-3/igt@kms_bw@linear-tiling-1-displays-2560x1440p.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][11] ([Intel XE#367])
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-463/igt@kms_bw@linear-tiling-1-displays-2560x1440p.html

  * igt@kms_bw@linear-tiling-2-displays-3840x2160p:
    - shard-lnl:          NOTRUN -> [SKIP][12] ([Intel XE#367])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-2/igt@kms_bw@linear-tiling-2-displays-3840x2160p.html

  * igt@kms_ccs@bad-aux-stride-y-tiled-gen12-mc-ccs@pipe-c-hdmi-a-6:
    - shard-dg2-set2:     NOTRUN -> [SKIP][13] ([Intel XE#787]) +118 other tests skip
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-436/igt@kms_ccs@bad-aux-stride-y-tiled-gen12-mc-ccs@pipe-c-hdmi-a-6.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-dg2-mc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][14] ([Intel XE#2887]) +1 other test skip
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-3/igt@kms_ccs@crc-primary-basic-4-tiled-dg2-mc-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#3432])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-3/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs:
    - shard-dg2-set2:     NOTRUN -> [SKIP][16] ([Intel XE#2907])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-434/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs@pipe-a-hdmi-a-3:
    - shard-bmg:          [PASS][17] -> [FAIL][18] ([Intel XE#5376])
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-1/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs@pipe-a-hdmi-a-3.html
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-6/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs@pipe-a-hdmi-a-3.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-d-hdmi-a-6:
    - shard-dg2-set2:     NOTRUN -> [INCOMPLETE][19] ([Intel XE#2705] / [Intel XE#4212] / [Intel XE#4522])
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-d-hdmi-a-6.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
    - shard-dg2-set2:     [PASS][20] -> [INCOMPLETE][21] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124] / [Intel XE#4345])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-dg2-432/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-c-dp-4:
    - shard-dg2-set2:     [PASS][22] -> [INCOMPLETE][23] ([Intel XE#3124] / [Intel XE#6014])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-c-dp-4.html
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-c-dp-4.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-6:
    - shard-dg2-set2:     [PASS][24] -> [DMESG-WARN][25] ([Intel XE#1727] / [Intel XE#3113])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-6.html
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-6.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-dp-4:
    - shard-dg2-set2:     NOTRUN -> [INCOMPLETE][26] ([Intel XE#3124])
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-dp-4.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-6:
    - shard-dg2-set2:     NOTRUN -> [DMESG-WARN][27] ([Intel XE#1727] / [Intel XE#3113])
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-6.html

  * igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-c-dp-2:
    - shard-bmg:          NOTRUN -> [SKIP][28] ([Intel XE#2652] / [Intel XE#787]) +7 other tests skip
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-7/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-c-dp-2.html

  * igt@kms_ccs@random-ccs-data-4-tiled-mtl-mc-ccs:
    - shard-dg2-set2:     NOTRUN -> [SKIP][29] ([Intel XE#455] / [Intel XE#787]) +18 other tests skip
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-mtl-mc-ccs.html

  * igt@kms_cdclk@plane-scaling@pipe-b-dp-4:
    - shard-dg2-set2:     NOTRUN -> [SKIP][30] ([Intel XE#4416]) +3 other tests skip
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-434/igt@kms_cdclk@plane-scaling@pipe-b-dp-4.html

  * igt@kms_chamelium_edid@hdmi-edid-change-during-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#2252]) +3 other tests skip
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-3/igt@kms_chamelium_edid@hdmi-edid-change-during-suspend.html

  * igt@kms_chamelium_edid@hdmi-mode-timings:
    - shard-dg2-set2:     NOTRUN -> [SKIP][32] ([Intel XE#373]) +3 other tests skip
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-434/igt@kms_chamelium_edid@hdmi-mode-timings.html

  * igt@kms_chamelium_frames@hdmi-aspect-ratio:
    - shard-lnl:          NOTRUN -> [SKIP][33] ([Intel XE#373]) +1 other test skip
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-2/igt@kms_chamelium_frames@hdmi-aspect-ratio.html

  * igt@kms_content_protection@atomic@pipe-a-dp-2:
    - shard-dg2-set2:     NOTRUN -> [FAIL][34] ([Intel XE#1178])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-432/igt@kms_content_protection@atomic@pipe-a-dp-2.html

  * igt@kms_content_protection@dp-mst-type-0:
    - shard-dg2-set2:     NOTRUN -> [SKIP][35] ([Intel XE#307])
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-434/igt@kms_content_protection@dp-mst-type-0.html

  * igt@kms_content_protection@uevent@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][36] ([Intel XE#1188])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-3/igt@kms_content_protection@uevent@pipe-a-dp-2.html

  * igt@kms_cursor_crc@cursor-offscreen-512x170:
    - shard-dg2-set2:     NOTRUN -> [SKIP][37] ([Intel XE#308]) +1 other test skip
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-463/igt@kms_cursor_crc@cursor-offscreen-512x170.html

  * igt@kms_cursor_crc@cursor-onscreen-32x10:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#2320]) +1 other test skip
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-1/igt@kms_cursor_crc@cursor-onscreen-32x10.html

  * igt@kms_cursor_crc@cursor-random-512x512:
    - shard-bmg:          NOTRUN -> [SKIP][39] ([Intel XE#2321]) +1 other test skip
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-3/igt@kms_cursor_crc@cursor-random-512x512.html

  * igt@kms_cursor_crc@cursor-rapid-movement-128x42:
    - shard-lnl:          NOTRUN -> [SKIP][40] ([Intel XE#1424])
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-2/igt@kms_cursor_crc@cursor-rapid-movement-128x42.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
    - shard-bmg:          [PASS][41] -> [SKIP][42] ([Intel XE#2291]) +3 other tests skip
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-4/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic:
    - shard-bmg:          NOTRUN -> [FAIL][43] ([Intel XE#1475])
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-3/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
    - shard-bmg:          NOTRUN -> [SKIP][44] ([Intel XE#2286])
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-1/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html

  * igt@kms_dp_link_training@non-uhbr-mst:
    - shard-bmg:          NOTRUN -> [SKIP][45] ([Intel XE#4354])
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-1/igt@kms_dp_link_training@non-uhbr-mst.html

  * igt@kms_dp_link_training@non-uhbr-sst:
    - shard-lnl:          NOTRUN -> [SKIP][46] ([Intel XE#4354])
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-2/igt@kms_dp_link_training@non-uhbr-sst.html

  * igt@kms_dp_linktrain_fallback@dp-fallback:
    - shard-bmg:          [PASS][47] -> [SKIP][48] ([Intel XE#4294])
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-1/igt@kms_dp_linktrain_fallback@dp-fallback.html
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-6/igt@kms_dp_linktrain_fallback@dp-fallback.html

  * igt@kms_dsc@dsc-with-bpc-formats:
    - shard-dg2-set2:     NOTRUN -> [SKIP][49] ([Intel XE#455]) +4 other tests skip
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-463/igt@kms_dsc@dsc-with-bpc-formats.html
    - shard-bmg:          NOTRUN -> [SKIP][50] ([Intel XE#2244])
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-3/igt@kms_dsc@dsc-with-bpc-formats.html

  * igt@kms_feature_discovery@display-3x:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#2373])
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-1/igt@kms_feature_discovery@display-3x.html

  * igt@kms_flip@2x-flip-vs-dpms-on-nop:
    - shard-bmg:          [PASS][52] -> [SKIP][53] ([Intel XE#2316]) +9 other tests skip
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-5/igt@kms_flip@2x-flip-vs-dpms-on-nop.html
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-6/igt@kms_flip@2x-flip-vs-dpms-on-nop.html

  * igt@kms_flip@2x-flip-vs-suspend@cd-hdmi-a6-dp4:
    - shard-dg2-set2:     [PASS][54] -> [INCOMPLETE][55] ([Intel XE#2049] / [Intel XE#2597]) +3 other tests incomplete
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-dg2-436/igt@kms_flip@2x-flip-vs-suspend@cd-hdmi-a6-dp4.html
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-433/igt@kms_flip@2x-flip-vs-suspend@cd-hdmi-a6-dp4.html

  * igt@kms_flip@blocking-wf_vblank@d-dp2:
    - shard-bmg:          [PASS][56] -> [FAIL][57] ([Intel XE#5338]) +1 other test fail
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-5/igt@kms_flip@blocking-wf_vblank@d-dp2.html
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-4/igt@kms_flip@blocking-wf_vblank@d-dp2.html

  * igt@kms_flip@dpms-off-confusion-interruptible@b-hdmi-a1:
    - shard-adlp:         [PASS][58] -> [DMESG-WARN][59] ([Intel XE#4543]) +1 other test dmesg-warn
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-adlp-1/igt@kms_flip@dpms-off-confusion-interruptible@b-hdmi-a1.html
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-adlp-8/igt@kms_flip@dpms-off-confusion-interruptible@b-hdmi-a1.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling:
    - shard-bmg:          NOTRUN -> [SKIP][60] ([Intel XE#2293] / [Intel XE#2380]) +1 other test skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-1/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling@pipe-a-valid-mode:
    - shard-bmg:          NOTRUN -> [SKIP][61] ([Intel XE#2293]) +1 other test skip
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-1/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling@pipe-a-valid-mode.html

  * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-indfb-msflip-blt:
    - shard-lnl:          NOTRUN -> [SKIP][62] ([Intel XE#651]) +1 other test skip
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-2/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-indfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][63] ([Intel XE#5390]) +3 other tests skip
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-pri-shrfb-draw-render:
    - shard-lnl:          NOTRUN -> [SKIP][64] ([Intel XE#656]) +3 other tests skip
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-2/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-pri-shrfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-shrfb-plflip-blt:
    - shard-dg2-set2:     NOTRUN -> [SKIP][65] ([Intel XE#651]) +10 other tests skip
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-463/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-shrfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][66] ([Intel XE#2311]) +11 other tests skip
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcdrrs-suspend.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][67] ([Intel XE#2313]) +10 other tests skip
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-mmap-wc:
    - shard-dg2-set2:     NOTRUN -> [SKIP][68] ([Intel XE#653]) +12 other tests skip
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-434/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_hdr@invalid-hdr:
    - shard-dg2-set2:     [PASS][69] -> [SKIP][70] ([Intel XE#455])
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-dg2-463/igt@kms_hdr@invalid-hdr.html
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-433/igt@kms_hdr@invalid-hdr.html
    - shard-bmg:          [PASS][71] -> [SKIP][72] ([Intel XE#1503])
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-4/igt@kms_hdr@invalid-hdr.html
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-1/igt@kms_hdr@invalid-hdr.html

  * igt@kms_joiner@invalid-modeset-big-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][73] ([Intel XE#346])
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-3/igt@kms_joiner@invalid-modeset-big-joiner.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][74] ([Intel XE#346])
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-463/igt@kms_joiner@invalid-modeset-big-joiner.html

  * igt@kms_joiner@invalid-modeset-ultra-joiner:
    - shard-lnl:          NOTRUN -> [SKIP][75] ([Intel XE#2927])
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-2/igt@kms_joiner@invalid-modeset-ultra-joiner.html

  * igt@kms_lease@lease-uevent:
    - shard-adlp:         [PASS][76] -> [DMESG-WARN][77] ([Intel XE#2953] / [Intel XE#4173]) +6 other tests dmesg-warn
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-adlp-2/igt@kms_lease@lease-uevent.html
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-adlp-8/igt@kms_lease@lease-uevent.html

  * igt@kms_plane_lowres@tiling-4:
    - shard-lnl:          NOTRUN -> [SKIP][78] ([Intel XE#599]) +3 other tests skip
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-2/igt@kms_plane_lowres@tiling-4.html

  * igt@kms_plane_multiple@2x-tiling-yf:
    - shard-bmg:          NOTRUN -> [SKIP][79] ([Intel XE#5021])
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-1/igt@kms_plane_multiple@2x-tiling-yf.html

  * igt@kms_pm_dc@dc3co-vpb-simulation:
    - shard-dg2-set2:     NOTRUN -> [SKIP][80] ([Intel XE#1122])
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-434/igt@kms_pm_dc@dc3co-vpb-simulation.html

  * igt@kms_pm_dc@dc6-psr:
    - shard-bmg:          NOTRUN -> [SKIP][81] ([Intel XE#2392])
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-1/igt@kms_pm_dc@dc6-psr.html

  * igt@kms_pm_dc@deep-pkgc:
    - shard-bmg:          NOTRUN -> [SKIP][82] ([Intel XE#2505])
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-3/igt@kms_pm_dc@deep-pkgc.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][83] ([Intel XE#908])
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-463/igt@kms_pm_dc@deep-pkgc.html

  * igt@kms_psr2_sf@pr-cursor-plane-update-sf:
    - shard-lnl:          NOTRUN -> [SKIP][84] ([Intel XE#1406] / [Intel XE#2893])
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-2/igt@kms_psr2_sf@pr-cursor-plane-update-sf.html

  * igt@kms_psr2_sf@pr-plane-move-sf-dmg-area:
    - shard-dg2-set2:     NOTRUN -> [SKIP][85] ([Intel XE#1406] / [Intel XE#1489])
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-463/igt@kms_psr2_sf@pr-plane-move-sf-dmg-area.html

  * igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-fully-sf:
    - shard-bmg:          NOTRUN -> [SKIP][86] ([Intel XE#1406] / [Intel XE#1489]) +2 other tests skip
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-1/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_su@page_flip-p010:
    - shard-bmg:          NOTRUN -> [SKIP][87] ([Intel XE#1406] / [Intel XE#2387])
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-3/igt@kms_psr2_su@page_flip-p010.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][88] ([Intel XE#1122] / [Intel XE#1406])
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-463/igt@kms_psr2_su@page_flip-p010.html

  * igt@kms_psr@fbc-psr2-basic:
    - shard-bmg:          NOTRUN -> [SKIP][89] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +4 other tests skip
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-1/igt@kms_psr@fbc-psr2-basic.html

  * igt@kms_psr@psr2-cursor-plane-onoff:
    - shard-dg2-set2:     NOTRUN -> [SKIP][90] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +2 other tests skip
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-463/igt@kms_psr@psr2-cursor-plane-onoff.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-0:
    - shard-bmg:          NOTRUN -> [SKIP][91] ([Intel XE#2330])
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-1/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html

  * igt@kms_vrr@seamless-rr-switch-drrs:
    - shard-bmg:          NOTRUN -> [SKIP][92] ([Intel XE#1499])
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-3/igt@kms_vrr@seamless-rr-switch-drrs.html

  * igt@xe_eudebug_online@writes-caching-sram-bb-vram-target-vram:
    - shard-bmg:          NOTRUN -> [SKIP][93] ([Intel XE#4837]) +5 other tests skip
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-1/igt@xe_eudebug_online@writes-caching-sram-bb-vram-target-vram.html

  * igt@xe_exec_basic@multigpu-no-exec-null-defer-bind:
    - shard-dg2-set2:     [PASS][94] -> [SKIP][95] ([Intel XE#1392]) +6 other tests skip
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-dg2-464/igt@xe_exec_basic@multigpu-no-exec-null-defer-bind.html
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-null-defer-bind.html

  * igt@xe_exec_basic@multigpu-no-exec-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][96] ([Intel XE#2322]) +2 other tests skip
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-3/igt@xe_exec_basic@multigpu-no-exec-rebind.html

  * igt@xe_exec_basic@multigpu-once-basic-defer-mmap:
    - shard-lnl:          NOTRUN -> [SKIP][97] ([Intel XE#1392])
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-2/igt@xe_exec_basic@multigpu-once-basic-defer-mmap.html

  * igt@xe_exec_fault_mode@once-bindexecqueue-rebind-prefetch:
    - shard-dg2-set2:     NOTRUN -> [SKIP][98] ([Intel XE#288]) +7 other tests skip
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-463/igt@xe_exec_fault_mode@once-bindexecqueue-rebind-prefetch.html

  * igt@xe_exec_sip_eudebug@breakpoint-waitsip:
    - shard-lnl:          NOTRUN -> [SKIP][99] ([Intel XE#4837])
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-2/igt@xe_exec_sip_eudebug@breakpoint-waitsip.html

  * igt@xe_exec_sip_eudebug@breakpoint-writesip:
    - shard-dg2-set2:     NOTRUN -> [SKIP][100] ([Intel XE#4837]) +5 other tests skip
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-463/igt@xe_exec_sip_eudebug@breakpoint-writesip.html

  * igt@xe_exec_system_allocator@threads-many-stride-mmap-huge-nomemset:
    - shard-lnl:          NOTRUN -> [SKIP][101] ([Intel XE#4943])
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-2/igt@xe_exec_system_allocator@threads-many-stride-mmap-huge-nomemset.html

  * igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-new-race-nomemset:
    - shard-dg2-set2:     NOTRUN -> [SKIP][102] ([Intel XE#4915]) +89 other tests skip
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-463/igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-new-race-nomemset.html

  * igt@xe_exec_system_allocator@threads-shared-vm-many-stride-mmap-free-huge:
    - shard-bmg:          NOTRUN -> [SKIP][103] ([Intel XE#4943]) +5 other tests skip
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-3/igt@xe_exec_system_allocator@threads-shared-vm-many-stride-mmap-free-huge.html

  * igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv:
    - shard-lnl:          NOTRUN -> [ABORT][104] ([Intel XE#4917] / [Intel XE#5466])
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-2/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html

  * igt@xe_module_load@force-load:
    - shard-dg2-set2:     NOTRUN -> [SKIP][105] ([Intel XE#378])
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-434/igt@xe_module_load@force-load.html

  * igt@xe_module_load@load:
    - shard-lnl:          ([PASS][106], [PASS][107], [PASS][108], [PASS][109], [PASS][110], [PASS][111], [PASS][112], [PASS][113], [PASS][114], [PASS][115], [PASS][116], [PASS][117], [PASS][118], [PASS][119], [PASS][120], [PASS][121], [PASS][122], [PASS][123], [PASS][124], [PASS][125], [PASS][126], [PASS][127], [PASS][128], [PASS][129]) -> ([PASS][130], [PASS][131], [PASS][132], [PASS][133], [PASS][134], [PASS][135], [PASS][136], [PASS][137], [PASS][138], [PASS][139], [PASS][140], [PASS][141], [PASS][142], [PASS][143], [PASS][144], [SKIP][145], [PASS][146], [PASS][147], [PASS][148], [PASS][149], [PASS][150], [PASS][151], [PASS][152], [PASS][153], [PASS][154], [PASS][155]) ([Intel XE#378])
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-lnl-7/igt@xe_module_load@load.html
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-lnl-3/igt@xe_module_load@load.html
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-lnl-3/igt@xe_module_load@load.html
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-lnl-3/igt@xe_module_load@load.html
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-lnl-3/igt@xe_module_load@load.html
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-lnl-8/igt@xe_module_load@load.html
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-lnl-8/igt@xe_module_load@load.html
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-lnl-4/igt@xe_module_load@load.html
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-lnl-1/igt@xe_module_load@load.html
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-lnl-4/igt@xe_module_load@load.html
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-lnl-4/igt@xe_module_load@load.html
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-lnl-1/igt@xe_module_load@load.html
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-lnl-1/igt@xe_module_load@load.html
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-lnl-7/igt@xe_module_load@load.html
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-lnl-5/igt@xe_module_load@load.html
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-lnl-2/igt@xe_module_load@load.html
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-lnl-2/igt@xe_module_load@load.html
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-lnl-1/igt@xe_module_load@load.html
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-lnl-7/igt@xe_module_load@load.html
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-lnl-4/igt@xe_module_load@load.html
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-lnl-2/igt@xe_module_load@load.html
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-lnl-2/igt@xe_module_load@load.html
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-lnl-5/igt@xe_module_load@load.html
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-lnl-5/igt@xe_module_load@load.html
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-7/igt@xe_module_load@load.html
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-3/igt@xe_module_load@load.html
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-3/igt@xe_module_load@load.html
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-3/igt@xe_module_load@load.html
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-3/igt@xe_module_load@load.html
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-8/igt@xe_module_load@load.html
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-4/igt@xe_module_load@load.html
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-1/igt@xe_module_load@load.html
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-8/igt@xe_module_load@load.html
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-2/igt@xe_module_load@load.html
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-4/igt@xe_module_load@load.html
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-2/igt@xe_module_load@load.html
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-8/igt@xe_module_load@load.html
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-4/igt@xe_module_load@load.html
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-4/igt@xe_module_load@load.html
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-2/igt@xe_module_load@load.html
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-2/igt@xe_module_load@load.html
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-5/igt@xe_module_load@load.html
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-5/igt@xe_module_load@load.html
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-5/igt@xe_module_load@load.html
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-7/igt@xe_module_load@load.html
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-7/igt@xe_module_load@load.html
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-7/igt@xe_module_load@load.html
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-1/igt@xe_module_load@load.html
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-1/igt@xe_module_load@load.html
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-2/igt@xe_module_load@load.html

  * igt@xe_oa@syncs-ufence-wait-cfg:
    - shard-dg2-set2:     NOTRUN -> [SKIP][156] ([Intel XE#3573])
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-434/igt@xe_oa@syncs-ufence-wait-cfg.html

  * igt@xe_pm@d3cold-basic-exec:
    - shard-bmg:          NOTRUN -> [SKIP][157] ([Intel XE#2284])
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-1/igt@xe_pm@d3cold-basic-exec.html

  * igt@xe_pm@s2idle-basic-exec:
    - shard-adlp:         [PASS][158] -> [ABORT][159] ([Intel XE#4847])
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-adlp-3/igt@xe_pm@s2idle-basic-exec.html
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-adlp-2/igt@xe_pm@s2idle-basic-exec.html

  * igt@xe_pmu@all-fn-engine-activity-load:
    - shard-dg2-set2:     NOTRUN -> [SKIP][160] ([Intel XE#4650])
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-434/igt@xe_pmu@all-fn-engine-activity-load.html

  * igt@xe_pmu@gt-frequency:
    - shard-dg2-set2:     [PASS][161] -> [FAIL][162] ([Intel XE#5166]) +1 other test fail
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-dg2-463/igt@xe_pmu@gt-frequency.html
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-435/igt@xe_pmu@gt-frequency.html

  * igt@xe_pxp@pxp-stale-bo-exec-post-suspend:
    - shard-dg2-set2:     NOTRUN -> [SKIP][163] ([Intel XE#4733]) +1 other test skip
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-434/igt@xe_pxp@pxp-stale-bo-exec-post-suspend.html

  * igt@xe_pxp@pxp-stale-queue-post-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][164] ([Intel XE#4733]) +1 other test skip
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-3/igt@xe_pxp@pxp-stale-queue-post-suspend.html

  * igt@xe_query@multigpu-query-uc-fw-version-huc:
    - shard-bmg:          NOTRUN -> [SKIP][165] ([Intel XE#944]) +1 other test skip
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-3/igt@xe_query@multigpu-query-uc-fw-version-huc.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][166] ([Intel XE#944])
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-463/igt@xe_query@multigpu-query-uc-fw-version-huc.html

  * igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs:
    - shard-dg2-set2:     NOTRUN -> [SKIP][167] ([Intel XE#4130])
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-434/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs.html

  
#### Possible fixes ####

  * igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1:
    - shard-adlp:         [FAIL][168] ([Intel XE#3908]) -> [PASS][169] +1 other test pass
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-adlp-9/igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1.html
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-adlp-4/igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-adlp:         [DMESG-FAIL][170] ([Intel XE#4543]) -> [PASS][171]
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-adlp-4/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-adlp-1/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-d-dp-4:
    - shard-dg2-set2:     [INCOMPLETE][172] ([Intel XE#3862]) -> [PASS][173] +1 other test pass
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-dg2-434/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-d-dp-4.html
   [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-466/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-d-dp-4.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-6:
    - shard-dg2-set2:     [INCOMPLETE][174] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124]) -> [PASS][175]
   [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-6.html
   [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-6.html

  * igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy:
    - shard-bmg:          [SKIP][176] ([Intel XE#2291]) -> [PASS][177] +2 other tests pass
   [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-6/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html
   [177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-3/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-bmg:          [FAIL][178] ([Intel XE#1475]) -> [PASS][179]
   [178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_flip@2x-plain-flip-fb-recreate-interruptible:
    - shard-bmg:          [SKIP][180] ([Intel XE#2316]) -> [PASS][181] +2 other tests pass
   [180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-6/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html
   [181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-2/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html

  * igt@kms_flip@basic-flip-vs-modeset@c-hdmi-a1:
    - shard-adlp:         [DMESG-WARN][182] ([Intel XE#4543]) -> [PASS][183] +1 other test pass
   [182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-adlp-9/igt@kms_flip@basic-flip-vs-modeset@c-hdmi-a1.html
   [183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-adlp-4/igt@kms_flip@basic-flip-vs-modeset@c-hdmi-a1.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
    - shard-lnl:          [FAIL][184] ([Intel XE#301]) -> [PASS][185] +2 other tests pass
   [184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
   [185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html

  * igt@kms_hdr@static-swap:
    - shard-bmg:          [SKIP][186] ([Intel XE#1503]) -> [PASS][187] +1 other test pass
   [186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-6/igt@kms_hdr@static-swap.html
   [187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-3/igt@kms_hdr@static-swap.html

  * igt@kms_setmode@invalid-clone-single-crtc:
    - shard-bmg:          [SKIP][188] ([Intel XE#1435]) -> [PASS][189]
   [188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-6/igt@kms_setmode@invalid-clone-single-crtc.html
   [189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-2/igt@kms_setmode@invalid-clone-single-crtc.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race:
    - shard-dg2-set2:     [INCOMPLETE][190] ([Intel XE#4842]) -> [PASS][191]
   [190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-dg2-433/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race.html
   [191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-434/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race.html

  * igt@xe_exec_basic@multigpu-once-basic-defer-mmap:
    - shard-dg2-set2:     [SKIP][192] ([Intel XE#1392]) -> [PASS][193] +2 other tests pass
   [192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-dg2-432/igt@xe_exec_basic@multigpu-once-basic-defer-mmap.html
   [193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-436/igt@xe_exec_basic@multigpu-once-basic-defer-mmap.html

  * igt@xe_exec_threads@threads-hang-rebind:
    - shard-dg2-set2:     [DMESG-WARN][194] ([Intel XE#3876]) -> [PASS][195]
   [194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-dg2-434/igt@xe_exec_threads@threads-hang-rebind.html
   [195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-466/igt@xe_exec_threads@threads-hang-rebind.html

  * igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv:
    - shard-dg2-set2:     [DMESG-WARN][196] ([Intel XE#5893]) -> [PASS][197]
   [196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-dg2-433/igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv.html
   [197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-434/igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv.html

  * igt@xe_fault_injection@vm-create-fail-xe_exec_queue_create_bind:
    - shard-dg2-set2:     [ABORT][198] ([Intel XE#4847] / [Intel XE#5732]) -> [PASS][199]
   [198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-dg2-466/igt@xe_fault_injection@vm-create-fail-xe_exec_queue_create_bind.html
   [199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-463/igt@xe_fault_injection@vm-create-fail-xe_exec_queue_create_bind.html
    - shard-bmg:          [ABORT][200] ([Intel XE#4847] / [Intel XE#5732]) -> [PASS][201]
   [200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-6/igt@xe_fault_injection@vm-create-fail-xe_exec_queue_create_bind.html
   [201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-3/igt@xe_fault_injection@vm-create-fail-xe_exec_queue_create_bind.html

  * igt@xe_pat@pat-index-xe2:
    - shard-bmg:          [FAIL][202] ([Intel XE#5507]) -> [PASS][203] +1 other test pass
   [202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-6/igt@xe_pat@pat-index-xe2.html
   [203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-7/igt@xe_pat@pat-index-xe2.html

  * igt@xe_pm@d3hot-basic-exec:
    - shard-adlp:         [DMESG-WARN][204] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][205] +1 other test pass
   [204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-adlp-1/igt@xe_pm@d3hot-basic-exec.html
   [205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-adlp-6/igt@xe_pm@d3hot-basic-exec.html

  
#### Warnings ####

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs:
    - shard-dg2-set2:     [INCOMPLETE][206] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124] / [Intel XE#4345]) -> [INCOMPLETE][207] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#4212] / [Intel XE#4522])
   [206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
   [207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html

  * igt@kms_content_protection@lic-type-0:
    - shard-bmg:          [FAIL][208] ([Intel XE#1178]) -> [SKIP][209] ([Intel XE#2341])
   [208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-5/igt@kms_content_protection@lic-type-0.html
   [209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-6/igt@kms_content_protection@lic-type-0.html

  * igt@kms_content_protection@uevent:
    - shard-bmg:          [SKIP][210] ([Intel XE#2341]) -> [FAIL][211] ([Intel XE#1188])
   [210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-6/igt@kms_content_protection@uevent.html
   [211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-3/igt@kms_content_protection@uevent.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size:
    - shard-bmg:          [DMESG-WARN][212] ([Intel XE#5354]) -> [SKIP][213] ([Intel XE#2291])
   [212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-5/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html
   [213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-6/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render:
    - shard-bmg:          [SKIP][214] ([Intel XE#2312]) -> [SKIP][215] ([Intel XE#2311]) +11 other tests skip
   [214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render.html
   [215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][216] ([Intel XE#2312]) -> [SKIP][217] ([Intel XE#5390]) +5 other tests skip
   [216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-wc.html
   [217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][218] ([Intel XE#5390]) -> [SKIP][219] ([Intel XE#2312]) +9 other tests skip
   [218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-wc.html
   [219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][220] ([Intel XE#2311]) -> [SKIP][221] ([Intel XE#2312]) +15 other tests skip
   [220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html
   [221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-indfb-pgflip-blt:
    - shard-bmg:          [SKIP][222] ([Intel XE#2313]) -> [SKIP][223] ([Intel XE#2312]) +15 other tests skip
   [222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-indfb-pgflip-blt.html
   [223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt:
    - shard-bmg:          [SKIP][224] ([Intel XE#2312]) -> [SKIP][225] ([Intel XE#2313]) +14 other tests skip
   [224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt.html
   [225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][226] ([Intel XE#3544]) -> [SKIP][227] ([Intel XE#3374] / [Intel XE#3544])
   [226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-5/igt@kms_hdr@brightness-with-hdr.html
   [227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-4/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-bmg:          [FAIL][228] ([Intel XE#1729]) -> [SKIP][229] ([Intel XE#2426])
   [228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-5/igt@kms_tiled_display@basic-test-pattern.html
   [229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-4/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-bmg:          [SKIP][230] ([Intel XE#2509]) -> [SKIP][231] ([Intel XE#2426])
   [230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-5/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-4/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv:
    - shard-bmg:          [ABORT][232] ([Intel XE#4917] / [Intel XE#5466] / [Intel XE#5530]) -> [ABORT][233] ([Intel XE#5466] / [Intel XE#5530])
   [232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b/shard-bmg-7/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
   [233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/shard-bmg-7/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#1122]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1122
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1188]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1188
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
  [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
  [Intel XE#1475]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1475
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
  [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
  [Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
  [Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
  [Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
  [Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
  [Intel XE#2373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2373
  [Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
  [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
  [Intel XE#2392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2392
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2505]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2505
  [Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
  [Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
  [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
  [Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
  [Intel XE#2927]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2927
  [Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
  [Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
  [Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
  [Intel XE#3124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3124
  [Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#346]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/346
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
  [Intel XE#3862]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3862
  [Intel XE#3876]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3876
  [Intel XE#3908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3908
  [Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
  [Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
  [Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
  [Intel XE#4294]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4294
  [Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
  [Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
  [Intel XE#4416]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4416
  [Intel XE#4522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4522
  [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
  [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
  [Intel XE#4650]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4650
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#4842]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4842
  [Intel XE#4847]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4847
  [Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
  [Intel XE#4917]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4917
  [Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
  [Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
  [Intel XE#5166]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5166
  [Intel XE#5338]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5338
  [Intel XE#5354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5354
  [Intel XE#5376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5376
  [Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
  [Intel XE#5466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5466
  [Intel XE#5507]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5507
  [Intel XE#5530]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5530
  [Intel XE#5732]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5732
  [Intel XE#5893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5893
  [Intel XE#599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/599
  [Intel XE#6014]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6014
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
  [Intel XE#908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/908
  [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * Linux: xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b -> xe-pw-154119v1

  IGT_8524: 8524
  xe-3702-78cc74214b6f200319b53d36c4c0ce6974af8d5b: 78cc74214b6f200319b53d36c4c0ce6974af8d5b
  xe-pw-154119v1: 154119v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154119v1/index.html

[-- Attachment #2: Type: text/html, Size: 70406 bytes --]

Re: [PATCH v3 4/6] drm/xe/configfs: Allow to select by class only

[Raag Jadav]

On Fri, Sep 05, 2025 at 10:50:32PM -0700, Lucas De Marchi wrote:
> For a future configfs attribute, it's desirable to select by engine mask
> only as the instance doesn't make sense.
> 
> Rename the function lookup_engine_mask() to lookup_engine_info() and
> make it return the entry. This allows parse_engine() to still return an
> item if the caller wants to allow parsing a class-only string like
> "rcs", "bcs", "ccs", etc.

...

> -static bool lookup_engine_mask(const char *pattern, u64 *mask)
> +/*
> + * Lookup engine_info. If @mask is not NULL, reduce the mask according to the
> + * instance in @pattern.
> + *
> + * Examples of inputs:
> + * - lookup_engine_info("rcs0", &mask): return "rcs" entry from @engine_info and
> + *   mask == BIT_ULL(XE_HW_ENGINE_RCS0)
> + * - lookup_engine_info("rcs*", &mask): return "rcs" entry from @engine_info and
> + *   mask == XE_HW_ENGINE_RCS_MASK
> + * - lookup_engine_info("rcs", NULL): return "rcs" entry from @engine_info
> + */
> +static const struct engine_info *lookup_engine_info(const char *pattern, u64 *mask)

Now that we're returning engine_info, I'm wondering if we have any use for
mask parameter?

Raag

>  {
>  	for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
>  		u8 instance;
> @@ -263,29 +275,33 @@ static bool lookup_engine_mask(const char *pattern, u64 *mask)
>  			continue;
>  
>  		pattern += strlen(engine_info[i].cls);
> +		if (!mask && !*pattern)
> +			return &engine_info[i];
>  
>  		if (!strcmp(pattern, "*")) {
>  			*mask = engine_info[i].mask;
> -			return true;
> +			return &engine_info[i];
>  		}
>  
>  		if (kstrtou8(pattern, 10, &instance))
> -			return false;
> +			return NULL;
>  
>  		bit = __ffs64(engine_info[i].mask) + instance;
>  		if (bit >= fls64(engine_info[i].mask))
> -			return false;
> +			return NULL;
>  
>  		*mask = BIT_ULL(bit);
> -		return true;
> +		return &engine_info[i];
>  	}
>  
> -	return false;
> +	return NULL;
>  }

Re: [PATCH v3 4/6] drm/xe/configfs: Allow to select by class only

[Lucas De Marchi]

On Tue, Sep 09, 2025 at 12:27:01PM +0200, Raag Jadav wrote:
>On Fri, Sep 05, 2025 at 10:50:32PM -0700, Lucas De Marchi wrote:
>> For a future configfs attribute, it's desirable to select by engine mask
>> only as the instance doesn't make sense.
>>
>> Rename the function lookup_engine_mask() to lookup_engine_info() and
>> make it return the entry. This allows parse_engine() to still return an
>> item if the caller wants to allow parsing a class-only string like
>> "rcs", "bcs", "ccs", etc.
>
>...
>
>> -static bool lookup_engine_mask(const char *pattern, u64 *mask)
>> +/*
>> + * Lookup engine_info. If @mask is not NULL, reduce the mask according to the
>> + * instance in @pattern.
>> + *
>> + * Examples of inputs:
>> + * - lookup_engine_info("rcs0", &mask): return "rcs" entry from @engine_info and
>> + *   mask == BIT_ULL(XE_HW_ENGINE_RCS0)
>> + * - lookup_engine_info("rcs*", &mask): return "rcs" entry from @engine_info and
>> + *   mask == XE_HW_ENGINE_RCS_MASK
>> + * - lookup_engine_info("rcs", NULL): return "rcs" entry from @engine_info
>> + */
>> +static const struct engine_info *lookup_engine_info(const char *pattern, u64 *mask)
>
>Now that we're returning engine_info, I'm wondering if we have any use for
>mask parameter?

We do, because otherwise we'd have to parse the rest of the pattern in
the caller: rcs0 vs rcs* vs rcs.

Lucas De Marchi

>
>Raag
>
>>  {
>>  	for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
>>  		u8 instance;
>> @@ -263,29 +275,33 @@ static bool lookup_engine_mask(const char *pattern, u64 *mask)
>>  			continue;
>>
>>  		pattern += strlen(engine_info[i].cls);
>> +		if (!mask && !*pattern)
>> +			return &engine_info[i];
>>
>>  		if (!strcmp(pattern, "*")) {
>>  			*mask = engine_info[i].mask;
>> -			return true;
>> +			return &engine_info[i];
>>  		}
>>
>>  		if (kstrtou8(pattern, 10, &instance))
>> -			return false;
>> +			return NULL;
>>
>>  		bit = __ffs64(engine_info[i].mask) + instance;
>>  		if (bit >= fls64(engine_info[i].mask))
>> -			return false;
>> +			return NULL;
>>
>>  		*mask = BIT_ULL(bit);
>> -		return true;
>> +		return &engine_info[i];
>>  	}
>>
>> -	return false;
>> +	return NULL;
>>  }

Re: [PATCH v3 6/6] drm/xe/configfs: Add post context restore bb

[Lucas De Marchi]

On Mon, Sep 08, 2025 at 03:39:50PM -0700, Matt Roper wrote:
>On Fri, Sep 05, 2025 at 10:50:34PM -0700, Lucas De Marchi wrote:
>> Allow the user to specify commands to execute during a context restore.
>> Currently it's possible to parse 2 types of actions:
>>
>> 	- cmd: the instructions are added as is to the bb
>> 	- reg: just use the address and value, without worrying about
>> 	  encoding the right LRI instruction. This is possibly the most
>> 	  useful use case, so added a dedicated action for that.
>>
>> This also prepares for future BBs: mid context restore and rc6 context
>> restore that can re-use the same parsing functions.
>>
>> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
>> ---
>> v2:
>> - use bin attribute to be allow multiline
>> v3:
>> - revert attribute back to a simple attribute rather than binary:
>>   otherwise configfs only calls the callback on the file release and
>>   ignores the result. With that the user can't rely on the return
>>   code to know if the setting was accepted.
>>
>>   To still allow multiline, a method that uses just one syscall should
>>   be used. In bash, echo will end up using more syscalls. This can be
>>   workarounded by using heredoc, or simply writing it in C
>>   (rewrote that listening to
>>    https://www.youtube.com/watch?v=1S1fISh-pag, you're welcome to review
>>    listening to that beauty too)
>> ---
>>  drivers/gpu/drm/xe/xe_configfs.c | 278 ++++++++++++++++++++++++++++++++++++++-
>>  1 file changed, 276 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
>> index 21fd153666db8..f5fa0d14af38b 100644
>> --- a/drivers/gpu/drm/xe/xe_configfs.c
>> +++ b/drivers/gpu/drm/xe/xe_configfs.c
>> @@ -4,6 +4,7 @@
>>   */
>>
>>  #include <linux/bitops.h>
>> +#include <linux/ctype.h>
>>  #include <linux/configfs.h>
>>  #include <linux/cleanup.h>
>>  #include <linux/find.h>
>> @@ -12,6 +13,7 @@
>>  #include <linux/pci.h>
>>  #include <linux/string.h>
>>
>> +#include "instructions/xe_mi_commands.h"
>>  #include "xe_configfs.h"
>>  #include "xe_hw_engine_types.h"
>>  #include "xe_module.h"
>> @@ -115,6 +117,35 @@
>>   *
>>   * This attribute can only be set before binding to the device.
>>   *
>> + * Context restore BB
>> + * ------------------
>> + *
>> + * Allow to execute a batch buffer during any context switches. When the
>> + * GPU is restoring the context, it executes additional commands. It's useful
>> + * for testing additional workarounds and validating certain HW behaviors.
>> + *
>> + * Currently this is implemented only for post context restore. Examples:
>> + *
>> + * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10::
>> + *
>> + *	# echo 'rcs cmd 11000001 4F100 DEADBEEF' \
>> + *		> /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb
>> + *
>> + * #. Load certain values in a couple of registers (it can be used as a simpler
>> + *    alternative to the `cmd`) action::
>> + *
>> + *	# cat > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb <<EOF
>> + *	rcs reg 4F100 DEADBEEF
>> + *	rcs reg 4F104 FFFFFFFF
>> + *	EOF
>> + *
>> + *    .. note::
>> + *
>> + *       When using multiple lines, make sure to use a command that is
>> + *       implemented with a single write syscall, like HEREDOC.
>> + *
>> + * This attribute can only be set before binding to the device.
>> + *
>>   * Remove devices
>>   * ==============
>>   *
>> @@ -123,11 +154,18 @@
>>   *	# rmdir /sys/kernel/config/xe/0000:03:00.0/
>>   */
>>
>> +/* Similar to struct xe_bb, but not tied to HW (yet) */
>> +struct wa_bb {
>> +	u32 *cs;
>> +	u32 len; /* in dwords */
>> +};
>> +
>>  struct xe_config_group_device {
>>  	struct config_group group;
>>
>>  	struct xe_config_device {
>>  		u64 engines_allowed;
>> +		struct wa_bb ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
>>  		bool survivability_mode;
>>  		bool enable_psmi;
>>  	} config;
>> @@ -371,6 +409,227 @@ static ssize_t enable_psmi_store(struct config_item *item, const char *page, siz
>>  	return len;
>>  }
>>
>> +static bool wa_bb_read_advance(bool dereference, char **p,
>> +			       const char *append, size_t len,
>> +			       size_t *max_size)
>> +{
>> +	if (dereference) {
>> +		if (len >= *max_size)
>> +			return false;
>> +		*max_size -= len;
>> +		if (append)
>> +			memcpy(*p, append, len);
>> +	}
>> +
>> +	*p += len;
>> +
>> +	return true;
>> +}
>> +
>> +static ssize_t wa_bb_show(struct xe_config_group_device *dev,
>> +			  struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX],
>> +			  char *data, size_t sz)
>> +{
>> +	char *p = data;
>> +
>> +	guard(mutex)(&dev->lock);
>> +
>> +	for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
>> +		enum xe_engine_class ec = engine_info[i].engine_class;
>> +		size_t len;
>> +
>> +		if (!wa_bb[ec].len)
>> +			continue;
>> +
>> +		len = snprintf(p, sz, "%s:", engine_info[i].cls);
>> +		if (!wa_bb_read_advance(data, &p, NULL, len, &sz))
>> +			return -ENOBUFS;
>> +
>> +		for (size_t j = 0; j < wa_bb[ec].len; j++) {
>> +			len = snprintf(p, sz, " %08x", wa_bb[ec].cs[j]);
>> +			if (!wa_bb_read_advance(data, &p, NULL, len, &sz))
>> +				return -ENOBUFS;
>> +		}
>> +
>> +		if (!wa_bb_read_advance(data, &p, "\n", 1, &sz))
>> +			return -ENOBUFS;
>> +	}
>> +
>> +	if (!wa_bb_read_advance(data, &p, "", 1, &sz))
>> +		return -ENOBUFS;
>> +
>> +	/* Reserve one more to match check for '\0' */
>> +	if (!data)
>> +		p++;
>> +
>> +	return p - data;
>> +}
>> +
>> +static ssize_t ctx_restore_post_bb_show(struct config_item *item, char *page)
>> +{
>> +	struct xe_config_group_device *dev = to_xe_config_group_device(item);
>> +
>> +	return wa_bb_show(dev, dev->config.ctx_restore_post_bb, page, SZ_4K);
>> +}
>> +
>> +static void wa_bb_append(struct wa_bb *wa_bb, u32 val)
>> +{
>> +	if (wa_bb->cs)
>> +		wa_bb->cs[wa_bb->len] = val;
>> +
>> +	wa_bb->len++;
>> +}
>> +
>> +static ssize_t parse_hex(const char *line, u32 *pval)
>> +{
>> +	char numstr[12];
>> +	const char *p;
>> +	ssize_t numlen;
>> +
>> +	p = line + strspn(line, " \t");
>> +	if (!*p || *p == '\n')
>> +		return 0;
>> +
>> +	numlen = strcspn(p, " \t\n");
>> +	if (!numlen || numlen >= sizeof(numstr) - 1)
>> +		return -EINVAL;
>> +
>> +	memcpy(numstr, p, numlen);
>> +	numstr[numlen] = '\0';
>> +	p += numlen;
>> +
>> +	if (kstrtou32(numstr, 16, pval))
>> +		return -EINVAL;
>> +
>> +	return p - line;
>> +}
>> +
>> +/*
>> + * Parse lines with the format
>> + *
>> + *	<engine-class> cmd <u32> <u32...>
>> + *	<engine-class> reg <u32_addr> <u32_val>
>> + *
>> + * and optionally save them in @wa_bb[i].cs is non-NULL.
>> + *
>> + * Return the number of dwords parsed.
>> + */
>> +static ssize_t parse_wa_bb_lines(const char *lines,
>> +				 struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX])
>> +{
>> +	ssize_t dwords = 0, ret;
>> +	const char *p;
>> +
>> +	for (p = lines; *p; p++) {
>> +		const struct engine_info *info = NULL;
>> +		u32 val, val2;
>> +
>> +		/* Also allow empty lines */
>> +		p += strspn(p, " \t\n");
>> +		if (!*p)
>> +			break;
>> +
>> +		ret = parse_engine(p, " \t\n", NULL, &info);
>> +		if (ret < 0)
>> +			return ret;
>
>Should we be validating that the engine class is always 'rcs' here?
>BB_PER_CTX_PTR is not supported on BCS, VCS, VECS, or CCS according to

I created an issue in the spec to be clarified/fixed. That doesn't
really seem correct. In fact, we are already using it in other engines:
see drivers/gpu/drm/xe/xe_lrc.c:setup_wa_bb()

>bspec 60265.  Or do we just let the user shoot themselves in the foot if
>they want to (since there are already plenty of other ways for them to
>do that by mishandling the batchbuffer they specify here)?

yes... and the fact that the spec is wrong here.

>
>Speaking of which, should we be adding some kind of taint if this gets
>used?  Based on our prior experience with things like module parameters,
>I'm worried that people will post advice on websites like "if you run
>these strange commands while loading the driver it can make Game X run
>faster!"  Then we wind up with a bunch of end users blindly inserting
>unknown behavior on context switch, which can lead to instability and/or
>insecurity.  And then we (or the mesa guys) get a bunch of
>unreproducible bug reports because the GPU state is getting messed up on
>context switch behind the drivers' backs...

yes, I think it would be sane. We will need a way to bypass that in CI
though as otherwise it will abort the entire run. Maybe use
add_taint(TAINT_TEST, LOCKDEP_STILL_OK) and change igt to ignore that
particular taint since igt is in fact running tests.

Lucas De Marchi

>
>
>Matt
>
>> +
>> +		p += ret;
>> +		p += strspn(p, " \t");
>> +
>> +		if (str_has_prefix(p, "cmd")) {
>> +			for (p += strlen("cmd"); *p;) {
>> +				ret = parse_hex(p, &val);
>> +				if (ret < 0)
>> +					return -EINVAL;
>> +				if (!ret)
>> +					break;
>> +
>> +				p += ret;
>> +				dwords++;
>> +				wa_bb_append(&wa_bb[info->engine_class], val);
>> +			}
>> +		} else if (str_has_prefix(p, "reg")) {
>> +			p += strlen("reg");
>> +			ret = parse_hex(p, &val);
>> +			if (ret <= 0)
>> +				return -EINVAL;
>> +
>> +			p += ret;
>> +			ret = parse_hex(p, &val2);
>> +			if (ret <= 0)
>> +				return -EINVAL;
>> +
>> +			p += ret;
>> +			dwords += 3;
>> +			wa_bb_append(&wa_bb[info->engine_class],
>> +				     MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1));
>> +			wa_bb_append(&wa_bb[info->engine_class], val);
>> +			wa_bb_append(&wa_bb[info->engine_class], val2);
>> +		} else {
>> +			return -EINVAL;
>> +		}
>> +	}
>> +
>> +	return dwords;
>> +}
>> +
>> +static ssize_t wa_bb_store(struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX],
>> +			   struct xe_config_group_device *dev,
>> +			   const char *page, size_t len)
>> +{
>> +	/* tmp_wa_bb must match wa_bb's size */
>> +	struct wa_bb tmp_wa_bb[XE_ENGINE_CLASS_MAX] = { };
>> +	ssize_t count, class;
>> +	u32 *tmp;
>> +
>> +	/* 1. Count dwords - wa_bb[i].cs is NULL for all classes */
>> +	count = parse_wa_bb_lines(page, tmp_wa_bb);
>> +	if (count < 0)
>> +		return count;
>> +
>> +	guard(mutex)(&dev->lock);
>> +
>> +	if (is_bound(dev))
>> +		return -EBUSY;
>> +
>> +	/*
>> +	 * 2. Allocate a u32 array and set the pointers to the right positions
>> +	 * according to the length of each class' wa_bb
>> +	 */
>> +	tmp = krealloc(wa_bb[0].cs, count * sizeof(u32), GFP_KERNEL);
>> +	if (!tmp)
>> +		return -ENOMEM;
>> +
>> +	if (!count) {
>> +		memset(wa_bb, 0, sizeof(tmp_wa_bb));
>> +		return len;
>> +	}
>> +
>> +	for (class = 0, count = 0; class < XE_ENGINE_CLASS_MAX; ++class) {
>> +		tmp_wa_bb[class].cs = tmp + count;
>> +		count += tmp_wa_bb[class].len;
>> +		tmp_wa_bb[class].len = 0;
>> +	}
>> +
>> +	/* 3. Parse wa_bb lines again, this time saving the values */
>> +	count = parse_wa_bb_lines(page, tmp_wa_bb);
>> +	if (count < 0)
>> +		return count;
>> +
>> +	memcpy(wa_bb, tmp_wa_bb, sizeof(tmp_wa_bb));
>> +
>> +	return len;
>> +}
>> +
>> +static ssize_t ctx_restore_post_bb_store(struct config_item *item,
>> +					 const char *data, size_t sz)
>> +{
>> +	struct xe_config_group_device *dev = to_xe_config_group_device(item);
>> +
>> +	return wa_bb_store(dev->config.ctx_restore_post_bb, dev, data, sz);
>> +}
>> +
>> +CONFIGFS_ATTR(, ctx_restore_post_bb);
>>  CONFIGFS_ATTR(, enable_psmi);
>>  CONFIGFS_ATTR(, engines_allowed);
>>  CONFIGFS_ATTR(, survivability_mode);
>> @@ -379,6 +638,7 @@ static struct configfs_attribute *xe_config_device_attrs[] = {
>>  	&attr_enable_psmi,
>>  	&attr_engines_allowed,
>>  	&attr_survivability_mode,
>> +	&attr_ctx_restore_post_bb,
>>  	NULL,
>>  };
>>
>> @@ -387,6 +647,8 @@ static void xe_config_device_release(struct config_item *item)
>>  	struct xe_config_group_device *dev = to_xe_config_group_device(item);
>>
>>  	mutex_destroy(&dev->lock);
>> +
>> +	kfree(dev->config.ctx_restore_post_bb[0].cs);
>>  	kfree(dev);
>>  }
>>
>> @@ -636,14 +898,26 @@ bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev)
>>  /**
>>   * xe_configfs_get_ctx_restore_post_bb - get configfs ctx_restore_post_bb setting
>>   * @pdev: pci device
>> + * @class: hw engine class
>> + * @cs: pointer to the bb to use - only valid during probe
>>   *
>> - * Return: post_ctx_restore setting in configfs
>> + * Return: Number of dwords used in the post_ctx_restore setting in configfs
>>   */
>>  u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
>>  					enum xe_engine_class class,
>>  					const u32 **cs)
>>  {
>> -	return 0;
>> +	struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
>> +	u32 len;
>> +
>> +	if (!dev)
>> +		return 0;
>> +
>> +	*cs = dev->config.ctx_restore_post_bb[class].cs;
>> +	len = dev->config.ctx_restore_post_bb[class].len;
>> +	config_group_put(&dev->group);
>> +
>> +	return len;
>>  }
>>
>>  int __init xe_configfs_init(void)
>>
>> --
>> 2.50.1
>>
>
>-- 
>Matt Roper
>Graphics Software Engineer
>Linux GPU Platform Enablement
>Intel Corporation

Re: [PATCH v3 4/6] drm/xe/configfs: Allow to select by class only

[Raag Jadav]

On Tue, Sep 09, 2025 at 07:42:14AM -0500, Lucas De Marchi wrote:
> On Tue, Sep 09, 2025 at 12:27:01PM +0200, Raag Jadav wrote:
> > On Fri, Sep 05, 2025 at 10:50:32PM -0700, Lucas De Marchi wrote:
> > > For a future configfs attribute, it's desirable to select by engine mask
> > > only as the instance doesn't make sense.
> > > 
> > > Rename the function lookup_engine_mask() to lookup_engine_info() and
> > > make it return the entry. This allows parse_engine() to still return an
> > > item if the caller wants to allow parsing a class-only string like
> > > "rcs", "bcs", "ccs", etc.
> > 
> > ...
> > 
> > > -static bool lookup_engine_mask(const char *pattern, u64 *mask)
> > > +/*
> > > + * Lookup engine_info. If @mask is not NULL, reduce the mask according to the
> > > + * instance in @pattern.
> > > + *
> > > + * Examples of inputs:
> > > + * - lookup_engine_info("rcs0", &mask): return "rcs" entry from @engine_info and
> > > + *   mask == BIT_ULL(XE_HW_ENGINE_RCS0)
> > > + * - lookup_engine_info("rcs*", &mask): return "rcs" entry from @engine_info and
> > > + *   mask == XE_HW_ENGINE_RCS_MASK
> > > + * - lookup_engine_info("rcs", NULL): return "rcs" entry from @engine_info
> > > + */
> > > +static const struct engine_info *lookup_engine_info(const char *pattern, u64 *mask)
> > 
> > Now that we're returning engine_info, I'm wondering if we have any use for
> > mask parameter?
> 
> We do, because otherwise we'd have to parse the rest of the pattern in
> the caller: rcs0 vs rcs* vs rcs.

Fair.

Reviewed-by: Raag Jadav <raag.jadav@intel.com>