* [PATCH v4 0/2] Different page size handle in migrate layer
@ 2025-10-13 1:56 Matthew Brost
2025-10-13 1:56 ` [PATCH v4 1/2] drm/xe: Fix build_pt_update_batch_sram for non-4K PAGE_SIZE Matthew Brost
` (5 more replies)
0 siblings, 6 replies; 8+ messages in thread
From: Matthew Brost @ 2025-10-13 1:56 UTC (permalink / raw)
To: intel-xe; +Cc: stuart.summers, matthew.auld, simon.richter
Handle non-4K PAGE_SIZE and use 2M GPU pages when possible.
Matt
Matthew Brost (2):
drm/xe: Fix build_pt_update_batch_sram for non-4K PAGE_SIZE
drm/xe: Enable 2M pages in xe_migrate_vram
drivers/gpu/drm/xe/xe_migrate.c | 70 ++++++++++++++++++++++++++++-----
1 file changed, 60 insertions(+), 10 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH v4 1/2] drm/xe: Fix build_pt_update_batch_sram for non-4K PAGE_SIZE 2025-10-13 1:56 [PATCH v4 0/2] Different page size handle in migrate layer Matthew Brost @ 2025-10-13 1:56 ` Matthew Brost 2025-10-13 1:56 ` [PATCH v4 2/2] drm/xe: Enable 2M pages in xe_migrate_vram Matthew Brost ` (4 subsequent siblings) 5 siblings, 0 replies; 8+ messages in thread From: Matthew Brost @ 2025-10-13 1:56 UTC (permalink / raw) To: intel-xe; +Cc: stuart.summers, matthew.auld, simon.richter The build_pt_update_batch_sram function in the Xe migrate layer assumes PAGE_SIZE == XE_PAGE_SIZE (4K), which is not a valid assumption on non-x86 platforms. This patch updates build_pt_update_batch_sram to correctly handle PAGE_SIZE > 4K by programming multiple 4K GPU pages per CPU page. Signed-off-by: Matthew Brost <matthew.brost@intel.com> --- drivers/gpu/drm/xe/xe_migrate.c | 19 ++++++++++++++++--- 1 file changed, 16 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c index 7345a5b65169..b534d1cc404a 100644 --- a/drivers/gpu/drm/xe/xe_migrate.c +++ b/drivers/gpu/drm/xe/xe_migrate.c @@ -1781,13 +1781,15 @@ static void build_pt_update_batch_sram(struct xe_migrate *m, u32 size) { u16 pat_index = tile_to_xe(m->tile)->pat.idx[XE_CACHE_WB]; + u64 gpu_page_size = 0x1ull << xe_pt_shift(0); u32 ptes; int i = 0; - ptes = DIV_ROUND_UP(size, XE_PAGE_SIZE); + ptes = DIV_ROUND_UP(size, gpu_page_size); while (ptes) { u32 chunk = min(MAX_PTE_PER_SDI, ptes); + chunk = ALIGN_DOWN(chunk, PAGE_SIZE / XE_PAGE_SIZE); bb->cs[bb->len++] = MI_STORE_DATA_IMM | MI_SDI_NUM_QW(chunk); bb->cs[bb->len++] = pt_offset; bb->cs[bb->len++] = 0; @@ -1796,18 +1798,29 @@ static void build_pt_update_batch_sram(struct xe_migrate *m, ptes -= chunk; while (chunk--) { - u64 addr = sram_addr[i].addr & PAGE_MASK; + u64 addr = sram_addr[i].addr & ~(gpu_page_size - 1); xe_tile_assert(m->tile, sram_addr[i].proto == DRM_INTERCONNECT_SYSTEM); xe_tile_assert(m->tile, addr); + +again: addr = m->q->vm->pt_ops->pte_encode_addr(m->tile->xe, addr, pat_index, 0, false, 0); bb->cs[bb->len++] = lower_32_bits(addr); bb->cs[bb->len++] = upper_32_bits(addr); - i++; + if (gpu_page_size < PAGE_SIZE) { + addr += XE_PAGE_SIZE; + if (sram_addr[i].addr + PAGE_SIZE != addr) { + chunk--; + goto again; + } + i++; + } else { + i += gpu_page_size / PAGE_SIZE; + } } } } -- 2.34.1 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v4 2/2] drm/xe: Enable 2M pages in xe_migrate_vram 2025-10-13 1:56 [PATCH v4 0/2] Different page size handle in migrate layer Matthew Brost 2025-10-13 1:56 ` [PATCH v4 1/2] drm/xe: Fix build_pt_update_batch_sram for non-4K PAGE_SIZE Matthew Brost @ 2025-10-13 1:56 ` Matthew Brost 2025-10-13 2:02 ` ✗ CI.checkpatch: warning for Different page size handle in migrate layer Patchwork ` (3 subsequent siblings) 5 siblings, 0 replies; 8+ messages in thread From: Matthew Brost @ 2025-10-13 1:56 UTC (permalink / raw) To: intel-xe; +Cc: stuart.summers, matthew.auld, simon.richter Using 2M pages in xe_migrate_vram has two benefits: we issue fewer instructions per 2M copy (1 vs. 512), and the cache hit rate should be higher. This results in increased copy engine bandwidth, as shown by benchmark IGTs. Enable 2M pages by reserving PDEs in the migrate VM and using 2M pages in xe_migrate_vram if the DMA address order matches 2M. v2: - Reuse build_pt_update_batch_sram (Stuart) - Fix build_pt_update_batch_sram for PAGE_SIZE > 4K v3: - More fixes for PAGE_SIZE > 4K, align chunk, decrement chunk as needed - Use stack incr var in xe_migrate_vram_use_pde (Stuart) v4: - Split PAGE_SIZE > 4K fix out in different patch (Stuart) Signed-off-by: Matthew Brost <matthew.brost@intel.com> --- drivers/gpu/drm/xe/xe_migrate.c | 53 ++++++++++++++++++++++++++++----- 1 file changed, 45 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c index b534d1cc404a..aa1986adff89 100644 --- a/drivers/gpu/drm/xe/xe_migrate.c +++ b/drivers/gpu/drm/xe/xe_migrate.c @@ -57,6 +57,13 @@ struct xe_migrate { u64 usm_batch_base_ofs; /** @cleared_mem_ofs: VM offset of @cleared_bo. */ u64 cleared_mem_ofs; + /** @large_page_copy_ofs: VM offset of 2M pages used for large copies */ + u64 large_page_copy_ofs; + /** + * @large_page_copy_pdes: BO offset to writeout 2M pages (PDEs) used for + * large copies + */ + u64 large_page_copy_pdes; /** * @fence: dma-fence representing the last migration job batch. * Protected by @job_mutex. @@ -288,6 +295,12 @@ static int xe_migrate_prepare_vm(struct xe_tile *tile, struct xe_migrate *m, (i + 1) * 8, u64, entry); } + /* Reserve 2M PDEs */ + level = 1; + m->large_page_copy_ofs = NUM_PT_SLOTS << xe_pt_shift(level); + m->large_page_copy_pdes = map_ofs + XE_PAGE_SIZE * level + + NUM_PT_SLOTS * 8; + /* Set up a 1GiB NULL mapping at 255GiB offset. */ level = 2; xe_map_wr(xe, &bo->vmap, map_ofs + XE_PAGE_SIZE * level + 255 * 8, u64, @@ -1778,10 +1791,10 @@ static u32 pte_update_cmd_size(u64 size) static void build_pt_update_batch_sram(struct xe_migrate *m, struct xe_bb *bb, u32 pt_offset, struct drm_pagemap_addr *sram_addr, - u32 size) + u32 size, int level) { u16 pat_index = tile_to_xe(m->tile)->pat.idx[XE_CACHE_WB]; - u64 gpu_page_size = 0x1ull << xe_pt_shift(0); + u64 gpu_page_size = 0x1ull << xe_pt_shift(level); u32 ptes; int i = 0; @@ -1807,7 +1820,7 @@ static void build_pt_update_batch_sram(struct xe_migrate *m, again: addr = m->q->vm->pt_ops->pte_encode_addr(m->tile->xe, addr, pat_index, - 0, false, 0); + level, false, 0); bb->cs[bb->len++] = lower_32_bits(addr); bb->cs[bb->len++] = upper_32_bits(addr); @@ -1825,6 +1838,19 @@ static void build_pt_update_batch_sram(struct xe_migrate *m, } } +static bool xe_migrate_vram_use_pde(struct drm_pagemap_addr *sram_addr, + unsigned long size) +{ + u32 large_size = (0x1 << xe_pt_shift(1)); + unsigned long i, incr = large_size / PAGE_SIZE;; + + for (i = 0; i < DIV_ROUND_UP(size, PAGE_SIZE); i += incr) + if (PAGE_SIZE << sram_addr[i].order != large_size) + return false; + + return true; +} + enum xe_migrate_copy_dir { XE_MIGRATE_COPY_TO_VRAM, XE_MIGRATE_COPY_TO_SRAM, @@ -1854,6 +1880,7 @@ static struct dma_fence *xe_migrate_vram(struct xe_migrate *m, PAGE_SIZE : 4; int err; unsigned long i, j; + bool use_pde = xe_migrate_vram_use_pde(sram_addr, len + sram_offset); if (drm_WARN_ON(&xe->drm, (len & XE_CACHELINE_MASK) || (sram_offset | vram_addr) & XE_CACHELINE_MASK)) @@ -1878,7 +1905,7 @@ static struct dma_fence *xe_migrate_vram(struct xe_migrate *m, * struct drm_pagemap_addr. Ensure this is the case even with higher * orders. */ - for (i = 0; i < npages;) { + for (i = 0; !use_pde && i < npages;) { unsigned int order = sram_addr[i].order; for (j = 1; j < NR_PAGES(order) && i + j < npages; j++) @@ -1888,16 +1915,26 @@ static struct dma_fence *xe_migrate_vram(struct xe_migrate *m, i += NR_PAGES(order); } - build_pt_update_batch_sram(m, bb, pt_slot * XE_PAGE_SIZE, - sram_addr, len + sram_offset); + if (use_pde) + build_pt_update_batch_sram(m, bb, m->large_page_copy_pdes, + sram_addr, len + sram_offset, 1); + else + build_pt_update_batch_sram(m, bb, pt_slot * XE_PAGE_SIZE, + sram_addr, len + sram_offset, 0); if (dir == XE_MIGRATE_COPY_TO_VRAM) { - src_L0_ofs = xe_migrate_vm_addr(pt_slot, 0) + sram_offset; + if (use_pde) + src_L0_ofs = m->large_page_copy_ofs + sram_offset; + else + src_L0_ofs = xe_migrate_vm_addr(pt_slot, 0) + sram_offset; dst_L0_ofs = xe_migrate_vram_ofs(xe, vram_addr, false); } else { src_L0_ofs = xe_migrate_vram_ofs(xe, vram_addr, false); - dst_L0_ofs = xe_migrate_vm_addr(pt_slot, 0) + sram_offset; + if (use_pde) + dst_L0_ofs = m->large_page_copy_ofs + sram_offset; + else + dst_L0_ofs = xe_migrate_vm_addr(pt_slot, 0) + sram_offset; } bb->cs[bb->len++] = MI_BATCH_BUFFER_END; -- 2.34.1 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* ✗ CI.checkpatch: warning for Different page size handle in migrate layer 2025-10-13 1:56 [PATCH v4 0/2] Different page size handle in migrate layer Matthew Brost 2025-10-13 1:56 ` [PATCH v4 1/2] drm/xe: Fix build_pt_update_batch_sram for non-4K PAGE_SIZE Matthew Brost 2025-10-13 1:56 ` [PATCH v4 2/2] drm/xe: Enable 2M pages in xe_migrate_vram Matthew Brost @ 2025-10-13 2:02 ` Patchwork 2025-10-13 2:03 ` ✓ CI.KUnit: success " Patchwork ` (2 subsequent siblings) 5 siblings, 0 replies; 8+ messages in thread From: Patchwork @ 2025-10-13 2:02 UTC (permalink / raw) To: Matthew Brost; +Cc: intel-xe == Series Details == Series: Different page size handle in migrate layer URL : https://patchwork.freedesktop.org/series/155794/ State : warning == Summary == + KERNEL=/kernel + git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt Cloning into 'mt'... warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/ + git -C mt rev-list -n1 origin/master fbd08a78c3a3bb17964db2a326514c69c1dca660 + cd /kernel + git config --global --add safe.directory /kernel + git log -n1 commit cf63ebef4fac2ce8f2dbab32fb0ab7e43e6ab404 Author: Matthew Brost <matthew.brost@intel.com> Date: Sun Oct 12 18:56:20 2025 -0700 drm/xe: Enable 2M pages in xe_migrate_vram Using 2M pages in xe_migrate_vram has two benefits: we issue fewer instructions per 2M copy (1 vs. 512), and the cache hit rate should be higher. This results in increased copy engine bandwidth, as shown by benchmark IGTs. Enable 2M pages by reserving PDEs in the migrate VM and using 2M pages in xe_migrate_vram if the DMA address order matches 2M. v2: - Reuse build_pt_update_batch_sram (Stuart) - Fix build_pt_update_batch_sram for PAGE_SIZE > 4K v3: - More fixes for PAGE_SIZE > 4K, align chunk, decrement chunk as needed - Use stack incr var in xe_migrate_vram_use_pde (Stuart) v4: - Split PAGE_SIZE > 4K fix out in different patch (Stuart) Signed-off-by: Matthew Brost <matthew.brost@intel.com> + /mt/dim checkpatch 085518a4da5bcf9b68ef798e27ef71d64443aad7 drm-intel 8a4e2dccbc64 drm/xe: Fix build_pt_update_batch_sram for non-4K PAGE_SIZE cf63ebef4fac drm/xe: Enable 2M pages in xe_migrate_vram -:86: WARNING:ONE_SEMICOLON: Statements terminations use 1 semicolon #86: FILE: drivers/gpu/drm/xe/xe_migrate.c:1845: + unsigned long i, incr = large_size / PAGE_SIZE;; total: 0 errors, 1 warnings, 0 checks, 109 lines checked ^ permalink raw reply [flat|nested] 8+ messages in thread
* ✓ CI.KUnit: success for Different page size handle in migrate layer 2025-10-13 1:56 [PATCH v4 0/2] Different page size handle in migrate layer Matthew Brost ` (2 preceding siblings ...) 2025-10-13 2:02 ` ✗ CI.checkpatch: warning for Different page size handle in migrate layer Patchwork @ 2025-10-13 2:03 ` Patchwork 2025-10-13 2:50 ` ✓ Xe.CI.BAT: " Patchwork 2025-10-13 3:17 ` ✓ Xe.CI.Full: " Patchwork 5 siblings, 0 replies; 8+ messages in thread From: Patchwork @ 2025-10-13 2:03 UTC (permalink / raw) To: Matthew Brost; +Cc: intel-xe == Series Details == Series: Different page size handle in migrate layer URL : https://patchwork.freedesktop.org/series/155794/ State : success == Summary == + trap cleanup EXIT + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig [02:02:38] Configuring KUnit Kernel ... Generating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [02:02:42] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [02:03:12] Starting KUnit Kernel (1/1)... [02:03:12] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [02:03:13] ================== guc_buf (11 subtests) =================== [02:03:13] [PASSED] test_smallest [02:03:13] [PASSED] test_largest [02:03:13] [PASSED] test_granular [02:03:13] [PASSED] test_unique [02:03:13] [PASSED] test_overlap [02:03:13] [PASSED] test_reusable [02:03:13] [PASSED] test_too_big [02:03:13] [PASSED] test_flush [02:03:13] [PASSED] test_lookup [02:03:13] [PASSED] test_data [02:03:13] [PASSED] test_class [02:03:13] ===================== [PASSED] guc_buf ===================== [02:03:13] =================== guc_dbm (7 subtests) =================== [02:03:13] [PASSED] test_empty [02:03:13] [PASSED] test_default [02:03:13] ======================== test_size ======================== [02:03:13] [PASSED] 4 [02:03:13] [PASSED] 8 [02:03:13] [PASSED] 32 [02:03:13] [PASSED] 256 [02:03:13] ==================== [PASSED] test_size ==================== [02:03:13] ======================= test_reuse ======================== [02:03:13] [PASSED] 4 [02:03:13] [PASSED] 8 [02:03:13] [PASSED] 32 [02:03:13] [PASSED] 256 [02:03:13] =================== [PASSED] test_reuse ==================== [02:03:13] =================== test_range_overlap ==================== [02:03:13] [PASSED] 4 [02:03:13] [PASSED] 8 [02:03:13] [PASSED] 32 [02:03:13] [PASSED] 256 [02:03:13] =============== [PASSED] test_range_overlap ================ [02:03:13] =================== test_range_compact ==================== [02:03:13] [PASSED] 4 [02:03:13] [PASSED] 8 [02:03:13] [PASSED] 32 [02:03:13] [PASSED] 256 [02:03:13] =============== [PASSED] test_range_compact ================ [02:03:13] ==================== test_range_spare ===================== [02:03:13] [PASSED] 4 [02:03:13] [PASSED] 8 [02:03:13] [PASSED] 32 [02:03:13] [PASSED] 256 [02:03:13] ================ [PASSED] test_range_spare ================= [02:03:13] ===================== [PASSED] guc_dbm ===================== [02:03:13] =================== guc_idm (6 subtests) =================== [02:03:13] [PASSED] bad_init [02:03:13] [PASSED] no_init [02:03:13] [PASSED] init_fini [02:03:13] [PASSED] check_used [02:03:13] [PASSED] check_quota [02:03:13] [PASSED] check_all [02:03:13] ===================== [PASSED] guc_idm ===================== [02:03:13] ================== no_relay (3 subtests) =================== [02:03:13] [PASSED] xe_drops_guc2pf_if_not_ready [02:03:13] [PASSED] xe_drops_guc2vf_if_not_ready [02:03:13] [PASSED] xe_rejects_send_if_not_ready [02:03:13] ==================== [PASSED] no_relay ===================== [02:03:13] ================== pf_relay (14 subtests) ================== [02:03:13] [PASSED] pf_rejects_guc2pf_too_short [02:03:13] [PASSED] pf_rejects_guc2pf_too_long [02:03:13] [PASSED] pf_rejects_guc2pf_no_payload [02:03:13] [PASSED] pf_fails_no_payload [02:03:13] [PASSED] pf_fails_bad_origin [02:03:13] [PASSED] pf_fails_bad_type [02:03:13] [PASSED] pf_txn_reports_error [02:03:13] [PASSED] pf_txn_sends_pf2guc [02:03:13] [PASSED] pf_sends_pf2guc [02:03:13] [SKIPPED] pf_loopback_nop [02:03:13] [SKIPPED] pf_loopback_echo [02:03:13] [SKIPPED] pf_loopback_fail [02:03:13] [SKIPPED] pf_loopback_busy [02:03:13] [SKIPPED] pf_loopback_retry [02:03:13] ==================== [PASSED] pf_relay ===================== [02:03:13] ================== vf_relay (3 subtests) =================== [02:03:13] [PASSED] vf_rejects_guc2vf_too_short [02:03:13] [PASSED] vf_rejects_guc2vf_too_long [02:03:13] [PASSED] vf_rejects_guc2vf_no_payload [02:03:13] ==================== [PASSED] vf_relay ===================== [02:03:13] ===================== lmtt (1 subtest) ===================== [02:03:13] ======================== test_ops ========================= [02:03:13] [PASSED] 2-level [02:03:13] [PASSED] multi-level [02:03:13] ==================== [PASSED] test_ops ===================== [02:03:13] ====================== [PASSED] lmtt ======================= [02:03:13] ================= pf_service (11 subtests) ================= [02:03:13] [PASSED] pf_negotiate_any [02:03:13] [PASSED] pf_negotiate_base_match [02:03:13] [PASSED] pf_negotiate_base_newer [02:03:13] [PASSED] pf_negotiate_base_next [02:03:13] [SKIPPED] pf_negotiate_base_older [02:03:13] [PASSED] pf_negotiate_base_prev [02:03:13] [PASSED] pf_negotiate_latest_match [02:03:13] [PASSED] pf_negotiate_latest_newer [02:03:13] [PASSED] pf_negotiate_latest_next [02:03:13] [SKIPPED] pf_negotiate_latest_older [02:03:13] [SKIPPED] pf_negotiate_latest_prev [02:03:13] =================== [PASSED] pf_service ==================== [02:03:13] ================= xe_guc_g2g (2 subtests) ================== [02:03:13] ============== xe_live_guc_g2g_kunit_default ============== [02:03:13] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ========== [02:03:13] ============== xe_live_guc_g2g_kunit_allmem =============== [02:03:13] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ========== [02:03:13] =================== [SKIPPED] xe_guc_g2g =================== [02:03:13] =================== xe_mocs (2 subtests) =================== [02:03:13] ================ xe_live_mocs_kernel_kunit ================ [02:03:13] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============ [02:03:13] ================ xe_live_mocs_reset_kunit ================= [02:03:13] ============ [SKIPPED] xe_live_mocs_reset_kunit ============ [02:03:13] ==================== [SKIPPED] xe_mocs ===================== [02:03:13] ================= xe_migrate (2 subtests) ================== [02:03:13] ================= xe_migrate_sanity_kunit ================= [02:03:13] ============ [SKIPPED] xe_migrate_sanity_kunit ============= [02:03:13] ================== xe_validate_ccs_kunit ================== [02:03:13] ============= [SKIPPED] xe_validate_ccs_kunit ============== [02:03:13] =================== [SKIPPED] xe_migrate =================== [02:03:13] ================== xe_dma_buf (1 subtest) ================== [02:03:13] ==================== xe_dma_buf_kunit ===================== [02:03:13] ================ [SKIPPED] xe_dma_buf_kunit ================ [02:03:13] =================== [SKIPPED] xe_dma_buf =================== [02:03:13] ================= xe_bo_shrink (1 subtest) ================= [02:03:13] =================== xe_bo_shrink_kunit ==================== [02:03:13] =============== [SKIPPED] xe_bo_shrink_kunit =============== [02:03:13] ================== [SKIPPED] xe_bo_shrink ================== [02:03:13] ==================== xe_bo (2 subtests) ==================== [02:03:13] ================== xe_ccs_migrate_kunit =================== [02:03:13] ============== [SKIPPED] xe_ccs_migrate_kunit ============== [02:03:13] ==================== xe_bo_evict_kunit ==================== [02:03:13] =============== [SKIPPED] xe_bo_evict_kunit ================ [02:03:13] ===================== [SKIPPED] xe_bo ====================== [02:03:13] ==================== args (11 subtests) ==================== [02:03:13] [PASSED] count_args_test [02:03:13] [PASSED] call_args_example [02:03:13] [PASSED] call_args_test [02:03:13] [PASSED] drop_first_arg_example [02:03:13] [PASSED] drop_first_arg_test [02:03:13] [PASSED] first_arg_example [02:03:13] [PASSED] first_arg_test [02:03:13] [PASSED] last_arg_example [02:03:13] [PASSED] last_arg_test [02:03:13] [PASSED] pick_arg_example [02:03:13] [PASSED] sep_comma_example [02:03:13] ====================== [PASSED] args ======================= [02:03:13] =================== xe_pci (3 subtests) ==================== [02:03:13] ==================== check_graphics_ip ==================== [02:03:13] [PASSED] 12.00 Xe_LP [02:03:13] [PASSED] 12.10 Xe_LP+ [02:03:13] [PASSED] 12.55 Xe_HPG [02:03:13] [PASSED] 12.60 Xe_HPC [02:03:13] [PASSED] 12.70 Xe_LPG [02:03:13] [PASSED] 12.71 Xe_LPG [02:03:13] [PASSED] 12.74 Xe_LPG+ [02:03:13] [PASSED] 20.01 Xe2_HPG [02:03:13] [PASSED] 20.02 Xe2_HPG [02:03:13] [PASSED] 20.04 Xe2_LPG [02:03:13] [PASSED] 30.00 Xe3_LPG [02:03:13] [PASSED] 30.01 Xe3_LPG [02:03:13] [PASSED] 30.03 Xe3_LPG [02:03:13] ================ [PASSED] check_graphics_ip ================ [02:03:13] ===================== check_media_ip ====================== [02:03:13] [PASSED] 12.00 Xe_M [02:03:13] [PASSED] 12.55 Xe_HPM [02:03:13] [PASSED] 13.00 Xe_LPM+ [02:03:13] [PASSED] 13.01 Xe2_HPM [02:03:13] [PASSED] 20.00 Xe2_LPM [02:03:13] [PASSED] 30.00 Xe3_LPM [02:03:13] [PASSED] 30.02 Xe3_LPM [02:03:13] ================= [PASSED] check_media_ip ================== [02:03:13] ================= check_platform_gt_count ================= [02:03:13] [PASSED] 0x9A60 (TIGERLAKE) [02:03:13] [PASSED] 0x9A68 (TIGERLAKE) [02:03:13] [PASSED] 0x9A70 (TIGERLAKE) [02:03:13] [PASSED] 0x9A40 (TIGERLAKE) [02:03:13] [PASSED] 0x9A49 (TIGERLAKE) [02:03:13] [PASSED] 0x9A59 (TIGERLAKE) [02:03:13] [PASSED] 0x9A78 (TIGERLAKE) [02:03:13] [PASSED] 0x9AC0 (TIGERLAKE) [02:03:13] [PASSED] 0x9AC9 (TIGERLAKE) [02:03:13] [PASSED] 0x9AD9 (TIGERLAKE) [02:03:13] [PASSED] 0x9AF8 (TIGERLAKE) [02:03:13] [PASSED] 0x4C80 (ROCKETLAKE) [02:03:13] [PASSED] 0x4C8A (ROCKETLAKE) [02:03:13] [PASSED] 0x4C8B (ROCKETLAKE) [02:03:13] [PASSED] 0x4C8C (ROCKETLAKE) [02:03:13] [PASSED] 0x4C90 (ROCKETLAKE) [02:03:13] [PASSED] 0x4C9A (ROCKETLAKE) [02:03:13] [PASSED] 0x4680 (ALDERLAKE_S) [02:03:13] [PASSED] 0x4682 (ALDERLAKE_S) [02:03:13] [PASSED] 0x4688 (ALDERLAKE_S) [02:03:13] [PASSED] 0x468A (ALDERLAKE_S) [02:03:13] [PASSED] 0x468B (ALDERLAKE_S) [02:03:13] [PASSED] 0x4690 (ALDERLAKE_S) [02:03:13] [PASSED] 0x4692 (ALDERLAKE_S) [02:03:13] [PASSED] 0x4693 (ALDERLAKE_S) [02:03:13] [PASSED] 0x46A0 (ALDERLAKE_P) [02:03:13] [PASSED] 0x46A1 (ALDERLAKE_P) [02:03:13] [PASSED] 0x46A2 (ALDERLAKE_P) [02:03:13] [PASSED] 0x46A3 (ALDERLAKE_P) [02:03:13] [PASSED] 0x46A6 (ALDERLAKE_P) [02:03:13] [PASSED] 0x46A8 (ALDERLAKE_P) [02:03:13] [PASSED] 0x46AA (ALDERLAKE_P) [02:03:13] [PASSED] 0x462A (ALDERLAKE_P) [02:03:13] [PASSED] 0x4626 (ALDERLAKE_P) [02:03:13] [PASSED] 0x4628 (ALDERLAKE_P) [02:03:13] [PASSED] 0x46B0 (ALDERLAKE_P) [02:03:13] [PASSED] 0x46B1 (ALDERLAKE_P) [02:03:13] [PASSED] 0x46B2 (ALDERLAKE_P) [02:03:13] [PASSED] 0x46B3 (ALDERLAKE_P) [02:03:13] [PASSED] 0x46C0 (ALDERLAKE_P) [02:03:13] [PASSED] 0x46C1 (ALDERLAKE_P) [02:03:13] [PASSED] 0x46C2 (ALDERLAKE_P) [02:03:13] [PASSED] 0x46C3 (ALDERLAKE_P) [02:03:13] [PASSED] 0x46D0 (ALDERLAKE_N) [02:03:13] [PASSED] 0x46D1 (ALDERLAKE_N) [02:03:13] [PASSED] 0x46D2 (ALDERLAKE_N) [02:03:13] [PASSED] 0x46D3 (ALDERLAKE_N) [02:03:13] [PASSED] 0x46D4 (ALDERLAKE_N) [02:03:13] [PASSED] 0xA721 (ALDERLAKE_P) [02:03:13] [PASSED] 0xA7A1 (ALDERLAKE_P) [02:03:13] [PASSED] 0xA7A9 (ALDERLAKE_P) [02:03:13] [PASSED] 0xA7AC (ALDERLAKE_P) [02:03:13] [PASSED] 0xA7AD (ALDERLAKE_P) [02:03:13] [PASSED] 0xA720 (ALDERLAKE_P) [02:03:13] [PASSED] 0xA7A0 (ALDERLAKE_P) [02:03:13] [PASSED] 0xA7A8 (ALDERLAKE_P) [02:03:13] [PASSED] 0xA7AA (ALDERLAKE_P) [02:03:13] [PASSED] 0xA7AB (ALDERLAKE_P) [02:03:13] [PASSED] 0xA780 (ALDERLAKE_S) [02:03:13] [PASSED] 0xA781 (ALDERLAKE_S) [02:03:13] [PASSED] 0xA782 (ALDERLAKE_S) [02:03:13] [PASSED] 0xA783 (ALDERLAKE_S) [02:03:13] [PASSED] 0xA788 (ALDERLAKE_S) [02:03:13] [PASSED] 0xA789 (ALDERLAKE_S) [02:03:13] [PASSED] 0xA78A (ALDERLAKE_S) [02:03:13] [PASSED] 0xA78B (ALDERLAKE_S) [02:03:13] [PASSED] 0x4905 (DG1) [02:03:13] [PASSED] 0x4906 (DG1) [02:03:13] [PASSED] 0x4907 (DG1) [02:03:13] [PASSED] 0x4908 (DG1) [02:03:13] [PASSED] 0x4909 (DG1) [02:03:13] [PASSED] 0x56C0 (DG2) [02:03:13] [PASSED] 0x56C2 (DG2) [02:03:13] [PASSED] 0x56C1 (DG2) [02:03:13] [PASSED] 0x7D51 (METEORLAKE) [02:03:13] [PASSED] 0x7DD1 (METEORLAKE) [02:03:13] [PASSED] 0x7D41 (METEORLAKE) [02:03:13] [PASSED] 0x7D67 (METEORLAKE) [02:03:13] [PASSED] 0xB640 (METEORLAKE) [02:03:13] [PASSED] 0x56A0 (DG2) [02:03:13] [PASSED] 0x56A1 (DG2) [02:03:13] [PASSED] 0x56A2 (DG2) [02:03:13] [PASSED] 0x56BE (DG2) [02:03:13] [PASSED] 0x56BF (DG2) [02:03:13] [PASSED] 0x5690 (DG2) [02:03:13] [PASSED] 0x5691 (DG2) [02:03:13] [PASSED] 0x5692 (DG2) [02:03:13] [PASSED] 0x56A5 (DG2) [02:03:13] [PASSED] 0x56A6 (DG2) [02:03:13] [PASSED] 0x56B0 (DG2) [02:03:13] [PASSED] 0x56B1 (DG2) [02:03:13] [PASSED] 0x56BA (DG2) [02:03:13] [PASSED] 0x56BB (DG2) [02:03:13] [PASSED] 0x56BC (DG2) [02:03:13] [PASSED] 0x56BD (DG2) [02:03:13] [PASSED] 0x5693 (DG2) [02:03:13] [PASSED] 0x5694 (DG2) [02:03:13] [PASSED] 0x5695 (DG2) [02:03:13] [PASSED] 0x56A3 (DG2) [02:03:13] [PASSED] 0x56A4 (DG2) [02:03:13] [PASSED] 0x56B2 (DG2) [02:03:13] [PASSED] 0x56B3 (DG2) [02:03:13] [PASSED] 0x5696 (DG2) [02:03:13] [PASSED] 0x5697 (DG2) [02:03:13] [PASSED] 0xB69 (PVC) [02:03:13] [PASSED] 0xB6E (PVC) [02:03:13] [PASSED] 0xBD4 (PVC) [02:03:13] [PASSED] 0xBD5 (PVC) [02:03:13] [PASSED] 0xBD6 (PVC) [02:03:13] [PASSED] 0xBD7 (PVC) [02:03:13] [PASSED] 0xBD8 (PVC) [02:03:13] [PASSED] 0xBD9 (PVC) [02:03:13] [PASSED] 0xBDA (PVC) [02:03:13] [PASSED] 0xBDB (PVC) [02:03:13] [PASSED] 0xBE0 (PVC) [02:03:13] [PASSED] 0xBE1 (PVC) [02:03:13] [PASSED] 0xBE5 (PVC) [02:03:13] [PASSED] 0x7D40 (METEORLAKE) [02:03:13] [PASSED] 0x7D45 (METEORLAKE) [02:03:13] [PASSED] 0x7D55 (METEORLAKE) [02:03:13] [PASSED] 0x7D60 (METEORLAKE) [02:03:13] [PASSED] 0x7DD5 (METEORLAKE) [02:03:13] [PASSED] 0x6420 (LUNARLAKE) [02:03:13] [PASSED] 0x64A0 (LUNARLAKE) [02:03:13] [PASSED] 0x64B0 (LUNARLAKE) [02:03:13] [PASSED] 0xE202 (BATTLEMAGE) [02:03:13] [PASSED] 0xE209 (BATTLEMAGE) [02:03:13] [PASSED] 0xE20B (BATTLEMAGE) [02:03:13] [PASSED] 0xE20C (BATTLEMAGE) [02:03:13] [PASSED] 0xE20D (BATTLEMAGE) [02:03:13] [PASSED] 0xE210 (BATTLEMAGE) [02:03:13] [PASSED] 0xE211 (BATTLEMAGE) [02:03:13] [PASSED] 0xE212 (BATTLEMAGE) [02:03:13] [PASSED] 0xE216 (BATTLEMAGE) [02:03:13] [PASSED] 0xE220 (BATTLEMAGE) [02:03:13] [PASSED] 0xE221 (BATTLEMAGE) [02:03:13] [PASSED] 0xE222 (BATTLEMAGE) [02:03:13] [PASSED] 0xE223 (BATTLEMAGE) [02:03:13] [PASSED] 0xB080 (PANTHERLAKE) [02:03:13] [PASSED] 0xB081 (PANTHERLAKE) [02:03:13] [PASSED] 0xB082 (PANTHERLAKE) [02:03:13] [PASSED] 0xB083 (PANTHERLAKE) [02:03:13] [PASSED] 0xB084 (PANTHERLAKE) [02:03:13] [PASSED] 0xB085 (PANTHERLAKE) [02:03:13] [PASSED] 0xB086 (PANTHERLAKE) [02:03:13] [PASSED] 0xB087 (PANTHERLAKE) [02:03:13] [PASSED] 0xB08F (PANTHERLAKE) [02:03:13] [PASSED] 0xB090 (PANTHERLAKE) [02:03:13] [PASSED] 0xB0A0 (PANTHERLAKE) [02:03:13] [PASSED] 0xB0B0 (PANTHERLAKE) [02:03:13] [PASSED] 0xFD80 (PANTHERLAKE) [02:03:13] [PASSED] 0xFD81 (PANTHERLAKE) [02:03:13] ============= [PASSED] check_platform_gt_count ============= [02:03:13] ===================== [PASSED] xe_pci ====================== [02:03:13] =================== xe_rtp (2 subtests) ==================== [02:03:13] =============== xe_rtp_process_to_sr_tests ================ [02:03:13] [PASSED] coalesce-same-reg [02:03:13] [PASSED] no-match-no-add [02:03:13] [PASSED] match-or [02:03:13] [PASSED] match-or-xfail [02:03:13] [PASSED] no-match-no-add-multiple-rules [02:03:13] [PASSED] two-regs-two-entries [02:03:13] [PASSED] clr-one-set-other [02:03:13] [PASSED] set-field [02:03:13] [PASSED] conflict-duplicate [02:03:13] [PASSED] conflict-not-disjoint [02:03:13] [PASSED] conflict-reg-type [02:03:13] =========== [PASSED] xe_rtp_process_to_sr_tests ============ [02:03:13] ================== xe_rtp_process_tests =================== [02:03:13] [PASSED] active1 [02:03:13] [PASSED] active2 [02:03:13] [PASSED] active-inactive [02:03:13] [PASSED] inactive-active [02:03:13] [PASSED] inactive-1st_or_active-inactive [02:03:13] [PASSED] inactive-2nd_or_active-inactive [02:03:13] [PASSED] inactive-last_or_active-inactive [02:03:13] [PASSED] inactive-no_or_active-inactive [02:03:13] ============== [PASSED] xe_rtp_process_tests =============== [02:03:13] ===================== [PASSED] xe_rtp ====================== [02:03:13] ==================== xe_wa (1 subtest) ===================== [02:03:13] ======================== xe_wa_gt ========================= [02:03:13] [PASSED] TIGERLAKE B0 [02:03:13] [PASSED] DG1 A0 [02:03:13] [PASSED] DG1 B0 [02:03:13] [PASSED] ALDERLAKE_S A0 [02:03:13] [PASSED] ALDERLAKE_S B0 stty: 'standard input': Inappropriate ioctl for device [02:03:13] [PASSED] ALDERLAKE_S C0 [02:03:13] [PASSED] ALDERLAKE_S D0 [02:03:13] [PASSED] ALDERLAKE_P A0 [02:03:13] [PASSED] ALDERLAKE_P B0 [02:03:13] [PASSED] ALDERLAKE_P C0 [02:03:13] [PASSED] ALDERLAKE_S RPLS D0 [02:03:13] [PASSED] ALDERLAKE_P RPLU E0 [02:03:13] [PASSED] DG2 G10 C0 [02:03:13] [PASSED] DG2 G11 B1 [02:03:13] [PASSED] DG2 G12 A1 [02:03:13] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0 [02:03:13] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0 [02:03:13] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0 [02:03:13] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0 [02:03:13] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0 [02:03:13] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1 [02:03:13] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0 [02:03:13] ==================== [PASSED] xe_wa_gt ===================== [02:03:13] ====================== [PASSED] xe_wa ====================== [02:03:13] ============================================================ [02:03:13] Testing complete. Ran 306 tests: passed: 288, skipped: 18 [02:03:13] Elapsed time: 34.949s total, 4.249s configuring, 30.333s building, 0.333s running + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig [02:03:13] Configuring KUnit Kernel ... Regenerating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [02:03:14] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [02:03:39] Starting KUnit Kernel (1/1)... [02:03:39] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [02:03:39] ============ drm_test_pick_cmdline (2 subtests) ============ [02:03:39] [PASSED] drm_test_pick_cmdline_res_1920_1080_60 [02:03:39] =============== drm_test_pick_cmdline_named =============== [02:03:39] [PASSED] NTSC [02:03:39] [PASSED] NTSC-J [02:03:39] [PASSED] PAL [02:03:39] [PASSED] PAL-M [02:03:39] =========== [PASSED] drm_test_pick_cmdline_named =========== [02:03:39] ============== [PASSED] drm_test_pick_cmdline ============== [02:03:39] == drm_test_atomic_get_connector_for_encoder (1 subtest) === [02:03:39] [PASSED] drm_test_drm_atomic_get_connector_for_encoder [02:03:39] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ==== [02:03:39] =========== drm_validate_clone_mode (2 subtests) =========== [02:03:39] ============== drm_test_check_in_clone_mode =============== [02:03:39] [PASSED] in_clone_mode [02:03:39] [PASSED] not_in_clone_mode [02:03:39] ========== [PASSED] drm_test_check_in_clone_mode =========== [02:03:39] =============== drm_test_check_valid_clones =============== [02:03:39] [PASSED] not_in_clone_mode [02:03:39] [PASSED] valid_clone [02:03:39] [PASSED] invalid_clone [02:03:39] =========== [PASSED] drm_test_check_valid_clones =========== [02:03:39] ============= [PASSED] drm_validate_clone_mode ============= [02:03:39] ============= drm_validate_modeset (1 subtest) ============= [02:03:39] [PASSED] drm_test_check_connector_changed_modeset [02:03:39] ============== [PASSED] drm_validate_modeset =============== [02:03:39] ====== drm_test_bridge_get_current_state (2 subtests) ====== [02:03:39] [PASSED] drm_test_drm_bridge_get_current_state_atomic [02:03:39] [PASSED] drm_test_drm_bridge_get_current_state_legacy [02:03:39] ======== [PASSED] drm_test_bridge_get_current_state ======== [02:03:39] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ====== [02:03:39] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic [02:03:39] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled [02:03:39] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy [02:03:39] ======== [PASSED] drm_test_bridge_helper_reset_crtc ======== [02:03:39] ============== drm_bridge_alloc (2 subtests) =============== [02:03:39] [PASSED] drm_test_drm_bridge_alloc_basic [02:03:39] [PASSED] drm_test_drm_bridge_alloc_get_put [02:03:39] ================ [PASSED] drm_bridge_alloc ================= [02:03:39] ================== drm_buddy (8 subtests) ================== [02:03:39] [PASSED] drm_test_buddy_alloc_limit [02:03:39] [PASSED] drm_test_buddy_alloc_optimistic [02:03:39] [PASSED] drm_test_buddy_alloc_pessimistic [02:03:39] [PASSED] drm_test_buddy_alloc_pathological [02:03:39] [PASSED] drm_test_buddy_alloc_contiguous [02:03:39] [PASSED] drm_test_buddy_alloc_clear [02:03:39] [PASSED] drm_test_buddy_alloc_range_bias [02:03:39] [PASSED] drm_test_buddy_fragmentation_performance [02:03:39] ==================== [PASSED] drm_buddy ==================== [02:03:39] ============= drm_cmdline_parser (40 subtests) ============= [02:03:39] [PASSED] drm_test_cmdline_force_d_only [02:03:39] [PASSED] drm_test_cmdline_force_D_only_dvi [02:03:39] [PASSED] drm_test_cmdline_force_D_only_hdmi [02:03:39] [PASSED] drm_test_cmdline_force_D_only_not_digital [02:03:39] [PASSED] drm_test_cmdline_force_e_only [02:03:39] [PASSED] drm_test_cmdline_res [02:03:39] [PASSED] drm_test_cmdline_res_vesa [02:03:39] [PASSED] drm_test_cmdline_res_vesa_rblank [02:03:39] [PASSED] drm_test_cmdline_res_rblank [02:03:39] [PASSED] drm_test_cmdline_res_bpp [02:03:39] [PASSED] drm_test_cmdline_res_refresh [02:03:39] [PASSED] drm_test_cmdline_res_bpp_refresh [02:03:39] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced [02:03:39] [PASSED] drm_test_cmdline_res_bpp_refresh_margins [02:03:39] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off [02:03:39] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on [02:03:39] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog [02:03:39] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital [02:03:39] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on [02:03:39] [PASSED] drm_test_cmdline_res_margins_force_on [02:03:39] [PASSED] drm_test_cmdline_res_vesa_margins [02:03:39] [PASSED] drm_test_cmdline_name [02:03:39] [PASSED] drm_test_cmdline_name_bpp [02:03:39] [PASSED] drm_test_cmdline_name_option [02:03:39] [PASSED] drm_test_cmdline_name_bpp_option [02:03:39] [PASSED] drm_test_cmdline_rotate_0 [02:03:39] [PASSED] drm_test_cmdline_rotate_90 [02:03:39] [PASSED] drm_test_cmdline_rotate_180 [02:03:39] [PASSED] drm_test_cmdline_rotate_270 [02:03:39] [PASSED] drm_test_cmdline_hmirror [02:03:39] [PASSED] drm_test_cmdline_vmirror [02:03:39] [PASSED] drm_test_cmdline_margin_options [02:03:40] [PASSED] drm_test_cmdline_multiple_options [02:03:40] [PASSED] drm_test_cmdline_bpp_extra_and_option [02:03:40] [PASSED] drm_test_cmdline_extra_and_option [02:03:40] [PASSED] drm_test_cmdline_freestanding_options [02:03:40] [PASSED] drm_test_cmdline_freestanding_force_e_and_options [02:03:40] [PASSED] drm_test_cmdline_panel_orientation [02:03:40] ================ drm_test_cmdline_invalid ================= [02:03:40] [PASSED] margin_only [02:03:40] [PASSED] interlace_only [02:03:40] [PASSED] res_missing_x [02:03:40] [PASSED] res_missing_y [02:03:40] [PASSED] res_bad_y [02:03:40] [PASSED] res_missing_y_bpp [02:03:40] [PASSED] res_bad_bpp [02:03:40] [PASSED] res_bad_refresh [02:03:40] [PASSED] res_bpp_refresh_force_on_off [02:03:40] [PASSED] res_invalid_mode [02:03:40] [PASSED] res_bpp_wrong_place_mode [02:03:40] [PASSED] name_bpp_refresh [02:03:40] [PASSED] name_refresh [02:03:40] [PASSED] name_refresh_wrong_mode [02:03:40] [PASSED] name_refresh_invalid_mode [02:03:40] [PASSED] rotate_multiple [02:03:40] [PASSED] rotate_invalid_val [02:03:40] [PASSED] rotate_truncated [02:03:40] [PASSED] invalid_option [02:03:40] [PASSED] invalid_tv_option [02:03:40] [PASSED] truncated_tv_option [02:03:40] ============ [PASSED] drm_test_cmdline_invalid ============= [02:03:40] =============== drm_test_cmdline_tv_options =============== [02:03:40] [PASSED] NTSC [02:03:40] [PASSED] NTSC_443 [02:03:40] [PASSED] NTSC_J [02:03:40] [PASSED] PAL [02:03:40] [PASSED] PAL_M [02:03:40] [PASSED] PAL_N [02:03:40] [PASSED] SECAM [02:03:40] [PASSED] MONO_525 [02:03:40] [PASSED] MONO_625 [02:03:40] =========== [PASSED] drm_test_cmdline_tv_options =========== [02:03:40] =============== [PASSED] drm_cmdline_parser ================ [02:03:40] ========== drmm_connector_hdmi_init (20 subtests) ========== [02:03:40] [PASSED] drm_test_connector_hdmi_init_valid [02:03:40] [PASSED] drm_test_connector_hdmi_init_bpc_8 [02:03:40] [PASSED] drm_test_connector_hdmi_init_bpc_10 [02:03:40] [PASSED] drm_test_connector_hdmi_init_bpc_12 [02:03:40] [PASSED] drm_test_connector_hdmi_init_bpc_invalid [02:03:40] [PASSED] drm_test_connector_hdmi_init_bpc_null [02:03:40] [PASSED] drm_test_connector_hdmi_init_formats_empty [02:03:40] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb [02:03:40] === drm_test_connector_hdmi_init_formats_yuv420_allowed === [02:03:40] [PASSED] supported_formats=0x9 yuv420_allowed=1 [02:03:40] [PASSED] supported_formats=0x9 yuv420_allowed=0 [02:03:40] [PASSED] supported_formats=0x3 yuv420_allowed=1 [02:03:40] [PASSED] supported_formats=0x3 yuv420_allowed=0 [02:03:40] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed === [02:03:40] [PASSED] drm_test_connector_hdmi_init_null_ddc [02:03:40] [PASSED] drm_test_connector_hdmi_init_null_product [02:03:40] [PASSED] drm_test_connector_hdmi_init_null_vendor [02:03:40] [PASSED] drm_test_connector_hdmi_init_product_length_exact [02:03:40] [PASSED] drm_test_connector_hdmi_init_product_length_too_long [02:03:40] [PASSED] drm_test_connector_hdmi_init_product_valid [02:03:40] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact [02:03:40] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long [02:03:40] [PASSED] drm_test_connector_hdmi_init_vendor_valid [02:03:40] ========= drm_test_connector_hdmi_init_type_valid ========= [02:03:40] [PASSED] HDMI-A [02:03:40] [PASSED] HDMI-B [02:03:40] ===== [PASSED] drm_test_connector_hdmi_init_type_valid ===== [02:03:40] ======== drm_test_connector_hdmi_init_type_invalid ======== [02:03:40] [PASSED] Unknown [02:03:40] [PASSED] VGA [02:03:40] [PASSED] DVI-I [02:03:40] [PASSED] DVI-D [02:03:40] [PASSED] DVI-A [02:03:40] [PASSED] Composite [02:03:40] [PASSED] SVIDEO [02:03:40] [PASSED] LVDS [02:03:40] [PASSED] Component [02:03:40] [PASSED] DIN [02:03:40] [PASSED] DP [02:03:40] [PASSED] TV [02:03:40] [PASSED] eDP [02:03:40] [PASSED] Virtual [02:03:40] [PASSED] DSI [02:03:40] [PASSED] DPI [02:03:40] [PASSED] Writeback [02:03:40] [PASSED] SPI [02:03:40] [PASSED] USB [02:03:40] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ==== [02:03:40] ============ [PASSED] drmm_connector_hdmi_init ============= [02:03:40] ============= drmm_connector_init (3 subtests) ============= [02:03:40] [PASSED] drm_test_drmm_connector_init [02:03:40] [PASSED] drm_test_drmm_connector_init_null_ddc [02:03:40] ========= drm_test_drmm_connector_init_type_valid ========= [02:03:40] [PASSED] Unknown [02:03:40] [PASSED] VGA [02:03:40] [PASSED] DVI-I [02:03:40] [PASSED] DVI-D [02:03:40] [PASSED] DVI-A [02:03:40] [PASSED] Composite [02:03:40] [PASSED] SVIDEO [02:03:40] [PASSED] LVDS [02:03:40] [PASSED] Component [02:03:40] [PASSED] DIN [02:03:40] [PASSED] DP [02:03:40] [PASSED] HDMI-A [02:03:40] [PASSED] HDMI-B [02:03:40] [PASSED] TV [02:03:40] [PASSED] eDP [02:03:40] [PASSED] Virtual [02:03:40] [PASSED] DSI [02:03:40] [PASSED] DPI [02:03:40] [PASSED] Writeback [02:03:40] [PASSED] SPI [02:03:40] [PASSED] USB [02:03:40] ===== [PASSED] drm_test_drmm_connector_init_type_valid ===== [02:03:40] =============== [PASSED] drmm_connector_init =============== [02:03:40] ========= drm_connector_dynamic_init (6 subtests) ========== [02:03:40] [PASSED] drm_test_drm_connector_dynamic_init [02:03:40] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc [02:03:40] [PASSED] drm_test_drm_connector_dynamic_init_not_added [02:03:40] [PASSED] drm_test_drm_connector_dynamic_init_properties [02:03:40] ===== drm_test_drm_connector_dynamic_init_type_valid ====== [02:03:40] [PASSED] Unknown [02:03:40] [PASSED] VGA [02:03:40] [PASSED] DVI-I [02:03:40] [PASSED] DVI-D [02:03:40] [PASSED] DVI-A [02:03:40] [PASSED] Composite [02:03:40] [PASSED] SVIDEO [02:03:40] [PASSED] LVDS [02:03:40] [PASSED] Component [02:03:40] [PASSED] DIN [02:03:40] [PASSED] DP [02:03:40] [PASSED] HDMI-A [02:03:40] [PASSED] HDMI-B [02:03:40] [PASSED] TV [02:03:40] [PASSED] eDP [02:03:40] [PASSED] Virtual [02:03:40] [PASSED] DSI [02:03:40] [PASSED] DPI [02:03:40] [PASSED] Writeback [02:03:40] [PASSED] SPI [02:03:40] [PASSED] USB [02:03:40] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid == [02:03:40] ======== drm_test_drm_connector_dynamic_init_name ========= [02:03:40] [PASSED] Unknown [02:03:40] [PASSED] VGA [02:03:40] [PASSED] DVI-I [02:03:40] [PASSED] DVI-D [02:03:40] [PASSED] DVI-A [02:03:40] [PASSED] Composite [02:03:40] [PASSED] SVIDEO [02:03:40] [PASSED] LVDS [02:03:40] [PASSED] Component [02:03:40] [PASSED] DIN [02:03:40] [PASSED] DP [02:03:40] [PASSED] HDMI-A [02:03:40] [PASSED] HDMI-B [02:03:40] [PASSED] TV [02:03:40] [PASSED] eDP [02:03:40] [PASSED] Virtual [02:03:40] [PASSED] DSI [02:03:40] [PASSED] DPI [02:03:40] [PASSED] Writeback [02:03:40] [PASSED] SPI [02:03:40] [PASSED] USB [02:03:40] ==== [PASSED] drm_test_drm_connector_dynamic_init_name ===== [02:03:40] =========== [PASSED] drm_connector_dynamic_init ============ [02:03:40] ==== drm_connector_dynamic_register_early (4 subtests) ===== [02:03:40] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list [02:03:40] [PASSED] drm_test_drm_connector_dynamic_register_early_defer [02:03:40] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init [02:03:40] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object [02:03:40] ====== [PASSED] drm_connector_dynamic_register_early ======= [02:03:40] ======= drm_connector_dynamic_register (7 subtests) ======== [02:03:40] [PASSED] drm_test_drm_connector_dynamic_register_on_list [02:03:40] [PASSED] drm_test_drm_connector_dynamic_register_no_defer [02:03:40] [PASSED] drm_test_drm_connector_dynamic_register_no_init [02:03:40] [PASSED] drm_test_drm_connector_dynamic_register_mode_object [02:03:40] [PASSED] drm_test_drm_connector_dynamic_register_sysfs [02:03:40] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name [02:03:40] [PASSED] drm_test_drm_connector_dynamic_register_debugfs [02:03:40] ========= [PASSED] drm_connector_dynamic_register ========== [02:03:40] = drm_connector_attach_broadcast_rgb_property (2 subtests) = [02:03:40] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property [02:03:40] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector [02:03:40] === [PASSED] drm_connector_attach_broadcast_rgb_property === [02:03:40] ========== drm_get_tv_mode_from_name (2 subtests) ========== [02:03:40] ========== drm_test_get_tv_mode_from_name_valid =========== [02:03:40] [PASSED] NTSC [02:03:40] [PASSED] NTSC-443 [02:03:40] [PASSED] NTSC-J [02:03:40] [PASSED] PAL [02:03:40] [PASSED] PAL-M [02:03:40] [PASSED] PAL-N [02:03:40] [PASSED] SECAM [02:03:40] [PASSED] Mono [02:03:40] ====== [PASSED] drm_test_get_tv_mode_from_name_valid ======= [02:03:40] [PASSED] drm_test_get_tv_mode_from_name_truncated [02:03:40] ============ [PASSED] drm_get_tv_mode_from_name ============ [02:03:40] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) = [02:03:40] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb [02:03:40] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc [02:03:40] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1 [02:03:40] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc [02:03:40] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1 [02:03:40] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double [02:03:40] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid = [02:03:40] [PASSED] VIC 96 [02:03:40] [PASSED] VIC 97 [02:03:40] [PASSED] VIC 101 [02:03:40] [PASSED] VIC 102 [02:03:40] [PASSED] VIC 106 [02:03:40] [PASSED] VIC 107 [02:03:40] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid === [02:03:40] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc [02:03:40] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc [02:03:40] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc [02:03:40] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc [02:03:40] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc [02:03:40] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ==== [02:03:40] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) == [02:03:40] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ==== [02:03:40] [PASSED] Automatic [02:03:40] [PASSED] Full [02:03:40] [PASSED] Limited 16:235 [02:03:40] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name === [02:03:40] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid [02:03:40] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ==== [02:03:40] == drm_hdmi_connector_get_output_format_name (2 subtests) == [02:03:40] === drm_test_drm_hdmi_connector_get_output_format_name ==== [02:03:40] [PASSED] RGB [02:03:40] [PASSED] YUV 4:2:0 [02:03:40] [PASSED] YUV 4:2:2 [02:03:40] [PASSED] YUV 4:4:4 [02:03:40] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name === [02:03:40] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid [02:03:40] ==== [PASSED] drm_hdmi_connector_get_output_format_name ==== [02:03:40] ============= drm_damage_helper (21 subtests) ============== [02:03:40] [PASSED] drm_test_damage_iter_no_damage [02:03:40] [PASSED] drm_test_damage_iter_no_damage_fractional_src [02:03:40] [PASSED] drm_test_damage_iter_no_damage_src_moved [02:03:40] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved [02:03:40] [PASSED] drm_test_damage_iter_no_damage_not_visible [02:03:40] [PASSED] drm_test_damage_iter_no_damage_no_crtc [02:03:40] [PASSED] drm_test_damage_iter_no_damage_no_fb [02:03:40] [PASSED] drm_test_damage_iter_simple_damage [02:03:40] [PASSED] drm_test_damage_iter_single_damage [02:03:40] [PASSED] drm_test_damage_iter_single_damage_intersect_src [02:03:40] [PASSED] drm_test_damage_iter_single_damage_outside_src [02:03:40] [PASSED] drm_test_damage_iter_single_damage_fractional_src [02:03:40] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src [02:03:40] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src [02:03:40] [PASSED] drm_test_damage_iter_single_damage_src_moved [02:03:40] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved [02:03:40] [PASSED] drm_test_damage_iter_damage [02:03:40] [PASSED] drm_test_damage_iter_damage_one_intersect [02:03:40] [PASSED] drm_test_damage_iter_damage_one_outside [02:03:40] [PASSED] drm_test_damage_iter_damage_src_moved [02:03:40] [PASSED] drm_test_damage_iter_damage_not_visible [02:03:40] ================ [PASSED] drm_damage_helper ================ [02:03:40] ============== drm_dp_mst_helper (3 subtests) ============== [02:03:40] ============== drm_test_dp_mst_calc_pbn_mode ============== [02:03:40] [PASSED] Clock 154000 BPP 30 DSC disabled [02:03:40] [PASSED] Clock 234000 BPP 30 DSC disabled [02:03:40] [PASSED] Clock 297000 BPP 24 DSC disabled [02:03:40] [PASSED] Clock 332880 BPP 24 DSC enabled [02:03:40] [PASSED] Clock 324540 BPP 24 DSC enabled [02:03:40] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ========== [02:03:40] ============== drm_test_dp_mst_calc_pbn_div =============== [02:03:40] [PASSED] Link rate 2000000 lane count 4 [02:03:40] [PASSED] Link rate 2000000 lane count 2 [02:03:40] [PASSED] Link rate 2000000 lane count 1 [02:03:40] [PASSED] Link rate 1350000 lane count 4 [02:03:40] [PASSED] Link rate 1350000 lane count 2 [02:03:40] [PASSED] Link rate 1350000 lane count 1 [02:03:40] [PASSED] Link rate 1000000 lane count 4 [02:03:40] [PASSED] Link rate 1000000 lane count 2 [02:03:40] [PASSED] Link rate 1000000 lane count 1 [02:03:40] [PASSED] Link rate 810000 lane count 4 [02:03:40] [PASSED] Link rate 810000 lane count 2 [02:03:40] [PASSED] Link rate 810000 lane count 1 [02:03:40] [PASSED] Link rate 540000 lane count 4 [02:03:40] [PASSED] Link rate 540000 lane count 2 [02:03:40] [PASSED] Link rate 540000 lane count 1 [02:03:40] [PASSED] Link rate 270000 lane count 4 [02:03:40] [PASSED] Link rate 270000 lane count 2 [02:03:40] [PASSED] Link rate 270000 lane count 1 [02:03:40] [PASSED] Link rate 162000 lane count 4 [02:03:40] [PASSED] Link rate 162000 lane count 2 [02:03:40] [PASSED] Link rate 162000 lane count 1 [02:03:40] ========== [PASSED] drm_test_dp_mst_calc_pbn_div =========== [02:03:40] ========= drm_test_dp_mst_sideband_msg_req_decode ========= [02:03:40] [PASSED] DP_ENUM_PATH_RESOURCES with port number [02:03:40] [PASSED] DP_POWER_UP_PHY with port number [02:03:40] [PASSED] DP_POWER_DOWN_PHY with port number [02:03:40] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks [02:03:40] [PASSED] DP_ALLOCATE_PAYLOAD with port number [02:03:40] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI [02:03:40] [PASSED] DP_ALLOCATE_PAYLOAD with PBN [02:03:40] [PASSED] DP_QUERY_PAYLOAD with port number [02:03:40] [PASSED] DP_QUERY_PAYLOAD with VCPI [02:03:40] [PASSED] DP_REMOTE_DPCD_READ with port number [02:03:40] [PASSED] DP_REMOTE_DPCD_READ with DPCD address [02:03:40] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes [02:03:40] [PASSED] DP_REMOTE_DPCD_WRITE with port number [02:03:40] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address [02:03:40] [PASSED] DP_REMOTE_DPCD_WRITE with data array [02:03:40] [PASSED] DP_REMOTE_I2C_READ with port number [02:03:40] [PASSED] DP_REMOTE_I2C_READ with I2C device ID [02:03:40] [PASSED] DP_REMOTE_I2C_READ with transactions array [02:03:40] [PASSED] DP_REMOTE_I2C_WRITE with port number [02:03:40] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID [02:03:40] [PASSED] DP_REMOTE_I2C_WRITE with data array [02:03:40] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID [02:03:40] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID [02:03:40] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event [02:03:40] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event [02:03:40] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior [02:03:40] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior [02:03:40] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode ===== [02:03:40] ================ [PASSED] drm_dp_mst_helper ================ [02:03:40] ================== drm_exec (7 subtests) =================== [02:03:40] [PASSED] sanitycheck [02:03:40] [PASSED] test_lock [02:03:40] [PASSED] test_lock_unlock [02:03:40] [PASSED] test_duplicates [02:03:40] [PASSED] test_prepare [02:03:40] [PASSED] test_prepare_array [02:03:40] [PASSED] test_multiple_loops [02:03:40] ==================== [PASSED] drm_exec ===================== [02:03:40] =========== drm_format_helper_test (17 subtests) =========== [02:03:40] ============== drm_test_fb_xrgb8888_to_gray8 ============== [02:03:40] [PASSED] single_pixel_source_buffer [02:03:40] [PASSED] single_pixel_clip_rectangle [02:03:40] [PASSED] well_known_colors [02:03:40] [PASSED] destination_pitch [02:03:40] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ========== [02:03:40] ============= drm_test_fb_xrgb8888_to_rgb332 ============== [02:03:40] [PASSED] single_pixel_source_buffer [02:03:40] [PASSED] single_pixel_clip_rectangle [02:03:40] [PASSED] well_known_colors [02:03:40] [PASSED] destination_pitch [02:03:40] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ========== [02:03:40] ============= drm_test_fb_xrgb8888_to_rgb565 ============== [02:03:40] [PASSED] single_pixel_source_buffer [02:03:40] [PASSED] single_pixel_clip_rectangle [02:03:40] [PASSED] well_known_colors [02:03:40] [PASSED] destination_pitch [02:03:40] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ========== [02:03:40] ============ drm_test_fb_xrgb8888_to_xrgb1555 ============= [02:03:40] [PASSED] single_pixel_source_buffer [02:03:40] [PASSED] single_pixel_clip_rectangle [02:03:40] [PASSED] well_known_colors [02:03:40] [PASSED] destination_pitch [02:03:40] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 ========= [02:03:40] ============ drm_test_fb_xrgb8888_to_argb1555 ============= [02:03:40] [PASSED] single_pixel_source_buffer [02:03:40] [PASSED] single_pixel_clip_rectangle [02:03:40] [PASSED] well_known_colors [02:03:40] [PASSED] destination_pitch [02:03:40] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 ========= [02:03:40] ============ drm_test_fb_xrgb8888_to_rgba5551 ============= [02:03:40] [PASSED] single_pixel_source_buffer [02:03:40] [PASSED] single_pixel_clip_rectangle [02:03:40] [PASSED] well_known_colors [02:03:40] [PASSED] destination_pitch [02:03:40] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 ========= [02:03:40] ============= drm_test_fb_xrgb8888_to_rgb888 ============== [02:03:40] [PASSED] single_pixel_source_buffer [02:03:40] [PASSED] single_pixel_clip_rectangle [02:03:40] [PASSED] well_known_colors [02:03:40] [PASSED] destination_pitch [02:03:40] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ========== [02:03:40] ============= drm_test_fb_xrgb8888_to_bgr888 ============== [02:03:40] [PASSED] single_pixel_source_buffer [02:03:40] [PASSED] single_pixel_clip_rectangle [02:03:40] [PASSED] well_known_colors [02:03:40] [PASSED] destination_pitch [02:03:40] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ========== [02:03:40] ============ drm_test_fb_xrgb8888_to_argb8888 ============= [02:03:40] [PASSED] single_pixel_source_buffer [02:03:40] [PASSED] single_pixel_clip_rectangle [02:03:40] [PASSED] well_known_colors [02:03:40] [PASSED] destination_pitch [02:03:40] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 ========= [02:03:40] =========== drm_test_fb_xrgb8888_to_xrgb2101010 =========== [02:03:40] [PASSED] single_pixel_source_buffer [02:03:40] [PASSED] single_pixel_clip_rectangle [02:03:40] [PASSED] well_known_colors [02:03:40] [PASSED] destination_pitch [02:03:40] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 ======= [02:03:40] =========== drm_test_fb_xrgb8888_to_argb2101010 =========== [02:03:40] [PASSED] single_pixel_source_buffer [02:03:40] [PASSED] single_pixel_clip_rectangle [02:03:40] [PASSED] well_known_colors [02:03:40] [PASSED] destination_pitch [02:03:40] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 ======= [02:03:40] ============== drm_test_fb_xrgb8888_to_mono =============== [02:03:40] [PASSED] single_pixel_source_buffer [02:03:40] [PASSED] single_pixel_clip_rectangle [02:03:40] [PASSED] well_known_colors [02:03:40] [PASSED] destination_pitch [02:03:40] ========== [PASSED] drm_test_fb_xrgb8888_to_mono =========== [02:03:40] ==================== drm_test_fb_swab ===================== [02:03:40] [PASSED] single_pixel_source_buffer [02:03:40] [PASSED] single_pixel_clip_rectangle [02:03:40] [PASSED] well_known_colors [02:03:40] [PASSED] destination_pitch [02:03:40] ================ [PASSED] drm_test_fb_swab ================= [02:03:40] ============ drm_test_fb_xrgb8888_to_xbgr8888 ============= [02:03:40] [PASSED] single_pixel_source_buffer [02:03:40] [PASSED] single_pixel_clip_rectangle [02:03:40] [PASSED] well_known_colors [02:03:40] [PASSED] destination_pitch [02:03:40] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 ========= [02:03:40] ============ drm_test_fb_xrgb8888_to_abgr8888 ============= [02:03:40] [PASSED] single_pixel_source_buffer [02:03:40] [PASSED] single_pixel_clip_rectangle [02:03:40] [PASSED] well_known_colors [02:03:40] [PASSED] destination_pitch [02:03:40] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 ========= [02:03:40] ================= drm_test_fb_clip_offset ================= [02:03:40] [PASSED] pass through [02:03:40] [PASSED] horizontal offset [02:03:40] [PASSED] vertical offset [02:03:40] [PASSED] horizontal and vertical offset [02:03:40] [PASSED] horizontal offset (custom pitch) [02:03:40] [PASSED] vertical offset (custom pitch) [02:03:40] [PASSED] horizontal and vertical offset (custom pitch) [02:03:40] ============= [PASSED] drm_test_fb_clip_offset ============= [02:03:40] =================== drm_test_fb_memcpy ==================== [02:03:40] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258) [02:03:40] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258) [02:03:40] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559) [02:03:40] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258) [02:03:40] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258) [02:03:40] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559) [02:03:40] [PASSED] well_known_colors: XB24 little-endian (0x34324258) [02:03:40] [PASSED] well_known_colors: XRA8 little-endian (0x38415258) [02:03:40] [PASSED] well_known_colors: YU24 little-endian (0x34325559) [02:03:40] [PASSED] destination_pitch: XB24 little-endian (0x34324258) [02:03:40] [PASSED] destination_pitch: XRA8 little-endian (0x38415258) [02:03:40] [PASSED] destination_pitch: YU24 little-endian (0x34325559) [02:03:40] =============== [PASSED] drm_test_fb_memcpy ================ [02:03:40] ============= [PASSED] drm_format_helper_test ============== [02:03:40] ================= drm_format (18 subtests) ================= [02:03:40] [PASSED] drm_test_format_block_width_invalid [02:03:40] [PASSED] drm_test_format_block_width_one_plane [02:03:40] [PASSED] drm_test_format_block_width_two_plane [02:03:40] [PASSED] drm_test_format_block_width_three_plane [02:03:40] [PASSED] drm_test_format_block_width_tiled [02:03:40] [PASSED] drm_test_format_block_height_invalid [02:03:40] [PASSED] drm_test_format_block_height_one_plane [02:03:40] [PASSED] drm_test_format_block_height_two_plane [02:03:40] [PASSED] drm_test_format_block_height_three_plane [02:03:40] [PASSED] drm_test_format_block_height_tiled [02:03:40] [PASSED] drm_test_format_min_pitch_invalid [02:03:40] [PASSED] drm_test_format_min_pitch_one_plane_8bpp [02:03:40] [PASSED] drm_test_format_min_pitch_one_plane_16bpp [02:03:40] [PASSED] drm_test_format_min_pitch_one_plane_24bpp [02:03:40] [PASSED] drm_test_format_min_pitch_one_plane_32bpp [02:03:40] [PASSED] drm_test_format_min_pitch_two_plane [02:03:40] [PASSED] drm_test_format_min_pitch_three_plane_8bpp [02:03:40] [PASSED] drm_test_format_min_pitch_tiled [02:03:40] =================== [PASSED] drm_format ==================== [02:03:40] ============== drm_framebuffer (10 subtests) =============== [02:03:40] ========== drm_test_framebuffer_check_src_coords ========== [02:03:40] [PASSED] Success: source fits into fb [02:03:40] [PASSED] Fail: overflowing fb with x-axis coordinate [02:03:40] [PASSED] Fail: overflowing fb with y-axis coordinate [02:03:40] [PASSED] Fail: overflowing fb with source width [02:03:40] [PASSED] Fail: overflowing fb with source height [02:03:40] ====== [PASSED] drm_test_framebuffer_check_src_coords ====== [02:03:40] [PASSED] drm_test_framebuffer_cleanup [02:03:40] =============== drm_test_framebuffer_create =============== [02:03:40] [PASSED] ABGR8888 normal sizes [02:03:40] [PASSED] ABGR8888 max sizes [02:03:40] [PASSED] ABGR8888 pitch greater than min required [02:03:40] [PASSED] ABGR8888 pitch less than min required [02:03:40] [PASSED] ABGR8888 Invalid width [02:03:40] [PASSED] ABGR8888 Invalid buffer handle [02:03:40] [PASSED] No pixel format [02:03:40] [PASSED] ABGR8888 Width 0 [02:03:40] [PASSED] ABGR8888 Height 0 [02:03:40] [PASSED] ABGR8888 Out of bound height * pitch combination [02:03:40] [PASSED] ABGR8888 Large buffer offset [02:03:40] [PASSED] ABGR8888 Buffer offset for inexistent plane [02:03:40] [PASSED] ABGR8888 Invalid flag [02:03:40] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers [02:03:40] [PASSED] ABGR8888 Valid buffer modifier [02:03:40] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE) [02:03:40] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS [02:03:40] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS [02:03:40] [PASSED] NV12 Normal sizes [02:03:40] [PASSED] NV12 Max sizes [02:03:40] [PASSED] NV12 Invalid pitch [02:03:40] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag [02:03:40] [PASSED] NV12 different modifier per-plane [02:03:40] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE [02:03:40] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS [02:03:40] [PASSED] NV12 Modifier for inexistent plane [02:03:40] [PASSED] NV12 Handle for inexistent plane [02:03:40] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS [02:03:40] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier [02:03:40] [PASSED] YVU420 Normal sizes [02:03:40] [PASSED] YVU420 Max sizes [02:03:40] [PASSED] YVU420 Invalid pitch [02:03:40] [PASSED] YVU420 Different pitches [02:03:40] [PASSED] YVU420 Different buffer offsets/pitches [02:03:40] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS [02:03:40] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS [02:03:40] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS [02:03:40] [PASSED] YVU420 Valid modifier [02:03:40] [PASSED] YVU420 Different modifiers per plane [02:03:40] [PASSED] YVU420 Modifier for inexistent plane [02:03:40] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR) [02:03:40] [PASSED] X0L2 Normal sizes [02:03:40] [PASSED] X0L2 Max sizes [02:03:40] [PASSED] X0L2 Invalid pitch [02:03:40] [PASSED] X0L2 Pitch greater than minimum required [02:03:40] [PASSED] X0L2 Handle for inexistent plane [02:03:40] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set [02:03:40] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set [02:03:40] [PASSED] X0L2 Valid modifier [02:03:40] [PASSED] X0L2 Modifier for inexistent plane [02:03:40] =========== [PASSED] drm_test_framebuffer_create =========== [02:03:40] [PASSED] drm_test_framebuffer_free [02:03:40] [PASSED] drm_test_framebuffer_init [02:03:40] [PASSED] drm_test_framebuffer_init_bad_format [02:03:40] [PASSED] drm_test_framebuffer_init_dev_mismatch [02:03:40] [PASSED] drm_test_framebuffer_lookup [02:03:40] [PASSED] drm_test_framebuffer_lookup_inexistent [02:03:40] [PASSED] drm_test_framebuffer_modifiers_not_supported [02:03:40] ================= [PASSED] drm_framebuffer ================= [02:03:40] ================ drm_gem_shmem (8 subtests) ================ [02:03:40] [PASSED] drm_gem_shmem_test_obj_create [02:03:40] [PASSED] drm_gem_shmem_test_obj_create_private [02:03:40] [PASSED] drm_gem_shmem_test_pin_pages [02:03:40] [PASSED] drm_gem_shmem_test_vmap [02:03:40] [PASSED] drm_gem_shmem_test_get_pages_sgt [02:03:40] [PASSED] drm_gem_shmem_test_get_sg_table [02:03:40] [PASSED] drm_gem_shmem_test_madvise [02:03:40] [PASSED] drm_gem_shmem_test_purge [02:03:40] ================== [PASSED] drm_gem_shmem ================== [02:03:40] === drm_atomic_helper_connector_hdmi_check (27 subtests) === [02:03:40] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode [02:03:40] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1 [02:03:40] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode [02:03:40] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1 [02:03:40] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode [02:03:40] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1 [02:03:40] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 ======= [02:03:40] [PASSED] Automatic [02:03:40] [PASSED] Full [02:03:40] [PASSED] Limited 16:235 [02:03:40] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 === [02:03:40] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed [02:03:40] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed [02:03:40] [PASSED] drm_test_check_disable_connector [02:03:40] [PASSED] drm_test_check_hdmi_funcs_reject_rate [02:03:40] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb [02:03:40] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420 [02:03:40] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422 [02:03:40] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420 [02:03:40] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420 [02:03:40] [PASSED] drm_test_check_output_bpc_crtc_mode_changed [02:03:40] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed [02:03:40] [PASSED] drm_test_check_output_bpc_dvi [02:03:40] [PASSED] drm_test_check_output_bpc_format_vic_1 [02:03:40] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only [02:03:40] [PASSED] drm_test_check_output_bpc_format_display_rgb_only [02:03:40] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only [02:03:40] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only [02:03:40] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc [02:03:40] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc [02:03:40] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc [02:03:40] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ====== [02:03:40] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ==== [02:03:40] [PASSED] drm_test_check_broadcast_rgb_value [02:03:40] [PASSED] drm_test_check_bpc_8_value [02:03:40] [PASSED] drm_test_check_bpc_10_value [02:03:40] [PASSED] drm_test_check_bpc_12_value [02:03:40] [PASSED] drm_test_check_format_value [02:03:40] [PASSED] drm_test_check_tmds_char_value [02:03:40] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ====== [02:03:40] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) = [02:03:40] [PASSED] drm_test_check_mode_valid [02:03:40] [PASSED] drm_test_check_mode_valid_reject [02:03:40] [PASSED] drm_test_check_mode_valid_reject_rate [02:03:40] [PASSED] drm_test_check_mode_valid_reject_max_clock [02:03:40] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid === [02:03:40] ================= drm_managed (2 subtests) ================= [02:03:40] [PASSED] drm_test_managed_release_action [02:03:40] [PASSED] drm_test_managed_run_action [02:03:40] =================== [PASSED] drm_managed =================== [02:03:40] =================== drm_mm (6 subtests) ==================== [02:03:40] [PASSED] drm_test_mm_init [02:03:40] [PASSED] drm_test_mm_debug [02:03:40] [PASSED] drm_test_mm_align32 [02:03:40] [PASSED] drm_test_mm_align64 [02:03:40] [PASSED] drm_test_mm_lowest [02:03:40] [PASSED] drm_test_mm_highest [02:03:40] ===================== [PASSED] drm_mm ====================== [02:03:40] ============= drm_modes_analog_tv (5 subtests) ============= [02:03:40] [PASSED] drm_test_modes_analog_tv_mono_576i [02:03:40] [PASSED] drm_test_modes_analog_tv_ntsc_480i [02:03:40] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined [02:03:40] [PASSED] drm_test_modes_analog_tv_pal_576i [02:03:40] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined [02:03:40] =============== [PASSED] drm_modes_analog_tv =============== [02:03:40] ============== drm_plane_helper (2 subtests) =============== [02:03:40] =============== drm_test_check_plane_state ================ [02:03:40] [PASSED] clipping_simple [02:03:40] [PASSED] clipping_rotate_reflect [02:03:40] [PASSED] positioning_simple [02:03:40] [PASSED] upscaling [02:03:40] [PASSED] downscaling [02:03:40] [PASSED] rounding1 [02:03:40] [PASSED] rounding2 [02:03:40] [PASSED] rounding3 [02:03:40] [PASSED] rounding4 [02:03:40] =========== [PASSED] drm_test_check_plane_state ============ [02:03:40] =========== drm_test_check_invalid_plane_state ============ [02:03:40] [PASSED] positioning_invalid [02:03:40] [PASSED] upscaling_invalid [02:03:40] [PASSED] downscaling_invalid [02:03:40] ======= [PASSED] drm_test_check_invalid_plane_state ======== [02:03:40] ================ [PASSED] drm_plane_helper ================= [02:03:40] ====== drm_connector_helper_tv_get_modes (1 subtest) ======= [02:03:40] ====== drm_test_connector_helper_tv_get_modes_check ======= [02:03:40] [PASSED] None [02:03:40] [PASSED] PAL [02:03:40] [PASSED] NTSC [02:03:40] [PASSED] Both, NTSC Default [02:03:40] [PASSED] Both, PAL Default [02:03:40] [PASSED] Both, NTSC Default, with PAL on command-line [02:03:40] [PASSED] Both, PAL Default, with NTSC on command-line [02:03:40] == [PASSED] drm_test_connector_helper_tv_get_modes_check === [02:03:40] ======== [PASSED] drm_connector_helper_tv_get_modes ======== [02:03:40] ================== drm_rect (9 subtests) =================== [02:03:40] [PASSED] drm_test_rect_clip_scaled_div_by_zero [02:03:40] [PASSED] drm_test_rect_clip_scaled_not_clipped [02:03:40] [PASSED] drm_test_rect_clip_scaled_clipped [02:03:40] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned [02:03:40] ================= drm_test_rect_intersect ================= [02:03:40] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0 [02:03:40] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1 [02:03:40] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0 [02:03:40] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1 [02:03:40] [PASSED] right x left: 2x1+0+0 x 3x1+1+0 [02:03:40] [PASSED] left x right: 3x1+1+0 x 2x1+0+0 [02:03:40] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1 [02:03:40] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0 [02:03:40] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1 [02:03:40] [PASSED] touching side: 1x1+0+0 x 1x1+1+0 [02:03:40] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0 [02:03:40] [PASSED] inside another: 2x2+0+0 x 1x1+1+1 [02:03:40] [PASSED] far away: 1x1+0+0 x 1x1+3+6 [02:03:40] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10 [02:03:40] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10 [02:03:40] ============= [PASSED] drm_test_rect_intersect ============= [02:03:40] ================ drm_test_rect_calc_hscale ================ [02:03:40] [PASSED] normal use [02:03:40] [PASSED] out of max range [02:03:40] [PASSED] out of min range [02:03:40] [PASSED] zero dst [02:03:40] [PASSED] negative src [02:03:40] [PASSED] negative dst [02:03:40] ============ [PASSED] drm_test_rect_calc_hscale ============ [02:03:40] ================ drm_test_rect_calc_vscale ================ [02:03:40] [PASSED] normal use stty: 'standard input': Inappropriate ioctl for device [02:03:40] [PASSED] out of max range [02:03:40] [PASSED] out of min range [02:03:40] [PASSED] zero dst [02:03:40] [PASSED] negative src [02:03:40] [PASSED] negative dst [02:03:40] ============ [PASSED] drm_test_rect_calc_vscale ============ [02:03:40] ================== drm_test_rect_rotate =================== [02:03:40] [PASSED] reflect-x [02:03:40] [PASSED] reflect-y [02:03:40] [PASSED] rotate-0 [02:03:40] [PASSED] rotate-90 [02:03:40] [PASSED] rotate-180 [02:03:40] [PASSED] rotate-270 [02:03:40] ============== [PASSED] drm_test_rect_rotate =============== [02:03:40] ================ drm_test_rect_rotate_inv ================= [02:03:40] [PASSED] reflect-x [02:03:40] [PASSED] reflect-y [02:03:40] [PASSED] rotate-0 [02:03:40] [PASSED] rotate-90 [02:03:40] [PASSED] rotate-180 [02:03:40] [PASSED] rotate-270 [02:03:40] ============ [PASSED] drm_test_rect_rotate_inv ============= [02:03:40] ==================== [PASSED] drm_rect ===================== [02:03:40] ============ drm_sysfb_modeset_test (1 subtest) ============ [02:03:40] ============ drm_test_sysfb_build_fourcc_list ============= [02:03:40] [PASSED] no native formats [02:03:40] [PASSED] XRGB8888 as native format [02:03:40] [PASSED] remove duplicates [02:03:40] [PASSED] convert alpha formats [02:03:40] [PASSED] random formats [02:03:40] ======== [PASSED] drm_test_sysfb_build_fourcc_list ========= [02:03:40] ============= [PASSED] drm_sysfb_modeset_test ============== [02:03:40] ============================================================ [02:03:40] Testing complete. Ran 622 tests: passed: 622 [02:03:40] Elapsed time: 26.784s total, 1.685s configuring, 24.680s building, 0.389s running + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig [02:03:40] Configuring KUnit Kernel ... Regenerating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [02:03:41] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [02:03:51] Starting KUnit Kernel (1/1)... [02:03:51] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [02:03:51] ================= ttm_device (5 subtests) ================== [02:03:51] [PASSED] ttm_device_init_basic [02:03:51] [PASSED] ttm_device_init_multiple [02:03:51] [PASSED] ttm_device_fini_basic [02:03:51] [PASSED] ttm_device_init_no_vma_man [02:03:51] ================== ttm_device_init_pools ================== [02:03:51] [PASSED] No DMA allocations, no DMA32 required [02:03:51] [PASSED] DMA allocations, DMA32 required [02:03:51] [PASSED] No DMA allocations, DMA32 required [02:03:51] [PASSED] DMA allocations, no DMA32 required [02:03:51] ============== [PASSED] ttm_device_init_pools ============== [02:03:51] =================== [PASSED] ttm_device ==================== [02:03:51] ================== ttm_pool (8 subtests) =================== [02:03:51] ================== ttm_pool_alloc_basic =================== [02:03:51] [PASSED] One page [02:03:51] [PASSED] More than one page [02:03:51] [PASSED] Above the allocation limit [02:03:51] [PASSED] One page, with coherent DMA mappings enabled [02:03:51] [PASSED] Above the allocation limit, with coherent DMA mappings enabled [02:03:51] ============== [PASSED] ttm_pool_alloc_basic =============== [02:03:51] ============== ttm_pool_alloc_basic_dma_addr ============== [02:03:51] [PASSED] One page [02:03:51] [PASSED] More than one page [02:03:51] [PASSED] Above the allocation limit [02:03:51] [PASSED] One page, with coherent DMA mappings enabled [02:03:51] [PASSED] Above the allocation limit, with coherent DMA mappings enabled [02:03:51] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ========== [02:03:51] [PASSED] ttm_pool_alloc_order_caching_match [02:03:51] [PASSED] ttm_pool_alloc_caching_mismatch [02:03:51] [PASSED] ttm_pool_alloc_order_mismatch [02:03:51] [PASSED] ttm_pool_free_dma_alloc [02:03:51] [PASSED] ttm_pool_free_no_dma_alloc [02:03:51] [PASSED] ttm_pool_fini_basic [02:03:51] ==================== [PASSED] ttm_pool ===================== [02:03:51] ================ ttm_resource (8 subtests) ================= [02:03:51] ================= ttm_resource_init_basic ================= [02:03:51] [PASSED] Init resource in TTM_PL_SYSTEM [02:03:51] [PASSED] Init resource in TTM_PL_VRAM [02:03:51] [PASSED] Init resource in a private placement [02:03:51] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags [02:03:51] ============= [PASSED] ttm_resource_init_basic ============= [02:03:51] [PASSED] ttm_resource_init_pinned [02:03:51] [PASSED] ttm_resource_fini_basic [02:03:51] [PASSED] ttm_resource_manager_init_basic [02:03:51] [PASSED] ttm_resource_manager_usage_basic [02:03:51] [PASSED] ttm_resource_manager_set_used_basic [02:03:51] [PASSED] ttm_sys_man_alloc_basic [02:03:51] [PASSED] ttm_sys_man_free_basic [02:03:51] ================== [PASSED] ttm_resource =================== [02:03:51] =================== ttm_tt (15 subtests) =================== [02:03:51] ==================== ttm_tt_init_basic ==================== [02:03:51] [PASSED] Page-aligned size [02:03:51] [PASSED] Extra pages requested [02:03:51] ================ [PASSED] ttm_tt_init_basic ================ [02:03:51] [PASSED] ttm_tt_init_misaligned [02:03:51] [PASSED] ttm_tt_fini_basic [02:03:51] [PASSED] ttm_tt_fini_sg [02:03:51] [PASSED] ttm_tt_fini_shmem [02:03:51] [PASSED] ttm_tt_create_basic [02:03:51] [PASSED] ttm_tt_create_invalid_bo_type [02:03:51] [PASSED] ttm_tt_create_ttm_exists [02:03:51] [PASSED] ttm_tt_create_failed [02:03:51] [PASSED] ttm_tt_destroy_basic [02:03:51] [PASSED] ttm_tt_populate_null_ttm [02:03:51] [PASSED] ttm_tt_populate_populated_ttm [02:03:51] [PASSED] ttm_tt_unpopulate_basic [02:03:51] [PASSED] ttm_tt_unpopulate_empty_ttm [02:03:51] [PASSED] ttm_tt_swapin_basic [02:03:51] ===================== [PASSED] ttm_tt ====================== [02:03:51] =================== ttm_bo (14 subtests) =================== [02:03:51] =========== ttm_bo_reserve_optimistic_no_ticket =========== [02:03:51] [PASSED] Cannot be interrupted and sleeps [02:03:51] [PASSED] Cannot be interrupted, locks straight away [02:03:51] [PASSED] Can be interrupted, sleeps [02:03:51] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket ======= [02:03:51] [PASSED] ttm_bo_reserve_locked_no_sleep [02:03:51] [PASSED] ttm_bo_reserve_no_wait_ticket [02:03:51] [PASSED] ttm_bo_reserve_double_resv [02:03:51] [PASSED] ttm_bo_reserve_interrupted [02:03:51] [PASSED] ttm_bo_reserve_deadlock [02:03:51] [PASSED] ttm_bo_unreserve_basic [02:03:51] [PASSED] ttm_bo_unreserve_pinned [02:03:51] [PASSED] ttm_bo_unreserve_bulk [02:03:51] [PASSED] ttm_bo_fini_basic [02:03:51] [PASSED] ttm_bo_fini_shared_resv [02:03:51] [PASSED] ttm_bo_pin_basic [02:03:51] [PASSED] ttm_bo_pin_unpin_resource [02:03:51] [PASSED] ttm_bo_multiple_pin_one_unpin [02:03:51] ===================== [PASSED] ttm_bo ====================== [02:03:51] ============== ttm_bo_validate (21 subtests) =============== [02:03:51] ============== ttm_bo_init_reserved_sys_man =============== [02:03:51] [PASSED] Buffer object for userspace [02:03:51] [PASSED] Kernel buffer object [02:03:51] [PASSED] Shared buffer object [02:03:51] ========== [PASSED] ttm_bo_init_reserved_sys_man =========== [02:03:51] ============== ttm_bo_init_reserved_mock_man ============== [02:03:51] [PASSED] Buffer object for userspace [02:03:51] [PASSED] Kernel buffer object [02:03:51] [PASSED] Shared buffer object [02:03:51] ========== [PASSED] ttm_bo_init_reserved_mock_man ========== [02:03:51] [PASSED] ttm_bo_init_reserved_resv [02:03:51] ================== ttm_bo_validate_basic ================== [02:03:51] [PASSED] Buffer object for userspace [02:03:51] [PASSED] Kernel buffer object [02:03:51] [PASSED] Shared buffer object [02:03:51] ============== [PASSED] ttm_bo_validate_basic ============== [02:03:51] [PASSED] ttm_bo_validate_invalid_placement [02:03:51] ============= ttm_bo_validate_same_placement ============== [02:03:51] [PASSED] System manager [02:03:51] [PASSED] VRAM manager [02:03:51] ========= [PASSED] ttm_bo_validate_same_placement ========== [02:03:51] [PASSED] ttm_bo_validate_failed_alloc [02:03:51] [PASSED] ttm_bo_validate_pinned [02:03:51] [PASSED] ttm_bo_validate_busy_placement [02:03:51] ================ ttm_bo_validate_multihop ================= [02:03:51] [PASSED] Buffer object for userspace [02:03:51] [PASSED] Kernel buffer object [02:03:51] [PASSED] Shared buffer object [02:03:51] ============ [PASSED] ttm_bo_validate_multihop ============= [02:03:51] ========== ttm_bo_validate_no_placement_signaled ========== [02:03:51] [PASSED] Buffer object in system domain, no page vector [02:03:51] [PASSED] Buffer object in system domain with an existing page vector [02:03:51] ====== [PASSED] ttm_bo_validate_no_placement_signaled ====== [02:03:51] ======== ttm_bo_validate_no_placement_not_signaled ======== [02:03:51] [PASSED] Buffer object for userspace [02:03:51] [PASSED] Kernel buffer object [02:03:51] [PASSED] Shared buffer object [02:03:51] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ==== [02:03:51] [PASSED] ttm_bo_validate_move_fence_signaled [02:03:51] ========= ttm_bo_validate_move_fence_not_signaled ========= [02:03:51] [PASSED] Waits for GPU [02:03:51] [PASSED] Tries to lock straight away [02:03:51] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled ===== [02:03:51] [PASSED] ttm_bo_validate_happy_evict [02:03:51] [PASSED] ttm_bo_validate_all_pinned_evict [02:03:51] [PASSED] ttm_bo_validate_allowed_only_evict [02:03:51] [PASSED] ttm_bo_validate_deleted_evict [02:03:51] [PASSED] ttm_bo_validate_busy_domain_evict [02:03:51] [PASSED] ttm_bo_validate_evict_gutting [02:03:51] [PASSED] ttm_bo_validate_recrusive_evict stty: 'standard input': Inappropriate ioctl for device [02:03:51] ================= [PASSED] ttm_bo_validate ================= [02:03:51] ============================================================ [02:03:51] Testing complete. Ran 101 tests: passed: 101 [02:03:51] Elapsed time: 11.195s total, 1.667s configuring, 9.311s building, 0.186s running + cleanup ++ stat -c %u:%g /kernel + chown -R 1003:1003 /kernel ^ permalink raw reply [flat|nested] 8+ messages in thread
* ✓ Xe.CI.BAT: success for Different page size handle in migrate layer 2025-10-13 1:56 [PATCH v4 0/2] Different page size handle in migrate layer Matthew Brost ` (3 preceding siblings ...) 2025-10-13 2:03 ` ✓ CI.KUnit: success " Patchwork @ 2025-10-13 2:50 ` Patchwork 2025-10-13 3:17 ` ✓ Xe.CI.Full: " Patchwork 5 siblings, 0 replies; 8+ messages in thread From: Patchwork @ 2025-10-13 2:50 UTC (permalink / raw) To: Matthew Brost; +Cc: intel-xe [-- Attachment #1: Type: text/plain, Size: 866 bytes --] == Series Details == Series: Different page size handle in migrate layer URL : https://patchwork.freedesktop.org/series/155794/ State : success == Summary == CI Bug Log - changes from xe-3904-085518a4da5bcf9b68ef798e27ef71d64443aad7_BAT -> xe-pw-155794v1_BAT ==================================================== Summary ------- **SUCCESS** No regressions found. Participating hosts (11 -> 11) ------------------------------ No changes in participating hosts Changes ------- No changes found Build changes ------------- * Linux: xe-3904-085518a4da5bcf9b68ef798e27ef71d64443aad7 -> xe-pw-155794v1 IGT_8582: 8582 xe-3904-085518a4da5bcf9b68ef798e27ef71d64443aad7: 085518a4da5bcf9b68ef798e27ef71d64443aad7 xe-pw-155794v1: 155794v1 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155794v1/index.html [-- Attachment #2: Type: text/html, Size: 1414 bytes --] ^ permalink raw reply [flat|nested] 8+ messages in thread
* ✓ Xe.CI.Full: success for Different page size handle in migrate layer 2025-10-13 1:56 [PATCH v4 0/2] Different page size handle in migrate layer Matthew Brost ` (4 preceding siblings ...) 2025-10-13 2:50 ` ✓ Xe.CI.BAT: " Patchwork @ 2025-10-13 3:17 ` Patchwork 5 siblings, 0 replies; 8+ messages in thread From: Patchwork @ 2025-10-13 3:17 UTC (permalink / raw) To: Matthew Brost; +Cc: intel-xe [-- Attachment #1: Type: text/plain, Size: 866 bytes --] == Series Details == Series: Different page size handle in migrate layer URL : https://patchwork.freedesktop.org/series/155794/ State : success == Summary == CI Bug Log - changes from xe-3904-085518a4da5bcf9b68ef798e27ef71d64443aad7_FULL -> xe-pw-155794v1_FULL ==================================================== Summary ------- **SUCCESS** No regressions found. Participating hosts (4 -> 4) ------------------------------ No changes in participating hosts Changes ------- No changes found Build changes ------------- * Linux: xe-3904-085518a4da5bcf9b68ef798e27ef71d64443aad7 -> xe-pw-155794v1 IGT_8582: 8582 xe-3904-085518a4da5bcf9b68ef798e27ef71d64443aad7: 085518a4da5bcf9b68ef798e27ef71d64443aad7 xe-pw-155794v1: 155794v1 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155794v1/index.html [-- Attachment #2: Type: text/html, Size: 1414 bytes --] ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v4 0/2] Different sized pages support in migrate layer @ 2025-08-29 18:00 Matthew Brost 2025-08-29 18:00 ` [PATCH v4 2/2] drm/xe: Enable 2M pages in xe_migrate_vram Matthew Brost 0 siblings, 1 reply; 8+ messages in thread From: Matthew Brost @ 2025-08-29 18:00 UTC (permalink / raw) To: intel-xe Add support for CPU pages larger than the GPU, enable 2M pages migration. Matt Matthew Brost (2): drm/xe: Add support larger CPU pages to build_pt_update_batch_sram drm/xe: Enable 2M pages in xe_migrate_vram drivers/gpu/drm/xe/xe_migrate.c | 72 ++++++++++++++++++++++++++++----- 1 file changed, 62 insertions(+), 10 deletions(-) -- 2.34.1 ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v4 2/2] drm/xe: Enable 2M pages in xe_migrate_vram 2025-08-29 18:00 [PATCH v4 0/2] Different sized pages support " Matthew Brost @ 2025-08-29 18:00 ` Matthew Brost 0 siblings, 0 replies; 8+ messages in thread From: Matthew Brost @ 2025-08-29 18:00 UTC (permalink / raw) To: intel-xe Using 2M pages in xe_migrate_vram has two benefits: we issue fewer instructions per 2M copy (1 vs. 512), and the cache hit rate should be higher. This results in increased copy engine bandwidth, as shown by benchmark IGTs. Enable 2M pages by reserving PDEs in the migrate VM and using 2M pages in xe_migrate_vram if the DMA address order matches 2M. v2: - Reuse build_pt_update_batch_sram (Stuart) - Fix build_pt_update_batch_sram for PAGE_SIZE > 4K v3: - More fixes for PAGE_SIZE > 4K, align chunk, decrement chunk as needed - Use stack incr var in xe_migrate_vram_use_pde (Stuart) Signed-off-by: Matthew Brost <matthew.brost@intel.com> --- drivers/gpu/drm/xe/xe_migrate.c | 63 +++++++++++++++++++++++++++------ 1 file changed, 52 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c index 72f53e304873..fb6bac6d5349 100644 --- a/drivers/gpu/drm/xe/xe_migrate.c +++ b/drivers/gpu/drm/xe/xe_migrate.c @@ -56,6 +56,13 @@ struct xe_migrate { u64 usm_batch_base_ofs; /** @cleared_mem_ofs: VM offset of @cleared_bo. */ u64 cleared_mem_ofs; + /** @large_page_copy_ofs: VM offset of 2M pages used for large copies */ + u64 large_page_copy_ofs; + /** + * @large_page_copy_pdes: BO offset to writeout 2M pages (PDEs) used for + * large copies + */ + u64 large_page_copy_pdes; /** * @fence: dma-fence representing the last migration job batch. * Protected by @job_mutex. @@ -287,6 +294,12 @@ static int xe_migrate_prepare_vm(struct xe_tile *tile, struct xe_migrate *m, (i + 1) * 8, u64, entry); } + /* Reserve 2M PDEs */ + level = 1; + m->large_page_copy_ofs = NUM_PT_SLOTS << xe_pt_shift(level); + m->large_page_copy_pdes = map_ofs + XE_PAGE_SIZE * level + + NUM_PT_SLOTS * 8; + /* Set up a 1GiB NULL mapping at 255GiB offset. */ level = 2; xe_map_wr(xe, &bo->vmap, map_ofs + XE_PAGE_SIZE * level + 255 * 8, u64, @@ -1741,13 +1754,14 @@ static u32 pte_update_cmd_size(u64 size) static void build_pt_update_batch_sram(struct xe_migrate *m, struct xe_bb *bb, u32 pt_offset, struct drm_pagemap_addr *sram_addr, - u32 size) + u32 size, int level) { u16 pat_index = tile_to_xe(m->tile)->pat.idx[XE_CACHE_WB]; + u64 gpu_page_size = 0x1ull << xe_pt_shift(level); u32 ptes; int i = 0; - ptes = DIV_ROUND_UP(size, XE_PAGE_SIZE); + ptes = DIV_ROUND_UP(size, gpu_page_size); while (ptes) { u32 chunk = min(MAX_PTE_PER_SDI, ptes); @@ -1761,7 +1775,7 @@ static void build_pt_update_batch_sram(struct xe_migrate *m, ptes -= chunk; while (chunk--) { - u64 addr = sram_addr[i].addr & PAGE_MASK; + u64 addr = sram_addr[i].addr & ~(gpu_page_size - 1); xe_tile_assert(m->tile, sram_addr[i].proto == DRM_INTERCONNECT_SYSTEM); @@ -1770,22 +1784,37 @@ static void build_pt_update_batch_sram(struct xe_migrate *m, again: addr = m->q->vm->pt_ops->pte_encode_addr(m->tile->xe, addr, pat_index, - 0, false, 0); + level, false, 0); bb->cs[bb->len++] = lower_32_bits(addr); bb->cs[bb->len++] = upper_32_bits(addr); - if (XE_PAGE_SIZE < PAGE_SIZE) { + if (gpu_page_size < PAGE_SIZE) { addr += XE_PAGE_SIZE; if (sram_addr[i].addr + PAGE_SIZE != addr) { chunk--; goto again; } + i++; + } else { + i += gpu_page_size / PAGE_SIZE; } - i++; } } } +static bool xe_migrate_vram_use_pde(struct drm_pagemap_addr *sram_addr, + unsigned long size) +{ + u32 large_size = (0x1 << xe_pt_shift(1)); + unsigned long i, incr = large_size / PAGE_SIZE;; + + for (i = 0; i < DIV_ROUND_UP(size, PAGE_SIZE); i += incr) + if (PAGE_SIZE << sram_addr[i].order != large_size) + return false; + + return true; +} + enum xe_migrate_copy_dir { XE_MIGRATE_COPY_TO_VRAM, XE_MIGRATE_COPY_TO_SRAM, @@ -1815,6 +1844,7 @@ static struct dma_fence *xe_migrate_vram(struct xe_migrate *m, PAGE_SIZE : 4; int err; unsigned long i, j; + bool use_pde = xe_migrate_vram_use_pde(sram_addr, len + sram_offset); if (drm_WARN_ON(&xe->drm, (len & XE_CACHELINE_MASK) || (sram_offset | vram_addr) & XE_CACHELINE_MASK)) @@ -1839,7 +1869,7 @@ static struct dma_fence *xe_migrate_vram(struct xe_migrate *m, * struct drm_pagemap_addr. Ensure this is the case even with higher * orders. */ - for (i = 0; i < npages;) { + for (i = 0; !use_pde && i < npages;) { unsigned int order = sram_addr[i].order; for (j = 1; j < NR_PAGES(order) && i + j < npages; j++) @@ -1849,16 +1879,26 @@ static struct dma_fence *xe_migrate_vram(struct xe_migrate *m, i += NR_PAGES(order); } - build_pt_update_batch_sram(m, bb, pt_slot * XE_PAGE_SIZE, - sram_addr, len + sram_offset); + if (use_pde) + build_pt_update_batch_sram(m, bb, m->large_page_copy_pdes, + sram_addr, len + sram_offset, 1); + else + build_pt_update_batch_sram(m, bb, pt_slot * XE_PAGE_SIZE, + sram_addr, len + sram_offset, 0); if (dir == XE_MIGRATE_COPY_TO_VRAM) { - src_L0_ofs = xe_migrate_vm_addr(pt_slot, 0) + sram_offset; + if (use_pde) + src_L0_ofs = m->large_page_copy_ofs + sram_offset; + else + src_L0_ofs = xe_migrate_vm_addr(pt_slot, 0) + sram_offset; dst_L0_ofs = xe_migrate_vram_ofs(xe, vram_addr, false); } else { src_L0_ofs = xe_migrate_vram_ofs(xe, vram_addr, false); - dst_L0_ofs = xe_migrate_vm_addr(pt_slot, 0) + sram_offset; + if (use_pde) + dst_L0_ofs = m->large_page_copy_ofs + sram_offset; + else + dst_L0_ofs = xe_migrate_vm_addr(pt_slot, 0) + sram_offset; } bb->cs[bb->len++] = MI_BATCH_BUFFER_END; @@ -1910,6 +1950,7 @@ static struct dma_fence *xe_migrate_vram(struct xe_migrate *m, struct dma_fence *xe_migrate_to_vram(struct xe_migrate *m, unsigned long npages, struct drm_pagemap_addr *src_addr, + u64 dst_addr) { return xe_migrate_vram(m, npages * PAGE_SIZE, 0, src_addr, dst_addr, -- 2.34.1 ^ permalink raw reply related [flat|nested] 8+ messages in thread
end of thread, other threads:[~2025-10-13 3:17 UTC | newest] Thread overview: 8+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2025-10-13 1:56 [PATCH v4 0/2] Different page size handle in migrate layer Matthew Brost 2025-10-13 1:56 ` [PATCH v4 1/2] drm/xe: Fix build_pt_update_batch_sram for non-4K PAGE_SIZE Matthew Brost 2025-10-13 1:56 ` [PATCH v4 2/2] drm/xe: Enable 2M pages in xe_migrate_vram Matthew Brost 2025-10-13 2:02 ` ✗ CI.checkpatch: warning for Different page size handle in migrate layer Patchwork 2025-10-13 2:03 ` ✓ CI.KUnit: success " Patchwork 2025-10-13 2:50 ` ✓ Xe.CI.BAT: " Patchwork 2025-10-13 3:17 ` ✓ Xe.CI.Full: " Patchwork -- strict thread matches above, loose matches on Subject: below -- 2025-08-29 18:00 [PATCH v4 0/2] Different sized pages support " Matthew Brost 2025-08-29 18:00 ` [PATCH v4 2/2] drm/xe: Enable 2M pages in xe_migrate_vram Matthew Brost
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