[PATCH 0/7] Fix a couple of wedge corner-case memory leaks

[PATCH 0/7] Fix a couple of wedge corner-case memory leaks

[Stuart Summers]

Most of the patches in this series are just adding
some debug hints to help track these down. I split
these up in case we want to pick and choose which ones
to include in the tree. I found them useful.

The main two interesting patches are the last two in the
series which are fixing some corner cases when the
driver becomes wedged in the middle of either communication
with the DRM scheduler or in the event the GuC becomes
unresponsive. In both of these cases there is a chance
we could leak memory around the exec queue members
like the LRC and the LRC BO. These patches fix those
scenarios.

v2: Address feedback from Matt:
    - Let the DRM scheduler handle pausing/unpausing
    - Still do the wait after scheduling disable/deregister
      as with the previous patch, but skip the intermediate
      software-based schedule disable using the "banned"
      flag and instead just jump straight to the deregister
      handling which will fully reset the queue state.
      Note that for this case I am seeing a hardware failure
      after submitting to GuC but before receiving the
      response from GuC. So even if we wedge in this case
      (monitoring the hardware state change), the queue
      itself is not wedged because of the active GuC
      submission (CT is not stalled at that point).

Stuart Summers (7):
  drm/xe: Add additional trace points for LRCs
  drm/xe: Add a trace point for VM close
  drm/xe: Add the BO pointer info to the BO trace
  drm/xe: Add new exec queue trace points
  drm/xe: Correct migration VM teardown order
  drm/xe: Don't block messages to the GPU scheduler
  drm/xe: Check for GuC responses on disabling scheduling

 drivers/gpu/drm/xe/xe_exec_queue.c    |  4 +++
 drivers/gpu/drm/xe/xe_gpu_scheduler.c |  6 +---
 drivers/gpu/drm/xe/xe_guc_submit.c    | 24 ++++++++++++---
 drivers/gpu/drm/xe/xe_lrc.c           |  4 +++
 drivers/gpu/drm/xe/xe_lrc.h           |  3 ++
 drivers/gpu/drm/xe/xe_migrate.c       |  2 +-
 drivers/gpu/drm/xe/xe_trace.h         | 22 ++++++++++++--
 drivers/gpu/drm/xe/xe_trace_bo.h      | 12 ++++++--
 drivers/gpu/drm/xe/xe_trace_lrc.h     | 42 ++++++++++++++++++++++++++-
 drivers/gpu/drm/xe/xe_vm.c            |  2 ++
 10 files changed, 106 insertions(+), 15 deletions(-)

-- 
2.34.1

[PATCH 1/7] drm/xe: Add additional trace points for LRCs

[Stuart Summers]

Add trace points to indicate when an LRC has been
created and destroyed or get and put.

Signed-off-by: Stuart Summers <stuart.summers@intel.com>
---
 drivers/gpu/drm/xe/xe_lrc.c       |  4 +++
 drivers/gpu/drm/xe/xe_lrc.h       |  3 +++
 drivers/gpu/drm/xe/xe_trace_lrc.h | 42 ++++++++++++++++++++++++++++++-
 3 files changed, 48 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index b5083c99dd50..42d1c861fe18 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -1575,6 +1575,8 @@ struct xe_lrc *xe_lrc_create(struct xe_hw_engine *hwe, struct xe_vm *vm,
 		return ERR_PTR(err);
 	}
 
+	trace_xe_lrc_create(lrc);
+
 	return lrc;
 }
 
@@ -1589,6 +1591,8 @@ void xe_lrc_destroy(struct kref *ref)
 {
 	struct xe_lrc *lrc = container_of(ref, struct xe_lrc, refcount);
 
+	trace_xe_lrc_destroy(lrc);
+
 	xe_lrc_finish(lrc);
 	kfree(lrc);
 }
diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h
index 2fb628da5c43..fd67810f9812 100644
--- a/drivers/gpu/drm/xe/xe_lrc.h
+++ b/drivers/gpu/drm/xe/xe_lrc.h
@@ -8,6 +8,7 @@
 #include <linux/types.h>
 
 #include "xe_lrc_types.h"
+#include "xe_trace_lrc.h"
 
 struct drm_printer;
 struct xe_bb;
@@ -61,6 +62,7 @@ void xe_lrc_destroy(struct kref *ref);
 static inline struct xe_lrc *xe_lrc_get(struct xe_lrc *lrc)
 {
 	kref_get(&lrc->refcount);
+	trace_xe_lrc_get(lrc);
 	return lrc;
 }
 
@@ -73,6 +75,7 @@ static inline struct xe_lrc *xe_lrc_get(struct xe_lrc *lrc)
  */
 static inline void xe_lrc_put(struct xe_lrc *lrc)
 {
+	trace_xe_lrc_put(lrc);
 	kref_put(&lrc->refcount, xe_lrc_destroy);
 }
 
diff --git a/drivers/gpu/drm/xe/xe_trace_lrc.h b/drivers/gpu/drm/xe/xe_trace_lrc.h
index d525cbee1e34..e8daa5d323e7 100644
--- a/drivers/gpu/drm/xe/xe_trace_lrc.h
+++ b/drivers/gpu/drm/xe/xe_trace_lrc.h
@@ -13,7 +13,6 @@
 #include <linux/types.h>
 
 #include "xe_gt_types.h"
-#include "xe_lrc.h"
 #include "xe_lrc_types.h"
 
 #define __dev_name_lrc(lrc)	dev_name(gt_to_xe((lrc)->fence_ctx.gt)->drm.dev)
@@ -42,6 +41,47 @@ TRACE_EVENT(xe_lrc_update_timestamp,
 		      __get_str(device_id))
 );
 
+DECLARE_EVENT_CLASS(xe_lrc,
+	    TP_PROTO(struct xe_lrc *lrc),
+	    TP_ARGS(lrc),
+
+	    TP_STRUCT__entry(
+		     __field(struct xe_lrc *, lrc)
+		     __string(name, lrc->fence_ctx.name)
+		     __string(device_id, __dev_name_lrc(lrc))
+	    ),
+
+	    TP_fast_assign(
+		   __entry->lrc	= lrc;
+		   __assign_str(name);
+		   __assign_str(device_id);
+		   ),
+
+	    TP_printk("lrc=:%p lrc->name=%s device_id:%s",
+		      __entry->lrc, __get_str(name),
+		      __get_str(device_id))
+);
+
+DEFINE_EVENT(xe_lrc, xe_lrc_create,
+	     TP_PROTO(struct xe_lrc *lrc),
+	     TP_ARGS(lrc)
+);
+
+DEFINE_EVENT(xe_lrc, xe_lrc_destroy,
+	     TP_PROTO(struct xe_lrc *lrc),
+	     TP_ARGS(lrc)
+);
+
+DEFINE_EVENT(xe_lrc, xe_lrc_get,
+	     TP_PROTO(struct xe_lrc *lrc),
+	     TP_ARGS(lrc)
+);
+
+DEFINE_EVENT(xe_lrc, xe_lrc_put,
+	     TP_PROTO(struct xe_lrc *lrc),
+	     TP_ARGS(lrc)
+);
+
 #endif
 
 /* This part must be outside protection */
-- 
2.34.1

[PATCH 2/7] drm/xe: Add a trace point for VM close

[Stuart Summers]

All better tracking of error cases when calling through
xe_vm_close_and_put().

Signed-off-by: Stuart Summers <stuart.summers@intel.com>
---
 drivers/gpu/drm/xe/xe_trace_bo.h | 6 ++++++
 drivers/gpu/drm/xe/xe_vm.c       | 2 ++
 2 files changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_trace_bo.h b/drivers/gpu/drm/xe/xe_trace_bo.h
index 86323cf3be2c..238311cfb816 100644
--- a/drivers/gpu/drm/xe/xe_trace_bo.h
+++ b/drivers/gpu/drm/xe/xe_trace_bo.h
@@ -14,6 +14,7 @@
 
 #include "xe_bo.h"
 #include "xe_bo_types.h"
+#include "xe_exec_queue_types.h"
 #include "xe_vm.h"
 
 #define __dev_name_bo(bo)	dev_name(xe_bo_device(bo)->drm.dev)
@@ -223,6 +224,11 @@ DEFINE_EVENT(xe_vm, xe_vm_free,
 	     TP_ARGS(vm)
 );
 
+DEFINE_EVENT(xe_vm, xe_vm_close,
+	     TP_PROTO(struct xe_vm *vm),
+	     TP_ARGS(vm)
+);
+
 DEFINE_EVENT(xe_vm, xe_vm_cpu_bind,
 	     TP_PROTO(struct xe_vm *vm),
 	     TP_ARGS(vm)
diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index 179758ca7cb8..64b8a170efcf 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -1681,6 +1681,8 @@ static void xe_vm_close(struct xe_vm *vm)
 	bool bound;
 	int idx;
 
+	trace_xe_vm_close(vm);
+
 	bound = drm_dev_enter(&xe->drm, &idx);
 
 	down_write(&vm->lock);
-- 
2.34.1

[PATCH 3/7] drm/xe: Add the BO pointer info to the BO trace

[Stuart Summers]

Just a little extra detail to make BOs easier to track
through the trace event log.

Signed-off-by: Stuart Summers <stuart.summers@intel.com>
---
 drivers/gpu/drm/xe/xe_trace_bo.h | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_trace_bo.h b/drivers/gpu/drm/xe/xe_trace_bo.h
index 238311cfb816..0d795733e0f0 100644
--- a/drivers/gpu/drm/xe/xe_trace_bo.h
+++ b/drivers/gpu/drm/xe/xe_trace_bo.h
@@ -27,6 +27,7 @@ DECLARE_EVENT_CLASS(xe_bo,
 
 		    TP_STRUCT__entry(
 			     __string(dev, __dev_name_bo(bo))
+			     __field(struct xe_bo *, bo)
 			     __field(size_t, size)
 			     __field(u32, flags)
 			     __field(struct xe_vm *, vm)
@@ -34,13 +35,14 @@ DECLARE_EVENT_CLASS(xe_bo,
 
 		    TP_fast_assign(
 			   __assign_str(dev);
+			   __entry->bo = bo;
 			   __entry->size = xe_bo_size(bo);
 			   __entry->flags = bo->flags;
 			   __entry->vm = bo->vm;
 			   ),
 
-		    TP_printk("dev=%s, size=%zu, flags=0x%02x, vm=%p",
-			      __get_str(dev), __entry->size,
+		    TP_printk("dev=%s, %p, size=%zu, flags=0x%02x, vm=%p",
+			      __get_str(dev), __entry->bo, __entry->size,
 			      __entry->flags, __entry->vm)
 );
 
-- 
2.34.1

[PATCH 4/7] drm/xe: Add new exec queue trace points

[Stuart Summers]

Add an exec queue and guc exec queue trace point
to separate out which part of the stack is executing.

This is helpful because several of the guc specific
paths rely on responses from guc which is interesting
to view separately in the event the guc stops responding
in the middle of an operation that would expect a
response from guc otherwise.

Also add in the exec queue pointer information to
the trace events for easier tracking. Contexts (guc_ids)
can get re-used, so this just makes grepping a little
easier in this type of debug.

Signed-off-by: Stuart Summers <stuart.summers@intel.com>
---
 drivers/gpu/drm/xe/xe_exec_queue.c |  4 ++++
 drivers/gpu/drm/xe/xe_guc_submit.c | 11 +++++++----
 drivers/gpu/drm/xe/xe_trace.h      | 22 ++++++++++++++++++++--
 3 files changed, 31 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index 90cbc95f8e2e..a2ef381cf6d9 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -377,6 +377,8 @@ void xe_exec_queue_destroy(struct kref *ref)
 	struct xe_exec_queue *q = container_of(ref, struct xe_exec_queue, refcount);
 	struct xe_exec_queue *eq, *next;
 
+	trace_xe_exec_queue_destroy(q);
+
 	if (xe_exec_queue_uses_pxp(q))
 		xe_pxp_exec_queue_remove(gt_to_xe(q->gt)->pxp, q);
 
@@ -953,6 +955,8 @@ void xe_exec_queue_kill(struct xe_exec_queue *q)
 {
 	struct xe_exec_queue *eq = q, *next;
 
+	trace_xe_exec_queue_kill(q);
+
 	list_for_each_entry_safe(eq, next, &eq->multi_gt_list,
 				 multi_gt_link) {
 		q->ops->kill(eq);
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index e9aa0625ce60..5ec1e4a83d68 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -1003,9 +1003,12 @@ void xe_guc_submit_wedge(struct xe_guc *guc)
 	}
 
 	mutex_lock(&guc->submission_state.lock);
-	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q)
-		if (xe_exec_queue_get_unless_zero(q))
+	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) {
+		if (xe_exec_queue_get_unless_zero(q)) {
 			set_exec_queue_wedged(q);
+			trace_xe_exec_queue_wedge(q);
+		}
+	}
 	mutex_unlock(&guc->submission_state.lock);
 }
 
@@ -1455,7 +1458,7 @@ static void __guc_exec_queue_destroy_async(struct work_struct *w)
 	struct xe_guc *guc = exec_queue_to_guc(q);
 
 	xe_pm_runtime_get(guc_to_xe(guc));
-	trace_xe_exec_queue_destroy(q);
+	trace_xe_guc_exec_queue_destroy(q);
 
 	if (xe_exec_queue_is_lr(q))
 		cancel_work_sync(&ge->lr_tdr);
@@ -1716,7 +1719,7 @@ static int guc_exec_queue_init(struct xe_exec_queue *q)
 
 static void guc_exec_queue_kill(struct xe_exec_queue *q)
 {
-	trace_xe_exec_queue_kill(q);
+	trace_xe_guc_exec_queue_kill(q);
 	set_exec_queue_killed(q);
 	__suspend_fence_signal(q);
 	xe_guc_exec_queue_trigger_cleanup(q);
diff --git a/drivers/gpu/drm/xe/xe_trace.h b/drivers/gpu/drm/xe/xe_trace.h
index 314f42fcbcbd..a5dd0c48d894 100644
--- a/drivers/gpu/drm/xe/xe_trace.h
+++ b/drivers/gpu/drm/xe/xe_trace.h
@@ -71,6 +71,7 @@ DECLARE_EVENT_CLASS(xe_exec_queue,
 
 		    TP_STRUCT__entry(
 			     __string(dev, __dev_name_eq(q))
+			     __field(struct xe_exec_queue *, q)
 			     __field(enum xe_engine_class, class)
 			     __field(u32, logical_mask)
 			     __field(u8, gt_id)
@@ -82,6 +83,7 @@ DECLARE_EVENT_CLASS(xe_exec_queue,
 
 		    TP_fast_assign(
 			   __assign_str(dev);
+			   __entry->q = q;
 			   __entry->class = q->class;
 			   __entry->logical_mask = q->logical_mask;
 			   __entry->gt_id = q->gt->info.id;
@@ -91,8 +93,9 @@ DECLARE_EVENT_CLASS(xe_exec_queue,
 			   __entry->flags = q->flags;
 			   ),
 
-		    TP_printk("dev=%s, %d:0x%x, gt=%d, width=%d, guc_id=%d, guc_state=0x%x, flags=0x%x",
-			      __get_str(dev), __entry->class, __entry->logical_mask,
+		    TP_printk("dev=%s, %p, %d:0x%x, gt=%d, width=%d, guc_id=%d, guc_state=0x%x, flags=0x%x",
+			      __get_str(dev), __entry->q,
+			      __entry->class, __entry->logical_mask,
 			      __entry->gt_id, __entry->width, __entry->guc_id,
 			      __entry->guc_state, __entry->flags)
 );
@@ -147,11 +150,21 @@ DEFINE_EVENT(xe_exec_queue, xe_exec_queue_close,
 	     TP_ARGS(q)
 );
 
+DEFINE_EVENT(xe_exec_queue, xe_exec_queue_wedge,
+	     TP_PROTO(struct xe_exec_queue *q),
+	     TP_ARGS(q)
+);
+
 DEFINE_EVENT(xe_exec_queue, xe_exec_queue_kill,
 	     TP_PROTO(struct xe_exec_queue *q),
 	     TP_ARGS(q)
 );
 
+DEFINE_EVENT(xe_exec_queue, xe_guc_exec_queue_kill,
+	     TP_PROTO(struct xe_exec_queue *q),
+	     TP_ARGS(q)
+);
+
 DEFINE_EVENT(xe_exec_queue, xe_exec_queue_cleanup_entity,
 	     TP_PROTO(struct xe_exec_queue *q),
 	     TP_ARGS(q)
@@ -162,6 +175,11 @@ DEFINE_EVENT(xe_exec_queue, xe_exec_queue_destroy,
 	     TP_ARGS(q)
 );
 
+DEFINE_EVENT(xe_exec_queue, xe_guc_exec_queue_destroy,
+	     TP_PROTO(struct xe_exec_queue *q),
+	     TP_ARGS(q)
+);
+
 DEFINE_EVENT(xe_exec_queue, xe_exec_queue_reset,
 	     TP_PROTO(struct xe_exec_queue *q),
 	     TP_ARGS(q)
-- 
2.34.1

[PATCH 5/7] drm/xe: Correct migration VM teardown order

[Stuart Summers]

Adjust the sequence of the migration teardown to match what
is happening in the init() function.

Signed-off-by: Stuart Summers <stuart.summers@intel.com>
---
 drivers/gpu/drm/xe/xe_migrate.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index 7345a5b65169..b1747e442a7b 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -100,8 +100,8 @@ static void xe_migrate_fini(void *arg)
 	xe_bo_put(m->pt_bo);
 	drm_suballoc_manager_fini(&m->vm_update_sa);
 	mutex_destroy(&m->job_mutex);
-	xe_vm_close_and_put(m->q->vm);
 	xe_exec_queue_put(m->q);
+	xe_vm_close_and_put(m->q->vm);
 }
 
 static u64 xe_migrate_vm_addr(u64 slot, u32 level)
-- 
2.34.1

[PATCH 6/7] drm/xe: Don't block messages to the GPU scheduler

[Stuart Summers]

Right now we are using the state of the GPU scheduler
to determine whether we send and receive messages. There
are some states, however, where we might intentionally
pause the scheduler, like a device wedge, and expect that
messages are resumed later once the user has taken the
hardware state and is attempting to reset, like an unbind.

Remove these checks in the XeKMD and let the GPU scheduler
handle state checks internally.

Signed-off-by: Stuart Summers <stuart.summers@intel.com>
---
 drivers/gpu/drm/xe/xe_gpu_scheduler.c | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler.c b/drivers/gpu/drm/xe/xe_gpu_scheduler.c
index f91e06d03511..d9d6fb641188 100644
--- a/drivers/gpu/drm/xe/xe_gpu_scheduler.c
+++ b/drivers/gpu/drm/xe/xe_gpu_scheduler.c
@@ -7,8 +7,7 @@
 
 static void xe_sched_process_msg_queue(struct xe_gpu_scheduler *sched)
 {
-	if (!READ_ONCE(sched->base.pause_submit))
-		queue_work(sched->base.submit_wq, &sched->work_process_msg);
+	queue_work(sched->base.submit_wq, &sched->work_process_msg);
 }
 
 static void xe_sched_process_msg_queue_if_ready(struct xe_gpu_scheduler *sched)
@@ -43,9 +42,6 @@ static void xe_sched_process_msg_work(struct work_struct *w)
 		container_of(w, struct xe_gpu_scheduler, work_process_msg);
 	struct xe_sched_msg *msg;
 
-	if (READ_ONCE(sched->base.pause_submit))
-		return;
-
 	msg = xe_sched_get_msg(sched);
 	if (msg) {
 		sched->ops->process_msg(msg);
-- 
2.34.1

Re: [PATCH 6/7] drm/xe: Don't block messages to the GPU scheduler

[Matthew Brost]

On Mon, Oct 13, 2025 at 04:25:03PM +0000, Stuart Summers wrote:
> Right now we are using the state of the GPU scheduler
> to determine whether we send and receive messages. There
> are some states, however, where we might intentionally
> pause the scheduler, like a device wedge, and expect that
> messages are resumed later once the user has taken the
> hardware state and is attempting to reset, like an unbind.
> 
> Remove these checks in the XeKMD and let the GPU scheduler
> handle state checks internally.
> 

We can't do this. The entire queue stop / starting mechanism relies on
getting exclusive access to the queue by ensuring the scheduler is fully
stopped - this includes messages. This will break job timeouts, GT reset
flows, and VF migration.

What exactly is the problem you are trying to solve? The device is
wedged and queues are stopped, then an unbind occurs? That is probably a
bug. IIRC even wedging a device / tearing down a queue we should always
start the queue again. We could assert in guc_submit_wedged_fini that
all queues are not paused.

Also if you having issues on unbind - there is this patch [1] which
fixes an issue too. I'm going to merge [1] now.

Matt

[1] https://patchwork.freedesktop.org/series/155417/

> Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_gpu_scheduler.c | 6 +-----
>  1 file changed, 1 insertion(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler.c b/drivers/gpu/drm/xe/xe_gpu_scheduler.c
> index f91e06d03511..d9d6fb641188 100644
> --- a/drivers/gpu/drm/xe/xe_gpu_scheduler.c
> +++ b/drivers/gpu/drm/xe/xe_gpu_scheduler.c
> @@ -7,8 +7,7 @@
>  
>  static void xe_sched_process_msg_queue(struct xe_gpu_scheduler *sched)
>  {
> -	if (!READ_ONCE(sched->base.pause_submit))
> -		queue_work(sched->base.submit_wq, &sched->work_process_msg);
> +	queue_work(sched->base.submit_wq, &sched->work_process_msg);
>  }
>  
>  static void xe_sched_process_msg_queue_if_ready(struct xe_gpu_scheduler *sched)
> @@ -43,9 +42,6 @@ static void xe_sched_process_msg_work(struct work_struct *w)
>  		container_of(w, struct xe_gpu_scheduler, work_process_msg);
>  	struct xe_sched_msg *msg;
>  
> -	if (READ_ONCE(sched->base.pause_submit))
> -		return;
> -
>  	msg = xe_sched_get_msg(sched);
>  	if (msg) {
>  		sched->ops->process_msg(msg);
> -- 
> 2.34.1
> 

Re: [PATCH 6/7] drm/xe: Don't block messages to the GPU scheduler

[Summers, Stuart]

On Mon, 2025-10-13 at 09:56 -0700, Matthew Brost wrote:
> On Mon, Oct 13, 2025 at 04:25:03PM +0000, Stuart Summers wrote:
> > Right now we are using the state of the GPU scheduler
> > to determine whether we send and receive messages. There
> > are some states, however, where we might intentionally
> > pause the scheduler, like a device wedge, and expect that
> > messages are resumed later once the user has taken the
> > hardware state and is attempting to reset, like an unbind.
> > 
> > Remove these checks in the XeKMD and let the GPU scheduler
> > handle state checks internally.
> > 
> 
> We can't do this. The entire queue stop / starting mechanism relies
> on
> getting exclusive access to the queue by ensuring the scheduler is
> fully
> stopped - this includes messages. This will break job timeouts, GT
> reset
> flows, and VF migration.

I'm not sure I full understand here. The scheduler should be stopped as
it was before, it just means we keep sending messages right? I can test
the job timeout piece to make sure...

Basically I'm arguing the start/stop mechanics should be inside the
scheduler and not in the calling driver.

> 
> What exactly is the problem you are trying to solve? The device is
> wedged and queues are stopped, then an unbind occurs? That is
> probably a
> bug. IIRC even wedging a device / tearing down a queue we should
> always
> start the queue again. We could assert in guc_submit_wedged_fini that

I think there's basically a race between sending the cleanup message
and stopping the scheduler. And once we send that message, we don't
really track it on the xe side. So if we artificially pause things on
the xe side (by adding the checks I'm removing in this patch), we can
get into a scenario where the cleanup message is sent *after* the
scheduler is paused and thus that cleanup message gets dropped, and we
never issue the deregistration for that particular exec queue.

Thanks,
Stuart

> all queues are not paused.
> 
> Also if you having issues on unbind - there is this patch [1] which
> fixes an issue too. I'm going to merge [1] now.
> 
> Matt
> 
> [1] https://patchwork.freedesktop.org/series/155417/
> 
> > Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> > ---
> >  drivers/gpu/drm/xe/xe_gpu_scheduler.c | 6 +-----
> >  1 file changed, 1 insertion(+), 5 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler.c
> > b/drivers/gpu/drm/xe/xe_gpu_scheduler.c
> > index f91e06d03511..d9d6fb641188 100644
> > --- a/drivers/gpu/drm/xe/xe_gpu_scheduler.c
> > +++ b/drivers/gpu/drm/xe/xe_gpu_scheduler.c
> > @@ -7,8 +7,7 @@
> >  
> >  static void xe_sched_process_msg_queue(struct xe_gpu_scheduler
> > *sched)
> >  {
> > -       if (!READ_ONCE(sched->base.pause_submit))
> > -               queue_work(sched->base.submit_wq, &sched-
> > >work_process_msg);
> > +       queue_work(sched->base.submit_wq, &sched-
> > >work_process_msg);
> >  }
> >  
> >  static void xe_sched_process_msg_queue_if_ready(struct
> > xe_gpu_scheduler *sched)
> > @@ -43,9 +42,6 @@ static void xe_sched_process_msg_work(struct
> > work_struct *w)
> >                 container_of(w, struct xe_gpu_scheduler,
> > work_process_msg);
> >         struct xe_sched_msg *msg;
> >  
> > -       if (READ_ONCE(sched->base.pause_submit))
> > -               return;
> > -
> >         msg = xe_sched_get_msg(sched);
> >         if (msg) {
> >                 sched->ops->process_msg(msg);
> > -- 
> > 2.34.1
> > 

Re: [PATCH 6/7] drm/xe: Don't block messages to the GPU scheduler

[Matthew Brost]

On Mon, Oct 13, 2025 at 11:17:58AM -0600, Summers, Stuart wrote:
> On Mon, 2025-10-13 at 09:56 -0700, Matthew Brost wrote:
> > On Mon, Oct 13, 2025 at 04:25:03PM +0000, Stuart Summers wrote:
> > > Right now we are using the state of the GPU scheduler
> > > to determine whether we send and receive messages. There
> > > are some states, however, where we might intentionally
> > > pause the scheduler, like a device wedge, and expect that
> > > messages are resumed later once the user has taken the
> > > hardware state and is attempting to reset, like an unbind.
> > > 
> > > Remove these checks in the XeKMD and let the GPU scheduler
> > > handle state checks internally.
> > > 
> > 
> > We can't do this. The entire queue stop / starting mechanism relies
> > on
> > getting exclusive access to the queue by ensuring the scheduler is
> > fully
> > stopped - this includes messages. This will break job timeouts, GT
> > reset
> > flows, and VF migration.
> 
> I'm not sure I full understand here. The scheduler should be stopped as
> it was before, it just means we keep sending messages right? I can test
> the job timeout piece to make sure...
> 

This will show up as an obscure race condition — 99% of the time it will
work just fine, but I can assure you it will break the entire design of
submission.

> Basically I'm arguing the start/stop mechanics should be inside the
> scheduler and not in the calling driver.
> 

The message interface is built on top of the DRM scheduler, rather than
integrated into it. Originally, I had it built into the scheduler, but
based on feedback, I moved the channel to the driver side. Therefore, we
need to hook into the stopping mechanism on the driver side. The
layering could use some cleanup, but the functionality will remain on
the driver side.

> > 
> > What exactly is the problem you are trying to solve? The device is
> > wedged and queues are stopped, then an unbind occurs? That is
> > probably a
> > bug. IIRC even wedging a device / tearing down a queue we should
> > always
> > start the queue again. We could assert in guc_submit_wedged_fini that
> 
> I think there's basically a race between sending the cleanup message
> and stopping the scheduler. And once we send that message, we don't
> really track it on the xe side. So if we artificially pause things on
> the xe side (by adding the checks I'm removing in this patch), we can
> get into a scenario where the cleanup message is sent *after* the
> scheduler is paused and thus that cleanup message gets dropped, and we
> never issue the deregistration for that particular exec queue.
> 

That's not how stopping works. Stopping prevents future work items from
being queued and flushes all in-flight work items. These work items
include running jobs, freeing jobs, or processing messages. When stopped,
each of these interfaces can set up state so that when the scheduler is
started again, the work items are requeued for processing (e.g.,
messages are stored in a linked list). The key point is that when the
scheduler is stopped, work items that could be modifying the queue state
are not running, so the entity that stopped the scheduler has exclusive
access—without requiring any locks.

Matt

> Thanks,
> Stuart
> 
> > all queues are not paused.
> > 
> > Also if you having issues on unbind - there is this patch [1] which
> > fixes an issue too. I'm going to merge [1] now.
> > 
> > Matt
> > 
> > [1] https://patchwork.freedesktop.org/series/155417/
> > 
> > > Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> > > ---
> > >  drivers/gpu/drm/xe/xe_gpu_scheduler.c | 6 +-----
> > >  1 file changed, 1 insertion(+), 5 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler.c
> > > b/drivers/gpu/drm/xe/xe_gpu_scheduler.c
> > > index f91e06d03511..d9d6fb641188 100644
> > > --- a/drivers/gpu/drm/xe/xe_gpu_scheduler.c
> > > +++ b/drivers/gpu/drm/xe/xe_gpu_scheduler.c
> > > @@ -7,8 +7,7 @@
> > >  
> > >  static void xe_sched_process_msg_queue(struct xe_gpu_scheduler
> > > *sched)
> > >  {
> > > -       if (!READ_ONCE(sched->base.pause_submit))
> > > -               queue_work(sched->base.submit_wq, &sched-
> > > >work_process_msg);
> > > +       queue_work(sched->base.submit_wq, &sched-
> > > >work_process_msg);
> > >  }
> > >  
> > >  static void xe_sched_process_msg_queue_if_ready(struct
> > > xe_gpu_scheduler *sched)
> > > @@ -43,9 +42,6 @@ static void xe_sched_process_msg_work(struct
> > > work_struct *w)
> > >                 container_of(w, struct xe_gpu_scheduler,
> > > work_process_msg);
> > >         struct xe_sched_msg *msg;
> > >  
> > > -       if (READ_ONCE(sched->base.pause_submit))
> > > -               return;
> > > -
> > >         msg = xe_sched_get_msg(sched);
> > >         if (msg) {
> > >                 sched->ops->process_msg(msg);
> > > -- 
> > > 2.34.1
> > > 
> 

Re: [PATCH 6/7] drm/xe: Don't block messages to the GPU scheduler

[Summers, Stuart]

On Mon, 2025-10-13 at 10:31 -0700, Matthew Brost wrote:
> On Mon, Oct 13, 2025 at 11:17:58AM -0600, Summers, Stuart wrote:
> > On Mon, 2025-10-13 at 09:56 -0700, Matthew Brost wrote:
> > > On Mon, Oct 13, 2025 at 04:25:03PM +0000, Stuart Summers wrote:
> > > > Right now we are using the state of the GPU scheduler
> > > > to determine whether we send and receive messages. There
> > > > are some states, however, where we might intentionally
> > > > pause the scheduler, like a device wedge, and expect that
> > > > messages are resumed later once the user has taken the
> > > > hardware state and is attempting to reset, like an unbind.
> > > > 
> > > > Remove these checks in the XeKMD and let the GPU scheduler
> > > > handle state checks internally.
> > > > 
> > > 
> > > We can't do this. The entire queue stop / starting mechanism
> > > relies
> > > on
> > > getting exclusive access to the queue by ensuring the scheduler
> > > is
> > > fully
> > > stopped - this includes messages. This will break job timeouts,
> > > GT
> > > reset
> > > flows, and VF migration.
> > 
> > I'm not sure I full understand here. The scheduler should be
> > stopped as
> > it was before, it just means we keep sending messages right? I can
> > test
> > the job timeout piece to make sure...
> > 
> 
> This will show up as an obscure race condition — 99% of the time it
> will
> work just fine, but I can assure you it will break the entire design
> of
> submission.

Ok

> 
> > Basically I'm arguing the start/stop mechanics should be inside the
> > scheduler and not in the calling driver.
> > 
> 
> The message interface is built on top of the DRM scheduler, rather
> than
> integrated into it. Originally, I had it built into the scheduler,
> but
> based on feedback, I moved the channel to the driver side. Therefore,
> we
> need to hook into the stopping mechanism on the driver side. The
> layering could use some cleanup, but the functionality will remain on
> the driver side.

Ah, thanks for the history there. I wasn't aware of that.

> 
> > > 
> > > What exactly is the problem you are trying to solve? The device
> > > is
> > > wedged and queues are stopped, then an unbind occurs? That is
> > > probably a
> > > bug. IIRC even wedging a device / tearing down a queue we should
> > > always
> > > start the queue again. We could assert in guc_submit_wedged_fini
> > > that
> > 
> > I think there's basically a race between sending the cleanup
> > message
> > and stopping the scheduler. And once we send that message, we don't
> > really track it on the xe side. So if we artificially pause things
> > on
> > the xe side (by adding the checks I'm removing in this patch), we
> > can
> > get into a scenario where the cleanup message is sent *after* the
> > scheduler is paused and thus that cleanup message gets dropped, and
> > we
> > never issue the deregistration for that particular exec queue.
> > 
> 
> That's not how stopping works. Stopping prevents future work items
> from
> being queued and flushes all in-flight work items. These work items
> include running jobs, freeing jobs, or processing messages. When
> stopped,
> each of these interfaces can set up state so that when the scheduler
> is
> started again, the work items are requeued for processing (e.g.,
> messages are stored in a linked list). The key point is that when the
> scheduler is stopped, work items that could be modifying the queue
> state
> are not running, so the entity that stopped the scheduler has
> exclusive
> access—without requiring any locks.

Ok so basically we still need to keep interacting with the scheduler
when paused, we just aren't starting the work queue. Then once the
queue starts we expect all of those messages to be processed.

Let me look a little harder at why that isn't happening here and I'll
get back...

Thanks,
Stuart

> 
> Matt
> 
> > Thanks,
> > Stuart
> > 
> > > all queues are not paused.
> > > 
> > > Also if you having issues on unbind - there is this patch [1]
> > > which
> > > fixes an issue too. I'm going to merge [1] now.
> > > 
> > > Matt
> > > 
> > > [1] https://patchwork.freedesktop.org/series/155417/
> > > 
> > > > Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> > > > ---
> > > >  drivers/gpu/drm/xe/xe_gpu_scheduler.c | 6 +-----
> > > >  1 file changed, 1 insertion(+), 5 deletions(-)
> > > > 
> > > > diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler.c
> > > > b/drivers/gpu/drm/xe/xe_gpu_scheduler.c
> > > > index f91e06d03511..d9d6fb641188 100644
> > > > --- a/drivers/gpu/drm/xe/xe_gpu_scheduler.c
> > > > +++ b/drivers/gpu/drm/xe/xe_gpu_scheduler.c
> > > > @@ -7,8 +7,7 @@
> > > >  
> > > >  static void xe_sched_process_msg_queue(struct xe_gpu_scheduler
> > > > *sched)
> > > >  {
> > > > -       if (!READ_ONCE(sched->base.pause_submit))
> > > > -               queue_work(sched->base.submit_wq, &sched-
> > > > > work_process_msg);
> > > > +       queue_work(sched->base.submit_wq, &sched-
> > > > > work_process_msg);
> > > >  }
> > > >  
> > > >  static void xe_sched_process_msg_queue_if_ready(struct
> > > > xe_gpu_scheduler *sched)
> > > > @@ -43,9 +42,6 @@ static void xe_sched_process_msg_work(struct
> > > > work_struct *w)
> > > >                 container_of(w, struct xe_gpu_scheduler,
> > > > work_process_msg);
> > > >         struct xe_sched_msg *msg;
> > > >  
> > > > -       if (READ_ONCE(sched->base.pause_submit))
> > > > -               return;
> > > > -
> > > >         msg = xe_sched_get_msg(sched);
> > > >         if (msg) {
> > > >                 sched->ops->process_msg(msg);
> > > > -- 
> > > > 2.34.1
> > > > 
> > 

Re: [PATCH 6/7] drm/xe: Don't block messages to the GPU scheduler

[Summers, Stuart]

On Mon, 2025-10-13 at 17:38 +0000, Summers, Stuart wrote:
> On Mon, 2025-10-13 at 10:31 -0700, Matthew Brost wrote:
> > On Mon, Oct 13, 2025 at 11:17:58AM -0600, Summers, Stuart wrote:
> > > On Mon, 2025-10-13 at 09:56 -0700, Matthew Brost wrote:
> > > > On Mon, Oct 13, 2025 at 04:25:03PM +0000, Stuart Summers wrote:
> > > > > Right now we are using the state of the GPU scheduler
> > > > > to determine whether we send and receive messages. There
> > > > > are some states, however, where we might intentionally
> > > > > pause the scheduler, like a device wedge, and expect that
> > > > > messages are resumed later once the user has taken the
> > > > > hardware state and is attempting to reset, like an unbind.
> > > > > 
> > > > > Remove these checks in the XeKMD and let the GPU scheduler
> > > > > handle state checks internally.
> > > > > 
> > > > 
> > > > We can't do this. The entire queue stop / starting mechanism
> > > > relies
> > > > on
> > > > getting exclusive access to the queue by ensuring the scheduler
> > > > is
> > > > fully
> > > > stopped - this includes messages. This will break job timeouts,
> > > > GT
> > > > reset
> > > > flows, and VF migration.
> > > 
> > > I'm not sure I full understand here. The scheduler should be
> > > stopped as
> > > it was before, it just means we keep sending messages right? I
> > > can
> > > test
> > > the job timeout piece to make sure...
> > > 
> > 
> > This will show up as an obscure race condition — 99% of the time it
> > will
> > work just fine, but I can assure you it will break the entire
> > design
> > of
> > submission.
> 
> Ok
> 
> > 
> > > Basically I'm arguing the start/stop mechanics should be inside
> > > the
> > > scheduler and not in the calling driver.
> > > 
> > 
> > The message interface is built on top of the DRM scheduler, rather
> > than
> > integrated into it. Originally, I had it built into the scheduler,
> > but
> > based on feedback, I moved the channel to the driver side.
> > Therefore,
> > we
> > need to hook into the stopping mechanism on the driver side. The
> > layering could use some cleanup, but the functionality will remain
> > on
> > the driver side.
> 
> Ah, thanks for the history there. I wasn't aware of that.
> 
> > 
> > > > 
> > > > What exactly is the problem you are trying to solve? The device
> > > > is
> > > > wedged and queues are stopped, then an unbind occurs? That is
> > > > probably a
> > > > bug. IIRC even wedging a device / tearing down a queue we
> > > > should
> > > > always
> > > > start the queue again. We could assert in
> > > > guc_submit_wedged_fini
> > > > that
> > > 
> > > I think there's basically a race between sending the cleanup
> > > message
> > > and stopping the scheduler. And once we send that message, we
> > > don't
> > > really track it on the xe side. So if we artificially pause
> > > things
> > > on
> > > the xe side (by adding the checks I'm removing in this patch), we
> > > can
> > > get into a scenario where the cleanup message is sent *after* the
> > > scheduler is paused and thus that cleanup message gets dropped,
> > > and
> > > we
> > > never issue the deregistration for that particular exec queue.
> > > 
> > 
> > That's not how stopping works. Stopping prevents future work items
> > from
> > being queued and flushes all in-flight work items. These work items
> > include running jobs, freeing jobs, or processing messages. When
> > stopped,
> > each of these interfaces can set up state so that when the
> > scheduler
> > is
> > started again, the work items are requeued for processing (e.g.,
> > messages are stored in a linked list). The key point is that when
> > the
> > scheduler is stopped, work items that could be modifying the queue
> > state
> > are not running, so the entity that stopped the scheduler has
> > exclusive
> > access—without requiring any locks.
> 
> Ok so basically we still need to keep interacting with the scheduler
> when paused, we just aren't starting the work queue. Then once the
> queue starts we expect all of those messages to be processed.
> 
> Let me look a little harder at why that isn't happening here and I'll
> get back...

Just to add quickly that I see the message queue you're talking about
and I agree this should still be working. I still haven't figured out
why those messages get lost in my scenario. I'll report back as soon as
I have something there.

Thanks,
Stuart

> 
> Thanks,
> Stuart
> 
> > 
> > Matt
> > 
> > > Thanks,
> > > Stuart
> > > 
> > > > all queues are not paused.
> > > > 
> > > > Also if you having issues on unbind - there is this patch [1]
> > > > which
> > > > fixes an issue too. I'm going to merge [1] now.
> > > > 
> > > > Matt
> > > > 
> > > > [1] https://patchwork.freedesktop.org/series/155417/
> > > > 
> > > > > Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> > > > > ---
> > > > >  drivers/gpu/drm/xe/xe_gpu_scheduler.c | 6 +-----
> > > > >  1 file changed, 1 insertion(+), 5 deletions(-)
> > > > > 
> > > > > diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler.c
> > > > > b/drivers/gpu/drm/xe/xe_gpu_scheduler.c
> > > > > index f91e06d03511..d9d6fb641188 100644
> > > > > --- a/drivers/gpu/drm/xe/xe_gpu_scheduler.c
> > > > > +++ b/drivers/gpu/drm/xe/xe_gpu_scheduler.c
> > > > > @@ -7,8 +7,7 @@
> > > > >  
> > > > >  static void xe_sched_process_msg_queue(struct
> > > > > xe_gpu_scheduler
> > > > > *sched)
> > > > >  {
> > > > > -       if (!READ_ONCE(sched->base.pause_submit))
> > > > > -               queue_work(sched->base.submit_wq, &sched-
> > > > > > work_process_msg);
> > > > > +       queue_work(sched->base.submit_wq, &sched-
> > > > > > work_process_msg);
> > > > >  }
> > > > >  
> > > > >  static void xe_sched_process_msg_queue_if_ready(struct
> > > > > xe_gpu_scheduler *sched)
> > > > > @@ -43,9 +42,6 @@ static void
> > > > > xe_sched_process_msg_work(struct
> > > > > work_struct *w)
> > > > >                 container_of(w, struct xe_gpu_scheduler,
> > > > > work_process_msg);
> > > > >         struct xe_sched_msg *msg;
> > > > >  
> > > > > -       if (READ_ONCE(sched->base.pause_submit))
> > > > > -               return;
> > > > > -
> > > > >         msg = xe_sched_get_msg(sched);
> > > > >         if (msg) {
> > > > >                 sched->ops->process_msg(msg);
> > > > > -- 
> > > > > 2.34.1
> > > > > 
> > > 
> 

[PATCH 7/7] drm/xe: Check for GuC responses on disabling scheduling

[Stuart Summers]

Currently if the GuC becomes unresponsive during a schedule
disable event, after we send the CT request, the driver
doesn't have a good way to recover. In most other cases,
we explicitly wait for GuC to respond by checking either
pending_enable, pending_disable, or some other state change
that we expect to be set after the response from GuC is
received for that particular request. Add a similar check
on the schedule disable side and make sure the queue state
for the queue being disabled is reset properly in that case.

v2: Only call the deregistration sequence since in this
    case the scheduling handler should be reset during
    the GT reset.
    By doing that, we don't need a way to track the scheduling
    disable request handler for that queue, making this sequence
    simpler. As a result, don't mark the queue as banned.

Signed-off-by: Stuart Summers <stuart.summers@intel.com>
---
 drivers/gpu/drm/xe/xe_guc_submit.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index 5ec1e4a83d68..6ba4a29007eb 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -918,6 +918,8 @@ int xe_guc_read_stopped(struct xe_guc *guc)
 		GUC_CONTEXT_##enable_disable,				\
 	}
 
+static void handle_deregister_done(struct xe_guc *guc, struct xe_exec_queue *q);
+
 static void disable_scheduling_deregister(struct xe_guc *guc,
 					  struct xe_exec_queue *q)
 {
@@ -955,6 +957,17 @@ static void disable_scheduling_deregister(struct xe_guc *guc,
 	xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action),
 		       G2H_LEN_DW_SCHED_CONTEXT_MODE_SET +
 		       G2H_LEN_DW_DEREGISTER_CONTEXT, 2);
+
+	ret = wait_event_timeout(guc->ct.wq,
+				 !exec_queue_pending_disable(q) ||
+				 xe_guc_read_stopped(guc),
+				 HZ * 5);
+	if (!ret || xe_guc_read_stopped(guc)) {
+		xe_gt_warn(guc_to_gt(guc), "Schedule disable failed to respond");
+		handle_deregister_done(guc, q);
+		xe_gt_reset_async(q->gt);
+	}
+
 }
 
 static void xe_guc_exec_queue_trigger_cleanup(struct xe_exec_queue *q)
-- 
2.34.1

Re: [PATCH 0/7] Fix a couple of wedge corner-case memory leaks

[Matthew Brost]

On Mon, Oct 13, 2025 at 04:24:57PM +0000, Stuart Summers wrote:
> Most of the patches in this series are just adding
> some debug hints to help track these down. I split
> these up in case we want to pick and choose which ones
> to include in the tree. I found them useful.
> 
> The main two interesting patches are the last two in the
> series which are fixing some corner cases when the
> driver becomes wedged in the middle of either communication
> with the DRM scheduler or in the event the GuC becomes
> unresponsive. In both of these cases there is a chance
> we could leak memory around the exec queue members
> like the LRC and the LRC BO. These patches fix those
> scenarios.
> 

Ok, I think I see the problem. I believe the correct approach is:

- Apply [1]

- Ensure all schedulers are not stopped in guc_submit_wedged_fini

- Clean up any lost H2G in guc_submit_wedged_fini similar to a GT reset

- Wait on all async scheduler work queue opertaions complete somewhere
  (this is part of VLK-80263, I was going to try to look at this part
  sometime this week). 

Matt

[1] https://patchwork.freedesktop.org/series/155417/

> v2: Address feedback from Matt:
>     - Let the DRM scheduler handle pausing/unpausing
>     - Still do the wait after scheduling disable/deregister
>       as with the previous patch, but skip the intermediate
>       software-based schedule disable using the "banned"
>       flag and instead just jump straight to the deregister
>       handling which will fully reset the queue state.
>       Note that for this case I am seeing a hardware failure
>       after submitting to GuC but before receiving the
>       response from GuC. So even if we wedge in this case
>       (monitoring the hardware state change), the queue
>       itself is not wedged because of the active GuC
>       submission (CT is not stalled at that point).
> 
> Stuart Summers (7):
>   drm/xe: Add additional trace points for LRCs
>   drm/xe: Add a trace point for VM close
>   drm/xe: Add the BO pointer info to the BO trace
>   drm/xe: Add new exec queue trace points
>   drm/xe: Correct migration VM teardown order
>   drm/xe: Don't block messages to the GPU scheduler
>   drm/xe: Check for GuC responses on disabling scheduling
> 
>  drivers/gpu/drm/xe/xe_exec_queue.c    |  4 +++
>  drivers/gpu/drm/xe/xe_gpu_scheduler.c |  6 +---
>  drivers/gpu/drm/xe/xe_guc_submit.c    | 24 ++++++++++++---
>  drivers/gpu/drm/xe/xe_lrc.c           |  4 +++
>  drivers/gpu/drm/xe/xe_lrc.h           |  3 ++
>  drivers/gpu/drm/xe/xe_migrate.c       |  2 +-
>  drivers/gpu/drm/xe/xe_trace.h         | 22 ++++++++++++--
>  drivers/gpu/drm/xe/xe_trace_bo.h      | 12 ++++++--
>  drivers/gpu/drm/xe/xe_trace_lrc.h     | 42 ++++++++++++++++++++++++++-
>  drivers/gpu/drm/xe/xe_vm.c            |  2 ++
>  10 files changed, 106 insertions(+), 15 deletions(-)
> 
> -- 
> 2.34.1
> 

Re: [PATCH 0/7] Fix a couple of wedge corner-case memory leaks

[Summers, Stuart]

On Mon, 2025-10-13 at 10:04 -0700, Matthew Brost wrote:
> On Mon, Oct 13, 2025 at 04:24:57PM +0000, Stuart Summers wrote:
> > Most of the patches in this series are just adding
> > some debug hints to help track these down. I split
> > these up in case we want to pick and choose which ones
> > to include in the tree. I found them useful.
> > 
> > The main two interesting patches are the last two in the
> > series which are fixing some corner cases when the
> > driver becomes wedged in the middle of either communication
> > with the DRM scheduler or in the event the GuC becomes
> > unresponsive. In both of these cases there is a chance
> > we could leak memory around the exec queue members
> > like the LRC and the LRC BO. These patches fix those
> > scenarios.
> > 
> 
> Ok, I think I see the problem. I believe the correct approach is:
> 
> - Apply [1]

I get the need for [1], but I don't think this is going to solve the
issue I'm facing specifically since, in my case, GuC is alive at the
time of schedule disable and becomes unresponsive only after that H2G
is sent.

Basically I think there are a few things going on here.

I'm pulling [1] now though and I'll test and get back.

> 
> - Ensure all schedulers are not stopped in guc_submit_wedged_fini
> 
> - Clean up any lost H2G in guc_submit_wedged_fini similar to a GT
> reset
> 
> - Wait on all async scheduler work queue opertaions complete
> somewhere
>   (this is part of VLK-80263, I was going to try to look at this part
>   sometime this week). 

Oh thanks for the link here too! I'll see if this fits in to my
scenario as well.

Thanks,
Stuart

> 
> Matt
> 
> [1] https://patchwork.freedesktop.org/series/155417/
> 
> > v2: Address feedback from Matt:
> >     - Let the DRM scheduler handle pausing/unpausing
> >     - Still do the wait after scheduling disable/deregister
> >       as with the previous patch, but skip the intermediate
> >       software-based schedule disable using the "banned"
> >       flag and instead just jump straight to the deregister
> >       handling which will fully reset the queue state.
> >       Note that for this case I am seeing a hardware failure
> >       after submitting to GuC but before receiving the
> >       response from GuC. So even if we wedge in this case
> >       (monitoring the hardware state change), the queue
> >       itself is not wedged because of the active GuC
> >       submission (CT is not stalled at that point).
> > 
> > Stuart Summers (7):
> >   drm/xe: Add additional trace points for LRCs
> >   drm/xe: Add a trace point for VM close
> >   drm/xe: Add the BO pointer info to the BO trace
> >   drm/xe: Add new exec queue trace points
> >   drm/xe: Correct migration VM teardown order
> >   drm/xe: Don't block messages to the GPU scheduler
> >   drm/xe: Check for GuC responses on disabling scheduling
> > 
> >  drivers/gpu/drm/xe/xe_exec_queue.c    |  4 +++
> >  drivers/gpu/drm/xe/xe_gpu_scheduler.c |  6 +---
> >  drivers/gpu/drm/xe/xe_guc_submit.c    | 24 ++++++++++++---
> >  drivers/gpu/drm/xe/xe_lrc.c           |  4 +++
> >  drivers/gpu/drm/xe/xe_lrc.h           |  3 ++
> >  drivers/gpu/drm/xe/xe_migrate.c       |  2 +-
> >  drivers/gpu/drm/xe/xe_trace.h         | 22 ++++++++++++--
> >  drivers/gpu/drm/xe/xe_trace_bo.h      | 12 ++++++--
> >  drivers/gpu/drm/xe/xe_trace_lrc.h     | 42
> > ++++++++++++++++++++++++++-
> >  drivers/gpu/drm/xe/xe_vm.c            |  2 ++
> >  10 files changed, 106 insertions(+), 15 deletions(-)
> > 
> > -- 
> > 2.34.1
> > 

Re: [PATCH 0/7] Fix a couple of wedge corner-case memory leaks

[Summers, Stuart]

On Mon, 2025-10-13 at 17:13 +0000, Summers, Stuart wrote:
> On Mon, 2025-10-13 at 10:04 -0700, Matthew Brost wrote:
> > On Mon, Oct 13, 2025 at 04:24:57PM +0000, Stuart Summers wrote:
> > > Most of the patches in this series are just adding
> > > some debug hints to help track these down. I split
> > > these up in case we want to pick and choose which ones
> > > to include in the tree. I found them useful.
> > > 
> > > The main two interesting patches are the last two in the
> > > series which are fixing some corner cases when the
> > > driver becomes wedged in the middle of either communication
> > > with the DRM scheduler or in the event the GuC becomes
> > > unresponsive. In both of these cases there is a chance
> > > we could leak memory around the exec queue members
> > > like the LRC and the LRC BO. These patches fix those
> > > scenarios.
> > > 
> > 
> > Ok, I think I see the problem. I believe the correct approach is:
> > 
> > - Apply [1]
> 
> I get the need for [1], but I don't think this is going to solve the
> issue I'm facing specifically since, in my case, GuC is alive at the
> time of schedule disable and becomes unresponsive only after that H2G
> is sent.
> 
> Basically I think there are a few things going on here.
> 
> I'm pulling [1] now though and I'll test and get back.

Yeah unfortunately this doesn't cover the case where we can submit to
GuC (GuC is alive on deregistration/schedule disable) but then GuC
stops responding before we get any of those responses back. We just
aren't tracking that. I still think the second patch in this series is
needed for that reason.

> 
> > 
> > - Ensure all schedulers are not stopped in guc_submit_wedged_fini
> > 
> > - Clean up any lost H2G in guc_submit_wedged_fini similar to a GT
> > reset
> > 
> > - Wait on all async scheduler work queue opertaions complete
> > somewhere
> >   (this is part of VLK-80263, I was going to try to look at this
> > part
> >   sometime this week). 
> 
> Oh thanks for the link here too! I'll see if this fits in to my
> scenario as well.

I did try adding a guc_sanitize() into the wedge_fini() function and it
isn't helping. I'm still debugging here though. I agree it seems like
we could use something there.

w.r.t. vlk-80263, we do already have a 5s wait on all exec queues to
clear there. I think this isn't the only issue though, although I
haven't looked through your vf case specifically there.

Thanks,
Stuart

> 
> Thanks,
> Stuart
> 
> > 
> > Matt
> > 
> > [1] https://patchwork.freedesktop.org/series/155417/
> > 
> > > v2: Address feedback from Matt:
> > >     - Let the DRM scheduler handle pausing/unpausing
> > >     - Still do the wait after scheduling disable/deregister
> > >       as with the previous patch, but skip the intermediate
> > >       software-based schedule disable using the "banned"
> > >       flag and instead just jump straight to the deregister
> > >       handling which will fully reset the queue state.
> > >       Note that for this case I am seeing a hardware failure
> > >       after submitting to GuC but before receiving the
> > >       response from GuC. So even if we wedge in this case
> > >       (monitoring the hardware state change), the queue
> > >       itself is not wedged because of the active GuC
> > >       submission (CT is not stalled at that point).
> > > 
> > > Stuart Summers (7):
> > >   drm/xe: Add additional trace points for LRCs
> > >   drm/xe: Add a trace point for VM close
> > >   drm/xe: Add the BO pointer info to the BO trace
> > >   drm/xe: Add new exec queue trace points
> > >   drm/xe: Correct migration VM teardown order
> > >   drm/xe: Don't block messages to the GPU scheduler
> > >   drm/xe: Check for GuC responses on disabling scheduling
> > > 
> > >  drivers/gpu/drm/xe/xe_exec_queue.c    |  4 +++
> > >  drivers/gpu/drm/xe/xe_gpu_scheduler.c |  6 +---
> > >  drivers/gpu/drm/xe/xe_guc_submit.c    | 24 ++++++++++++---
> > >  drivers/gpu/drm/xe/xe_lrc.c           |  4 +++
> > >  drivers/gpu/drm/xe/xe_lrc.h           |  3 ++
> > >  drivers/gpu/drm/xe/xe_migrate.c       |  2 +-
> > >  drivers/gpu/drm/xe/xe_trace.h         | 22 ++++++++++++--
> > >  drivers/gpu/drm/xe/xe_trace_bo.h      | 12 ++++++--
> > >  drivers/gpu/drm/xe/xe_trace_lrc.h     | 42
> > > ++++++++++++++++++++++++++-
> > >  drivers/gpu/drm/xe/xe_vm.c            |  2 ++
> > >  10 files changed, 106 insertions(+), 15 deletions(-)
> > > 
> > > -- 
> > > 2.34.1
> > > 
> 

✗ CI.checkpatch: warning for Fix a couple of wedge corner-case memory leaks (rev2)

[Patchwork]

== Series Details ==

Series: Fix a couple of wedge corner-case memory leaks (rev2)
URL   : https://patchwork.freedesktop.org/series/155352/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
fbd08a78c3a3bb17964db2a326514c69c1dca660
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 148a194321a6419f2cd3c6596da86530cb8a03eb
Author: Stuart Summers <stuart.summers@intel.com>
Date:   Mon Oct 13 16:25:04 2025 +0000

    drm/xe: Check for GuC responses on disabling scheduling
    
    Currently if the GuC becomes unresponsive during a schedule
    disable event, after we send the CT request, the driver
    doesn't have a good way to recover. In most other cases,
    we explicitly wait for GuC to respond by checking either
    pending_enable, pending_disable, or some other state change
    that we expect to be set after the response from GuC is
    received for that particular request. Add a similar check
    on the schedule disable side and make sure the queue state
    for the queue being disabled is reset properly in that case.
    
    v2: Only call the deregistration sequence since in this
        case the scheduling handler should be reset during
        the GT reset.
        By doing that, we don't need a way to track the scheduling
        disable request handler for that queue, making this sequence
        simpler. As a result, don't mark the queue as banned.
    
    Signed-off-by: Stuart Summers <stuart.summers@intel.com>
+ /mt/dim checkpatch b41ed93897ccd65457801b2ef4a3a32064f1fab9 drm-intel
bf06a8fbe76b drm/xe: Add additional trace points for LRCs
-:78: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#78: FILE: drivers/gpu/drm/xe/xe_trace_lrc.h:45:
+DECLARE_EVENT_CLASS(xe_lrc,
+	    TP_PROTO(struct xe_lrc *lrc),

-:81: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#81: FILE: drivers/gpu/drm/xe/xe_trace_lrc.h:48:
+	    TP_STRUCT__entry(

-:87: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#87: FILE: drivers/gpu/drm/xe/xe_trace_lrc.h:54:
+	    TP_fast_assign(

total: 0 errors, 0 warnings, 3 checks, 91 lines checked
872faf627027 drm/xe: Add a trace point for VM close
84664592b1dc drm/xe: Add the BO pointer info to the BO trace
1fc3572d4146 drm/xe: Add new exec queue trace points
81b91508bd7e drm/xe: Correct migration VM teardown order
7b443903fd60 drm/xe: Don't block messages to the GPU scheduler
148a194321a6 drm/xe: Check for GuC responses on disabling scheduling

✓ CI.KUnit: success for Fix a couple of wedge corner-case memory leaks (rev2)

[Patchwork]

== Series Details ==

Series: Fix a couple of wedge corner-case memory leaks (rev2)
URL   : https://patchwork.freedesktop.org/series/155352/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[18:45:04] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:45:08] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:45:38] Starting KUnit Kernel (1/1)...
[18:45:38] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:45:38] ================== guc_buf (11 subtests) ===================
[18:45:38] [PASSED] test_smallest
[18:45:38] [PASSED] test_largest
[18:45:38] [PASSED] test_granular
[18:45:38] [PASSED] test_unique
[18:45:38] [PASSED] test_overlap
[18:45:38] [PASSED] test_reusable
[18:45:38] [PASSED] test_too_big
[18:45:38] [PASSED] test_flush
[18:45:38] [PASSED] test_lookup
[18:45:38] [PASSED] test_data
[18:45:38] [PASSED] test_class
[18:45:38] ===================== [PASSED] guc_buf =====================
[18:45:38] =================== guc_dbm (7 subtests) ===================
[18:45:38] [PASSED] test_empty
[18:45:38] [PASSED] test_default
[18:45:38] ======================== test_size  ========================
[18:45:38] [PASSED] 4
[18:45:38] [PASSED] 8
[18:45:38] [PASSED] 32
[18:45:38] [PASSED] 256
[18:45:38] ==================== [PASSED] test_size ====================
[18:45:38] ======================= test_reuse  ========================
[18:45:38] [PASSED] 4
[18:45:38] [PASSED] 8
[18:45:38] [PASSED] 32
[18:45:38] [PASSED] 256
[18:45:38] =================== [PASSED] test_reuse ====================
[18:45:38] =================== test_range_overlap  ====================
[18:45:38] [PASSED] 4
[18:45:38] [PASSED] 8
[18:45:38] [PASSED] 32
[18:45:38] [PASSED] 256
[18:45:38] =============== [PASSED] test_range_overlap ================
[18:45:38] =================== test_range_compact  ====================
[18:45:38] [PASSED] 4
[18:45:38] [PASSED] 8
[18:45:38] [PASSED] 32
[18:45:38] [PASSED] 256
[18:45:38] =============== [PASSED] test_range_compact ================
[18:45:38] ==================== test_range_spare  =====================
[18:45:38] [PASSED] 4
[18:45:38] [PASSED] 8
[18:45:38] [PASSED] 32
[18:45:38] [PASSED] 256
[18:45:38] ================ [PASSED] test_range_spare =================
[18:45:38] ===================== [PASSED] guc_dbm =====================
[18:45:38] =================== guc_idm (6 subtests) ===================
[18:45:38] [PASSED] bad_init
[18:45:38] [PASSED] no_init
[18:45:38] [PASSED] init_fini
[18:45:38] [PASSED] check_used
[18:45:38] [PASSED] check_quota
[18:45:38] [PASSED] check_all
[18:45:38] ===================== [PASSED] guc_idm =====================
[18:45:38] ================== no_relay (3 subtests) ===================
[18:45:38] [PASSED] xe_drops_guc2pf_if_not_ready
[18:45:38] [PASSED] xe_drops_guc2vf_if_not_ready
[18:45:38] [PASSED] xe_rejects_send_if_not_ready
[18:45:38] ==================== [PASSED] no_relay =====================
[18:45:38] ================== pf_relay (14 subtests) ==================
[18:45:38] [PASSED] pf_rejects_guc2pf_too_short
[18:45:38] [PASSED] pf_rejects_guc2pf_too_long
[18:45:38] [PASSED] pf_rejects_guc2pf_no_payload
[18:45:38] [PASSED] pf_fails_no_payload
[18:45:38] [PASSED] pf_fails_bad_origin
[18:45:38] [PASSED] pf_fails_bad_type
[18:45:38] [PASSED] pf_txn_reports_error
[18:45:38] [PASSED] pf_txn_sends_pf2guc
[18:45:38] [PASSED] pf_sends_pf2guc
[18:45:38] [SKIPPED] pf_loopback_nop
[18:45:38] [SKIPPED] pf_loopback_echo
[18:45:38] [SKIPPED] pf_loopback_fail
[18:45:38] [SKIPPED] pf_loopback_busy
[18:45:38] [SKIPPED] pf_loopback_retry
[18:45:38] ==================== [PASSED] pf_relay =====================
[18:45:38] ================== vf_relay (3 subtests) ===================
[18:45:38] [PASSED] vf_rejects_guc2vf_too_short
[18:45:38] [PASSED] vf_rejects_guc2vf_too_long
[18:45:38] [PASSED] vf_rejects_guc2vf_no_payload
[18:45:38] ==================== [PASSED] vf_relay =====================
[18:45:38] ===================== lmtt (1 subtest) =====================
[18:45:38] ======================== test_ops  =========================
[18:45:38] [PASSED] 2-level
[18:45:38] [PASSED] multi-level
[18:45:38] ==================== [PASSED] test_ops =====================
[18:45:38] ====================== [PASSED] lmtt =======================
[18:45:38] ================= pf_service (11 subtests) =================
[18:45:38] [PASSED] pf_negotiate_any
[18:45:38] [PASSED] pf_negotiate_base_match
[18:45:38] [PASSED] pf_negotiate_base_newer
[18:45:38] [PASSED] pf_negotiate_base_next
[18:45:38] [SKIPPED] pf_negotiate_base_older
[18:45:38] [PASSED] pf_negotiate_base_prev
[18:45:38] [PASSED] pf_negotiate_latest_match
[18:45:38] [PASSED] pf_negotiate_latest_newer
[18:45:38] [PASSED] pf_negotiate_latest_next
[18:45:38] [SKIPPED] pf_negotiate_latest_older
[18:45:38] [SKIPPED] pf_negotiate_latest_prev
[18:45:38] =================== [PASSED] pf_service ====================
[18:45:38] ================= xe_guc_g2g (2 subtests) ==================
[18:45:38] ============== xe_live_guc_g2g_kunit_default  ==============
[18:45:38] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[18:45:38] ============== xe_live_guc_g2g_kunit_allmem  ===============
[18:45:38] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[18:45:38] =================== [SKIPPED] xe_guc_g2g ===================
[18:45:38] =================== xe_mocs (2 subtests) ===================
[18:45:38] ================ xe_live_mocs_kernel_kunit  ================
[18:45:38] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[18:45:38] ================ xe_live_mocs_reset_kunit  =================
[18:45:38] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[18:45:38] ==================== [SKIPPED] xe_mocs =====================
[18:45:38] ================= xe_migrate (2 subtests) ==================
[18:45:38] ================= xe_migrate_sanity_kunit  =================
[18:45:38] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[18:45:38] ================== xe_validate_ccs_kunit  ==================
[18:45:38] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[18:45:38] =================== [SKIPPED] xe_migrate ===================
[18:45:38] ================== xe_dma_buf (1 subtest) ==================
[18:45:38] ==================== xe_dma_buf_kunit  =====================
[18:45:38] ================ [SKIPPED] xe_dma_buf_kunit ================
[18:45:38] =================== [SKIPPED] xe_dma_buf ===================
[18:45:38] ================= xe_bo_shrink (1 subtest) =================
[18:45:38] =================== xe_bo_shrink_kunit  ====================
[18:45:38] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[18:45:38] ================== [SKIPPED] xe_bo_shrink ==================
[18:45:38] ==================== xe_bo (2 subtests) ====================
[18:45:38] ================== xe_ccs_migrate_kunit  ===================
[18:45:38] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[18:45:38] ==================== xe_bo_evict_kunit  ====================
[18:45:38] =============== [SKIPPED] xe_bo_evict_kunit ================
[18:45:38] ===================== [SKIPPED] xe_bo ======================
[18:45:38] ==================== args (11 subtests) ====================
[18:45:38] [PASSED] count_args_test
[18:45:38] [PASSED] call_args_example
[18:45:38] [PASSED] call_args_test
[18:45:38] [PASSED] drop_first_arg_example
[18:45:38] [PASSED] drop_first_arg_test
[18:45:38] [PASSED] first_arg_example
[18:45:38] [PASSED] first_arg_test
[18:45:38] [PASSED] last_arg_example
[18:45:38] [PASSED] last_arg_test
[18:45:38] [PASSED] pick_arg_example
[18:45:38] [PASSED] sep_comma_example
[18:45:38] ====================== [PASSED] args =======================
[18:45:38] =================== xe_pci (3 subtests) ====================
[18:45:38] ==================== check_graphics_ip  ====================
[18:45:38] [PASSED] 12.00 Xe_LP
[18:45:38] [PASSED] 12.10 Xe_LP+
[18:45:38] [PASSED] 12.55 Xe_HPG
[18:45:38] [PASSED] 12.60 Xe_HPC
[18:45:38] [PASSED] 12.70 Xe_LPG
[18:45:38] [PASSED] 12.71 Xe_LPG
[18:45:38] [PASSED] 12.74 Xe_LPG+
[18:45:38] [PASSED] 20.01 Xe2_HPG
[18:45:38] [PASSED] 20.02 Xe2_HPG
[18:45:38] [PASSED] 20.04 Xe2_LPG
[18:45:38] [PASSED] 30.00 Xe3_LPG
[18:45:38] [PASSED] 30.01 Xe3_LPG
[18:45:38] [PASSED] 30.03 Xe3_LPG
[18:45:38] ================ [PASSED] check_graphics_ip ================
[18:45:38] ===================== check_media_ip  ======================
[18:45:38] [PASSED] 12.00 Xe_M
[18:45:38] [PASSED] 12.55 Xe_HPM
[18:45:38] [PASSED] 13.00 Xe_LPM+
[18:45:38] [PASSED] 13.01 Xe2_HPM
[18:45:38] [PASSED] 20.00 Xe2_LPM
[18:45:38] [PASSED] 30.00 Xe3_LPM
[18:45:38] [PASSED] 30.02 Xe3_LPM
[18:45:38] ================= [PASSED] check_media_ip ==================
[18:45:38] ================= check_platform_gt_count  =================
[18:45:38] [PASSED] 0x9A60 (TIGERLAKE)
[18:45:38] [PASSED] 0x9A68 (TIGERLAKE)
[18:45:38] [PASSED] 0x9A70 (TIGERLAKE)
[18:45:38] [PASSED] 0x9A40 (TIGERLAKE)
[18:45:38] [PASSED] 0x9A49 (TIGERLAKE)
[18:45:38] [PASSED] 0x9A59 (TIGERLAKE)
[18:45:38] [PASSED] 0x9A78 (TIGERLAKE)
[18:45:38] [PASSED] 0x9AC0 (TIGERLAKE)
[18:45:38] [PASSED] 0x9AC9 (TIGERLAKE)
[18:45:38] [PASSED] 0x9AD9 (TIGERLAKE)
[18:45:38] [PASSED] 0x9AF8 (TIGERLAKE)
[18:45:38] [PASSED] 0x4C80 (ROCKETLAKE)
[18:45:38] [PASSED] 0x4C8A (ROCKETLAKE)
[18:45:38] [PASSED] 0x4C8B (ROCKETLAKE)
[18:45:38] [PASSED] 0x4C8C (ROCKETLAKE)
[18:45:38] [PASSED] 0x4C90 (ROCKETLAKE)
[18:45:38] [PASSED] 0x4C9A (ROCKETLAKE)
[18:45:38] [PASSED] 0x4680 (ALDERLAKE_S)
[18:45:38] [PASSED] 0x4682 (ALDERLAKE_S)
[18:45:38] [PASSED] 0x4688 (ALDERLAKE_S)
[18:45:38] [PASSED] 0x468A (ALDERLAKE_S)
[18:45:38] [PASSED] 0x468B (ALDERLAKE_S)
[18:45:38] [PASSED] 0x4690 (ALDERLAKE_S)
[18:45:38] [PASSED] 0x4692 (ALDERLAKE_S)
[18:45:38] [PASSED] 0x4693 (ALDERLAKE_S)
[18:45:38] [PASSED] 0x46A0 (ALDERLAKE_P)
[18:45:38] [PASSED] 0x46A1 (ALDERLAKE_P)
[18:45:38] [PASSED] 0x46A2 (ALDERLAKE_P)
[18:45:38] [PASSED] 0x46A3 (ALDERLAKE_P)
[18:45:38] [PASSED] 0x46A6 (ALDERLAKE_P)
[18:45:38] [PASSED] 0x46A8 (ALDERLAKE_P)
[18:45:38] [PASSED] 0x46AA (ALDERLAKE_P)
[18:45:38] [PASSED] 0x462A (ALDERLAKE_P)
[18:45:38] [PASSED] 0x4626 (ALDERLAKE_P)
[18:45:38] [PASSED] 0x4628 (ALDERLAKE_P)
[18:45:38] [PASSED] 0x46B0 (ALDERLAKE_P)
[18:45:38] [PASSED] 0x46B1 (ALDERLAKE_P)
[18:45:38] [PASSED] 0x46B2 (ALDERLAKE_P)
[18:45:38] [PASSED] 0x46B3 (ALDERLAKE_P)
[18:45:38] [PASSED] 0x46C0 (ALDERLAKE_P)
[18:45:38] [PASSED] 0x46C1 (ALDERLAKE_P)
[18:45:38] [PASSED] 0x46C2 (ALDERLAKE_P)
[18:45:38] [PASSED] 0x46C3 (ALDERLAKE_P)
[18:45:38] [PASSED] 0x46D0 (ALDERLAKE_N)
[18:45:38] [PASSED] 0x46D1 (ALDERLAKE_N)
[18:45:38] [PASSED] 0x46D2 (ALDERLAKE_N)
[18:45:38] [PASSED] 0x46D3 (ALDERLAKE_N)
[18:45:38] [PASSED] 0x46D4 (ALDERLAKE_N)
[18:45:38] [PASSED] 0xA721 (ALDERLAKE_P)
[18:45:38] [PASSED] 0xA7A1 (ALDERLAKE_P)
[18:45:38] [PASSED] 0xA7A9 (ALDERLAKE_P)
[18:45:38] [PASSED] 0xA7AC (ALDERLAKE_P)
[18:45:38] [PASSED] 0xA7AD (ALDERLAKE_P)
[18:45:38] [PASSED] 0xA720 (ALDERLAKE_P)
[18:45:38] [PASSED] 0xA7A0 (ALDERLAKE_P)
[18:45:38] [PASSED] 0xA7A8 (ALDERLAKE_P)
[18:45:38] [PASSED] 0xA7AA (ALDERLAKE_P)
[18:45:38] [PASSED] 0xA7AB (ALDERLAKE_P)
[18:45:38] [PASSED] 0xA780 (ALDERLAKE_S)
[18:45:38] [PASSED] 0xA781 (ALDERLAKE_S)
[18:45:38] [PASSED] 0xA782 (ALDERLAKE_S)
[18:45:38] [PASSED] 0xA783 (ALDERLAKE_S)
[18:45:38] [PASSED] 0xA788 (ALDERLAKE_S)
[18:45:38] [PASSED] 0xA789 (ALDERLAKE_S)
[18:45:38] [PASSED] 0xA78A (ALDERLAKE_S)
[18:45:38] [PASSED] 0xA78B (ALDERLAKE_S)
[18:45:38] [PASSED] 0x4905 (DG1)
[18:45:38] [PASSED] 0x4906 (DG1)
[18:45:38] [PASSED] 0x4907 (DG1)
[18:45:38] [PASSED] 0x4908 (DG1)
[18:45:38] [PASSED] 0x4909 (DG1)
[18:45:38] [PASSED] 0x56C0 (DG2)
[18:45:38] [PASSED] 0x56C2 (DG2)
[18:45:38] [PASSED] 0x56C1 (DG2)
[18:45:38] [PASSED] 0x7D51 (METEORLAKE)
[18:45:38] [PASSED] 0x7DD1 (METEORLAKE)
[18:45:38] [PASSED] 0x7D41 (METEORLAKE)
[18:45:38] [PASSED] 0x7D67 (METEORLAKE)
[18:45:38] [PASSED] 0xB640 (METEORLAKE)
[18:45:38] [PASSED] 0x56A0 (DG2)
[18:45:38] [PASSED] 0x56A1 (DG2)
[18:45:38] [PASSED] 0x56A2 (DG2)
[18:45:38] [PASSED] 0x56BE (DG2)
[18:45:38] [PASSED] 0x56BF (DG2)
[18:45:38] [PASSED] 0x5690 (DG2)
[18:45:38] [PASSED] 0x5691 (DG2)
[18:45:38] [PASSED] 0x5692 (DG2)
[18:45:38] [PASSED] 0x56A5 (DG2)
[18:45:38] [PASSED] 0x56A6 (DG2)
[18:45:38] [PASSED] 0x56B0 (DG2)
[18:45:38] [PASSED] 0x56B1 (DG2)
[18:45:38] [PASSED] 0x56BA (DG2)
[18:45:38] [PASSED] 0x56BB (DG2)
[18:45:38] [PASSED] 0x56BC (DG2)
[18:45:38] [PASSED] 0x56BD (DG2)
[18:45:38] [PASSED] 0x5693 (DG2)
[18:45:38] [PASSED] 0x5694 (DG2)
[18:45:38] [PASSED] 0x5695 (DG2)
[18:45:38] [PASSED] 0x56A3 (DG2)
[18:45:38] [PASSED] 0x56A4 (DG2)
[18:45:38] [PASSED] 0x56B2 (DG2)
[18:45:38] [PASSED] 0x56B3 (DG2)
[18:45:38] [PASSED] 0x5696 (DG2)
[18:45:38] [PASSED] 0x5697 (DG2)
[18:45:38] [PASSED] 0xB69 (PVC)
[18:45:38] [PASSED] 0xB6E (PVC)
[18:45:38] [PASSED] 0xBD4 (PVC)
[18:45:38] [PASSED] 0xBD5 (PVC)
[18:45:38] [PASSED] 0xBD6 (PVC)
[18:45:38] [PASSED] 0xBD7 (PVC)
[18:45:38] [PASSED] 0xBD8 (PVC)
[18:45:38] [PASSED] 0xBD9 (PVC)
[18:45:38] [PASSED] 0xBDA (PVC)
[18:45:38] [PASSED] 0xBDB (PVC)
[18:45:38] [PASSED] 0xBE0 (PVC)
[18:45:38] [PASSED] 0xBE1 (PVC)
[18:45:38] [PASSED] 0xBE5 (PVC)
[18:45:38] [PASSED] 0x7D40 (METEORLAKE)
[18:45:38] [PASSED] 0x7D45 (METEORLAKE)
[18:45:38] [PASSED] 0x7D55 (METEORLAKE)
[18:45:38] [PASSED] 0x7D60 (METEORLAKE)
[18:45:38] [PASSED] 0x7DD5 (METEORLAKE)
[18:45:38] [PASSED] 0x6420 (LUNARLAKE)
[18:45:38] [PASSED] 0x64A0 (LUNARLAKE)
[18:45:38] [PASSED] 0x64B0 (LUNARLAKE)
[18:45:38] [PASSED] 0xE202 (BATTLEMAGE)
[18:45:38] [PASSED] 0xE209 (BATTLEMAGE)
[18:45:38] [PASSED] 0xE20B (BATTLEMAGE)
[18:45:38] [PASSED] 0xE20C (BATTLEMAGE)
[18:45:38] [PASSED] 0xE20D (BATTLEMAGE)
[18:45:38] [PASSED] 0xE210 (BATTLEMAGE)
[18:45:38] [PASSED] 0xE211 (BATTLEMAGE)
[18:45:38] [PASSED] 0xE212 (BATTLEMAGE)
[18:45:38] [PASSED] 0xE216 (BATTLEMAGE)
[18:45:38] [PASSED] 0xE220 (BATTLEMAGE)
[18:45:38] [PASSED] 0xE221 (BATTLEMAGE)
[18:45:38] [PASSED] 0xE222 (BATTLEMAGE)
[18:45:38] [PASSED] 0xE223 (BATTLEMAGE)
[18:45:38] [PASSED] 0xB080 (PANTHERLAKE)
[18:45:38] [PASSED] 0xB081 (PANTHERLAKE)
[18:45:38] [PASSED] 0xB082 (PANTHERLAKE)
[18:45:38] [PASSED] 0xB083 (PANTHERLAKE)
[18:45:38] [PASSED] 0xB084 (PANTHERLAKE)
[18:45:38] [PASSED] 0xB085 (PANTHERLAKE)
[18:45:38] [PASSED] 0xB086 (PANTHERLAKE)
[18:45:38] [PASSED] 0xB087 (PANTHERLAKE)
[18:45:38] [PASSED] 0xB08F (PANTHERLAKE)
[18:45:38] [PASSED] 0xB090 (PANTHERLAKE)
[18:45:38] [PASSED] 0xB0A0 (PANTHERLAKE)
[18:45:38] [PASSED] 0xB0B0 (PANTHERLAKE)
[18:45:38] [PASSED] 0xFD80 (PANTHERLAKE)
[18:45:38] [PASSED] 0xFD81 (PANTHERLAKE)
[18:45:38] ============= [PASSED] check_platform_gt_count =============
[18:45:38] ===================== [PASSED] xe_pci ======================
[18:45:38] =================== xe_rtp (2 subtests) ====================
[18:45:38] =============== xe_rtp_process_to_sr_tests  ================
[18:45:38] [PASSED] coalesce-same-reg
[18:45:38] [PASSED] no-match-no-add
[18:45:38] [PASSED] match-or
[18:45:38] [PASSED] match-or-xfail
[18:45:38] [PASSED] no-match-no-add-multiple-rules
[18:45:38] [PASSED] two-regs-two-entries
[18:45:38] [PASSED] clr-one-set-other
[18:45:38] [PASSED] set-field
[18:45:38] [PASSED] conflict-duplicate
[18:45:38] [PASSED] conflict-not-disjoint
[18:45:38] [PASSED] conflict-reg-type
[18:45:38] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[18:45:38] ================== xe_rtp_process_tests  ===================
[18:45:38] [PASSED] active1
[18:45:38] [PASSED] active2
[18:45:38] [PASSED] active-inactive
[18:45:38] [PASSED] inactive-active
[18:45:38] [PASSED] inactive-1st_or_active-inactive
[18:45:38] [PASSED] inactive-2nd_or_active-inactive
[18:45:38] [PASSED] inactive-last_or_active-inactive
[18:45:38] [PASSED] inactive-no_or_active-inactive
[18:45:38] ============== [PASSED] xe_rtp_process_tests ===============
[18:45:38] ===================== [PASSED] xe_rtp ======================
[18:45:38] ==================== xe_wa (1 subtest) =====================
[18:45:38] ======================== xe_wa_gt  =========================
[18:45:38] [PASSED] TIGERLAKE B0
[18:45:38] [PASSED] DG1 A0
[18:45:38] [PASSED] DG1 B0
[18:45:38] [PASSED] ALDERLAKE_S A0
[18:45:38] [PASSED] ALDERLAKE_S B0
stty: 'standard input': Inappropriate ioctl for device
[18:45:38] [PASSED] ALDERLAKE_S C0
[18:45:38] [PASSED] ALDERLAKE_S D0
[18:45:38] [PASSED] ALDERLAKE_P A0
[18:45:38] [PASSED] ALDERLAKE_P B0
[18:45:38] [PASSED] ALDERLAKE_P C0
[18:45:38] [PASSED] ALDERLAKE_S RPLS D0
[18:45:38] [PASSED] ALDERLAKE_P RPLU E0
[18:45:38] [PASSED] DG2 G10 C0
[18:45:38] [PASSED] DG2 G11 B1
[18:45:38] [PASSED] DG2 G12 A1
[18:45:38] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[18:45:38] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[18:45:38] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[18:45:38] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[18:45:38] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[18:45:38] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[18:45:38] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[18:45:38] ==================== [PASSED] xe_wa_gt =====================
[18:45:38] ====================== [PASSED] xe_wa ======================
[18:45:38] ============================================================
[18:45:38] Testing complete. Ran 306 tests: passed: 288, skipped: 18
[18:45:39] Elapsed time: 34.909s total, 4.165s configuring, 30.378s building, 0.333s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[18:45:39] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:45:40] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:46:05] Starting KUnit Kernel (1/1)...
[18:46:05] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:46:05] ============ drm_test_pick_cmdline (2 subtests) ============
[18:46:05] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[18:46:05] =============== drm_test_pick_cmdline_named  ===============
[18:46:05] [PASSED] NTSC
[18:46:05] [PASSED] NTSC-J
[18:46:05] [PASSED] PAL
[18:46:05] [PASSED] PAL-M
[18:46:05] =========== [PASSED] drm_test_pick_cmdline_named ===========
[18:46:05] ============== [PASSED] drm_test_pick_cmdline ==============
[18:46:05] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[18:46:05] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[18:46:05] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[18:46:05] =========== drm_validate_clone_mode (2 subtests) ===========
[18:46:05] ============== drm_test_check_in_clone_mode  ===============
[18:46:05] [PASSED] in_clone_mode
[18:46:05] [PASSED] not_in_clone_mode
[18:46:05] ========== [PASSED] drm_test_check_in_clone_mode ===========
[18:46:05] =============== drm_test_check_valid_clones  ===============
[18:46:05] [PASSED] not_in_clone_mode
[18:46:05] [PASSED] valid_clone
[18:46:05] [PASSED] invalid_clone
[18:46:05] =========== [PASSED] drm_test_check_valid_clones ===========
[18:46:05] ============= [PASSED] drm_validate_clone_mode =============
[18:46:05] ============= drm_validate_modeset (1 subtest) =============
[18:46:05] [PASSED] drm_test_check_connector_changed_modeset
[18:46:05] ============== [PASSED] drm_validate_modeset ===============
[18:46:05] ====== drm_test_bridge_get_current_state (2 subtests) ======
[18:46:05] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[18:46:05] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[18:46:05] ======== [PASSED] drm_test_bridge_get_current_state ========
[18:46:05] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[18:46:05] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[18:46:05] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[18:46:05] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[18:46:05] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[18:46:05] ============== drm_bridge_alloc (2 subtests) ===============
[18:46:05] [PASSED] drm_test_drm_bridge_alloc_basic
[18:46:05] [PASSED] drm_test_drm_bridge_alloc_get_put
[18:46:05] ================ [PASSED] drm_bridge_alloc =================
[18:46:05] ================== drm_buddy (8 subtests) ==================
[18:46:05] [PASSED] drm_test_buddy_alloc_limit
[18:46:05] [PASSED] drm_test_buddy_alloc_optimistic
[18:46:05] [PASSED] drm_test_buddy_alloc_pessimistic
[18:46:05] [PASSED] drm_test_buddy_alloc_pathological
[18:46:05] [PASSED] drm_test_buddy_alloc_contiguous
[18:46:05] [PASSED] drm_test_buddy_alloc_clear
[18:46:05] [PASSED] drm_test_buddy_alloc_range_bias
[18:46:05] [PASSED] drm_test_buddy_fragmentation_performance
[18:46:05] ==================== [PASSED] drm_buddy ====================
[18:46:05] ============= drm_cmdline_parser (40 subtests) =============
[18:46:05] [PASSED] drm_test_cmdline_force_d_only
[18:46:05] [PASSED] drm_test_cmdline_force_D_only_dvi
[18:46:05] [PASSED] drm_test_cmdline_force_D_only_hdmi
[18:46:05] [PASSED] drm_test_cmdline_force_D_only_not_digital
[18:46:05] [PASSED] drm_test_cmdline_force_e_only
[18:46:05] [PASSED] drm_test_cmdline_res
[18:46:05] [PASSED] drm_test_cmdline_res_vesa
[18:46:05] [PASSED] drm_test_cmdline_res_vesa_rblank
[18:46:05] [PASSED] drm_test_cmdline_res_rblank
[18:46:05] [PASSED] drm_test_cmdline_res_bpp
[18:46:05] [PASSED] drm_test_cmdline_res_refresh
[18:46:05] [PASSED] drm_test_cmdline_res_bpp_refresh
[18:46:05] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[18:46:05] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[18:46:05] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[18:46:05] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[18:46:05] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[18:46:05] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[18:46:05] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[18:46:05] [PASSED] drm_test_cmdline_res_margins_force_on
[18:46:05] [PASSED] drm_test_cmdline_res_vesa_margins
[18:46:05] [PASSED] drm_test_cmdline_name
[18:46:05] [PASSED] drm_test_cmdline_name_bpp
[18:46:05] [PASSED] drm_test_cmdline_name_option
[18:46:05] [PASSED] drm_test_cmdline_name_bpp_option
[18:46:05] [PASSED] drm_test_cmdline_rotate_0
[18:46:05] [PASSED] drm_test_cmdline_rotate_90
[18:46:05] [PASSED] drm_test_cmdline_rotate_180
[18:46:05] [PASSED] drm_test_cmdline_rotate_270
[18:46:05] [PASSED] drm_test_cmdline_hmirror
[18:46:05] [PASSED] drm_test_cmdline_vmirror
[18:46:05] [PASSED] drm_test_cmdline_margin_options
[18:46:05] [PASSED] drm_test_cmdline_multiple_options
[18:46:05] [PASSED] drm_test_cmdline_bpp_extra_and_option
[18:46:05] [PASSED] drm_test_cmdline_extra_and_option
[18:46:05] [PASSED] drm_test_cmdline_freestanding_options
[18:46:05] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[18:46:05] [PASSED] drm_test_cmdline_panel_orientation
[18:46:05] ================ drm_test_cmdline_invalid  =================
[18:46:05] [PASSED] margin_only
[18:46:05] [PASSED] interlace_only
[18:46:05] [PASSED] res_missing_x
[18:46:05] [PASSED] res_missing_y
[18:46:05] [PASSED] res_bad_y
[18:46:05] [PASSED] res_missing_y_bpp
[18:46:05] [PASSED] res_bad_bpp
[18:46:05] [PASSED] res_bad_refresh
[18:46:05] [PASSED] res_bpp_refresh_force_on_off
[18:46:05] [PASSED] res_invalid_mode
[18:46:05] [PASSED] res_bpp_wrong_place_mode
[18:46:05] [PASSED] name_bpp_refresh
[18:46:05] [PASSED] name_refresh
[18:46:05] [PASSED] name_refresh_wrong_mode
[18:46:05] [PASSED] name_refresh_invalid_mode
[18:46:05] [PASSED] rotate_multiple
[18:46:05] [PASSED] rotate_invalid_val
[18:46:05] [PASSED] rotate_truncated
[18:46:05] [PASSED] invalid_option
[18:46:05] [PASSED] invalid_tv_option
[18:46:05] [PASSED] truncated_tv_option
[18:46:05] ============ [PASSED] drm_test_cmdline_invalid =============
[18:46:05] =============== drm_test_cmdline_tv_options  ===============
[18:46:05] [PASSED] NTSC
[18:46:05] [PASSED] NTSC_443
[18:46:05] [PASSED] NTSC_J
[18:46:05] [PASSED] PAL
[18:46:05] [PASSED] PAL_M
[18:46:05] [PASSED] PAL_N
[18:46:05] [PASSED] SECAM
[18:46:05] [PASSED] MONO_525
[18:46:05] [PASSED] MONO_625
[18:46:05] =========== [PASSED] drm_test_cmdline_tv_options ===========
[18:46:05] =============== [PASSED] drm_cmdline_parser ================
[18:46:05] ========== drmm_connector_hdmi_init (20 subtests) ==========
[18:46:05] [PASSED] drm_test_connector_hdmi_init_valid
[18:46:05] [PASSED] drm_test_connector_hdmi_init_bpc_8
[18:46:05] [PASSED] drm_test_connector_hdmi_init_bpc_10
[18:46:05] [PASSED] drm_test_connector_hdmi_init_bpc_12
[18:46:05] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[18:46:05] [PASSED] drm_test_connector_hdmi_init_bpc_null
[18:46:05] [PASSED] drm_test_connector_hdmi_init_formats_empty
[18:46:05] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[18:46:05] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[18:46:05] [PASSED] supported_formats=0x9 yuv420_allowed=1
[18:46:05] [PASSED] supported_formats=0x9 yuv420_allowed=0
[18:46:05] [PASSED] supported_formats=0x3 yuv420_allowed=1
[18:46:05] [PASSED] supported_formats=0x3 yuv420_allowed=0
[18:46:05] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[18:46:05] [PASSED] drm_test_connector_hdmi_init_null_ddc
[18:46:05] [PASSED] drm_test_connector_hdmi_init_null_product
[18:46:05] [PASSED] drm_test_connector_hdmi_init_null_vendor
[18:46:05] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[18:46:05] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[18:46:05] [PASSED] drm_test_connector_hdmi_init_product_valid
[18:46:05] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[18:46:05] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[18:46:05] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[18:46:05] ========= drm_test_connector_hdmi_init_type_valid  =========
[18:46:05] [PASSED] HDMI-A
[18:46:05] [PASSED] HDMI-B
[18:46:05] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[18:46:05] ======== drm_test_connector_hdmi_init_type_invalid  ========
[18:46:05] [PASSED] Unknown
[18:46:05] [PASSED] VGA
[18:46:05] [PASSED] DVI-I
[18:46:05] [PASSED] DVI-D
[18:46:05] [PASSED] DVI-A
[18:46:05] [PASSED] Composite
[18:46:05] [PASSED] SVIDEO
[18:46:05] [PASSED] LVDS
[18:46:05] [PASSED] Component
[18:46:05] [PASSED] DIN
[18:46:05] [PASSED] DP
[18:46:05] [PASSED] TV
[18:46:05] [PASSED] eDP
[18:46:05] [PASSED] Virtual
[18:46:05] [PASSED] DSI
[18:46:05] [PASSED] DPI
[18:46:05] [PASSED] Writeback
[18:46:05] [PASSED] SPI
[18:46:05] [PASSED] USB
[18:46:05] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[18:46:05] ============ [PASSED] drmm_connector_hdmi_init =============
[18:46:05] ============= drmm_connector_init (3 subtests) =============
[18:46:05] [PASSED] drm_test_drmm_connector_init
[18:46:05] [PASSED] drm_test_drmm_connector_init_null_ddc
[18:46:05] ========= drm_test_drmm_connector_init_type_valid  =========
[18:46:05] [PASSED] Unknown
[18:46:05] [PASSED] VGA
[18:46:05] [PASSED] DVI-I
[18:46:05] [PASSED] DVI-D
[18:46:05] [PASSED] DVI-A
[18:46:05] [PASSED] Composite
[18:46:05] [PASSED] SVIDEO
[18:46:05] [PASSED] LVDS
[18:46:05] [PASSED] Component
[18:46:05] [PASSED] DIN
[18:46:05] [PASSED] DP
[18:46:05] [PASSED] HDMI-A
[18:46:05] [PASSED] HDMI-B
[18:46:05] [PASSED] TV
[18:46:05] [PASSED] eDP
[18:46:05] [PASSED] Virtual
[18:46:05] [PASSED] DSI
[18:46:05] [PASSED] DPI
[18:46:05] [PASSED] Writeback
[18:46:05] [PASSED] SPI
[18:46:05] [PASSED] USB
[18:46:05] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[18:46:05] =============== [PASSED] drmm_connector_init ===============
[18:46:05] ========= drm_connector_dynamic_init (6 subtests) ==========
[18:46:05] [PASSED] drm_test_drm_connector_dynamic_init
[18:46:05] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[18:46:05] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[18:46:05] [PASSED] drm_test_drm_connector_dynamic_init_properties
[18:46:05] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[18:46:05] [PASSED] Unknown
[18:46:05] [PASSED] VGA
[18:46:05] [PASSED] DVI-I
[18:46:05] [PASSED] DVI-D
[18:46:05] [PASSED] DVI-A
[18:46:05] [PASSED] Composite
[18:46:05] [PASSED] SVIDEO
[18:46:05] [PASSED] LVDS
[18:46:05] [PASSED] Component
[18:46:05] [PASSED] DIN
[18:46:05] [PASSED] DP
[18:46:05] [PASSED] HDMI-A
[18:46:05] [PASSED] HDMI-B
[18:46:05] [PASSED] TV
[18:46:05] [PASSED] eDP
[18:46:05] [PASSED] Virtual
[18:46:05] [PASSED] DSI
[18:46:05] [PASSED] DPI
[18:46:05] [PASSED] Writeback
[18:46:05] [PASSED] SPI
[18:46:05] [PASSED] USB
[18:46:05] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[18:46:05] ======== drm_test_drm_connector_dynamic_init_name  =========
[18:46:05] [PASSED] Unknown
[18:46:05] [PASSED] VGA
[18:46:05] [PASSED] DVI-I
[18:46:05] [PASSED] DVI-D
[18:46:05] [PASSED] DVI-A
[18:46:05] [PASSED] Composite
[18:46:05] [PASSED] SVIDEO
[18:46:05] [PASSED] LVDS
[18:46:05] [PASSED] Component
[18:46:05] [PASSED] DIN
[18:46:05] [PASSED] DP
[18:46:05] [PASSED] HDMI-A
[18:46:05] [PASSED] HDMI-B
[18:46:05] [PASSED] TV
[18:46:05] [PASSED] eDP
[18:46:05] [PASSED] Virtual
[18:46:05] [PASSED] DSI
[18:46:05] [PASSED] DPI
[18:46:05] [PASSED] Writeback
[18:46:05] [PASSED] SPI
[18:46:05] [PASSED] USB
[18:46:05] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[18:46:05] =========== [PASSED] drm_connector_dynamic_init ============
[18:46:05] ==== drm_connector_dynamic_register_early (4 subtests) =====
[18:46:05] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[18:46:05] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[18:46:05] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[18:46:05] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[18:46:05] ====== [PASSED] drm_connector_dynamic_register_early =======
[18:46:05] ======= drm_connector_dynamic_register (7 subtests) ========
[18:46:05] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[18:46:05] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[18:46:05] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[18:46:05] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[18:46:05] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[18:46:05] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[18:46:05] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[18:46:05] ========= [PASSED] drm_connector_dynamic_register ==========
[18:46:05] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[18:46:05] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[18:46:05] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[18:46:05] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[18:46:05] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[18:46:05] ========== drm_test_get_tv_mode_from_name_valid  ===========
[18:46:05] [PASSED] NTSC
[18:46:05] [PASSED] NTSC-443
[18:46:05] [PASSED] NTSC-J
[18:46:05] [PASSED] PAL
[18:46:05] [PASSED] PAL-M
[18:46:05] [PASSED] PAL-N
[18:46:05] [PASSED] SECAM
[18:46:05] [PASSED] Mono
[18:46:05] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[18:46:05] [PASSED] drm_test_get_tv_mode_from_name_truncated
[18:46:05] ============ [PASSED] drm_get_tv_mode_from_name ============
[18:46:05] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[18:46:05] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[18:46:05] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[18:46:05] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[18:46:05] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[18:46:05] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[18:46:05] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[18:46:05] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[18:46:05] [PASSED] VIC 96
[18:46:05] [PASSED] VIC 97
[18:46:05] [PASSED] VIC 101
[18:46:05] [PASSED] VIC 102
[18:46:05] [PASSED] VIC 106
[18:46:05] [PASSED] VIC 107
[18:46:05] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[18:46:05] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[18:46:05] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[18:46:05] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[18:46:05] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[18:46:05] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[18:46:05] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[18:46:05] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[18:46:05] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[18:46:05] [PASSED] Automatic
[18:46:05] [PASSED] Full
[18:46:05] [PASSED] Limited 16:235
[18:46:05] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[18:46:05] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[18:46:05] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[18:46:05] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[18:46:05] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[18:46:05] [PASSED] RGB
[18:46:05] [PASSED] YUV 4:2:0
[18:46:05] [PASSED] YUV 4:2:2
[18:46:05] [PASSED] YUV 4:4:4
[18:46:05] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[18:46:05] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[18:46:05] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[18:46:05] ============= drm_damage_helper (21 subtests) ==============
[18:46:05] [PASSED] drm_test_damage_iter_no_damage
[18:46:05] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[18:46:05] [PASSED] drm_test_damage_iter_no_damage_src_moved
[18:46:05] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[18:46:05] [PASSED] drm_test_damage_iter_no_damage_not_visible
[18:46:05] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[18:46:05] [PASSED] drm_test_damage_iter_no_damage_no_fb
[18:46:05] [PASSED] drm_test_damage_iter_simple_damage
[18:46:05] [PASSED] drm_test_damage_iter_single_damage
[18:46:05] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[18:46:05] [PASSED] drm_test_damage_iter_single_damage_outside_src
[18:46:05] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[18:46:05] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[18:46:05] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[18:46:05] [PASSED] drm_test_damage_iter_single_damage_src_moved
[18:46:05] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[18:46:05] [PASSED] drm_test_damage_iter_damage
[18:46:05] [PASSED] drm_test_damage_iter_damage_one_intersect
[18:46:05] [PASSED] drm_test_damage_iter_damage_one_outside
[18:46:05] [PASSED] drm_test_damage_iter_damage_src_moved
[18:46:05] [PASSED] drm_test_damage_iter_damage_not_visible
[18:46:05] ================ [PASSED] drm_damage_helper ================
[18:46:05] ============== drm_dp_mst_helper (3 subtests) ==============
[18:46:05] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[18:46:05] [PASSED] Clock 154000 BPP 30 DSC disabled
[18:46:05] [PASSED] Clock 234000 BPP 30 DSC disabled
[18:46:05] [PASSED] Clock 297000 BPP 24 DSC disabled
[18:46:05] [PASSED] Clock 332880 BPP 24 DSC enabled
[18:46:05] [PASSED] Clock 324540 BPP 24 DSC enabled
[18:46:05] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[18:46:05] ============== drm_test_dp_mst_calc_pbn_div  ===============
[18:46:05] [PASSED] Link rate 2000000 lane count 4
[18:46:05] [PASSED] Link rate 2000000 lane count 2
[18:46:05] [PASSED] Link rate 2000000 lane count 1
[18:46:05] [PASSED] Link rate 1350000 lane count 4
[18:46:05] [PASSED] Link rate 1350000 lane count 2
[18:46:05] [PASSED] Link rate 1350000 lane count 1
[18:46:05] [PASSED] Link rate 1000000 lane count 4
[18:46:05] [PASSED] Link rate 1000000 lane count 2
[18:46:05] [PASSED] Link rate 1000000 lane count 1
[18:46:05] [PASSED] Link rate 810000 lane count 4
[18:46:05] [PASSED] Link rate 810000 lane count 2
[18:46:05] [PASSED] Link rate 810000 lane count 1
[18:46:05] [PASSED] Link rate 540000 lane count 4
[18:46:05] [PASSED] Link rate 540000 lane count 2
[18:46:05] [PASSED] Link rate 540000 lane count 1
[18:46:05] [PASSED] Link rate 270000 lane count 4
[18:46:05] [PASSED] Link rate 270000 lane count 2
[18:46:05] [PASSED] Link rate 270000 lane count 1
[18:46:05] [PASSED] Link rate 162000 lane count 4
[18:46:05] [PASSED] Link rate 162000 lane count 2
[18:46:05] [PASSED] Link rate 162000 lane count 1
[18:46:05] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[18:46:05] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[18:46:05] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[18:46:05] [PASSED] DP_POWER_UP_PHY with port number
[18:46:05] [PASSED] DP_POWER_DOWN_PHY with port number
[18:46:05] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[18:46:05] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[18:46:05] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[18:46:05] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[18:46:05] [PASSED] DP_QUERY_PAYLOAD with port number
[18:46:05] [PASSED] DP_QUERY_PAYLOAD with VCPI
[18:46:05] [PASSED] DP_REMOTE_DPCD_READ with port number
[18:46:05] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[18:46:05] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[18:46:05] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[18:46:05] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[18:46:05] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[18:46:05] [PASSED] DP_REMOTE_I2C_READ with port number
[18:46:05] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[18:46:05] [PASSED] DP_REMOTE_I2C_READ with transactions array
[18:46:05] [PASSED] DP_REMOTE_I2C_WRITE with port number
[18:46:05] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[18:46:05] [PASSED] DP_REMOTE_I2C_WRITE with data array
[18:46:05] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[18:46:05] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[18:46:05] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[18:46:05] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[18:46:05] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[18:46:05] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[18:46:05] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[18:46:05] ================ [PASSED] drm_dp_mst_helper ================
[18:46:05] ================== drm_exec (7 subtests) ===================
[18:46:05] [PASSED] sanitycheck
[18:46:05] [PASSED] test_lock
[18:46:05] [PASSED] test_lock_unlock
[18:46:05] [PASSED] test_duplicates
[18:46:05] [PASSED] test_prepare
[18:46:05] [PASSED] test_prepare_array
[18:46:05] [PASSED] test_multiple_loops
[18:46:05] ==================== [PASSED] drm_exec =====================
[18:46:05] =========== drm_format_helper_test (17 subtests) ===========
[18:46:05] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[18:46:05] [PASSED] single_pixel_source_buffer
[18:46:05] [PASSED] single_pixel_clip_rectangle
[18:46:05] [PASSED] well_known_colors
[18:46:05] [PASSED] destination_pitch
[18:46:05] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[18:46:05] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[18:46:05] [PASSED] single_pixel_source_buffer
[18:46:05] [PASSED] single_pixel_clip_rectangle
[18:46:05] [PASSED] well_known_colors
[18:46:05] [PASSED] destination_pitch
[18:46:05] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[18:46:05] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[18:46:05] [PASSED] single_pixel_source_buffer
[18:46:05] [PASSED] single_pixel_clip_rectangle
[18:46:05] [PASSED] well_known_colors
[18:46:05] [PASSED] destination_pitch
[18:46:05] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[18:46:05] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[18:46:05] [PASSED] single_pixel_source_buffer
[18:46:05] [PASSED] single_pixel_clip_rectangle
[18:46:05] [PASSED] well_known_colors
[18:46:05] [PASSED] destination_pitch
[18:46:05] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[18:46:05] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[18:46:05] [PASSED] single_pixel_source_buffer
[18:46:05] [PASSED] single_pixel_clip_rectangle
[18:46:05] [PASSED] well_known_colors
[18:46:05] [PASSED] destination_pitch
[18:46:05] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[18:46:05] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[18:46:05] [PASSED] single_pixel_source_buffer
[18:46:05] [PASSED] single_pixel_clip_rectangle
[18:46:05] [PASSED] well_known_colors
[18:46:05] [PASSED] destination_pitch
[18:46:05] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[18:46:05] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[18:46:05] [PASSED] single_pixel_source_buffer
[18:46:05] [PASSED] single_pixel_clip_rectangle
[18:46:05] [PASSED] well_known_colors
[18:46:05] [PASSED] destination_pitch
[18:46:05] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[18:46:05] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[18:46:05] [PASSED] single_pixel_source_buffer
[18:46:05] [PASSED] single_pixel_clip_rectangle
[18:46:05] [PASSED] well_known_colors
[18:46:05] [PASSED] destination_pitch
[18:46:05] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[18:46:05] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[18:46:05] [PASSED] single_pixel_source_buffer
[18:46:05] [PASSED] single_pixel_clip_rectangle
[18:46:05] [PASSED] well_known_colors
[18:46:05] [PASSED] destination_pitch
[18:46:05] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[18:46:05] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[18:46:05] [PASSED] single_pixel_source_buffer
[18:46:05] [PASSED] single_pixel_clip_rectangle
[18:46:05] [PASSED] well_known_colors
[18:46:05] [PASSED] destination_pitch
[18:46:05] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[18:46:05] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[18:46:05] [PASSED] single_pixel_source_buffer
[18:46:05] [PASSED] single_pixel_clip_rectangle
[18:46:05] [PASSED] well_known_colors
[18:46:05] [PASSED] destination_pitch
[18:46:05] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[18:46:05] ============== drm_test_fb_xrgb8888_to_mono  ===============
[18:46:05] [PASSED] single_pixel_source_buffer
[18:46:05] [PASSED] single_pixel_clip_rectangle
[18:46:05] [PASSED] well_known_colors
[18:46:05] [PASSED] destination_pitch
[18:46:05] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[18:46:05] ==================== drm_test_fb_swab  =====================
[18:46:05] [PASSED] single_pixel_source_buffer
[18:46:05] [PASSED] single_pixel_clip_rectangle
[18:46:05] [PASSED] well_known_colors
[18:46:05] [PASSED] destination_pitch
[18:46:05] ================ [PASSED] drm_test_fb_swab =================
[18:46:05] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[18:46:05] [PASSED] single_pixel_source_buffer
[18:46:05] [PASSED] single_pixel_clip_rectangle
[18:46:05] [PASSED] well_known_colors
[18:46:05] [PASSED] destination_pitch
[18:46:05] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[18:46:05] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[18:46:05] [PASSED] single_pixel_source_buffer
[18:46:05] [PASSED] single_pixel_clip_rectangle
[18:46:05] [PASSED] well_known_colors
[18:46:05] [PASSED] destination_pitch
[18:46:05] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[18:46:05] ================= drm_test_fb_clip_offset  =================
[18:46:05] [PASSED] pass through
[18:46:05] [PASSED] horizontal offset
[18:46:05] [PASSED] vertical offset
[18:46:05] [PASSED] horizontal and vertical offset
[18:46:05] [PASSED] horizontal offset (custom pitch)
[18:46:05] [PASSED] vertical offset (custom pitch)
[18:46:05] [PASSED] horizontal and vertical offset (custom pitch)
[18:46:05] ============= [PASSED] drm_test_fb_clip_offset =============
[18:46:05] =================== drm_test_fb_memcpy  ====================
[18:46:05] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[18:46:05] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[18:46:05] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[18:46:05] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[18:46:05] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[18:46:05] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[18:46:05] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[18:46:05] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[18:46:05] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[18:46:05] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[18:46:05] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[18:46:05] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[18:46:05] =============== [PASSED] drm_test_fb_memcpy ================
[18:46:05] ============= [PASSED] drm_format_helper_test ==============
[18:46:05] ================= drm_format (18 subtests) =================
[18:46:05] [PASSED] drm_test_format_block_width_invalid
[18:46:05] [PASSED] drm_test_format_block_width_one_plane
[18:46:05] [PASSED] drm_test_format_block_width_two_plane
[18:46:05] [PASSED] drm_test_format_block_width_three_plane
[18:46:05] [PASSED] drm_test_format_block_width_tiled
[18:46:05] [PASSED] drm_test_format_block_height_invalid
[18:46:05] [PASSED] drm_test_format_block_height_one_plane
[18:46:05] [PASSED] drm_test_format_block_height_two_plane
[18:46:05] [PASSED] drm_test_format_block_height_three_plane
[18:46:05] [PASSED] drm_test_format_block_height_tiled
[18:46:05] [PASSED] drm_test_format_min_pitch_invalid
[18:46:05] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[18:46:05] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[18:46:05] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[18:46:05] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[18:46:05] [PASSED] drm_test_format_min_pitch_two_plane
[18:46:05] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[18:46:05] [PASSED] drm_test_format_min_pitch_tiled
[18:46:05] =================== [PASSED] drm_format ====================
[18:46:05] ============== drm_framebuffer (10 subtests) ===============
[18:46:05] ========== drm_test_framebuffer_check_src_coords  ==========
[18:46:05] [PASSED] Success: source fits into fb
[18:46:05] [PASSED] Fail: overflowing fb with x-axis coordinate
[18:46:05] [PASSED] Fail: overflowing fb with y-axis coordinate
[18:46:05] [PASSED] Fail: overflowing fb with source width
[18:46:05] [PASSED] Fail: overflowing fb with source height
[18:46:05] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[18:46:05] [PASSED] drm_test_framebuffer_cleanup
[18:46:05] =============== drm_test_framebuffer_create  ===============
[18:46:05] [PASSED] ABGR8888 normal sizes
[18:46:05] [PASSED] ABGR8888 max sizes
[18:46:05] [PASSED] ABGR8888 pitch greater than min required
[18:46:05] [PASSED] ABGR8888 pitch less than min required
[18:46:05] [PASSED] ABGR8888 Invalid width
[18:46:05] [PASSED] ABGR8888 Invalid buffer handle
[18:46:05] [PASSED] No pixel format
[18:46:05] [PASSED] ABGR8888 Width 0
[18:46:05] [PASSED] ABGR8888 Height 0
[18:46:05] [PASSED] ABGR8888 Out of bound height * pitch combination
[18:46:05] [PASSED] ABGR8888 Large buffer offset
[18:46:05] [PASSED] ABGR8888 Buffer offset for inexistent plane
[18:46:05] [PASSED] ABGR8888 Invalid flag
[18:46:05] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[18:46:05] [PASSED] ABGR8888 Valid buffer modifier
[18:46:05] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[18:46:05] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[18:46:05] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[18:46:05] [PASSED] NV12 Normal sizes
[18:46:05] [PASSED] NV12 Max sizes
[18:46:05] [PASSED] NV12 Invalid pitch
[18:46:05] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[18:46:05] [PASSED] NV12 different  modifier per-plane
[18:46:05] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[18:46:05] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[18:46:05] [PASSED] NV12 Modifier for inexistent plane
[18:46:05] [PASSED] NV12 Handle for inexistent plane
[18:46:05] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[18:46:05] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[18:46:05] [PASSED] YVU420 Normal sizes
[18:46:05] [PASSED] YVU420 Max sizes
[18:46:05] [PASSED] YVU420 Invalid pitch
[18:46:05] [PASSED] YVU420 Different pitches
[18:46:05] [PASSED] YVU420 Different buffer offsets/pitches
[18:46:05] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[18:46:05] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[18:46:05] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[18:46:05] [PASSED] YVU420 Valid modifier
[18:46:05] [PASSED] YVU420 Different modifiers per plane
[18:46:05] [PASSED] YVU420 Modifier for inexistent plane
[18:46:05] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[18:46:05] [PASSED] X0L2 Normal sizes
[18:46:05] [PASSED] X0L2 Max sizes
[18:46:05] [PASSED] X0L2 Invalid pitch
[18:46:05] [PASSED] X0L2 Pitch greater than minimum required
[18:46:05] [PASSED] X0L2 Handle for inexistent plane
[18:46:05] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[18:46:05] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[18:46:05] [PASSED] X0L2 Valid modifier
[18:46:05] [PASSED] X0L2 Modifier for inexistent plane
[18:46:05] =========== [PASSED] drm_test_framebuffer_create ===========
[18:46:05] [PASSED] drm_test_framebuffer_free
[18:46:05] [PASSED] drm_test_framebuffer_init
[18:46:05] [PASSED] drm_test_framebuffer_init_bad_format
[18:46:05] [PASSED] drm_test_framebuffer_init_dev_mismatch
[18:46:05] [PASSED] drm_test_framebuffer_lookup
[18:46:05] [PASSED] drm_test_framebuffer_lookup_inexistent
[18:46:05] [PASSED] drm_test_framebuffer_modifiers_not_supported
[18:46:05] ================= [PASSED] drm_framebuffer =================
[18:46:05] ================ drm_gem_shmem (8 subtests) ================
[18:46:05] [PASSED] drm_gem_shmem_test_obj_create
[18:46:05] [PASSED] drm_gem_shmem_test_obj_create_private
[18:46:05] [PASSED] drm_gem_shmem_test_pin_pages
[18:46:05] [PASSED] drm_gem_shmem_test_vmap
[18:46:05] [PASSED] drm_gem_shmem_test_get_pages_sgt
[18:46:05] [PASSED] drm_gem_shmem_test_get_sg_table
[18:46:05] [PASSED] drm_gem_shmem_test_madvise
[18:46:05] [PASSED] drm_gem_shmem_test_purge
[18:46:05] ================== [PASSED] drm_gem_shmem ==================
[18:46:05] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[18:46:05] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[18:46:05] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[18:46:05] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[18:46:05] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[18:46:05] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[18:46:05] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[18:46:05] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[18:46:05] [PASSED] Automatic
[18:46:05] [PASSED] Full
[18:46:05] [PASSED] Limited 16:235
[18:46:05] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[18:46:05] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[18:46:05] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[18:46:05] [PASSED] drm_test_check_disable_connector
[18:46:05] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[18:46:05] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[18:46:05] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[18:46:05] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[18:46:05] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[18:46:05] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[18:46:05] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[18:46:05] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[18:46:05] [PASSED] drm_test_check_output_bpc_dvi
[18:46:05] [PASSED] drm_test_check_output_bpc_format_vic_1
[18:46:05] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[18:46:05] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[18:46:05] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[18:46:05] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[18:46:05] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[18:46:05] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[18:46:05] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[18:46:05] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[18:46:05] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[18:46:05] [PASSED] drm_test_check_broadcast_rgb_value
[18:46:05] [PASSED] drm_test_check_bpc_8_value
[18:46:05] [PASSED] drm_test_check_bpc_10_value
[18:46:05] [PASSED] drm_test_check_bpc_12_value
[18:46:05] [PASSED] drm_test_check_format_value
[18:46:05] [PASSED] drm_test_check_tmds_char_value
[18:46:05] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[18:46:05] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[18:46:05] [PASSED] drm_test_check_mode_valid
[18:46:05] [PASSED] drm_test_check_mode_valid_reject
[18:46:05] [PASSED] drm_test_check_mode_valid_reject_rate
[18:46:05] [PASSED] drm_test_check_mode_valid_reject_max_clock
[18:46:05] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[18:46:05] ================= drm_managed (2 subtests) =================
[18:46:05] [PASSED] drm_test_managed_release_action
[18:46:05] [PASSED] drm_test_managed_run_action
[18:46:05] =================== [PASSED] drm_managed ===================
[18:46:05] =================== drm_mm (6 subtests) ====================
[18:46:05] [PASSED] drm_test_mm_init
[18:46:05] [PASSED] drm_test_mm_debug
[18:46:05] [PASSED] drm_test_mm_align32
[18:46:05] [PASSED] drm_test_mm_align64
[18:46:05] [PASSED] drm_test_mm_lowest
[18:46:05] [PASSED] drm_test_mm_highest
[18:46:05] ===================== [PASSED] drm_mm ======================
[18:46:05] ============= drm_modes_analog_tv (5 subtests) =============
[18:46:05] [PASSED] drm_test_modes_analog_tv_mono_576i
[18:46:05] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[18:46:05] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[18:46:05] [PASSED] drm_test_modes_analog_tv_pal_576i
[18:46:05] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[18:46:05] =============== [PASSED] drm_modes_analog_tv ===============
[18:46:05] ============== drm_plane_helper (2 subtests) ===============
[18:46:05] =============== drm_test_check_plane_state  ================
[18:46:05] [PASSED] clipping_simple
[18:46:05] [PASSED] clipping_rotate_reflect
[18:46:05] [PASSED] positioning_simple
[18:46:05] [PASSED] upscaling
[18:46:05] [PASSED] downscaling
[18:46:05] [PASSED] rounding1
[18:46:05] [PASSED] rounding2
[18:46:05] [PASSED] rounding3
[18:46:05] [PASSED] rounding4
[18:46:05] =========== [PASSED] drm_test_check_plane_state ============
[18:46:05] =========== drm_test_check_invalid_plane_state  ============
[18:46:05] [PASSED] positioning_invalid
[18:46:05] [PASSED] upscaling_invalid
[18:46:05] [PASSED] downscaling_invalid
[18:46:05] ======= [PASSED] drm_test_check_invalid_plane_state ========
[18:46:05] ================ [PASSED] drm_plane_helper =================
[18:46:05] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[18:46:05] ====== drm_test_connector_helper_tv_get_modes_check  =======
[18:46:05] [PASSED] None
[18:46:05] [PASSED] PAL
[18:46:05] [PASSED] NTSC
[18:46:05] [PASSED] Both, NTSC Default
[18:46:05] [PASSED] Both, PAL Default
[18:46:05] [PASSED] Both, NTSC Default, with PAL on command-line
[18:46:05] [PASSED] Both, PAL Default, with NTSC on command-line
[18:46:05] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[18:46:05] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[18:46:05] ================== drm_rect (9 subtests) ===================
[18:46:05] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[18:46:05] [PASSED] drm_test_rect_clip_scaled_not_clipped
[18:46:05] [PASSED] drm_test_rect_clip_scaled_clipped
[18:46:05] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[18:46:05] ================= drm_test_rect_intersect  =================
[18:46:05] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[18:46:05] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[18:46:05] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[18:46:05] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[18:46:05] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[18:46:05] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[18:46:05] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[18:46:05] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[18:46:05] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[18:46:05] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[18:46:05] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[18:46:05] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[18:46:05] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[18:46:05] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[18:46:05] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[18:46:05] ============= [PASSED] drm_test_rect_intersect =============
[18:46:05] ================ drm_test_rect_calc_hscale  ================
[18:46:05] [PASSED] normal use
[18:46:05] [PASSED] out of max range
[18:46:05] [PASSED] out of min range
[18:46:05] [PASSED] zero dst
[18:46:05] [PASSED] negative src
[18:46:05] [PASSED] negative dst
[18:46:05] ============ [PASSED] drm_test_rect_calc_hscale ============
[18:46:05] ================ drm_test_rect_calc_vscale  ================
[18:46:05] [PASSED] normal use
stty: 'standard input': Inappropriate ioctl for device
[18:46:05] [PASSED] out of max range
[18:46:05] [PASSED] out of min range
[18:46:05] [PASSED] zero dst
[18:46:05] [PASSED] negative src
[18:46:05] [PASSED] negative dst
[18:46:05] ============ [PASSED] drm_test_rect_calc_vscale ============
[18:46:05] ================== drm_test_rect_rotate  ===================
[18:46:05] [PASSED] reflect-x
[18:46:05] [PASSED] reflect-y
[18:46:05] [PASSED] rotate-0
[18:46:05] [PASSED] rotate-90
[18:46:05] [PASSED] rotate-180
[18:46:05] [PASSED] rotate-270
[18:46:05] ============== [PASSED] drm_test_rect_rotate ===============
[18:46:05] ================ drm_test_rect_rotate_inv  =================
[18:46:05] [PASSED] reflect-x
[18:46:05] [PASSED] reflect-y
[18:46:05] [PASSED] rotate-0
[18:46:05] [PASSED] rotate-90
[18:46:05] [PASSED] rotate-180
[18:46:05] [PASSED] rotate-270
[18:46:05] ============ [PASSED] drm_test_rect_rotate_inv =============
[18:46:05] ==================== [PASSED] drm_rect =====================
[18:46:05] ============ drm_sysfb_modeset_test (1 subtest) ============
[18:46:05] ============ drm_test_sysfb_build_fourcc_list  =============
[18:46:05] [PASSED] no native formats
[18:46:05] [PASSED] XRGB8888 as native format
[18:46:05] [PASSED] remove duplicates
[18:46:05] [PASSED] convert alpha formats
[18:46:05] [PASSED] random formats
[18:46:05] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[18:46:05] ============= [PASSED] drm_sysfb_modeset_test ==============
[18:46:05] ============================================================
[18:46:05] Testing complete. Ran 622 tests: passed: 622
[18:46:05] Elapsed time: 26.568s total, 1.713s configuring, 24.435s building, 0.392s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[18:46:05] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:46:07] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:46:16] Starting KUnit Kernel (1/1)...
[18:46:16] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:46:16] ================= ttm_device (5 subtests) ==================
[18:46:16] [PASSED] ttm_device_init_basic
[18:46:16] [PASSED] ttm_device_init_multiple
[18:46:16] [PASSED] ttm_device_fini_basic
[18:46:16] [PASSED] ttm_device_init_no_vma_man
[18:46:16] ================== ttm_device_init_pools  ==================
[18:46:16] [PASSED] No DMA allocations, no DMA32 required
[18:46:16] [PASSED] DMA allocations, DMA32 required
[18:46:16] [PASSED] No DMA allocations, DMA32 required
[18:46:16] [PASSED] DMA allocations, no DMA32 required
[18:46:16] ============== [PASSED] ttm_device_init_pools ==============
[18:46:16] =================== [PASSED] ttm_device ====================
[18:46:16] ================== ttm_pool (8 subtests) ===================
[18:46:16] ================== ttm_pool_alloc_basic  ===================
[18:46:16] [PASSED] One page
[18:46:16] [PASSED] More than one page
[18:46:16] [PASSED] Above the allocation limit
[18:46:16] [PASSED] One page, with coherent DMA mappings enabled
[18:46:16] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[18:46:16] ============== [PASSED] ttm_pool_alloc_basic ===============
[18:46:16] ============== ttm_pool_alloc_basic_dma_addr  ==============
[18:46:16] [PASSED] One page
[18:46:16] [PASSED] More than one page
[18:46:16] [PASSED] Above the allocation limit
[18:46:16] [PASSED] One page, with coherent DMA mappings enabled
[18:46:16] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[18:46:16] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[18:46:16] [PASSED] ttm_pool_alloc_order_caching_match
[18:46:16] [PASSED] ttm_pool_alloc_caching_mismatch
[18:46:16] [PASSED] ttm_pool_alloc_order_mismatch
[18:46:16] [PASSED] ttm_pool_free_dma_alloc
[18:46:16] [PASSED] ttm_pool_free_no_dma_alloc
[18:46:16] [PASSED] ttm_pool_fini_basic
[18:46:16] ==================== [PASSED] ttm_pool =====================
[18:46:16] ================ ttm_resource (8 subtests) =================
[18:46:16] ================= ttm_resource_init_basic  =================
[18:46:16] [PASSED] Init resource in TTM_PL_SYSTEM
[18:46:16] [PASSED] Init resource in TTM_PL_VRAM
[18:46:16] [PASSED] Init resource in a private placement
[18:46:16] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[18:46:16] ============= [PASSED] ttm_resource_init_basic =============
[18:46:16] [PASSED] ttm_resource_init_pinned
[18:46:16] [PASSED] ttm_resource_fini_basic
[18:46:16] [PASSED] ttm_resource_manager_init_basic
[18:46:16] [PASSED] ttm_resource_manager_usage_basic
[18:46:16] [PASSED] ttm_resource_manager_set_used_basic
[18:46:16] [PASSED] ttm_sys_man_alloc_basic
[18:46:16] [PASSED] ttm_sys_man_free_basic
[18:46:16] ================== [PASSED] ttm_resource ===================
[18:46:16] =================== ttm_tt (15 subtests) ===================
[18:46:16] ==================== ttm_tt_init_basic  ====================
[18:46:16] [PASSED] Page-aligned size
[18:46:16] [PASSED] Extra pages requested
[18:46:16] ================ [PASSED] ttm_tt_init_basic ================
[18:46:16] [PASSED] ttm_tt_init_misaligned
[18:46:16] [PASSED] ttm_tt_fini_basic
[18:46:16] [PASSED] ttm_tt_fini_sg
[18:46:16] [PASSED] ttm_tt_fini_shmem
[18:46:16] [PASSED] ttm_tt_create_basic
[18:46:16] [PASSED] ttm_tt_create_invalid_bo_type
[18:46:16] [PASSED] ttm_tt_create_ttm_exists
[18:46:16] [PASSED] ttm_tt_create_failed
[18:46:16] [PASSED] ttm_tt_destroy_basic
[18:46:16] [PASSED] ttm_tt_populate_null_ttm
[18:46:16] [PASSED] ttm_tt_populate_populated_ttm
[18:46:16] [PASSED] ttm_tt_unpopulate_basic
[18:46:16] [PASSED] ttm_tt_unpopulate_empty_ttm
[18:46:16] [PASSED] ttm_tt_swapin_basic
[18:46:16] ===================== [PASSED] ttm_tt ======================
[18:46:16] =================== ttm_bo (14 subtests) ===================
[18:46:16] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[18:46:16] [PASSED] Cannot be interrupted and sleeps
[18:46:16] [PASSED] Cannot be interrupted, locks straight away
[18:46:16] [PASSED] Can be interrupted, sleeps
[18:46:16] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[18:46:16] [PASSED] ttm_bo_reserve_locked_no_sleep
[18:46:16] [PASSED] ttm_bo_reserve_no_wait_ticket
[18:46:16] [PASSED] ttm_bo_reserve_double_resv
[18:46:16] [PASSED] ttm_bo_reserve_interrupted
[18:46:16] [PASSED] ttm_bo_reserve_deadlock
[18:46:16] [PASSED] ttm_bo_unreserve_basic
[18:46:16] [PASSED] ttm_bo_unreserve_pinned
[18:46:16] [PASSED] ttm_bo_unreserve_bulk
[18:46:16] [PASSED] ttm_bo_fini_basic
[18:46:16] [PASSED] ttm_bo_fini_shared_resv
[18:46:16] [PASSED] ttm_bo_pin_basic
[18:46:16] [PASSED] ttm_bo_pin_unpin_resource
[18:46:16] [PASSED] ttm_bo_multiple_pin_one_unpin
[18:46:16] ===================== [PASSED] ttm_bo ======================
[18:46:16] ============== ttm_bo_validate (21 subtests) ===============
[18:46:16] ============== ttm_bo_init_reserved_sys_man  ===============
[18:46:16] [PASSED] Buffer object for userspace
[18:46:16] [PASSED] Kernel buffer object
[18:46:16] [PASSED] Shared buffer object
[18:46:16] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[18:46:16] ============== ttm_bo_init_reserved_mock_man  ==============
[18:46:16] [PASSED] Buffer object for userspace
[18:46:16] [PASSED] Kernel buffer object
[18:46:16] [PASSED] Shared buffer object
[18:46:16] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[18:46:16] [PASSED] ttm_bo_init_reserved_resv
[18:46:16] ================== ttm_bo_validate_basic  ==================
[18:46:16] [PASSED] Buffer object for userspace
[18:46:16] [PASSED] Kernel buffer object
[18:46:16] [PASSED] Shared buffer object
[18:46:16] ============== [PASSED] ttm_bo_validate_basic ==============
[18:46:16] [PASSED] ttm_bo_validate_invalid_placement
[18:46:16] ============= ttm_bo_validate_same_placement  ==============
[18:46:16] [PASSED] System manager
[18:46:16] [PASSED] VRAM manager
[18:46:17] ========= [PASSED] ttm_bo_validate_same_placement ==========
[18:46:17] [PASSED] ttm_bo_validate_failed_alloc
[18:46:17] [PASSED] ttm_bo_validate_pinned
[18:46:17] [PASSED] ttm_bo_validate_busy_placement
[18:46:17] ================ ttm_bo_validate_multihop  =================
[18:46:17] [PASSED] Buffer object for userspace
[18:46:17] [PASSED] Kernel buffer object
[18:46:17] [PASSED] Shared buffer object
[18:46:17] ============ [PASSED] ttm_bo_validate_multihop =============
[18:46:17] ========== ttm_bo_validate_no_placement_signaled  ==========
[18:46:17] [PASSED] Buffer object in system domain, no page vector
[18:46:17] [PASSED] Buffer object in system domain with an existing page vector
[18:46:17] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[18:46:17] ======== ttm_bo_validate_no_placement_not_signaled  ========
[18:46:17] [PASSED] Buffer object for userspace
[18:46:17] [PASSED] Kernel buffer object
[18:46:17] [PASSED] Shared buffer object
[18:46:17] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[18:46:17] [PASSED] ttm_bo_validate_move_fence_signaled
[18:46:17] ========= ttm_bo_validate_move_fence_not_signaled  =========
[18:46:17] [PASSED] Waits for GPU
[18:46:17] [PASSED] Tries to lock straight away
[18:46:17] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[18:46:17] [PASSED] ttm_bo_validate_happy_evict
[18:46:17] [PASSED] ttm_bo_validate_all_pinned_evict
[18:46:17] [PASSED] ttm_bo_validate_allowed_only_evict
[18:46:17] [PASSED] ttm_bo_validate_deleted_evict
[18:46:17] [PASSED] ttm_bo_validate_busy_domain_evict
[18:46:17] [PASSED] ttm_bo_validate_evict_gutting
[18:46:17] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[18:46:17] ================= [PASSED] ttm_bo_validate =================
[18:46:17] ============================================================
[18:46:17] Testing complete. Ran 101 tests: passed: 101
[18:46:17] Elapsed time: 11.311s total, 1.696s configuring, 9.398s building, 0.184s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✗ Xe.CI.BAT: failure for Fix a couple of wedge corner-case memory leaks (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 6290 bytes --]

== Series Details ==

Series: Fix a couple of wedge corner-case memory leaks (rev2)
URL   : https://patchwork.freedesktop.org/series/155352/
State : failure

== Summary ==

CI Bug Log - changes from xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626_BAT -> xe-pw-155352v2_BAT
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-155352v2_BAT absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-155352v2_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (11 -> 11)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-155352v2_BAT:

### IGT changes ###

#### Possible regressions ####

  * igt@core_hotunplug@unbind-rebind:
    - bat-lnl-2:          [PASS][1] -> [ABORT][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/bat-lnl-2/igt@core_hotunplug@unbind-rebind.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/bat-lnl-2/igt@core_hotunplug@unbind-rebind.html
    - bat-dg2-oem2:       [PASS][3] -> [ABORT][4]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/bat-dg2-oem2/igt@core_hotunplug@unbind-rebind.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/bat-dg2-oem2/igt@core_hotunplug@unbind-rebind.html
    - bat-adlp-vm:        [PASS][5] -> [ABORT][6]
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/bat-adlp-vm/igt@core_hotunplug@unbind-rebind.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/bat-adlp-vm/igt@core_hotunplug@unbind-rebind.html
    - bat-lnl-1:          [PASS][7] -> [ABORT][8]
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/bat-lnl-1/igt@core_hotunplug@unbind-rebind.html
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/bat-lnl-1/igt@core_hotunplug@unbind-rebind.html

  * igt@sriov_basic@enable-vfs-autoprobe-on:
    - bat-bmg-2:          [PASS][9] -> [ABORT][10] +1 other test abort
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/bat-bmg-2/igt@sriov_basic@enable-vfs-autoprobe-on.html
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/bat-bmg-2/igt@sriov_basic@enable-vfs-autoprobe-on.html
    - bat-adlp-7:         [PASS][11] -> [ABORT][12] +1 other test abort
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/bat-adlp-7/igt@sriov_basic@enable-vfs-autoprobe-on.html
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/bat-adlp-7/igt@sriov_basic@enable-vfs-autoprobe-on.html

  * igt@sriov_basic@enable-vfs-autoprobe-on@numvfs-1:
    - bat-bmg-1:          [PASS][13] -> [ABORT][14] +1 other test abort
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/bat-bmg-1/igt@sriov_basic@enable-vfs-autoprobe-on@numvfs-1.html
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/bat-bmg-1/igt@sriov_basic@enable-vfs-autoprobe-on@numvfs-1.html
    - bat-atsm-2:         [PASS][15] -> [ABORT][16] +1 other test abort
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/bat-atsm-2/igt@sriov_basic@enable-vfs-autoprobe-on@numvfs-1.html
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/bat-atsm-2/igt@sriov_basic@enable-vfs-autoprobe-on@numvfs-1.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@core_hotunplug@unbind-rebind:
    - {bat-ptl-vm}:       [PASS][17] -> [ABORT][18]
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/bat-ptl-vm/igt@core_hotunplug@unbind-rebind.html
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/bat-ptl-vm/igt@core_hotunplug@unbind-rebind.html

  * igt@sriov_basic@enable-vfs-autoprobe-on:
    - {bat-ptl-1}:        [PASS][19] -> [ABORT][20] +1 other test abort
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/bat-ptl-1/igt@sriov_basic@enable-vfs-autoprobe-on.html
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/bat-ptl-1/igt@sriov_basic@enable-vfs-autoprobe-on.html

  * igt@sriov_basic@enable-vfs-autoprobe-on@numvfs-1:
    - {bat-ptl-2}:        [PASS][21] -> [ABORT][22] +1 other test abort
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/bat-ptl-2/igt@sriov_basic@enable-vfs-autoprobe-on@numvfs-1.html
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/bat-ptl-2/igt@sriov_basic@enable-vfs-autoprobe-on@numvfs-1.html

  
Known issues
------------

  Here are the changes found in xe-pw-155352v2_BAT that come from known issues:

### IGT changes ###

#### Possible fixes ####

  * igt@kms_flip@basic-plain-flip@d-edp1:
    - bat-adlp-7:         [DMESG-WARN][23] ([Intel XE#4543]) -> [PASS][24] +1 other test pass
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/bat-adlp-7/igt@kms_flip@basic-plain-flip@d-edp1.html
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/bat-adlp-7/igt@kms_flip@basic-plain-flip@d-edp1.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543


Build changes
-------------

  * Linux: xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626 -> xe-pw-155352v2

  IGT_8582: 8582
  xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626: 61b16793c3bbb8e740cf9afb36258dee61346626
  xe-pw-155352v2: 155352v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/index.html

[-- Attachment #2: Type: text/html, Size: 7101 bytes --]

✗ Xe.CI.Full: failure for Fix a couple of wedge corner-case memory leaks (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 41569 bytes --]

== Series Details ==

Series: Fix a couple of wedge corner-case memory leaks (rev2)
URL   : https://patchwork.freedesktop.org/series/155352/
State : failure

== Summary ==

CI Bug Log - changes from xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626_FULL -> xe-pw-155352v2_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-155352v2_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-155352v2_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (4 -> 4)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-155352v2_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@core_hotunplug@hotreplug-lateclose:
    - shard-adlp:         [PASS][1] -> [ABORT][2] +4 other tests abort
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-adlp-2/igt@core_hotunplug@hotreplug-lateclose.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-8/igt@core_hotunplug@hotreplug-lateclose.html

  * igt@xe_fault_injection@inject-fault-probe-function-xe_add_hw_engine_class_defaults:
    - shard-dg2-set2:     NOTRUN -> [ABORT][3]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-dg2-464/igt@xe_fault_injection@inject-fault-probe-function-xe_add_hw_engine_class_defaults.html

  * igt@xe_fault_injection@inject-fault-probe-function-xe_mmio_probe_early:
    - shard-dg2-set2:     [PASS][4] -> [ABORT][5] +16 other tests abort
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-dg2-435/igt@xe_fault_injection@inject-fault-probe-function-xe_mmio_probe_early.html
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-dg2-463/igt@xe_fault_injection@inject-fault-probe-function-xe_mmio_probe_early.html

  * igt@xe_fault_injection@vm-bind-fail-vm_bind_ioctl_ops_execute:
    - shard-lnl:          [PASS][6] -> [ABORT][7] +19 other tests abort
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-lnl-5/igt@xe_fault_injection@vm-bind-fail-vm_bind_ioctl_ops_execute.html
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-lnl-3/igt@xe_fault_injection@vm-bind-fail-vm_bind_ioctl_ops_execute.html

  * igt@xe_fault_injection@vm-bind-fail-xe_vma_ops_alloc:
    - shard-adlp:         NOTRUN -> [ABORT][8] +1 other test abort
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-1/igt@xe_fault_injection@vm-bind-fail-xe_vma_ops_alloc.html

  * igt@xe_pmu@engine-activity-idle@engine-drm_xe_engine_class_video_enhance1:
    - shard-bmg:          [PASS][9] -> [ABORT][10] +19 other tests abort
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-6/igt@xe_pmu@engine-activity-idle@engine-drm_xe_engine_class_video_enhance1.html
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-7/igt@xe_pmu@engine-activity-idle@engine-drm_xe_engine_class_video_enhance1.html

  * igt@xe_pmu@engine-activity-most-load-idle:
    - shard-bmg:          NOTRUN -> [ABORT][11] +1 other test abort
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-4/igt@xe_pmu@engine-activity-most-load-idle.html

  
#### Warnings ####

  * igt@xe_configfs@survivability-mode:
    - shard-dg2-set2:     [SKIP][12] ([Intel XE#6010]) -> [ABORT][13]
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-dg2-463/igt@xe_configfs@survivability-mode.html
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-dg2-433/igt@xe_configfs@survivability-mode.html
    - shard-lnl:          [SKIP][14] ([Intel XE#6010]) -> [ABORT][15]
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-lnl-3/igt@xe_configfs@survivability-mode.html
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-lnl-7/igt@xe_configfs@survivability-mode.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * {igt@xe_fault_injection@inject-fault-probe-function-xe_wa_gt_init}:
    - shard-dg2-set2:     [PASS][16] -> [ABORT][17] +2 other tests abort
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-dg2-434/igt@xe_fault_injection@inject-fault-probe-function-xe_wa_gt_init.html
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-dg2-435/igt@xe_fault_injection@inject-fault-probe-function-xe_wa_gt_init.html
    - shard-lnl:          [PASS][18] -> [ABORT][19] +2 other tests abort
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-lnl-5/igt@xe_fault_injection@inject-fault-probe-function-xe_wa_gt_init.html
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-lnl-5/igt@xe_fault_injection@inject-fault-probe-function-xe_wa_gt_init.html
    - shard-adlp:         [PASS][20] -> [ABORT][21]
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-adlp-2/igt@xe_fault_injection@inject-fault-probe-function-xe_wa_gt_init.html
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-9/igt@xe_fault_injection@inject-fault-probe-function-xe_wa_gt_init.html

  * {igt@xe_pmu@engine-activity-accuracy-50}:
    - shard-adlp:         NOTRUN -> [ABORT][22] +3 other tests abort
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-2/igt@xe_pmu@engine-activity-accuracy-50.html

  * {igt@xe_pmu@engine-activity-render-node-load-idle}:
    - shard-bmg:          [PASS][23] -> [ABORT][24] +8 other tests abort
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-3/igt@xe_pmu@engine-activity-render-node-load-idle.html
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-1/igt@xe_pmu@engine-activity-render-node-load-idle.html

  
Known issues
------------

  Here are the changes found in xe-pw-155352v2_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@intel_hwmon@hwmon-write:
    - shard-adlp:         NOTRUN -> [SKIP][25] ([Intel XE#1125] / [Intel XE#5574])
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-9/igt@intel_hwmon@hwmon-write.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0:
    - shard-adlp:         NOTRUN -> [SKIP][26] ([Intel XE#1124]) +5 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-9/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-adlp:         NOTRUN -> [DMESG-FAIL][27] ([Intel XE#4543])
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-9/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_big_fb@yf-tiled-8bpp-rotate-0:
    - shard-dg2-set2:     NOTRUN -> [SKIP][28] ([Intel XE#1124])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-dg2-464/igt@kms_big_fb@yf-tiled-8bpp-rotate-0.html

  * igt@kms_bw@linear-tiling-3-displays-1920x1080p:
    - shard-adlp:         NOTRUN -> [SKIP][29] ([Intel XE#367])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-6/igt@kms_bw@linear-tiling-3-displays-1920x1080p.html

  * igt@kms_ccs@bad-aux-stride-yf-tiled-ccs@pipe-b-hdmi-a-1:
    - shard-adlp:         NOTRUN -> [SKIP][30] ([Intel XE#787]) +11 other tests skip
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-2/igt@kms_ccs@bad-aux-stride-yf-tiled-ccs@pipe-b-hdmi-a-1.html

  * igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc:
    - shard-dg2-set2:     NOTRUN -> [SKIP][31] ([Intel XE#455] / [Intel XE#787]) +3 other tests skip
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-dg2-464/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc.html

  * igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-6:
    - shard-dg2-set2:     NOTRUN -> [SKIP][32] ([Intel XE#787]) +13 other tests skip
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-dg2-464/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-6.html

  * igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs:
    - shard-adlp:         NOTRUN -> [SKIP][33] ([Intel XE#455] / [Intel XE#787]) +7 other tests skip
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-6/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-dg2-rc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][34] ([Intel XE#2887])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-4/igt@kms_ccs@crc-primary-basic-4-tiled-dg2-rc-ccs.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs:
    - shard-adlp:         NOTRUN -> [SKIP][35] ([Intel XE#2907])
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-1/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs.html

  * igt@kms_cdclk@mode-transition:
    - shard-adlp:         NOTRUN -> [SKIP][36] ([Intel XE#4417] / [Intel XE#455])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-6/igt@kms_cdclk@mode-transition.html

  * igt@kms_cdclk@mode-transition@pipe-a-hdmi-a-1:
    - shard-adlp:         NOTRUN -> [SKIP][37] ([Intel XE#4417]) +2 other tests skip
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-6/igt@kms_cdclk@mode-transition@pipe-a-hdmi-a-1.html

  * igt@kms_chamelium_color@ctm-0-50:
    - shard-adlp:         NOTRUN -> [SKIP][38] ([Intel XE#306]) +1 other test skip
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-1/igt@kms_chamelium_color@ctm-0-50.html

  * igt@kms_chamelium_hpd@dp-hpd:
    - shard-adlp:         NOTRUN -> [SKIP][39] ([Intel XE#373]) +5 other tests skip
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-6/igt@kms_chamelium_hpd@dp-hpd.html

  * igt@kms_chamelium_hpd@vga-hpd-without-ddc:
    - shard-dg2-set2:     NOTRUN -> [SKIP][40] ([Intel XE#373]) +1 other test skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-dg2-464/igt@kms_chamelium_hpd@vga-hpd-without-ddc.html

  * igt@kms_cursor_crc@cursor-sliding-512x512:
    - shard-adlp:         NOTRUN -> [SKIP][41] ([Intel XE#308])
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-1/igt@kms_cursor_crc@cursor-sliding-512x512.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size:
    - shard-adlp:         NOTRUN -> [SKIP][42] ([Intel XE#309]) +2 other tests skip
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-1/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html

  * igt@kms_dsc@dsc-with-formats:
    - shard-dg2-set2:     NOTRUN -> [SKIP][43] ([Intel XE#455]) +2 other tests skip
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-dg2-464/igt@kms_dsc@dsc-with-formats.html

  * igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible:
    - shard-bmg:          [PASS][44] -> [SKIP][45] ([Intel XE#2316]) +1 other test skip
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-1/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible.html
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-6/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible.html

  * igt@kms_flip@2x-flip-vs-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][46] ([Intel XE#2316])
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-4/igt@kms_flip@2x-flip-vs-suspend.html

  * igt@kms_flip@2x-nonexisting-fb-interruptible:
    - shard-adlp:         NOTRUN -> [SKIP][47] ([Intel XE#310]) +1 other test skip
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-1/igt@kms_flip@2x-nonexisting-fb-interruptible.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-dg2-set2:     [PASS][48] -> [INCOMPLETE][49] ([Intel XE#2049] / [Intel XE#2597]) +1 other test incomplete
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-dg2-436/igt@kms_flip@flip-vs-suspend.html
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-dg2-433/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_flip@plain-flip-interruptible@b-hdmi-a1:
    - shard-adlp:         NOTRUN -> [DMESG-WARN][50] ([Intel XE#4543]) +1 other test dmesg-warn
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-2/igt@kms_flip@plain-flip-interruptible@b-hdmi-a1.html

  * igt@kms_frontbuffer_tracking@drrs-slowdraw:
    - shard-dg2-set2:     NOTRUN -> [SKIP][51] ([Intel XE#651]) +1 other test skip
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-dg2-464/igt@kms_frontbuffer_tracking@drrs-slowdraw.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-move:
    - shard-adlp:         NOTRUN -> [SKIP][52] ([Intel XE#651])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-2/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-move.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-cur-indfb-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][53] ([Intel XE#2312]) +1 other test skip
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-indfb-scaledprimary:
    - shard-adlp:         NOTRUN -> [SKIP][54] ([Intel XE#653]) +3 other tests skip
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-2/igt@kms_frontbuffer_tracking@fbcpsr-indfb-scaledprimary.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-onoff:
    - shard-adlp:         NOTRUN -> [SKIP][55] ([Intel XE#656]) +5 other tests skip
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-9/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt:
    - shard-dg2-set2:     NOTRUN -> [SKIP][56] ([Intel XE#653]) +3 other tests skip
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-dg2-464/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html

  * igt@kms_hdr@bpc-switch:
    - shard-adlp:         NOTRUN -> [SKIP][57] ([Intel XE#455]) +5 other tests skip
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-2/igt@kms_hdr@bpc-switch.html

  * igt@kms_pm_backlight@fade-with-dpms:
    - shard-adlp:         NOTRUN -> [SKIP][58] ([Intel XE#870])
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-2/igt@kms_pm_backlight@fade-with-dpms.html

  * igt@kms_pm_dc@dc6-dpms:
    - shard-adlp:         NOTRUN -> [FAIL][59] ([Intel XE#718])
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-6/igt@kms_pm_dc@dc6-dpms.html

  * igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-fully-sf:
    - shard-adlp:         NOTRUN -> [SKIP][60] ([Intel XE#1406] / [Intel XE#1489]) +2 other tests skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-9/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr@fbc-psr-sprite-blt:
    - shard-dg2-set2:     NOTRUN -> [SKIP][61] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929])
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-dg2-464/igt@kms_psr@fbc-psr-sprite-blt.html

  * igt@kms_psr@fbc-psr2-cursor-plane-move:
    - shard-adlp:         NOTRUN -> [SKIP][62] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +3 other tests skip
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-2/igt@kms_psr@fbc-psr2-cursor-plane-move.html

  * igt@kms_psr@psr-dpms:
    - shard-bmg:          NOTRUN -> [SKIP][63] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850])
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-4/igt@kms_psr@psr-dpms.html

  * igt@xe_eudebug@vm-bind-clear-faultable:
    - shard-dg2-set2:     NOTRUN -> [SKIP][64] ([Intel XE#4837])
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-dg2-464/igt@xe_eudebug@vm-bind-clear-faultable.html

  * igt@xe_eudebug_online@writes-caching-sram-bb-vram-target-vram:
    - shard-adlp:         NOTRUN -> [SKIP][65] ([Intel XE#4837] / [Intel XE#5565]) +2 other tests skip
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-2/igt@xe_eudebug_online@writes-caching-sram-bb-vram-target-vram.html

  * igt@xe_evict@evict-mixed-many-threads-large:
    - shard-adlp:         NOTRUN -> [SKIP][66] ([Intel XE#261])
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-2/igt@xe_evict@evict-mixed-many-threads-large.html

  * igt@xe_exec_basic@multigpu-no-exec-basic:
    - shard-adlp:         NOTRUN -> [SKIP][67] ([Intel XE#1392] / [Intel XE#5575]) +1 other test skip
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-6/igt@xe_exec_basic@multigpu-no-exec-basic.html

  * igt@xe_exec_fault_mode@many-execqueues-bindexecqueue-userptr-prefetch:
    - shard-adlp:         NOTRUN -> [SKIP][68] ([Intel XE#288] / [Intel XE#5561]) +8 other tests skip
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-6/igt@xe_exec_fault_mode@many-execqueues-bindexecqueue-userptr-prefetch.html

  * igt@xe_exec_fault_mode@once-rebind-prefetch:
    - shard-dg2-set2:     NOTRUN -> [SKIP][69] ([Intel XE#288]) +2 other tests skip
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-dg2-464/igt@xe_exec_fault_mode@once-rebind-prefetch.html

  * igt@xe_exec_mix_modes@exec-spinner-interrupted-lr:
    - shard-adlp:         NOTRUN -> [SKIP][70] ([Intel XE#2360])
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-9/igt@xe_exec_mix_modes@exec-spinner-interrupted-lr.html

  * igt@xe_exec_system_allocator@process-many-large-mmap-remap-ro-dontunmap-eocheck:
    - shard-adlp:         NOTRUN -> [SKIP][71] ([Intel XE#4915]) +70 other tests skip
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-6/igt@xe_exec_system_allocator@process-many-large-mmap-remap-ro-dontunmap-eocheck.html

  * igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-free-race-nomemset:
    - shard-dg2-set2:     NOTRUN -> [SKIP][72] ([Intel XE#4915]) +14 other tests skip
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-dg2-464/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-free-race-nomemset.html

  * igt@xe_oa@buffer-fill:
    - shard-adlp:         NOTRUN -> [SKIP][73] ([Intel XE#3573]) +2 other tests skip
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-1/igt@xe_oa@buffer-fill.html

  * igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq:
    - shard-adlp:         NOTRUN -> [SKIP][74] ([Intel XE#4733] / [Intel XE#5594]) +2 other tests skip
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-2/igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq.html

  * igt@xe_pxp@pxp-termination-key-update-post-rpm:
    - shard-dg2-set2:     NOTRUN -> [SKIP][75] ([Intel XE#4733])
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-dg2-464/igt@xe_pxp@pxp-termination-key-update-post-rpm.html

  * igt@xe_query@multigpu-query-gt-list:
    - shard-dg2-set2:     NOTRUN -> [SKIP][76] ([Intel XE#944])
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-dg2-464/igt@xe_query@multigpu-query-gt-list.html

  * igt@xe_query@multigpu-query-invalid-extension:
    - shard-adlp:         NOTRUN -> [SKIP][77] ([Intel XE#944])
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-6/igt@xe_query@multigpu-query-invalid-extension.html

  * igt@xe_render_copy@render-stress-4-copies:
    - shard-adlp:         NOTRUN -> [SKIP][78] ([Intel XE#4814] / [Intel XE#5614])
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-9/igt@xe_render_copy@render-stress-4-copies.html

  
#### Possible fixes ####

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
    - shard-adlp:         [FAIL][79] ([Intel XE#3908]) -> [PASS][80] +1 other test pass
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-adlp-6/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-8/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-varying-size:
    - shard-bmg:          [SKIP][81] ([Intel XE#2291]) -> [PASS][82]
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-6/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-5/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html

  * igt@kms_feature_discovery@display-2x:
    - shard-bmg:          [SKIP][83] ([Intel XE#2373]) -> [PASS][84]
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-4/igt@kms_feature_discovery@display-2x.html
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-8/igt@kms_feature_discovery@display-2x.html

  * igt@kms_flip@2x-nonexisting-fb:
    - shard-bmg:          [SKIP][85] ([Intel XE#2316]) -> [PASS][86] +2 other tests pass
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-4/igt@kms_flip@2x-nonexisting-fb.html
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-7/igt@kms_flip@2x-nonexisting-fb.html

  * igt@xe_module_load@load:
    - shard-adlp:         ([SKIP][87], [PASS][88], [PASS][89], [PASS][90], [PASS][91], [PASS][92], [PASS][93], [PASS][94], [PASS][95], [PASS][96], [PASS][97], [PASS][98], [PASS][99], [PASS][100], [PASS][101], [PASS][102]) ([Intel XE#378] / [Intel XE#5612]) -> ([PASS][103], [PASS][104], [PASS][105], [PASS][106], [PASS][107], [PASS][108], [PASS][109], [PASS][110], [PASS][111], [PASS][112])
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-adlp-9/igt@xe_module_load@load.html
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-adlp-8/igt@xe_module_load@load.html
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-adlp-9/igt@xe_module_load@load.html
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-adlp-6/igt@xe_module_load@load.html
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-adlp-2/igt@xe_module_load@load.html
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-adlp-1/igt@xe_module_load@load.html
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-adlp-2/igt@xe_module_load@load.html
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-adlp-2/igt@xe_module_load@load.html
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-adlp-6/igt@xe_module_load@load.html
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-adlp-1/igt@xe_module_load@load.html
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-adlp-1/igt@xe_module_load@load.html
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-adlp-8/igt@xe_module_load@load.html
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-adlp-8/igt@xe_module_load@load.html
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-adlp-9/igt@xe_module_load@load.html
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-adlp-9/igt@xe_module_load@load.html
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-adlp-6/igt@xe_module_load@load.html
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-1/igt@xe_module_load@load.html
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-8/igt@xe_module_load@load.html
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-2/igt@xe_module_load@load.html
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-6/igt@xe_module_load@load.html
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-6/igt@xe_module_load@load.html
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-2/igt@xe_module_load@load.html
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-9/igt@xe_module_load@load.html
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-1/igt@xe_module_load@load.html
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-9/igt@xe_module_load@load.html
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-adlp-8/igt@xe_module_load@load.html

  
#### Warnings ####

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt:
    - shard-bmg:          [SKIP][113] ([Intel XE#2311]) -> [SKIP][114] ([Intel XE#2312]) +4 other tests skip
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-fullscreen:
    - shard-bmg:          [SKIP][115] ([Intel XE#2312]) -> [SKIP][116] ([Intel XE#5390]) +3 other tests skip
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-fullscreen.html
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-pri-shrfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][117] ([Intel XE#2312]) -> [SKIP][118] ([Intel XE#2311]) +2 other tests skip
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-pri-shrfb-draw-mmap-wc.html
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-indfb-plflip-blt:
    - shard-bmg:          [SKIP][119] ([Intel XE#2312]) -> [SKIP][120] ([Intel XE#2313]) +3 other tests skip
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-indfb-plflip-blt.html
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-move:
    - shard-bmg:          [SKIP][121] ([Intel XE#2313]) -> [SKIP][122] ([Intel XE#2312]) +4 other tests skip
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-move.html
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-move.html

  * igt@kms_plane_multiple@2x-tiling-yf:
    - shard-bmg:          [SKIP][123] ([Intel XE#4596]) -> [SKIP][124] ([Intel XE#5021])
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-4/igt@kms_plane_multiple@2x-tiling-yf.html
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-8/igt@kms_plane_multiple@2x-tiling-yf.html

  * igt@xe_module_load@load:
    - shard-bmg:          ([PASS][125], [PASS][126], [PASS][127], [PASS][128], [PASS][129], [PASS][130], [PASS][131], [PASS][132], [PASS][133], [PASS][134], [PASS][135], [PASS][136], [PASS][137], [SKIP][138], [PASS][139], [PASS][140], [PASS][141], [DMESG-WARN][142], [PASS][143], [PASS][144], [PASS][145], [PASS][146], [PASS][147], [PASS][148], [PASS][149], [PASS][150]) ([Intel XE#2457] / [Intel XE#3428]) -> ([PASS][151], [PASS][152], [PASS][153], [PASS][154], [PASS][155], [PASS][156], [PASS][157], [PASS][158], [PASS][159], [PASS][160], [PASS][161], [PASS][162], [PASS][163], [PASS][164], [PASS][165], [PASS][166], [PASS][167], [PASS][168], [SKIP][169], [PASS][170], [PASS][171], [PASS][172], [PASS][173], [PASS][174], [PASS][175], [PASS][176]) ([Intel XE#2457])
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-2/igt@xe_module_load@load.html
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-7/igt@xe_module_load@load.html
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-7/igt@xe_module_load@load.html
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-1/igt@xe_module_load@load.html
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-6/igt@xe_module_load@load.html
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-4/igt@xe_module_load@load.html
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-4/igt@xe_module_load@load.html
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-7/igt@xe_module_load@load.html
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-4/igt@xe_module_load@load.html
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-3/igt@xe_module_load@load.html
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-8/igt@xe_module_load@load.html
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-8/igt@xe_module_load@load.html
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-5/igt@xe_module_load@load.html
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-1/igt@xe_module_load@load.html
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-6/igt@xe_module_load@load.html
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-5/igt@xe_module_load@load.html
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-4/igt@xe_module_load@load.html
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-6/igt@xe_module_load@load.html
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-6/igt@xe_module_load@load.html
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-3/igt@xe_module_load@load.html
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-3/igt@xe_module_load@load.html
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-2/igt@xe_module_load@load.html
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-2/igt@xe_module_load@load.html
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-8/igt@xe_module_load@load.html
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-1/igt@xe_module_load@load.html
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626/shard-bmg-1/igt@xe_module_load@load.html
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-4/igt@xe_module_load@load.html
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-6/igt@xe_module_load@load.html
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-7/igt@xe_module_load@load.html
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-4/igt@xe_module_load@load.html
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-6/igt@xe_module_load@load.html
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-7/igt@xe_module_load@load.html
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-6/igt@xe_module_load@load.html
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-4/igt@xe_module_load@load.html
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-1/igt@xe_module_load@load.html
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-3/igt@xe_module_load@load.html
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-1/igt@xe_module_load@load.html
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-8/igt@xe_module_load@load.html
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-8/igt@xe_module_load@load.html
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-5/igt@xe_module_load@load.html
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-5/igt@xe_module_load@load.html
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-5/igt@xe_module_load@load.html
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-7/igt@xe_module_load@load.html
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-8/igt@xe_module_load@load.html
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-2/igt@xe_module_load@load.html
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-2/igt@xe_module_load@load.html
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-2/igt@xe_module_load@load.html
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-4/igt@xe_module_load@load.html
   [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-3/igt@xe_module_load@load.html
   [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-3/igt@xe_module_load@load.html
   [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-8/igt@xe_module_load@load.html
   [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/shard-bmg-1/igt@xe_module_load@load.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1125]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1125
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2360
  [Intel XE#2373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2373
  [Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
  [Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
  [Intel XE#261]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/261
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
  [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
  [Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310
  [Intel XE#3428]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3428
  [Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
  [Intel XE#3908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3908
  [Intel XE#4417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4417
  [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
  [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#4814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4814
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
  [Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
  [Intel XE#5300]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5300
  [Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
  [Intel XE#5561]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5561
  [Intel XE#5565]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5565
  [Intel XE#5574]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5574
  [Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
  [Intel XE#5594]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5594
  [Intel XE#5612]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5612
  [Intel XE#5614]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5614
  [Intel XE#5625]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5625
  [Intel XE#6010]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6010
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/718
  [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
  [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
  [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * Linux: xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626 -> xe-pw-155352v2

  IGT_8582: 8582
  xe-3908-61b16793c3bbb8e740cf9afb36258dee61346626: 61b16793c3bbb8e740cf9afb36258dee61346626
  xe-pw-155352v2: 155352v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155352v2/index.html

[-- Attachment #2: Type: text/html, Size: 46519 bytes --]

[PATCH 0/7] Fix a couple of wedge corner-case memory leaks

[Stuart Summers]

Most of the patches in this series are just adding
some debug hints to help track these down. I split
these up in case we want to pick and choose which ones
to include in the tree. I found them useful.

The main two interesting patches are the last two in the
series which are fixing some corner cases when the
driver becomes wedged in the middle of either communication
with the DRM scheduler or in the event the GuC becomes
unresponsive. In both of these cases there is a chance
we could leak memory around the exec queue members
like the LRC and the LRC BO. These patches fix those
scenarios.

v2: Address feedback from Matt:
    - Let the DRM scheduler handle pausing/unpausing
    - Still do the wait after scheduling disable/deregister
      as with the previous patch, but skip the intermediate
      software-based schedule disable using the "banned"
      flag and instead just jump straight to the deregister
      handling which will fully reset the queue state.
      Note that for this case I am seeing a hardware failure
      after submitting to GuC but before receiving the
      response from GuC. So even if we wedge in this case
      (monitoring the hardware state change), the queue
      itself is not wedged because of the active GuC
      submission (CT is not stalled at that point).
v3: Add back in the xe pause checks and instead just kickstart
    message handling in the guc_submi_fini() routine before
    doing the async wait there.

Stuart Summers (7):
  drm/xe: Add additional trace points for LRCs
  drm/xe: Add a trace point for VM close
  drm/xe: Add the BO pointer info to the BO trace
  drm/xe: Add new exec queue trace points
  drm/xe: Correct migration VM teardown order
  drm/xe: Kick start GPU scheduler on teardown
  drm/xe: Check for GuC responses on disabling scheduling

 drivers/gpu/drm/xe/xe_exec_queue.c |  4 +++
 drivers/gpu/drm/xe/xe_guc_submit.c | 30 ++++++++++++++++++---
 drivers/gpu/drm/xe/xe_lrc.c        |  4 +++
 drivers/gpu/drm/xe/xe_lrc.h        |  3 +++
 drivers/gpu/drm/xe/xe_migrate.c    |  2 +-
 drivers/gpu/drm/xe/xe_trace.h      | 22 ++++++++++++++--
 drivers/gpu/drm/xe/xe_trace_bo.h   | 12 +++++++--
 drivers/gpu/drm/xe/xe_trace_lrc.h  | 42 +++++++++++++++++++++++++++++-
 drivers/gpu/drm/xe/xe_vm.c         |  2 ++
 9 files changed, 111 insertions(+), 10 deletions(-)

-- 
2.34.1

[PATCH 5/7] drm/xe: Correct migration VM teardown order

[Stuart Summers]

Adjust the sequence of the migration teardown to match what
is happening in the init() function.

Signed-off-by: Stuart Summers <stuart.summers@intel.com>
---
 drivers/gpu/drm/xe/xe_migrate.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index 7345a5b65169..b1747e442a7b 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -100,8 +100,8 @@ static void xe_migrate_fini(void *arg)
 	xe_bo_put(m->pt_bo);
 	drm_suballoc_manager_fini(&m->vm_update_sa);
 	mutex_destroy(&m->job_mutex);
-	xe_vm_close_and_put(m->q->vm);
 	xe_exec_queue_put(m->q);
+	xe_vm_close_and_put(m->q->vm);
 }
 
 static u64 xe_migrate_vm_addr(u64 slot, u32 level)
-- 
2.34.1

[PATCH 0/7] Fix a couple of wedge corner-case memory leaks

[Stuart Summers]

Most of the patches in this series are just adding
some debug hints to help track these down. I split
these up in case we want to pick and choose which ones
to include in the tree. I found them useful.

Also add a little documentation on the various stages
handled within the GuC exec queue submission path.

The main interesting patch is the last one in the
series which fixes some corner cases when the
driver becomes wedged in the middle of either communication
with the DRM scheduler or in the event the GuC becomes
unresponsive. In both of these cases there is a chance
we could leak memory around the exec queue members
like the LRC and the LRC BO. This patch fixes those
scenarios.

v2: Address feedback from Matt:
    - Let the DRM scheduler handle pausing/unpausing
    - Still do the wait after scheduling disable/deregister
      as with the previous patch, but skip the intermediate
      software-based schedule disable using the "banned"
      flag and instead just jump straight to the deregister
      handling which will fully reset the queue state.
      Note that for this case I am seeing a hardware failure
      after submitting to GuC but before receiving the
      response from GuC. So even if we wedge in this case
      (monitoring the hardware state change), the queue
      itself is not wedged because of the active GuC
      submission (CT is not stalled at that point).
v3: Add back in the xe pause checks and instead just kickstart
    message handling in the guc_submi_fini() routine before
    doing the async wait there.
v4: Handle the CT communication loss during wedge asynchronously
    Also combine those last two patches into one to handle
    wedge cleanup generally.
v5: Add a new patch with a little documentation on the GuC
    submission handling stages.
    Move the scheduler kickstart and destruction call on the
    dangling queues into the wedged_fini() callback. These
    only get called now for queues which are in an error
    state - wedge was called, but these weren't fully
    cleaned up as seen by the lack of exec_queue reference
    at the time of wedging.
    Also fix the migration ordering teardown reference mistake
    pointed by Matt in the previous series rev.

Stuart Summers (7):
  drm/xe: Add additional trace points for LRCs
  drm/xe: Add a trace point for VM close
  drm/xe: Add the BO pointer info to the BO trace
  drm/xe: Add new exec queue trace points
  drm/xe: Correct migration VM teardown order
  drm/xe: Clean up GuC software state after a wedge
  drm/xe/doc: Add GuC submission kernel-doc

 Documentation/gpu/xe/index.rst         |  1 +
 Documentation/gpu/xe/xe_guc_submit.rst |  8 +++
 drivers/gpu/drm/xe/xe_exec_queue.c     |  4 ++
 drivers/gpu/drm/xe/xe_guc_submit.c     | 93 ++++++++++++++++++++++++--
 drivers/gpu/drm/xe/xe_lrc.c            |  4 ++
 drivers/gpu/drm/xe/xe_lrc.h            |  3 +
 drivers/gpu/drm/xe/xe_migrate.c        |  9 +--
 drivers/gpu/drm/xe/xe_trace.h          | 22 +++++-
 drivers/gpu/drm/xe/xe_trace_bo.h       | 12 +++-
 drivers/gpu/drm/xe/xe_trace_lrc.h      | 42 +++++++++++-
 drivers/gpu/drm/xe/xe_vm.c             |  2 +
 11 files changed, 187 insertions(+), 13 deletions(-)
 create mode 100644 Documentation/gpu/xe/xe_guc_submit.rst

-- 
2.34.1

[PATCH 5/7] drm/xe: Correct migration VM teardown order

[Stuart Summers]

Adjust the sequence of the migration teardown to match what
is happening in the init() function.

v2: Take a reference to the migrate queue before put (Matt)

Signed-off-by: Stuart Summers <stuart.summers@intel.com>
---
 drivers/gpu/drm/xe/xe_migrate.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index 7345a5b65169..ae42917918e5 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -91,17 +91,18 @@ struct xe_migrate {
 static void xe_migrate_fini(void *arg)
 {
 	struct xe_migrate *m = arg;
+	struct xe_exec_queue *q = m->q;
 
-	xe_vm_lock(m->q->vm, false);
+	xe_vm_lock(q->vm, false);
 	xe_bo_unpin(m->pt_bo);
-	xe_vm_unlock(m->q->vm);
+	xe_vm_unlock(q->vm);
 
 	dma_fence_put(m->fence);
 	xe_bo_put(m->pt_bo);
 	drm_suballoc_manager_fini(&m->vm_update_sa);
 	mutex_destroy(&m->job_mutex);
-	xe_vm_close_and_put(m->q->vm);
-	xe_exec_queue_put(m->q);
+	xe_exec_queue_put(q);
+	xe_vm_close_and_put(q->vm);
 }
 
 static u64 xe_migrate_vm_addr(u64 slot, u32 level)
-- 
2.34.1

Re: [PATCH 5/7] drm/xe: Correct migration VM teardown order

[Matthew Brost]

On Mon, Oct 20, 2025 at 09:45:27PM +0000, Stuart Summers wrote:
> Adjust the sequence of the migration teardown to match what
> is happening in the init() function.
> 
> v2: Take a reference to the migrate queue before put (Matt)
> 

You need to store the VM on the stack, not the queue;

> Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_migrate.c | 9 +++++----
>  1 file changed, 5 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
> index 7345a5b65169..ae42917918e5 100644
> --- a/drivers/gpu/drm/xe/xe_migrate.c
> +++ b/drivers/gpu/drm/xe/xe_migrate.c
> @@ -91,17 +91,18 @@ struct xe_migrate {
>  static void xe_migrate_fini(void *arg)
>  {
>  	struct xe_migrate *m = arg;
> +	struct xe_exec_queue *q = m->q;
>  
> -	xe_vm_lock(m->q->vm, false);
> +	xe_vm_lock(q->vm, false);
>  	xe_bo_unpin(m->pt_bo);
> -	xe_vm_unlock(m->q->vm);
> +	xe_vm_unlock(q->vm);
>  
>  	dma_fence_put(m->fence);
>  	xe_bo_put(m->pt_bo);
>  	drm_suballoc_manager_fini(&m->vm_update_sa);
>  	mutex_destroy(&m->job_mutex);
> -	xe_vm_close_and_put(m->q->vm);
> -	xe_exec_queue_put(m->q);
> +	xe_exec_queue_put(q);

^^^ This can destroy the 'q'.

> +	xe_vm_close_and_put(q->vm);

^^^ Now 'q->' can dereference invalid memory.

Matt

>  }
>  
>  static u64 xe_migrate_vm_addr(u64 slot, u32 level)
> -- 
> 2.34.1
> 

Re: [PATCH 5/7] drm/xe: Correct migration VM teardown order

[Summers, Stuart]

On Wed, 2025-10-22 at 13:30 -0700, Matthew Brost wrote:
> On Mon, Oct 20, 2025 at 09:45:27PM +0000, Stuart Summers wrote:
> > Adjust the sequence of the migration teardown to match what
> > is happening in the init() function.
> > 
> > v2: Take a reference to the migrate queue before put (Matt)
> > 
> 
> You need to store the VM on the stack, not the queue;
> 
> > Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> > ---
> >  drivers/gpu/drm/xe/xe_migrate.c | 9 +++++----
> >  1 file changed, 5 insertions(+), 4 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/xe/xe_migrate.c
> > b/drivers/gpu/drm/xe/xe_migrate.c
> > index 7345a5b65169..ae42917918e5 100644
> > --- a/drivers/gpu/drm/xe/xe_migrate.c
> > +++ b/drivers/gpu/drm/xe/xe_migrate.c
> > @@ -91,17 +91,18 @@ struct xe_migrate {
> >  static void xe_migrate_fini(void *arg)
> >  {
> >         struct xe_migrate *m = arg;
> > +       struct xe_exec_queue *q = m->q;
> >  
> > -       xe_vm_lock(m->q->vm, false);
> > +       xe_vm_lock(q->vm, false);
> >         xe_bo_unpin(m->pt_bo);
> > -       xe_vm_unlock(m->q->vm);
> > +       xe_vm_unlock(q->vm);
> >  
> >         dma_fence_put(m->fence);
> >         xe_bo_put(m->pt_bo);
> >         drm_suballoc_manager_fini(&m->vm_update_sa);
> >         mutex_destroy(&m->job_mutex);
> > -       xe_vm_close_and_put(m->q->vm);
> > -       xe_exec_queue_put(m->q);
> > +       xe_exec_queue_put(q);
> 
> ^^^ This can destroy the 'q'.
> 
> > +       xe_vm_close_and_put(q->vm);
> 
> ^^^ Now 'q->' can dereference invalid memory.

Bah you're right, sorry about that :(. Thanks for the feedback!

-Stuart

> 
> Matt
> 
> >  }
> >  
> >  static u64 xe_migrate_vm_addr(u64 slot, u32 level)
> > -- 
> > 2.34.1
> >