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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org, Uma Shankar <uma.shankar@intel.com>
Subject: [PATCH v2 5/9] drm/i915/dsc: Add prefill helper for DSC
Date: Tue, 14 Oct 2025 22:18:04 +0300	[thread overview]
Message-ID: <20251014191808.12326-6-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20251014191808.12326-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Add intel_vdsc_prefill_lines() which tells us how many extra lines
of latency the DSC adds to the pipe prefill.

We shouldn't need a "worst case" vs, "current case" split here
as the DSC state should only change during full modesets.

The returned numbers are in .16 binary fixed point.

Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_vdsc.c | 8 ++++++++
 drivers/gpu/drm/i915/display/intel_vdsc.h | 1 +
 2 files changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index 8e799e225af1..bca747e24a7f 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -1077,3 +1077,11 @@ int intel_vdsc_min_cdclk(const struct intel_crtc_state *crtc_state)
 
 	return min_cdclk;
 }
+
+unsigned int intel_vdsc_prefill_lines(const struct intel_crtc_state *crtc_state)
+{
+	if (!crtc_state->dsc.compression_enable)
+		return 0;
+
+	return 0x18000; /* 1.5 */
+}
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.h b/drivers/gpu/drm/i915/display/intel_vdsc.h
index 9e2812f99dd7..2139391ff881 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.h
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.h
@@ -32,5 +32,6 @@ void intel_dsc_dp_pps_write(struct intel_encoder *encoder,
 void intel_vdsc_state_dump(struct drm_printer *p, int indent,
 			   const struct intel_crtc_state *crtc_state);
 int intel_vdsc_min_cdclk(const struct intel_crtc_state *crtc_state);
+unsigned int intel_vdsc_prefill_lines(const struct intel_crtc_state *crtc_state);
 
 #endif /* __INTEL_VDSC_H__ */
-- 
2.49.1


  parent reply	other threads:[~2025-10-14 19:18 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-14 19:17 [PATCH v2 0/9] drm/i915/prefill: Introduce helpers for prefill latency calculations Ville Syrjala
2025-10-14 19:18 ` [PATCH v2 1/9] drm/i915/vblank: Add helper to get correct vblank length Ville Syrjala
2025-10-14 19:18 ` [PATCH v2 2/9] drm/i915: Reject modes with linetime > 64 usec Ville Syrjala
2025-10-14 19:18 ` [PATCH v2 3/9] drm/i915/cdclk: Add prefill helpers for CDCLK Ville Syrjala
2025-10-14 19:18 ` [PATCH v2 4/9] drm/i915/cdclk: Add intel_cdclk_min_cdclk_for_prefill() Ville Syrjala
2025-10-14 19:18 ` Ville Syrjala [this message]
2025-10-14 19:18 ` [PATCH v2 6/9] drm/i915/scaler: Add scaler prefill helpers Ville Syrjala
2025-10-15 11:23   ` Shankar, Uma
2025-10-15 12:51     ` Ville Syrjälä
2025-10-15 12:56   ` [PATCH v3 " Ville Syrjala
2025-10-14 19:18 ` [PATCH v2 7/9] drm/i915/wm: Add WM0 " Ville Syrjala
2025-10-14 19:18 ` [PATCH v2 8/9] drm/i915/prefill: Introduce skl_prefill.c Ville Syrjala
2025-10-14 19:18 ` [PATCH v2 9/9] drm/i915/wm: Use skl_prefill Ville Syrjala
2025-10-14 19:24 ` ✗ CI.checkpatch: warning for drm/i915/prefill: Introduce helpers for prefill latency calculations (rev2) Patchwork
2025-10-14 19:25 ` ✓ CI.KUnit: success " Patchwork
2025-10-14 19:43 ` ✗ CI.checksparse: warning " Patchwork
2025-10-14 20:05 ` ✓ Xe.CI.BAT: success " Patchwork
2025-10-15  6:42 ` ✗ Xe.CI.Full: failure " Patchwork
2025-10-15 20:58 ` ✗ CI.checkpatch: warning for drm/i915/prefill: Introduce helpers for prefill latency calculations (rev3) Patchwork
2025-10-15 21:00 ` ✓ CI.KUnit: success " Patchwork
2025-10-15 21:15 ` ✗ CI.checksparse: warning " Patchwork
2025-10-15 21:40 ` ✓ Xe.CI.BAT: success " Patchwork
2025-10-16  8:33 ` ✓ Xe.CI.Full: " Patchwork

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