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From: Matthew Brost <matthew.brost@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: stuart.summers@intel.com, lucas.demarchi@intel.com,
	matthew.d.roper@intel.com
Subject: [PATCH 00/12] Context based TLB invalidations
Date: Fri, 31 Oct 2025 18:02:13 -0700	[thread overview]
Message-ID: <20251101010225.3095457-1-matthew.brost@intel.com> (raw)

Add support for context based TLB invalidations.

Matt

Matthew Brost (12):
  drm/xe: Add normalize_invalidation_range
  drm/xe: Make usm.asid_to_vm allocation use GFP_NOWAIT
  drm/xe: Add xe_device_asid_to_vm helper
  drm/xe: Add vm to exec queues association
  drm/xe: Taint TLB invalidation seqno lock with GFP_KERNEL
  drm/xe: Do not forward invalid TLB invalidation seqnos to upper layers
  drm/xe: Rename send_tlb_inval_ppgtt to send_tlb_inval_asid_ppgtt
  drm/xe: Add send_tlb_inval_ppgtt helper
  drm/xe: Add xe_tlb_inval_idle helper
  drm/xe: Add exec queue active vfunc
  drm/xe: Add context-based invalidation to GuC TLB invalidation backend
  drm/xe: Enable context TLB invalidations for CI

 drivers/gpu/drm/xe/xe_device.c           |  25 +++
 drivers/gpu/drm/xe/xe_device.h           |  11 +-
 drivers/gpu/drm/xe/xe_device_types.h     |   9 +
 drivers/gpu/drm/xe/xe_exec_queue.c       |   7 +-
 drivers/gpu/drm/xe/xe_exec_queue_types.h |   5 +
 drivers/gpu/drm/xe/xe_execlist.c         |   7 +
 drivers/gpu/drm/xe/xe_guc_submit.c       |   6 +
 drivers/gpu/drm/xe/xe_guc_tlb_inval.c    | 215 ++++++++++++++++++-----
 drivers/gpu/drm/xe/xe_pci.c              |   2 +
 drivers/gpu/drm/xe/xe_pci_types.h        |   1 +
 drivers/gpu/drm/xe/xe_tlb_inval.c        |  38 ++++
 drivers/gpu/drm/xe/xe_tlb_inval.h        |   2 +
 drivers/gpu/drm/xe/xe_tlb_inval_types.h  |   1 +
 drivers/gpu/drm/xe/xe_vm.c               |  49 +++++-
 drivers/gpu/drm/xe/xe_vm.h               |   3 +
 drivers/gpu/drm/xe/xe_vm_types.h         |  13 ++
 16 files changed, 342 insertions(+), 52 deletions(-)

-- 
2.34.1


             reply	other threads:[~2025-11-01  1:02 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-01  1:02 Matthew Brost [this message]
2025-11-01  1:02 ` [PATCH 01/12] drm/xe: Add normalize_invalidation_range Matthew Brost
2025-11-01  1:02 ` [PATCH 02/12] drm/xe: Make usm.asid_to_vm allocation use GFP_NOWAIT Matthew Brost
2025-11-01  1:02 ` [PATCH 03/12] drm/xe: Add xe_device_asid_to_vm helper Matthew Brost
2025-11-01  1:02 ` [PATCH 04/12] drm/xe: Add vm to exec queues association Matthew Brost
2025-11-01  1:02 ` [PATCH 05/12] drm/xe: Taint TLB invalidation seqno lock with GFP_KERNEL Matthew Brost
2025-11-01  1:02 ` [PATCH 06/12] drm/xe: Do not forward invalid TLB invalidation seqnos to upper layers Matthew Brost
2025-11-01  1:02 ` [PATCH 07/12] drm/xe: Rename send_tlb_inval_ppgtt to send_tlb_inval_asid_ppgtt Matthew Brost
2025-11-01  1:02 ` [PATCH 08/12] drm/xe: Add send_tlb_inval_ppgtt helper Matthew Brost
2025-11-01  1:02 ` [PATCH 09/12] drm/xe: Add xe_tlb_inval_idle helper Matthew Brost
2025-11-01  1:02 ` [PATCH 10/12] drm/xe: Add exec queue active vfunc Matthew Brost
2025-11-01  1:02 ` [PATCH 11/12] drm/xe: Add context-based invalidation to GuC TLB invalidation backend Matthew Brost
2025-11-01  1:02 ` [PATCH 12/12] drm/xe: Enable context TLB invalidations for CI Matthew Brost
2025-11-01  3:43 ` ✗ CI.checkpatch: warning for Context based TLB invalidations Patchwork
2025-11-01  3:44 ` ✓ CI.KUnit: success " Patchwork
2025-11-01  4:48 ` ✓ Xe.CI.BAT: " Patchwork
2025-11-01 23:44 ` ✓ Xe.CI.Full: " Patchwork

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