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From: Arun R Murthy <arun.r.murthy@intel.com>
To: "Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
	"Maxime Ripard" <mripard@kernel.org>,
	"Thomas Zimmermann" <tzimmermann@suse.de>,
	"David Airlie" <airlied@gmail.com>,
	"Simona Vetter" <simona@ffwll.ch>,
	"Harry Wentland" <harry.wentland@amd.com>,
	"Leo Li" <sunpeng.li@amd.com>,
	"Rodrigo Siqueira" <siqueira@igalia.com>,
	"Alex Deucher" <alexander.deucher@amd.com>,
	"Christian König" <christian.koenig@amd.com>,
	"Jani Nikula" <jani.nikula@linux.intel.com>,
	"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
	"Joonas Lahtinen" <joonas.lahtinen@linux.intel.com>,
	"Tvrtko Ursulin" <tursulin@ursulin.net>,
	"Lucas De Marchi" <lucas.demarchi@intel.com>,
	"Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
	uma.shankar@intel.com, chaitanya.kumar.borah@intel.com,
	suraj.kandpal@intel.com
Cc: dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org,
	 intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org,
	 Arun R Murthy <arun.r.murthy@intel.com>
Subject: [PATCH [RESEND] v9 20/20] drm/i915/histogram: Enable pipe dithering
Date: Tue, 02 Dec 2025 11:57:14 +0530	[thread overview]
Message-ID: <20251202-dpst-v9-20-f2abb2ca2465@intel.com> (raw)
In-Reply-To: <20251202-dpst-v9-0-f2abb2ca2465@intel.com>

Enable pipe dithering while enabling histogram to overcome some
atrifacts seen on the screen.

Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
---
 drivers/gpu/drm/i915/display/intel_histogram.c | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_histogram.c b/drivers/gpu/drm/i915/display/intel_histogram.c
index 1d02f4fdf8549a0fd7a46dbd8fdc218798c2de1b..152ae1d0393e9b2b331612494e0cf918edc6f999 100644
--- a/drivers/gpu/drm/i915/display/intel_histogram.c
+++ b/drivers/gpu/drm/i915/display/intel_histogram.c
@@ -9,10 +9,10 @@
 #include <drm/drm_vblank.h>
 #include <drm/drm_print.h>
 
-#include "i915_reg.h"
 #include "i915_drv.h"
 #include "intel_de.h"
 #include "intel_display.h"
+#include "intel_display_regs.h"
 #include "intel_display_types.h"
 #include "intel_histogram.h"
 #include "intel_histogram_regs.h"
@@ -24,6 +24,13 @@
 #define HISTOGRAM_BIN_READ_RETRY_COUNT 5
 #define IET_SAMPLE_FORMAT_1_INT_9_FRACT 0x1000009
 
+static void intel_histogram_enable_dithering(struct intel_display *display,
+					     enum pipe pipe)
+{
+	intel_de_rmw(display, PIPE_MISC(pipe), PIPE_MISC_DITHER_ENABLE,
+		     PIPE_MISC_DITHER_ENABLE);
+}
+
 static void set_bin_index_0(struct intel_display *display, enum pipe pipe)
 {
 	if (DISPLAY_VER(display) >= 20)
@@ -204,6 +211,10 @@ static int intel_histogram_enable(struct intel_crtc *intel_crtc, u8 mode)
 
 	if (histogram->enable)
 		return 0;
+
+	/* Pipe Dithering should be enabled with histogram */
+	intel_histogram_enable_dithering(display, pipe);
+
 	 /* enable histogram, clear DPST_BIN reg and select TC function */
 	if (DISPLAY_VER(display) >= 20)
 		intel_de_rmw(display, DPST_CTL(pipe),

-- 
2.25.1


  parent reply	other threads:[~2025-12-02  6:28 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-02  6:26 [PATCH RESEND v9 00/20] Display Global Histogram Arun R Murthy
2025-12-02  6:26 ` [PATCH [RESEND] v9 01/20] DO_NOT_REVIEW: plane/crtc color pipeline Arun R Murthy
2025-12-02  6:26 ` [PATCH [RESEND] v9 02/20] drm: Define histogram structures exposed to user Arun R Murthy
2025-12-10  9:35   ` Jani Nikula
2025-12-02  6:26 ` [PATCH [RESEND] v9 03/20] drm: Add new element histogram for colorop Arun R Murthy
2025-12-02  6:26 ` [PATCH [RESEND] v9 04/20] drm/colorop: Export function to create pipeline element histogram Arun R Murthy
2025-12-02  6:26 ` [PATCH [RESEND] v9 05/20] drm: Define ImageEnhancemenT LUT structures exposed to user Arun R Murthy
2025-12-02  6:27 ` [PATCH [RESEND] v9 06/20] drm: Add new element Image EnhancemenT for colorop Arun R Murthy
2025-12-02  6:27 ` [PATCH [RESEND] v9 07/20] drm/colorop: Export function to create pipeline element iet lut Arun R Murthy
2025-12-02  6:27 ` [PATCH [RESEND] v9 08/20] drm/i915/histogram: Define registers for histogram Arun R Murthy
2025-12-02  6:27 ` [PATCH [RESEND] v9 09/20] drm/i915/histogram: Add support " Arun R Murthy
2025-12-02  6:27 ` [PATCH [RESEND] v9 10/20] drm/xe: Add histogram support to Xe builds Arun R Murthy
2025-12-02  6:27 ` [PATCH [RESEND] v9 11/20] drm/i915/histogram: histogram interrupt handling Arun R Murthy
2025-12-02  6:27 ` [PATCH DO_NOT_RTEVIEW [RESEND] v9 12/20] Plane Color Pipeline support for Intel platforms Arun R Murthy
2025-12-02  6:27 ` [PATCH [RESEND] v9 13/20] drm/i915/colorop: Add crtc color pipeline for i915 Arun R Murthy
2025-12-02  6:27 ` [PATCH [RESEND] v9 14/20] drm/i915/histogram: Hook i915 histogram with drm histogram Arun R Murthy
2025-12-02  6:27 ` [PATCH [RESEND] v9 15/20] drm/i915/iet: Add support to writing the IET LUT data Arun R Murthy
2025-12-02  6:27 ` [PATCH [RESEND] v9 16/20] drm/i915/colorop: create IET LUT properties Arun R Murthy
2025-12-02  6:27 ` [PATCH [RESEND] v9 17/20] drm/i915/crtc: Hook i915 IET LUT with the drm IET properties Arun R Murthy
2025-12-02  6:27 ` [PATCH [RESEND] v9 18/20] drm/i915/histogram: histogram delay counter doesn't reset Arun R Murthy
2025-12-02  6:27 ` [PATCH [RESEND] v9 19/20] drm/i915/histogram: Histogram changes for Display 20+ Arun R Murthy
2025-12-02  6:27 ` Arun R Murthy [this message]
2025-12-02  6:32 ` ✗ CI.checkpatch: warning for " Patchwork
2025-12-02  6:34 ` ✓ CI.KUnit: success for v9 20/20] drm/i915/histogram: Enable pipe dithering Patchwork
2025-12-02  6:48 ` ✗ CI.checksparse: warning " Patchwork
2025-12-02  7:35 ` ✓ Xe.CI.BAT: success " Patchwork
2025-12-02  9:17 ` ✓ Xe.CI.Full: " Patchwork

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