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From: Arun R Murthy <arun.r.murthy@intel.com>
To: "Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
	"Maxime Ripard" <mripard@kernel.org>,
	"Thomas Zimmermann" <tzimmermann@suse.de>,
	"David Airlie" <airlied@gmail.com>,
	"Simona Vetter" <simona@ffwll.ch>,
	"Harry Wentland" <harry.wentland@amd.com>,
	"Leo Li" <sunpeng.li@amd.com>,
	"Rodrigo Siqueira" <siqueira@igalia.com>,
	"Alex Deucher" <alexander.deucher@amd.com>,
	"Christian König" <christian.koenig@amd.com>,
	"Jani Nikula" <jani.nikula@linux.intel.com>,
	"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
	"Joonas Lahtinen" <joonas.lahtinen@linux.intel.com>,
	"Tvrtko Ursulin" <tursulin@ursulin.net>,
	"Lucas De Marchi" <lucas.demarchi@intel.com>,
	"Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
	uma.shankar@intel.com, chaitanya.kumar.borah@intel.com,
	suraj.kandpal@intel.com
Cc: dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org,
	 intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org,
	 Arun R Murthy <arun.r.murthy@intel.com>
Subject: [PATCH [RESEND] v9 05/20] drm: Define ImageEnhancemenT LUT structures exposed to user
Date: Tue, 02 Dec 2025 11:56:59 +0530	[thread overview]
Message-ID: <20251202-dpst-v9-5-f2abb2ca2465@intel.com> (raw)
In-Reply-To: <20251202-dpst-v9-0-f2abb2ca2465@intel.com>

ImageEnhancemenT(IET) hardware interpolates the LUT value to generate
the enhanced output image. LUT takes an input value, outputs a new
value based on the data within the LUT. 1D LUT can remap individual
input values to new output values based on the LUT sample. LUT can be
interpolated by the hardware by multiple modes Ex: Direct Lookup LUT,
Multiplicative LUT etc
The list of supported mode by hardware along with the format(exponent
mantissa) is exposed to user by the iet_lut_caps property. Maximum
format being 8.24 i.e 8 exponent and 24 mantissa.
For illustration a hardware supporting 1.9 format denotes this as
0x10001FF. In order to know the exponent do a bitwise AND with
0xF000000. The LUT value to be provided by user would be a 10bit value
with 1 bit integer and 9 bit fractional value.

Multiple formats can be supported, hence pointer is used over here.
User can then provide the LUT with any one of the supported modes in
any of the supported formats.
The entries in the LUT can vary depending on the hardware capability
with max being 255. This will also be exposed as iet_lut_caps so user
can generate a LUT with the specified entries.

v8: define enum for iet_mode, add more doc for iet modes (Dmitry)

Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
---
 include/uapi/drm/drm_mode.h | 68 +++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 68 insertions(+)

diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index d92be66813cf667d8361d837110740a521dca6eb..35d19ccd799b2b0f72174de8987c4482209ff325 100644
--- a/include/uapi/drm/drm_mode.h
+++ b/include/uapi/drm/drm_mode.h
@@ -1619,6 +1619,74 @@ struct drm_histogram {
 	__u32 nr_elements;
 };
 
+/**
+ * enum drm_iet_mode
+ * @DRM_MODE_IET_LOOKUP_LUT:
+ * LUT values are points on exponential graph with x axis and y-axis y=f(x)
+ * This f(x) can be the algorithm, defined by the user space algorithm.
+ * When this LUT table is passed to the hardware it signifies how the hardware
+ * should use this table to get the LUT values. In this mode its direct lookup
+ * table. x-axis corresponds to input pixel value and y-axis corresponds to
+ * the output pixel value.
+ *
+ * @DRM_MODE_IET_MULTIPLICATIVE:
+ * LUT values, x and y are points on negative exponential graph with
+ * x-axis and y-axis (y = y/x). The value passed by the user will be
+ * in y/x i.e OutPixel/InPixel. X co-ordinate proportional to pixel value
+ * and Y-cordinate is the multiplier factor, i.e x-axis in pixels and
+ * y-axis is OutPixel/InPixel. so upon multiplying x, y is obtained,
+ * hence multiplicative.
+ * The format of LUT can at max be 8.24(8integer 24 fractional)
+ * represented by u32. 32bit is the container and if 16.16 is chosen
+ * then it doesn't make sense to boost the pixel by 2^16. Hence set aside
+ * 8bit for integer 2^8 thereby boosting the pixel by a value 255 which
+ * itself is a huge boost factor. Remaining 24bits out of the 32bit
+ * container is fractional part. This is also optimal for implementing
+ * in the hardware.
+ * Depending on the hardware capability and exponent mantissa can be
+ * chosen within this limits.
+ */
+enum drm_iet_mode {
+	DRM_MODE_IET_LOOKUP_LUT = 0x01,
+	DRM_MODE_IET_MULTIPLICATIVE = 0x02,
+};
+
+/**
+ * struct drm_iet_caps
+ *
+ * @iet_mode: pixel factor enhancement modes defined in enum drm_iet_mode.
+ *	      Multiple modes can be supported by hardware, the value can be
+ *	      ORed.
+ * @iet_sample_format: holds the address of an array of u32 LUT sample formats
+ *		       depending on the hardware capability. Max being 8.24
+ *		       Doing a bitwise AND will get the present sample.
+ *		       Ex: for 1 integer 9 fraction AND with 0x10001FF
+ * @nr_iet_sample_formats: number of iet_sample_formsts supported by the
+ *			   hardware
+ * @nr_iet_lut_entries: number of LUT entries
+ */
+struct drm_iet_caps {
+	__u32 iet_mode;
+	__u64 iet_sample_format;
+	__u32 nr_iet_sample_formats;
+	__u32 nr_iet_lut_entries;
+};
+
+/**
+ * struct drm_iet_1dlut_sample
+ * @iet_lut: the address in the field describes the format of the data
+ *		corresponding to the @iet_mode
+ *		In case of direct lookup this is NULL, in case of
+ *		multiplicative mode LUT exponent and mantissa format.
+ * @nr_elements: number of entries pointed by the data @iet_lut
+ * @iet_mode: image enhancement mode, this will also convey the channel.
+ */
+struct drm_iet_1dlut_sample {
+	__u64 iet_lut;
+	__u32 nr_elements;
+	enum drm_iet_mode iet_mode;
+};
+
 #if defined(__cplusplus)
 }
 #endif

-- 
2.25.1


  parent reply	other threads:[~2025-12-02  6:27 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-02  6:26 [PATCH RESEND v9 00/20] Display Global Histogram Arun R Murthy
2025-12-02  6:26 ` [PATCH [RESEND] v9 01/20] DO_NOT_REVIEW: plane/crtc color pipeline Arun R Murthy
2025-12-02  6:26 ` [PATCH [RESEND] v9 02/20] drm: Define histogram structures exposed to user Arun R Murthy
2025-12-10  9:35   ` Jani Nikula
2025-12-02  6:26 ` [PATCH [RESEND] v9 03/20] drm: Add new element histogram for colorop Arun R Murthy
2025-12-02  6:26 ` [PATCH [RESEND] v9 04/20] drm/colorop: Export function to create pipeline element histogram Arun R Murthy
2025-12-02  6:26 ` Arun R Murthy [this message]
2025-12-02  6:27 ` [PATCH [RESEND] v9 06/20] drm: Add new element Image EnhancemenT for colorop Arun R Murthy
2025-12-02  6:27 ` [PATCH [RESEND] v9 07/20] drm/colorop: Export function to create pipeline element iet lut Arun R Murthy
2025-12-02  6:27 ` [PATCH [RESEND] v9 08/20] drm/i915/histogram: Define registers for histogram Arun R Murthy
2025-12-02  6:27 ` [PATCH [RESEND] v9 09/20] drm/i915/histogram: Add support " Arun R Murthy
2025-12-02  6:27 ` [PATCH [RESEND] v9 10/20] drm/xe: Add histogram support to Xe builds Arun R Murthy
2025-12-02  6:27 ` [PATCH [RESEND] v9 11/20] drm/i915/histogram: histogram interrupt handling Arun R Murthy
2025-12-02  6:27 ` [PATCH DO_NOT_RTEVIEW [RESEND] v9 12/20] Plane Color Pipeline support for Intel platforms Arun R Murthy
2025-12-02  6:27 ` [PATCH [RESEND] v9 13/20] drm/i915/colorop: Add crtc color pipeline for i915 Arun R Murthy
2025-12-02  6:27 ` [PATCH [RESEND] v9 14/20] drm/i915/histogram: Hook i915 histogram with drm histogram Arun R Murthy
2025-12-02  6:27 ` [PATCH [RESEND] v9 15/20] drm/i915/iet: Add support to writing the IET LUT data Arun R Murthy
2025-12-02  6:27 ` [PATCH [RESEND] v9 16/20] drm/i915/colorop: create IET LUT properties Arun R Murthy
2025-12-02  6:27 ` [PATCH [RESEND] v9 17/20] drm/i915/crtc: Hook i915 IET LUT with the drm IET properties Arun R Murthy
2025-12-02  6:27 ` [PATCH [RESEND] v9 18/20] drm/i915/histogram: histogram delay counter doesn't reset Arun R Murthy
2025-12-02  6:27 ` [PATCH [RESEND] v9 19/20] drm/i915/histogram: Histogram changes for Display 20+ Arun R Murthy
2025-12-02  6:27 ` [PATCH [RESEND] v9 20/20] drm/i915/histogram: Enable pipe dithering Arun R Murthy
2025-12-02  6:32 ` ✗ CI.checkpatch: warning for v9 19/20] drm/i915/histogram: Histogram changes for Display 20+ Patchwork
2025-12-02  6:34 ` ✓ CI.KUnit: success for v9 20/20] drm/i915/histogram: Enable pipe dithering Patchwork
2025-12-02  6:48 ` ✗ CI.checksparse: warning " Patchwork
2025-12-02  7:35 ` ✓ Xe.CI.BAT: success " Patchwork
2025-12-02  9:17 ` ✓ Xe.CI.Full: " Patchwork

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