[PATCH 0/5] Make casf updates atomic and dsb ready

[Nemesa Garg <nemesa.garg@intel.com>]

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 The existing implementation for casf scaler re‑implemented
parts of skl_scaler logic and programmed registers from
pre‑plane update hooks, which caused:
  - updates were not atomic.
  - prevented execution via Display State Buffer.
  - computed state was late.

This series fixes these issues by:
  - consolidating common logic into skl_scaler.c.
  - moving computation into crtc_compute_config().
  - enabling DSB execution. 

Nemesa Garg (5):
  drm/i915/display: Move casf_compute_config
  drm/i915/display: Add intel_dsb param to CASF helpers
  drm/i915/display: Pass dsb_commit to CASF helpers
  drm/i915/display: Add intel_casf_arm() to enable casf
  drm/i915/display: Introduce skl_pipe_scaler_setup()

 drivers/gpu/drm/i915/display/intel_casf.c    | 58 ++++++++++++----
 drivers/gpu/drm/i915/display/intel_casf.h    | 16 ++++-
 drivers/gpu/drm/i915/display/intel_display.c | 34 +++++++--
 drivers/gpu/drm/i915/display/skl_scaler.c    | 72 +++++++++-----------
 drivers/gpu/drm/i915/display/skl_scaler.h    |  2 +
 5 files changed, 118 insertions(+), 64 deletions(-)

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2.25.1