Intel-XE Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Nemesa Garg <nemesa.garg@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: ville.syrjala@intel.com, uma.shankar@intel.com,
	Nemesa Garg <nemesa.garg@intel.com>
Subject: [PATCH 2/5] drm/i915/display: Add intel_dsb param to CASF helpers
Date: Tue,  9 Dec 2025 11:55:24 +0530	[thread overview]
Message-ID: <20251209062527.620382-3-nemesa.garg@intel.com> (raw)
In-Reply-To: <20251209062527.620382-1-nemesa.garg@intel.com>

Update CASF helpers to take intel_dsb pointers.
Replace register writes with write_dsb.
When CASF is enabled through a modeset operation, pass
NULL for the dsb parameter to indicate direct register
programming otherwise provide a valid DSB instance to
submit through the buffered sequence.

Signed-off-by: Nemesa Garg <nemesa.garg@intel.com>
---
 drivers/gpu/drm/i915/display/intel_casf.c    | 19 +++++++++++--------
 drivers/gpu/drm/i915/display/intel_casf.h    | 10 +++++++---
 drivers/gpu/drm/i915/display/intel_display.c |  6 +++---
 3 files changed, 21 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_casf.c b/drivers/gpu/drm/i915/display/intel_casf.c
index 6e45ff7d5ff7..e9ffbd42a030 100644
--- a/drivers/gpu/drm/i915/display/intel_casf.c
+++ b/drivers/gpu/drm/i915/display/intel_casf.c
@@ -76,7 +76,8 @@ static void intel_casf_filter_lut_load(struct intel_crtc *crtc,
 			       sharpness_lut[i]);
 }
 
-void intel_casf_update_strength(struct intel_crtc_state *crtc_state)
+void intel_casf_update_strength(struct intel_dsb *dsb,
+				struct intel_crtc_state *crtc_state)
 {
 	struct intel_display *display = to_intel_display(crtc_state);
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
@@ -259,7 +260,8 @@ void intel_casf_scaler_compute_config(struct intel_crtc_state *crtc_state)
 	}
 }
 
-void intel_casf_enable(struct intel_crtc_state *crtc_state)
+void intel_casf_enable(struct intel_dsb *dsb,
+		       struct intel_crtc_state *crtc_state)
 {
 	struct intel_display *display = to_intel_display(crtc_state);
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
@@ -273,20 +275,21 @@ void intel_casf_enable(struct intel_crtc_state *crtc_state)
 
 	sharpness_ctl |= crtc_state->hw.casf_params.win_size;
 
-	intel_de_write(display, SHARPNESS_CTL(crtc->pipe), sharpness_ctl);
+	intel_de_write_dsb(display, dsb, SHARPNESS_CTL(crtc->pipe), sharpness_ctl);
 
 	skl_scaler_setup_casf(crtc_state);
 }
 
-void intel_casf_disable(const struct intel_crtc_state *crtc_state)
+void intel_casf_disable(struct intel_dsb *dsb,
+			const struct intel_crtc_state *crtc_state)
 {
 	struct intel_display *display = to_intel_display(crtc_state);
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 
-	intel_de_write(display, SKL_PS_CTRL(crtc->pipe, 1), 0);
-	intel_de_write(display, SKL_PS_WIN_POS(crtc->pipe, 1), 0);
-	intel_de_write(display, SHARPNESS_CTL(crtc->pipe), 0);
-	intel_de_write(display, SKL_PS_WIN_SZ(crtc->pipe, 1), 0);
+	intel_de_write_dsb(display, dsb, SKL_PS_CTRL(crtc->pipe, 1), 0);
+	intel_de_write_dsb(display, dsb, SKL_PS_WIN_POS(crtc->pipe, 1), 0);
+	intel_de_write_dsb(display, dsb, SHARPNESS_CTL(crtc->pipe), 0);
+	intel_de_write_dsb(display, dsb, SKL_PS_WIN_SZ(crtc->pipe, 1), 0);
 }
 
 void intel_casf_check(struct intel_atomic_state *state)
diff --git a/drivers/gpu/drm/i915/display/intel_casf.h b/drivers/gpu/drm/i915/display/intel_casf.h
index 2eec90d9d4c4..16a938e19c71 100644
--- a/drivers/gpu/drm/i915/display/intel_casf.h
+++ b/drivers/gpu/drm/i915/display/intel_casf.h
@@ -11,12 +11,16 @@
 struct intel_crtc_state;
 struct intel_atomic_state;
 struct intel_crtc;
+struct intel_dsb;
 
 int intel_casf_compute_config(struct intel_crtc_state *crtc_state);
-void intel_casf_update_strength(struct intel_crtc_state *new_crtc_state);
+void intel_casf_update_strength(struct intel_dsb *dsb,
+				struct intel_crtc_state *new_crtc_state);
 void intel_casf_sharpness_get_config(struct intel_crtc_state *crtc_state);
-void intel_casf_enable(struct intel_crtc_state *crtc_state);
-void intel_casf_disable(const struct intel_crtc_state *crtc_state);
+void intel_casf_enable(struct intel_dsb *dsb,
+		       struct intel_crtc_state *crtc_state);
+void intel_casf_disable(struct intel_dsb *dsb,
+			const struct intel_crtc_state *crtc_state);
 void intel_casf_scaler_compute_config(struct intel_crtc_state *crtc_state);
 bool intel_casf_needs_scaler(const struct intel_crtc_state *crtc_state);
 void intel_casf_check(struct intel_atomic_state *state);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 882ea286fc9c..256103d55409 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1165,7 +1165,7 @@ static void intel_pre_plane_update(struct intel_atomic_state *state,
 		intel_encoders_audio_disable(state, crtc);
 
 	if (intel_casf_disabling(old_crtc_state, new_crtc_state))
-		intel_casf_disable(new_crtc_state);
+		intel_casf_disable(NULL, new_crtc_state);
 
 	intel_drrs_deactivate(old_crtc_state);
 
@@ -6804,9 +6804,9 @@ static void intel_pre_update_crtc(struct intel_atomic_state *state,
 	}
 
 	if (intel_casf_enabling(new_crtc_state, old_crtc_state))
-		intel_casf_enable(new_crtc_state);
+		intel_casf_enable(NULL, new_crtc_state);
 	else if (new_crtc_state->hw.casf_params.strength != old_crtc_state->hw.casf_params.strength)
-		intel_casf_update_strength(new_crtc_state);
+		intel_casf_update_strength(NULL, new_crtc_state);
 
 	intel_fbc_update(state, crtc);
 
-- 
2.25.1


  parent reply	other threads:[~2025-12-09  6:29 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-09  6:25 [PATCH 0/5] Make casf updates atomic and dsb ready Nemesa Garg
2025-12-09  6:25 ` [PATCH 1/5] drm/i915/display: Move casf_compute_config Nemesa Garg
2025-12-12 15:51   ` Ville Syrjälä
2025-12-09  6:25 ` Nemesa Garg [this message]
2025-12-09  6:25 ` [PATCH 3/5] drm/i915/display: Pass dsb_commit to CASF helpers Nemesa Garg
2025-12-12 16:34   ` Ville Syrjälä
2025-12-16 14:59     ` Garg, Nemesa
2025-12-17  3:10       ` Garg, Nemesa
2025-12-09  6:25 ` [PATCH 4/5] drm/i915/display: Add intel_casf_arm() to enable casf Nemesa Garg
2025-12-09  6:25 ` [PATCH 5/5] drm/i915/display: Introduce skl_pipe_scaler_setup() Nemesa Garg
2025-12-09  6:36 ` ✓ CI.KUnit: success for Make casf updates atomic and dsb ready Patchwork
2025-12-09  7:10 ` ✓ Xe.CI.BAT: " Patchwork
2025-12-09 13:31 ` ✗ Xe.CI.Full: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20251209062527.620382-3-nemesa.garg@intel.com \
    --to=nemesa.garg@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=intel-xe@lists.freedesktop.org \
    --cc=uma.shankar@intel.com \
    --cc=ville.syrjala@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox