From: Imre Deak <imre.deak@intel.com>
To: <intel-gfx@lists.freedesktop.org>, <intel-xe@lists.freedesktop.org>
Cc: Luca Coelho <luciano.coelho@intel.com>
Subject: [PATCH 12/16] drm/i915/dp: Account with pipe joiner max compressed BPP limit for DP-MST and eDP
Date: Mon, 15 Dec 2025 21:23:52 +0200 [thread overview]
Message-ID: <20251215192357.172201-13-imre.deak@intel.com> (raw)
In-Reply-To: <20251215192357.172201-1-imre.deak@intel.com>
The pipe joiner maximum compressed BPP must be limited based on the pipe
joiner memory size and BW, do that for all DP outputs by adjusting the
max compressed BPP value already in
intel_dp_compute_config_link_bpp_limits() (which is used by all output
types).
This way the BPP doesn't need to be adjusted in
dsc_compute_compressed_bpp() (called for DP-SST after the above limits
were computed already), so remove the adjustment from there.
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 05cf283b220a2..9453447905d21 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2245,19 +2245,12 @@ static int dsc_compute_compressed_bpp(struct intel_dp *intel_dp,
{
struct intel_display *display = to_intel_display(intel_dp);
const struct intel_connector *connector = to_intel_connector(conn_state->connector);
- const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
int min_bpp_x16, max_bpp_x16, bpp_step_x16;
- int dsc_joiner_max_bpp;
- int num_joined_pipes = intel_crtc_num_joined_pipes(pipe_config);
int link_bpp_x16;
int bpp_x16;
int ret;
- dsc_joiner_max_bpp = get_max_compressed_bpp_with_joiner(display, adjusted_mode->crtc_clock,
- adjusted_mode->hdisplay,
- num_joined_pipes);
- max_bpp_x16 = min(fxp_q4_from_int(dsc_joiner_max_bpp), limits->link.max_bpp_x16);
-
+ max_bpp_x16 = limits->link.max_bpp_x16;
bpp_step_x16 = intel_dp_dsc_bpp_step_x16(connector);
/* Compressed BPP should be less than the Input DSC bpp */
@@ -2613,6 +2606,7 @@ intel_dp_compute_config_link_bpp_limits(struct intel_dp *intel_dp,
int dsc_src_min_bpp, dsc_sink_min_bpp, dsc_min_bpp;
int dsc_src_max_bpp, dsc_sink_max_bpp, dsc_max_bpp;
int throughput_max_bpp_x16;
+ int joiner_max_bpp;
dsc_src_min_bpp = intel_dp_dsc_min_src_compressed_bpp();
dsc_sink_min_bpp = intel_dp_dsc_sink_min_compressed_bpp(crtc_state);
@@ -2620,11 +2614,17 @@ intel_dp_compute_config_link_bpp_limits(struct intel_dp *intel_dp,
limits->link.min_bpp_x16 = fxp_q4_from_int(dsc_min_bpp);
dsc_src_max_bpp = dsc_src_max_compressed_bpp(intel_dp);
+ joiner_max_bpp =
+ get_max_compressed_bpp_with_joiner(display,
+ adjusted_mode->crtc_clock,
+ adjusted_mode->hdisplay,
+ intel_crtc_num_joined_pipes(crtc_state));
dsc_sink_max_bpp = intel_dp_dsc_sink_max_compressed_bpp(connector,
crtc_state,
limits->pipe.max_bpp / 3);
dsc_max_bpp = dsc_sink_max_bpp ?
min(dsc_sink_max_bpp, dsc_src_max_bpp) : dsc_src_max_bpp;
+ dsc_max_bpp = min(dsc_max_bpp, joiner_max_bpp);
max_link_bpp_x16 = min(max_link_bpp_x16, fxp_q4_from_int(dsc_max_bpp));
--
2.49.1
next prev parent reply other threads:[~2025-12-15 19:24 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-15 19:23 [PATCH 00/16] drm/i915/dp: Clean up link BW/DSC slice config computation (fixes) Imre Deak
2025-12-15 19:23 ` [PATCH 01/16] drm/dp: Parse all DSC slice count caps for eDP 1.5 Imre Deak
2025-12-15 19:23 ` [PATCH 02/16] drm/dp: Add drm_dp_dsc_sink_slice_count_mask() Imre Deak
2025-12-15 19:23 ` [PATCH 03/16] drm/i915/dp: Fix DSC sink's slice count capability check Imre Deak
2025-12-15 19:23 ` [PATCH 04/16] drm/i915/dp: Return a fixed point BPP value from intel_dp_output_bpp() Imre Deak
2025-12-15 19:23 ` [PATCH 05/16] drm/i915/dp: Use a mode's crtc_clock vs. clock during state computation Imre Deak
2025-12-15 19:23 ` [PATCH 06/16] drm/i915/dp: Factor out intel_dp_link_bw_overhead() Imre Deak
2025-12-15 19:23 ` [PATCH 07/16] drm/i915/dp: Fix BW check in is_bw_sufficient_for_dsc_config() Imre Deak
2025-12-15 19:23 ` [PATCH 08/16] drm/i915/dp: Use the effective data rate for DP BW calculation Imre Deak
2025-12-15 19:23 ` [PATCH 09/16] drm/i915/dp: Use the effective data rate for DP compressed " Imre Deak
2025-12-15 19:23 ` [PATCH 10/16] drm/i915/dp: Account with MST, SSC BW overhead for uncompressed DP-MST stream BW Imre Deak
2025-12-15 19:23 ` [PATCH 11/16] drm/i915/dp: Account with DSC BW overhead for compressed DP-SST " Imre Deak
2025-12-15 19:23 ` Imre Deak [this message]
2025-12-15 19:23 ` [PATCH 13/16] drm/i915/dp: Fail state computation for invalid min/max link BPP values Imre Deak
2025-12-15 19:23 ` [PATCH 14/16] drm/i915/dp: Fail state computation for invalid max throughput BPP value Imre Deak
2025-12-15 19:23 ` [PATCH 15/16] drm/i915/dp: Fail state computation for invalid max sink compressed " Imre Deak
2025-12-15 19:23 ` [PATCH 16/16] drm/i915/dp: Fail state computation for invalid DSC source input BPP values Imre Deak
2025-12-15 22:16 ` ✗ CI.checkpatch: warning for drm/i915/dp: Clean up link BW/DSC slice config computation (fixes) Patchwork
2025-12-15 22:17 ` ✓ CI.KUnit: success " Patchwork
2025-12-15 22:36 ` ✗ CI.checksparse: warning " Patchwork
2025-12-15 23:31 ` ✓ Xe.CI.BAT: success " Patchwork
2025-12-16 9:27 ` ✗ Xe.CI.Full: failure " Patchwork
2025-12-16 17:30 ` [PATCH 00/16] " Imre Deak
2025-12-18 12:00 ` Imre Deak
2025-12-19 13:28 ` Maarten Lankhorst
[not found] ` <176585164976.91286.8511052780566467299@a3b018990fe9>
2025-12-19 15:21 ` ✓ i915.CI.Full: success for " Imre Deak
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