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From: Matthew Brost <matthew.brost@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: Matt Atwood <matthew.s.atwood@intel.com>,
	Stuart Summers <stuart.summers@intel.com>
Subject: [PATCH v5 06/11] drm/xe: Taint TLB invalidation seqno lock with GFP_KERNEL
Date: Fri, 16 Jan 2026 14:17:26 -0800	[thread overview]
Message-ID: <20260116221731.868657-7-matthew.brost@intel.com> (raw)
In-Reply-To: <20260116221731.868657-1-matthew.brost@intel.com>

Taint TLB invalidation seqno lock with GFP_KERNEL as TLB invalidations
can be in the path of reclaim (e.g., MMU notifiers).

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>
Tested-by: Stuart Summers <stuart.summers@intel.com>
---
 drivers/gpu/drm/xe/xe_tlb_inval.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.c b/drivers/gpu/drm/xe/xe_tlb_inval.c
index e837888367c4..21fef337f29c 100644
--- a/drivers/gpu/drm/xe/xe_tlb_inval.c
+++ b/drivers/gpu/drm/xe/xe_tlb_inval.c
@@ -111,6 +111,16 @@ static void tlb_inval_fini(struct drm_device *drm, void *arg)
 	xe_tlb_inval_reset(tlb_inval);
 }
 
+static void primelockdep(struct xe_tlb_inval *tlb_inval)
+{
+	if (!IS_ENABLED(CONFIG_LOCKDEP))
+		return;
+
+	fs_reclaim_acquire(GFP_KERNEL);
+	might_lock(&tlb_inval->seqno_lock);
+	fs_reclaim_release(GFP_KERNEL);
+}
+
 /**
  * xe_gt_tlb_inval_init - Initialize TLB invalidation state
  * @gt: GT structure
@@ -137,6 +147,8 @@ int xe_gt_tlb_inval_init_early(struct xe_gt *gt)
 	if (err)
 		return err;
 
+	primelockdep(tlb_inval);
+
 	tlb_inval->job_wq = drmm_alloc_ordered_workqueue(&xe->drm,
 							 "gt-tbl-inval-job-wq",
 							 WQ_MEM_RECLAIM);
-- 
2.34.1


  parent reply	other threads:[~2026-01-16 22:17 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-16 22:17 [PATCH v5 00/11] Context based TLB invalidations Matthew Brost
2026-01-16 22:17 ` [PATCH v5 01/11] drm/xe: Add normalize_invalidation_range Matthew Brost
2026-01-16 22:17 ` [PATCH v5 02/11] drm/xe: Make usm.asid_to_vm allocation use GFP_NOWAIT Matthew Brost
2026-01-16 22:17 ` [PATCH v5 03/11] drm/xe: Add has_ctx_tlb_inval to device info Matthew Brost
2026-01-16 22:17 ` [PATCH v5 04/11] drm/xe: Add xe_device_asid_to_vm helper Matthew Brost
2026-01-16 22:17 ` [PATCH v5 05/11] drm/xe: Add vm to exec queues association Matthew Brost
2026-01-16 22:17 ` Matthew Brost [this message]
2026-01-16 22:17 ` [PATCH v5 07/11] drm/xe: Rename send_tlb_inval_ppgtt to send_tlb_inval_asid_ppgtt Matthew Brost
2026-01-16 22:17 ` [PATCH v5 08/11] drm/xe: Add send_tlb_inval_ppgtt helper Matthew Brost
2026-01-16 22:17 ` [PATCH v5 09/11] drm/xe: Add xe_tlb_inval_idle helper Matthew Brost
2026-01-16 22:17 ` [PATCH v5 10/11] drm/xe: Add exec queue active vfunc Matthew Brost
2026-01-16 22:30   ` Summers, Stuart
2026-01-16 22:17 ` [PATCH v5 11/11] drm/xe: Add context-based invalidation to GuC TLB invalidation backend Matthew Brost
2026-01-16 22:36   ` Summers, Stuart
2026-01-16 23:30 ` ✓ CI.KUnit: success for Context based TLB invalidations (rev5) Patchwork
2026-01-17  0:05 ` ✓ Xe.CI.BAT: " Patchwork
2026-01-17  2:15 ` ✓ Xe.CI.Full: " Patchwork

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