* [RFC PATCH 1/3] drm/xe: Force page fault
2026-01-26 12:52 [RFC PATCH 0/3] drm/xe: Enable ATS Maarten Lankhorst
@ 2026-01-26 12:52 ` Maarten Lankhorst
2026-01-26 12:52 ` [RFC PATCH 2/3] drm/xe: Set the bits in PASID to enable ATS Maarten Lankhorst
` (7 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Maarten Lankhorst @ 2026-01-26 12:52 UTC (permalink / raw)
To: intel-xe; +Cc: Maarten Lankhorst
In order to support ATS, the PTE's marked as inaccessible should
explicitly have the FORCE_PAGE_FAULT flag set.
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
drivers/gpu/drm/xe/regs/xe_gtt_defs.h | 1 +
drivers/gpu/drm/xe/xe_migrate.c | 3 +++
drivers/gpu/drm/xe/xe_pt.c | 36 +++++++++++++++------------
3 files changed, 24 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/xe/regs/xe_gtt_defs.h b/drivers/gpu/drm/xe/regs/xe_gtt_defs.h
index 4d83461e538b1..b680932e3a3e0 100644
--- a/drivers/gpu/drm/xe/regs/xe_gtt_defs.h
+++ b/drivers/gpu/drm/xe/regs/xe_gtt_defs.h
@@ -34,5 +34,6 @@
#define XE_PAGE_PRESENT BIT_ULL(0)
#define XE_PAGE_RW BIT_ULL(1)
+#define XE_PAGE_FORCE_FAULT BIT_ULL(2)
#endif
diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index 6e202428aac2f..cbcac57b2c760 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -215,6 +215,9 @@ static int xe_migrate_prepare_vm(struct xe_tile *tile, struct xe_migrate *m,
if (IS_ERR(bo))
return PTR_ERR(bo);
+ for (i = 0; i < xe_bo_size(bo); i += 8)
+ xe_map_wr(xe, &bo->vmap, i, u64, XE_PAGE_FORCE_FAULT);
+
/* PT30 & PT31 reserved for 2M identity map */
pt29_ofs = xe_bo_size(bo) - 3 * XE_PAGE_SIZE;
entry = vm->pt_ops->pde_encode_bo(bo, pt29_ofs);
diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
index 6703a70492275..d2d272af51ae0 100644
--- a/drivers/gpu/drm/xe/xe_pt.c
+++ b/drivers/gpu/drm/xe/xe_pt.c
@@ -66,7 +66,7 @@ static u64 __xe_pt_empty_pte(struct xe_tile *tile, struct xe_vm *vm,
u8 id = tile->id;
if (!xe_vm_has_scratch(vm))
- return 0;
+ return XE_PAGE_FORCE_FAULT;
if (level > MAX_HUGEPTE_LEVEL)
return vm->pt_ops->pde_encode_bo(vm->scratch_pt[id][level - 1]->bo,
@@ -167,17 +167,9 @@ void xe_pt_populate_empty(struct xe_tile *tile, struct xe_vm *vm,
u64 empty;
int i;
- if (!xe_vm_has_scratch(vm)) {
- /*
- * FIXME: Some memory is allocated already allocated to zero?
- * Find out which memory that is and avoid this memset...
- */
- xe_map_memset(vm->xe, map, 0, 0, SZ_4K);
- } else {
- empty = __xe_pt_empty_pte(tile, vm, pt->level);
- for (i = 0; i < XE_PDES; i++)
- xe_pt_write(vm->xe, map, i, empty);
- }
+ empty = __xe_pt_empty_pte(tile, vm, pt->level);
+ for (i = 0; i < XE_PDES; i++)
+ xe_pt_write(vm->xe, map, i, empty);
}
/**
@@ -539,7 +531,7 @@ xe_pt_stage_bind_entry(struct xe_ptw *parent, pgoff_t offset,
XE_WARN_ON(xe_walk->va_curs_start != addr);
if (xe_walk->clear_pt) {
- pte = 0;
+ pte = XE_PAGE_FORCE_FAULT;
} else {
pte = vm->pt_ops->pte_encode_vma(is_null ? 0 :
xe_res_dma(curs) +
@@ -873,9 +865,21 @@ static int xe_pt_zap_ptes_entry(struct xe_ptw *parent, pgoff_t offset,
*/
if (xe_pt_nonshared_offsets(addr, next, --level, walk, action, &offset,
&end_offset)) {
- xe_map_memset(tile_to_xe(xe_walk->tile), &xe_child->bo->vmap,
- offset * sizeof(u64), 0,
- (end_offset - offset) * sizeof(u64));
+ struct iosys_map *map = &xe_child->bo->vmap;
+ struct xe_device *xe = tile_to_xe(xe_walk->tile);
+
+ /*
+ * Write only the low dword in 32-bit case to avoid potential
+ * issues with the high dword being non-atomically written first
+ * resulting in an out-of-bounds address with the present
+ * bit set.
+ */
+ for (; offset < end_offset; offset++) {
+ if (IS_ENABLED(CONFIG_64BIT))
+ xe_map_wr(xe, map, offset * sizeof(u64), u64, XE_PAGE_FORCE_FAULT);
+ else
+ xe_map_wr(xe, map, offset * sizeof(u64), u32, XE_PAGE_FORCE_FAULT);
+ }
xe_walk->needs_invalidate = true;
}
--
2.51.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* [RFC PATCH 2/3] drm/xe: Set the bits in PASID to enable ATS.
2026-01-26 12:52 [RFC PATCH 0/3] drm/xe: Enable ATS Maarten Lankhorst
2026-01-26 12:52 ` [RFC PATCH 1/3] drm/xe: Force page fault Maarten Lankhorst
@ 2026-01-26 12:52 ` Maarten Lankhorst
2026-01-26 12:52 ` [RFC PATCH 3/3] drm/xe: Add migration selftest for validating job submission and basic features work Maarten Lankhorst
` (6 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Maarten Lankhorst @ 2026-01-26 12:52 UTC (permalink / raw)
To: intel-xe; +Cc: Maarten Lankhorst
If the PCI device claims to support ATS, use it and set the
relevant bits in the context.
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
drivers/gpu/drm/xe/regs/xe_lrc_layout.h | 1 +
drivers/gpu/drm/xe/xe_lrc.c | 6 ++++++
2 files changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/xe/regs/xe_lrc_layout.h b/drivers/gpu/drm/xe/regs/xe_lrc_layout.h
index b5eff383902c5..959b3f7db91f6 100644
--- a/drivers/gpu/drm/xe/regs/xe_lrc_layout.h
+++ b/drivers/gpu/drm/xe/regs/xe_lrc_layout.h
@@ -18,6 +18,7 @@
#define CTX_TIMESTAMP_UDW (0x24 + 1)
#define CTX_INDIRECT_RING_STATE (0x26 + 1)
#define CTX_ACC_CTR_THOLD (0x2a + 1)
+#define CTX_SYS_PASID (0x2c + 1)
#define CTX_ASID (0x2e + 1)
#define CTX_PDP0_UDW (0x30 + 1)
#define CTX_PDP0_LDW (0x32 + 1)
diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index f4f31bc240d93..fa911ea80c772 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -32,6 +32,8 @@
#include "xe_vm.h"
#include "xe_wa.h"
+#define LRC_SYS_PASID_ENABLE_ATS BIT(31)
+
#define LRC_VALID BIT_ULL(0)
#define LRC_PRIVILEGE BIT_ULL(8)
#define LRC_ADDRESSING_MODE GENMASK_ULL(4, 3)
@@ -1557,6 +1559,10 @@ static int xe_lrc_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe,
if (xe->info.has_asid && vm)
xe_lrc_write_ctx_reg(lrc, CTX_ASID, vm->usm.asid);
+ /* If possible, enable ATS to offload the IOMMU TLB */
+ if (to_pci_dev(xe->drm.dev)->ats_enabled)
+ xe_lrc_write_ctx_reg(lrc, CTX_SYS_PASID, LRC_SYS_PASID_ENABLE_ATS);
+
lrc->desc = LRC_VALID;
lrc->desc |= FIELD_PREP(LRC_ADDRESSING_MODE, LRC_LEGACY_64B_CONTEXT);
/* TODO: Priority */
--
2.51.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* [RFC PATCH 3/3] drm/xe: Add migration selftest for validating job submission and basic features work
2026-01-26 12:52 [RFC PATCH 0/3] drm/xe: Enable ATS Maarten Lankhorst
2026-01-26 12:52 ` [RFC PATCH 1/3] drm/xe: Force page fault Maarten Lankhorst
2026-01-26 12:52 ` [RFC PATCH 2/3] drm/xe: Set the bits in PASID to enable ATS Maarten Lankhorst
@ 2026-01-26 12:52 ` Maarten Lankhorst
2026-01-26 19:19 ` Matthew Brost
2026-01-26 12:58 ` ✗ CI.checkpatch: warning for drm/xe: Enable ATS Patchwork
` (5 subsequent siblings)
8 siblings, 1 reply; 11+ messages in thread
From: Maarten Lankhorst @ 2026-01-26 12:52 UTC (permalink / raw)
To: intel-xe; +Cc: Maarten Lankhorst
Add a migration selftest that copies either from local VRAM to sysmem,
or sysmem to sysmem. The idea is to validate whether accessing VRAM and
system memory works, so we don't run into slightly harder issues later
if ATS fails.
TODO: Do we want to run this all the time, put it behind a module
parameter, or only if DRM_XE_DEBUG_VM is set?
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
drivers/gpu/drm/xe/xe_device.c | 7 ++++++
drivers/gpu/drm/xe/xe_migrate.c | 43 +++++++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_migrate.h | 1 +
3 files changed, 51 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index aad4aa53a51f9..4e244c0ed23cc 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -46,6 +46,7 @@
#include "xe_i2c.h"
#include "xe_irq.h"
#include "xe_late_bind_fw.h"
+#include "xe_migrate.h"
#include "xe_mmio.h"
#include "xe_module.h"
#include "xe_nvm.h"
@@ -974,6 +975,12 @@ int xe_device_probe(struct xe_device *xe)
if (err)
return err;
+ for_each_tile(tile, xe, id) {
+ err = xe_migrate_selftest(tile->migrate);
+ if (err)
+ return err;
+ }
+
err = drm_dev_register(&xe->drm, 0);
if (err)
return err;
diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index cbcac57b2c760..bf2000d8d7c23 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -37,6 +37,7 @@
#include "xe_sriov_vf_ccs.h"
#include "xe_svm.h"
#include "xe_sync.h"
+#include "xe_tile_printk.h"
#include "xe_trace_bo.h"
#include "xe_validation.h"
#include "xe_vm.h"
@@ -519,6 +520,48 @@ int xe_migrate_init(struct xe_migrate *m)
}
+int xe_migrate_selftest(struct xe_migrate *m)
+{
+ struct xe_tile *tile = m->tile;
+ struct xe_device *xe = tile->xe;
+ struct xe_bo *mem_bo;
+ struct xe_bo *tile_bo;
+ struct dma_fence *fence;
+ int err;
+
+ tile_bo = xe_bo_create_pin_map_novm(xe, tile, SZ_2M, ttm_bo_type_kernel,
+ XE_BO_FLAG_VRAM_IF_DGFX(tile), false);
+
+ if (IS_ERR(tile_bo))
+ return PTR_ERR(tile_bo);
+
+ mem_bo = xe_bo_create_pin_map_novm(xe, tile, xe_bo_size(tile_bo), ttm_bo_type_kernel,
+ XE_BO_FLAG_SYSTEM, false);
+
+ if (IS_ERR(mem_bo)) {
+ err = PTR_ERR(mem_bo);
+ goto out_put_tile;
+ }
+
+ xe_map_memset(xe, &mem_bo->vmap, 0, 0xc0, xe_bo_size(mem_bo));
+
+ fence = xe_migrate_copy(m, tile_bo, mem_bo, tile_bo->ttm.resource, mem_bo->ttm.resource, false);
+ if (IS_ERR(fence)) {
+ err = PTR_ERR(fence);
+ goto out_put_mem;
+ }
+ err = dma_fence_wait(fence, false);
+ dma_fence_put(fence);
+
+out_put_mem:
+ xe_bo_unpin_map_no_vm(mem_bo);
+out_put_tile:
+ xe_bo_unpin_map_no_vm(tile_bo);
+ if (err)
+ xe_tile_err(tile, "Migration selftest failed with %pe\n", ERR_PTR(err));
+ return err;
+}
+
static u64 max_mem_transfer_per_pass(struct xe_device *xe)
{
if (!IS_DGFX(xe) && xe_device_has_flat_ccs(xe))
diff --git a/drivers/gpu/drm/xe/xe_migrate.h b/drivers/gpu/drm/xe/xe_migrate.h
index 1522afb37dcfa..92f40bc671d40 100644
--- a/drivers/gpu/drm/xe/xe_migrate.h
+++ b/drivers/gpu/drm/xe/xe_migrate.h
@@ -112,6 +112,7 @@ struct xe_migrate_pt_update {
struct xe_migrate *xe_migrate_alloc(struct xe_tile *tile);
int xe_migrate_init(struct xe_migrate *m);
+int xe_migrate_selftest(struct xe_migrate *m);
struct dma_fence *xe_migrate_to_vram(struct xe_migrate *m,
unsigned long npages,
--
2.51.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [RFC PATCH 3/3] drm/xe: Add migration selftest for validating job submission and basic features work
2026-01-26 12:52 ` [RFC PATCH 3/3] drm/xe: Add migration selftest for validating job submission and basic features work Maarten Lankhorst
@ 2026-01-26 19:19 ` Matthew Brost
0 siblings, 0 replies; 11+ messages in thread
From: Matthew Brost @ 2026-01-26 19:19 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-xe
On Mon, Jan 26, 2026 at 01:52:07PM +0100, Maarten Lankhorst wrote:
> Add a migration selftest that copies either from local VRAM to sysmem,
> or sysmem to sysmem. The idea is to validate whether accessing VRAM and
> system memory works, so we don't run into slightly harder issues later
> if ATS fails.
>
> TODO: Do we want to run this all the time, put it behind a module
> parameter, or only if DRM_XE_DEBUG_VM is set?
>
Yes, behind DRM_XE_DEBUG_VM or just make this a standalone selftest. Or
just drop as once ATS works CI should be very stable.
> Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
> ---
> drivers/gpu/drm/xe/xe_device.c | 7 ++++++
> drivers/gpu/drm/xe/xe_migrate.c | 43 +++++++++++++++++++++++++++++++++
> drivers/gpu/drm/xe/xe_migrate.h | 1 +
> 3 files changed, 51 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> index aad4aa53a51f9..4e244c0ed23cc 100644
> --- a/drivers/gpu/drm/xe/xe_device.c
> +++ b/drivers/gpu/drm/xe/xe_device.c
> @@ -46,6 +46,7 @@
> #include "xe_i2c.h"
> #include "xe_irq.h"
> #include "xe_late_bind_fw.h"
> +#include "xe_migrate.h"
> #include "xe_mmio.h"
> #include "xe_module.h"
> #include "xe_nvm.h"
> @@ -974,6 +975,12 @@ int xe_device_probe(struct xe_device *xe)
> if (err)
> return err;
>
> + for_each_tile(tile, xe, id) {
> + err = xe_migrate_selftest(tile->migrate);
> + if (err)
> + return err;
> + }
> +
> err = drm_dev_register(&xe->drm, 0);
> if (err)
> return err;
> diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
> index cbcac57b2c760..bf2000d8d7c23 100644
> --- a/drivers/gpu/drm/xe/xe_migrate.c
> +++ b/drivers/gpu/drm/xe/xe_migrate.c
> @@ -37,6 +37,7 @@
> #include "xe_sriov_vf_ccs.h"
> #include "xe_svm.h"
> #include "xe_sync.h"
> +#include "xe_tile_printk.h"
> #include "xe_trace_bo.h"
> #include "xe_validation.h"
> #include "xe_vm.h"
> @@ -519,6 +520,48 @@ int xe_migrate_init(struct xe_migrate *m)
>
> }
>
> +int xe_migrate_selftest(struct xe_migrate *m)
> +{
> + struct xe_tile *tile = m->tile;
> + struct xe_device *xe = tile->xe;
> + struct xe_bo *mem_bo;
> + struct xe_bo *tile_bo;
> + struct dma_fence *fence;
> + int err;
> +
> + tile_bo = xe_bo_create_pin_map_novm(xe, tile, SZ_2M, ttm_bo_type_kernel,
> + XE_BO_FLAG_VRAM_IF_DGFX(tile), false);
> +
> + if (IS_ERR(tile_bo))
> + return PTR_ERR(tile_bo);
> +
> + mem_bo = xe_bo_create_pin_map_novm(xe, tile, xe_bo_size(tile_bo), ttm_bo_type_kernel,
> + XE_BO_FLAG_SYSTEM, false);
> +
> + if (IS_ERR(mem_bo)) {
> + err = PTR_ERR(mem_bo);
> + goto out_put_tile;
> + }
> +
> + xe_map_memset(xe, &mem_bo->vmap, 0, 0xc0, xe_bo_size(mem_bo));
> +
CI is complaining because tile_bo and mem_bo dma-resv locks are not held
when DRM scheduler dependecies in xe_migrate_copy -> xe_sched_job_add_deps
-> drm_sched_job_add_resv_dependencies.
Matt
> + fence = xe_migrate_copy(m, tile_bo, mem_bo, tile_bo->ttm.resource, mem_bo->ttm.resource, false);
> + if (IS_ERR(fence)) {
> + err = PTR_ERR(fence);
> + goto out_put_mem;
> + }
> + err = dma_fence_wait(fence, false);
> + dma_fence_put(fence);
> +
> +out_put_mem:
> + xe_bo_unpin_map_no_vm(mem_bo);
> +out_put_tile:
> + xe_bo_unpin_map_no_vm(tile_bo);
> + if (err)
> + xe_tile_err(tile, "Migration selftest failed with %pe\n", ERR_PTR(err));
> + return err;
> +}
> +
> static u64 max_mem_transfer_per_pass(struct xe_device *xe)
> {
> if (!IS_DGFX(xe) && xe_device_has_flat_ccs(xe))
> diff --git a/drivers/gpu/drm/xe/xe_migrate.h b/drivers/gpu/drm/xe/xe_migrate.h
> index 1522afb37dcfa..92f40bc671d40 100644
> --- a/drivers/gpu/drm/xe/xe_migrate.h
> +++ b/drivers/gpu/drm/xe/xe_migrate.h
> @@ -112,6 +112,7 @@ struct xe_migrate_pt_update {
>
> struct xe_migrate *xe_migrate_alloc(struct xe_tile *tile);
> int xe_migrate_init(struct xe_migrate *m);
> +int xe_migrate_selftest(struct xe_migrate *m);
>
> struct dma_fence *xe_migrate_to_vram(struct xe_migrate *m,
> unsigned long npages,
> --
> 2.51.0
>
^ permalink raw reply [flat|nested] 11+ messages in thread
* ✗ CI.checkpatch: warning for drm/xe: Enable ATS.
2026-01-26 12:52 [RFC PATCH 0/3] drm/xe: Enable ATS Maarten Lankhorst
` (2 preceding siblings ...)
2026-01-26 12:52 ` [RFC PATCH 3/3] drm/xe: Add migration selftest for validating job submission and basic features work Maarten Lankhorst
@ 2026-01-26 12:58 ` Patchwork
2026-01-26 13:00 ` ✓ CI.KUnit: success " Patchwork
` (4 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2026-01-26 12:58 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-xe
== Series Details ==
Series: drm/xe: Enable ATS.
URL : https://patchwork.freedesktop.org/series/160645/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
1f57ba1afceae32108bd24770069f764d940a0e4
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 9a9635013e6cb63c1689fafcd337cfe49821bbac
Author: Maarten Lankhorst <dev@lankhorst.se>
Date: Mon Jan 26 13:52:07 2026 +0100
drm/xe: Add migration selftest for validating job submission and basic features work
Add a migration selftest that copies either from local VRAM to sysmem,
or sysmem to sysmem. The idea is to validate whether accessing VRAM and
system memory works, so we don't run into slightly harder issues later
if ATS fails.
TODO: Do we want to run this all the time, put it behind a module
parameter, or only if DRM_XE_DEBUG_VM is set?
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
+ /mt/dim checkpatch a1e0224c47409e3c48cfc55a7db0321d22dc343e drm-intel
7257559f3a6e drm/xe: Force page fault
dff21062a1f8 drm/xe: Set the bits in PASID to enable ATS.
9a9635013e6c drm/xe: Add migration selftest for validating job submission and basic features work
-:83: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#83: FILE: drivers/gpu/drm/xe/xe_migrate.c:548:
+ fence = xe_migrate_copy(m, tile_bo, mem_bo, tile_bo->ttm.resource, mem_bo->ttm.resource, false);
total: 0 errors, 1 warnings, 0 checks, 81 lines checked
^ permalink raw reply [flat|nested] 11+ messages in thread* ✓ CI.KUnit: success for drm/xe: Enable ATS.
2026-01-26 12:52 [RFC PATCH 0/3] drm/xe: Enable ATS Maarten Lankhorst
` (3 preceding siblings ...)
2026-01-26 12:58 ` ✗ CI.checkpatch: warning for drm/xe: Enable ATS Patchwork
@ 2026-01-26 13:00 ` Patchwork
2026-01-26 13:38 ` ✗ Xe.CI.BAT: failure " Patchwork
` (3 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2026-01-26 13:00 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-xe
== Series Details ==
Series: drm/xe: Enable ATS.
URL : https://patchwork.freedesktop.org/series/160645/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[12:58:58] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:59:03] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:59:34] Starting KUnit Kernel (1/1)...
[12:59:34] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:59:34] ================== guc_buf (11 subtests) ===================
[12:59:34] [PASSED] test_smallest
[12:59:34] [PASSED] test_largest
[12:59:34] [PASSED] test_granular
[12:59:34] [PASSED] test_unique
[12:59:34] [PASSED] test_overlap
[12:59:34] [PASSED] test_reusable
[12:59:34] [PASSED] test_too_big
[12:59:34] [PASSED] test_flush
[12:59:34] [PASSED] test_lookup
[12:59:34] [PASSED] test_data
[12:59:34] [PASSED] test_class
[12:59:34] ===================== [PASSED] guc_buf =====================
[12:59:34] =================== guc_dbm (7 subtests) ===================
[12:59:34] [PASSED] test_empty
[12:59:34] [PASSED] test_default
[12:59:34] ======================== test_size ========================
[12:59:34] [PASSED] 4
[12:59:34] [PASSED] 8
[12:59:34] [PASSED] 32
[12:59:34] [PASSED] 256
[12:59:34] ==================== [PASSED] test_size ====================
[12:59:34] ======================= test_reuse ========================
[12:59:34] [PASSED] 4
[12:59:34] [PASSED] 8
[12:59:34] [PASSED] 32
[12:59:34] [PASSED] 256
[12:59:34] =================== [PASSED] test_reuse ====================
[12:59:34] =================== test_range_overlap ====================
[12:59:34] [PASSED] 4
[12:59:34] [PASSED] 8
[12:59:34] [PASSED] 32
[12:59:34] [PASSED] 256
[12:59:34] =============== [PASSED] test_range_overlap ================
[12:59:34] =================== test_range_compact ====================
[12:59:34] [PASSED] 4
[12:59:34] [PASSED] 8
[12:59:34] [PASSED] 32
[12:59:34] [PASSED] 256
[12:59:34] =============== [PASSED] test_range_compact ================
[12:59:34] ==================== test_range_spare =====================
[12:59:34] [PASSED] 4
[12:59:34] [PASSED] 8
[12:59:34] [PASSED] 32
[12:59:34] [PASSED] 256
[12:59:34] ================ [PASSED] test_range_spare =================
[12:59:34] ===================== [PASSED] guc_dbm =====================
[12:59:34] =================== guc_idm (6 subtests) ===================
[12:59:34] [PASSED] bad_init
[12:59:34] [PASSED] no_init
[12:59:34] [PASSED] init_fini
[12:59:34] [PASSED] check_used
[12:59:35] [PASSED] check_quota
[12:59:35] [PASSED] check_all
[12:59:35] ===================== [PASSED] guc_idm =====================
[12:59:35] ================== no_relay (3 subtests) ===================
[12:59:35] [PASSED] xe_drops_guc2pf_if_not_ready
[12:59:35] [PASSED] xe_drops_guc2vf_if_not_ready
[12:59:35] [PASSED] xe_rejects_send_if_not_ready
[12:59:35] ==================== [PASSED] no_relay =====================
[12:59:35] ================== pf_relay (14 subtests) ==================
[12:59:35] [PASSED] pf_rejects_guc2pf_too_short
[12:59:35] [PASSED] pf_rejects_guc2pf_too_long
[12:59:35] [PASSED] pf_rejects_guc2pf_no_payload
[12:59:35] [PASSED] pf_fails_no_payload
[12:59:35] [PASSED] pf_fails_bad_origin
[12:59:35] [PASSED] pf_fails_bad_type
[12:59:35] [PASSED] pf_txn_reports_error
[12:59:35] [PASSED] pf_txn_sends_pf2guc
[12:59:35] [PASSED] pf_sends_pf2guc
[12:59:35] [SKIPPED] pf_loopback_nop
[12:59:35] [SKIPPED] pf_loopback_echo
[12:59:35] [SKIPPED] pf_loopback_fail
[12:59:35] [SKIPPED] pf_loopback_busy
[12:59:35] [SKIPPED] pf_loopback_retry
[12:59:35] ==================== [PASSED] pf_relay =====================
[12:59:35] ================== vf_relay (3 subtests) ===================
[12:59:35] [PASSED] vf_rejects_guc2vf_too_short
[12:59:35] [PASSED] vf_rejects_guc2vf_too_long
[12:59:35] [PASSED] vf_rejects_guc2vf_no_payload
[12:59:35] ==================== [PASSED] vf_relay =====================
[12:59:35] ================ pf_gt_config (6 subtests) =================
[12:59:35] [PASSED] fair_contexts_1vf
[12:59:35] [PASSED] fair_doorbells_1vf
[12:59:35] [PASSED] fair_ggtt_1vf
[12:59:35] ====================== fair_contexts ======================
[12:59:35] [PASSED] 1 VF
[12:59:35] [PASSED] 2 VFs
[12:59:35] [PASSED] 3 VFs
[12:59:35] [PASSED] 4 VFs
[12:59:35] [PASSED] 5 VFs
[12:59:35] [PASSED] 6 VFs
[12:59:35] [PASSED] 7 VFs
[12:59:35] [PASSED] 8 VFs
[12:59:35] [PASSED] 9 VFs
[12:59:35] [PASSED] 10 VFs
[12:59:35] [PASSED] 11 VFs
[12:59:35] [PASSED] 12 VFs
[12:59:35] [PASSED] 13 VFs
[12:59:35] [PASSED] 14 VFs
[12:59:35] [PASSED] 15 VFs
[12:59:35] [PASSED] 16 VFs
[12:59:35] [PASSED] 17 VFs
[12:59:35] [PASSED] 18 VFs
[12:59:35] [PASSED] 19 VFs
[12:59:35] [PASSED] 20 VFs
[12:59:35] [PASSED] 21 VFs
[12:59:35] [PASSED] 22 VFs
[12:59:35] [PASSED] 23 VFs
[12:59:35] [PASSED] 24 VFs
[12:59:35] [PASSED] 25 VFs
[12:59:35] [PASSED] 26 VFs
[12:59:35] [PASSED] 27 VFs
[12:59:35] [PASSED] 28 VFs
[12:59:35] [PASSED] 29 VFs
[12:59:35] [PASSED] 30 VFs
[12:59:35] [PASSED] 31 VFs
[12:59:35] [PASSED] 32 VFs
[12:59:35] [PASSED] 33 VFs
[12:59:35] [PASSED] 34 VFs
[12:59:35] [PASSED] 35 VFs
[12:59:35] [PASSED] 36 VFs
[12:59:35] [PASSED] 37 VFs
[12:59:35] [PASSED] 38 VFs
[12:59:35] [PASSED] 39 VFs
[12:59:35] [PASSED] 40 VFs
[12:59:35] [PASSED] 41 VFs
[12:59:35] [PASSED] 42 VFs
[12:59:35] [PASSED] 43 VFs
[12:59:35] [PASSED] 44 VFs
[12:59:35] [PASSED] 45 VFs
[12:59:35] [PASSED] 46 VFs
[12:59:35] [PASSED] 47 VFs
[12:59:35] [PASSED] 48 VFs
[12:59:35] [PASSED] 49 VFs
[12:59:35] [PASSED] 50 VFs
[12:59:35] [PASSED] 51 VFs
[12:59:35] [PASSED] 52 VFs
[12:59:35] [PASSED] 53 VFs
[12:59:35] [PASSED] 54 VFs
[12:59:35] [PASSED] 55 VFs
[12:59:35] [PASSED] 56 VFs
[12:59:35] [PASSED] 57 VFs
[12:59:35] [PASSED] 58 VFs
[12:59:35] [PASSED] 59 VFs
[12:59:35] [PASSED] 60 VFs
[12:59:35] [PASSED] 61 VFs
[12:59:35] [PASSED] 62 VFs
[12:59:35] [PASSED] 63 VFs
[12:59:35] ================== [PASSED] fair_contexts ==================
[12:59:35] ===================== fair_doorbells ======================
[12:59:35] [PASSED] 1 VF
[12:59:35] [PASSED] 2 VFs
[12:59:35] [PASSED] 3 VFs
[12:59:35] [PASSED] 4 VFs
[12:59:35] [PASSED] 5 VFs
[12:59:35] [PASSED] 6 VFs
[12:59:35] [PASSED] 7 VFs
[12:59:35] [PASSED] 8 VFs
[12:59:35] [PASSED] 9 VFs
[12:59:35] [PASSED] 10 VFs
[12:59:35] [PASSED] 11 VFs
[12:59:35] [PASSED] 12 VFs
[12:59:35] [PASSED] 13 VFs
[12:59:35] [PASSED] 14 VFs
[12:59:35] [PASSED] 15 VFs
[12:59:35] [PASSED] 16 VFs
[12:59:35] [PASSED] 17 VFs
[12:59:35] [PASSED] 18 VFs
[12:59:35] [PASSED] 19 VFs
[12:59:35] [PASSED] 20 VFs
[12:59:35] [PASSED] 21 VFs
[12:59:35] [PASSED] 22 VFs
[12:59:35] [PASSED] 23 VFs
[12:59:35] [PASSED] 24 VFs
[12:59:35] [PASSED] 25 VFs
[12:59:35] [PASSED] 26 VFs
[12:59:35] [PASSED] 27 VFs
[12:59:35] [PASSED] 28 VFs
[12:59:35] [PASSED] 29 VFs
[12:59:35] [PASSED] 30 VFs
[12:59:35] [PASSED] 31 VFs
[12:59:35] [PASSED] 32 VFs
[12:59:35] [PASSED] 33 VFs
[12:59:35] [PASSED] 34 VFs
[12:59:35] [PASSED] 35 VFs
[12:59:35] [PASSED] 36 VFs
[12:59:35] [PASSED] 37 VFs
[12:59:35] [PASSED] 38 VFs
[12:59:35] [PASSED] 39 VFs
[12:59:35] [PASSED] 40 VFs
[12:59:35] [PASSED] 41 VFs
[12:59:35] [PASSED] 42 VFs
[12:59:35] [PASSED] 43 VFs
[12:59:35] [PASSED] 44 VFs
[12:59:35] [PASSED] 45 VFs
[12:59:35] [PASSED] 46 VFs
[12:59:35] [PASSED] 47 VFs
[12:59:35] [PASSED] 48 VFs
[12:59:35] [PASSED] 49 VFs
[12:59:35] [PASSED] 50 VFs
[12:59:35] [PASSED] 51 VFs
[12:59:35] [PASSED] 52 VFs
[12:59:35] [PASSED] 53 VFs
[12:59:35] [PASSED] 54 VFs
[12:59:35] [PASSED] 55 VFs
[12:59:35] [PASSED] 56 VFs
[12:59:35] [PASSED] 57 VFs
[12:59:35] [PASSED] 58 VFs
[12:59:35] [PASSED] 59 VFs
[12:59:35] [PASSED] 60 VFs
[12:59:35] [PASSED] 61 VFs
[12:59:35] [PASSED] 62 VFs
[12:59:35] [PASSED] 63 VFs
[12:59:35] ================= [PASSED] fair_doorbells ==================
[12:59:35] ======================== fair_ggtt ========================
[12:59:35] [PASSED] 1 VF
[12:59:35] [PASSED] 2 VFs
[12:59:35] [PASSED] 3 VFs
[12:59:35] [PASSED] 4 VFs
[12:59:35] [PASSED] 5 VFs
[12:59:35] [PASSED] 6 VFs
[12:59:35] [PASSED] 7 VFs
[12:59:35] [PASSED] 8 VFs
[12:59:35] [PASSED] 9 VFs
[12:59:35] [PASSED] 10 VFs
[12:59:35] [PASSED] 11 VFs
[12:59:35] [PASSED] 12 VFs
[12:59:35] [PASSED] 13 VFs
[12:59:35] [PASSED] 14 VFs
[12:59:35] [PASSED] 15 VFs
[12:59:35] [PASSED] 16 VFs
[12:59:35] [PASSED] 17 VFs
[12:59:35] [PASSED] 18 VFs
[12:59:35] [PASSED] 19 VFs
[12:59:35] [PASSED] 20 VFs
[12:59:35] [PASSED] 21 VFs
[12:59:35] [PASSED] 22 VFs
[12:59:35] [PASSED] 23 VFs
[12:59:35] [PASSED] 24 VFs
[12:59:35] [PASSED] 25 VFs
[12:59:35] [PASSED] 26 VFs
[12:59:35] [PASSED] 27 VFs
[12:59:35] [PASSED] 28 VFs
[12:59:35] [PASSED] 29 VFs
[12:59:35] [PASSED] 30 VFs
[12:59:35] [PASSED] 31 VFs
[12:59:35] [PASSED] 32 VFs
[12:59:35] [PASSED] 33 VFs
[12:59:35] [PASSED] 34 VFs
[12:59:35] [PASSED] 35 VFs
[12:59:35] [PASSED] 36 VFs
[12:59:35] [PASSED] 37 VFs
[12:59:35] [PASSED] 38 VFs
[12:59:35] [PASSED] 39 VFs
[12:59:35] [PASSED] 40 VFs
[12:59:35] [PASSED] 41 VFs
[12:59:35] [PASSED] 42 VFs
[12:59:35] [PASSED] 43 VFs
[12:59:35] [PASSED] 44 VFs
[12:59:35] [PASSED] 45 VFs
[12:59:35] [PASSED] 46 VFs
[12:59:35] [PASSED] 47 VFs
[12:59:35] [PASSED] 48 VFs
[12:59:35] [PASSED] 49 VFs
[12:59:35] [PASSED] 50 VFs
[12:59:35] [PASSED] 51 VFs
[12:59:35] [PASSED] 52 VFs
[12:59:35] [PASSED] 53 VFs
[12:59:35] [PASSED] 54 VFs
[12:59:35] [PASSED] 55 VFs
[12:59:35] [PASSED] 56 VFs
[12:59:35] [PASSED] 57 VFs
[12:59:35] [PASSED] 58 VFs
[12:59:35] [PASSED] 59 VFs
[12:59:35] [PASSED] 60 VFs
[12:59:35] [PASSED] 61 VFs
[12:59:35] [PASSED] 62 VFs
[12:59:35] [PASSED] 63 VFs
[12:59:35] ==================== [PASSED] fair_ggtt ====================
[12:59:35] ================== [PASSED] pf_gt_config ===================
[12:59:35] ===================== lmtt (1 subtest) =====================
[12:59:35] ======================== test_ops =========================
[12:59:35] [PASSED] 2-level
[12:59:35] [PASSED] multi-level
[12:59:35] ==================== [PASSED] test_ops =====================
[12:59:35] ====================== [PASSED] lmtt =======================
[12:59:35] ================= pf_service (11 subtests) =================
[12:59:35] [PASSED] pf_negotiate_any
[12:59:35] [PASSED] pf_negotiate_base_match
[12:59:35] [PASSED] pf_negotiate_base_newer
[12:59:35] [PASSED] pf_negotiate_base_next
[12:59:35] [SKIPPED] pf_negotiate_base_older
[12:59:35] [PASSED] pf_negotiate_base_prev
[12:59:35] [PASSED] pf_negotiate_latest_match
[12:59:35] [PASSED] pf_negotiate_latest_newer
[12:59:35] [PASSED] pf_negotiate_latest_next
[12:59:35] [SKIPPED] pf_negotiate_latest_older
[12:59:35] [SKIPPED] pf_negotiate_latest_prev
[12:59:35] =================== [PASSED] pf_service ====================
[12:59:35] ================= xe_guc_g2g (2 subtests) ==================
[12:59:35] ============== xe_live_guc_g2g_kunit_default ==============
[12:59:35] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[12:59:35] ============== xe_live_guc_g2g_kunit_allmem ===============
[12:59:35] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[12:59:35] =================== [SKIPPED] xe_guc_g2g ===================
[12:59:35] =================== xe_mocs (2 subtests) ===================
[12:59:35] ================ xe_live_mocs_kernel_kunit ================
[12:59:35] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[12:59:35] ================ xe_live_mocs_reset_kunit =================
[12:59:35] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[12:59:35] ==================== [SKIPPED] xe_mocs =====================
[12:59:35] ================= xe_migrate (2 subtests) ==================
[12:59:35] ================= xe_migrate_sanity_kunit =================
[12:59:35] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[12:59:35] ================== xe_validate_ccs_kunit ==================
[12:59:35] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[12:59:35] =================== [SKIPPED] xe_migrate ===================
[12:59:35] ================== xe_dma_buf (1 subtest) ==================
[12:59:35] ==================== xe_dma_buf_kunit =====================
[12:59:35] ================ [SKIPPED] xe_dma_buf_kunit ================
[12:59:35] =================== [SKIPPED] xe_dma_buf ===================
[12:59:35] ================= xe_bo_shrink (1 subtest) =================
[12:59:35] =================== xe_bo_shrink_kunit ====================
[12:59:35] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[12:59:35] ================== [SKIPPED] xe_bo_shrink ==================
[12:59:35] ==================== xe_bo (2 subtests) ====================
[12:59:35] ================== xe_ccs_migrate_kunit ===================
[12:59:35] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[12:59:35] ==================== xe_bo_evict_kunit ====================
[12:59:35] =============== [SKIPPED] xe_bo_evict_kunit ================
[12:59:35] ===================== [SKIPPED] xe_bo ======================
[12:59:35] ==================== args (13 subtests) ====================
[12:59:35] [PASSED] count_args_test
[12:59:35] [PASSED] call_args_example
[12:59:35] [PASSED] call_args_test
[12:59:35] [PASSED] drop_first_arg_example
[12:59:35] [PASSED] drop_first_arg_test
[12:59:35] [PASSED] first_arg_example
[12:59:35] [PASSED] first_arg_test
[12:59:35] [PASSED] last_arg_example
[12:59:35] [PASSED] last_arg_test
[12:59:35] [PASSED] pick_arg_example
[12:59:35] [PASSED] if_args_example
[12:59:35] [PASSED] if_args_test
[12:59:35] [PASSED] sep_comma_example
[12:59:35] ====================== [PASSED] args =======================
[12:59:35] =================== xe_pci (3 subtests) ====================
[12:59:35] ==================== check_graphics_ip ====================
[12:59:35] [PASSED] 12.00 Xe_LP
[12:59:35] [PASSED] 12.10 Xe_LP+
[12:59:35] [PASSED] 12.55 Xe_HPG
[12:59:35] [PASSED] 12.60 Xe_HPC
[12:59:35] [PASSED] 12.70 Xe_LPG
[12:59:35] [PASSED] 12.71 Xe_LPG
[12:59:35] [PASSED] 12.74 Xe_LPG+
[12:59:35] [PASSED] 20.01 Xe2_HPG
[12:59:35] [PASSED] 20.02 Xe2_HPG
[12:59:35] [PASSED] 20.04 Xe2_LPG
[12:59:35] [PASSED] 30.00 Xe3_LPG
[12:59:35] [PASSED] 30.01 Xe3_LPG
[12:59:35] [PASSED] 30.03 Xe3_LPG
[12:59:35] [PASSED] 30.04 Xe3_LPG
[12:59:35] [PASSED] 30.05 Xe3_LPG
[12:59:35] [PASSED] 35.11 Xe3p_XPC
[12:59:35] ================ [PASSED] check_graphics_ip ================
[12:59:35] ===================== check_media_ip ======================
[12:59:35] [PASSED] 12.00 Xe_M
[12:59:35] [PASSED] 12.55 Xe_HPM
[12:59:35] [PASSED] 13.00 Xe_LPM+
[12:59:35] [PASSED] 13.01 Xe2_HPM
[12:59:35] [PASSED] 20.00 Xe2_LPM
[12:59:35] [PASSED] 30.00 Xe3_LPM
[12:59:35] [PASSED] 30.02 Xe3_LPM
[12:59:35] [PASSED] 35.00 Xe3p_LPM
[12:59:35] [PASSED] 35.03 Xe3p_HPM
[12:59:35] ================= [PASSED] check_media_ip ==================
[12:59:35] =================== check_platform_desc ===================
[12:59:35] [PASSED] 0x9A60 (TIGERLAKE)
[12:59:35] [PASSED] 0x9A68 (TIGERLAKE)
[12:59:35] [PASSED] 0x9A70 (TIGERLAKE)
[12:59:35] [PASSED] 0x9A40 (TIGERLAKE)
[12:59:35] [PASSED] 0x9A49 (TIGERLAKE)
[12:59:35] [PASSED] 0x9A59 (TIGERLAKE)
[12:59:35] [PASSED] 0x9A78 (TIGERLAKE)
[12:59:35] [PASSED] 0x9AC0 (TIGERLAKE)
[12:59:35] [PASSED] 0x9AC9 (TIGERLAKE)
[12:59:35] [PASSED] 0x9AD9 (TIGERLAKE)
[12:59:35] [PASSED] 0x9AF8 (TIGERLAKE)
[12:59:35] [PASSED] 0x4C80 (ROCKETLAKE)
[12:59:35] [PASSED] 0x4C8A (ROCKETLAKE)
[12:59:35] [PASSED] 0x4C8B (ROCKETLAKE)
[12:59:35] [PASSED] 0x4C8C (ROCKETLAKE)
[12:59:35] [PASSED] 0x4C90 (ROCKETLAKE)
[12:59:35] [PASSED] 0x4C9A (ROCKETLAKE)
[12:59:35] [PASSED] 0x4680 (ALDERLAKE_S)
[12:59:35] [PASSED] 0x4682 (ALDERLAKE_S)
[12:59:35] [PASSED] 0x4688 (ALDERLAKE_S)
[12:59:35] [PASSED] 0x468A (ALDERLAKE_S)
[12:59:35] [PASSED] 0x468B (ALDERLAKE_S)
[12:59:35] [PASSED] 0x4690 (ALDERLAKE_S)
[12:59:35] [PASSED] 0x4692 (ALDERLAKE_S)
[12:59:35] [PASSED] 0x4693 (ALDERLAKE_S)
[12:59:35] [PASSED] 0x46A0 (ALDERLAKE_P)
[12:59:35] [PASSED] 0x46A1 (ALDERLAKE_P)
[12:59:35] [PASSED] 0x46A2 (ALDERLAKE_P)
[12:59:35] [PASSED] 0x46A3 (ALDERLAKE_P)
[12:59:35] [PASSED] 0x46A6 (ALDERLAKE_P)
[12:59:35] [PASSED] 0x46A8 (ALDERLAKE_P)
[12:59:35] [PASSED] 0x46AA (ALDERLAKE_P)
[12:59:35] [PASSED] 0x462A (ALDERLAKE_P)
[12:59:35] [PASSED] 0x4626 (ALDERLAKE_P)
[12:59:35] [PASSED] 0x4628 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[12:59:35] [PASSED] 0x46B0 (ALDERLAKE_P)
[12:59:35] [PASSED] 0x46B1 (ALDERLAKE_P)
[12:59:35] [PASSED] 0x46B2 (ALDERLAKE_P)
[12:59:35] [PASSED] 0x46B3 (ALDERLAKE_P)
[12:59:35] [PASSED] 0x46C0 (ALDERLAKE_P)
[12:59:35] [PASSED] 0x46C1 (ALDERLAKE_P)
[12:59:35] [PASSED] 0x46C2 (ALDERLAKE_P)
[12:59:35] [PASSED] 0x46C3 (ALDERLAKE_P)
[12:59:35] [PASSED] 0x46D0 (ALDERLAKE_N)
[12:59:35] [PASSED] 0x46D1 (ALDERLAKE_N)
[12:59:35] [PASSED] 0x46D2 (ALDERLAKE_N)
[12:59:35] [PASSED] 0x46D3 (ALDERLAKE_N)
[12:59:35] [PASSED] 0x46D4 (ALDERLAKE_N)
[12:59:35] [PASSED] 0xA721 (ALDERLAKE_P)
[12:59:35] [PASSED] 0xA7A1 (ALDERLAKE_P)
[12:59:35] [PASSED] 0xA7A9 (ALDERLAKE_P)
[12:59:35] [PASSED] 0xA7AC (ALDERLAKE_P)
[12:59:35] [PASSED] 0xA7AD (ALDERLAKE_P)
[12:59:35] [PASSED] 0xA720 (ALDERLAKE_P)
[12:59:35] [PASSED] 0xA7A0 (ALDERLAKE_P)
[12:59:35] [PASSED] 0xA7A8 (ALDERLAKE_P)
[12:59:35] [PASSED] 0xA7AA (ALDERLAKE_P)
[12:59:35] [PASSED] 0xA7AB (ALDERLAKE_P)
[12:59:35] [PASSED] 0xA780 (ALDERLAKE_S)
[12:59:35] [PASSED] 0xA781 (ALDERLAKE_S)
[12:59:35] [PASSED] 0xA782 (ALDERLAKE_S)
[12:59:35] [PASSED] 0xA783 (ALDERLAKE_S)
[12:59:35] [PASSED] 0xA788 (ALDERLAKE_S)
[12:59:35] [PASSED] 0xA789 (ALDERLAKE_S)
[12:59:35] [PASSED] 0xA78A (ALDERLAKE_S)
[12:59:35] [PASSED] 0xA78B (ALDERLAKE_S)
[12:59:35] [PASSED] 0x4905 (DG1)
[12:59:35] [PASSED] 0x4906 (DG1)
[12:59:35] [PASSED] 0x4907 (DG1)
[12:59:35] [PASSED] 0x4908 (DG1)
[12:59:35] [PASSED] 0x4909 (DG1)
[12:59:35] [PASSED] 0x56C0 (DG2)
[12:59:35] [PASSED] 0x56C2 (DG2)
[12:59:35] [PASSED] 0x56C1 (DG2)
[12:59:35] [PASSED] 0x7D51 (METEORLAKE)
[12:59:35] [PASSED] 0x7DD1 (METEORLAKE)
[12:59:35] [PASSED] 0x7D41 (METEORLAKE)
[12:59:35] [PASSED] 0x7D67 (METEORLAKE)
[12:59:35] [PASSED] 0xB640 (METEORLAKE)
[12:59:35] [PASSED] 0x56A0 (DG2)
[12:59:35] [PASSED] 0x56A1 (DG2)
[12:59:35] [PASSED] 0x56A2 (DG2)
[12:59:35] [PASSED] 0x56BE (DG2)
[12:59:35] [PASSED] 0x56BF (DG2)
[12:59:35] [PASSED] 0x5690 (DG2)
[12:59:35] [PASSED] 0x5691 (DG2)
[12:59:35] [PASSED] 0x5692 (DG2)
[12:59:35] [PASSED] 0x56A5 (DG2)
[12:59:35] [PASSED] 0x56A6 (DG2)
[12:59:35] [PASSED] 0x56B0 (DG2)
[12:59:35] [PASSED] 0x56B1 (DG2)
[12:59:35] [PASSED] 0x56BA (DG2)
[12:59:35] [PASSED] 0x56BB (DG2)
[12:59:35] [PASSED] 0x56BC (DG2)
[12:59:35] [PASSED] 0x56BD (DG2)
[12:59:35] [PASSED] 0x5693 (DG2)
[12:59:35] [PASSED] 0x5694 (DG2)
[12:59:35] [PASSED] 0x5695 (DG2)
[12:59:35] [PASSED] 0x56A3 (DG2)
[12:59:35] [PASSED] 0x56A4 (DG2)
[12:59:35] [PASSED] 0x56B2 (DG2)
[12:59:35] [PASSED] 0x56B3 (DG2)
[12:59:35] [PASSED] 0x5696 (DG2)
[12:59:35] [PASSED] 0x5697 (DG2)
[12:59:35] [PASSED] 0xB69 (PVC)
[12:59:35] [PASSED] 0xB6E (PVC)
[12:59:35] [PASSED] 0xBD4 (PVC)
[12:59:35] [PASSED] 0xBD5 (PVC)
[12:59:35] [PASSED] 0xBD6 (PVC)
[12:59:35] [PASSED] 0xBD7 (PVC)
[12:59:35] [PASSED] 0xBD8 (PVC)
[12:59:35] [PASSED] 0xBD9 (PVC)
[12:59:35] [PASSED] 0xBDA (PVC)
[12:59:35] [PASSED] 0xBDB (PVC)
[12:59:35] [PASSED] 0xBE0 (PVC)
[12:59:35] [PASSED] 0xBE1 (PVC)
[12:59:35] [PASSED] 0xBE5 (PVC)
[12:59:35] [PASSED] 0x7D40 (METEORLAKE)
[12:59:35] [PASSED] 0x7D45 (METEORLAKE)
[12:59:35] [PASSED] 0x7D55 (METEORLAKE)
[12:59:35] [PASSED] 0x7D60 (METEORLAKE)
[12:59:35] [PASSED] 0x7DD5 (METEORLAKE)
[12:59:35] [PASSED] 0x6420 (LUNARLAKE)
[12:59:35] [PASSED] 0x64A0 (LUNARLAKE)
[12:59:35] [PASSED] 0x64B0 (LUNARLAKE)
[12:59:35] [PASSED] 0xE202 (BATTLEMAGE)
[12:59:35] [PASSED] 0xE209 (BATTLEMAGE)
[12:59:35] [PASSED] 0xE20B (BATTLEMAGE)
[12:59:35] [PASSED] 0xE20C (BATTLEMAGE)
[12:59:35] [PASSED] 0xE20D (BATTLEMAGE)
[12:59:35] [PASSED] 0xE210 (BATTLEMAGE)
[12:59:35] [PASSED] 0xE211 (BATTLEMAGE)
[12:59:35] [PASSED] 0xE212 (BATTLEMAGE)
[12:59:35] [PASSED] 0xE216 (BATTLEMAGE)
[12:59:35] [PASSED] 0xE220 (BATTLEMAGE)
[12:59:35] [PASSED] 0xE221 (BATTLEMAGE)
[12:59:35] [PASSED] 0xE222 (BATTLEMAGE)
[12:59:35] [PASSED] 0xE223 (BATTLEMAGE)
[12:59:35] [PASSED] 0xB080 (PANTHERLAKE)
[12:59:35] [PASSED] 0xB081 (PANTHERLAKE)
[12:59:35] [PASSED] 0xB082 (PANTHERLAKE)
[12:59:35] [PASSED] 0xB083 (PANTHERLAKE)
[12:59:35] [PASSED] 0xB084 (PANTHERLAKE)
[12:59:35] [PASSED] 0xB085 (PANTHERLAKE)
[12:59:35] [PASSED] 0xB086 (PANTHERLAKE)
[12:59:35] [PASSED] 0xB087 (PANTHERLAKE)
[12:59:35] [PASSED] 0xB08F (PANTHERLAKE)
[12:59:35] [PASSED] 0xB090 (PANTHERLAKE)
[12:59:35] [PASSED] 0xB0A0 (PANTHERLAKE)
[12:59:35] [PASSED] 0xB0B0 (PANTHERLAKE)
[12:59:35] [PASSED] 0xFD80 (PANTHERLAKE)
[12:59:35] [PASSED] 0xFD81 (PANTHERLAKE)
[12:59:35] [PASSED] 0xD740 (NOVALAKE_S)
[12:59:35] [PASSED] 0xD741 (NOVALAKE_S)
[12:59:35] [PASSED] 0xD742 (NOVALAKE_S)
[12:59:35] [PASSED] 0xD743 (NOVALAKE_S)
[12:59:35] [PASSED] 0xD744 (NOVALAKE_S)
[12:59:35] [PASSED] 0xD745 (NOVALAKE_S)
[12:59:35] [PASSED] 0x674C (CRESCENTISLAND)
[12:59:35] =============== [PASSED] check_platform_desc ===============
[12:59:35] ===================== [PASSED] xe_pci ======================
[12:59:35] =================== xe_rtp (2 subtests) ====================
[12:59:35] =============== xe_rtp_process_to_sr_tests ================
[12:59:35] [PASSED] coalesce-same-reg
[12:59:35] [PASSED] no-match-no-add
[12:59:35] [PASSED] match-or
[12:59:35] [PASSED] match-or-xfail
[12:59:35] [PASSED] no-match-no-add-multiple-rules
[12:59:35] [PASSED] two-regs-two-entries
[12:59:35] [PASSED] clr-one-set-other
[12:59:35] [PASSED] set-field
[12:59:35] [PASSED] conflict-duplicate
[12:59:35] [PASSED] conflict-not-disjoint
[12:59:35] [PASSED] conflict-reg-type
[12:59:35] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[12:59:35] ================== xe_rtp_process_tests ===================
[12:59:35] [PASSED] active1
[12:59:35] [PASSED] active2
[12:59:35] [PASSED] active-inactive
[12:59:35] [PASSED] inactive-active
[12:59:35] [PASSED] inactive-1st_or_active-inactive
[12:59:35] [PASSED] inactive-2nd_or_active-inactive
[12:59:35] [PASSED] inactive-last_or_active-inactive
[12:59:35] [PASSED] inactive-no_or_active-inactive
[12:59:35] ============== [PASSED] xe_rtp_process_tests ===============
[12:59:35] ===================== [PASSED] xe_rtp ======================
[12:59:35] ==================== xe_wa (1 subtest) =====================
[12:59:35] ======================== xe_wa_gt =========================
[12:59:35] [PASSED] TIGERLAKE B0
[12:59:35] [PASSED] DG1 A0
[12:59:35] [PASSED] DG1 B0
[12:59:35] [PASSED] ALDERLAKE_S A0
[12:59:35] [PASSED] ALDERLAKE_S B0
[12:59:35] [PASSED] ALDERLAKE_S C0
[12:59:35] [PASSED] ALDERLAKE_S D0
[12:59:35] [PASSED] ALDERLAKE_P A0
[12:59:35] [PASSED] ALDERLAKE_P B0
[12:59:35] [PASSED] ALDERLAKE_P C0
[12:59:35] [PASSED] ALDERLAKE_S RPLS D0
[12:59:35] [PASSED] ALDERLAKE_P RPLU E0
[12:59:35] [PASSED] DG2 G10 C0
[12:59:35] [PASSED] DG2 G11 B1
[12:59:35] [PASSED] DG2 G12 A1
[12:59:35] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[12:59:35] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[12:59:35] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[12:59:35] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[12:59:35] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[12:59:35] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[12:59:35] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[12:59:35] ==================== [PASSED] xe_wa_gt =====================
[12:59:35] ====================== [PASSED] xe_wa ======================
[12:59:35] ============================================================
[12:59:35] Testing complete. Ran 512 tests: passed: 494, skipped: 18
[12:59:35] Elapsed time: 36.275s total, 4.170s configuring, 31.637s building, 0.455s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[12:59:35] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:59:36] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[13:00:02] Starting KUnit Kernel (1/1)...
[13:00:02] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:00:02] ============ drm_test_pick_cmdline (2 subtests) ============
[13:00:02] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[13:00:02] =============== drm_test_pick_cmdline_named ===============
[13:00:02] [PASSED] NTSC
[13:00:02] [PASSED] NTSC-J
[13:00:02] [PASSED] PAL
[13:00:02] [PASSED] PAL-M
[13:00:02] =========== [PASSED] drm_test_pick_cmdline_named ===========
[13:00:02] ============== [PASSED] drm_test_pick_cmdline ==============
[13:00:02] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[13:00:02] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[13:00:02] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[13:00:02] =========== drm_validate_clone_mode (2 subtests) ===========
[13:00:02] ============== drm_test_check_in_clone_mode ===============
[13:00:02] [PASSED] in_clone_mode
[13:00:02] [PASSED] not_in_clone_mode
[13:00:02] ========== [PASSED] drm_test_check_in_clone_mode ===========
[13:00:02] =============== drm_test_check_valid_clones ===============
[13:00:02] [PASSED] not_in_clone_mode
[13:00:02] [PASSED] valid_clone
[13:00:02] [PASSED] invalid_clone
[13:00:02] =========== [PASSED] drm_test_check_valid_clones ===========
[13:00:02] ============= [PASSED] drm_validate_clone_mode =============
[13:00:02] ============= drm_validate_modeset (1 subtest) =============
[13:00:02] [PASSED] drm_test_check_connector_changed_modeset
[13:00:02] ============== [PASSED] drm_validate_modeset ===============
[13:00:02] ====== drm_test_bridge_get_current_state (2 subtests) ======
[13:00:02] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[13:00:02] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[13:00:02] ======== [PASSED] drm_test_bridge_get_current_state ========
[13:00:02] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[13:00:02] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[13:00:02] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[13:00:02] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[13:00:02] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[13:00:02] ============== drm_bridge_alloc (2 subtests) ===============
[13:00:02] [PASSED] drm_test_drm_bridge_alloc_basic
[13:00:02] [PASSED] drm_test_drm_bridge_alloc_get_put
[13:00:02] ================ [PASSED] drm_bridge_alloc =================
[13:00:02] ================== drm_buddy (9 subtests) ==================
[13:00:02] [PASSED] drm_test_buddy_alloc_limit
[13:00:02] [PASSED] drm_test_buddy_alloc_optimistic
[13:00:02] [PASSED] drm_test_buddy_alloc_pessimistic
[13:00:02] [PASSED] drm_test_buddy_alloc_pathological
[13:00:02] [PASSED] drm_test_buddy_alloc_contiguous
[13:00:02] [PASSED] drm_test_buddy_alloc_clear
[13:00:02] [PASSED] drm_test_buddy_alloc_range_bias
[13:00:02] [PASSED] drm_test_buddy_fragmentation_performance
[13:00:02] [PASSED] drm_test_buddy_alloc_exceeds_max_order
[13:00:02] ==================== [PASSED] drm_buddy ====================
[13:00:02] ============= drm_cmdline_parser (40 subtests) =============
[13:00:02] [PASSED] drm_test_cmdline_force_d_only
[13:00:02] [PASSED] drm_test_cmdline_force_D_only_dvi
[13:00:02] [PASSED] drm_test_cmdline_force_D_only_hdmi
[13:00:02] [PASSED] drm_test_cmdline_force_D_only_not_digital
[13:00:02] [PASSED] drm_test_cmdline_force_e_only
[13:00:02] [PASSED] drm_test_cmdline_res
[13:00:02] [PASSED] drm_test_cmdline_res_vesa
[13:00:02] [PASSED] drm_test_cmdline_res_vesa_rblank
[13:00:02] [PASSED] drm_test_cmdline_res_rblank
[13:00:02] [PASSED] drm_test_cmdline_res_bpp
[13:00:02] [PASSED] drm_test_cmdline_res_refresh
[13:00:02] [PASSED] drm_test_cmdline_res_bpp_refresh
[13:00:02] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[13:00:02] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[13:00:02] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[13:00:02] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[13:00:02] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[13:00:02] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[13:00:02] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[13:00:02] [PASSED] drm_test_cmdline_res_margins_force_on
[13:00:02] [PASSED] drm_test_cmdline_res_vesa_margins
[13:00:02] [PASSED] drm_test_cmdline_name
[13:00:02] [PASSED] drm_test_cmdline_name_bpp
[13:00:02] [PASSED] drm_test_cmdline_name_option
[13:00:02] [PASSED] drm_test_cmdline_name_bpp_option
[13:00:02] [PASSED] drm_test_cmdline_rotate_0
[13:00:02] [PASSED] drm_test_cmdline_rotate_90
[13:00:02] [PASSED] drm_test_cmdline_rotate_180
[13:00:02] [PASSED] drm_test_cmdline_rotate_270
[13:00:02] [PASSED] drm_test_cmdline_hmirror
[13:00:02] [PASSED] drm_test_cmdline_vmirror
[13:00:02] [PASSED] drm_test_cmdline_margin_options
[13:00:02] [PASSED] drm_test_cmdline_multiple_options
[13:00:02] [PASSED] drm_test_cmdline_bpp_extra_and_option
[13:00:02] [PASSED] drm_test_cmdline_extra_and_option
[13:00:02] [PASSED] drm_test_cmdline_freestanding_options
[13:00:02] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[13:00:02] [PASSED] drm_test_cmdline_panel_orientation
[13:00:02] ================ drm_test_cmdline_invalid =================
[13:00:02] [PASSED] margin_only
[13:00:02] [PASSED] interlace_only
[13:00:02] [PASSED] res_missing_x
[13:00:02] [PASSED] res_missing_y
[13:00:02] [PASSED] res_bad_y
[13:00:02] [PASSED] res_missing_y_bpp
[13:00:02] [PASSED] res_bad_bpp
[13:00:02] [PASSED] res_bad_refresh
[13:00:02] [PASSED] res_bpp_refresh_force_on_off
[13:00:02] [PASSED] res_invalid_mode
[13:00:02] [PASSED] res_bpp_wrong_place_mode
[13:00:02] [PASSED] name_bpp_refresh
[13:00:02] [PASSED] name_refresh
[13:00:02] [PASSED] name_refresh_wrong_mode
[13:00:02] [PASSED] name_refresh_invalid_mode
[13:00:02] [PASSED] rotate_multiple
[13:00:02] [PASSED] rotate_invalid_val
[13:00:02] [PASSED] rotate_truncated
[13:00:02] [PASSED] invalid_option
[13:00:02] [PASSED] invalid_tv_option
[13:00:02] [PASSED] truncated_tv_option
[13:00:02] ============ [PASSED] drm_test_cmdline_invalid =============
[13:00:02] =============== drm_test_cmdline_tv_options ===============
[13:00:02] [PASSED] NTSC
[13:00:02] [PASSED] NTSC_443
[13:00:02] [PASSED] NTSC_J
[13:00:02] [PASSED] PAL
[13:00:02] [PASSED] PAL_M
[13:00:02] [PASSED] PAL_N
[13:00:02] [PASSED] SECAM
[13:00:02] [PASSED] MONO_525
[13:00:02] [PASSED] MONO_625
[13:00:02] =========== [PASSED] drm_test_cmdline_tv_options ===========
[13:00:02] =============== [PASSED] drm_cmdline_parser ================
[13:00:02] ========== drmm_connector_hdmi_init (20 subtests) ==========
[13:00:02] [PASSED] drm_test_connector_hdmi_init_valid
[13:00:02] [PASSED] drm_test_connector_hdmi_init_bpc_8
[13:00:02] [PASSED] drm_test_connector_hdmi_init_bpc_10
[13:00:02] [PASSED] drm_test_connector_hdmi_init_bpc_12
[13:00:02] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[13:00:02] [PASSED] drm_test_connector_hdmi_init_bpc_null
[13:00:02] [PASSED] drm_test_connector_hdmi_init_formats_empty
[13:00:02] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[13:00:02] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[13:00:02] [PASSED] supported_formats=0x9 yuv420_allowed=1
[13:00:02] [PASSED] supported_formats=0x9 yuv420_allowed=0
[13:00:02] [PASSED] supported_formats=0x3 yuv420_allowed=1
[13:00:02] [PASSED] supported_formats=0x3 yuv420_allowed=0
[13:00:02] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[13:00:02] [PASSED] drm_test_connector_hdmi_init_null_ddc
[13:00:02] [PASSED] drm_test_connector_hdmi_init_null_product
[13:00:02] [PASSED] drm_test_connector_hdmi_init_null_vendor
[13:00:02] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[13:00:02] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[13:00:02] [PASSED] drm_test_connector_hdmi_init_product_valid
[13:00:02] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[13:00:02] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[13:00:02] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[13:00:02] ========= drm_test_connector_hdmi_init_type_valid =========
[13:00:02] [PASSED] HDMI-A
[13:00:02] [PASSED] HDMI-B
[13:00:02] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[13:00:02] ======== drm_test_connector_hdmi_init_type_invalid ========
[13:00:02] [PASSED] Unknown
[13:00:02] [PASSED] VGA
[13:00:02] [PASSED] DVI-I
[13:00:02] [PASSED] DVI-D
[13:00:02] [PASSED] DVI-A
[13:00:02] [PASSED] Composite
[13:00:02] [PASSED] SVIDEO
[13:00:02] [PASSED] LVDS
[13:00:02] [PASSED] Component
[13:00:02] [PASSED] DIN
[13:00:02] [PASSED] DP
[13:00:02] [PASSED] TV
[13:00:02] [PASSED] eDP
[13:00:02] [PASSED] Virtual
[13:00:02] [PASSED] DSI
[13:00:02] [PASSED] DPI
[13:00:02] [PASSED] Writeback
[13:00:02] [PASSED] SPI
[13:00:02] [PASSED] USB
[13:00:02] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[13:00:02] ============ [PASSED] drmm_connector_hdmi_init =============
[13:00:02] ============= drmm_connector_init (3 subtests) =============
[13:00:02] [PASSED] drm_test_drmm_connector_init
[13:00:02] [PASSED] drm_test_drmm_connector_init_null_ddc
[13:00:02] ========= drm_test_drmm_connector_init_type_valid =========
[13:00:02] [PASSED] Unknown
[13:00:02] [PASSED] VGA
[13:00:02] [PASSED] DVI-I
[13:00:02] [PASSED] DVI-D
[13:00:02] [PASSED] DVI-A
[13:00:02] [PASSED] Composite
[13:00:02] [PASSED] SVIDEO
[13:00:02] [PASSED] LVDS
[13:00:02] [PASSED] Component
[13:00:02] [PASSED] DIN
[13:00:02] [PASSED] DP
[13:00:02] [PASSED] HDMI-A
[13:00:02] [PASSED] HDMI-B
[13:00:02] [PASSED] TV
[13:00:02] [PASSED] eDP
[13:00:02] [PASSED] Virtual
[13:00:02] [PASSED] DSI
[13:00:02] [PASSED] DPI
[13:00:02] [PASSED] Writeback
[13:00:02] [PASSED] SPI
[13:00:02] [PASSED] USB
[13:00:02] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[13:00:02] =============== [PASSED] drmm_connector_init ===============
[13:00:02] ========= drm_connector_dynamic_init (6 subtests) ==========
[13:00:02] [PASSED] drm_test_drm_connector_dynamic_init
[13:00:02] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[13:00:02] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[13:00:02] [PASSED] drm_test_drm_connector_dynamic_init_properties
[13:00:02] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[13:00:02] [PASSED] Unknown
[13:00:02] [PASSED] VGA
[13:00:02] [PASSED] DVI-I
[13:00:02] [PASSED] DVI-D
[13:00:02] [PASSED] DVI-A
[13:00:02] [PASSED] Composite
[13:00:02] [PASSED] SVIDEO
[13:00:02] [PASSED] LVDS
[13:00:02] [PASSED] Component
[13:00:02] [PASSED] DIN
[13:00:02] [PASSED] DP
[13:00:02] [PASSED] HDMI-A
[13:00:02] [PASSED] HDMI-B
[13:00:02] [PASSED] TV
[13:00:02] [PASSED] eDP
[13:00:02] [PASSED] Virtual
[13:00:02] [PASSED] DSI
[13:00:02] [PASSED] DPI
[13:00:02] [PASSED] Writeback
[13:00:02] [PASSED] SPI
[13:00:02] [PASSED] USB
[13:00:02] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[13:00:02] ======== drm_test_drm_connector_dynamic_init_name =========
[13:00:02] [PASSED] Unknown
[13:00:02] [PASSED] VGA
[13:00:02] [PASSED] DVI-I
[13:00:02] [PASSED] DVI-D
[13:00:02] [PASSED] DVI-A
[13:00:02] [PASSED] Composite
[13:00:02] [PASSED] SVIDEO
[13:00:02] [PASSED] LVDS
[13:00:02] [PASSED] Component
[13:00:02] [PASSED] DIN
[13:00:02] [PASSED] DP
[13:00:02] [PASSED] HDMI-A
[13:00:02] [PASSED] HDMI-B
[13:00:02] [PASSED] TV
[13:00:02] [PASSED] eDP
[13:00:02] [PASSED] Virtual
[13:00:02] [PASSED] DSI
[13:00:02] [PASSED] DPI
[13:00:02] [PASSED] Writeback
[13:00:02] [PASSED] SPI
[13:00:02] [PASSED] USB
[13:00:02] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[13:00:02] =========== [PASSED] drm_connector_dynamic_init ============
[13:00:02] ==== drm_connector_dynamic_register_early (4 subtests) =====
[13:00:02] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[13:00:02] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[13:00:02] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[13:00:02] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[13:00:02] ====== [PASSED] drm_connector_dynamic_register_early =======
[13:00:02] ======= drm_connector_dynamic_register (7 subtests) ========
[13:00:02] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[13:00:02] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[13:00:02] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[13:00:02] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[13:00:02] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[13:00:02] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[13:00:02] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[13:00:02] ========= [PASSED] drm_connector_dynamic_register ==========
[13:00:02] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[13:00:02] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[13:00:02] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[13:00:02] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[13:00:02] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[13:00:02] ========== drm_test_get_tv_mode_from_name_valid ===========
[13:00:02] [PASSED] NTSC
[13:00:02] [PASSED] NTSC-443
[13:00:02] [PASSED] NTSC-J
[13:00:02] [PASSED] PAL
[13:00:02] [PASSED] PAL-M
[13:00:02] [PASSED] PAL-N
[13:00:02] [PASSED] SECAM
[13:00:02] [PASSED] Mono
[13:00:02] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[13:00:02] [PASSED] drm_test_get_tv_mode_from_name_truncated
[13:00:02] ============ [PASSED] drm_get_tv_mode_from_name ============
[13:00:02] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[13:00:02] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[13:00:02] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[13:00:02] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[13:00:02] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[13:00:02] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[13:00:02] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[13:00:02] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[13:00:02] [PASSED] VIC 96
[13:00:02] [PASSED] VIC 97
[13:00:02] [PASSED] VIC 101
[13:00:02] [PASSED] VIC 102
[13:00:02] [PASSED] VIC 106
[13:00:02] [PASSED] VIC 107
[13:00:02] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[13:00:02] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[13:00:02] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[13:00:02] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[13:00:02] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[13:00:02] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[13:00:02] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[13:00:02] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[13:00:02] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[13:00:02] [PASSED] Automatic
[13:00:02] [PASSED] Full
[13:00:02] [PASSED] Limited 16:235
[13:00:02] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[13:00:02] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[13:00:02] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[13:00:02] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[13:00:02] === drm_test_drm_hdmi_connector_get_output_format_name ====
[13:00:02] [PASSED] RGB
[13:00:02] [PASSED] YUV 4:2:0
[13:00:02] [PASSED] YUV 4:2:2
[13:00:02] [PASSED] YUV 4:4:4
[13:00:02] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[13:00:02] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[13:00:02] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[13:00:02] ============= drm_damage_helper (21 subtests) ==============
[13:00:02] [PASSED] drm_test_damage_iter_no_damage
[13:00:02] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[13:00:02] [PASSED] drm_test_damage_iter_no_damage_src_moved
[13:00:02] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[13:00:02] [PASSED] drm_test_damage_iter_no_damage_not_visible
[13:00:02] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[13:00:02] [PASSED] drm_test_damage_iter_no_damage_no_fb
[13:00:02] [PASSED] drm_test_damage_iter_simple_damage
[13:00:02] [PASSED] drm_test_damage_iter_single_damage
[13:00:02] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[13:00:02] [PASSED] drm_test_damage_iter_single_damage_outside_src
[13:00:02] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[13:00:02] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[13:00:02] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[13:00:02] [PASSED] drm_test_damage_iter_single_damage_src_moved
[13:00:02] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[13:00:02] [PASSED] drm_test_damage_iter_damage
[13:00:02] [PASSED] drm_test_damage_iter_damage_one_intersect
[13:00:02] [PASSED] drm_test_damage_iter_damage_one_outside
[13:00:02] [PASSED] drm_test_damage_iter_damage_src_moved
[13:00:02] [PASSED] drm_test_damage_iter_damage_not_visible
[13:00:02] ================ [PASSED] drm_damage_helper ================
[13:00:02] ============== drm_dp_mst_helper (3 subtests) ==============
[13:00:02] ============== drm_test_dp_mst_calc_pbn_mode ==============
[13:00:02] [PASSED] Clock 154000 BPP 30 DSC disabled
[13:00:02] [PASSED] Clock 234000 BPP 30 DSC disabled
[13:00:02] [PASSED] Clock 297000 BPP 24 DSC disabled
[13:00:02] [PASSED] Clock 332880 BPP 24 DSC enabled
[13:00:02] [PASSED] Clock 324540 BPP 24 DSC enabled
[13:00:02] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[13:00:02] ============== drm_test_dp_mst_calc_pbn_div ===============
[13:00:02] [PASSED] Link rate 2000000 lane count 4
[13:00:02] [PASSED] Link rate 2000000 lane count 2
[13:00:02] [PASSED] Link rate 2000000 lane count 1
[13:00:02] [PASSED] Link rate 1350000 lane count 4
[13:00:02] [PASSED] Link rate 1350000 lane count 2
[13:00:02] [PASSED] Link rate 1350000 lane count 1
[13:00:02] [PASSED] Link rate 1000000 lane count 4
[13:00:02] [PASSED] Link rate 1000000 lane count 2
[13:00:02] [PASSED] Link rate 1000000 lane count 1
[13:00:02] [PASSED] Link rate 810000 lane count 4
[13:00:02] [PASSED] Link rate 810000 lane count 2
[13:00:02] [PASSED] Link rate 810000 lane count 1
[13:00:02] [PASSED] Link rate 540000 lane count 4
[13:00:02] [PASSED] Link rate 540000 lane count 2
[13:00:02] [PASSED] Link rate 540000 lane count 1
[13:00:02] [PASSED] Link rate 270000 lane count 4
[13:00:02] [PASSED] Link rate 270000 lane count 2
[13:00:02] [PASSED] Link rate 270000 lane count 1
[13:00:02] [PASSED] Link rate 162000 lane count 4
[13:00:02] [PASSED] Link rate 162000 lane count 2
[13:00:02] [PASSED] Link rate 162000 lane count 1
[13:00:02] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[13:00:02] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[13:00:02] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[13:00:02] [PASSED] DP_POWER_UP_PHY with port number
[13:00:02] [PASSED] DP_POWER_DOWN_PHY with port number
[13:00:02] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[13:00:02] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[13:00:02] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[13:00:02] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[13:00:02] [PASSED] DP_QUERY_PAYLOAD with port number
[13:00:02] [PASSED] DP_QUERY_PAYLOAD with VCPI
[13:00:02] [PASSED] DP_REMOTE_DPCD_READ with port number
[13:00:02] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[13:00:02] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[13:00:02] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[13:00:02] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[13:00:02] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[13:00:02] [PASSED] DP_REMOTE_I2C_READ with port number
[13:00:02] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[13:00:02] [PASSED] DP_REMOTE_I2C_READ with transactions array
[13:00:02] [PASSED] DP_REMOTE_I2C_WRITE with port number
[13:00:02] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[13:00:02] [PASSED] DP_REMOTE_I2C_WRITE with data array
[13:00:02] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[13:00:02] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[13:00:02] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[13:00:02] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[13:00:02] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[13:00:02] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[13:00:02] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[13:00:02] ================ [PASSED] drm_dp_mst_helper ================
[13:00:02] ================== drm_exec (7 subtests) ===================
[13:00:02] [PASSED] sanitycheck
[13:00:02] [PASSED] test_lock
[13:00:02] [PASSED] test_lock_unlock
[13:00:02] [PASSED] test_duplicates
[13:00:02] [PASSED] test_prepare
[13:00:02] [PASSED] test_prepare_array
[13:00:02] [PASSED] test_multiple_loops
[13:00:02] ==================== [PASSED] drm_exec =====================
[13:00:02] =========== drm_format_helper_test (17 subtests) ===========
[13:00:02] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[13:00:02] [PASSED] single_pixel_source_buffer
[13:00:02] [PASSED] single_pixel_clip_rectangle
[13:00:02] [PASSED] well_known_colors
[13:00:02] [PASSED] destination_pitch
[13:00:02] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[13:00:02] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[13:00:02] [PASSED] single_pixel_source_buffer
[13:00:02] [PASSED] single_pixel_clip_rectangle
[13:00:02] [PASSED] well_known_colors
[13:00:02] [PASSED] destination_pitch
[13:00:02] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[13:00:02] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[13:00:02] [PASSED] single_pixel_source_buffer
[13:00:02] [PASSED] single_pixel_clip_rectangle
[13:00:02] [PASSED] well_known_colors
[13:00:02] [PASSED] destination_pitch
[13:00:02] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[13:00:02] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[13:00:02] [PASSED] single_pixel_source_buffer
[13:00:02] [PASSED] single_pixel_clip_rectangle
[13:00:02] [PASSED] well_known_colors
[13:00:02] [PASSED] destination_pitch
[13:00:02] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[13:00:02] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[13:00:02] [PASSED] single_pixel_source_buffer
[13:00:02] [PASSED] single_pixel_clip_rectangle
[13:00:02] [PASSED] well_known_colors
[13:00:02] [PASSED] destination_pitch
[13:00:02] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[13:00:02] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[13:00:02] [PASSED] single_pixel_source_buffer
[13:00:02] [PASSED] single_pixel_clip_rectangle
[13:00:02] [PASSED] well_known_colors
[13:00:02] [PASSED] destination_pitch
[13:00:02] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[13:00:02] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[13:00:02] [PASSED] single_pixel_source_buffer
[13:00:02] [PASSED] single_pixel_clip_rectangle
[13:00:02] [PASSED] well_known_colors
[13:00:02] [PASSED] destination_pitch
[13:00:02] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[13:00:02] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[13:00:02] [PASSED] single_pixel_source_buffer
[13:00:02] [PASSED] single_pixel_clip_rectangle
[13:00:02] [PASSED] well_known_colors
[13:00:02] [PASSED] destination_pitch
[13:00:02] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[13:00:02] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[13:00:02] [PASSED] single_pixel_source_buffer
[13:00:02] [PASSED] single_pixel_clip_rectangle
[13:00:02] [PASSED] well_known_colors
[13:00:02] [PASSED] destination_pitch
[13:00:02] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[13:00:02] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[13:00:02] [PASSED] single_pixel_source_buffer
[13:00:02] [PASSED] single_pixel_clip_rectangle
[13:00:02] [PASSED] well_known_colors
[13:00:02] [PASSED] destination_pitch
[13:00:02] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[13:00:02] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[13:00:02] [PASSED] single_pixel_source_buffer
[13:00:02] [PASSED] single_pixel_clip_rectangle
[13:00:02] [PASSED] well_known_colors
[13:00:02] [PASSED] destination_pitch
[13:00:02] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[13:00:02] ============== drm_test_fb_xrgb8888_to_mono ===============
[13:00:02] [PASSED] single_pixel_source_buffer
[13:00:02] [PASSED] single_pixel_clip_rectangle
[13:00:02] [PASSED] well_known_colors
[13:00:02] [PASSED] destination_pitch
[13:00:02] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[13:00:02] ==================== drm_test_fb_swab =====================
[13:00:02] [PASSED] single_pixel_source_buffer
[13:00:02] [PASSED] single_pixel_clip_rectangle
[13:00:02] [PASSED] well_known_colors
[13:00:02] [PASSED] destination_pitch
[13:00:02] ================ [PASSED] drm_test_fb_swab =================
[13:00:02] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[13:00:02] [PASSED] single_pixel_source_buffer
[13:00:02] [PASSED] single_pixel_clip_rectangle
[13:00:02] [PASSED] well_known_colors
[13:00:02] [PASSED] destination_pitch
[13:00:02] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[13:00:02] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[13:00:02] [PASSED] single_pixel_source_buffer
[13:00:02] [PASSED] single_pixel_clip_rectangle
[13:00:02] [PASSED] well_known_colors
[13:00:02] [PASSED] destination_pitch
[13:00:02] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[13:00:02] ================= drm_test_fb_clip_offset =================
[13:00:02] [PASSED] pass through
[13:00:02] [PASSED] horizontal offset
[13:00:02] [PASSED] vertical offset
[13:00:02] [PASSED] horizontal and vertical offset
[13:00:02] [PASSED] horizontal offset (custom pitch)
[13:00:02] [PASSED] vertical offset (custom pitch)
[13:00:02] [PASSED] horizontal and vertical offset (custom pitch)
[13:00:02] ============= [PASSED] drm_test_fb_clip_offset =============
[13:00:02] =================== drm_test_fb_memcpy ====================
[13:00:02] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[13:00:02] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[13:00:02] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[13:00:02] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[13:00:02] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[13:00:02] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[13:00:02] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[13:00:02] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[13:00:02] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[13:00:02] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[13:00:02] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[13:00:02] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[13:00:02] =============== [PASSED] drm_test_fb_memcpy ================
[13:00:02] ============= [PASSED] drm_format_helper_test ==============
[13:00:02] ================= drm_format (18 subtests) =================
[13:00:02] [PASSED] drm_test_format_block_width_invalid
[13:00:02] [PASSED] drm_test_format_block_width_one_plane
[13:00:02] [PASSED] drm_test_format_block_width_two_plane
[13:00:02] [PASSED] drm_test_format_block_width_three_plane
[13:00:02] [PASSED] drm_test_format_block_width_tiled
[13:00:02] [PASSED] drm_test_format_block_height_invalid
[13:00:02] [PASSED] drm_test_format_block_height_one_plane
[13:00:02] [PASSED] drm_test_format_block_height_two_plane
[13:00:02] [PASSED] drm_test_format_block_height_three_plane
[13:00:02] [PASSED] drm_test_format_block_height_tiled
[13:00:02] [PASSED] drm_test_format_min_pitch_invalid
[13:00:02] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[13:00:02] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[13:00:02] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[13:00:02] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[13:00:02] [PASSED] drm_test_format_min_pitch_two_plane
[13:00:02] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[13:00:02] [PASSED] drm_test_format_min_pitch_tiled
[13:00:02] =================== [PASSED] drm_format ====================
[13:00:02] ============== drm_framebuffer (10 subtests) ===============
[13:00:02] ========== drm_test_framebuffer_check_src_coords ==========
[13:00:02] [PASSED] Success: source fits into fb
[13:00:02] [PASSED] Fail: overflowing fb with x-axis coordinate
[13:00:02] [PASSED] Fail: overflowing fb with y-axis coordinate
[13:00:02] [PASSED] Fail: overflowing fb with source width
[13:00:02] [PASSED] Fail: overflowing fb with source height
[13:00:02] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[13:00:02] [PASSED] drm_test_framebuffer_cleanup
[13:00:02] =============== drm_test_framebuffer_create ===============
[13:00:02] [PASSED] ABGR8888 normal sizes
[13:00:02] [PASSED] ABGR8888 max sizes
[13:00:02] [PASSED] ABGR8888 pitch greater than min required
[13:00:02] [PASSED] ABGR8888 pitch less than min required
[13:00:02] [PASSED] ABGR8888 Invalid width
[13:00:02] [PASSED] ABGR8888 Invalid buffer handle
[13:00:02] [PASSED] No pixel format
[13:00:02] [PASSED] ABGR8888 Width 0
[13:00:02] [PASSED] ABGR8888 Height 0
[13:00:02] [PASSED] ABGR8888 Out of bound height * pitch combination
[13:00:02] [PASSED] ABGR8888 Large buffer offset
[13:00:02] [PASSED] ABGR8888 Buffer offset for inexistent plane
[13:00:02] [PASSED] ABGR8888 Invalid flag
[13:00:02] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[13:00:02] [PASSED] ABGR8888 Valid buffer modifier
[13:00:02] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[13:00:02] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[13:00:02] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[13:00:02] [PASSED] NV12 Normal sizes
[13:00:02] [PASSED] NV12 Max sizes
[13:00:02] [PASSED] NV12 Invalid pitch
[13:00:02] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[13:00:02] [PASSED] NV12 different modifier per-plane
[13:00:02] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[13:00:02] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[13:00:02] [PASSED] NV12 Modifier for inexistent plane
[13:00:02] [PASSED] NV12 Handle for inexistent plane
[13:00:02] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[13:00:02] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[13:00:02] [PASSED] YVU420 Normal sizes
[13:00:02] [PASSED] YVU420 Max sizes
[13:00:02] [PASSED] YVU420 Invalid pitch
[13:00:02] [PASSED] YVU420 Different pitches
[13:00:02] [PASSED] YVU420 Different buffer offsets/pitches
[13:00:02] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[13:00:02] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[13:00:02] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[13:00:02] [PASSED] YVU420 Valid modifier
[13:00:02] [PASSED] YVU420 Different modifiers per plane
[13:00:02] [PASSED] YVU420 Modifier for inexistent plane
[13:00:02] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[13:00:02] [PASSED] X0L2 Normal sizes
[13:00:02] [PASSED] X0L2 Max sizes
[13:00:02] [PASSED] X0L2 Invalid pitch
[13:00:02] [PASSED] X0L2 Pitch greater than minimum required
[13:00:02] [PASSED] X0L2 Handle for inexistent plane
[13:00:02] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[13:00:02] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[13:00:02] [PASSED] X0L2 Valid modifier
[13:00:02] [PASSED] X0L2 Modifier for inexistent plane
[13:00:02] =========== [PASSED] drm_test_framebuffer_create ===========
[13:00:02] [PASSED] drm_test_framebuffer_free
[13:00:02] [PASSED] drm_test_framebuffer_init
[13:00:02] [PASSED] drm_test_framebuffer_init_bad_format
[13:00:02] [PASSED] drm_test_framebuffer_init_dev_mismatch
[13:00:02] [PASSED] drm_test_framebuffer_lookup
[13:00:02] [PASSED] drm_test_framebuffer_lookup_inexistent
[13:00:02] [PASSED] drm_test_framebuffer_modifiers_not_supported
[13:00:02] ================= [PASSED] drm_framebuffer =================
[13:00:02] ================ drm_gem_shmem (8 subtests) ================
[13:00:02] [PASSED] drm_gem_shmem_test_obj_create
[13:00:02] [PASSED] drm_gem_shmem_test_obj_create_private
[13:00:02] [PASSED] drm_gem_shmem_test_pin_pages
[13:00:02] [PASSED] drm_gem_shmem_test_vmap
[13:00:02] [PASSED] drm_gem_shmem_test_get_sg_table
[13:00:02] [PASSED] drm_gem_shmem_test_get_pages_sgt
[13:00:02] [PASSED] drm_gem_shmem_test_madvise
[13:00:02] [PASSED] drm_gem_shmem_test_purge
[13:00:02] ================== [PASSED] drm_gem_shmem ==================
[13:00:02] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[13:00:02] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[13:00:02] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[13:00:02] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[13:00:02] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[13:00:02] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[13:00:02] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[13:00:02] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[13:00:02] [PASSED] Automatic
[13:00:02] [PASSED] Full
[13:00:02] [PASSED] Limited 16:235
[13:00:02] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[13:00:02] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[13:00:02] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[13:00:02] [PASSED] drm_test_check_disable_connector
[13:00:02] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[13:00:02] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[13:00:02] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[13:00:02] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[13:00:02] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[13:00:02] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[13:00:02] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[13:00:02] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[13:00:02] [PASSED] drm_test_check_output_bpc_dvi
[13:00:02] [PASSED] drm_test_check_output_bpc_format_vic_1
[13:00:02] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[13:00:02] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[13:00:02] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[13:00:02] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[13:00:02] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[13:00:02] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[13:00:02] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[13:00:02] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[13:00:02] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[13:00:02] [PASSED] drm_test_check_broadcast_rgb_value
[13:00:02] [PASSED] drm_test_check_bpc_8_value
[13:00:02] [PASSED] drm_test_check_bpc_10_value
[13:00:02] [PASSED] drm_test_check_bpc_12_value
[13:00:02] [PASSED] drm_test_check_format_value
[13:00:02] [PASSED] drm_test_check_tmds_char_value
[13:00:02] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[13:00:02] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[13:00:02] [PASSED] drm_test_check_mode_valid
[13:00:02] [PASSED] drm_test_check_mode_valid_reject
[13:00:02] [PASSED] drm_test_check_mode_valid_reject_rate
[13:00:02] [PASSED] drm_test_check_mode_valid_reject_max_clock
[13:00:02] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[13:00:02] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[13:00:02] [PASSED] drm_test_check_infoframes
[13:00:02] [PASSED] drm_test_check_reject_avi_infoframe
[13:00:02] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[13:00:02] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[13:00:02] [PASSED] drm_test_check_reject_audio_infoframe
[13:00:02] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[13:00:02] ================= drm_managed (2 subtests) =================
[13:00:02] [PASSED] drm_test_managed_release_action
[13:00:02] [PASSED] drm_test_managed_run_action
[13:00:02] =================== [PASSED] drm_managed ===================
[13:00:02] =================== drm_mm (6 subtests) ====================
[13:00:02] [PASSED] drm_test_mm_init
[13:00:02] [PASSED] drm_test_mm_debug
[13:00:02] [PASSED] drm_test_mm_align32
[13:00:02] [PASSED] drm_test_mm_align64
[13:00:02] [PASSED] drm_test_mm_lowest
[13:00:02] [PASSED] drm_test_mm_highest
[13:00:02] ===================== [PASSED] drm_mm ======================
[13:00:02] ============= drm_modes_analog_tv (5 subtests) =============
[13:00:02] [PASSED] drm_test_modes_analog_tv_mono_576i
[13:00:02] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[13:00:02] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[13:00:02] [PASSED] drm_test_modes_analog_tv_pal_576i
[13:00:02] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[13:00:02] =============== [PASSED] drm_modes_analog_tv ===============
[13:00:02] ============== drm_plane_helper (2 subtests) ===============
[13:00:02] =============== drm_test_check_plane_state ================
[13:00:02] [PASSED] clipping_simple
[13:00:02] [PASSED] clipping_rotate_reflect
[13:00:02] [PASSED] positioning_simple
[13:00:02] [PASSED] upscaling
[13:00:02] [PASSED] downscaling
[13:00:02] [PASSED] rounding1
[13:00:02] [PASSED] rounding2
[13:00:02] [PASSED] rounding3
[13:00:02] [PASSED] rounding4
[13:00:02] =========== [PASSED] drm_test_check_plane_state ============
[13:00:02] =========== drm_test_check_invalid_plane_state ============
[13:00:02] [PASSED] positioning_invalid
[13:00:02] [PASSED] upscaling_invalid
[13:00:02] [PASSED] downscaling_invalid
[13:00:02] ======= [PASSED] drm_test_check_invalid_plane_state ========
[13:00:02] ================ [PASSED] drm_plane_helper =================
[13:00:02] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[13:00:02] ====== drm_test_connector_helper_tv_get_modes_check =======
[13:00:02] [PASSED] None
[13:00:02] [PASSED] PAL
[13:00:02] [PASSED] NTSC
[13:00:02] [PASSED] Both, NTSC Default
[13:00:02] [PASSED] Both, PAL Default
[13:00:02] [PASSED] Both, NTSC Default, with PAL on command-line
[13:00:02] [PASSED] Both, PAL Default, with NTSC on command-line
[13:00:02] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[13:00:02] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[13:00:02] ================== drm_rect (9 subtests) ===================
[13:00:02] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[13:00:02] [PASSED] drm_test_rect_clip_scaled_not_clipped
[13:00:02] [PASSED] drm_test_rect_clip_scaled_clipped
[13:00:02] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[13:00:02] ================= drm_test_rect_intersect =================
[13:00:02] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[13:00:02] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[13:00:02] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[13:00:02] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[13:00:02] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[13:00:02] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[13:00:02] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[13:00:02] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[13:00:02] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[13:00:02] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[13:00:02] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[13:00:02] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[13:00:02] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[13:00:02] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[13:00:02] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
stty: 'standard input': Inappropriate ioctl for device
[13:00:02] ============= [PASSED] drm_test_rect_intersect =============
[13:00:02] ================ drm_test_rect_calc_hscale ================
[13:00:02] [PASSED] normal use
[13:00:02] [PASSED] out of max range
[13:00:02] [PASSED] out of min range
[13:00:02] [PASSED] zero dst
[13:00:02] [PASSED] negative src
[13:00:02] [PASSED] negative dst
[13:00:02] ============ [PASSED] drm_test_rect_calc_hscale ============
[13:00:02] ================ drm_test_rect_calc_vscale ================
[13:00:02] [PASSED] normal use
[13:00:02] [PASSED] out of max range
[13:00:02] [PASSED] out of min range
[13:00:02] [PASSED] zero dst
[13:00:02] [PASSED] negative src
[13:00:02] [PASSED] negative dst
[13:00:02] ============ [PASSED] drm_test_rect_calc_vscale ============
[13:00:02] ================== drm_test_rect_rotate ===================
[13:00:02] [PASSED] reflect-x
[13:00:02] [PASSED] reflect-y
[13:00:02] [PASSED] rotate-0
[13:00:02] [PASSED] rotate-90
[13:00:02] [PASSED] rotate-180
[13:00:02] [PASSED] rotate-270
[13:00:02] ============== [PASSED] drm_test_rect_rotate ===============
[13:00:02] ================ drm_test_rect_rotate_inv =================
[13:00:02] [PASSED] reflect-x
[13:00:02] [PASSED] reflect-y
[13:00:02] [PASSED] rotate-0
[13:00:02] [PASSED] rotate-90
[13:00:02] [PASSED] rotate-180
[13:00:02] [PASSED] rotate-270
[13:00:02] ============ [PASSED] drm_test_rect_rotate_inv =============
[13:00:02] ==================== [PASSED] drm_rect =====================
[13:00:02] ============ drm_sysfb_modeset_test (1 subtest) ============
[13:00:02] ============ drm_test_sysfb_build_fourcc_list =============
[13:00:02] [PASSED] no native formats
[13:00:02] [PASSED] XRGB8888 as native format
[13:00:02] [PASSED] remove duplicates
[13:00:02] [PASSED] convert alpha formats
[13:00:02] [PASSED] random formats
[13:00:02] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[13:00:02] ============= [PASSED] drm_sysfb_modeset_test ==============
[13:00:02] ================== drm_fixp (2 subtests) ===================
[13:00:02] [PASSED] drm_test_int2fixp
[13:00:02] [PASSED] drm_test_sm2fixp
[13:00:02] ==================== [PASSED] drm_fixp =====================
[13:00:02] ============================================================
[13:00:02] Testing complete. Ran 630 tests: passed: 630
[13:00:02] Elapsed time: 27.406s total, 1.591s configuring, 25.395s building, 0.368s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[13:00:02] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:00:04] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[13:00:14] Starting KUnit Kernel (1/1)...
[13:00:14] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:00:14] ================= ttm_device (5 subtests) ==================
[13:00:14] [PASSED] ttm_device_init_basic
[13:00:14] [PASSED] ttm_device_init_multiple
[13:00:14] [PASSED] ttm_device_fini_basic
[13:00:14] [PASSED] ttm_device_init_no_vma_man
[13:00:14] ================== ttm_device_init_pools ==================
[13:00:14] [PASSED] No DMA allocations, no DMA32 required
[13:00:14] [PASSED] DMA allocations, DMA32 required
[13:00:14] [PASSED] No DMA allocations, DMA32 required
[13:00:14] [PASSED] DMA allocations, no DMA32 required
[13:00:14] ============== [PASSED] ttm_device_init_pools ==============
[13:00:14] =================== [PASSED] ttm_device ====================
[13:00:14] ================== ttm_pool (8 subtests) ===================
[13:00:14] ================== ttm_pool_alloc_basic ===================
[13:00:14] [PASSED] One page
[13:00:14] [PASSED] More than one page
[13:00:14] [PASSED] Above the allocation limit
[13:00:14] [PASSED] One page, with coherent DMA mappings enabled
[13:00:14] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[13:00:14] ============== [PASSED] ttm_pool_alloc_basic ===============
[13:00:14] ============== ttm_pool_alloc_basic_dma_addr ==============
[13:00:14] [PASSED] One page
[13:00:14] [PASSED] More than one page
[13:00:14] [PASSED] Above the allocation limit
[13:00:14] [PASSED] One page, with coherent DMA mappings enabled
[13:00:14] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[13:00:14] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[13:00:14] [PASSED] ttm_pool_alloc_order_caching_match
[13:00:14] [PASSED] ttm_pool_alloc_caching_mismatch
[13:00:14] [PASSED] ttm_pool_alloc_order_mismatch
[13:00:14] [PASSED] ttm_pool_free_dma_alloc
[13:00:14] [PASSED] ttm_pool_free_no_dma_alloc
[13:00:14] [PASSED] ttm_pool_fini_basic
[13:00:14] ==================== [PASSED] ttm_pool =====================
[13:00:14] ================ ttm_resource (8 subtests) =================
[13:00:14] ================= ttm_resource_init_basic =================
[13:00:14] [PASSED] Init resource in TTM_PL_SYSTEM
[13:00:14] [PASSED] Init resource in TTM_PL_VRAM
[13:00:14] [PASSED] Init resource in a private placement
[13:00:14] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[13:00:14] ============= [PASSED] ttm_resource_init_basic =============
[13:00:14] [PASSED] ttm_resource_init_pinned
[13:00:14] [PASSED] ttm_resource_fini_basic
[13:00:14] [PASSED] ttm_resource_manager_init_basic
[13:00:14] [PASSED] ttm_resource_manager_usage_basic
[13:00:14] [PASSED] ttm_resource_manager_set_used_basic
[13:00:14] [PASSED] ttm_sys_man_alloc_basic
[13:00:14] [PASSED] ttm_sys_man_free_basic
[13:00:14] ================== [PASSED] ttm_resource ===================
[13:00:14] =================== ttm_tt (15 subtests) ===================
[13:00:14] ==================== ttm_tt_init_basic ====================
[13:00:14] [PASSED] Page-aligned size
[13:00:14] [PASSED] Extra pages requested
[13:00:14] ================ [PASSED] ttm_tt_init_basic ================
[13:00:14] [PASSED] ttm_tt_init_misaligned
[13:00:14] [PASSED] ttm_tt_fini_basic
[13:00:14] [PASSED] ttm_tt_fini_sg
[13:00:14] [PASSED] ttm_tt_fini_shmem
[13:00:14] [PASSED] ttm_tt_create_basic
[13:00:14] [PASSED] ttm_tt_create_invalid_bo_type
[13:00:14] [PASSED] ttm_tt_create_ttm_exists
[13:00:14] [PASSED] ttm_tt_create_failed
[13:00:14] [PASSED] ttm_tt_destroy_basic
[13:00:14] [PASSED] ttm_tt_populate_null_ttm
[13:00:14] [PASSED] ttm_tt_populate_populated_ttm
[13:00:14] [PASSED] ttm_tt_unpopulate_basic
[13:00:14] [PASSED] ttm_tt_unpopulate_empty_ttm
[13:00:14] [PASSED] ttm_tt_swapin_basic
[13:00:14] ===================== [PASSED] ttm_tt ======================
[13:00:14] =================== ttm_bo (14 subtests) ===================
[13:00:14] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[13:00:14] [PASSED] Cannot be interrupted and sleeps
[13:00:14] [PASSED] Cannot be interrupted, locks straight away
[13:00:14] [PASSED] Can be interrupted, sleeps
[13:00:14] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[13:00:14] [PASSED] ttm_bo_reserve_locked_no_sleep
[13:00:14] [PASSED] ttm_bo_reserve_no_wait_ticket
[13:00:14] [PASSED] ttm_bo_reserve_double_resv
[13:00:14] [PASSED] ttm_bo_reserve_interrupted
[13:00:14] [PASSED] ttm_bo_reserve_deadlock
[13:00:14] [PASSED] ttm_bo_unreserve_basic
[13:00:14] [PASSED] ttm_bo_unreserve_pinned
[13:00:14] [PASSED] ttm_bo_unreserve_bulk
[13:00:14] [PASSED] ttm_bo_fini_basic
[13:00:14] [PASSED] ttm_bo_fini_shared_resv
[13:00:14] [PASSED] ttm_bo_pin_basic
[13:00:14] [PASSED] ttm_bo_pin_unpin_resource
[13:00:14] [PASSED] ttm_bo_multiple_pin_one_unpin
[13:00:14] ===================== [PASSED] ttm_bo ======================
[13:00:14] ============== ttm_bo_validate (21 subtests) ===============
[13:00:14] ============== ttm_bo_init_reserved_sys_man ===============
[13:00:14] [PASSED] Buffer object for userspace
[13:00:14] [PASSED] Kernel buffer object
[13:00:14] [PASSED] Shared buffer object
[13:00:14] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[13:00:14] ============== ttm_bo_init_reserved_mock_man ==============
[13:00:14] [PASSED] Buffer object for userspace
[13:00:14] [PASSED] Kernel buffer object
[13:00:14] [PASSED] Shared buffer object
[13:00:14] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[13:00:14] [PASSED] ttm_bo_init_reserved_resv
[13:00:14] ================== ttm_bo_validate_basic ==================
[13:00:14] [PASSED] Buffer object for userspace
[13:00:14] [PASSED] Kernel buffer object
[13:00:14] [PASSED] Shared buffer object
[13:00:14] ============== [PASSED] ttm_bo_validate_basic ==============
[13:00:14] [PASSED] ttm_bo_validate_invalid_placement
[13:00:14] ============= ttm_bo_validate_same_placement ==============
[13:00:14] [PASSED] System manager
[13:00:14] [PASSED] VRAM manager
[13:00:14] ========= [PASSED] ttm_bo_validate_same_placement ==========
[13:00:14] [PASSED] ttm_bo_validate_failed_alloc
[13:00:14] [PASSED] ttm_bo_validate_pinned
[13:00:14] [PASSED] ttm_bo_validate_busy_placement
[13:00:14] ================ ttm_bo_validate_multihop =================
[13:00:14] [PASSED] Buffer object for userspace
[13:00:14] [PASSED] Kernel buffer object
[13:00:14] [PASSED] Shared buffer object
[13:00:14] ============ [PASSED] ttm_bo_validate_multihop =============
[13:00:14] ========== ttm_bo_validate_no_placement_signaled ==========
[13:00:14] [PASSED] Buffer object in system domain, no page vector
[13:00:14] [PASSED] Buffer object in system domain with an existing page vector
[13:00:14] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[13:00:14] ======== ttm_bo_validate_no_placement_not_signaled ========
[13:00:14] [PASSED] Buffer object for userspace
[13:00:14] [PASSED] Kernel buffer object
[13:00:14] [PASSED] Shared buffer object
[13:00:14] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[13:00:14] [PASSED] ttm_bo_validate_move_fence_signaled
[13:00:14] ========= ttm_bo_validate_move_fence_not_signaled =========
[13:00:14] [PASSED] Waits for GPU
[13:00:14] [PASSED] Tries to lock straight away
[13:00:14] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[13:00:14] [PASSED] ttm_bo_validate_happy_evict
[13:00:14] [PASSED] ttm_bo_validate_all_pinned_evict
[13:00:14] [PASSED] ttm_bo_validate_allowed_only_evict
[13:00:14] [PASSED] ttm_bo_validate_deleted_evict
[13:00:14] [PASSED] ttm_bo_validate_busy_domain_evict
[13:00:14] [PASSED] ttm_bo_validate_evict_gutting
[13:00:14] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[13:00:14] ================= [PASSED] ttm_bo_validate =================
[13:00:14] ============================================================
[13:00:14] Testing complete. Ran 101 tests: passed: 101
[13:00:14] Elapsed time: 11.521s total, 1.686s configuring, 9.569s building, 0.227s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 11+ messages in thread* ✗ Xe.CI.BAT: failure for drm/xe: Enable ATS.
2026-01-26 12:52 [RFC PATCH 0/3] drm/xe: Enable ATS Maarten Lankhorst
` (4 preceding siblings ...)
2026-01-26 13:00 ` ✓ CI.KUnit: success " Patchwork
@ 2026-01-26 13:38 ` Patchwork
2026-01-26 14:32 ` ✗ Xe.CI.Full: " Patchwork
` (2 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2026-01-26 13:38 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 3224 bytes --]
== Series Details ==
Series: drm/xe: Enable ATS.
URL : https://patchwork.freedesktop.org/series/160645/
State : failure
== Summary ==
CI Bug Log - changes from xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b_BAT -> xe-pw-160645v1_BAT
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-160645v1_BAT absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-160645v1_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (12 -> 6)
------------------------------
Missing (6): bat-bmg-1 bat-lnl-2 bat-lnl-1 bat-atsm-2 bat-bmg-3 bat-bmg-2
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-160645v1_BAT:
### IGT changes ###
#### Possible regressions ####
* igt@xe_module_load@load:
- bat-ptl-2: [PASS][1] -> [ABORT][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/bat-ptl-2/igt@xe_module_load@load.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/bat-ptl-2/igt@xe_module_load@load.html
- bat-dg2-oem2: [PASS][3] -> [ABORT][4]
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/bat-dg2-oem2/igt@xe_module_load@load.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/bat-dg2-oem2/igt@xe_module_load@load.html
- bat-adlp-vm: [PASS][5] -> [ABORT][6]
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/bat-adlp-vm/igt@xe_module_load@load.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/bat-adlp-vm/igt@xe_module_load@load.html
- bat-ptl-1: [PASS][7] -> [ABORT][8]
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/bat-ptl-1/igt@xe_module_load@load.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/bat-ptl-1/igt@xe_module_load@load.html
- bat-ptl-vm: [PASS][9] -> [ABORT][10]
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/bat-ptl-vm/igt@xe_module_load@load.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/bat-ptl-vm/igt@xe_module_load@load.html
- bat-adlp-7: [PASS][11] -> [ABORT][12]
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/bat-adlp-7/igt@xe_module_load@load.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/bat-adlp-7/igt@xe_module_load@load.html
Build changes
-------------
* IGT: IGT_8716 -> IGT_8717
* Linux: xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b -> xe-pw-160645v1
IGT_8716: 8716
IGT_8717: 8717
xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b: 6d7af7c5b6b121d5595b64be7dfcbf33be53287b
xe-pw-160645v1: 160645v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/index.html
[-- Attachment #2: Type: text/html, Size: 3857 bytes --]
^ permalink raw reply [flat|nested] 11+ messages in thread* ✗ Xe.CI.Full: failure for drm/xe: Enable ATS.
2026-01-26 12:52 [RFC PATCH 0/3] drm/xe: Enable ATS Maarten Lankhorst
` (5 preceding siblings ...)
2026-01-26 13:38 ` ✗ Xe.CI.BAT: failure " Patchwork
@ 2026-01-26 14:32 ` Patchwork
2026-01-26 23:23 ` [RFC PATCH 0/3] " Matthew Brost
2026-01-27 8:01 ` ✗ Xe.CI.BAT: failure for " Patchwork
8 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2026-01-26 14:32 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 15837 bytes --]
== Series Details ==
Series: drm/xe: Enable ATS.
URL : https://patchwork.freedesktop.org/series/160645/
State : failure
== Summary ==
CI Bug Log - changes from xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b_FULL -> xe-pw-160645v1_FULL
====================================================
Summary
-------
**WARNING**
Minor unknown changes coming with xe-pw-160645v1_FULL need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-160645v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-160645v1_FULL:
### IGT changes ###
#### Warnings ####
* igt@xe_module_load@load:
- shard-lnl: ([PASS][1], [PASS][2], [SKIP][3], [PASS][4], [PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26]) ([Intel XE#378]) -> ([DMESG-WARN][27], [DMESG-WARN][28], [DMESG-WARN][29], [DMESG-WARN][30], [DMESG-WARN][31], [DMESG-WARN][32], [DMESG-WARN][33], [DMESG-WARN][34], [DMESG-WARN][35], [DMESG-WARN][36], [DMESG-WARN][37], [DMESG-WARN][38], [DMESG-WARN][39], [DMESG-WARN][40], [DMESG-WARN][41], [DMESG-WARN][42], [DMESG-WARN][43], [DMESG-WARN][44], [DMESG-WARN][45], [DMESG-WARN][46], [DMESG-WARN][47], [DMESG-WARN][48], [DMESG-WARN][49], [DMESG-WARN][50], [DMESG-WARN][51])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-lnl-1/igt@xe_module_load@load.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-lnl-4/igt@xe_module_load@load.html
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-lnl-2/igt@xe_module_load@load.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-lnl-5/igt@xe_module_load@load.html
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-lnl-2/igt@xe_module_load@load.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-lnl-2/igt@xe_module_load@load.html
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-lnl-5/igt@xe_module_load@load.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-lnl-8/igt@xe_module_load@load.html
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-lnl-4/igt@xe_module_load@load.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-lnl-4/igt@xe_module_load@load.html
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-lnl-3/igt@xe_module_load@load.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-lnl-2/igt@xe_module_load@load.html
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-lnl-4/igt@xe_module_load@load.html
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-lnl-8/igt@xe_module_load@load.html
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-lnl-7/igt@xe_module_load@load.html
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-lnl-7/igt@xe_module_load@load.html
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-lnl-8/igt@xe_module_load@load.html
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-lnl-1/igt@xe_module_load@load.html
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-lnl-1/igt@xe_module_load@load.html
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-lnl-3/igt@xe_module_load@load.html
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-lnl-3/igt@xe_module_load@load.html
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-lnl-5/igt@xe_module_load@load.html
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-lnl-7/igt@xe_module_load@load.html
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-lnl-1/igt@xe_module_load@load.html
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-lnl-7/igt@xe_module_load@load.html
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-lnl-5/igt@xe_module_load@load.html
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-lnl-1/igt@xe_module_load@load.html
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-lnl-1/igt@xe_module_load@load.html
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-lnl-1/igt@xe_module_load@load.html
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-lnl-1/igt@xe_module_load@load.html
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-lnl-8/igt@xe_module_load@load.html
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-lnl-8/igt@xe_module_load@load.html
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-lnl-8/igt@xe_module_load@load.html
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-lnl-4/igt@xe_module_load@load.html
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-lnl-4/igt@xe_module_load@load.html
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-lnl-4/igt@xe_module_load@load.html
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-lnl-4/igt@xe_module_load@load.html
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-lnl-3/igt@xe_module_load@load.html
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-lnl-3/igt@xe_module_load@load.html
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-lnl-3/igt@xe_module_load@load.html
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-lnl-3/igt@xe_module_load@load.html
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-lnl-2/igt@xe_module_load@load.html
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-lnl-2/igt@xe_module_load@load.html
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-lnl-2/igt@xe_module_load@load.html
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-lnl-2/igt@xe_module_load@load.html
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-lnl-7/igt@xe_module_load@load.html
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-lnl-7/igt@xe_module_load@load.html
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-lnl-7/igt@xe_module_load@load.html
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-lnl-5/igt@xe_module_load@load.html
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-lnl-5/igt@xe_module_load@load.html
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-lnl-5/igt@xe_module_load@load.html
- shard-bmg: ([PASS][52], [PASS][53], [PASS][54], [PASS][55], [PASS][56], [PASS][57], [SKIP][58], [PASS][59], [PASS][60], [PASS][61], [PASS][62], [PASS][63], [PASS][64], [PASS][65], [PASS][66], [PASS][67], [PASS][68], [PASS][69], [PASS][70], [PASS][71], [PASS][72], [PASS][73], [PASS][74], [PASS][75], [PASS][76], [PASS][77]) ([Intel XE#2457]) -> ([DMESG-WARN][78], [DMESG-WARN][79], [DMESG-WARN][80], [DMESG-WARN][81], [DMESG-WARN][82], [DMESG-WARN][83], [DMESG-WARN][84], [DMESG-WARN][85], [DMESG-WARN][86], [DMESG-WARN][87], [DMESG-WARN][88], [DMESG-WARN][89], [DMESG-WARN][90], [DMESG-WARN][91], [DMESG-WARN][92], [DMESG-WARN][93], [DMESG-WARN][94], [DMESG-WARN][95], [DMESG-WARN][96], [DMESG-WARN][97], [DMESG-WARN][98], [DMESG-WARN][99], [DMESG-WARN][100], [DMESG-WARN][101], [DMESG-WARN][102])
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-1/igt@xe_module_load@load.html
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-9/igt@xe_module_load@load.html
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-4/igt@xe_module_load@load.html
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-7/igt@xe_module_load@load.html
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-7/igt@xe_module_load@load.html
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-7/igt@xe_module_load@load.html
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-3/igt@xe_module_load@load.html
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-4/igt@xe_module_load@load.html
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-9/igt@xe_module_load@load.html
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-2/igt@xe_module_load@load.html
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-2/igt@xe_module_load@load.html
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-2/igt@xe_module_load@load.html
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-2/igt@xe_module_load@load.html
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-4/igt@xe_module_load@load.html
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-8/igt@xe_module_load@load.html
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-8/igt@xe_module_load@load.html
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-10/igt@xe_module_load@load.html
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-10/igt@xe_module_load@load.html
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-9/igt@xe_module_load@load.html
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-1/igt@xe_module_load@load.html
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-10/igt@xe_module_load@load.html
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-1/igt@xe_module_load@load.html
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-3/igt@xe_module_load@load.html
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-3/igt@xe_module_load@load.html
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-10/igt@xe_module_load@load.html
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-3/igt@xe_module_load@load.html
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-bmg-4/igt@xe_module_load@load.html
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-bmg-4/igt@xe_module_load@load.html
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-bmg-4/igt@xe_module_load@load.html
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-bmg-8/igt@xe_module_load@load.html
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-bmg-8/igt@xe_module_load@load.html
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-bmg-10/igt@xe_module_load@load.html
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-bmg-10/igt@xe_module_load@load.html
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-bmg-10/igt@xe_module_load@load.html
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-bmg-10/igt@xe_module_load@load.html
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-bmg-10/igt@xe_module_load@load.html
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-bmg-1/igt@xe_module_load@load.html
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-bmg-7/igt@xe_module_load@load.html
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-bmg-7/igt@xe_module_load@load.html
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-bmg-7/igt@xe_module_load@load.html
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-bmg-7/igt@xe_module_load@load.html
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-bmg-9/igt@xe_module_load@load.html
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-bmg-9/igt@xe_module_load@load.html
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-bmg-9/igt@xe_module_load@load.html
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-bmg-9/igt@xe_module_load@load.html
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-bmg-2/igt@xe_module_load@load.html
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-bmg-2/igt@xe_module_load@load.html
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-bmg-2/igt@xe_module_load@load.html
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-bmg-2/igt@xe_module_load@load.html
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-bmg-2/igt@xe_module_load@load.html
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/shard-bmg-3/igt@xe_module_load@load.html
[Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
[Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
Build changes
-------------
* IGT: IGT_8716 -> IGT_8717
* Linux: xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b -> xe-pw-160645v1
IGT_8716: 8716
IGT_8717: 8717
xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b: 6d7af7c5b6b121d5595b64be7dfcbf33be53287b
xe-pw-160645v1: 160645v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/index.html
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^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [RFC PATCH 0/3] drm/xe: Enable ATS.
2026-01-26 12:52 [RFC PATCH 0/3] drm/xe: Enable ATS Maarten Lankhorst
` (6 preceding siblings ...)
2026-01-26 14:32 ` ✗ Xe.CI.Full: " Patchwork
@ 2026-01-26 23:23 ` Matthew Brost
2026-01-27 8:01 ` ✗ Xe.CI.BAT: failure for " Patchwork
8 siblings, 0 replies; 11+ messages in thread
From: Matthew Brost @ 2026-01-26 23:23 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-xe
On Mon, Jan 26, 2026 at 01:52:04PM +0100, Maarten Lankhorst wrote:
> RFC since I believe while the patches work, it might need some help to
> validate the semantics, and whether we want to set ATS unconditionally.
>
I think it would be good to perf numbers of various benchmarks /
workloads to determine the impact of ATS, plus maybe Kconfig / configfs
knob or something to toggle this for quick experiments.
Patches themselve make sense to me.
Matt
> Add the relevant wiring to enable the ATS flag in PASID, and add a minimal
> selftest to validate ATS works and doesn't break on the first access to
> system memory.
>
> Last patch is untested, hope to see what CI thinks. :-)
>
> Maarten Lankhorst (3):
> drm/xe: Force page fault
> drm/xe: Set the bits in PASID to enable ATS.
> drm/xe: Add migration selftest for validating job submission and basic
> features work
>
> drivers/gpu/drm/xe/regs/xe_gtt_defs.h | 1 +
> drivers/gpu/drm/xe/regs/xe_lrc_layout.h | 1 +
> drivers/gpu/drm/xe/xe_device.c | 7 ++++
> drivers/gpu/drm/xe/xe_lrc.c | 6 ++++
> drivers/gpu/drm/xe/xe_migrate.c | 46 +++++++++++++++++++++++++
> drivers/gpu/drm/xe/xe_migrate.h | 1 +
> drivers/gpu/drm/xe/xe_pt.c | 36 ++++++++++---------
> 7 files changed, 82 insertions(+), 16 deletions(-)
>
> --
> 2.51.0
>
^ permalink raw reply [flat|nested] 11+ messages in thread* ✗ Xe.CI.BAT: failure for drm/xe: Enable ATS.
2026-01-26 12:52 [RFC PATCH 0/3] drm/xe: Enable ATS Maarten Lankhorst
` (7 preceding siblings ...)
2026-01-26 23:23 ` [RFC PATCH 0/3] " Matthew Brost
@ 2026-01-27 8:01 ` Patchwork
8 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2026-01-27 8:01 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 3224 bytes --]
== Series Details ==
Series: drm/xe: Enable ATS.
URL : https://patchwork.freedesktop.org/series/160645/
State : failure
== Summary ==
CI Bug Log - changes from xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b_BAT -> xe-pw-160645v1_BAT
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-160645v1_BAT absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-160645v1_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (12 -> 6)
------------------------------
Missing (6): bat-bmg-1 bat-lnl-2 bat-lnl-1 bat-atsm-2 bat-bmg-3 bat-bmg-2
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-160645v1_BAT:
### IGT changes ###
#### Possible regressions ####
* igt@xe_module_load@load:
- bat-ptl-2: [PASS][1] -> [ABORT][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/bat-ptl-2/igt@xe_module_load@load.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/bat-ptl-2/igt@xe_module_load@load.html
- bat-dg2-oem2: [PASS][3] -> [ABORT][4]
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/bat-dg2-oem2/igt@xe_module_load@load.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/bat-dg2-oem2/igt@xe_module_load@load.html
- bat-adlp-vm: [PASS][5] -> [ABORT][6]
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/bat-adlp-vm/igt@xe_module_load@load.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/bat-adlp-vm/igt@xe_module_load@load.html
- bat-ptl-1: [PASS][7] -> [ABORT][8]
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/bat-ptl-1/igt@xe_module_load@load.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/bat-ptl-1/igt@xe_module_load@load.html
- bat-ptl-vm: [PASS][9] -> [ABORT][10]
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/bat-ptl-vm/igt@xe_module_load@load.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/bat-ptl-vm/igt@xe_module_load@load.html
- bat-adlp-7: [PASS][11] -> [ABORT][12]
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/bat-adlp-7/igt@xe_module_load@load.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/bat-adlp-7/igt@xe_module_load@load.html
Build changes
-------------
* IGT: IGT_8716 -> IGT_8717
* Linux: xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b -> xe-pw-160645v1
IGT_8716: 8716
IGT_8717: 8717
xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b: 6d7af7c5b6b121d5595b64be7dfcbf33be53287b
xe-pw-160645v1: 160645v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160645v1/index.html
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^ permalink raw reply [flat|nested] 11+ messages in thread