[PATCH 00/17] Account for DSC bubble overhead for horizontal slices

[Ankit Nautiyal <ankit.k.nautiyal@intel.com>]

When DSC is enabled on a pipe, the pipe pixel rate input to cdclk frequency
and pipe joiner calculations needs to be adjusted to account for
compression overhead: specifically, the "bubbles" added at each horizontal
slice boundary. This overhead has always existed, even on earlier
platforms, but was not previously accounted for.

Currently, the number of joined pipes is computed much earlier than the
decision to use DSC: both during the mode_valid phase for each mode and in
the compute_config phase for a given mode. As a result, the DSC bubble
overhead cannot be considered when determining the number of pipes to join,
which may lead to incorrect configurations.

This series refactors the sequence of steps used to determine the number of
pipes to be joined and the DSC policy. The first few patches restructure
the mode_valid and compute config logic to make room for DSC bubble
overhead accounting. With these, we iterate over joiner candidates and
select the minimal joiner configuration that satisfies the
mode-requirements. The later patches introduce the actual overhead
adjustment and use it for: the minimum cdclk requirements with DSC,
SST mode_valid logic, and SST/MST compute_config logic.

Rev 2:
 - Refactor joiner computation for compute config.
 - Refactor DSC BW calculation.
 - Add overhead for SST/MST compute config phase for recomputing joiner
   requirements for DSC.
 - NOTE:
   - For Patch#7 (drm/i915/dp: Rework pipe joiner logic in mode_valid)
     git diff = --patience is used for better readability.

Rev 3:
 - Use diff = --patience in format-patch for better readability.
 - Add a macro to iterate over the joiner candidates.
 - Add a separate helper to check pixel rate against dotclock limit.
 - Add patch from Chaitanya for additional platform specific
   limitations [1].

[1] https://patchwork.freedesktop.org/patch/661952/?series=151047&rev=1

Rev 4:
 - Address review comments from Jani and Imre.
 - Drop enum for joiner candidates and iterate over num of pipes joined.
 - Rename some of the helpers.
 - Split the patch to check for pixel limit for max uncompressed
   dotclock into PTL and other platforms. For PTL the bspec and HSDES
   matches, but for other platforms need to confirm the need for the
   limits.

Rev 5:
 - Address comments from Imre.
 - Add a patch to remove joiner helpers that are no longer required.
 - Dropped the patch to replace the joiner loops with an iterator; will
   follow up this separately.
 - Modified the patch to enforce pixel limit for max uncomprssed
   dotclock for pre PTL platforms, and added the limit only for WCL.
   Limits for prior platforms is intentionally left to avoid regression
   on these platforms and deal with them if there are actual issues
   reported.
 - Use diff = --histogram as its seen to work better for this series as
   also suggested by Imre.

Rev 6:
 - Address comments from Imre.
 - Re-add the patch to replace the joiner loops with iterator; [credits to
   Imre to figure it out and for the suggested changes.]

Ankit Nautiyal (15):
  drm/i915/dp: Early reject bad hdisplay in intel_dp_mode_valid
  drm/i915/dp: Move num_joined_pipes and related checks together
  drm/i915/dp: Extract helper to get the hdisplay limit
  drm/i915/dp: Rework pipe joiner logic in mode_valid
  drm/i915/dp: Rework pipe joiner logic in compute_config
  drm/i915/dp_mst: Move the check for dotclock at the end
  drm/i915/dp_mst: Move the joiner dependent code together
  drm/i915/dp_mst: Rework pipe joiner logic in mode_valid
  drm/i915/dp_mst: Extract helper to compute link for given joiner
    config
  drm/i915/dp_mst: Rework pipe joiner logic in compute_config
  drm/i915/dp: Remove unused joiner helpers
  drm/i915/dp: Introduce helper to check pixel rate against dotclock
    limits
  drm/i915/dp: Refactor dsc_slice_count handling in
    intel_dp_mode_valid()
  drm/i915/dp: Account for DSC slice overhead
  drm/i915/dp: Add helpers for joiner candidate loops

Chaitanya Kumar Borah (2):
  drm/i915/display: Add upper limit check for pixel clock
  drm/i915/display: Extend the max dotclock limit to WCL

 drivers/gpu/drm/i915/display/intel_display.c |  19 ++
 drivers/gpu/drm/i915/display/intel_display.h |   1 +
 drivers/gpu/drm/i915/display/intel_dp.c      | 312 ++++++++++++-------
 drivers/gpu/drm/i915/display/intel_dp.h      |  19 +-
 drivers/gpu/drm/i915/display/intel_dp_mst.c  | 186 +++++++----
 drivers/gpu/drm/i915/display/intel_vdsc.c    |   1 -
 drivers/gpu/drm/i915/display/intel_vdsc.h    |   3 +
 7 files changed, 367 insertions(+), 174 deletions(-)

-- 
2.45.2