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From: Gustavo Sousa <gustavo.sousa@intel.com>
To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Cc: Gustavo Sousa <gustavo.sousa@intel.com>
Subject: [PATCH 12/16] drm/xe/xe3p_lpg: Enable multi-queue feature
Date: Mon, 02 Feb 2026 18:43:18 -0300	[thread overview]
Message-ID: <20260202-nvl-p-upstreaming-v1-12-653e4ff105dc@intel.com> (raw)
In-Reply-To: <20260202-nvl-p-upstreaming-v1-0-653e4ff105dc@intel.com>

Xe3p_LPG supports multi-queue on both CCS and BCS. Add the necessary
multi_queue_engine_class_mask to enable that feature.

Bspec: 74110
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/xe/xe_pci.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index edca562462fa..9bcf7c067479 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -108,6 +108,7 @@ static const struct xe_graphics_desc graphics_xe2 = {
 
 static const struct xe_graphics_desc graphics_xe3p = {
 	XE2_GFX_FEATURES,
+	.multi_queue_engine_class_mask = BIT(XE_ENGINE_CLASS_COPY) | BIT(XE_ENGINE_CLASS_COMPUTE),
 };
 
 static const struct xe_graphics_desc graphics_xe3p_xpc = {

-- 
2.52.0


  parent reply	other threads:[~2026-02-02 21:44 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-02 21:43 [PATCH 00/16] Basic enabling patches for Xe3p_LPG and NVL-P Gustavo Sousa
2026-02-02 21:43 ` [PATCH 01/16] drm/xe/xe3p_lpg: Add support for graphics IP 35.10 Gustavo Sousa
2026-02-02 22:11   ` Matt Roper
2026-02-02 23:36     ` Matt Roper
2026-02-03 23:53       ` Gustavo Sousa
2026-02-02 21:43 ` [PATCH 02/16] drm/xe/xe3p_lpg: Add initial workarounds for graphics version 35.10 Gustavo Sousa
2026-02-02 22:47   ` Matt Roper
2026-02-04  0:25     ` Gustavo Sousa
2026-02-02 21:43 ` [PATCH 03/16] drm/xe/pat: Differentiate between primary and media for PTA Gustavo Sousa
2026-02-02 22:51   ` Matt Roper
2026-02-02 21:43 ` [PATCH 04/16] drm/xe/xe3p_lpg: Add new PAT table Gustavo Sousa
2026-02-05 17:05   ` Matt Atwood
2026-02-02 21:43 ` [PATCH 05/16] drm/xe/xe3p_lpg: Add MCR steering Gustavo Sousa
2026-02-03 10:32   ` Bhadane, Dnyaneshwar
2026-02-04  0:33     ` Gustavo Sousa
2026-02-06  8:29       ` Bhadane, Dnyaneshwar
2026-02-06 12:38         ` Gustavo Sousa
2026-02-02 21:43 ` [PATCH 06/16] drm/xe/xe3p_lpg: Add LRC parsing for additional RCS engine state Gustavo Sousa
2026-02-05 22:12   ` Matt Atwood
2026-02-02 21:43 ` [PATCH 07/16] drm/xe/xe3p_lpg: Disable reporting of context switch status to GHWSP Gustavo Sousa
2026-02-05 17:31   ` Matt Atwood
2026-02-02 21:43 ` [PATCH 08/16] drm/xe/xe3p_lpg: Drop unnecessary tuning settings Gustavo Sousa
2026-02-05 17:28   ` Matt Atwood
2026-02-02 21:43 ` [PATCH 09/16] drm/xe/xe3p_lpg: Extend 'group ID' mask size Gustavo Sousa
2026-02-04 12:18   ` Bhadane, Dnyaneshwar
2026-02-02 21:43 ` [PATCH 10/16] drm/xe/xe3p_lpg: Update LRC sizes Gustavo Sousa
2026-02-02 23:29   ` Matt Roper
2026-02-02 21:43 ` [PATCH 11/16] drm/xe/xe3p_lpg: Set STLB bank hash mode to 4KB Gustavo Sousa
2026-02-02 23:34   ` Matt Roper
2026-02-02 21:43 ` Gustavo Sousa [this message]
2026-02-02 23:35   ` [PATCH 12/16] drm/xe/xe3p_lpg: Enable multi-queue feature Matt Roper
2026-02-02 21:43 ` [PATCH 13/16] drm/xe/nvlp: Add NVL-P platform definition Gustavo Sousa
2026-02-02 23:48   ` Matt Roper
2026-02-04 12:59     ` Gustavo Sousa
2026-02-04 18:08       ` Matt Roper
2026-02-04 18:36         ` Gustavo Sousa
2026-02-02 21:43 ` [PATCH 14/16] drm/xe/nvlp: Attach MOCS table for nvlp Gustavo Sousa
2026-02-02 23:48   ` Matt Roper
2026-02-02 21:43 ` [PATCH 15/16] drm/i915/nvlp: Hook up display support Gustavo Sousa
2026-02-03  4:19   ` Kandpal, Suraj
2026-02-02 21:43 ` [PATCH 16/16] drm/xe/nvlp: Define GuC firmware for NVL-P Gustavo Sousa
2026-02-02 23:52   ` Matt Roper

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