Intel-XE Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Gustavo Sousa <gustavo.sousa@intel.com>
To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Cc: Gustavo Sousa <gustavo.sousa@intel.com>,
	 Matt Roper <matthew.d.roper@intel.com>
Subject: [PATCH 15/16] drm/i915/nvlp: Hook up display support
Date: Mon, 02 Feb 2026 18:43:21 -0300	[thread overview]
Message-ID: <20260202-nvl-p-upstreaming-v1-15-653e4ff105dc@intel.com> (raw)
In-Reply-To: <20260202-nvl-p-upstreaming-v1-0-653e4ff105dc@intel.com>

From: Matt Roper <matthew.d.roper@intel.com>

Although NVL-S and NVL-P are quite different on the GT side, they use
identical Xe3p_LPD display IP and should take all the same codepaths.

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_device.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index 471f236c9ddf..1a7f3ca079e8 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -1500,6 +1500,7 @@ static const struct {
 	INTEL_PTL_IDS(INTEL_DISPLAY_DEVICE, &ptl_desc),
 	INTEL_WCL_IDS(INTEL_DISPLAY_DEVICE, &ptl_desc),
 	INTEL_NVLS_IDS(INTEL_DISPLAY_DEVICE, &nvl_desc),
+	INTEL_NVLP_IDS(INTEL_DISPLAY_DEVICE, &nvl_desc),
 };
 
 static const struct {

-- 
2.52.0


  parent reply	other threads:[~2026-02-02 21:44 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-02 21:43 [PATCH 00/16] Basic enabling patches for Xe3p_LPG and NVL-P Gustavo Sousa
2026-02-02 21:43 ` [PATCH 01/16] drm/xe/xe3p_lpg: Add support for graphics IP 35.10 Gustavo Sousa
2026-02-02 22:11   ` Matt Roper
2026-02-02 23:36     ` Matt Roper
2026-02-03 23:53       ` Gustavo Sousa
2026-02-02 21:43 ` [PATCH 02/16] drm/xe/xe3p_lpg: Add initial workarounds for graphics version 35.10 Gustavo Sousa
2026-02-02 22:47   ` Matt Roper
2026-02-04  0:25     ` Gustavo Sousa
2026-02-02 21:43 ` [PATCH 03/16] drm/xe/pat: Differentiate between primary and media for PTA Gustavo Sousa
2026-02-02 22:51   ` Matt Roper
2026-02-02 21:43 ` [PATCH 04/16] drm/xe/xe3p_lpg: Add new PAT table Gustavo Sousa
2026-02-05 17:05   ` Matt Atwood
2026-02-02 21:43 ` [PATCH 05/16] drm/xe/xe3p_lpg: Add MCR steering Gustavo Sousa
2026-02-03 10:32   ` Bhadane, Dnyaneshwar
2026-02-04  0:33     ` Gustavo Sousa
2026-02-06  8:29       ` Bhadane, Dnyaneshwar
2026-02-06 12:38         ` Gustavo Sousa
2026-02-02 21:43 ` [PATCH 06/16] drm/xe/xe3p_lpg: Add LRC parsing for additional RCS engine state Gustavo Sousa
2026-02-05 22:12   ` Matt Atwood
2026-02-02 21:43 ` [PATCH 07/16] drm/xe/xe3p_lpg: Disable reporting of context switch status to GHWSP Gustavo Sousa
2026-02-05 17:31   ` Matt Atwood
2026-02-02 21:43 ` [PATCH 08/16] drm/xe/xe3p_lpg: Drop unnecessary tuning settings Gustavo Sousa
2026-02-05 17:28   ` Matt Atwood
2026-02-02 21:43 ` [PATCH 09/16] drm/xe/xe3p_lpg: Extend 'group ID' mask size Gustavo Sousa
2026-02-04 12:18   ` Bhadane, Dnyaneshwar
2026-02-02 21:43 ` [PATCH 10/16] drm/xe/xe3p_lpg: Update LRC sizes Gustavo Sousa
2026-02-02 23:29   ` Matt Roper
2026-02-02 21:43 ` [PATCH 11/16] drm/xe/xe3p_lpg: Set STLB bank hash mode to 4KB Gustavo Sousa
2026-02-02 23:34   ` Matt Roper
2026-02-02 21:43 ` [PATCH 12/16] drm/xe/xe3p_lpg: Enable multi-queue feature Gustavo Sousa
2026-02-02 23:35   ` Matt Roper
2026-02-02 21:43 ` [PATCH 13/16] drm/xe/nvlp: Add NVL-P platform definition Gustavo Sousa
2026-02-02 23:48   ` Matt Roper
2026-02-04 12:59     ` Gustavo Sousa
2026-02-04 18:08       ` Matt Roper
2026-02-04 18:36         ` Gustavo Sousa
2026-02-02 21:43 ` [PATCH 14/16] drm/xe/nvlp: Attach MOCS table for nvlp Gustavo Sousa
2026-02-02 23:48   ` Matt Roper
2026-02-02 21:43 ` Gustavo Sousa [this message]
2026-02-03  4:19   ` [PATCH 15/16] drm/i915/nvlp: Hook up display support Kandpal, Suraj
2026-02-02 21:43 ` [PATCH 16/16] drm/xe/nvlp: Define GuC firmware for NVL-P Gustavo Sousa
2026-02-02 23:52   ` Matt Roper

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260202-nvl-p-upstreaming-v1-15-653e4ff105dc@intel.com \
    --to=gustavo.sousa@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=intel-xe@lists.freedesktop.org \
    --cc=matthew.d.roper@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox