[PATCH v2 0/2] GuC CT memory optimizations

[Matthew Brost <matthew.brost@intel.com>]

Profiling has shown that reading from VRAM on BMG is very slow and
introduces significant latency in GuC CT operations. To address this,
CPU-side read buffers (G2H) are moved to system memory, and unnecessary
CPU reads of VRAM in hot paths are removed. This is marked as a fixes
change due to the dramatic improvement in G2H performance, which affects
hot paths such as TLB invalidation fences and fault-storm handling.

We likely have similar issues in hardware fence signaling paths that
currently read from VRAM. A follow-up will move the LRC fence seqno (and
possibly other CPU-side LRC reads) to system memory as well.

v2:
 - Fix devcoredump explosion (Testing)

Matt

Matthew Brost (2):
  drm/xe: Split H2G and G2H into separate buffer objects
  drm/xe: Remove H2G reads in CT send path in non-debug builds

 drivers/gpu/drm/xe/xe_guc_ct.c       | 80 ++++++++++++++++++----------
 drivers/gpu/drm/xe/xe_guc_ct_types.h |  6 ++-
 2 files changed, 55 insertions(+), 31 deletions(-)

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2.34.1