[PATCH v2 00/19] drm/i915/overlay: Convert to parent interface

[PATCH v2 00/19] drm/i915/overlay: Convert to parent interface

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Split the overlay code into i915 vs. display parts and introduce
and new parent interface for the display->i915 calls.

The interface is rather verbose due to the interruptible ioctl
design of the overlay code. Ideally we'd implement the overlay
as a drm plane and tell it to flip via MMIO writes to OVADD,
at which point the parent interface could be limited to just
two functions to repartition the render cache as needed.
Maybe one day...

Smoke tested on i830 and i965gm.

v2: Deal with the IS_ERR() screwup
    Rebase due to kmalloc_obj() & co.

Ville Syrjälä (19):
  drm/i915/overlay: Remove GPU hang snapshot stuff
  drm/i915/overlay: Track current frontbuffer_bits
  drm/i915/overlay: Extract i915_overlay_is_active()
  drm/i915/overlay: Remove redundant overlay->active
  drm/i915/overlay: Relocate the underrun check
  drm/i915/overlay: Introduce i915_overlay_obj_lookup()
  drm/i915/overlay: Use struct drm_gem_object as the type
  drm/i915/overlay: Extract i915_overlay_reset()
  drm/i915/overlay: Extract i915_overlay_setup()
  drm/i915/overlay: Extract i915_overlay_cleanup()
  drm/i915/overlay: Abstract buffer (un)pinning
  drm/i915/overlay: Rename low level i915 specific functions
  drm/i915/overlay: Adjust i915 specific interfaces
  drm/i915/overlay: Make i830_overlay_clock_gating() i915 specific
  drm/i915/overlay: s/dev_priv/i915/
  drm/i915/overlay: Split 'struct intel_overlay'
  drm/i915/overlay: Don't use fetch_and_zero() in display code
  drm/i915/overlay: Move i915 specific code into i915_overlay.c
  drm/i915/overlay: Convert overlay to parent interface

 drivers/gpu/drm/i915/Makefile                 |   1 +
 .../gpu/drm/i915/display/intel_display_regs.h |   2 -
 .../drm/i915/display/intel_display_snapshot.c |   4 -
 drivers/gpu/drm/i915/display/intel_overlay.c  | 584 ++----------------
 drivers/gpu/drm/i915/display/intel_overlay.h  |  48 --
 drivers/gpu/drm/i915/display/intel_parent.c   |  76 +++
 drivers/gpu/drm/i915/display/intel_parent.h   |  26 +
 drivers/gpu/drm/i915/i915_driver.c            |   2 +
 drivers/gpu/drm/i915/i915_drv.h               |   3 +
 drivers/gpu/drm/i915/i915_overlay.c           | 517 ++++++++++++++++
 drivers/gpu/drm/i915/i915_overlay.h           |  11 +
 drivers/gpu/drm/i915/i915_reg.h               |   4 +
 drivers/gpu/drm/xe/Makefile                   |   1 +
 include/drm/intel/display_parent_interface.h  |  33 +
 14 files changed, 726 insertions(+), 586 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/i915_overlay.c
 create mode 100644 drivers/gpu/drm/i915/i915_overlay.h

-- 
2.52.0

[PATCH v2 01/19] drm/i915/overlay: Remove GPU hang snapshot stuff

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

The overlay snapshot stuff is a bit annoying because some of
it more or less of belongs on the gt side, and some on the
display side. Remove the whole thing to avoid having to deal
with it when splitting the overlay code around the i915
vs. display boundary. I don't think I've ever actually used
this for anything, so no real loss from my POV. And it can
always be resurrected later should the need arise.

v2: Rebase due to kmalloc_obj()

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 .../drm/i915/display/intel_display_snapshot.c |  4 -
 drivers/gpu/drm/i915/display/intel_overlay.c  | 89 -------------------
 drivers/gpu/drm/i915/display/intel_overlay.h  | 18 ----
 3 files changed, 111 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_snapshot.c b/drivers/gpu/drm/i915/display/intel_display_snapshot.c
index f650f15ad394..7f423182aa29 100644
--- a/drivers/gpu/drm/i915/display/intel_display_snapshot.c
+++ b/drivers/gpu/drm/i915/display/intel_display_snapshot.c
@@ -19,7 +19,6 @@ struct intel_display_snapshot {
 	struct intel_display_device_info info;
 	struct intel_display_runtime_info runtime_info;
 	struct intel_display_params params;
-	struct intel_overlay_snapshot *overlay;
 	struct intel_dmc_snapshot *dmc;
 	struct intel_display_irq_snapshot *irq;
 };
@@ -41,7 +40,6 @@ struct intel_display_snapshot *intel_display_snapshot_capture(struct intel_displ
 	intel_display_params_copy(&snapshot->params);
 
 	snapshot->irq = intel_display_irq_snapshot_capture(display);
-	snapshot->overlay = intel_overlay_snapshot_capture(display);
 	snapshot->dmc = intel_dmc_snapshot_capture(display);
 
 	return snapshot;
@@ -61,7 +59,6 @@ void intel_display_snapshot_print(const struct intel_display_snapshot *snapshot,
 	intel_display_params_dump(&snapshot->params, display->drm->driver->name, p);
 
 	intel_display_irq_snapshot_print(snapshot->irq, p);
-	intel_overlay_snapshot_print(snapshot->overlay, p);
 	intel_dmc_snapshot_print(snapshot->dmc, p);
 }
 
@@ -73,7 +70,6 @@ void intel_display_snapshot_free(struct intel_display_snapshot *snapshot)
 	intel_display_params_free(&snapshot->params);
 
 	kfree(snapshot->irq);
-	kfree(snapshot->overlay);
 	kfree(snapshot->dmc);
 	kfree(snapshot);
 }
diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
index 9cd368d6ef59..6cea82ecc3ec 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -1464,92 +1464,3 @@ void intel_overlay_cleanup(struct intel_display *display)
 
 	kfree(overlay);
 }
-
-#if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
-
-struct intel_overlay_snapshot {
-	struct overlay_registers regs;
-	unsigned long base;
-	u32 dovsta;
-	u32 isr;
-};
-
-struct intel_overlay_snapshot *
-intel_overlay_snapshot_capture(struct intel_display *display)
-{
-	struct intel_overlay *overlay = display->overlay;
-	struct intel_overlay_snapshot *error;
-
-	if (!overlay || !overlay->active)
-		return NULL;
-
-	error = kmalloc_obj(*error, GFP_ATOMIC);
-	if (error == NULL)
-		return NULL;
-
-	error->dovsta = intel_de_read(display, DOVSTA);
-	error->isr = intel_de_read(display, GEN2_ISR);
-	error->base = overlay->flip_addr;
-
-	memcpy_fromio(&error->regs, overlay->regs, sizeof(error->regs));
-
-	return error;
-}
-
-void
-intel_overlay_snapshot_print(const struct intel_overlay_snapshot *error,
-			     struct drm_printer *p)
-{
-	if (!error)
-		return;
-
-	drm_printf(p, "Overlay, status: 0x%08x, interrupt: 0x%08x\n",
-		   error->dovsta, error->isr);
-	drm_printf(p, "  Register file at 0x%08lx:\n", error->base);
-
-#define P(x) drm_printf(p, "    " #x ": 0x%08x\n", error->regs.x)
-	P(OBUF_0Y);
-	P(OBUF_1Y);
-	P(OBUF_0U);
-	P(OBUF_0V);
-	P(OBUF_1U);
-	P(OBUF_1V);
-	P(OSTRIDE);
-	P(YRGB_VPH);
-	P(UV_VPH);
-	P(HORZ_PH);
-	P(INIT_PHS);
-	P(DWINPOS);
-	P(DWINSZ);
-	P(SWIDTH);
-	P(SWIDTHSW);
-	P(SHEIGHT);
-	P(YRGBSCALE);
-	P(UVSCALE);
-	P(OCLRC0);
-	P(OCLRC1);
-	P(DCLRKV);
-	P(DCLRKM);
-	P(SCLRKVH);
-	P(SCLRKVL);
-	P(SCLRKEN);
-	P(OCONFIG);
-	P(OCMD);
-	P(OSTART_0Y);
-	P(OSTART_1Y);
-	P(OSTART_0U);
-	P(OSTART_0V);
-	P(OSTART_1U);
-	P(OSTART_1V);
-	P(OTILEOFF_0Y);
-	P(OTILEOFF_1Y);
-	P(OTILEOFF_0U);
-	P(OTILEOFF_0V);
-	P(OTILEOFF_1U);
-	P(OTILEOFF_1V);
-	P(FASTHSCALE);
-	P(UVSCALEV);
-#undef P
-}
-
-#endif
diff --git a/drivers/gpu/drm/i915/display/intel_overlay.h b/drivers/gpu/drm/i915/display/intel_overlay.h
index d259e4c74b03..4ef6882b9acb 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.h
+++ b/drivers/gpu/drm/i915/display/intel_overlay.h
@@ -13,7 +13,6 @@ struct drm_file;
 struct drm_printer;
 struct intel_display;
 struct intel_overlay;
-struct intel_overlay_snapshot;
 
 #ifdef I915
 void intel_overlay_setup(struct intel_display *display);
@@ -55,21 +54,4 @@ static inline void intel_overlay_reset(struct intel_display *display)
 }
 #endif
 
-#if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) && defined(I915)
-struct intel_overlay_snapshot *
-intel_overlay_snapshot_capture(struct intel_display *display);
-void intel_overlay_snapshot_print(const struct intel_overlay_snapshot *error,
-				  struct drm_printer *p);
-#else
-static inline struct intel_overlay_snapshot *
-intel_overlay_snapshot_capture(struct intel_display *display)
-{
-	return NULL;
-}
-static inline void intel_overlay_snapshot_print(const struct intel_overlay_snapshot *error,
-						struct drm_printer *p)
-{
-}
-#endif
-
 #endif /* __INTEL_OVERLAY_H__ */
-- 
2.52.0

[PATCH v2 02/19] drm/i915/overlay: Track current frontbuffer_bits

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Store the current frontbuffer_bits in the overlay data. The
main benefit here is that we get rid of the 'crtc->pipe'
usage from intel_overlay_flip_prepare() which will have to
move to the i915 side of the parent vs. display driver split.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_overlay.c | 19 ++++++++++++-------
 1 file changed, 12 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
index 6cea82ecc3ec..8bb1dcff35ea 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -205,6 +205,7 @@ struct intel_overlay {
 	struct drm_i915_gem_object *reg_bo;
 	struct overlay_registers __iomem *regs;
 	u32 flip_addr;
+	u32 frontbuffer_bits;
 	/* flip handling */
 	struct i915_active last_flip;
 	void (*flip_complete)(struct intel_overlay *ovl);
@@ -255,7 +256,8 @@ alloc_request(struct intel_overlay *overlay, void (*fn)(struct intel_overlay *))
 }
 
 /* overlay needs to be disable in OCMD reg */
-static int intel_overlay_on(struct intel_overlay *overlay)
+static int intel_overlay_on(struct intel_overlay *overlay,
+			    u32 frontbuffer_bits)
 {
 	struct intel_display *display = overlay->display;
 	struct i915_request *rq;
@@ -274,6 +276,7 @@ static int intel_overlay_on(struct intel_overlay *overlay)
 	}
 
 	overlay->active = true;
+	overlay->frontbuffer_bits = frontbuffer_bits;
 
 	if (display->platform.i830)
 		i830_overlay_clock_gating(display, false);
@@ -293,7 +296,6 @@ static void intel_overlay_flip_prepare(struct intel_overlay *overlay,
 				       struct i915_vma *vma)
 {
 	struct intel_display *display = overlay->display;
-	enum pipe pipe = overlay->crtc->pipe;
 	struct intel_frontbuffer *frontbuffer = NULL;
 
 	drm_WARN_ON(display->drm, overlay->old_vma);
@@ -302,7 +304,7 @@ static void intel_overlay_flip_prepare(struct intel_overlay *overlay,
 		frontbuffer = intel_frontbuffer_get(intel_bo_to_drm_bo(vma->obj));
 
 	intel_frontbuffer_track(overlay->frontbuffer, frontbuffer,
-				INTEL_FRONTBUFFER_OVERLAY(pipe));
+				overlay->frontbuffer_bits);
 
 	if (overlay->frontbuffer)
 		intel_frontbuffer_put(overlay->frontbuffer);
@@ -364,7 +366,7 @@ static void intel_overlay_release_old_vma(struct intel_overlay *overlay)
 	if (drm_WARN_ON(display->drm, !vma))
 		return;
 
-	intel_frontbuffer_flip(display, INTEL_FRONTBUFFER_OVERLAY(overlay->crtc->pipe));
+	intel_frontbuffer_flip(display, overlay->frontbuffer_bits);
 
 	i915_vma_unpin(vma);
 	i915_vma_put(vma);
@@ -382,9 +384,8 @@ static void intel_overlay_off_tail(struct intel_overlay *overlay)
 
 	intel_overlay_release_old_vma(overlay);
 
-	overlay->crtc->overlay = NULL;
-	overlay->crtc = NULL;
 	overlay->active = false;
+	overlay->frontbuffer_bits = 0;
 
 	if (display->platform.i830)
 		i830_overlay_clock_gating(display, true);
@@ -506,6 +507,7 @@ void intel_overlay_reset(struct intel_display *display)
 	overlay->old_yscale = 0;
 	overlay->crtc = NULL;
 	overlay->active = false;
+	overlay->frontbuffer_bits = 0;
 }
 
 static int packed_depth_bytes(u32 format)
@@ -836,7 +838,7 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
 			OCONF_PIPE_A : OCONF_PIPE_B;
 		iowrite32(oconfig, &regs->OCONFIG);
 
-		ret = intel_overlay_on(overlay);
+		ret = intel_overlay_on(overlay, INTEL_FRONTBUFFER_OVERLAY(pipe));
 		if (ret != 0)
 			goto out_unpin;
 	}
@@ -924,6 +926,9 @@ int intel_overlay_switch_off(struct intel_overlay *overlay)
 
 	iowrite32(0, &overlay->regs->OCMD);
 
+	overlay->crtc->overlay = NULL;
+	overlay->crtc = NULL;
+
 	return intel_overlay_off(overlay);
 }
 
-- 
2.52.0

[PATCH v2 03/19] drm/i915/overlay: Extract i915_overlay_is_active()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Pull the "is the overlay active?" check to a helper
(i915_overlay_is_active()). This will have to move to the
i915 side of the parent vs. display driver split.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_overlay.c | 22 +++++++++++++-------
 1 file changed, 15 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
index 8bb1dcff35ea..5831af146b14 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -255,6 +255,14 @@ alloc_request(struct intel_overlay *overlay, void (*fn)(struct intel_overlay *))
 	return rq;
 }
 
+static bool i915_overlay_is_active(struct drm_device *drm)
+{
+	struct intel_display *display = to_intel_display(drm);
+	struct intel_overlay *overlay = display->overlay;
+
+	return overlay->active;
+}
+
 /* overlay needs to be disable in OCMD reg */
 static int intel_overlay_on(struct intel_overlay *overlay,
 			    u32 frontbuffer_bits)
@@ -263,7 +271,7 @@ static int intel_overlay_on(struct intel_overlay *overlay,
 	struct i915_request *rq;
 	u32 *cs;
 
-	drm_WARN_ON(display->drm, overlay->active);
+	drm_WARN_ON(display->drm, i915_overlay_is_active(display->drm));
 
 	rq = alloc_request(overlay, NULL);
 	if (IS_ERR(rq))
@@ -327,7 +335,7 @@ static int intel_overlay_continue(struct intel_overlay *overlay,
 	u32 flip_addr = overlay->flip_addr;
 	u32 tmp, *cs;
 
-	drm_WARN_ON(display->drm, !overlay->active);
+	drm_WARN_ON(display->drm, !i915_overlay_is_active(display->drm));
 
 	if (load_polyphase_filter)
 		flip_addr |= OFC_UPDATE;
@@ -407,7 +415,7 @@ static int intel_overlay_off(struct intel_overlay *overlay)
 	struct i915_request *rq;
 	u32 *cs, flip_addr = overlay->flip_addr;
 
-	drm_WARN_ON(display->drm, !overlay->active);
+	drm_WARN_ON(display->drm, !i915_overlay_is_active(display->drm));
 
 	/*
 	 * According to intel docs the overlay hw may hang (when switching
@@ -822,7 +830,7 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
 		goto out_pin_section;
 	}
 
-	if (!overlay->active) {
+	if (!i915_overlay_is_active(display->drm)) {
 		const struct intel_crtc_state *crtc_state =
 			overlay->crtc->config;
 		u32 oconfig = 0;
@@ -917,7 +925,7 @@ int intel_overlay_switch_off(struct intel_overlay *overlay)
 	if (ret != 0)
 		return ret;
 
-	if (!overlay->active)
+	if (!i915_overlay_is_active(display->drm))
 		return 0;
 
 	ret = intel_overlay_release_old_vid(overlay);
@@ -1333,7 +1341,7 @@ int intel_overlay_attrs_ioctl(struct drm_device *dev, void *data,
 			if (DISPLAY_VER(display) == 2)
 				goto out_unlock;
 
-			if (overlay->active) {
+			if (i915_overlay_is_active(display->drm)) {
 				ret = -EBUSY;
 				goto out_unlock;
 			}
@@ -1462,7 +1470,7 @@ void intel_overlay_cleanup(struct intel_display *display)
 	 * Furthermore modesetting teardown happens beforehand so the
 	 * hardware should be off already.
 	 */
-	drm_WARN_ON(display->drm, overlay->active);
+	drm_WARN_ON(display->drm, i915_overlay_is_active(display->drm));
 
 	i915_gem_object_put(overlay->reg_bo);
 	i915_active_fini(&overlay->last_flip);
-- 
2.52.0

[PATCH v2 04/19] drm/i915/overlay: Remove redundant overlay->active

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Now that we have overlay->frontbuffer_bits, overlay->active
is completely redundant, so remove it.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_overlay.c | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
index 5831af146b14..b2458840dfc4 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -194,7 +194,6 @@ struct intel_overlay {
 	struct i915_vma *vma;
 	struct i915_vma *old_vma;
 	struct intel_frontbuffer *frontbuffer;
-	bool active;
 	bool pfit_active;
 	u32 pfit_vscale_ratio; /* shifted-point number, (1<<12) == 1.0 */
 	u32 color_key:24;
@@ -260,7 +259,7 @@ static bool i915_overlay_is_active(struct drm_device *drm)
 	struct intel_display *display = to_intel_display(drm);
 	struct intel_overlay *overlay = display->overlay;
 
-	return overlay->active;
+	return overlay->frontbuffer_bits;
 }
 
 /* overlay needs to be disable in OCMD reg */
@@ -283,7 +282,6 @@ static int intel_overlay_on(struct intel_overlay *overlay,
 		return PTR_ERR(cs);
 	}
 
-	overlay->active = true;
 	overlay->frontbuffer_bits = frontbuffer_bits;
 
 	if (display->platform.i830)
@@ -392,7 +390,6 @@ static void intel_overlay_off_tail(struct intel_overlay *overlay)
 
 	intel_overlay_release_old_vma(overlay);
 
-	overlay->active = false;
 	overlay->frontbuffer_bits = 0;
 
 	if (display->platform.i830)
@@ -514,7 +511,6 @@ void intel_overlay_reset(struct intel_display *display)
 	overlay->old_xscale = 0;
 	overlay->old_yscale = 0;
 	overlay->crtc = NULL;
-	overlay->active = false;
 	overlay->frontbuffer_bits = 0;
 }
 
-- 
2.52.0

[PATCH v2 05/19] drm/i915/overlay: Relocate the underrun check

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Move the underrun check out from intel_overlay_continue()
so that the DOVSTA register access can stay on the display
side of the parent vs. display driver split.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_overlay.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
index b2458840dfc4..8c6e9c19b3f5 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -331,18 +331,13 @@ static int intel_overlay_continue(struct intel_overlay *overlay,
 	struct intel_display *display = overlay->display;
 	struct i915_request *rq;
 	u32 flip_addr = overlay->flip_addr;
-	u32 tmp, *cs;
+	u32 *cs;
 
 	drm_WARN_ON(display->drm, !i915_overlay_is_active(display->drm));
 
 	if (load_polyphase_filter)
 		flip_addr |= OFC_UPDATE;
 
-	/* check for underruns */
-	tmp = intel_de_read(display, DOVSTA);
-	if (tmp & (1 << 17))
-		drm_dbg(display->drm, "overlay underrun, DOVSTA: %x\n", tmp);
-
 	rq = alloc_request(overlay, NULL);
 	if (IS_ERR(rq))
 		return PTR_ERR(rq);
@@ -810,6 +805,7 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
 	bool scale_changed = false;
 	struct i915_vma *vma;
 	int ret, tmp_width;
+	u32 tmp;
 
 	drm_WARN_ON(display->drm,
 		    !drm_modeset_is_locked(&display->drm->mode_config.connection_mutex));
@@ -895,6 +891,11 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
 
 	iowrite32(overlay_cmd_reg(params), &regs->OCMD);
 
+	/* check for underruns */
+	tmp = intel_de_read(display, DOVSTA);
+	if (tmp & (1 << 17))
+		drm_dbg(display->drm, "overlay underrun, DOVSTA: %x\n", tmp);
+
 	ret = intel_overlay_continue(overlay, vma, scale_changed);
 	if (ret)
 		goto out_unpin;
-- 
2.52.0

[PATCH v2 06/19] drm/i915/overlay: Introduce i915_overlay_obj_lookup()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Extract the BO lookup and tiling check into a new
helper called i915_overlay_obj_lookup(). This will have to
move to the i915 side of the parent vs. display driver split.

There is a slight change here in that we now do the tiling
check before taking the modeset locks, but those locks don't
protect the BO tiling stuff in any way, so nothing is really
different here.

Note that the hardware should support X-tiled scanout also
for the overlay, but I guess no one ever bothered to hook
it up and test it. So the check should stay at least for now.

v2: Correctly handle the ERR_PTR returned by
    i915_overlay_obj_lookup() (Jani)

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_overlay.c | 33 ++++++++++++++------
 1 file changed, 23 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
index 8c6e9c19b3f5..91398ee92042 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -1125,6 +1125,26 @@ static int check_overlay_src(struct intel_display *display,
 	return 0;
 }
 
+static struct drm_i915_gem_object *
+i915_overlay_obj_lookup(struct drm_device *drm,
+			struct drm_file *file_priv,
+			u32 handle)
+{
+	struct drm_i915_gem_object *bo;
+
+	bo = i915_gem_object_lookup(file_priv, handle);
+	if (!bo)
+		return ERR_PTR(-ENOENT);
+
+	if (i915_gem_object_is_tiled(bo)) {
+		drm_dbg(drm, "buffer used for overlay image can not be tiled\n");
+		i915_gem_object_put(bo);
+		return ERR_PTR(-EINVAL);
+	}
+
+	return bo;
+}
+
 int intel_overlay_put_image_ioctl(struct drm_device *dev, void *data,
 				  struct drm_file *file_priv)
 {
@@ -1155,19 +1175,12 @@ int intel_overlay_put_image_ioctl(struct drm_device *dev, void *data,
 		return -ENOENT;
 	crtc = to_intel_crtc(drmmode_crtc);
 
-	new_bo = i915_gem_object_lookup(file_priv, params->bo_handle);
-	if (!new_bo)
-		return -ENOENT;
+	new_bo = i915_overlay_obj_lookup(dev, file_priv, params->bo_handle);
+	if (IS_ERR(new_bo))
+		return PTR_ERR(new_bo);
 
 	drm_modeset_lock_all(dev);
 
-	if (i915_gem_object_is_tiled(new_bo)) {
-		drm_dbg_kms(display->drm,
-			    "buffer used for overlay image can not be tiled\n");
-		ret = -EINVAL;
-		goto out_unlock;
-	}
-
 	ret = intel_overlay_recover_from_interrupt(overlay);
 	if (ret != 0)
 		goto out_unlock;
-- 
2.52.0

[PATCH v2 07/19] drm/i915/overlay: Use struct drm_gem_object as the type

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Use 'struct drm_gem_object' for the BO instead of 'struct
drm_i915_gem_object', to avoid having the display side
know anything about the i915 specific BO type.

v2: Correctly handle the ERR_PTR returned by
    i915_overlay_obj_lookup() (Jani)

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_overlay.c | 37 ++++++++++----------
 1 file changed, 19 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
index 91398ee92042..adf419a30c65 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -768,8 +768,9 @@ static u32 overlay_cmd_reg(struct drm_intel_overlay_put_image *params)
 	return cmd;
 }
 
-static struct i915_vma *intel_overlay_pin_fb(struct drm_i915_gem_object *new_bo)
+static struct i915_vma *intel_overlay_pin_fb(struct drm_gem_object *obj)
 {
+	struct drm_i915_gem_object *new_bo = to_intel_bo(obj);
 	struct i915_gem_ww_ctx ww;
 	struct i915_vma *vma;
 	int ret;
@@ -795,7 +796,7 @@ static struct i915_vma *intel_overlay_pin_fb(struct drm_i915_gem_object *new_bo)
 }
 
 static int intel_overlay_do_put_image(struct intel_overlay *overlay,
-				      struct drm_i915_gem_object *new_bo,
+				      struct drm_gem_object *obj,
 				      struct drm_intel_overlay_put_image *params)
 {
 	struct intel_display *display = overlay->display;
@@ -816,7 +817,7 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
 
 	atomic_inc(&display->restore.pending_fb_pin);
 
-	vma = intel_overlay_pin_fb(new_bo);
+	vma = intel_overlay_pin_fb(obj);
 	if (IS_ERR(vma)) {
 		ret = PTR_ERR(vma);
 		goto out_pin_section;
@@ -1016,7 +1017,7 @@ static int check_overlay_scaling(struct drm_intel_overlay_put_image *rec)
 
 static int check_overlay_src(struct intel_display *display,
 			     struct drm_intel_overlay_put_image *rec,
-			     struct drm_i915_gem_object *new_bo)
+			     struct drm_gem_object *obj)
 {
 	int uv_hscale = uv_hsubsampling(rec->flags);
 	int uv_vscale = uv_vsubsampling(rec->flags);
@@ -1101,7 +1102,7 @@ static int check_overlay_src(struct intel_display *display,
 			return -EINVAL;
 
 		tmp = rec->stride_Y*rec->src_height;
-		if (rec->offset_Y + tmp > new_bo->base.size)
+		if (rec->offset_Y + tmp > obj->size)
 			return -EINVAL;
 		break;
 
@@ -1112,12 +1113,12 @@ static int check_overlay_src(struct intel_display *display,
 			return -EINVAL;
 
 		tmp = rec->stride_Y * rec->src_height;
-		if (rec->offset_Y + tmp > new_bo->base.size)
+		if (rec->offset_Y + tmp > obj->size)
 			return -EINVAL;
 
 		tmp = rec->stride_UV * (rec->src_height / uv_vscale);
-		if (rec->offset_U + tmp > new_bo->base.size ||
-		    rec->offset_V + tmp > new_bo->base.size)
+		if (rec->offset_U + tmp > obj->size ||
+		    rec->offset_V + tmp > obj->size)
 			return -EINVAL;
 		break;
 	}
@@ -1125,7 +1126,7 @@ static int check_overlay_src(struct intel_display *display,
 	return 0;
 }
 
-static struct drm_i915_gem_object *
+static struct drm_gem_object *
 i915_overlay_obj_lookup(struct drm_device *drm,
 			struct drm_file *file_priv,
 			u32 handle)
@@ -1142,7 +1143,7 @@ i915_overlay_obj_lookup(struct drm_device *drm,
 		return ERR_PTR(-EINVAL);
 	}
 
-	return bo;
+	return intel_bo_to_drm_bo(bo);
 }
 
 int intel_overlay_put_image_ioctl(struct drm_device *dev, void *data,
@@ -1152,8 +1153,8 @@ int intel_overlay_put_image_ioctl(struct drm_device *dev, void *data,
 	struct drm_intel_overlay_put_image *params = data;
 	struct intel_overlay *overlay;
 	struct drm_crtc *drmmode_crtc;
+	struct drm_gem_object *obj;
 	struct intel_crtc *crtc;
-	struct drm_i915_gem_object *new_bo;
 	int ret;
 
 	overlay = display->overlay;
@@ -1175,9 +1176,9 @@ int intel_overlay_put_image_ioctl(struct drm_device *dev, void *data,
 		return -ENOENT;
 	crtc = to_intel_crtc(drmmode_crtc);
 
-	new_bo = i915_overlay_obj_lookup(dev, file_priv, params->bo_handle);
-	if (IS_ERR(new_bo))
-		return PTR_ERR(new_bo);
+	obj = i915_overlay_obj_lookup(dev, file_priv, params->bo_handle);
+	if (IS_ERR(obj))
+		return PTR_ERR(obj);
 
 	drm_modeset_lock_all(dev);
 
@@ -1224,7 +1225,7 @@ int intel_overlay_put_image_ioctl(struct drm_device *dev, void *data,
 		goto out_unlock;
 	}
 
-	ret = check_overlay_src(display, params, new_bo);
+	ret = check_overlay_src(display, params, obj);
 	if (ret != 0)
 		goto out_unlock;
 
@@ -1233,18 +1234,18 @@ int intel_overlay_put_image_ioctl(struct drm_device *dev, void *data,
 	if (ret != 0)
 		goto out_unlock;
 
-	ret = intel_overlay_do_put_image(overlay, new_bo, params);
+	ret = intel_overlay_do_put_image(overlay, obj, params);
 	if (ret != 0)
 		goto out_unlock;
 
 	drm_modeset_unlock_all(dev);
-	i915_gem_object_put(new_bo);
+	drm_gem_object_put(obj);
 
 	return 0;
 
 out_unlock:
 	drm_modeset_unlock_all(dev);
-	i915_gem_object_put(new_bo);
+	drm_gem_object_put(obj);
 
 	return ret;
 }
-- 
2.52.0

[PATCH v2 08/19] drm/i915/overlay: Extract i915_overlay_reset()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

overlay->frontbuffer_bits tracking will move to the i915 side
of the parent vs. display driver split, so extract the reset
part of that into a new function (i915_overlay_reset()).

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_overlay.c | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
index adf419a30c65..9070d88d25b5 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -496,6 +496,17 @@ static int intel_overlay_release_old_vid(struct intel_overlay *overlay)
 	return i915_active_wait(&overlay->last_flip);
 }
 
+static void i915_overlay_reset(struct drm_device *drm)
+{
+	struct intel_display *display = to_intel_display(drm);
+	struct intel_overlay *overlay = display->overlay;
+
+	if (!overlay)
+		return;
+
+	overlay->frontbuffer_bits = 0;
+}
+
 void intel_overlay_reset(struct intel_display *display)
 {
 	struct intel_overlay *overlay = display->overlay;
@@ -506,7 +517,8 @@ void intel_overlay_reset(struct intel_display *display)
 	overlay->old_xscale = 0;
 	overlay->old_yscale = 0;
 	overlay->crtc = NULL;
-	overlay->frontbuffer_bits = 0;
+
+	i915_overlay_reset(display->drm);
 }
 
 static int packed_depth_bytes(u32 format)
-- 
2.52.0

[PATCH v2 09/19] drm/i915/overlay: Extract i915_overlay_setup()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Pull the gem/gt related bits of the overlay setup into
a separate function (i915_overlay_setup()) that will eventually
move to the i915 side of the parent vs. display driver split.

For now we'll also have to pass in the overlay struct, but
that will disappear once the i915 vs. display split is completed.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_overlay.c | 40 ++++++++++++--------
 1 file changed, 25 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
index 9070d88d25b5..1b84790a63b2 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -1430,39 +1430,49 @@ static int get_registers(struct intel_overlay *overlay, bool use_phys)
 	return err;
 }
 
-void intel_overlay_setup(struct intel_display *display)
+static int i915_overlay_setup(struct drm_device *drm,
+			      struct intel_overlay *overlay,
+			      bool needs_physical)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
-	struct intel_overlay *overlay;
+	struct drm_i915_private *dev_priv = to_i915(drm);
 	struct intel_engine_cs *engine;
-	int ret;
-
-	if (!HAS_OVERLAY(display))
-		return;
 
 	engine = to_gt(dev_priv)->engine[RCS0];
 	if (!engine || !engine->kernel_context)
+		return -ENOENT;
+
+	overlay->context = engine->kernel_context;
+
+	i915_active_init(&overlay->last_flip,
+			 NULL, intel_overlay_last_flip_retire, 0);
+
+	return get_registers(overlay, needs_physical);
+}
+
+void intel_overlay_setup(struct intel_display *display)
+{
+	struct intel_overlay *overlay;
+	int ret;
+
+	if (!HAS_OVERLAY(display))
 		return;
 
 	overlay = kzalloc_obj(*overlay);
 	if (!overlay)
 		return;
 
+	ret = i915_overlay_setup(display->drm, overlay,
+				 OVERLAY_NEEDS_PHYSICAL(display));
+	if (ret)
+		goto out_free;
+
 	overlay->display = display;
-	overlay->context = engine->kernel_context;
 	overlay->color_key = 0x0101fe;
 	overlay->color_key_enabled = true;
 	overlay->brightness = -19;
 	overlay->contrast = 75;
 	overlay->saturation = 146;
 
-	i915_active_init(&overlay->last_flip,
-			 NULL, intel_overlay_last_flip_retire, 0);
-
-	ret = get_registers(overlay, OVERLAY_NEEDS_PHYSICAL(display));
-	if (ret)
-		goto out_free;
-
 	memset_io(overlay->regs, 0, sizeof(struct overlay_registers));
 	update_polyphase_filter(overlay->regs);
 	update_reg_attrs(overlay, overlay->regs);
-- 
2.52.0

[PATCH v2 10/19] drm/i915/overlay: Extract i915_overlay_cleanup()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Pull the i915 specific bits of the overlay cleanup into
a separate function (i915_overlay_cleanup()) to accommodate
the upcoming parent vs. display driver split.

For now we'll also have to pass in the overlay struct, but
that will disappear once the i915 vs. display split is completed.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_overlay.c | 22 +++++++++++++-------
 1 file changed, 14 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
index 1b84790a63b2..1edc0ae09c68 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -1490,23 +1490,29 @@ bool intel_overlay_available(struct intel_display *display)
 	return display->overlay;
 }
 
-void intel_overlay_cleanup(struct intel_display *display)
+static void i915_overlay_cleanup(struct drm_device *drm,
+				 struct intel_overlay *overlay)
 {
-	struct intel_overlay *overlay;
-
-	overlay = fetch_and_zero(&display->overlay);
-	if (!overlay)
-		return;
-
 	/*
 	 * The bo's should be free'd by the generic code already.
 	 * Furthermore modesetting teardown happens beforehand so the
 	 * hardware should be off already.
 	 */
-	drm_WARN_ON(display->drm, i915_overlay_is_active(display->drm));
+	drm_WARN_ON(drm, i915_overlay_is_active(drm));
 
 	i915_gem_object_put(overlay->reg_bo);
 	i915_active_fini(&overlay->last_flip);
+}
+
+void intel_overlay_cleanup(struct intel_display *display)
+{
+	struct intel_overlay *overlay;
+
+	overlay = fetch_and_zero(&display->overlay);
+	if (!overlay)
+		return;
+
+	i915_overlay_cleanup(display->drm, overlay);
 
 	kfree(overlay);
 }
-- 
2.52.0

[PATCH v2 11/19] drm/i915/overlay: Abstract buffer (un)pinning

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Make the buffer (un)pinning a bit more abstract so that
the display side of the code doesn't need to know about i915
specific things (i915_ggtt_offset() and i915_vma_unpin()).

In preparation for the full parent vs. display driver split
we'll also pass in the drm_device to these functions, although
not strictly needed yet.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_overlay.c | 24 ++++++++++++++------
 1 file changed, 17 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
index 1edc0ae09c68..428d8a1d301f 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -780,7 +780,9 @@ static u32 overlay_cmd_reg(struct drm_intel_overlay_put_image *params)
 	return cmd;
 }
 
-static struct i915_vma *intel_overlay_pin_fb(struct drm_gem_object *obj)
+static struct i915_vma *i915_overlay_pin_fb(struct drm_device *drm,
+					    struct drm_gem_object *obj,
+					    u32 *offset)
 {
 	struct drm_i915_gem_object *new_bo = to_intel_bo(obj);
 	struct i915_gem_ww_ctx ww;
@@ -804,9 +806,17 @@ static struct i915_vma *intel_overlay_pin_fb(struct drm_gem_object *obj)
 	if (ret)
 		return ERR_PTR(ret);
 
+	*offset = i915_ggtt_offset(vma);
+
 	return vma;
 }
 
+static void i915_overlay_unpin_fb(struct drm_device *drm,
+				  struct i915_vma *vma)
+{
+	i915_vma_unpin(vma);
+}
+
 static int intel_overlay_do_put_image(struct intel_overlay *overlay,
 				      struct drm_gem_object *obj,
 				      struct drm_intel_overlay_put_image *params)
@@ -818,7 +828,7 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
 	bool scale_changed = false;
 	struct i915_vma *vma;
 	int ret, tmp_width;
-	u32 tmp;
+	u32 tmp, offset;
 
 	drm_WARN_ON(display->drm,
 		    !drm_modeset_is_locked(&display->drm->mode_config.connection_mutex));
@@ -829,7 +839,7 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
 
 	atomic_inc(&display->restore.pending_fb_pin);
 
-	vma = intel_overlay_pin_fb(obj);
+	vma = i915_overlay_pin_fb(display->drm, obj, &offset);
 	if (IS_ERR(vma)) {
 		ret = PTR_ERR(vma);
 		goto out_pin_section;
@@ -868,7 +878,7 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
 	swidth = params->src_width;
 	swidthsw = calc_swidthsw(display, params->offset_Y, tmp_width);
 	sheight = params->src_height;
-	iowrite32(i915_ggtt_offset(vma) + params->offset_Y, &regs->OBUF_0Y);
+	iowrite32(offset + params->offset_Y, &regs->OBUF_0Y);
 	ostride = params->stride_Y;
 
 	if (params->flags & I915_OVERLAY_YUV_PLANAR) {
@@ -885,9 +895,9 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
 				      params->src_width / uv_hscale);
 		swidthsw |= max(tmp_U, tmp_V) << 16;
 
-		iowrite32(i915_ggtt_offset(vma) + params->offset_U,
+		iowrite32(offset + params->offset_U,
 			  &regs->OBUF_0U);
-		iowrite32(i915_ggtt_offset(vma) + params->offset_V,
+		iowrite32(offset + params->offset_V,
 			  &regs->OBUF_0V);
 
 		ostride |= params->stride_UV << 16;
@@ -916,7 +926,7 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
 	return 0;
 
 out_unpin:
-	i915_vma_unpin(vma);
+	i915_overlay_unpin_fb(display->drm, vma);
 out_pin_section:
 	atomic_dec(&display->restore.pending_fb_pin);
 
-- 
2.52.0

[PATCH v2 12/19] drm/i915/overlay: Rename low level i915 specific functions

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Some of the lower level functions in the overlay code will
move to the i915 side of the upcoming parent vs. display
driver split. Move all such functions to the "i915_overlay_"
namespace to make it easier to see what belongs where.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_overlay.c | 29 ++++++++++----------
 1 file changed, 14 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
index 428d8a1d301f..906948397d21 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -298,8 +298,8 @@ static int intel_overlay_on(struct intel_overlay *overlay,
 	return i915_active_wait(&overlay->last_flip);
 }
 
-static void intel_overlay_flip_prepare(struct intel_overlay *overlay,
-				       struct i915_vma *vma)
+static void i915_overlay_flip_prepare(struct intel_overlay *overlay,
+				      struct i915_vma *vma)
 {
 	struct intel_display *display = overlay->display;
 	struct intel_frontbuffer *frontbuffer = NULL;
@@ -352,13 +352,13 @@ static int intel_overlay_continue(struct intel_overlay *overlay,
 	*cs++ = flip_addr;
 	intel_ring_advance(rq, cs);
 
-	intel_overlay_flip_prepare(overlay, vma);
+	i915_overlay_flip_prepare(overlay, vma);
 	i915_request_add(rq);
 
 	return 0;
 }
 
-static void intel_overlay_release_old_vma(struct intel_overlay *overlay)
+static void i915_overlay_release_old_vma(struct intel_overlay *overlay)
 {
 	struct intel_display *display = overlay->display;
 	struct i915_vma *vma;
@@ -373,17 +373,16 @@ static void intel_overlay_release_old_vma(struct intel_overlay *overlay)
 	i915_vma_put(vma);
 }
 
-static void
-intel_overlay_release_old_vid_tail(struct intel_overlay *overlay)
+static void i915_overlay_release_old_vid_tail(struct intel_overlay *overlay)
 {
-	intel_overlay_release_old_vma(overlay);
+	i915_overlay_release_old_vma(overlay);
 }
 
-static void intel_overlay_off_tail(struct intel_overlay *overlay)
+static void i915_overlay_off_tail(struct intel_overlay *overlay)
 {
 	struct intel_display *display = overlay->display;
 
-	intel_overlay_release_old_vma(overlay);
+	i915_overlay_release_old_vma(overlay);
 
 	overlay->frontbuffer_bits = 0;
 
@@ -391,7 +390,7 @@ static void intel_overlay_off_tail(struct intel_overlay *overlay)
 		i830_overlay_clock_gating(display, true);
 }
 
-static void intel_overlay_last_flip_retire(struct i915_active *active)
+static void i915_overlay_last_flip_retire(struct i915_active *active)
 {
 	struct intel_overlay *overlay =
 		container_of(active, typeof(*overlay), last_flip);
@@ -417,7 +416,7 @@ static int intel_overlay_off(struct intel_overlay *overlay)
 	 */
 	flip_addr |= OFC_UPDATE;
 
-	rq = alloc_request(overlay, intel_overlay_off_tail);
+	rq = alloc_request(overlay, i915_overlay_off_tail);
 	if (IS_ERR(rq))
 		return PTR_ERR(rq);
 
@@ -439,7 +438,7 @@ static int intel_overlay_off(struct intel_overlay *overlay)
 
 	intel_ring_advance(rq, cs);
 
-	intel_overlay_flip_prepare(overlay, NULL);
+	i915_overlay_flip_prepare(overlay, NULL);
 	i915_request_add(rq);
 
 	return i915_active_wait(&overlay->last_flip);
@@ -473,11 +472,11 @@ static int intel_overlay_release_old_vid(struct intel_overlay *overlay)
 		return 0;
 
 	if (!(intel_de_read(display, GEN2_ISR) & I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT)) {
-		intel_overlay_release_old_vid_tail(overlay);
+		i915_overlay_release_old_vid_tail(overlay);
 		return 0;
 	}
 
-	rq = alloc_request(overlay, intel_overlay_release_old_vid_tail);
+	rq = alloc_request(overlay, i915_overlay_release_old_vid_tail);
 	if (IS_ERR(rq))
 		return PTR_ERR(rq);
 
@@ -1454,7 +1453,7 @@ static int i915_overlay_setup(struct drm_device *drm,
 	overlay->context = engine->kernel_context;
 
 	i915_active_init(&overlay->last_flip,
-			 NULL, intel_overlay_last_flip_retire, 0);
+			 NULL, i915_overlay_last_flip_retire, 0);
 
 	return get_registers(overlay, needs_physical);
 }
-- 
2.52.0

[PATCH v2 13/19] drm/i915/overlay: Adjust i915 specific interfaces

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Adjust the names ("i915_overlay_" prefix) and calling
convention (pass the driver agnostic 'struct drm_device'()
of the functions that will provide the remainder of the
parent driver interface to be used by the overlay display
code.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_overlay.c | 51 +++++++++++---------
 1 file changed, 29 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
index 906948397d21..a516fc28f093 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -263,14 +263,15 @@ static bool i915_overlay_is_active(struct drm_device *drm)
 }
 
 /* overlay needs to be disable in OCMD reg */
-static int intel_overlay_on(struct intel_overlay *overlay,
-			    u32 frontbuffer_bits)
+static int i915_overlay_on(struct drm_device *drm,
+			   u32 frontbuffer_bits)
 {
-	struct intel_display *display = overlay->display;
+	struct intel_display *display = to_intel_display(drm);
+	struct intel_overlay *overlay = display->overlay;
 	struct i915_request *rq;
 	u32 *cs;
 
-	drm_WARN_ON(display->drm, i915_overlay_is_active(display->drm));
+	drm_WARN_ON(drm, i915_overlay_is_active(drm));
 
 	rq = alloc_request(overlay, NULL);
 	if (IS_ERR(rq))
@@ -324,16 +325,17 @@ static void i915_overlay_flip_prepare(struct intel_overlay *overlay,
 }
 
 /* overlay needs to be enabled in OCMD reg */
-static int intel_overlay_continue(struct intel_overlay *overlay,
-				  struct i915_vma *vma,
-				  bool load_polyphase_filter)
+static int i915_overlay_continue(struct drm_device *drm,
+				 struct i915_vma *vma,
+				 bool load_polyphase_filter)
 {
-	struct intel_display *display = overlay->display;
+	struct intel_display *display = to_intel_display(drm);
+	struct intel_overlay *overlay = display->overlay;
 	struct i915_request *rq;
 	u32 flip_addr = overlay->flip_addr;
 	u32 *cs;
 
-	drm_WARN_ON(display->drm, !i915_overlay_is_active(display->drm));
+	drm_WARN_ON(drm, !i915_overlay_is_active(drm));
 
 	if (load_polyphase_filter)
 		flip_addr |= OFC_UPDATE;
@@ -400,13 +402,14 @@ static void i915_overlay_last_flip_retire(struct i915_active *active)
 }
 
 /* overlay needs to be disabled in OCMD reg */
-static int intel_overlay_off(struct intel_overlay *overlay)
+static int i915_overlay_off(struct drm_device *drm)
 {
-	struct intel_display *display = overlay->display;
+	struct intel_display *display = to_intel_display(drm);
+	struct intel_overlay *overlay = display->overlay;
 	struct i915_request *rq;
 	u32 *cs, flip_addr = overlay->flip_addr;
 
-	drm_WARN_ON(display->drm, !i915_overlay_is_active(display->drm));
+	drm_WARN_ON(drm, !i915_overlay_is_active(drm));
 
 	/*
 	 * According to intel docs the overlay hw may hang (when switching
@@ -448,8 +451,11 @@ static int intel_overlay_off(struct intel_overlay *overlay)
  * Recover from an interruption due to a signal.
  * We have to be careful not to repeat work forever an make forward progress.
  */
-static int intel_overlay_recover_from_interrupt(struct intel_overlay *overlay)
+static int i915_overlay_recover_from_interrupt(struct drm_device *drm)
 {
+	struct intel_display *display = to_intel_display(drm);
+	struct intel_overlay *overlay = display->overlay;
+
 	return i915_active_wait(&overlay->last_flip);
 }
 
@@ -458,9 +464,10 @@ static int intel_overlay_recover_from_interrupt(struct intel_overlay *overlay)
  * Needs to be called before the overlay register are changed
  * via intel_overlay_(un)map_regs.
  */
-static int intel_overlay_release_old_vid(struct intel_overlay *overlay)
+static int i915_overlay_release_old_vid(struct drm_device *drm)
 {
-	struct intel_display *display = overlay->display;
+	struct intel_display *display = to_intel_display(drm);
+	struct intel_overlay *overlay = display->overlay;
 	struct i915_request *rq;
 	u32 *cs;
 
@@ -832,7 +839,7 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
 	drm_WARN_ON(display->drm,
 		    !drm_modeset_is_locked(&display->drm->mode_config.connection_mutex));
 
-	ret = intel_overlay_release_old_vid(overlay);
+	ret = i915_overlay_release_old_vid(display->drm);
 	if (ret != 0)
 		return ret;
 
@@ -860,7 +867,7 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
 			OCONF_PIPE_A : OCONF_PIPE_B;
 		iowrite32(oconfig, &regs->OCONFIG);
 
-		ret = intel_overlay_on(overlay, INTEL_FRONTBUFFER_OVERLAY(pipe));
+		ret = i915_overlay_on(display->drm, INTEL_FRONTBUFFER_OVERLAY(pipe));
 		if (ret != 0)
 			goto out_unpin;
 	}
@@ -918,7 +925,7 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
 	if (tmp & (1 << 17))
 		drm_dbg(display->drm, "overlay underrun, DOVSTA: %x\n", tmp);
 
-	ret = intel_overlay_continue(overlay, vma, scale_changed);
+	ret = i915_overlay_continue(display->drm, vma, scale_changed);
 	if (ret)
 		goto out_unpin;
 
@@ -940,14 +947,14 @@ int intel_overlay_switch_off(struct intel_overlay *overlay)
 	drm_WARN_ON(display->drm,
 		    !drm_modeset_is_locked(&display->drm->mode_config.connection_mutex));
 
-	ret = intel_overlay_recover_from_interrupt(overlay);
+	ret = i915_overlay_recover_from_interrupt(display->drm);
 	if (ret != 0)
 		return ret;
 
 	if (!i915_overlay_is_active(display->drm))
 		return 0;
 
-	ret = intel_overlay_release_old_vid(overlay);
+	ret = i915_overlay_release_old_vid(display->drm);
 	if (ret != 0)
 		return ret;
 
@@ -956,7 +963,7 @@ int intel_overlay_switch_off(struct intel_overlay *overlay)
 	overlay->crtc->overlay = NULL;
 	overlay->crtc = NULL;
 
-	return intel_overlay_off(overlay);
+	return i915_overlay_off(display->drm);
 }
 
 static int check_overlay_possible_on_crtc(struct intel_overlay *overlay,
@@ -1203,7 +1210,7 @@ int intel_overlay_put_image_ioctl(struct drm_device *dev, void *data,
 
 	drm_modeset_lock_all(dev);
 
-	ret = intel_overlay_recover_from_interrupt(overlay);
+	ret = i915_overlay_recover_from_interrupt(dev);
 	if (ret != 0)
 		goto out_unlock;
 
-- 
2.52.0

[PATCH v2 14/19] drm/i915/overlay: Make i830_overlay_clock_gating() i915 specific

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

i830_overlay_clock_gating() will remain on the i915 side of the
parent vs. display driver split. Stop using display specific stuff
inside it.

The one annoyance here is access to the display engine's
DSPCLK_GATE_D register. The proper way to deal with that might
be to move it to the display side, but that seems a bit hard right
now. So leave it where it is for now.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_overlay.c | 24 ++++++++++++--------
 1 file changed, 15 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
index a516fc28f093..98c3992f07dd 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -210,17 +210,21 @@ struct intel_overlay {
 	void (*flip_complete)(struct intel_overlay *ovl);
 };
 
-static void i830_overlay_clock_gating(struct intel_display *display,
+static void i830_overlay_clock_gating(struct drm_i915_private *i915,
 				      bool enable)
 {
-	struct pci_dev *pdev = to_pci_dev(display->drm->dev);
+	struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
 	u8 val;
 
-	/* WA_OVERLAY_CLKGATE:alm */
+	/*
+	 * WA_OVERLAY_CLKGATE:alm
+	 *
+	 * FIXME should perhaps be done on the display side?
+	 */
 	if (enable)
-		intel_de_write(display, DSPCLK_GATE_D, 0);
+		intel_uncore_write(&i915->uncore, DSPCLK_GATE_D, 0);
 	else
-		intel_de_write(display, DSPCLK_GATE_D, OVRUNIT_CLOCK_GATE_DISABLE);
+		intel_uncore_write(&i915->uncore, DSPCLK_GATE_D, OVRUNIT_CLOCK_GATE_DISABLE);
 
 	/* WA_DISABLE_L2CACHE_CLOCK_GATING:alm */
 	pci_bus_read_config_byte(pdev->bus,
@@ -266,6 +270,7 @@ static bool i915_overlay_is_active(struct drm_device *drm)
 static int i915_overlay_on(struct drm_device *drm,
 			   u32 frontbuffer_bits)
 {
+	struct drm_i915_private *i915 = to_i915(drm);
 	struct intel_display *display = to_intel_display(drm);
 	struct intel_overlay *overlay = display->overlay;
 	struct i915_request *rq;
@@ -285,8 +290,8 @@ static int i915_overlay_on(struct drm_device *drm,
 
 	overlay->frontbuffer_bits = frontbuffer_bits;
 
-	if (display->platform.i830)
-		i830_overlay_clock_gating(display, false);
+	if (IS_I830(i915))
+		i830_overlay_clock_gating(i915, false);
 
 	*cs++ = MI_OVERLAY_FLIP | MI_OVERLAY_ON;
 	*cs++ = overlay->flip_addr | OFC_UPDATE;
@@ -383,13 +388,14 @@ static void i915_overlay_release_old_vid_tail(struct intel_overlay *overlay)
 static void i915_overlay_off_tail(struct intel_overlay *overlay)
 {
 	struct intel_display *display = overlay->display;
+	struct drm_i915_private *i915 = to_i915(display->drm);
 
 	i915_overlay_release_old_vma(overlay);
 
 	overlay->frontbuffer_bits = 0;
 
-	if (display->platform.i830)
-		i830_overlay_clock_gating(display, true);
+	if (IS_I830(i915))
+		i830_overlay_clock_gating(i915, true);
 }
 
 static void i915_overlay_last_flip_retire(struct i915_active *active)
-- 
2.52.0

[PATCH v2 15/19] drm/i915/overlay: s/dev_priv/i915/

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Rename the one lingering 'dev_priv' variable to the
more modern 'i915' in the overlay code.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_overlay.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
index 98c3992f07dd..300f6d48180b 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -1456,10 +1456,10 @@ static int i915_overlay_setup(struct drm_device *drm,
 			      struct intel_overlay *overlay,
 			      bool needs_physical)
 {
-	struct drm_i915_private *dev_priv = to_i915(drm);
+	struct drm_i915_private *i915 = to_i915(drm);
 	struct intel_engine_cs *engine;
 
-	engine = to_gt(dev_priv)->engine[RCS0];
+	engine = to_gt(i915)->engine[RCS0];
 	if (!engine || !engine->kernel_context)
 		return -ENOENT;
 
-- 
2.52.0

[PATCH v2 16/19] drm/i915/overlay: Split 'struct intel_overlay'

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Split the i915 driver specific bits from 'struct intel_overlay'
into a seaarate 'struct i915_overlay'. The latter will move to
the i915 side of the parent vs. display driver split.

The display side will also need to know the virtual address of
the register map. That now gets passed as the return value
from i915_overlay_setup(), so that the display side doesn't
need to know how the mapping was achieved.

v2: Use kzalloc_obj()

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_overlay.c | 130 +++++++++++--------
 drivers/gpu/drm/i915/i915_drv.h              |   3 +
 2 files changed, 81 insertions(+), 52 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
index 300f6d48180b..10a235ce608e 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -187,27 +187,32 @@ struct overlay_registers {
 	u16 RESERVEDG[0x100 / 2 - N_HORIZ_UV_TAPS * N_PHASES];
 };
 
-struct intel_overlay {
-	struct intel_display *display;
+struct i915_overlay {
+	struct drm_i915_private *i915;
 	struct intel_context *context;
-	struct intel_crtc *crtc;
 	struct i915_vma *vma;
 	struct i915_vma *old_vma;
 	struct intel_frontbuffer *frontbuffer;
+	/* register access */
+	struct drm_i915_gem_object *reg_bo;
+	void __iomem *regs;
+	u32 flip_addr;
+	u32 frontbuffer_bits;
+	/* flip handling */
+	struct i915_active last_flip;
+	void (*flip_complete)(struct i915_overlay *overlay);
+};
+
+struct intel_overlay {
+	struct intel_display *display;
+	struct intel_crtc *crtc;
 	bool pfit_active;
 	u32 pfit_vscale_ratio; /* shifted-point number, (1<<12) == 1.0 */
 	u32 color_key:24;
 	u32 color_key_enabled:1;
 	u32 brightness, contrast, saturation;
 	u32 old_xscale, old_yscale;
-	/* register access */
-	struct drm_i915_gem_object *reg_bo;
 	struct overlay_registers __iomem *regs;
-	u32 flip_addr;
-	u32 frontbuffer_bits;
-	/* flip handling */
-	struct i915_active last_flip;
-	void (*flip_complete)(struct intel_overlay *ovl);
 };
 
 static void i830_overlay_clock_gating(struct drm_i915_private *i915,
@@ -238,7 +243,7 @@ static void i830_overlay_clock_gating(struct drm_i915_private *i915,
 }
 
 static struct i915_request *
-alloc_request(struct intel_overlay *overlay, void (*fn)(struct intel_overlay *))
+alloc_request(struct i915_overlay *overlay, void (*fn)(struct i915_overlay *))
 {
 	struct i915_request *rq;
 	int err;
@@ -260,8 +265,8 @@ alloc_request(struct intel_overlay *overlay, void (*fn)(struct intel_overlay *))
 
 static bool i915_overlay_is_active(struct drm_device *drm)
 {
-	struct intel_display *display = to_intel_display(drm);
-	struct intel_overlay *overlay = display->overlay;
+	struct drm_i915_private *i915 = to_i915(drm);
+	struct i915_overlay *overlay = i915->overlay;
 
 	return overlay->frontbuffer_bits;
 }
@@ -271,8 +276,7 @@ static int i915_overlay_on(struct drm_device *drm,
 			   u32 frontbuffer_bits)
 {
 	struct drm_i915_private *i915 = to_i915(drm);
-	struct intel_display *display = to_intel_display(drm);
-	struct intel_overlay *overlay = display->overlay;
+	struct i915_overlay *overlay = i915->overlay;
 	struct i915_request *rq;
 	u32 *cs;
 
@@ -304,13 +308,13 @@ static int i915_overlay_on(struct drm_device *drm,
 	return i915_active_wait(&overlay->last_flip);
 }
 
-static void i915_overlay_flip_prepare(struct intel_overlay *overlay,
+static void i915_overlay_flip_prepare(struct i915_overlay *overlay,
 				      struct i915_vma *vma)
 {
-	struct intel_display *display = overlay->display;
+	struct drm_i915_private *i915 = overlay->i915;
 	struct intel_frontbuffer *frontbuffer = NULL;
 
-	drm_WARN_ON(display->drm, overlay->old_vma);
+	drm_WARN_ON(&i915->drm, overlay->old_vma);
 
 	if (vma)
 		frontbuffer = intel_frontbuffer_get(intel_bo_to_drm_bo(vma->obj));
@@ -334,8 +338,8 @@ static int i915_overlay_continue(struct drm_device *drm,
 				 struct i915_vma *vma,
 				 bool load_polyphase_filter)
 {
-	struct intel_display *display = to_intel_display(drm);
-	struct intel_overlay *overlay = display->overlay;
+	struct drm_i915_private *i915 = to_i915(drm);
+	struct i915_overlay *overlay = i915->overlay;
 	struct i915_request *rq;
 	u32 flip_addr = overlay->flip_addr;
 	u32 *cs;
@@ -365,13 +369,14 @@ static int i915_overlay_continue(struct drm_device *drm,
 	return 0;
 }
 
-static void i915_overlay_release_old_vma(struct intel_overlay *overlay)
+static void i915_overlay_release_old_vma(struct i915_overlay *overlay)
 {
-	struct intel_display *display = overlay->display;
+	struct drm_i915_private *i915 = overlay->i915;
+	struct intel_display *display = i915->display;
 	struct i915_vma *vma;
 
 	vma = fetch_and_zero(&overlay->old_vma);
-	if (drm_WARN_ON(display->drm, !vma))
+	if (drm_WARN_ON(&i915->drm, !vma))
 		return;
 
 	intel_frontbuffer_flip(display, overlay->frontbuffer_bits);
@@ -380,15 +385,14 @@ static void i915_overlay_release_old_vma(struct intel_overlay *overlay)
 	i915_vma_put(vma);
 }
 
-static void i915_overlay_release_old_vid_tail(struct intel_overlay *overlay)
+static void i915_overlay_release_old_vid_tail(struct i915_overlay *overlay)
 {
 	i915_overlay_release_old_vma(overlay);
 }
 
-static void i915_overlay_off_tail(struct intel_overlay *overlay)
+static void i915_overlay_off_tail(struct i915_overlay *overlay)
 {
-	struct intel_display *display = overlay->display;
-	struct drm_i915_private *i915 = to_i915(display->drm);
+	struct drm_i915_private *i915 = overlay->i915;
 
 	i915_overlay_release_old_vma(overlay);
 
@@ -400,7 +404,7 @@ static void i915_overlay_off_tail(struct intel_overlay *overlay)
 
 static void i915_overlay_last_flip_retire(struct i915_active *active)
 {
-	struct intel_overlay *overlay =
+	struct i915_overlay *overlay =
 		container_of(active, typeof(*overlay), last_flip);
 
 	if (overlay->flip_complete)
@@ -410,8 +414,8 @@ static void i915_overlay_last_flip_retire(struct i915_active *active)
 /* overlay needs to be disabled in OCMD reg */
 static int i915_overlay_off(struct drm_device *drm)
 {
-	struct intel_display *display = to_intel_display(drm);
-	struct intel_overlay *overlay = display->overlay;
+	struct drm_i915_private *i915 = to_i915(drm);
+	struct i915_overlay *overlay = i915->overlay;
 	struct i915_request *rq;
 	u32 *cs, flip_addr = overlay->flip_addr;
 
@@ -459,8 +463,8 @@ static int i915_overlay_off(struct drm_device *drm)
  */
 static int i915_overlay_recover_from_interrupt(struct drm_device *drm)
 {
-	struct intel_display *display = to_intel_display(drm);
-	struct intel_overlay *overlay = display->overlay;
+	struct drm_i915_private *i915 = to_i915(drm);
+	struct i915_overlay *overlay = i915->overlay;
 
 	return i915_active_wait(&overlay->last_flip);
 }
@@ -472,8 +476,8 @@ static int i915_overlay_recover_from_interrupt(struct drm_device *drm)
  */
 static int i915_overlay_release_old_vid(struct drm_device *drm)
 {
-	struct intel_display *display = to_intel_display(drm);
-	struct intel_overlay *overlay = display->overlay;
+	struct drm_i915_private *i915 = to_i915(drm);
+	struct i915_overlay *overlay = i915->overlay;
 	struct i915_request *rq;
 	u32 *cs;
 
@@ -484,7 +488,7 @@ static int i915_overlay_release_old_vid(struct drm_device *drm)
 	if (!overlay->old_vma)
 		return 0;
 
-	if (!(intel_de_read(display, GEN2_ISR) & I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT)) {
+	if (!(intel_uncore_read(&i915->uncore, GEN2_ISR) & I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT)) {
 		i915_overlay_release_old_vid_tail(overlay);
 		return 0;
 	}
@@ -510,8 +514,8 @@ static int i915_overlay_release_old_vid(struct drm_device *drm)
 
 static void i915_overlay_reset(struct drm_device *drm)
 {
-	struct intel_display *display = to_intel_display(drm);
-	struct intel_overlay *overlay = display->overlay;
+	struct drm_i915_private *i915 = to_i915(drm);
+	struct i915_overlay *overlay = i915->overlay;
 
 	if (!overlay)
 		return;
@@ -1412,10 +1416,9 @@ int intel_overlay_attrs_ioctl(struct drm_device *dev, void *data,
 	return ret;
 }
 
-static int get_registers(struct intel_overlay *overlay, bool use_phys)
+static int get_registers(struct i915_overlay *overlay, bool use_phys)
 {
-	struct intel_display *display = overlay->display;
-	struct drm_i915_private *i915 = to_i915(display->drm);
+	struct drm_i915_private *i915 = overlay->i915;
 	struct drm_i915_gem_object *obj;
 	struct i915_vma *vma;
 	int err;
@@ -1452,29 +1455,43 @@ static int get_registers(struct intel_overlay *overlay, bool use_phys)
 	return err;
 }
 
-static int i915_overlay_setup(struct drm_device *drm,
-			      struct intel_overlay *overlay,
-			      bool needs_physical)
+static void __iomem *i915_overlay_setup(struct drm_device *drm,
+					bool needs_physical)
 {
 	struct drm_i915_private *i915 = to_i915(drm);
 	struct intel_engine_cs *engine;
+	struct i915_overlay *overlay;
+	int ret;
 
 	engine = to_gt(i915)->engine[RCS0];
 	if (!engine || !engine->kernel_context)
-		return -ENOENT;
+		return ERR_PTR(-ENOENT);
 
+	overlay = kzalloc_obj(*overlay);
+	if (!overlay)
+		return ERR_PTR(-ENOMEM);
+
+	overlay->i915 = i915;
 	overlay->context = engine->kernel_context;
 
 	i915_active_init(&overlay->last_flip,
 			 NULL, i915_overlay_last_flip_retire, 0);
 
-	return get_registers(overlay, needs_physical);
+	ret = get_registers(overlay, needs_physical);
+	if (ret) {
+		kfree(overlay);
+		return ERR_PTR(ret);
+	}
+
+	i915->overlay = overlay;
+
+	return overlay->regs;
 }
 
 void intel_overlay_setup(struct intel_display *display)
 {
 	struct intel_overlay *overlay;
-	int ret;
+	void __iomem *regs;
 
 	if (!HAS_OVERLAY(display))
 		return;
@@ -1483,12 +1500,13 @@ void intel_overlay_setup(struct intel_display *display)
 	if (!overlay)
 		return;
 
-	ret = i915_overlay_setup(display->drm, overlay,
-				 OVERLAY_NEEDS_PHYSICAL(display));
-	if (ret)
+	regs = i915_overlay_setup(display->drm,
+				  OVERLAY_NEEDS_PHYSICAL(display));
+	if (IS_ERR(regs))
 		goto out_free;
 
 	overlay->display = display;
+	overlay->regs = regs;
 	overlay->color_key = 0x0101fe;
 	overlay->color_key_enabled = true;
 	overlay->brightness = -19;
@@ -1512,9 +1530,15 @@ bool intel_overlay_available(struct intel_display *display)
 	return display->overlay;
 }
 
-static void i915_overlay_cleanup(struct drm_device *drm,
-				 struct intel_overlay *overlay)
+static void i915_overlay_cleanup(struct drm_device *drm)
 {
+	struct drm_i915_private *i915 = to_i915(drm);
+	struct i915_overlay *overlay;
+
+	overlay = fetch_and_zero(&i915->overlay);
+	if (!overlay)
+		return;
+
 	/*
 	 * The bo's should be free'd by the generic code already.
 	 * Furthermore modesetting teardown happens beforehand so the
@@ -1524,6 +1548,8 @@ static void i915_overlay_cleanup(struct drm_device *drm,
 
 	i915_gem_object_put(overlay->reg_bo);
 	i915_active_fini(&overlay->last_flip);
+
+	kfree(overlay);
 }
 
 void intel_overlay_cleanup(struct intel_display *display)
@@ -1534,7 +1560,7 @@ void intel_overlay_cleanup(struct intel_display *display)
 	if (!overlay)
 		return;
 
-	i915_overlay_cleanup(display->drm, overlay);
+	i915_overlay_cleanup(display->drm);
 
 	kfree(overlay);
 }
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 44ba620325bc..dd380382c00e 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -61,6 +61,7 @@
 #include "intel_uncore.h"
 
 struct drm_i915_clock_gating_funcs;
+struct i915_overlay;
 struct intel_display;
 struct intel_pxp;
 struct vlv_s0ix_state;
@@ -307,6 +308,8 @@ struct drm_i915_private {
 
 	struct intel_pxp *pxp;
 
+	struct i915_overlay *overlay;
+
 	struct i915_pmu pmu;
 
 	/* The TTM device structure. */
-- 
2.52.0

[PATCH v2 17/19] drm/i915/overlay: Don't use fetch_and_zero() in display code

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

We don't generally want fetch_and_zero() on the display side, so
stop using it in the display side intel_overlay_cleanup().
Fortunately we don't really have anything to do here apart from
freeing the data. And we'll keep on clearing the pointer, just
in case something somewhere cares about it.

v2: Adjust the commit message since we do apparently
    have fetch_and_zero() in display code as well (Jani)

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_overlay.c | 9 ++-------
 1 file changed, 2 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
index 10a235ce608e..26ea7e9f4283 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -1554,13 +1554,8 @@ static void i915_overlay_cleanup(struct drm_device *drm)
 
 void intel_overlay_cleanup(struct intel_display *display)
 {
-	struct intel_overlay *overlay;
-
-	overlay = fetch_and_zero(&display->overlay);
-	if (!overlay)
-		return;
-
 	i915_overlay_cleanup(display->drm);
 
-	kfree(overlay);
+	kfree(display->overlay);
+	display->overlay = NULL;
 }
-- 
2.52.0

[PATCH v2 18/19] drm/i915/overlay: Move i915 specific code into i915_overlay.c

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Relocate the i915 driver specific parts of the overlay code
into i915_overlay.c. This leaves intel_overlay.c with just
the display specific code.

The one annoyance here is the DSPCLK_GATE_D register access
being done from i830_overlay_clock_gating(). The register
definition lives on the display side as we do need to access
it on other platforms there. Since it's just one register
and bit, I decided to just duplicate that part in i915_reg.h.

v2: Use kzalloc_obj()

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/Makefile                 |   1 +
 .../gpu/drm/i915/display/intel_display_regs.h |   2 -
 drivers/gpu/drm/i915/display/intel_overlay.c  | 490 +----------------
 drivers/gpu/drm/i915/i915_overlay.c           | 500 ++++++++++++++++++
 drivers/gpu/drm/i915/i915_overlay.h           |  43 ++
 drivers/gpu/drm/i915/i915_reg.h               |   4 +
 6 files changed, 550 insertions(+), 490 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/i915_overlay.c
 create mode 100644 drivers/gpu/drm/i915/i915_overlay.h

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 4d6c528d9881..45171de63ef9 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -80,6 +80,7 @@ i915-y += \
 	i915_dsb_buffer.o \
 	i915_hdcp_gsc.o \
 	i915_initial_plane.o \
+	i915_overlay.o \
 	i915_panic.o
 
 # "Graphics Technology" (aka we talk to the gpu)
diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h b/drivers/gpu/drm/i915/display/intel_display_regs.h
index 49e2a9e3ee0e..4746e9ebd920 100644
--- a/drivers/gpu/drm/i915/display/intel_display_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_display_regs.h
@@ -117,8 +117,6 @@
 #define   VLV_ERROR_PAGE_TABLE				(1 << 4)
 #define   VLV_ERROR_CLAIM				(1 << 0)
 
-#define GEN2_ISR	_MMIO(0x20ac)
-
 #define VLV_ERROR_REGS		I915_ERROR_REGS(VLV_EMR, VLV_EIR)
 
 #define _MBUS_ABOX0_CTL			0x45038
diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
index 26ea7e9f4283..c2d1d8c87a1f 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -27,24 +27,16 @@
  */
 
 #include <drm/drm_fourcc.h>
+#include <drm/drm_gem.h>
 #include <drm/drm_print.h>
-#include <drm/intel/intel_gmd_interrupt_regs.h>
 
-#include "gem/i915_gem_internal.h"
-#include "gem/i915_gem_object_frontbuffer.h"
-#include "gem/i915_gem_pm.h"
-
-#include "gt/intel_gpu_commands.h"
-#include "gt/intel_ring.h"
-
-#include "i915_drv.h"
+#include "i915_overlay.h"
 #include "intel_color_regs.h"
 #include "intel_de.h"
 #include "intel_display_regs.h"
 #include "intel_display_types.h"
 #include "intel_frontbuffer.h"
 #include "intel_overlay.h"
-#include "intel_pci_config.h"
 #include "intel_pfit_regs.h"
 
 /* Limits for overlay size. According to intel doc, the real limits are:
@@ -121,9 +113,6 @@
 #define RGB8I_TO_COLORKEY(c) \
 	((((c) & 0xff) << 16) | (((c) & 0xff) << 8) | (((c) & 0xff) << 0))
 
-/* overlay flip addr flag */
-#define OFC_UPDATE		0x1
-
 /* polyphase filter coefficients */
 #define N_HORIZ_Y_TAPS          5
 #define N_VERT_Y_TAPS           3
@@ -187,22 +176,6 @@ struct overlay_registers {
 	u16 RESERVEDG[0x100 / 2 - N_HORIZ_UV_TAPS * N_PHASES];
 };
 
-struct i915_overlay {
-	struct drm_i915_private *i915;
-	struct intel_context *context;
-	struct i915_vma *vma;
-	struct i915_vma *old_vma;
-	struct intel_frontbuffer *frontbuffer;
-	/* register access */
-	struct drm_i915_gem_object *reg_bo;
-	void __iomem *regs;
-	u32 flip_addr;
-	u32 frontbuffer_bits;
-	/* flip handling */
-	struct i915_active last_flip;
-	void (*flip_complete)(struct i915_overlay *overlay);
-};
-
 struct intel_overlay {
 	struct intel_display *display;
 	struct intel_crtc *crtc;
@@ -215,314 +188,6 @@ struct intel_overlay {
 	struct overlay_registers __iomem *regs;
 };
 
-static void i830_overlay_clock_gating(struct drm_i915_private *i915,
-				      bool enable)
-{
-	struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
-	u8 val;
-
-	/*
-	 * WA_OVERLAY_CLKGATE:alm
-	 *
-	 * FIXME should perhaps be done on the display side?
-	 */
-	if (enable)
-		intel_uncore_write(&i915->uncore, DSPCLK_GATE_D, 0);
-	else
-		intel_uncore_write(&i915->uncore, DSPCLK_GATE_D, OVRUNIT_CLOCK_GATE_DISABLE);
-
-	/* WA_DISABLE_L2CACHE_CLOCK_GATING:alm */
-	pci_bus_read_config_byte(pdev->bus,
-				 PCI_DEVFN(0, 0), I830_CLOCK_GATE, &val);
-	if (enable)
-		val &= ~I830_L2_CACHE_CLOCK_GATE_DISABLE;
-	else
-		val |= I830_L2_CACHE_CLOCK_GATE_DISABLE;
-	pci_bus_write_config_byte(pdev->bus,
-				  PCI_DEVFN(0, 0), I830_CLOCK_GATE, val);
-}
-
-static struct i915_request *
-alloc_request(struct i915_overlay *overlay, void (*fn)(struct i915_overlay *))
-{
-	struct i915_request *rq;
-	int err;
-
-	overlay->flip_complete = fn;
-
-	rq = i915_request_create(overlay->context);
-	if (IS_ERR(rq))
-		return rq;
-
-	err = i915_active_add_request(&overlay->last_flip, rq);
-	if (err) {
-		i915_request_add(rq);
-		return ERR_PTR(err);
-	}
-
-	return rq;
-}
-
-static bool i915_overlay_is_active(struct drm_device *drm)
-{
-	struct drm_i915_private *i915 = to_i915(drm);
-	struct i915_overlay *overlay = i915->overlay;
-
-	return overlay->frontbuffer_bits;
-}
-
-/* overlay needs to be disable in OCMD reg */
-static int i915_overlay_on(struct drm_device *drm,
-			   u32 frontbuffer_bits)
-{
-	struct drm_i915_private *i915 = to_i915(drm);
-	struct i915_overlay *overlay = i915->overlay;
-	struct i915_request *rq;
-	u32 *cs;
-
-	drm_WARN_ON(drm, i915_overlay_is_active(drm));
-
-	rq = alloc_request(overlay, NULL);
-	if (IS_ERR(rq))
-		return PTR_ERR(rq);
-
-	cs = intel_ring_begin(rq, 4);
-	if (IS_ERR(cs)) {
-		i915_request_add(rq);
-		return PTR_ERR(cs);
-	}
-
-	overlay->frontbuffer_bits = frontbuffer_bits;
-
-	if (IS_I830(i915))
-		i830_overlay_clock_gating(i915, false);
-
-	*cs++ = MI_OVERLAY_FLIP | MI_OVERLAY_ON;
-	*cs++ = overlay->flip_addr | OFC_UPDATE;
-	*cs++ = MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP;
-	*cs++ = MI_NOOP;
-	intel_ring_advance(rq, cs);
-
-	i915_request_add(rq);
-
-	return i915_active_wait(&overlay->last_flip);
-}
-
-static void i915_overlay_flip_prepare(struct i915_overlay *overlay,
-				      struct i915_vma *vma)
-{
-	struct drm_i915_private *i915 = overlay->i915;
-	struct intel_frontbuffer *frontbuffer = NULL;
-
-	drm_WARN_ON(&i915->drm, overlay->old_vma);
-
-	if (vma)
-		frontbuffer = intel_frontbuffer_get(intel_bo_to_drm_bo(vma->obj));
-
-	intel_frontbuffer_track(overlay->frontbuffer, frontbuffer,
-				overlay->frontbuffer_bits);
-
-	if (overlay->frontbuffer)
-		intel_frontbuffer_put(overlay->frontbuffer);
-	overlay->frontbuffer = frontbuffer;
-
-	overlay->old_vma = overlay->vma;
-	if (vma)
-		overlay->vma = i915_vma_get(vma);
-	else
-		overlay->vma = NULL;
-}
-
-/* overlay needs to be enabled in OCMD reg */
-static int i915_overlay_continue(struct drm_device *drm,
-				 struct i915_vma *vma,
-				 bool load_polyphase_filter)
-{
-	struct drm_i915_private *i915 = to_i915(drm);
-	struct i915_overlay *overlay = i915->overlay;
-	struct i915_request *rq;
-	u32 flip_addr = overlay->flip_addr;
-	u32 *cs;
-
-	drm_WARN_ON(drm, !i915_overlay_is_active(drm));
-
-	if (load_polyphase_filter)
-		flip_addr |= OFC_UPDATE;
-
-	rq = alloc_request(overlay, NULL);
-	if (IS_ERR(rq))
-		return PTR_ERR(rq);
-
-	cs = intel_ring_begin(rq, 2);
-	if (IS_ERR(cs)) {
-		i915_request_add(rq);
-		return PTR_ERR(cs);
-	}
-
-	*cs++ = MI_OVERLAY_FLIP | MI_OVERLAY_CONTINUE;
-	*cs++ = flip_addr;
-	intel_ring_advance(rq, cs);
-
-	i915_overlay_flip_prepare(overlay, vma);
-	i915_request_add(rq);
-
-	return 0;
-}
-
-static void i915_overlay_release_old_vma(struct i915_overlay *overlay)
-{
-	struct drm_i915_private *i915 = overlay->i915;
-	struct intel_display *display = i915->display;
-	struct i915_vma *vma;
-
-	vma = fetch_and_zero(&overlay->old_vma);
-	if (drm_WARN_ON(&i915->drm, !vma))
-		return;
-
-	intel_frontbuffer_flip(display, overlay->frontbuffer_bits);
-
-	i915_vma_unpin(vma);
-	i915_vma_put(vma);
-}
-
-static void i915_overlay_release_old_vid_tail(struct i915_overlay *overlay)
-{
-	i915_overlay_release_old_vma(overlay);
-}
-
-static void i915_overlay_off_tail(struct i915_overlay *overlay)
-{
-	struct drm_i915_private *i915 = overlay->i915;
-
-	i915_overlay_release_old_vma(overlay);
-
-	overlay->frontbuffer_bits = 0;
-
-	if (IS_I830(i915))
-		i830_overlay_clock_gating(i915, true);
-}
-
-static void i915_overlay_last_flip_retire(struct i915_active *active)
-{
-	struct i915_overlay *overlay =
-		container_of(active, typeof(*overlay), last_flip);
-
-	if (overlay->flip_complete)
-		overlay->flip_complete(overlay);
-}
-
-/* overlay needs to be disabled in OCMD reg */
-static int i915_overlay_off(struct drm_device *drm)
-{
-	struct drm_i915_private *i915 = to_i915(drm);
-	struct i915_overlay *overlay = i915->overlay;
-	struct i915_request *rq;
-	u32 *cs, flip_addr = overlay->flip_addr;
-
-	drm_WARN_ON(drm, !i915_overlay_is_active(drm));
-
-	/*
-	 * According to intel docs the overlay hw may hang (when switching
-	 * off) without loading the filter coeffs. It is however unclear whether
-	 * this applies to the disabling of the overlay or to the switching off
-	 * of the hw. Do it in both cases.
-	 */
-	flip_addr |= OFC_UPDATE;
-
-	rq = alloc_request(overlay, i915_overlay_off_tail);
-	if (IS_ERR(rq))
-		return PTR_ERR(rq);
-
-	cs = intel_ring_begin(rq, 6);
-	if (IS_ERR(cs)) {
-		i915_request_add(rq);
-		return PTR_ERR(cs);
-	}
-
-	/* wait for overlay to go idle */
-	*cs++ = MI_OVERLAY_FLIP | MI_OVERLAY_CONTINUE;
-	*cs++ = flip_addr;
-	*cs++ = MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP;
-
-	/* turn overlay off */
-	*cs++ = MI_OVERLAY_FLIP | MI_OVERLAY_OFF;
-	*cs++ = flip_addr;
-	*cs++ = MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP;
-
-	intel_ring_advance(rq, cs);
-
-	i915_overlay_flip_prepare(overlay, NULL);
-	i915_request_add(rq);
-
-	return i915_active_wait(&overlay->last_flip);
-}
-
-/*
- * Recover from an interruption due to a signal.
- * We have to be careful not to repeat work forever an make forward progress.
- */
-static int i915_overlay_recover_from_interrupt(struct drm_device *drm)
-{
-	struct drm_i915_private *i915 = to_i915(drm);
-	struct i915_overlay *overlay = i915->overlay;
-
-	return i915_active_wait(&overlay->last_flip);
-}
-
-/*
- * Wait for pending overlay flip and release old frame.
- * Needs to be called before the overlay register are changed
- * via intel_overlay_(un)map_regs.
- */
-static int i915_overlay_release_old_vid(struct drm_device *drm)
-{
-	struct drm_i915_private *i915 = to_i915(drm);
-	struct i915_overlay *overlay = i915->overlay;
-	struct i915_request *rq;
-	u32 *cs;
-
-	/*
-	 * Only wait if there is actually an old frame to release to
-	 * guarantee forward progress.
-	 */
-	if (!overlay->old_vma)
-		return 0;
-
-	if (!(intel_uncore_read(&i915->uncore, GEN2_ISR) & I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT)) {
-		i915_overlay_release_old_vid_tail(overlay);
-		return 0;
-	}
-
-	rq = alloc_request(overlay, i915_overlay_release_old_vid_tail);
-	if (IS_ERR(rq))
-		return PTR_ERR(rq);
-
-	cs = intel_ring_begin(rq, 2);
-	if (IS_ERR(cs)) {
-		i915_request_add(rq);
-		return PTR_ERR(cs);
-	}
-
-	*cs++ = MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP;
-	*cs++ = MI_NOOP;
-	intel_ring_advance(rq, cs);
-
-	i915_request_add(rq);
-
-	return i915_active_wait(&overlay->last_flip);
-}
-
-static void i915_overlay_reset(struct drm_device *drm)
-{
-	struct drm_i915_private *i915 = to_i915(drm);
-	struct i915_overlay *overlay = i915->overlay;
-
-	if (!overlay)
-		return;
-
-	overlay->frontbuffer_bits = 0;
-}
-
 void intel_overlay_reset(struct intel_display *display)
 {
 	struct intel_overlay *overlay = display->overlay;
@@ -796,43 +461,6 @@ static u32 overlay_cmd_reg(struct drm_intel_overlay_put_image *params)
 	return cmd;
 }
 
-static struct i915_vma *i915_overlay_pin_fb(struct drm_device *drm,
-					    struct drm_gem_object *obj,
-					    u32 *offset)
-{
-	struct drm_i915_gem_object *new_bo = to_intel_bo(obj);
-	struct i915_gem_ww_ctx ww;
-	struct i915_vma *vma;
-	int ret;
-
-	i915_gem_ww_ctx_init(&ww, true);
-retry:
-	ret = i915_gem_object_lock(new_bo, &ww);
-	if (!ret) {
-		vma = i915_gem_object_pin_to_display_plane(new_bo, &ww, 0, 0,
-							   NULL, PIN_MAPPABLE);
-		ret = PTR_ERR_OR_ZERO(vma);
-	}
-	if (ret == -EDEADLK) {
-		ret = i915_gem_ww_ctx_backoff(&ww);
-		if (!ret)
-			goto retry;
-	}
-	i915_gem_ww_ctx_fini(&ww);
-	if (ret)
-		return ERR_PTR(ret);
-
-	*offset = i915_ggtt_offset(vma);
-
-	return vma;
-}
-
-static void i915_overlay_unpin_fb(struct drm_device *drm,
-				  struct i915_vma *vma)
-{
-	i915_vma_unpin(vma);
-}
-
 static int intel_overlay_do_put_image(struct intel_overlay *overlay,
 				      struct drm_gem_object *obj,
 				      struct drm_intel_overlay_put_image *params)
@@ -1164,26 +792,6 @@ static int check_overlay_src(struct intel_display *display,
 	return 0;
 }
 
-static struct drm_gem_object *
-i915_overlay_obj_lookup(struct drm_device *drm,
-			struct drm_file *file_priv,
-			u32 handle)
-{
-	struct drm_i915_gem_object *bo;
-
-	bo = i915_gem_object_lookup(file_priv, handle);
-	if (!bo)
-		return ERR_PTR(-ENOENT);
-
-	if (i915_gem_object_is_tiled(bo)) {
-		drm_dbg(drm, "buffer used for overlay image can not be tiled\n");
-		i915_gem_object_put(bo);
-		return ERR_PTR(-EINVAL);
-	}
-
-	return intel_bo_to_drm_bo(bo);
-}
-
 int intel_overlay_put_image_ioctl(struct drm_device *dev, void *data,
 				  struct drm_file *file_priv)
 {
@@ -1416,78 +1024,6 @@ int intel_overlay_attrs_ioctl(struct drm_device *dev, void *data,
 	return ret;
 }
 
-static int get_registers(struct i915_overlay *overlay, bool use_phys)
-{
-	struct drm_i915_private *i915 = overlay->i915;
-	struct drm_i915_gem_object *obj;
-	struct i915_vma *vma;
-	int err;
-
-	obj = i915_gem_object_create_stolen(i915, PAGE_SIZE);
-	if (IS_ERR(obj))
-		obj = i915_gem_object_create_internal(i915, PAGE_SIZE);
-	if (IS_ERR(obj))
-		return PTR_ERR(obj);
-
-	vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, PIN_MAPPABLE);
-	if (IS_ERR(vma)) {
-		err = PTR_ERR(vma);
-		goto err_put_bo;
-	}
-
-	if (use_phys)
-		overlay->flip_addr = sg_dma_address(obj->mm.pages->sgl);
-	else
-		overlay->flip_addr = i915_ggtt_offset(vma);
-	overlay->regs = i915_vma_pin_iomap(vma);
-	i915_vma_unpin(vma);
-
-	if (IS_ERR(overlay->regs)) {
-		err = PTR_ERR(overlay->regs);
-		goto err_put_bo;
-	}
-
-	overlay->reg_bo = obj;
-	return 0;
-
-err_put_bo:
-	i915_gem_object_put(obj);
-	return err;
-}
-
-static void __iomem *i915_overlay_setup(struct drm_device *drm,
-					bool needs_physical)
-{
-	struct drm_i915_private *i915 = to_i915(drm);
-	struct intel_engine_cs *engine;
-	struct i915_overlay *overlay;
-	int ret;
-
-	engine = to_gt(i915)->engine[RCS0];
-	if (!engine || !engine->kernel_context)
-		return ERR_PTR(-ENOENT);
-
-	overlay = kzalloc_obj(*overlay);
-	if (!overlay)
-		return ERR_PTR(-ENOMEM);
-
-	overlay->i915 = i915;
-	overlay->context = engine->kernel_context;
-
-	i915_active_init(&overlay->last_flip,
-			 NULL, i915_overlay_last_flip_retire, 0);
-
-	ret = get_registers(overlay, needs_physical);
-	if (ret) {
-		kfree(overlay);
-		return ERR_PTR(ret);
-	}
-
-	i915->overlay = overlay;
-
-	return overlay->regs;
-}
-
 void intel_overlay_setup(struct intel_display *display)
 {
 	struct intel_overlay *overlay;
@@ -1530,28 +1066,6 @@ bool intel_overlay_available(struct intel_display *display)
 	return display->overlay;
 }
 
-static void i915_overlay_cleanup(struct drm_device *drm)
-{
-	struct drm_i915_private *i915 = to_i915(drm);
-	struct i915_overlay *overlay;
-
-	overlay = fetch_and_zero(&i915->overlay);
-	if (!overlay)
-		return;
-
-	/*
-	 * The bo's should be free'd by the generic code already.
-	 * Furthermore modesetting teardown happens beforehand so the
-	 * hardware should be off already.
-	 */
-	drm_WARN_ON(drm, i915_overlay_is_active(drm));
-
-	i915_gem_object_put(overlay->reg_bo);
-	i915_active_fini(&overlay->last_flip);
-
-	kfree(overlay);
-}
-
 void intel_overlay_cleanup(struct intel_display *display)
 {
 	i915_overlay_cleanup(display->drm);
diff --git a/drivers/gpu/drm/i915/i915_overlay.c b/drivers/gpu/drm/i915/i915_overlay.c
new file mode 100644
index 000000000000..61869747c6bb
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_overlay.c
@@ -0,0 +1,500 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright 2026, Intel Corporation.
+ */
+
+#include <drm/drm_print.h>
+
+#include <drm/intel/intel_gmd_interrupt_regs.h>
+
+#include "gem/i915_gem_internal.h"
+#include "gem/i915_gem_object_frontbuffer.h"
+#include "gem/i915_gem_pm.h"
+
+#include "gt/intel_gpu_commands.h"
+#include "gt/intel_ring.h"
+
+#include "i915_drv.h"
+#include "i915_overlay.h"
+#include "i915_reg.h"
+#include "intel_pci_config.h"
+
+#include "display/intel_frontbuffer.h"
+
+/* overlay flip addr flag */
+#define OFC_UPDATE		0x1
+
+struct i915_overlay {
+	struct drm_i915_private *i915;
+	struct intel_context *context;
+	struct i915_vma *vma;
+	struct i915_vma *old_vma;
+	struct intel_frontbuffer *frontbuffer;
+	/* register access */
+	struct drm_i915_gem_object *reg_bo;
+	void __iomem *regs;
+	u32 flip_addr;
+	u32 frontbuffer_bits;
+	/* flip handling */
+	struct i915_active last_flip;
+	void (*flip_complete)(struct i915_overlay *overlay);
+};
+
+static void i830_overlay_clock_gating(struct drm_i915_private *i915,
+				      bool enable)
+{
+	struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
+	u8 val;
+
+	/*
+	 * WA_OVERLAY_CLKGATE:alm
+	 *
+	 * FIXME should perhaps be done on the display side?
+	 */
+	if (enable)
+		intel_uncore_write(&i915->uncore, DSPCLK_GATE_D, 0);
+	else
+		intel_uncore_write(&i915->uncore, DSPCLK_GATE_D, OVRUNIT_CLOCK_GATE_DISABLE);
+
+	/* WA_DISABLE_L2CACHE_CLOCK_GATING:alm */
+	pci_bus_read_config_byte(pdev->bus,
+				 PCI_DEVFN(0, 0), I830_CLOCK_GATE, &val);
+	if (enable)
+		val &= ~I830_L2_CACHE_CLOCK_GATE_DISABLE;
+	else
+		val |= I830_L2_CACHE_CLOCK_GATE_DISABLE;
+	pci_bus_write_config_byte(pdev->bus,
+				  PCI_DEVFN(0, 0), I830_CLOCK_GATE, val);
+}
+
+static struct i915_request *
+alloc_request(struct i915_overlay *overlay, void (*fn)(struct i915_overlay *))
+{
+	struct i915_request *rq;
+	int err;
+
+	overlay->flip_complete = fn;
+
+	rq = i915_request_create(overlay->context);
+	if (IS_ERR(rq))
+		return rq;
+
+	err = i915_active_add_request(&overlay->last_flip, rq);
+	if (err) {
+		i915_request_add(rq);
+		return ERR_PTR(err);
+	}
+
+	return rq;
+}
+
+bool i915_overlay_is_active(struct drm_device *drm)
+{
+	struct drm_i915_private *i915 = to_i915(drm);
+	struct i915_overlay *overlay = i915->overlay;
+
+	return overlay->frontbuffer_bits;
+}
+
+/* overlay needs to be disable in OCMD reg */
+int i915_overlay_on(struct drm_device *drm,
+		    u32 frontbuffer_bits)
+{
+	struct drm_i915_private *i915 = to_i915(drm);
+	struct i915_overlay *overlay = i915->overlay;
+	struct i915_request *rq;
+	u32 *cs;
+
+	drm_WARN_ON(drm, i915_overlay_is_active(drm));
+
+	rq = alloc_request(overlay, NULL);
+	if (IS_ERR(rq))
+		return PTR_ERR(rq);
+
+	cs = intel_ring_begin(rq, 4);
+	if (IS_ERR(cs)) {
+		i915_request_add(rq);
+		return PTR_ERR(cs);
+	}
+
+	overlay->frontbuffer_bits = frontbuffer_bits;
+
+	if (IS_I830(i915))
+		i830_overlay_clock_gating(i915, false);
+
+	*cs++ = MI_OVERLAY_FLIP | MI_OVERLAY_ON;
+	*cs++ = overlay->flip_addr | OFC_UPDATE;
+	*cs++ = MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP;
+	*cs++ = MI_NOOP;
+	intel_ring_advance(rq, cs);
+
+	i915_request_add(rq);
+
+	return i915_active_wait(&overlay->last_flip);
+}
+
+static void i915_overlay_flip_prepare(struct i915_overlay *overlay,
+				      struct i915_vma *vma)
+{
+	struct drm_i915_private *i915 = overlay->i915;
+	struct intel_frontbuffer *frontbuffer = NULL;
+
+	drm_WARN_ON(&i915->drm, overlay->old_vma);
+
+	if (vma)
+		frontbuffer = intel_frontbuffer_get(intel_bo_to_drm_bo(vma->obj));
+
+	intel_frontbuffer_track(overlay->frontbuffer, frontbuffer,
+				overlay->frontbuffer_bits);
+
+	if (overlay->frontbuffer)
+		intel_frontbuffer_put(overlay->frontbuffer);
+	overlay->frontbuffer = frontbuffer;
+
+	overlay->old_vma = overlay->vma;
+	if (vma)
+		overlay->vma = i915_vma_get(vma);
+	else
+		overlay->vma = NULL;
+}
+
+/* overlay needs to be enabled in OCMD reg */
+int i915_overlay_continue(struct drm_device *drm,
+			  struct i915_vma *vma,
+			  bool load_polyphase_filter)
+{
+	struct drm_i915_private *i915 = to_i915(drm);
+	struct i915_overlay *overlay = i915->overlay;
+	struct i915_request *rq;
+	u32 flip_addr = overlay->flip_addr;
+	u32 *cs;
+
+	drm_WARN_ON(drm, !i915_overlay_is_active(drm));
+
+	if (load_polyphase_filter)
+		flip_addr |= OFC_UPDATE;
+
+	rq = alloc_request(overlay, NULL);
+	if (IS_ERR(rq))
+		return PTR_ERR(rq);
+
+	cs = intel_ring_begin(rq, 2);
+	if (IS_ERR(cs)) {
+		i915_request_add(rq);
+		return PTR_ERR(cs);
+	}
+
+	*cs++ = MI_OVERLAY_FLIP | MI_OVERLAY_CONTINUE;
+	*cs++ = flip_addr;
+	intel_ring_advance(rq, cs);
+
+	i915_overlay_flip_prepare(overlay, vma);
+	i915_request_add(rq);
+
+	return 0;
+}
+
+static void i915_overlay_release_old_vma(struct i915_overlay *overlay)
+{
+	struct drm_i915_private *i915 = overlay->i915;
+	struct intel_display *display = i915->display;
+	struct i915_vma *vma;
+
+	vma = fetch_and_zero(&overlay->old_vma);
+	if (drm_WARN_ON(&i915->drm, !vma))
+		return;
+
+	intel_frontbuffer_flip(display, overlay->frontbuffer_bits);
+
+	i915_vma_unpin(vma);
+	i915_vma_put(vma);
+}
+
+static void i915_overlay_release_old_vid_tail(struct i915_overlay *overlay)
+{
+	i915_overlay_release_old_vma(overlay);
+}
+
+static void i915_overlay_off_tail(struct i915_overlay *overlay)
+{
+	struct drm_i915_private *i915 = overlay->i915;
+
+	i915_overlay_release_old_vma(overlay);
+
+	overlay->frontbuffer_bits = 0;
+
+	if (IS_I830(i915))
+		i830_overlay_clock_gating(i915, true);
+}
+
+static void i915_overlay_last_flip_retire(struct i915_active *active)
+{
+	struct i915_overlay *overlay =
+		container_of(active, typeof(*overlay), last_flip);
+
+	if (overlay->flip_complete)
+		overlay->flip_complete(overlay);
+}
+
+/* overlay needs to be disabled in OCMD reg */
+int i915_overlay_off(struct drm_device *drm)
+{
+	struct drm_i915_private *i915 = to_i915(drm);
+	struct i915_overlay *overlay = i915->overlay;
+	struct i915_request *rq;
+	u32 *cs, flip_addr = overlay->flip_addr;
+
+	drm_WARN_ON(drm, !i915_overlay_is_active(drm));
+
+	/*
+	 * According to intel docs the overlay hw may hang (when switching
+	 * off) without loading the filter coeffs. It is however unclear whether
+	 * this applies to the disabling of the overlay or to the switching off
+	 * of the hw. Do it in both cases.
+	 */
+	flip_addr |= OFC_UPDATE;
+
+	rq = alloc_request(overlay, i915_overlay_off_tail);
+	if (IS_ERR(rq))
+		return PTR_ERR(rq);
+
+	cs = intel_ring_begin(rq, 6);
+	if (IS_ERR(cs)) {
+		i915_request_add(rq);
+		return PTR_ERR(cs);
+	}
+
+	/* wait for overlay to go idle */
+	*cs++ = MI_OVERLAY_FLIP | MI_OVERLAY_CONTINUE;
+	*cs++ = flip_addr;
+	*cs++ = MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP;
+
+	/* turn overlay off */
+	*cs++ = MI_OVERLAY_FLIP | MI_OVERLAY_OFF;
+	*cs++ = flip_addr;
+	*cs++ = MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP;
+
+	intel_ring_advance(rq, cs);
+
+	i915_overlay_flip_prepare(overlay, NULL);
+	i915_request_add(rq);
+
+	return i915_active_wait(&overlay->last_flip);
+}
+
+/*
+ * Recover from an interruption due to a signal.
+ * We have to be careful not to repeat work forever an make forward progress.
+ */
+int i915_overlay_recover_from_interrupt(struct drm_device *drm)
+{
+	struct drm_i915_private *i915 = to_i915(drm);
+	struct i915_overlay *overlay = i915->overlay;
+
+	return i915_active_wait(&overlay->last_flip);
+}
+
+/*
+ * Wait for pending overlay flip and release old frame.
+ * Needs to be called before the overlay register are changed
+ * via intel_overlay_(un)map_regs.
+ */
+int i915_overlay_release_old_vid(struct drm_device *drm)
+{
+	struct drm_i915_private *i915 = to_i915(drm);
+	struct i915_overlay *overlay = i915->overlay;
+	struct i915_request *rq;
+	u32 *cs;
+
+	/*
+	 * Only wait if there is actually an old frame to release to
+	 * guarantee forward progress.
+	 */
+	if (!overlay->old_vma)
+		return 0;
+
+	if (!(intel_uncore_read(&i915->uncore, GEN2_ISR) & I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT)) {
+		i915_overlay_release_old_vid_tail(overlay);
+		return 0;
+	}
+
+	rq = alloc_request(overlay, i915_overlay_release_old_vid_tail);
+	if (IS_ERR(rq))
+		return PTR_ERR(rq);
+
+	cs = intel_ring_begin(rq, 2);
+	if (IS_ERR(cs)) {
+		i915_request_add(rq);
+		return PTR_ERR(cs);
+	}
+
+	*cs++ = MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP;
+	*cs++ = MI_NOOP;
+	intel_ring_advance(rq, cs);
+
+	i915_request_add(rq);
+
+	return i915_active_wait(&overlay->last_flip);
+}
+
+void i915_overlay_reset(struct drm_device *drm)
+{
+	struct drm_i915_private *i915 = to_i915(drm);
+	struct i915_overlay *overlay = i915->overlay;
+
+	if (!overlay)
+		return;
+
+	overlay->frontbuffer_bits = 0;
+}
+
+struct i915_vma *i915_overlay_pin_fb(struct drm_device *drm,
+				     struct drm_gem_object *obj,
+				     u32 *offset)
+{
+	struct drm_i915_gem_object *new_bo = to_intel_bo(obj);
+	struct i915_gem_ww_ctx ww;
+	struct i915_vma *vma;
+	int ret;
+
+	i915_gem_ww_ctx_init(&ww, true);
+retry:
+	ret = i915_gem_object_lock(new_bo, &ww);
+	if (!ret) {
+		vma = i915_gem_object_pin_to_display_plane(new_bo, &ww, 0, 0,
+							   NULL, PIN_MAPPABLE);
+		ret = PTR_ERR_OR_ZERO(vma);
+	}
+	if (ret == -EDEADLK) {
+		ret = i915_gem_ww_ctx_backoff(&ww);
+		if (!ret)
+			goto retry;
+	}
+	i915_gem_ww_ctx_fini(&ww);
+	if (ret)
+		return ERR_PTR(ret);
+
+	*offset = i915_ggtt_offset(vma);
+
+	return vma;
+}
+
+void i915_overlay_unpin_fb(struct drm_device *drm,
+			   struct i915_vma *vma)
+{
+	i915_vma_unpin(vma);
+}
+
+struct drm_gem_object *
+i915_overlay_obj_lookup(struct drm_device *drm,
+			struct drm_file *file_priv,
+			u32 handle)
+{
+	struct drm_i915_gem_object *bo;
+
+	bo = i915_gem_object_lookup(file_priv, handle);
+	if (!bo)
+		return ERR_PTR(-ENOENT);
+
+	if (i915_gem_object_is_tiled(bo)) {
+		drm_dbg(drm, "buffer used for overlay image can not be tiled\n");
+		i915_gem_object_put(bo);
+		return ERR_PTR(-EINVAL);
+	}
+
+	return intel_bo_to_drm_bo(bo);
+}
+
+static int get_registers(struct i915_overlay *overlay, bool use_phys)
+{
+	struct drm_i915_private *i915 = overlay->i915;
+	struct drm_i915_gem_object *obj;
+	struct i915_vma *vma;
+	int err;
+
+	obj = i915_gem_object_create_stolen(i915, PAGE_SIZE);
+	if (IS_ERR(obj))
+		obj = i915_gem_object_create_internal(i915, PAGE_SIZE);
+	if (IS_ERR(obj))
+		return PTR_ERR(obj);
+
+	vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, PIN_MAPPABLE);
+	if (IS_ERR(vma)) {
+		err = PTR_ERR(vma);
+		goto err_put_bo;
+	}
+
+	if (use_phys)
+		overlay->flip_addr = sg_dma_address(obj->mm.pages->sgl);
+	else
+		overlay->flip_addr = i915_ggtt_offset(vma);
+	overlay->regs = i915_vma_pin_iomap(vma);
+	i915_vma_unpin(vma);
+
+	if (IS_ERR(overlay->regs)) {
+		err = PTR_ERR(overlay->regs);
+		goto err_put_bo;
+	}
+
+	overlay->reg_bo = obj;
+	return 0;
+
+err_put_bo:
+	i915_gem_object_put(obj);
+	return err;
+}
+
+void __iomem *i915_overlay_setup(struct drm_device *drm,
+				 bool needs_physical)
+{
+	struct drm_i915_private *i915 = to_i915(drm);
+	struct intel_engine_cs *engine;
+	struct i915_overlay *overlay;
+	int ret;
+
+	engine = to_gt(i915)->engine[RCS0];
+	if (!engine || !engine->kernel_context)
+		return ERR_PTR(-ENOENT);
+
+	overlay = kzalloc_obj(*overlay);
+	if (!overlay)
+		return ERR_PTR(-ENOMEM);
+
+	overlay->i915 = i915;
+	overlay->context = engine->kernel_context;
+
+	i915_active_init(&overlay->last_flip,
+			 NULL, i915_overlay_last_flip_retire, 0);
+
+	ret = get_registers(overlay, needs_physical);
+	if (ret) {
+		kfree(overlay);
+		return ERR_PTR(ret);
+	}
+
+	i915->overlay = overlay;
+
+	return overlay->regs;
+}
+
+void i915_overlay_cleanup(struct drm_device *drm)
+{
+	struct drm_i915_private *i915 = to_i915(drm);
+	struct i915_overlay *overlay;
+
+	overlay = fetch_and_zero(&i915->overlay);
+	if (!overlay)
+		return;
+
+	/*
+	 * The bo's should be free'd by the generic code already.
+	 * Furthermore modesetting teardown happens beforehand so the
+	 * hardware should be off already.
+	 */
+	drm_WARN_ON(drm, i915_overlay_is_active(drm));
+
+	i915_gem_object_put(overlay->reg_bo);
+	i915_active_fini(&overlay->last_flip);
+
+	kfree(overlay);
+}
diff --git a/drivers/gpu/drm/i915/i915_overlay.h b/drivers/gpu/drm/i915/i915_overlay.h
new file mode 100644
index 000000000000..f553de2abeaa
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_overlay.h
@@ -0,0 +1,43 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef __I915_OVERLAY_H__
+#define __I915_OVERLAY_H__
+
+#include <linux/types.h>
+
+struct drm_device;
+struct drm_file;
+struct drm_gem_object;
+struct i915_vma;
+
+bool i915_overlay_is_active(struct drm_device *drm);
+int i915_overlay_on(struct drm_device *drm,
+		    u32 frontbuffer_bits);
+int i915_overlay_continue(struct drm_device *drm,
+			  struct i915_vma *vma,
+			  bool load_polyphase_filter);
+int i915_overlay_off(struct drm_device *drm);
+int i915_overlay_recover_from_interrupt(struct drm_device *drm);
+int i915_overlay_release_old_vid(struct drm_device *drm);
+
+void i915_overlay_reset(struct drm_device *drm);
+
+struct i915_vma *i915_overlay_pin_fb(struct drm_device *drm,
+				     struct drm_gem_object *obj,
+				     u32 *offset);
+void i915_overlay_unpin_fb(struct drm_device *drm,
+			   struct i915_vma *vma);
+
+struct drm_gem_object *
+i915_overlay_obj_lookup(struct drm_device *drm,
+			struct drm_file *file_priv,
+			u32 handle);
+
+void __iomem *i915_overlay_setup(struct drm_device *drm,
+				 bool needs_physical);
+void i915_overlay_cleanup(struct drm_device *drm);
+
+#endif /* __I915_OVERLAY_H__ */
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 784d99afde64..5d99b99b0c57 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -338,6 +338,7 @@
 #define GEN2_IER	_MMIO(0x20a0)
 #define GEN2_IIR	_MMIO(0x20a4)
 #define GEN2_IMR	_MMIO(0x20a8)
+#define GEN2_ISR	_MMIO(0x20ac)
 
 #define GEN2_IRQ_REGS		I915_IRQ_REGS(GEN2_IMR, \
 					      GEN2_IER, \
@@ -777,4 +778,7 @@
 
 #define MTL_MEDIA_GSI_BASE		0x380000
 
+#define DSPCLK_GATE_D			_MMIO(0x6200)
+# define OVRUNIT_CLOCK_GATE_DISABLE		(1 << 3)
+
 #endif /* _I915_REG_H_ */
-- 
2.52.0

[PATCH v2 19/19] drm/i915/overlay: Convert overlay to parent interface

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Convert the direct i915_overlay_*() calls from the display
side to go over a new parent interface instead.

v2: Correctly handle the ERR_PTR returned by
    i915_overlay_obj_lookup() (Jani)

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_overlay.c | 36 +++++-----
 drivers/gpu/drm/i915/display/intel_overlay.h | 30 --------
 drivers/gpu/drm/i915/display/intel_parent.c  | 76 ++++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_parent.h  | 26 +++++++
 drivers/gpu/drm/i915/i915_driver.c           |  2 +
 drivers/gpu/drm/i915/i915_overlay.c          | 57 +++++++++------
 drivers/gpu/drm/i915/i915_overlay.h          | 34 +--------
 drivers/gpu/drm/xe/Makefile                  |  1 +
 include/drm/intel/display_parent_interface.h | 33 +++++++++
 9 files changed, 194 insertions(+), 101 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
index c2d1d8c87a1f..1f233caccc17 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -30,13 +30,13 @@
 #include <drm/drm_gem.h>
 #include <drm/drm_print.h>
 
-#include "i915_overlay.h"
 #include "intel_color_regs.h"
 #include "intel_de.h"
 #include "intel_display_regs.h"
 #include "intel_display_types.h"
 #include "intel_frontbuffer.h"
 #include "intel_overlay.h"
+#include "intel_parent.h"
 #include "intel_pfit_regs.h"
 
 /* Limits for overlay size. According to intel doc, the real limits are:
@@ -199,7 +199,7 @@ void intel_overlay_reset(struct intel_display *display)
 	overlay->old_yscale = 0;
 	overlay->crtc = NULL;
 
-	i915_overlay_reset(display->drm);
+	intel_parent_overlay_reset(display);
 }
 
 static int packed_depth_bytes(u32 format)
@@ -477,19 +477,19 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
 	drm_WARN_ON(display->drm,
 		    !drm_modeset_is_locked(&display->drm->mode_config.connection_mutex));
 
-	ret = i915_overlay_release_old_vid(display->drm);
+	ret = intel_parent_overlay_release_old_vid(display);
 	if (ret != 0)
 		return ret;
 
 	atomic_inc(&display->restore.pending_fb_pin);
 
-	vma = i915_overlay_pin_fb(display->drm, obj, &offset);
+	vma = intel_parent_overlay_pin_fb(display, obj, &offset);
 	if (IS_ERR(vma)) {
 		ret = PTR_ERR(vma);
 		goto out_pin_section;
 	}
 
-	if (!i915_overlay_is_active(display->drm)) {
+	if (!intel_parent_overlay_is_active(display)) {
 		const struct intel_crtc_state *crtc_state =
 			overlay->crtc->config;
 		u32 oconfig = 0;
@@ -505,7 +505,7 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
 			OCONF_PIPE_A : OCONF_PIPE_B;
 		iowrite32(oconfig, &regs->OCONFIG);
 
-		ret = i915_overlay_on(display->drm, INTEL_FRONTBUFFER_OVERLAY(pipe));
+		ret = intel_parent_overlay_on(display, INTEL_FRONTBUFFER_OVERLAY(pipe));
 		if (ret != 0)
 			goto out_unpin;
 	}
@@ -563,14 +563,14 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
 	if (tmp & (1 << 17))
 		drm_dbg(display->drm, "overlay underrun, DOVSTA: %x\n", tmp);
 
-	ret = i915_overlay_continue(display->drm, vma, scale_changed);
+	ret = intel_parent_overlay_continue(display, vma, scale_changed);
 	if (ret)
 		goto out_unpin;
 
 	return 0;
 
 out_unpin:
-	i915_overlay_unpin_fb(display->drm, vma);
+	intel_parent_overlay_unpin_fb(display, vma);
 out_pin_section:
 	atomic_dec(&display->restore.pending_fb_pin);
 
@@ -585,14 +585,14 @@ int intel_overlay_switch_off(struct intel_overlay *overlay)
 	drm_WARN_ON(display->drm,
 		    !drm_modeset_is_locked(&display->drm->mode_config.connection_mutex));
 
-	ret = i915_overlay_recover_from_interrupt(display->drm);
+	ret = intel_parent_overlay_recover_from_interrupt(display);
 	if (ret != 0)
 		return ret;
 
-	if (!i915_overlay_is_active(display->drm))
+	if (!intel_parent_overlay_is_active(display))
 		return 0;
 
-	ret = i915_overlay_release_old_vid(display->drm);
+	ret = intel_parent_overlay_release_old_vid(display);
 	if (ret != 0)
 		return ret;
 
@@ -601,7 +601,7 @@ int intel_overlay_switch_off(struct intel_overlay *overlay)
 	overlay->crtc->overlay = NULL;
 	overlay->crtc = NULL;
 
-	return i915_overlay_off(display->drm);
+	return intel_parent_overlay_off(display);
 }
 
 static int check_overlay_possible_on_crtc(struct intel_overlay *overlay,
@@ -822,13 +822,13 @@ int intel_overlay_put_image_ioctl(struct drm_device *dev, void *data,
 		return -ENOENT;
 	crtc = to_intel_crtc(drmmode_crtc);
 
-	obj = i915_overlay_obj_lookup(dev, file_priv, params->bo_handle);
+	obj = intel_parent_overlay_obj_lookup(display, file_priv, params->bo_handle);
 	if (IS_ERR(obj))
 		return PTR_ERR(obj);
 
 	drm_modeset_lock_all(dev);
 
-	ret = i915_overlay_recover_from_interrupt(dev);
+	ret = intel_parent_overlay_recover_from_interrupt(display);
 	if (ret != 0)
 		goto out_unlock;
 
@@ -998,7 +998,7 @@ int intel_overlay_attrs_ioctl(struct drm_device *dev, void *data,
 			if (DISPLAY_VER(display) == 2)
 				goto out_unlock;
 
-			if (i915_overlay_is_active(display->drm)) {
+			if (intel_parent_overlay_is_active(display)) {
 				ret = -EBUSY;
 				goto out_unlock;
 			}
@@ -1036,8 +1036,8 @@ void intel_overlay_setup(struct intel_display *display)
 	if (!overlay)
 		return;
 
-	regs = i915_overlay_setup(display->drm,
-				  OVERLAY_NEEDS_PHYSICAL(display));
+	regs = intel_parent_overlay_setup(display,
+					  OVERLAY_NEEDS_PHYSICAL(display));
 	if (IS_ERR(regs))
 		goto out_free;
 
@@ -1068,7 +1068,7 @@ bool intel_overlay_available(struct intel_display *display)
 
 void intel_overlay_cleanup(struct intel_display *display)
 {
-	i915_overlay_cleanup(display->drm);
+	intel_parent_overlay_cleanup(display);
 
 	kfree(display->overlay);
 	display->overlay = NULL;
diff --git a/drivers/gpu/drm/i915/display/intel_overlay.h b/drivers/gpu/drm/i915/display/intel_overlay.h
index 4ef6882b9acb..a4291d6dd528 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.h
+++ b/drivers/gpu/drm/i915/display/intel_overlay.h
@@ -14,7 +14,6 @@ struct drm_printer;
 struct intel_display;
 struct intel_overlay;
 
-#ifdef I915
 void intel_overlay_setup(struct intel_display *display);
 bool intel_overlay_available(struct intel_display *display);
 void intel_overlay_cleanup(struct intel_display *display);
@@ -24,34 +23,5 @@ int intel_overlay_put_image_ioctl(struct drm_device *dev, void *data,
 int intel_overlay_attrs_ioctl(struct drm_device *dev, void *data,
 			      struct drm_file *file_priv);
 void intel_overlay_reset(struct intel_display *display);
-#else
-static inline void intel_overlay_setup(struct intel_display *display)
-{
-}
-static inline bool intel_overlay_available(struct intel_display *display)
-{
-	return false;
-}
-static inline void intel_overlay_cleanup(struct intel_display *display)
-{
-}
-static inline int intel_overlay_switch_off(struct intel_overlay *overlay)
-{
-	return 0;
-}
-static inline int intel_overlay_put_image_ioctl(struct drm_device *dev, void *data,
-						struct drm_file *file_priv)
-{
-	return 0;
-}
-static inline int intel_overlay_attrs_ioctl(struct drm_device *dev, void *data,
-					    struct drm_file *file_priv)
-{
-	return 0;
-}
-static inline void intel_overlay_reset(struct intel_display *display)
-{
-}
-#endif
 
 #endif /* __INTEL_OVERLAY_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_parent.c b/drivers/gpu/drm/i915/display/intel_parent.c
index 7f73695a0444..77c9fd259ed0 100644
--- a/drivers/gpu/drm/i915/display/intel_parent.c
+++ b/drivers/gpu/drm/i915/display/intel_parent.c
@@ -59,6 +59,82 @@ void intel_parent_irq_synchronize(struct intel_display *display)
 	display->parent->irq->synchronize(display->drm);
 }
 
+/* overlay */
+bool intel_parent_overlay_is_active(struct intel_display *display)
+{
+	return display->parent->overlay->is_active(display->drm);
+}
+
+int intel_parent_overlay_on(struct intel_display *display,
+			    u32 frontbuffer_bits)
+{
+	return display->parent->overlay->overlay_on(display->drm,
+						    frontbuffer_bits);
+}
+
+int intel_parent_overlay_continue(struct intel_display *display,
+				  struct i915_vma *vma,
+				  bool load_polyphase_filter)
+{
+	return display->parent->overlay->overlay_continue(display->drm, vma,
+							  load_polyphase_filter);
+}
+
+int intel_parent_overlay_off(struct intel_display *display)
+{
+	return display->parent->overlay->overlay_off(display->drm);
+}
+
+int intel_parent_overlay_recover_from_interrupt(struct intel_display *display)
+{
+	return display->parent->overlay->recover_from_interrupt(display->drm);
+}
+
+int intel_parent_overlay_release_old_vid(struct intel_display *display)
+{
+	return display->parent->overlay->release_old_vid(display->drm);
+}
+
+void intel_parent_overlay_reset(struct intel_display *display)
+{
+	display->parent->overlay->reset(display->drm);
+}
+
+struct i915_vma *intel_parent_overlay_pin_fb(struct intel_display *display,
+					     struct drm_gem_object *obj,
+					     u32 *offset)
+{
+	return display->parent->overlay->pin_fb(display->drm, obj, offset);
+}
+
+void intel_parent_overlay_unpin_fb(struct intel_display *display,
+				   struct i915_vma *vma)
+{
+	return display->parent->overlay->unpin_fb(display->drm, vma);
+}
+
+struct drm_gem_object *intel_parent_overlay_obj_lookup(struct intel_display *display,
+						       struct drm_file *filp,
+						       u32 handle)
+{
+	return display->parent->overlay->obj_lookup(display->drm,
+						    filp, handle);
+}
+
+void __iomem *intel_parent_overlay_setup(struct intel_display *display,
+					 bool needs_physical)
+{
+	if (drm_WARN_ON_ONCE(display->drm, !display->parent->overlay))
+		return ERR_PTR(-ENODEV);
+
+	return display->parent->overlay->setup(display->drm, needs_physical);
+}
+
+void intel_parent_overlay_cleanup(struct intel_display *display)
+{
+	display->parent->overlay->cleanup(display->drm);
+}
+
 /* panic */
 struct intel_panic *intel_parent_panic_alloc(struct intel_display *display)
 {
diff --git a/drivers/gpu/drm/i915/display/intel_parent.h b/drivers/gpu/drm/i915/display/intel_parent.h
index 04782bb26b61..91c37d68348a 100644
--- a/drivers/gpu/drm/i915/display/intel_parent.h
+++ b/drivers/gpu/drm/i915/display/intel_parent.h
@@ -7,7 +7,10 @@
 #include <linux/types.h>
 
 struct dma_fence;
+struct drm_file;
+struct drm_gem_object;
 struct drm_scanout_buffer;
+struct i915_vma;
 struct intel_display;
 struct intel_hdcp_gsc_context;
 struct intel_panic;
@@ -27,6 +30,29 @@ void intel_parent_hdcp_gsc_context_free(struct intel_display *display,
 bool intel_parent_irq_enabled(struct intel_display *display);
 void intel_parent_irq_synchronize(struct intel_display *display);
 
+/* overlay */
+bool intel_parent_overlay_is_active(struct intel_display *display);
+int intel_parent_overlay_on(struct intel_display *display,
+			    u32 frontbuffer_bits);
+int intel_parent_overlay_continue(struct intel_display *display,
+				  struct i915_vma *vma,
+				  bool load_polyphase_filter);
+int intel_parent_overlay_off(struct intel_display *display);
+int intel_parent_overlay_recover_from_interrupt(struct intel_display *display);
+int intel_parent_overlay_release_old_vid(struct intel_display *display);
+void intel_parent_overlay_reset(struct intel_display *display);
+struct i915_vma *intel_parent_overlay_pin_fb(struct intel_display *display,
+					     struct drm_gem_object *obj,
+					     u32 *offset);
+void intel_parent_overlay_unpin_fb(struct intel_display *display,
+				   struct i915_vma *vma);
+struct drm_gem_object *intel_parent_overlay_obj_lookup(struct intel_display *display,
+						       struct drm_file *filp,
+						       u32 handle);
+void __iomem *intel_parent_overlay_setup(struct intel_display *display,
+					 bool needs_physical);
+void intel_parent_overlay_cleanup(struct intel_display *display);
+
 /* panic */
 struct intel_panic *intel_parent_panic_alloc(struct intel_display *display);
 int intel_parent_panic_setup(struct intel_display *display, struct intel_panic *panic, struct drm_scanout_buffer *sb);
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index 6d8fbf845bc2..5a3b0309216f 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -106,6 +106,7 @@
 #include "i915_ioctl.h"
 #include "i915_irq.h"
 #include "i915_memcpy.h"
+#include "i915_overlay.h"
 #include "i915_panic.h"
 #include "i915_perf.h"
 #include "i915_query.h"
@@ -765,6 +766,7 @@ static const struct intel_display_parent_interface parent = {
 	.hdcp = &i915_display_hdcp_interface,
 	.initial_plane = &i915_display_initial_plane_interface,
 	.irq = &i915_display_irq_interface,
+	.overlay = &i915_display_overlay_interface,
 	.panic = &i915_display_panic_interface,
 	.pc8 = &i915_display_pc8_interface,
 	.pcode = &i915_display_pcode_interface,
diff --git a/drivers/gpu/drm/i915/i915_overlay.c b/drivers/gpu/drm/i915/i915_overlay.c
index 61869747c6bb..28518dbb5b8e 100644
--- a/drivers/gpu/drm/i915/i915_overlay.c
+++ b/drivers/gpu/drm/i915/i915_overlay.c
@@ -5,6 +5,7 @@
 
 #include <drm/drm_print.h>
 
+#include <drm/intel/display_parent_interface.h>
 #include <drm/intel/intel_gmd_interrupt_regs.h>
 
 #include "gem/i915_gem_internal.h"
@@ -88,7 +89,7 @@ alloc_request(struct i915_overlay *overlay, void (*fn)(struct i915_overlay *))
 	return rq;
 }
 
-bool i915_overlay_is_active(struct drm_device *drm)
+static bool i915_overlay_is_active(struct drm_device *drm)
 {
 	struct drm_i915_private *i915 = to_i915(drm);
 	struct i915_overlay *overlay = i915->overlay;
@@ -97,8 +98,8 @@ bool i915_overlay_is_active(struct drm_device *drm)
 }
 
 /* overlay needs to be disable in OCMD reg */
-int i915_overlay_on(struct drm_device *drm,
-		    u32 frontbuffer_bits)
+static int i915_overlay_on(struct drm_device *drm,
+			   u32 frontbuffer_bits)
 {
 	struct drm_i915_private *i915 = to_i915(drm);
 	struct i915_overlay *overlay = i915->overlay;
@@ -159,9 +160,9 @@ static void i915_overlay_flip_prepare(struct i915_overlay *overlay,
 }
 
 /* overlay needs to be enabled in OCMD reg */
-int i915_overlay_continue(struct drm_device *drm,
-			  struct i915_vma *vma,
-			  bool load_polyphase_filter)
+static int i915_overlay_continue(struct drm_device *drm,
+				 struct i915_vma *vma,
+				 bool load_polyphase_filter)
 {
 	struct drm_i915_private *i915 = to_i915(drm);
 	struct i915_overlay *overlay = i915->overlay;
@@ -210,7 +211,8 @@ static void i915_overlay_release_old_vma(struct i915_overlay *overlay)
 	i915_vma_put(vma);
 }
 
-static void i915_overlay_release_old_vid_tail(struct i915_overlay *overlay)
+static void
+i915_overlay_release_old_vid_tail(struct i915_overlay *overlay)
 {
 	i915_overlay_release_old_vma(overlay);
 }
@@ -237,7 +239,7 @@ static void i915_overlay_last_flip_retire(struct i915_active *active)
 }
 
 /* overlay needs to be disabled in OCMD reg */
-int i915_overlay_off(struct drm_device *drm)
+static int i915_overlay_off(struct drm_device *drm)
 {
 	struct drm_i915_private *i915 = to_i915(drm);
 	struct i915_overlay *overlay = i915->overlay;
@@ -286,7 +288,7 @@ int i915_overlay_off(struct drm_device *drm)
  * Recover from an interruption due to a signal.
  * We have to be careful not to repeat work forever an make forward progress.
  */
-int i915_overlay_recover_from_interrupt(struct drm_device *drm)
+static int i915_overlay_recover_from_interrupt(struct drm_device *drm)
 {
 	struct drm_i915_private *i915 = to_i915(drm);
 	struct i915_overlay *overlay = i915->overlay;
@@ -299,7 +301,7 @@ int i915_overlay_recover_from_interrupt(struct drm_device *drm)
  * Needs to be called before the overlay register are changed
  * via intel_overlay_(un)map_regs.
  */
-int i915_overlay_release_old_vid(struct drm_device *drm)
+static int i915_overlay_release_old_vid(struct drm_device *drm)
 {
 	struct drm_i915_private *i915 = to_i915(drm);
 	struct i915_overlay *overlay = i915->overlay;
@@ -337,7 +339,7 @@ int i915_overlay_release_old_vid(struct drm_device *drm)
 	return i915_active_wait(&overlay->last_flip);
 }
 
-void i915_overlay_reset(struct drm_device *drm)
+static void i915_overlay_reset(struct drm_device *drm)
 {
 	struct drm_i915_private *i915 = to_i915(drm);
 	struct i915_overlay *overlay = i915->overlay;
@@ -348,9 +350,9 @@ void i915_overlay_reset(struct drm_device *drm)
 	overlay->frontbuffer_bits = 0;
 }
 
-struct i915_vma *i915_overlay_pin_fb(struct drm_device *drm,
-				     struct drm_gem_object *obj,
-				     u32 *offset)
+static struct i915_vma *i915_overlay_pin_fb(struct drm_device *drm,
+					    struct drm_gem_object *obj,
+					    u32 *offset)
 {
 	struct drm_i915_gem_object *new_bo = to_intel_bo(obj);
 	struct i915_gem_ww_ctx ww;
@@ -379,13 +381,13 @@ struct i915_vma *i915_overlay_pin_fb(struct drm_device *drm,
 	return vma;
 }
 
-void i915_overlay_unpin_fb(struct drm_device *drm,
-			   struct i915_vma *vma)
+static void i915_overlay_unpin_fb(struct drm_device *drm,
+				  struct i915_vma *vma)
 {
 	i915_vma_unpin(vma);
 }
 
-struct drm_gem_object *
+static struct drm_gem_object *
 i915_overlay_obj_lookup(struct drm_device *drm,
 			struct drm_file *file_priv,
 			u32 handle)
@@ -444,8 +446,8 @@ static int get_registers(struct i915_overlay *overlay, bool use_phys)
 	return err;
 }
 
-void __iomem *i915_overlay_setup(struct drm_device *drm,
-				 bool needs_physical)
+static void __iomem *i915_overlay_setup(struct drm_device *drm,
+					bool needs_physical)
 {
 	struct drm_i915_private *i915 = to_i915(drm);
 	struct intel_engine_cs *engine;
@@ -477,7 +479,7 @@ void __iomem *i915_overlay_setup(struct drm_device *drm,
 	return overlay->regs;
 }
 
-void i915_overlay_cleanup(struct drm_device *drm)
+static void i915_overlay_cleanup(struct drm_device *drm)
 {
 	struct drm_i915_private *i915 = to_i915(drm);
 	struct i915_overlay *overlay;
@@ -498,3 +500,18 @@ void i915_overlay_cleanup(struct drm_device *drm)
 
 	kfree(overlay);
 }
+
+const struct intel_display_overlay_interface i915_display_overlay_interface = {
+	.is_active = i915_overlay_is_active,
+	.overlay_on = i915_overlay_on,
+	.overlay_continue = i915_overlay_continue,
+	.overlay_off = i915_overlay_off,
+	.recover_from_interrupt = i915_overlay_recover_from_interrupt,
+	.release_old_vid = i915_overlay_release_old_vid,
+	.reset = i915_overlay_reset,
+	.obj_lookup = i915_overlay_obj_lookup,
+	.pin_fb = i915_overlay_pin_fb,
+	.unpin_fb = i915_overlay_unpin_fb,
+	.setup = i915_overlay_setup,
+	.cleanup = i915_overlay_cleanup,
+};
diff --git a/drivers/gpu/drm/i915/i915_overlay.h b/drivers/gpu/drm/i915/i915_overlay.h
index f553de2abeaa..f8053eb8d189 100644
--- a/drivers/gpu/drm/i915/i915_overlay.h
+++ b/drivers/gpu/drm/i915/i915_overlay.h
@@ -6,38 +6,6 @@
 #ifndef __I915_OVERLAY_H__
 #define __I915_OVERLAY_H__
 
-#include <linux/types.h>
-
-struct drm_device;
-struct drm_file;
-struct drm_gem_object;
-struct i915_vma;
-
-bool i915_overlay_is_active(struct drm_device *drm);
-int i915_overlay_on(struct drm_device *drm,
-		    u32 frontbuffer_bits);
-int i915_overlay_continue(struct drm_device *drm,
-			  struct i915_vma *vma,
-			  bool load_polyphase_filter);
-int i915_overlay_off(struct drm_device *drm);
-int i915_overlay_recover_from_interrupt(struct drm_device *drm);
-int i915_overlay_release_old_vid(struct drm_device *drm);
-
-void i915_overlay_reset(struct drm_device *drm);
-
-struct i915_vma *i915_overlay_pin_fb(struct drm_device *drm,
-				     struct drm_gem_object *obj,
-				     u32 *offset);
-void i915_overlay_unpin_fb(struct drm_device *drm,
-			   struct i915_vma *vma);
-
-struct drm_gem_object *
-i915_overlay_obj_lookup(struct drm_device *drm,
-			struct drm_file *file_priv,
-			u32 handle);
-
-void __iomem *i915_overlay_setup(struct drm_device *drm,
-				 bool needs_physical);
-void i915_overlay_cleanup(struct drm_device *drm);
+extern const struct intel_display_overlay_interface i915_display_overlay_interface;
 
 #endif /* __I915_OVERLAY_H__ */
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 41ec698b3cc1..119e830498a8 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -304,6 +304,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
 	i915-display/intel_modeset_lock.o \
 	i915-display/intel_modeset_setup.o \
 	i915-display/intel_modeset_verify.o \
+	i915-display/intel_overlay.o \
 	i915-display/intel_panel.o \
 	i915-display/intel_parent.o \
 	i915-display/intel_pch.o \
diff --git a/include/drm/intel/display_parent_interface.h b/include/drm/intel/display_parent_interface.h
index 41f4afe7928c..8b248b914b88 100644
--- a/include/drm/intel/display_parent_interface.h
+++ b/include/drm/intel/display_parent_interface.h
@@ -9,6 +9,7 @@
 struct dma_fence;
 struct drm_crtc;
 struct drm_device;
+struct drm_file;
 struct drm_framebuffer;
 struct drm_gem_object;
 struct drm_plane_state;
@@ -55,6 +56,35 @@ struct intel_display_irq_interface {
 	void (*synchronize)(struct drm_device *drm);
 };
 
+struct intel_display_overlay_interface {
+	bool (*is_active)(struct drm_device *drm);
+
+	int (*overlay_on)(struct drm_device *drm,
+			  u32 frontbuffer_bits);
+	int (*overlay_continue)(struct drm_device *drm,
+				struct i915_vma *vma,
+				bool load_polyphase_filter);
+	int (*overlay_off)(struct drm_device *drm);
+	int (*recover_from_interrupt)(struct drm_device *drm);
+	int (*release_old_vid)(struct drm_device *drm);
+
+	void (*reset)(struct drm_device *drm);
+
+	struct i915_vma *(*pin_fb)(struct drm_device *drm,
+				   struct drm_gem_object *obj,
+				   u32 *offset);
+	void (*unpin_fb)(struct drm_device *drm,
+			 struct i915_vma *vma);
+
+	struct drm_gem_object *(*obj_lookup)(struct drm_device *drm,
+					     struct drm_file *filp,
+					     u32 handle);
+
+	void __iomem *(*setup)(struct drm_device *drm,
+			       bool needs_physical);
+	void (*cleanup)(struct drm_device *drm);
+};
+
 struct intel_display_panic_interface {
 	struct intel_panic *(*alloc)(void);
 	int (*setup)(struct intel_panic *panic, struct drm_scanout_buffer *sb);
@@ -139,6 +169,9 @@ struct intel_display_parent_interface {
 	/** @panic: Panic interface */
 	const struct intel_display_panic_interface *panic;
 
+	/** @overlay: Overlay. Optional. */
+	const struct intel_display_overlay_interface *overlay;
+
 	/** @pc8: PC8 interface. Optional. */
 	const struct intel_display_pc8_interface *pc8;
 
-- 
2.52.0

✗ CI.checkpatch: warning for drm/i915/overlay: Convert to parent interface (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/overlay: Convert to parent interface (rev2)
URL   : https://patchwork.freedesktop.org/series/161766/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
1f57ba1afceae32108bd24770069f764d940a0e4
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit d1ef2da9da3b9fabd000e4c181fd1d025a38bcb6
Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date:   Thu Feb 26 12:07:38 2026 +0200

    drm/i915/overlay: Convert overlay to parent interface
    
    Convert the direct i915_overlay_*() calls from the display
    side to go over a new parent interface instead.
    
    v2: Correctly handle the ERR_PTR returned by
        i915_overlay_obj_lookup() (Jani)
    
    Reviewed-by: Jani Nikula <jani.nikula@intel.com>
    Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
+ /mt/dim checkpatch f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440 drm-intel
e0e3b03bc996 drm/i915/overlay: Remove GPU hang snapshot stuff
59184fa147cd drm/i915/overlay: Track current frontbuffer_bits
0ac34d572227 drm/i915/overlay: Extract i915_overlay_is_active()
02a4224d9562 drm/i915/overlay: Remove redundant overlay->active
85cd0b8cd43f drm/i915/overlay: Relocate the underrun check
aa73131b389d drm/i915/overlay: Introduce i915_overlay_obj_lookup()
b0ad9f115000 drm/i915/overlay: Use struct drm_gem_object as the type
25441806684a drm/i915/overlay: Extract i915_overlay_reset()
da32daa23fcd drm/i915/overlay: Extract i915_overlay_setup()
7c36dd685998 drm/i915/overlay: Extract i915_overlay_cleanup()
0337c3dc0f9c drm/i915/overlay: Abstract buffer (un)pinning
16fa7ac5305c drm/i915/overlay: Rename low level i915 specific functions
3893a01ed68e drm/i915/overlay: Adjust i915 specific interfaces
75b8b1a6caa0 drm/i915/overlay: Make i830_overlay_clock_gating() i915 specific
c5189db5bd07 drm/i915/overlay: s/dev_priv/i915/
2e8c47a7367b drm/i915/overlay: Split 'struct intel_overlay'
-:212: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#212: FILE: drivers/gpu/drm/i915/display/intel_overlay.c:491:
+	if (!(intel_uncore_read(&i915->uncore, GEN2_ISR) & I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT)) {

total: 0 errors, 1 warnings, 0 checks, 311 lines checked
5a1b4c5bcc59 drm/i915/overlay: Don't use fetch_and_zero() in display code
9c1820b5dd66 drm/i915/overlay: Move i915 specific code into i915_overlay.c
-:608: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#608: 
new file mode 100644

-:928: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#928: FILE: drivers/gpu/drm/i915/i915_overlay.c:316:
+	if (!(intel_uncore_read(&i915->uncore, GEN2_ISR) & I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT)) {

total: 0 errors, 2 warnings, 0 checks, 1118 lines checked
d1ef2da9da3b drm/i915/overlay: Convert overlay to parent interface

✓ CI.KUnit: success for drm/i915/overlay: Convert to parent interface (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/overlay: Convert to parent interface (rev2)
URL   : https://patchwork.freedesktop.org/series/161766/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[10:15:16] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:15:20] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:15:51] Starting KUnit Kernel (1/1)...
[10:15:51] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:15:51] ================== guc_buf (11 subtests) ===================
[10:15:51] [PASSED] test_smallest
[10:15:51] [PASSED] test_largest
[10:15:51] [PASSED] test_granular
[10:15:51] [PASSED] test_unique
[10:15:51] [PASSED] test_overlap
[10:15:51] [PASSED] test_reusable
[10:15:51] [PASSED] test_too_big
[10:15:51] [PASSED] test_flush
[10:15:51] [PASSED] test_lookup
[10:15:51] [PASSED] test_data
[10:15:51] [PASSED] test_class
[10:15:51] ===================== [PASSED] guc_buf =====================
[10:15:51] =================== guc_dbm (7 subtests) ===================
[10:15:51] [PASSED] test_empty
[10:15:51] [PASSED] test_default
[10:15:51] ======================== test_size  ========================
[10:15:51] [PASSED] 4
[10:15:51] [PASSED] 8
[10:15:51] [PASSED] 32
[10:15:51] [PASSED] 256
[10:15:51] ==================== [PASSED] test_size ====================
[10:15:51] ======================= test_reuse  ========================
[10:15:51] [PASSED] 4
[10:15:51] [PASSED] 8
[10:15:51] [PASSED] 32
[10:15:51] [PASSED] 256
[10:15:51] =================== [PASSED] test_reuse ====================
[10:15:51] =================== test_range_overlap  ====================
[10:15:51] [PASSED] 4
[10:15:51] [PASSED] 8
[10:15:51] [PASSED] 32
[10:15:51] [PASSED] 256
[10:15:51] =============== [PASSED] test_range_overlap ================
[10:15:51] =================== test_range_compact  ====================
[10:15:51] [PASSED] 4
[10:15:51] [PASSED] 8
[10:15:51] [PASSED] 32
[10:15:51] [PASSED] 256
[10:15:51] =============== [PASSED] test_range_compact ================
[10:15:51] ==================== test_range_spare  =====================
[10:15:51] [PASSED] 4
[10:15:51] [PASSED] 8
[10:15:51] [PASSED] 32
[10:15:51] [PASSED] 256
[10:15:51] ================ [PASSED] test_range_spare =================
[10:15:51] ===================== [PASSED] guc_dbm =====================
[10:15:51] =================== guc_idm (6 subtests) ===================
[10:15:51] [PASSED] bad_init
[10:15:51] [PASSED] no_init
[10:15:51] [PASSED] init_fini
[10:15:51] [PASSED] check_used
[10:15:51] [PASSED] check_quota
[10:15:51] [PASSED] check_all
[10:15:51] ===================== [PASSED] guc_idm =====================
[10:15:51] ================== no_relay (3 subtests) ===================
[10:15:51] [PASSED] xe_drops_guc2pf_if_not_ready
[10:15:51] [PASSED] xe_drops_guc2vf_if_not_ready
[10:15:51] [PASSED] xe_rejects_send_if_not_ready
[10:15:51] ==================== [PASSED] no_relay =====================
[10:15:51] ================== pf_relay (14 subtests) ==================
[10:15:51] [PASSED] pf_rejects_guc2pf_too_short
[10:15:51] [PASSED] pf_rejects_guc2pf_too_long
[10:15:51] [PASSED] pf_rejects_guc2pf_no_payload
[10:15:51] [PASSED] pf_fails_no_payload
[10:15:51] [PASSED] pf_fails_bad_origin
[10:15:51] [PASSED] pf_fails_bad_type
[10:15:51] [PASSED] pf_txn_reports_error
[10:15:51] [PASSED] pf_txn_sends_pf2guc
[10:15:51] [PASSED] pf_sends_pf2guc
[10:15:51] [SKIPPED] pf_loopback_nop
[10:15:51] [SKIPPED] pf_loopback_echo
[10:15:51] [SKIPPED] pf_loopback_fail
[10:15:51] [SKIPPED] pf_loopback_busy
[10:15:51] [SKIPPED] pf_loopback_retry
[10:15:51] ==================== [PASSED] pf_relay =====================
[10:15:51] ================== vf_relay (3 subtests) ===================
[10:15:51] [PASSED] vf_rejects_guc2vf_too_short
[10:15:51] [PASSED] vf_rejects_guc2vf_too_long
[10:15:51] [PASSED] vf_rejects_guc2vf_no_payload
[10:15:51] ==================== [PASSED] vf_relay =====================
[10:15:51] ================ pf_gt_config (9 subtests) =================
[10:15:51] [PASSED] fair_contexts_1vf
[10:15:51] [PASSED] fair_doorbells_1vf
[10:15:51] [PASSED] fair_ggtt_1vf
[10:15:51] ====================== fair_vram_1vf  ======================
[10:15:51] [PASSED] 3.50 GiB
[10:15:51] [PASSED] 11.5 GiB
[10:15:51] [PASSED] 15.5 GiB
[10:15:51] [PASSED] 31.5 GiB
[10:15:51] [PASSED] 63.5 GiB
[10:15:51] [PASSED] 13.9 GiB
[10:15:51] ================== [PASSED] fair_vram_1vf ==================
[10:15:51] ================ fair_vram_1vf_admin_only  =================
[10:15:51] [PASSED] 3.50 GiB
[10:15:51] [PASSED] 11.5 GiB
[10:15:51] [PASSED] 15.5 GiB
[10:15:51] [PASSED] 31.5 GiB
[10:15:51] [PASSED] 63.5 GiB
[10:15:51] [PASSED] 13.9 GiB
[10:15:51] ============ [PASSED] fair_vram_1vf_admin_only =============
[10:15:51] ====================== fair_contexts  ======================
[10:15:51] [PASSED] 1 VF
[10:15:51] [PASSED] 2 VFs
[10:15:51] [PASSED] 3 VFs
[10:15:51] [PASSED] 4 VFs
[10:15:51] [PASSED] 5 VFs
[10:15:51] [PASSED] 6 VFs
[10:15:51] [PASSED] 7 VFs
[10:15:51] [PASSED] 8 VFs
[10:15:51] [PASSED] 9 VFs
[10:15:51] [PASSED] 10 VFs
[10:15:51] [PASSED] 11 VFs
[10:15:51] [PASSED] 12 VFs
[10:15:51] [PASSED] 13 VFs
[10:15:51] [PASSED] 14 VFs
[10:15:51] [PASSED] 15 VFs
[10:15:51] [PASSED] 16 VFs
[10:15:51] [PASSED] 17 VFs
[10:15:51] [PASSED] 18 VFs
[10:15:51] [PASSED] 19 VFs
[10:15:51] [PASSED] 20 VFs
[10:15:51] [PASSED] 21 VFs
[10:15:51] [PASSED] 22 VFs
[10:15:51] [PASSED] 23 VFs
[10:15:51] [PASSED] 24 VFs
[10:15:51] [PASSED] 25 VFs
[10:15:51] [PASSED] 26 VFs
[10:15:51] [PASSED] 27 VFs
[10:15:51] [PASSED] 28 VFs
[10:15:51] [PASSED] 29 VFs
[10:15:51] [PASSED] 30 VFs
[10:15:51] [PASSED] 31 VFs
[10:15:51] [PASSED] 32 VFs
[10:15:51] [PASSED] 33 VFs
[10:15:51] [PASSED] 34 VFs
[10:15:51] [PASSED] 35 VFs
[10:15:51] [PASSED] 36 VFs
[10:15:51] [PASSED] 37 VFs
[10:15:51] [PASSED] 38 VFs
[10:15:51] [PASSED] 39 VFs
[10:15:51] [PASSED] 40 VFs
[10:15:51] [PASSED] 41 VFs
[10:15:51] [PASSED] 42 VFs
[10:15:51] [PASSED] 43 VFs
[10:15:51] [PASSED] 44 VFs
[10:15:51] [PASSED] 45 VFs
[10:15:51] [PASSED] 46 VFs
[10:15:51] [PASSED] 47 VFs
[10:15:51] [PASSED] 48 VFs
[10:15:51] [PASSED] 49 VFs
[10:15:51] [PASSED] 50 VFs
[10:15:51] [PASSED] 51 VFs
[10:15:51] [PASSED] 52 VFs
[10:15:51] [PASSED] 53 VFs
[10:15:51] [PASSED] 54 VFs
[10:15:51] [PASSED] 55 VFs
[10:15:51] [PASSED] 56 VFs
[10:15:51] [PASSED] 57 VFs
[10:15:51] [PASSED] 58 VFs
[10:15:51] [PASSED] 59 VFs
[10:15:51] [PASSED] 60 VFs
[10:15:51] [PASSED] 61 VFs
[10:15:51] [PASSED] 62 VFs
[10:15:51] [PASSED] 63 VFs
[10:15:51] ================== [PASSED] fair_contexts ==================
[10:15:51] ===================== fair_doorbells  ======================
[10:15:51] [PASSED] 1 VF
[10:15:51] [PASSED] 2 VFs
[10:15:51] [PASSED] 3 VFs
[10:15:51] [PASSED] 4 VFs
[10:15:51] [PASSED] 5 VFs
[10:15:51] [PASSED] 6 VFs
[10:15:51] [PASSED] 7 VFs
[10:15:51] [PASSED] 8 VFs
[10:15:51] [PASSED] 9 VFs
[10:15:51] [PASSED] 10 VFs
[10:15:51] [PASSED] 11 VFs
[10:15:51] [PASSED] 12 VFs
[10:15:51] [PASSED] 13 VFs
[10:15:51] [PASSED] 14 VFs
[10:15:51] [PASSED] 15 VFs
[10:15:51] [PASSED] 16 VFs
[10:15:51] [PASSED] 17 VFs
[10:15:51] [PASSED] 18 VFs
[10:15:51] [PASSED] 19 VFs
[10:15:51] [PASSED] 20 VFs
[10:15:51] [PASSED] 21 VFs
[10:15:51] [PASSED] 22 VFs
[10:15:51] [PASSED] 23 VFs
[10:15:51] [PASSED] 24 VFs
[10:15:51] [PASSED] 25 VFs
[10:15:51] [PASSED] 26 VFs
[10:15:51] [PASSED] 27 VFs
[10:15:51] [PASSED] 28 VFs
[10:15:51] [PASSED] 29 VFs
[10:15:51] [PASSED] 30 VFs
[10:15:51] [PASSED] 31 VFs
[10:15:51] [PASSED] 32 VFs
[10:15:51] [PASSED] 33 VFs
[10:15:51] [PASSED] 34 VFs
[10:15:51] [PASSED] 35 VFs
[10:15:51] [PASSED] 36 VFs
[10:15:51] [PASSED] 37 VFs
[10:15:51] [PASSED] 38 VFs
[10:15:51] [PASSED] 39 VFs
[10:15:51] [PASSED] 40 VFs
[10:15:51] [PASSED] 41 VFs
[10:15:51] [PASSED] 42 VFs
[10:15:51] [PASSED] 43 VFs
[10:15:51] [PASSED] 44 VFs
[10:15:51] [PASSED] 45 VFs
[10:15:51] [PASSED] 46 VFs
[10:15:51] [PASSED] 47 VFs
[10:15:51] [PASSED] 48 VFs
[10:15:51] [PASSED] 49 VFs
[10:15:51] [PASSED] 50 VFs
[10:15:51] [PASSED] 51 VFs
[10:15:51] [PASSED] 52 VFs
[10:15:51] [PASSED] 53 VFs
[10:15:51] [PASSED] 54 VFs
[10:15:51] [PASSED] 55 VFs
[10:15:51] [PASSED] 56 VFs
[10:15:51] [PASSED] 57 VFs
[10:15:51] [PASSED] 58 VFs
[10:15:51] [PASSED] 59 VFs
[10:15:51] [PASSED] 60 VFs
[10:15:51] [PASSED] 61 VFs
[10:15:51] [PASSED] 62 VFs
[10:15:51] [PASSED] 63 VFs
[10:15:51] ================= [PASSED] fair_doorbells ==================
[10:15:51] ======================== fair_ggtt  ========================
[10:15:51] [PASSED] 1 VF
[10:15:51] [PASSED] 2 VFs
[10:15:51] [PASSED] 3 VFs
[10:15:51] [PASSED] 4 VFs
[10:15:51] [PASSED] 5 VFs
[10:15:51] [PASSED] 6 VFs
[10:15:51] [PASSED] 7 VFs
[10:15:51] [PASSED] 8 VFs
[10:15:51] [PASSED] 9 VFs
[10:15:51] [PASSED] 10 VFs
[10:15:51] [PASSED] 11 VFs
[10:15:51] [PASSED] 12 VFs
[10:15:51] [PASSED] 13 VFs
[10:15:51] [PASSED] 14 VFs
[10:15:51] [PASSED] 15 VFs
[10:15:51] [PASSED] 16 VFs
[10:15:51] [PASSED] 17 VFs
[10:15:51] [PASSED] 18 VFs
[10:15:51] [PASSED] 19 VFs
[10:15:51] [PASSED] 20 VFs
[10:15:51] [PASSED] 21 VFs
[10:15:51] [PASSED] 22 VFs
[10:15:51] [PASSED] 23 VFs
[10:15:51] [PASSED] 24 VFs
[10:15:51] [PASSED] 25 VFs
[10:15:51] [PASSED] 26 VFs
[10:15:51] [PASSED] 27 VFs
[10:15:51] [PASSED] 28 VFs
[10:15:51] [PASSED] 29 VFs
[10:15:51] [PASSED] 30 VFs
[10:15:51] [PASSED] 31 VFs
[10:15:51] [PASSED] 32 VFs
[10:15:51] [PASSED] 33 VFs
[10:15:51] [PASSED] 34 VFs
[10:15:51] [PASSED] 35 VFs
[10:15:51] [PASSED] 36 VFs
[10:15:51] [PASSED] 37 VFs
[10:15:51] [PASSED] 38 VFs
[10:15:51] [PASSED] 39 VFs
[10:15:51] [PASSED] 40 VFs
[10:15:51] [PASSED] 41 VFs
[10:15:51] [PASSED] 42 VFs
[10:15:51] [PASSED] 43 VFs
[10:15:51] [PASSED] 44 VFs
[10:15:51] [PASSED] 45 VFs
[10:15:51] [PASSED] 46 VFs
[10:15:51] [PASSED] 47 VFs
[10:15:51] [PASSED] 48 VFs
[10:15:51] [PASSED] 49 VFs
[10:15:51] [PASSED] 50 VFs
[10:15:51] [PASSED] 51 VFs
[10:15:51] [PASSED] 52 VFs
[10:15:51] [PASSED] 53 VFs
[10:15:51] [PASSED] 54 VFs
[10:15:51] [PASSED] 55 VFs
[10:15:51] [PASSED] 56 VFs
[10:15:51] [PASSED] 57 VFs
[10:15:51] [PASSED] 58 VFs
[10:15:51] [PASSED] 59 VFs
[10:15:51] [PASSED] 60 VFs
[10:15:51] [PASSED] 61 VFs
[10:15:51] [PASSED] 62 VFs
[10:15:51] [PASSED] 63 VFs
[10:15:51] ==================== [PASSED] fair_ggtt ====================
[10:15:51] ======================== fair_vram  ========================
[10:15:51] [PASSED] 1 VF
[10:15:51] [PASSED] 2 VFs
[10:15:51] [PASSED] 3 VFs
[10:15:51] [PASSED] 4 VFs
[10:15:51] [PASSED] 5 VFs
[10:15:51] [PASSED] 6 VFs
[10:15:51] [PASSED] 7 VFs
[10:15:51] [PASSED] 8 VFs
[10:15:51] [PASSED] 9 VFs
[10:15:51] [PASSED] 10 VFs
[10:15:51] [PASSED] 11 VFs
[10:15:51] [PASSED] 12 VFs
[10:15:51] [PASSED] 13 VFs
[10:15:51] [PASSED] 14 VFs
[10:15:51] [PASSED] 15 VFs
[10:15:51] [PASSED] 16 VFs
[10:15:51] [PASSED] 17 VFs
[10:15:51] [PASSED] 18 VFs
[10:15:51] [PASSED] 19 VFs
[10:15:51] [PASSED] 20 VFs
[10:15:51] [PASSED] 21 VFs
[10:15:51] [PASSED] 22 VFs
[10:15:51] [PASSED] 23 VFs
[10:15:51] [PASSED] 24 VFs
[10:15:51] [PASSED] 25 VFs
[10:15:51] [PASSED] 26 VFs
[10:15:51] [PASSED] 27 VFs
[10:15:51] [PASSED] 28 VFs
[10:15:51] [PASSED] 29 VFs
[10:15:51] [PASSED] 30 VFs
[10:15:51] [PASSED] 31 VFs
[10:15:51] [PASSED] 32 VFs
[10:15:51] [PASSED] 33 VFs
[10:15:51] [PASSED] 34 VFs
[10:15:51] [PASSED] 35 VFs
[10:15:51] [PASSED] 36 VFs
[10:15:51] [PASSED] 37 VFs
[10:15:51] [PASSED] 38 VFs
[10:15:51] [PASSED] 39 VFs
[10:15:51] [PASSED] 40 VFs
[10:15:51] [PASSED] 41 VFs
[10:15:51] [PASSED] 42 VFs
[10:15:51] [PASSED] 43 VFs
[10:15:51] [PASSED] 44 VFs
[10:15:51] [PASSED] 45 VFs
[10:15:51] [PASSED] 46 VFs
[10:15:51] [PASSED] 47 VFs
[10:15:51] [PASSED] 48 VFs
[10:15:51] [PASSED] 49 VFs
[10:15:51] [PASSED] 50 VFs
[10:15:51] [PASSED] 51 VFs
[10:15:51] [PASSED] 52 VFs
[10:15:51] [PASSED] 53 VFs
[10:15:51] [PASSED] 54 VFs
[10:15:51] [PASSED] 55 VFs
[10:15:51] [PASSED] 56 VFs
[10:15:51] [PASSED] 57 VFs
[10:15:51] [PASSED] 58 VFs
[10:15:51] [PASSED] 59 VFs
[10:15:51] [PASSED] 60 VFs
[10:15:51] [PASSED] 61 VFs
[10:15:51] [PASSED] 62 VFs
[10:15:51] [PASSED] 63 VFs
[10:15:51] ==================== [PASSED] fair_vram ====================
[10:15:51] ================== [PASSED] pf_gt_config ===================
[10:15:51] ===================== lmtt (1 subtest) =====================
[10:15:51] ======================== test_ops  =========================
[10:15:51] [PASSED] 2-level
[10:15:51] [PASSED] multi-level
[10:15:51] ==================== [PASSED] test_ops =====================
[10:15:51] ====================== [PASSED] lmtt =======================
[10:15:51] ================= pf_service (11 subtests) =================
[10:15:51] [PASSED] pf_negotiate_any
[10:15:51] [PASSED] pf_negotiate_base_match
[10:15:51] [PASSED] pf_negotiate_base_newer
[10:15:51] [PASSED] pf_negotiate_base_next
[10:15:51] [SKIPPED] pf_negotiate_base_older
[10:15:51] [PASSED] pf_negotiate_base_prev
[10:15:51] [PASSED] pf_negotiate_latest_match
[10:15:51] [PASSED] pf_negotiate_latest_newer
[10:15:51] [PASSED] pf_negotiate_latest_next
[10:15:51] [SKIPPED] pf_negotiate_latest_older
[10:15:51] [SKIPPED] pf_negotiate_latest_prev
[10:15:51] =================== [PASSED] pf_service ====================
[10:15:51] ================= xe_guc_g2g (2 subtests) ==================
[10:15:51] ============== xe_live_guc_g2g_kunit_default  ==============
[10:15:51] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[10:15:51] ============== xe_live_guc_g2g_kunit_allmem  ===============
[10:15:51] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[10:15:51] =================== [SKIPPED] xe_guc_g2g ===================
[10:15:51] =================== xe_mocs (2 subtests) ===================
[10:15:51] ================ xe_live_mocs_kernel_kunit  ================
[10:15:51] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[10:15:51] ================ xe_live_mocs_reset_kunit  =================
[10:15:51] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[10:15:51] ==================== [SKIPPED] xe_mocs =====================
[10:15:51] ================= xe_migrate (2 subtests) ==================
[10:15:51] ================= xe_migrate_sanity_kunit  =================
[10:15:51] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[10:15:51] ================== xe_validate_ccs_kunit  ==================
[10:15:51] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[10:15:51] =================== [SKIPPED] xe_migrate ===================
[10:15:51] ================== xe_dma_buf (1 subtest) ==================
[10:15:51] ==================== xe_dma_buf_kunit  =====================
[10:15:51] ================ [SKIPPED] xe_dma_buf_kunit ================
[10:15:51] =================== [SKIPPED] xe_dma_buf ===================
[10:15:51] ================= xe_bo_shrink (1 subtest) =================
[10:15:51] =================== xe_bo_shrink_kunit  ====================
[10:15:51] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[10:15:51] ================== [SKIPPED] xe_bo_shrink ==================
[10:15:51] ==================== xe_bo (2 subtests) ====================
[10:15:51] ================== xe_ccs_migrate_kunit  ===================
[10:15:51] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[10:15:51] ==================== xe_bo_evict_kunit  ====================
[10:15:51] =============== [SKIPPED] xe_bo_evict_kunit ================
[10:15:51] ===================== [SKIPPED] xe_bo ======================
[10:15:51] ==================== args (13 subtests) ====================
[10:15:51] [PASSED] count_args_test
[10:15:51] [PASSED] call_args_example
[10:15:51] [PASSED] call_args_test
[10:15:51] [PASSED] drop_first_arg_example
[10:15:51] [PASSED] drop_first_arg_test
[10:15:51] [PASSED] first_arg_example
[10:15:51] [PASSED] first_arg_test
[10:15:51] [PASSED] last_arg_example
[10:15:51] [PASSED] last_arg_test
[10:15:51] [PASSED] pick_arg_example
[10:15:51] [PASSED] if_args_example
[10:15:51] [PASSED] if_args_test
[10:15:51] [PASSED] sep_comma_example
[10:15:51] ====================== [PASSED] args =======================
[10:15:51] =================== xe_pci (3 subtests) ====================
[10:15:51] ==================== check_graphics_ip  ====================
[10:15:51] [PASSED] 12.00 Xe_LP
[10:15:51] [PASSED] 12.10 Xe_LP+
[10:15:51] [PASSED] 12.55 Xe_HPG
[10:15:51] [PASSED] 12.60 Xe_HPC
[10:15:51] [PASSED] 12.70 Xe_LPG
[10:15:51] [PASSED] 12.71 Xe_LPG
[10:15:51] [PASSED] 12.74 Xe_LPG+
[10:15:51] [PASSED] 20.01 Xe2_HPG
[10:15:51] [PASSED] 20.02 Xe2_HPG
[10:15:51] [PASSED] 20.04 Xe2_LPG
[10:15:51] [PASSED] 30.00 Xe3_LPG
[10:15:51] [PASSED] 30.01 Xe3_LPG
[10:15:51] [PASSED] 30.03 Xe3_LPG
[10:15:51] [PASSED] 30.04 Xe3_LPG
[10:15:51] [PASSED] 30.05 Xe3_LPG
[10:15:51] [PASSED] 35.10 Xe3p_LPG
[10:15:51] [PASSED] 35.11 Xe3p_XPC
[10:15:51] ================ [PASSED] check_graphics_ip ================
[10:15:51] ===================== check_media_ip  ======================
[10:15:51] [PASSED] 12.00 Xe_M
[10:15:51] [PASSED] 12.55 Xe_HPM
[10:15:51] [PASSED] 13.00 Xe_LPM+
[10:15:51] [PASSED] 13.01 Xe2_HPM
[10:15:51] [PASSED] 20.00 Xe2_LPM
[10:15:51] [PASSED] 30.00 Xe3_LPM
[10:15:51] [PASSED] 30.02 Xe3_LPM
[10:15:51] [PASSED] 35.00 Xe3p_LPM
[10:15:51] [PASSED] 35.03 Xe3p_HPM
[10:15:51] ================= [PASSED] check_media_ip ==================
[10:15:51] =================== check_platform_desc  ===================
[10:15:51] [PASSED] 0x9A60 (TIGERLAKE)
[10:15:51] [PASSED] 0x9A68 (TIGERLAKE)
[10:15:51] [PASSED] 0x9A70 (TIGERLAKE)
[10:15:51] [PASSED] 0x9A40 (TIGERLAKE)
[10:15:51] [PASSED] 0x9A49 (TIGERLAKE)
[10:15:51] [PASSED] 0x9A59 (TIGERLAKE)
[10:15:51] [PASSED] 0x9A78 (TIGERLAKE)
[10:15:51] [PASSED] 0x9AC0 (TIGERLAKE)
[10:15:51] [PASSED] 0x9AC9 (TIGERLAKE)
[10:15:51] [PASSED] 0x9AD9 (TIGERLAKE)
[10:15:51] [PASSED] 0x9AF8 (TIGERLAKE)
[10:15:51] [PASSED] 0x4C80 (ROCKETLAKE)
[10:15:51] [PASSED] 0x4C8A (ROCKETLAKE)
[10:15:51] [PASSED] 0x4C8B (ROCKETLAKE)
[10:15:51] [PASSED] 0x4C8C (ROCKETLAKE)
[10:15:51] [PASSED] 0x4C90 (ROCKETLAKE)
[10:15:51] [PASSED] 0x4C9A (ROCKETLAKE)
[10:15:51] [PASSED] 0x4680 (ALDERLAKE_S)
[10:15:51] [PASSED] 0x4682 (ALDERLAKE_S)
[10:15:51] [PASSED] 0x4688 (ALDERLAKE_S)
[10:15:51] [PASSED] 0x468A (ALDERLAKE_S)
[10:15:51] [PASSED] 0x468B (ALDERLAKE_S)
[10:15:51] [PASSED] 0x4690 (ALDERLAKE_S)
[10:15:51] [PASSED] 0x4692 (ALDERLAKE_S)
[10:15:51] [PASSED] 0x4693 (ALDERLAKE_S)
[10:15:51] [PASSED] 0x46A0 (ALDERLAKE_P)
[10:15:51] [PASSED] 0x46A1 (ALDERLAKE_P)
[10:15:51] [PASSED] 0x46A2 (ALDERLAKE_P)
[10:15:51] [PASSED] 0x46A3 (ALDERLAKE_P)
[10:15:51] [PASSED] 0x46A6 (ALDERLAKE_P)
[10:15:51] [PASSED] 0x46A8 (ALDERLAKE_P)
[10:15:51] [PASSED] 0x46AA (ALDERLAKE_P)
[10:15:51] [PASSED] 0x462A (ALDERLAKE_P)
[10:15:51] [PASSED] 0x4626 (ALDERLAKE_P)
[10:15:51] [PASSED] 0x4628 (ALDERLAKE_P)
[10:15:51] [PASSED] 0x46B0 (ALDERLAKE_P)
[10:15:51] [PASSED] 0x46B1 (ALDERLAKE_P)
[10:15:51] [PASSED] 0x46B2 (ALDERLAKE_P)
[10:15:51] [PASSED] 0x46B3 (ALDERLAKE_P)
[10:15:51] [PASSED] 0x46C0 (ALDERLAKE_P)
[10:15:51] [PASSED] 0x46C1 (ALDERLAKE_P)
[10:15:51] [PASSED] 0x46C2 (ALDERLAKE_P)
[10:15:51] [PASSED] 0x46C3 (ALDERLAKE_P)
[10:15:51] [PASSED] 0x46D0 (ALDERLAKE_N)
[10:15:51] [PASSED] 0x46D1 (ALDERLAKE_N)
[10:15:51] [PASSED] 0x46D2 (ALDERLAKE_N)
[10:15:51] [PASSED] 0x46D3 (ALDERLAKE_N)
[10:15:51] [PASSED] 0x46D4 (ALDERLAKE_N)
[10:15:51] [PASSED] 0xA721 (ALDERLAKE_P)
[10:15:51] [PASSED] 0xA7A1 (ALDERLAKE_P)
[10:15:51] [PASSED] 0xA7A9 (ALDERLAKE_P)
[10:15:51] [PASSED] 0xA7AC (ALDERLAKE_P)
[10:15:51] [PASSED] 0xA7AD (ALDERLAKE_P)
[10:15:51] [PASSED] 0xA720 (ALDERLAKE_P)
[10:15:51] [PASSED] 0xA7A0 (ALDERLAKE_P)
[10:15:51] [PASSED] 0xA7A8 (ALDERLAKE_P)
[10:15:51] [PASSED] 0xA7AA (ALDERLAKE_P)
[10:15:51] [PASSED] 0xA7AB (ALDERLAKE_P)
[10:15:51] [PASSED] 0xA780 (ALDERLAKE_S)
[10:15:51] [PASSED] 0xA781 (ALDERLAKE_S)
[10:15:51] [PASSED] 0xA782 (ALDERLAKE_S)
[10:15:51] [PASSED] 0xA783 (ALDERLAKE_S)
[10:15:51] [PASSED] 0xA788 (ALDERLAKE_S)
[10:15:51] [PASSED] 0xA789 (ALDERLAKE_S)
[10:15:51] [PASSED] 0xA78A (ALDERLAKE_S)
[10:15:51] [PASSED] 0xA78B (ALDERLAKE_S)
[10:15:51] [PASSED] 0x4905 (DG1)
[10:15:51] [PASSED] 0x4906 (DG1)
[10:15:51] [PASSED] 0x4907 (DG1)
[10:15:51] [PASSED] 0x4908 (DG1)
[10:15:51] [PASSED] 0x4909 (DG1)
[10:15:51] [PASSED] 0x56C0 (DG2)
[10:15:51] [PASSED] 0x56C2 (DG2)
[10:15:51] [PASSED] 0x56C1 (DG2)
[10:15:51] [PASSED] 0x7D51 (METEORLAKE)
[10:15:51] [PASSED] 0x7DD1 (METEORLAKE)
[10:15:51] [PASSED] 0x7D41 (METEORLAKE)
[10:15:51] [PASSED] 0x7D67 (METEORLAKE)
[10:15:51] [PASSED] 0xB640 (METEORLAKE)
[10:15:51] [PASSED] 0x56A0 (DG2)
[10:15:51] [PASSED] 0x56A1 (DG2)
[10:15:51] [PASSED] 0x56A2 (DG2)
[10:15:51] [PASSED] 0x56BE (DG2)
[10:15:51] [PASSED] 0x56BF (DG2)
[10:15:51] [PASSED] 0x5690 (DG2)
[10:15:51] [PASSED] 0x5691 (DG2)
[10:15:51] [PASSED] 0x5692 (DG2)
[10:15:51] [PASSED] 0x56A5 (DG2)
[10:15:51] [PASSED] 0x56A6 (DG2)
[10:15:51] [PASSED] 0x56B0 (DG2)
[10:15:51] [PASSED] 0x56B1 (DG2)
[10:15:51] [PASSED] 0x56BA (DG2)
[10:15:51] [PASSED] 0x56BB (DG2)
[10:15:51] [PASSED] 0x56BC (DG2)
[10:15:51] [PASSED] 0x56BD (DG2)
[10:15:51] [PASSED] 0x5693 (DG2)
[10:15:51] [PASSED] 0x5694 (DG2)
[10:15:51] [PASSED] 0x5695 (DG2)
[10:15:51] [PASSED] 0x56A3 (DG2)
[10:15:51] [PASSED] 0x56A4 (DG2)
[10:15:51] [PASSED] 0x56B2 (DG2)
[10:15:51] [PASSED] 0x56B3 (DG2)
[10:15:51] [PASSED] 0x5696 (DG2)
[10:15:51] [PASSED] 0x5697 (DG2)
[10:15:51] [PASSED] 0xB69 (PVC)
[10:15:51] [PASSED] 0xB6E (PVC)
[10:15:51] [PASSED] 0xBD4 (PVC)
[10:15:51] [PASSED] 0xBD5 (PVC)
[10:15:51] [PASSED] 0xBD6 (PVC)
[10:15:51] [PASSED] 0xBD7 (PVC)
[10:15:51] [PASSED] 0xBD8 (PVC)
[10:15:51] [PASSED] 0xBD9 (PVC)
[10:15:51] [PASSED] 0xBDA (PVC)
[10:15:51] [PASSED] 0xBDB (PVC)
[10:15:51] [PASSED] 0xBE0 (PVC)
[10:15:51] [PASSED] 0xBE1 (PVC)
[10:15:51] [PASSED] 0xBE5 (PVC)
[10:15:51] [PASSED] 0x7D40 (METEORLAKE)
[10:15:51] [PASSED] 0x7D45 (METEORLAKE)
[10:15:51] [PASSED] 0x7D55 (METEORLAKE)
[10:15:51] [PASSED] 0x7D60 (METEORLAKE)
[10:15:51] [PASSED] 0x7DD5 (METEORLAKE)
[10:15:51] [PASSED] 0x6420 (LUNARLAKE)
[10:15:51] [PASSED] 0x64A0 (LUNARLAKE)
[10:15:51] [PASSED] 0x64B0 (LUNARLAKE)
[10:15:51] [PASSED] 0xE202 (BATTLEMAGE)
[10:15:51] [PASSED] 0xE209 (BATTLEMAGE)
[10:15:51] [PASSED] 0xE20B (BATTLEMAGE)
[10:15:51] [PASSED] 0xE20C (BATTLEMAGE)
[10:15:51] [PASSED] 0xE20D (BATTLEMAGE)
[10:15:51] [PASSED] 0xE210 (BATTLEMAGE)
[10:15:51] [PASSED] 0xE211 (BATTLEMAGE)
[10:15:51] [PASSED] 0xE212 (BATTLEMAGE)
[10:15:51] [PASSED] 0xE216 (BATTLEMAGE)
[10:15:51] [PASSED] 0xE220 (BATTLEMAGE)
[10:15:51] [PASSED] 0xE221 (BATTLEMAGE)
[10:15:51] [PASSED] 0xE222 (BATTLEMAGE)
[10:15:51] [PASSED] 0xE223 (BATTLEMAGE)
[10:15:51] [PASSED] 0xB080 (PANTHERLAKE)
[10:15:51] [PASSED] 0xB081 (PANTHERLAKE)
[10:15:51] [PASSED] 0xB082 (PANTHERLAKE)
[10:15:51] [PASSED] 0xB083 (PANTHERLAKE)
[10:15:51] [PASSED] 0xB084 (PANTHERLAKE)
[10:15:51] [PASSED] 0xB085 (PANTHERLAKE)
[10:15:51] [PASSED] 0xB086 (PANTHERLAKE)
[10:15:51] [PASSED] 0xB087 (PANTHERLAKE)
[10:15:51] [PASSED] 0xB08F (PANTHERLAKE)
[10:15:51] [PASSED] 0xB090 (PANTHERLAKE)
[10:15:51] [PASSED] 0xB0A0 (PANTHERLAKE)
[10:15:51] [PASSED] 0xB0B0 (PANTHERLAKE)
[10:15:51] [PASSED] 0xFD80 (PANTHERLAKE)
[10:15:51] [PASSED] 0xFD81 (PANTHERLAKE)
[10:15:51] [PASSED] 0xD740 (NOVALAKE_S)
[10:15:51] [PASSED] 0xD741 (NOVALAKE_S)
[10:15:51] [PASSED] 0xD742 (NOVALAKE_S)
[10:15:51] [PASSED] 0xD743 (NOVALAKE_S)
[10:15:51] [PASSED] 0xD744 (NOVALAKE_S)
[10:15:51] [PASSED] 0xD745 (NOVALAKE_S)
[10:15:51] [PASSED] 0x674C (CRESCENTISLAND)
[10:15:51] [PASSED] 0xD750 (NOVALAKE_P)
[10:15:51] [PASSED] 0xD751 (NOVALAKE_P)
[10:15:51] [PASSED] 0xD752 (NOVALAKE_P)
[10:15:51] [PASSED] 0xD753 (NOVALAKE_P)
[10:15:51] [PASSED] 0xD754 (NOVALAKE_P)
[10:15:51] [PASSED] 0xD755 (NOVALAKE_P)
[10:15:51] [PASSED] 0xD756 (NOVALAKE_P)
[10:15:51] [PASSED] 0xD757 (NOVALAKE_P)
[10:15:51] [PASSED] 0xD75F (NOVALAKE_P)
[10:15:51] =============== [PASSED] check_platform_desc ===============
[10:15:51] ===================== [PASSED] xe_pci ======================
[10:15:51] =================== xe_rtp (2 subtests) ====================
[10:15:51] =============== xe_rtp_process_to_sr_tests  ================
[10:15:51] [PASSED] coalesce-same-reg
[10:15:51] [PASSED] no-match-no-add
[10:15:51] [PASSED] match-or
[10:15:51] [PASSED] match-or-xfail
[10:15:51] [PASSED] no-match-no-add-multiple-rules
[10:15:51] [PASSED] two-regs-two-entries
[10:15:51] [PASSED] clr-one-set-other
[10:15:51] [PASSED] set-field
[10:15:51] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[10:15:51] [PASSED] conflict-not-disjoint
[10:15:51] [PASSED] conflict-reg-type
[10:15:51] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[10:15:51] ================== xe_rtp_process_tests  ===================
[10:15:51] [PASSED] active1
[10:15:51] [PASSED] active2
[10:15:51] [PASSED] active-inactive
[10:15:51] [PASSED] inactive-active
[10:15:51] [PASSED] inactive-1st_or_active-inactive
[10:15:51] [PASSED] inactive-2nd_or_active-inactive
[10:15:51] [PASSED] inactive-last_or_active-inactive
[10:15:51] [PASSED] inactive-no_or_active-inactive
[10:15:51] ============== [PASSED] xe_rtp_process_tests ===============
[10:15:51] ===================== [PASSED] xe_rtp ======================
[10:15:51] ==================== xe_wa (1 subtest) =====================
[10:15:51] ======================== xe_wa_gt  =========================
[10:15:51] [PASSED] TIGERLAKE B0
[10:15:51] [PASSED] DG1 A0
[10:15:51] [PASSED] DG1 B0
[10:15:51] [PASSED] ALDERLAKE_S A0
[10:15:51] [PASSED] ALDERLAKE_S B0
[10:15:51] [PASSED] ALDERLAKE_S C0
[10:15:51] [PASSED] ALDERLAKE_S D0
[10:15:51] [PASSED] ALDERLAKE_P A0
[10:15:51] [PASSED] ALDERLAKE_P B0
[10:15:51] [PASSED] ALDERLAKE_P C0
[10:15:51] [PASSED] ALDERLAKE_S RPLS D0
[10:15:51] [PASSED] ALDERLAKE_P RPLU E0
[10:15:51] [PASSED] DG2 G10 C0
[10:15:51] [PASSED] DG2 G11 B1
[10:15:51] [PASSED] DG2 G12 A1
[10:15:51] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[10:15:51] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[10:15:51] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[10:15:51] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[10:15:51] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[10:15:51] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[10:15:51] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[10:15:51] ==================== [PASSED] xe_wa_gt =====================
[10:15:51] ====================== [PASSED] xe_wa ======================
[10:15:51] ============================================================
[10:15:51] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[10:15:51] Elapsed time: 35.355s total, 4.226s configuring, 30.461s building, 0.613s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[10:15:51] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:15:53] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:16:17] Starting KUnit Kernel (1/1)...
[10:16:17] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:16:17] ============ drm_test_pick_cmdline (2 subtests) ============
[10:16:17] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[10:16:17] =============== drm_test_pick_cmdline_named  ===============
[10:16:17] [PASSED] NTSC
[10:16:17] [PASSED] NTSC-J
[10:16:17] [PASSED] PAL
[10:16:17] [PASSED] PAL-M
[10:16:17] =========== [PASSED] drm_test_pick_cmdline_named ===========
[10:16:17] ============== [PASSED] drm_test_pick_cmdline ==============
[10:16:17] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[10:16:17] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[10:16:17] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[10:16:17] =========== drm_validate_clone_mode (2 subtests) ===========
[10:16:17] ============== drm_test_check_in_clone_mode  ===============
[10:16:17] [PASSED] in_clone_mode
[10:16:17] [PASSED] not_in_clone_mode
[10:16:17] ========== [PASSED] drm_test_check_in_clone_mode ===========
[10:16:17] =============== drm_test_check_valid_clones  ===============
[10:16:17] [PASSED] not_in_clone_mode
[10:16:17] [PASSED] valid_clone
[10:16:17] [PASSED] invalid_clone
[10:16:17] =========== [PASSED] drm_test_check_valid_clones ===========
[10:16:17] ============= [PASSED] drm_validate_clone_mode =============
[10:16:17] ============= drm_validate_modeset (1 subtest) =============
[10:16:17] [PASSED] drm_test_check_connector_changed_modeset
[10:16:17] ============== [PASSED] drm_validate_modeset ===============
[10:16:17] ====== drm_test_bridge_get_current_state (2 subtests) ======
[10:16:17] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[10:16:17] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[10:16:17] ======== [PASSED] drm_test_bridge_get_current_state ========
[10:16:17] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[10:16:17] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[10:16:17] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[10:16:17] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[10:16:17] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[10:16:17] ============== drm_bridge_alloc (2 subtests) ===============
[10:16:17] [PASSED] drm_test_drm_bridge_alloc_basic
[10:16:17] [PASSED] drm_test_drm_bridge_alloc_get_put
[10:16:17] ================ [PASSED] drm_bridge_alloc =================
[10:16:17] ============= drm_cmdline_parser (40 subtests) =============
[10:16:17] [PASSED] drm_test_cmdline_force_d_only
[10:16:17] [PASSED] drm_test_cmdline_force_D_only_dvi
[10:16:17] [PASSED] drm_test_cmdline_force_D_only_hdmi
[10:16:17] [PASSED] drm_test_cmdline_force_D_only_not_digital
[10:16:17] [PASSED] drm_test_cmdline_force_e_only
[10:16:17] [PASSED] drm_test_cmdline_res
[10:16:17] [PASSED] drm_test_cmdline_res_vesa
[10:16:17] [PASSED] drm_test_cmdline_res_vesa_rblank
[10:16:17] [PASSED] drm_test_cmdline_res_rblank
[10:16:17] [PASSED] drm_test_cmdline_res_bpp
[10:16:17] [PASSED] drm_test_cmdline_res_refresh
[10:16:17] [PASSED] drm_test_cmdline_res_bpp_refresh
[10:16:17] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[10:16:17] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[10:16:17] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[10:16:17] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[10:16:17] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[10:16:17] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[10:16:17] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[10:16:17] [PASSED] drm_test_cmdline_res_margins_force_on
[10:16:17] [PASSED] drm_test_cmdline_res_vesa_margins
[10:16:17] [PASSED] drm_test_cmdline_name
[10:16:17] [PASSED] drm_test_cmdline_name_bpp
[10:16:17] [PASSED] drm_test_cmdline_name_option
[10:16:17] [PASSED] drm_test_cmdline_name_bpp_option
[10:16:17] [PASSED] drm_test_cmdline_rotate_0
[10:16:17] [PASSED] drm_test_cmdline_rotate_90
[10:16:17] [PASSED] drm_test_cmdline_rotate_180
[10:16:17] [PASSED] drm_test_cmdline_rotate_270
[10:16:17] [PASSED] drm_test_cmdline_hmirror
[10:16:17] [PASSED] drm_test_cmdline_vmirror
[10:16:17] [PASSED] drm_test_cmdline_margin_options
[10:16:17] [PASSED] drm_test_cmdline_multiple_options
[10:16:17] [PASSED] drm_test_cmdline_bpp_extra_and_option
[10:16:17] [PASSED] drm_test_cmdline_extra_and_option
[10:16:17] [PASSED] drm_test_cmdline_freestanding_options
[10:16:17] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[10:16:17] [PASSED] drm_test_cmdline_panel_orientation
[10:16:17] ================ drm_test_cmdline_invalid  =================
[10:16:17] [PASSED] margin_only
[10:16:17] [PASSED] interlace_only
[10:16:17] [PASSED] res_missing_x
[10:16:17] [PASSED] res_missing_y
[10:16:17] [PASSED] res_bad_y
[10:16:17] [PASSED] res_missing_y_bpp
[10:16:17] [PASSED] res_bad_bpp
[10:16:17] [PASSED] res_bad_refresh
[10:16:17] [PASSED] res_bpp_refresh_force_on_off
[10:16:17] [PASSED] res_invalid_mode
[10:16:17] [PASSED] res_bpp_wrong_place_mode
[10:16:17] [PASSED] name_bpp_refresh
[10:16:17] [PASSED] name_refresh
[10:16:17] [PASSED] name_refresh_wrong_mode
[10:16:17] [PASSED] name_refresh_invalid_mode
[10:16:17] [PASSED] rotate_multiple
[10:16:17] [PASSED] rotate_invalid_val
[10:16:17] [PASSED] rotate_truncated
[10:16:17] [PASSED] invalid_option
[10:16:17] [PASSED] invalid_tv_option
[10:16:17] [PASSED] truncated_tv_option
[10:16:17] ============ [PASSED] drm_test_cmdline_invalid =============
[10:16:17] =============== drm_test_cmdline_tv_options  ===============
[10:16:17] [PASSED] NTSC
[10:16:17] [PASSED] NTSC_443
[10:16:17] [PASSED] NTSC_J
[10:16:17] [PASSED] PAL
[10:16:17] [PASSED] PAL_M
[10:16:17] [PASSED] PAL_N
[10:16:17] [PASSED] SECAM
[10:16:17] [PASSED] MONO_525
[10:16:17] [PASSED] MONO_625
[10:16:17] =========== [PASSED] drm_test_cmdline_tv_options ===========
[10:16:17] =============== [PASSED] drm_cmdline_parser ================
[10:16:17] ========== drmm_connector_hdmi_init (20 subtests) ==========
[10:16:17] [PASSED] drm_test_connector_hdmi_init_valid
[10:16:17] [PASSED] drm_test_connector_hdmi_init_bpc_8
[10:16:17] [PASSED] drm_test_connector_hdmi_init_bpc_10
[10:16:17] [PASSED] drm_test_connector_hdmi_init_bpc_12
[10:16:17] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[10:16:17] [PASSED] drm_test_connector_hdmi_init_bpc_null
[10:16:17] [PASSED] drm_test_connector_hdmi_init_formats_empty
[10:16:17] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[10:16:17] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[10:16:17] [PASSED] supported_formats=0x9 yuv420_allowed=1
[10:16:17] [PASSED] supported_formats=0x9 yuv420_allowed=0
[10:16:17] [PASSED] supported_formats=0x3 yuv420_allowed=1
[10:16:17] [PASSED] supported_formats=0x3 yuv420_allowed=0
[10:16:17] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[10:16:17] [PASSED] drm_test_connector_hdmi_init_null_ddc
[10:16:17] [PASSED] drm_test_connector_hdmi_init_null_product
[10:16:17] [PASSED] drm_test_connector_hdmi_init_null_vendor
[10:16:17] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[10:16:17] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[10:16:17] [PASSED] drm_test_connector_hdmi_init_product_valid
[10:16:17] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[10:16:17] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[10:16:17] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[10:16:17] ========= drm_test_connector_hdmi_init_type_valid  =========
[10:16:17] [PASSED] HDMI-A
[10:16:17] [PASSED] HDMI-B
[10:16:17] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[10:16:17] ======== drm_test_connector_hdmi_init_type_invalid  ========
[10:16:17] [PASSED] Unknown
[10:16:17] [PASSED] VGA
[10:16:17] [PASSED] DVI-I
[10:16:17] [PASSED] DVI-D
[10:16:17] [PASSED] DVI-A
[10:16:17] [PASSED] Composite
[10:16:17] [PASSED] SVIDEO
[10:16:17] [PASSED] LVDS
[10:16:17] [PASSED] Component
[10:16:17] [PASSED] DIN
[10:16:17] [PASSED] DP
[10:16:17] [PASSED] TV
[10:16:17] [PASSED] eDP
[10:16:17] [PASSED] Virtual
[10:16:17] [PASSED] DSI
[10:16:17] [PASSED] DPI
[10:16:17] [PASSED] Writeback
[10:16:17] [PASSED] SPI
[10:16:17] [PASSED] USB
[10:16:17] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[10:16:17] ============ [PASSED] drmm_connector_hdmi_init =============
[10:16:17] ============= drmm_connector_init (3 subtests) =============
[10:16:17] [PASSED] drm_test_drmm_connector_init
[10:16:17] [PASSED] drm_test_drmm_connector_init_null_ddc
[10:16:17] ========= drm_test_drmm_connector_init_type_valid  =========
[10:16:17] [PASSED] Unknown
[10:16:17] [PASSED] VGA
[10:16:17] [PASSED] DVI-I
[10:16:17] [PASSED] DVI-D
[10:16:17] [PASSED] DVI-A
[10:16:17] [PASSED] Composite
[10:16:17] [PASSED] SVIDEO
[10:16:17] [PASSED] LVDS
[10:16:17] [PASSED] Component
[10:16:17] [PASSED] DIN
[10:16:17] [PASSED] DP
[10:16:17] [PASSED] HDMI-A
[10:16:17] [PASSED] HDMI-B
[10:16:17] [PASSED] TV
[10:16:17] [PASSED] eDP
[10:16:17] [PASSED] Virtual
[10:16:17] [PASSED] DSI
[10:16:17] [PASSED] DPI
[10:16:17] [PASSED] Writeback
[10:16:17] [PASSED] SPI
[10:16:17] [PASSED] USB
[10:16:17] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[10:16:17] =============== [PASSED] drmm_connector_init ===============
[10:16:17] ========= drm_connector_dynamic_init (6 subtests) ==========
[10:16:17] [PASSED] drm_test_drm_connector_dynamic_init
[10:16:17] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[10:16:17] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[10:16:17] [PASSED] drm_test_drm_connector_dynamic_init_properties
[10:16:17] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[10:16:17] [PASSED] Unknown
[10:16:17] [PASSED] VGA
[10:16:17] [PASSED] DVI-I
[10:16:17] [PASSED] DVI-D
[10:16:17] [PASSED] DVI-A
[10:16:17] [PASSED] Composite
[10:16:17] [PASSED] SVIDEO
[10:16:17] [PASSED] LVDS
[10:16:17] [PASSED] Component
[10:16:17] [PASSED] DIN
[10:16:17] [PASSED] DP
[10:16:17] [PASSED] HDMI-A
[10:16:17] [PASSED] HDMI-B
[10:16:17] [PASSED] TV
[10:16:17] [PASSED] eDP
[10:16:17] [PASSED] Virtual
[10:16:17] [PASSED] DSI
[10:16:17] [PASSED] DPI
[10:16:17] [PASSED] Writeback
[10:16:17] [PASSED] SPI
[10:16:17] [PASSED] USB
[10:16:17] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[10:16:17] ======== drm_test_drm_connector_dynamic_init_name  =========
[10:16:17] [PASSED] Unknown
[10:16:17] [PASSED] VGA
[10:16:17] [PASSED] DVI-I
[10:16:17] [PASSED] DVI-D
[10:16:17] [PASSED] DVI-A
[10:16:17] [PASSED] Composite
[10:16:17] [PASSED] SVIDEO
[10:16:17] [PASSED] LVDS
[10:16:17] [PASSED] Component
[10:16:17] [PASSED] DIN
[10:16:17] [PASSED] DP
[10:16:17] [PASSED] HDMI-A
[10:16:17] [PASSED] HDMI-B
[10:16:17] [PASSED] TV
[10:16:17] [PASSED] eDP
[10:16:17] [PASSED] Virtual
[10:16:17] [PASSED] DSI
[10:16:17] [PASSED] DPI
[10:16:17] [PASSED] Writeback
[10:16:17] [PASSED] SPI
[10:16:17] [PASSED] USB
[10:16:17] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[10:16:17] =========== [PASSED] drm_connector_dynamic_init ============
[10:16:17] ==== drm_connector_dynamic_register_early (4 subtests) =====
[10:16:17] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[10:16:17] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[10:16:17] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[10:16:17] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[10:16:17] ====== [PASSED] drm_connector_dynamic_register_early =======
[10:16:17] ======= drm_connector_dynamic_register (7 subtests) ========
[10:16:17] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[10:16:17] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[10:16:17] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[10:16:17] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[10:16:17] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[10:16:17] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[10:16:17] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[10:16:17] ========= [PASSED] drm_connector_dynamic_register ==========
[10:16:17] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[10:16:17] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[10:16:17] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[10:16:17] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[10:16:17] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[10:16:17] ========== drm_test_get_tv_mode_from_name_valid  ===========
[10:16:17] [PASSED] NTSC
[10:16:17] [PASSED] NTSC-443
[10:16:17] [PASSED] NTSC-J
[10:16:17] [PASSED] PAL
[10:16:17] [PASSED] PAL-M
[10:16:17] [PASSED] PAL-N
[10:16:17] [PASSED] SECAM
[10:16:17] [PASSED] Mono
[10:16:17] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[10:16:17] [PASSED] drm_test_get_tv_mode_from_name_truncated
[10:16:17] ============ [PASSED] drm_get_tv_mode_from_name ============
[10:16:17] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[10:16:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[10:16:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[10:16:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[10:16:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[10:16:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[10:16:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[10:16:17] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[10:16:17] [PASSED] VIC 96
[10:16:17] [PASSED] VIC 97
[10:16:17] [PASSED] VIC 101
[10:16:17] [PASSED] VIC 102
[10:16:17] [PASSED] VIC 106
[10:16:17] [PASSED] VIC 107
[10:16:17] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[10:16:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[10:16:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[10:16:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[10:16:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[10:16:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[10:16:17] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[10:16:17] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[10:16:17] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[10:16:17] [PASSED] Automatic
[10:16:17] [PASSED] Full
[10:16:17] [PASSED] Limited 16:235
[10:16:17] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[10:16:17] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[10:16:17] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[10:16:17] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[10:16:17] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[10:16:17] [PASSED] RGB
[10:16:17] [PASSED] YUV 4:2:0
[10:16:17] [PASSED] YUV 4:2:2
[10:16:17] [PASSED] YUV 4:4:4
[10:16:17] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[10:16:17] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[10:16:17] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[10:16:17] ============= drm_damage_helper (21 subtests) ==============
[10:16:17] [PASSED] drm_test_damage_iter_no_damage
[10:16:17] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[10:16:17] [PASSED] drm_test_damage_iter_no_damage_src_moved
[10:16:17] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[10:16:17] [PASSED] drm_test_damage_iter_no_damage_not_visible
[10:16:17] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[10:16:17] [PASSED] drm_test_damage_iter_no_damage_no_fb
[10:16:17] [PASSED] drm_test_damage_iter_simple_damage
[10:16:17] [PASSED] drm_test_damage_iter_single_damage
[10:16:17] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[10:16:17] [PASSED] drm_test_damage_iter_single_damage_outside_src
[10:16:17] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[10:16:17] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[10:16:17] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[10:16:17] [PASSED] drm_test_damage_iter_single_damage_src_moved
[10:16:17] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[10:16:17] [PASSED] drm_test_damage_iter_damage
[10:16:17] [PASSED] drm_test_damage_iter_damage_one_intersect
[10:16:17] [PASSED] drm_test_damage_iter_damage_one_outside
[10:16:17] [PASSED] drm_test_damage_iter_damage_src_moved
[10:16:17] [PASSED] drm_test_damage_iter_damage_not_visible
[10:16:17] ================ [PASSED] drm_damage_helper ================
[10:16:17] ============== drm_dp_mst_helper (3 subtests) ==============
[10:16:17] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[10:16:17] [PASSED] Clock 154000 BPP 30 DSC disabled
[10:16:17] [PASSED] Clock 234000 BPP 30 DSC disabled
[10:16:17] [PASSED] Clock 297000 BPP 24 DSC disabled
[10:16:17] [PASSED] Clock 332880 BPP 24 DSC enabled
[10:16:17] [PASSED] Clock 324540 BPP 24 DSC enabled
[10:16:17] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[10:16:17] ============== drm_test_dp_mst_calc_pbn_div  ===============
[10:16:17] [PASSED] Link rate 2000000 lane count 4
[10:16:17] [PASSED] Link rate 2000000 lane count 2
[10:16:17] [PASSED] Link rate 2000000 lane count 1
[10:16:17] [PASSED] Link rate 1350000 lane count 4
[10:16:17] [PASSED] Link rate 1350000 lane count 2
[10:16:17] [PASSED] Link rate 1350000 lane count 1
[10:16:17] [PASSED] Link rate 1000000 lane count 4
[10:16:17] [PASSED] Link rate 1000000 lane count 2
[10:16:17] [PASSED] Link rate 1000000 lane count 1
[10:16:17] [PASSED] Link rate 810000 lane count 4
[10:16:17] [PASSED] Link rate 810000 lane count 2
[10:16:17] [PASSED] Link rate 810000 lane count 1
[10:16:17] [PASSED] Link rate 540000 lane count 4
[10:16:17] [PASSED] Link rate 540000 lane count 2
[10:16:17] [PASSED] Link rate 540000 lane count 1
[10:16:17] [PASSED] Link rate 270000 lane count 4
[10:16:17] [PASSED] Link rate 270000 lane count 2
[10:16:17] [PASSED] Link rate 270000 lane count 1
[10:16:17] [PASSED] Link rate 162000 lane count 4
[10:16:17] [PASSED] Link rate 162000 lane count 2
[10:16:17] [PASSED] Link rate 162000 lane count 1
[10:16:17] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[10:16:17] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[10:16:17] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[10:16:17] [PASSED] DP_POWER_UP_PHY with port number
[10:16:17] [PASSED] DP_POWER_DOWN_PHY with port number
[10:16:17] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[10:16:17] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[10:16:17] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[10:16:17] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[10:16:17] [PASSED] DP_QUERY_PAYLOAD with port number
[10:16:17] [PASSED] DP_QUERY_PAYLOAD with VCPI
[10:16:17] [PASSED] DP_REMOTE_DPCD_READ with port number
[10:16:17] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[10:16:17] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[10:16:17] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[10:16:17] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[10:16:17] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[10:16:17] [PASSED] DP_REMOTE_I2C_READ with port number
[10:16:17] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[10:16:17] [PASSED] DP_REMOTE_I2C_READ with transactions array
[10:16:17] [PASSED] DP_REMOTE_I2C_WRITE with port number
[10:16:17] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[10:16:17] [PASSED] DP_REMOTE_I2C_WRITE with data array
[10:16:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[10:16:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[10:16:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[10:16:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[10:16:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[10:16:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[10:16:17] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[10:16:17] ================ [PASSED] drm_dp_mst_helper ================
[10:16:17] ================== drm_exec (7 subtests) ===================
[10:16:17] [PASSED] sanitycheck
[10:16:17] [PASSED] test_lock
[10:16:17] [PASSED] test_lock_unlock
[10:16:17] [PASSED] test_duplicates
[10:16:17] [PASSED] test_prepare
[10:16:17] [PASSED] test_prepare_array
[10:16:17] [PASSED] test_multiple_loops
[10:16:17] ==================== [PASSED] drm_exec =====================
[10:16:17] =========== drm_format_helper_test (17 subtests) ===========
[10:16:17] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[10:16:17] [PASSED] single_pixel_source_buffer
[10:16:17] [PASSED] single_pixel_clip_rectangle
[10:16:17] [PASSED] well_known_colors
[10:16:17] [PASSED] destination_pitch
[10:16:17] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[10:16:17] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[10:16:17] [PASSED] single_pixel_source_buffer
[10:16:17] [PASSED] single_pixel_clip_rectangle
[10:16:17] [PASSED] well_known_colors
[10:16:17] [PASSED] destination_pitch
[10:16:17] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[10:16:17] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[10:16:17] [PASSED] single_pixel_source_buffer
[10:16:17] [PASSED] single_pixel_clip_rectangle
[10:16:17] [PASSED] well_known_colors
[10:16:17] [PASSED] destination_pitch
[10:16:17] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[10:16:17] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[10:16:17] [PASSED] single_pixel_source_buffer
[10:16:17] [PASSED] single_pixel_clip_rectangle
[10:16:17] [PASSED] well_known_colors
[10:16:17] [PASSED] destination_pitch
[10:16:17] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[10:16:17] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[10:16:17] [PASSED] single_pixel_source_buffer
[10:16:17] [PASSED] single_pixel_clip_rectangle
[10:16:17] [PASSED] well_known_colors
[10:16:17] [PASSED] destination_pitch
[10:16:17] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[10:16:17] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[10:16:17] [PASSED] single_pixel_source_buffer
[10:16:17] [PASSED] single_pixel_clip_rectangle
[10:16:17] [PASSED] well_known_colors
[10:16:17] [PASSED] destination_pitch
[10:16:17] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[10:16:17] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[10:16:17] [PASSED] single_pixel_source_buffer
[10:16:17] [PASSED] single_pixel_clip_rectangle
[10:16:17] [PASSED] well_known_colors
[10:16:17] [PASSED] destination_pitch
[10:16:17] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[10:16:17] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[10:16:17] [PASSED] single_pixel_source_buffer
[10:16:17] [PASSED] single_pixel_clip_rectangle
[10:16:17] [PASSED] well_known_colors
[10:16:17] [PASSED] destination_pitch
[10:16:17] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[10:16:17] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[10:16:17] [PASSED] single_pixel_source_buffer
[10:16:17] [PASSED] single_pixel_clip_rectangle
[10:16:17] [PASSED] well_known_colors
[10:16:17] [PASSED] destination_pitch
[10:16:17] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[10:16:17] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[10:16:17] [PASSED] single_pixel_source_buffer
[10:16:17] [PASSED] single_pixel_clip_rectangle
[10:16:17] [PASSED] well_known_colors
[10:16:17] [PASSED] destination_pitch
[10:16:17] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[10:16:17] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[10:16:17] [PASSED] single_pixel_source_buffer
[10:16:17] [PASSED] single_pixel_clip_rectangle
[10:16:17] [PASSED] well_known_colors
[10:16:17] [PASSED] destination_pitch
[10:16:17] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[10:16:17] ============== drm_test_fb_xrgb8888_to_mono  ===============
[10:16:17] [PASSED] single_pixel_source_buffer
[10:16:17] [PASSED] single_pixel_clip_rectangle
[10:16:17] [PASSED] well_known_colors
[10:16:17] [PASSED] destination_pitch
[10:16:17] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[10:16:17] ==================== drm_test_fb_swab  =====================
[10:16:17] [PASSED] single_pixel_source_buffer
[10:16:17] [PASSED] single_pixel_clip_rectangle
[10:16:17] [PASSED] well_known_colors
[10:16:17] [PASSED] destination_pitch
[10:16:17] ================ [PASSED] drm_test_fb_swab =================
[10:16:17] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[10:16:17] [PASSED] single_pixel_source_buffer
[10:16:17] [PASSED] single_pixel_clip_rectangle
[10:16:17] [PASSED] well_known_colors
[10:16:17] [PASSED] destination_pitch
[10:16:17] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[10:16:17] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[10:16:17] [PASSED] single_pixel_source_buffer
[10:16:17] [PASSED] single_pixel_clip_rectangle
[10:16:17] [PASSED] well_known_colors
[10:16:17] [PASSED] destination_pitch
[10:16:17] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[10:16:17] ================= drm_test_fb_clip_offset  =================
[10:16:17] [PASSED] pass through
[10:16:17] [PASSED] horizontal offset
[10:16:17] [PASSED] vertical offset
[10:16:17] [PASSED] horizontal and vertical offset
[10:16:17] [PASSED] horizontal offset (custom pitch)
[10:16:17] [PASSED] vertical offset (custom pitch)
[10:16:17] [PASSED] horizontal and vertical offset (custom pitch)
[10:16:17] ============= [PASSED] drm_test_fb_clip_offset =============
[10:16:17] =================== drm_test_fb_memcpy  ====================
[10:16:17] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[10:16:17] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[10:16:17] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[10:16:17] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[10:16:17] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[10:16:17] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[10:16:17] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[10:16:17] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[10:16:17] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[10:16:17] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[10:16:17] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[10:16:17] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[10:16:17] =============== [PASSED] drm_test_fb_memcpy ================
[10:16:17] ============= [PASSED] drm_format_helper_test ==============
[10:16:17] ================= drm_format (18 subtests) =================
[10:16:17] [PASSED] drm_test_format_block_width_invalid
[10:16:17] [PASSED] drm_test_format_block_width_one_plane
[10:16:17] [PASSED] drm_test_format_block_width_two_plane
[10:16:17] [PASSED] drm_test_format_block_width_three_plane
[10:16:17] [PASSED] drm_test_format_block_width_tiled
[10:16:17] [PASSED] drm_test_format_block_height_invalid
[10:16:17] [PASSED] drm_test_format_block_height_one_plane
[10:16:17] [PASSED] drm_test_format_block_height_two_plane
[10:16:17] [PASSED] drm_test_format_block_height_three_plane
[10:16:17] [PASSED] drm_test_format_block_height_tiled
[10:16:17] [PASSED] drm_test_format_min_pitch_invalid
[10:16:17] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[10:16:17] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[10:16:17] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[10:16:17] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[10:16:17] [PASSED] drm_test_format_min_pitch_two_plane
[10:16:17] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[10:16:17] [PASSED] drm_test_format_min_pitch_tiled
[10:16:17] =================== [PASSED] drm_format ====================
[10:16:17] ============== drm_framebuffer (10 subtests) ===============
[10:16:17] ========== drm_test_framebuffer_check_src_coords  ==========
[10:16:17] [PASSED] Success: source fits into fb
[10:16:17] [PASSED] Fail: overflowing fb with x-axis coordinate
[10:16:17] [PASSED] Fail: overflowing fb with y-axis coordinate
[10:16:17] [PASSED] Fail: overflowing fb with source width
[10:16:17] [PASSED] Fail: overflowing fb with source height
[10:16:17] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[10:16:17] [PASSED] drm_test_framebuffer_cleanup
[10:16:17] =============== drm_test_framebuffer_create  ===============
[10:16:17] [PASSED] ABGR8888 normal sizes
[10:16:17] [PASSED] ABGR8888 max sizes
[10:16:17] [PASSED] ABGR8888 pitch greater than min required
[10:16:17] [PASSED] ABGR8888 pitch less than min required
[10:16:17] [PASSED] ABGR8888 Invalid width
[10:16:17] [PASSED] ABGR8888 Invalid buffer handle
[10:16:17] [PASSED] No pixel format
[10:16:17] [PASSED] ABGR8888 Width 0
[10:16:17] [PASSED] ABGR8888 Height 0
[10:16:17] [PASSED] ABGR8888 Out of bound height * pitch combination
[10:16:17] [PASSED] ABGR8888 Large buffer offset
[10:16:17] [PASSED] ABGR8888 Buffer offset for inexistent plane
[10:16:17] [PASSED] ABGR8888 Invalid flag
[10:16:17] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[10:16:17] [PASSED] ABGR8888 Valid buffer modifier
[10:16:17] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[10:16:17] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[10:16:17] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[10:16:17] [PASSED] NV12 Normal sizes
[10:16:17] [PASSED] NV12 Max sizes
[10:16:17] [PASSED] NV12 Invalid pitch
[10:16:17] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[10:16:17] [PASSED] NV12 different  modifier per-plane
[10:16:17] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[10:16:17] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[10:16:17] [PASSED] NV12 Modifier for inexistent plane
[10:16:17] [PASSED] NV12 Handle for inexistent plane
[10:16:17] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[10:16:17] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[10:16:17] [PASSED] YVU420 Normal sizes
[10:16:17] [PASSED] YVU420 Max sizes
[10:16:17] [PASSED] YVU420 Invalid pitch
[10:16:17] [PASSED] YVU420 Different pitches
[10:16:17] [PASSED] YVU420 Different buffer offsets/pitches
[10:16:17] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[10:16:17] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[10:16:17] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[10:16:17] [PASSED] YVU420 Valid modifier
[10:16:17] [PASSED] YVU420 Different modifiers per plane
[10:16:17] [PASSED] YVU420 Modifier for inexistent plane
[10:16:17] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[10:16:17] [PASSED] X0L2 Normal sizes
[10:16:17] [PASSED] X0L2 Max sizes
[10:16:17] [PASSED] X0L2 Invalid pitch
[10:16:17] [PASSED] X0L2 Pitch greater than minimum required
[10:16:17] [PASSED] X0L2 Handle for inexistent plane
[10:16:17] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[10:16:17] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[10:16:17] [PASSED] X0L2 Valid modifier
[10:16:17] [PASSED] X0L2 Modifier for inexistent plane
[10:16:17] =========== [PASSED] drm_test_framebuffer_create ===========
[10:16:17] [PASSED] drm_test_framebuffer_free
[10:16:17] [PASSED] drm_test_framebuffer_init
[10:16:17] [PASSED] drm_test_framebuffer_init_bad_format
[10:16:17] [PASSED] drm_test_framebuffer_init_dev_mismatch
[10:16:17] [PASSED] drm_test_framebuffer_lookup
[10:16:17] [PASSED] drm_test_framebuffer_lookup_inexistent
[10:16:17] [PASSED] drm_test_framebuffer_modifiers_not_supported
[10:16:17] ================= [PASSED] drm_framebuffer =================
[10:16:17] ================ drm_gem_shmem (8 subtests) ================
[10:16:17] [PASSED] drm_gem_shmem_test_obj_create
[10:16:17] [PASSED] drm_gem_shmem_test_obj_create_private
[10:16:17] [PASSED] drm_gem_shmem_test_pin_pages
[10:16:17] [PASSED] drm_gem_shmem_test_vmap
[10:16:17] [PASSED] drm_gem_shmem_test_get_sg_table
[10:16:17] [PASSED] drm_gem_shmem_test_get_pages_sgt
[10:16:17] [PASSED] drm_gem_shmem_test_madvise
[10:16:17] [PASSED] drm_gem_shmem_test_purge
[10:16:17] ================== [PASSED] drm_gem_shmem ==================
[10:16:17] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[10:16:17] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[10:16:17] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[10:16:17] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[10:16:17] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[10:16:17] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[10:16:17] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[10:16:17] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[10:16:17] [PASSED] Automatic
[10:16:17] [PASSED] Full
[10:16:17] [PASSED] Limited 16:235
[10:16:17] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[10:16:17] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[10:16:17] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[10:16:17] [PASSED] drm_test_check_disable_connector
[10:16:17] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[10:16:17] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[10:16:17] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[10:16:17] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[10:16:17] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[10:16:17] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[10:16:17] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[10:16:17] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[10:16:17] [PASSED] drm_test_check_output_bpc_dvi
[10:16:17] [PASSED] drm_test_check_output_bpc_format_vic_1
[10:16:17] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[10:16:17] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[10:16:17] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[10:16:17] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[10:16:17] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[10:16:17] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[10:16:17] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[10:16:17] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[10:16:17] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[10:16:17] [PASSED] drm_test_check_broadcast_rgb_value
[10:16:17] [PASSED] drm_test_check_bpc_8_value
[10:16:17] [PASSED] drm_test_check_bpc_10_value
[10:16:17] [PASSED] drm_test_check_bpc_12_value
[10:16:17] [PASSED] drm_test_check_format_value
[10:16:17] [PASSED] drm_test_check_tmds_char_value
[10:16:17] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[10:16:17] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[10:16:17] [PASSED] drm_test_check_mode_valid
[10:16:17] [PASSED] drm_test_check_mode_valid_reject
[10:16:17] [PASSED] drm_test_check_mode_valid_reject_rate
[10:16:17] [PASSED] drm_test_check_mode_valid_reject_max_clock
[10:16:17] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[10:16:17] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[10:16:17] [PASSED] drm_test_check_infoframes
[10:16:17] [PASSED] drm_test_check_reject_avi_infoframe
[10:16:17] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[10:16:17] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[10:16:17] [PASSED] drm_test_check_reject_audio_infoframe
[10:16:17] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[10:16:17] ================= drm_managed (2 subtests) =================
[10:16:17] [PASSED] drm_test_managed_release_action
[10:16:17] [PASSED] drm_test_managed_run_action
[10:16:17] =================== [PASSED] drm_managed ===================
[10:16:17] =================== drm_mm (6 subtests) ====================
[10:16:17] [PASSED] drm_test_mm_init
[10:16:17] [PASSED] drm_test_mm_debug
[10:16:17] [PASSED] drm_test_mm_align32
[10:16:17] [PASSED] drm_test_mm_align64
[10:16:17] [PASSED] drm_test_mm_lowest
[10:16:17] [PASSED] drm_test_mm_highest
[10:16:17] ===================== [PASSED] drm_mm ======================
[10:16:17] ============= drm_modes_analog_tv (5 subtests) =============
[10:16:17] [PASSED] drm_test_modes_analog_tv_mono_576i
[10:16:17] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[10:16:17] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[10:16:17] [PASSED] drm_test_modes_analog_tv_pal_576i
[10:16:17] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[10:16:17] =============== [PASSED] drm_modes_analog_tv ===============
[10:16:17] ============== drm_plane_helper (2 subtests) ===============
[10:16:17] =============== drm_test_check_plane_state  ================
[10:16:17] [PASSED] clipping_simple
[10:16:17] [PASSED] clipping_rotate_reflect
[10:16:17] [PASSED] positioning_simple
[10:16:17] [PASSED] upscaling
[10:16:17] [PASSED] downscaling
[10:16:17] [PASSED] rounding1
[10:16:17] [PASSED] rounding2
[10:16:17] [PASSED] rounding3
[10:16:17] [PASSED] rounding4
[10:16:17] =========== [PASSED] drm_test_check_plane_state ============
[10:16:17] =========== drm_test_check_invalid_plane_state  ============
[10:16:17] [PASSED] positioning_invalid
[10:16:17] [PASSED] upscaling_invalid
[10:16:17] [PASSED] downscaling_invalid
[10:16:17] ======= [PASSED] drm_test_check_invalid_plane_state ========
[10:16:17] ================ [PASSED] drm_plane_helper =================
[10:16:17] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[10:16:17] ====== drm_test_connector_helper_tv_get_modes_check  =======
[10:16:17] [PASSED] None
[10:16:17] [PASSED] PAL
[10:16:17] [PASSED] NTSC
[10:16:17] [PASSED] Both, NTSC Default
[10:16:17] [PASSED] Both, PAL Default
[10:16:17] [PASSED] Both, NTSC Default, with PAL on command-line
[10:16:17] [PASSED] Both, PAL Default, with NTSC on command-line
[10:16:17] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[10:16:17] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[10:16:17] ================== drm_rect (9 subtests) ===================
[10:16:17] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[10:16:17] [PASSED] drm_test_rect_clip_scaled_not_clipped
[10:16:17] [PASSED] drm_test_rect_clip_scaled_clipped
[10:16:17] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[10:16:17] ================= drm_test_rect_intersect  =================
[10:16:17] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[10:16:17] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[10:16:17] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[10:16:17] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[10:16:17] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[10:16:17] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[10:16:17] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[10:16:17] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[10:16:17] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[10:16:17] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[10:16:17] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[10:16:17] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[10:16:17] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[10:16:17] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[10:16:17] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[10:16:17] ============= [PASSED] drm_test_rect_intersect =============
[10:16:17] ================ drm_test_rect_calc_hscale  ================
[10:16:17] [PASSED] normal use
[10:16:17] [PASSED] out of max range
[10:16:17] [PASSED] out of min range
[10:16:17] [PASSED] zero dst
[10:16:17] [PASSED] negative src
[10:16:17] [PASSED] negative dst
[10:16:17] ============ [PASSED] drm_test_rect_calc_hscale ============
[10:16:17] ================ drm_test_rect_calc_vscale  ================
[10:16:17] [PASSED] normal use
[10:16:17] [PASSED] out of max range
[10:16:17] [PASSED] out of min range
[10:16:17] [PASSED] zero dst
[10:16:17] [PASSED] negative src
[10:16:17] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[10:16:17] ============ [PASSED] drm_test_rect_calc_vscale ============
[10:16:17] ================== drm_test_rect_rotate  ===================
[10:16:17] [PASSED] reflect-x
[10:16:17] [PASSED] reflect-y
[10:16:17] [PASSED] rotate-0
[10:16:17] [PASSED] rotate-90
[10:16:17] [PASSED] rotate-180
[10:16:17] [PASSED] rotate-270
[10:16:17] ============== [PASSED] drm_test_rect_rotate ===============
[10:16:17] ================ drm_test_rect_rotate_inv  =================
[10:16:17] [PASSED] reflect-x
[10:16:17] [PASSED] reflect-y
[10:16:17] [PASSED] rotate-0
[10:16:17] [PASSED] rotate-90
[10:16:17] [PASSED] rotate-180
[10:16:17] [PASSED] rotate-270
[10:16:17] ============ [PASSED] drm_test_rect_rotate_inv =============
[10:16:17] ==================== [PASSED] drm_rect =====================
[10:16:17] ============ drm_sysfb_modeset_test (1 subtest) ============
[10:16:17] ============ drm_test_sysfb_build_fourcc_list  =============
[10:16:17] [PASSED] no native formats
[10:16:17] [PASSED] XRGB8888 as native format
[10:16:17] [PASSED] remove duplicates
[10:16:17] [PASSED] convert alpha formats
[10:16:17] [PASSED] random formats
[10:16:17] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[10:16:17] ============= [PASSED] drm_sysfb_modeset_test ==============
[10:16:17] ================== drm_fixp (2 subtests) ===================
[10:16:17] [PASSED] drm_test_int2fixp
[10:16:17] [PASSED] drm_test_sm2fixp
[10:16:17] ==================== [PASSED] drm_fixp =====================
[10:16:17] ============================================================
[10:16:17] Testing complete. Ran 621 tests: passed: 621
[10:16:17] Elapsed time: 25.854s total, 1.679s configuring, 23.993s building, 0.179s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[10:16:17] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:16:19] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:16:28] Starting KUnit Kernel (1/1)...
[10:16:28] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:16:28] ================= ttm_device (5 subtests) ==================
[10:16:28] [PASSED] ttm_device_init_basic
[10:16:28] [PASSED] ttm_device_init_multiple
[10:16:28] [PASSED] ttm_device_fini_basic
[10:16:28] [PASSED] ttm_device_init_no_vma_man
[10:16:28] ================== ttm_device_init_pools  ==================
[10:16:28] [PASSED] No DMA allocations, no DMA32 required
[10:16:28] [PASSED] DMA allocations, DMA32 required
[10:16:28] [PASSED] No DMA allocations, DMA32 required
[10:16:28] [PASSED] DMA allocations, no DMA32 required
[10:16:28] ============== [PASSED] ttm_device_init_pools ==============
[10:16:28] =================== [PASSED] ttm_device ====================
[10:16:28] ================== ttm_pool (8 subtests) ===================
[10:16:28] ================== ttm_pool_alloc_basic  ===================
[10:16:28] [PASSED] One page
[10:16:28] [PASSED] More than one page
[10:16:28] [PASSED] Above the allocation limit
[10:16:28] [PASSED] One page, with coherent DMA mappings enabled
[10:16:28] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[10:16:28] ============== [PASSED] ttm_pool_alloc_basic ===============
[10:16:28] ============== ttm_pool_alloc_basic_dma_addr  ==============
[10:16:28] [PASSED] One page
[10:16:28] [PASSED] More than one page
[10:16:28] [PASSED] Above the allocation limit
[10:16:28] [PASSED] One page, with coherent DMA mappings enabled
[10:16:28] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[10:16:28] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[10:16:28] [PASSED] ttm_pool_alloc_order_caching_match
[10:16:28] [PASSED] ttm_pool_alloc_caching_mismatch
[10:16:28] [PASSED] ttm_pool_alloc_order_mismatch
[10:16:28] [PASSED] ttm_pool_free_dma_alloc
[10:16:28] [PASSED] ttm_pool_free_no_dma_alloc
[10:16:28] [PASSED] ttm_pool_fini_basic
[10:16:28] ==================== [PASSED] ttm_pool =====================
[10:16:28] ================ ttm_resource (8 subtests) =================
[10:16:28] ================= ttm_resource_init_basic  =================
[10:16:28] [PASSED] Init resource in TTM_PL_SYSTEM
[10:16:28] [PASSED] Init resource in TTM_PL_VRAM
[10:16:28] [PASSED] Init resource in a private placement
[10:16:28] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[10:16:28] ============= [PASSED] ttm_resource_init_basic =============
[10:16:28] [PASSED] ttm_resource_init_pinned
[10:16:28] [PASSED] ttm_resource_fini_basic
[10:16:28] [PASSED] ttm_resource_manager_init_basic
[10:16:28] [PASSED] ttm_resource_manager_usage_basic
[10:16:28] [PASSED] ttm_resource_manager_set_used_basic
[10:16:28] [PASSED] ttm_sys_man_alloc_basic
[10:16:28] [PASSED] ttm_sys_man_free_basic
[10:16:28] ================== [PASSED] ttm_resource ===================
[10:16:28] =================== ttm_tt (15 subtests) ===================
[10:16:28] ==================== ttm_tt_init_basic  ====================
[10:16:28] [PASSED] Page-aligned size
[10:16:28] [PASSED] Extra pages requested
[10:16:28] ================ [PASSED] ttm_tt_init_basic ================
[10:16:28] [PASSED] ttm_tt_init_misaligned
[10:16:28] [PASSED] ttm_tt_fini_basic
[10:16:28] [PASSED] ttm_tt_fini_sg
[10:16:28] [PASSED] ttm_tt_fini_shmem
[10:16:28] [PASSED] ttm_tt_create_basic
[10:16:28] [PASSED] ttm_tt_create_invalid_bo_type
[10:16:28] [PASSED] ttm_tt_create_ttm_exists
[10:16:28] [PASSED] ttm_tt_create_failed
[10:16:28] [PASSED] ttm_tt_destroy_basic
[10:16:28] [PASSED] ttm_tt_populate_null_ttm
[10:16:28] [PASSED] ttm_tt_populate_populated_ttm
[10:16:28] [PASSED] ttm_tt_unpopulate_basic
[10:16:28] [PASSED] ttm_tt_unpopulate_empty_ttm
[10:16:28] [PASSED] ttm_tt_swapin_basic
[10:16:28] ===================== [PASSED] ttm_tt ======================
[10:16:28] =================== ttm_bo (14 subtests) ===================
[10:16:28] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[10:16:28] [PASSED] Cannot be interrupted and sleeps
[10:16:28] [PASSED] Cannot be interrupted, locks straight away
[10:16:28] [PASSED] Can be interrupted, sleeps
[10:16:28] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[10:16:28] [PASSED] ttm_bo_reserve_locked_no_sleep
[10:16:28] [PASSED] ttm_bo_reserve_no_wait_ticket
[10:16:28] [PASSED] ttm_bo_reserve_double_resv
[10:16:28] [PASSED] ttm_bo_reserve_interrupted
[10:16:28] [PASSED] ttm_bo_reserve_deadlock
[10:16:28] [PASSED] ttm_bo_unreserve_basic
[10:16:28] [PASSED] ttm_bo_unreserve_pinned
[10:16:28] [PASSED] ttm_bo_unreserve_bulk
[10:16:28] [PASSED] ttm_bo_fini_basic
[10:16:28] [PASSED] ttm_bo_fini_shared_resv
[10:16:28] [PASSED] ttm_bo_pin_basic
[10:16:28] [PASSED] ttm_bo_pin_unpin_resource
[10:16:28] [PASSED] ttm_bo_multiple_pin_one_unpin
[10:16:28] ===================== [PASSED] ttm_bo ======================
[10:16:28] ============== ttm_bo_validate (21 subtests) ===============
[10:16:28] ============== ttm_bo_init_reserved_sys_man  ===============
[10:16:28] [PASSED] Buffer object for userspace
[10:16:28] [PASSED] Kernel buffer object
[10:16:28] [PASSED] Shared buffer object
[10:16:28] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[10:16:28] ============== ttm_bo_init_reserved_mock_man  ==============
[10:16:28] [PASSED] Buffer object for userspace
[10:16:28] [PASSED] Kernel buffer object
[10:16:28] [PASSED] Shared buffer object
[10:16:28] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[10:16:28] [PASSED] ttm_bo_init_reserved_resv
[10:16:28] ================== ttm_bo_validate_basic  ==================
[10:16:28] [PASSED] Buffer object for userspace
[10:16:28] [PASSED] Kernel buffer object
[10:16:28] [PASSED] Shared buffer object
[10:16:28] ============== [PASSED] ttm_bo_validate_basic ==============
[10:16:28] [PASSED] ttm_bo_validate_invalid_placement
[10:16:28] ============= ttm_bo_validate_same_placement  ==============
[10:16:28] [PASSED] System manager
[10:16:28] [PASSED] VRAM manager
[10:16:28] ========= [PASSED] ttm_bo_validate_same_placement ==========
[10:16:28] [PASSED] ttm_bo_validate_failed_alloc
[10:16:28] [PASSED] ttm_bo_validate_pinned
[10:16:28] [PASSED] ttm_bo_validate_busy_placement
[10:16:28] ================ ttm_bo_validate_multihop  =================
[10:16:28] [PASSED] Buffer object for userspace
[10:16:28] [PASSED] Kernel buffer object
[10:16:28] [PASSED] Shared buffer object
[10:16:28] ============ [PASSED] ttm_bo_validate_multihop =============
[10:16:28] ========== ttm_bo_validate_no_placement_signaled  ==========
[10:16:28] [PASSED] Buffer object in system domain, no page vector
[10:16:28] [PASSED] Buffer object in system domain with an existing page vector
[10:16:28] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[10:16:28] ======== ttm_bo_validate_no_placement_not_signaled  ========
[10:16:28] [PASSED] Buffer object for userspace
[10:16:28] [PASSED] Kernel buffer object
[10:16:28] [PASSED] Shared buffer object
[10:16:28] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[10:16:28] [PASSED] ttm_bo_validate_move_fence_signaled
[10:16:28] ========= ttm_bo_validate_move_fence_not_signaled  =========
[10:16:28] [PASSED] Waits for GPU
[10:16:28] [PASSED] Tries to lock straight away
[10:16:28] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[10:16:28] [PASSED] ttm_bo_validate_happy_evict
[10:16:28] [PASSED] ttm_bo_validate_all_pinned_evict
[10:16:29] [PASSED] ttm_bo_validate_allowed_only_evict
[10:16:29] [PASSED] ttm_bo_validate_deleted_evict
[10:16:29] [PASSED] ttm_bo_validate_busy_domain_evict
[10:16:29] [PASSED] ttm_bo_validate_evict_gutting
[10:16:29] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[10:16:29] ================= [PASSED] ttm_bo_validate =================
[10:16:29] ============================================================
[10:16:29] Testing complete. Ran 101 tests: passed: 101
[10:16:29] Elapsed time: 11.322s total, 1.673s configuring, 9.383s building, 0.215s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✗ Xe.CI.BAT: failure for drm/i915/overlay: Convert to parent interface (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 8281 bytes --]

== Series Details ==

Series: drm/i915/overlay: Convert to parent interface (rev2)
URL   : https://patchwork.freedesktop.org/series/161766/
State : failure

== Summary ==

CI Bug Log - changes from xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440_BAT -> xe-pw-161766v2_BAT
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-161766v2_BAT absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-161766v2_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (14 -> 14)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-161766v2_BAT:

### IGT changes ###

#### Possible regressions ####

  * igt@core_hotunplug@unbind-rebind:
    - bat-adlp-7:         [PASS][1] -> [ABORT][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/bat-adlp-7/igt@core_hotunplug@unbind-rebind.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/bat-adlp-7/igt@core_hotunplug@unbind-rebind.html
    - bat-ptl-2:          [PASS][3] -> [ABORT][4]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/bat-ptl-2/igt@core_hotunplug@unbind-rebind.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/bat-ptl-2/igt@core_hotunplug@unbind-rebind.html
    - bat-bmg-2:          [PASS][5] -> [ABORT][6]
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/bat-bmg-2/igt@core_hotunplug@unbind-rebind.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/bat-bmg-2/igt@core_hotunplug@unbind-rebind.html
    - bat-bmg-1:          [PASS][7] -> [ABORT][8]
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/bat-bmg-1/igt@core_hotunplug@unbind-rebind.html
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/bat-bmg-1/igt@core_hotunplug@unbind-rebind.html
    - bat-lnl-2:          [PASS][9] -> [ABORT][10]
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/bat-lnl-2/igt@core_hotunplug@unbind-rebind.html
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/bat-lnl-2/igt@core_hotunplug@unbind-rebind.html
    - bat-dg2-oem2:       [PASS][11] -> [ABORT][12]
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/bat-dg2-oem2/igt@core_hotunplug@unbind-rebind.html
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/bat-dg2-oem2/igt@core_hotunplug@unbind-rebind.html
    - bat-wcl-1:          [PASS][13] -> [ABORT][14]
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/bat-wcl-1/igt@core_hotunplug@unbind-rebind.html
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/bat-wcl-1/igt@core_hotunplug@unbind-rebind.html
    - bat-ptl-1:          [PASS][15] -> [ABORT][16]
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/bat-ptl-1/igt@core_hotunplug@unbind-rebind.html
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/bat-ptl-1/igt@core_hotunplug@unbind-rebind.html
    - bat-wcl-2:          [PASS][17] -> [ABORT][18]
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/bat-wcl-2/igt@core_hotunplug@unbind-rebind.html
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/bat-wcl-2/igt@core_hotunplug@unbind-rebind.html
    - bat-lnl-1:          [PASS][19] -> [ABORT][20]
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/bat-lnl-1/igt@core_hotunplug@unbind-rebind.html
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/bat-lnl-1/igt@core_hotunplug@unbind-rebind.html

  
Known issues
------------

  Here are the changes found in xe-pw-161766v2_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@xe_waitfence@reltime:
    - bat-dg2-oem2:       [PASS][21] -> [FAIL][22] ([Intel XE#6520])
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/bat-dg2-oem2/igt@xe_waitfence@reltime.html
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/bat-dg2-oem2/igt@xe_waitfence@reltime.html

  
#### Warnings ####

  * igt@kms_psr@psr-cursor-plane-move:
    - bat-dg2-oem2:       [SKIP][23] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) -> [SKIP][24] ([Intel XE#2850] / [Intel XE#929]) +2 other tests skip
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/bat-dg2-oem2/igt@kms_psr@psr-cursor-plane-move.html
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/bat-dg2-oem2/igt@kms_psr@psr-cursor-plane-move.html
    - bat-lnl-2:          [SKIP][25] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) -> [SKIP][26] ([Intel XE#2850] / [Intel XE#929]) +2 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/bat-lnl-2/igt@kms_psr@psr-cursor-plane-move.html
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/bat-lnl-2/igt@kms_psr@psr-cursor-plane-move.html

  * igt@kms_psr@psr-primary-page-flip:
    - bat-atsm-2:         [SKIP][27] ([Intel XE#1024] / [Intel XE#1406] / [Intel XE#947]) -> [SKIP][28] ([Intel XE#1024] / [Intel XE#947]) +2 other tests skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/bat-atsm-2/igt@kms_psr@psr-primary-page-flip.html
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/bat-atsm-2/igt@kms_psr@psr-primary-page-flip.html

  * igt@kms_psr@psr-sprite-plane-onoff:
    - bat-wcl-2:          [SKIP][29] ([Intel XE#1406] / [Intel XE#2850]) -> [SKIP][30] ([Intel XE#2850]) +2 other tests skip
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/bat-wcl-2/igt@kms_psr@psr-sprite-plane-onoff.html
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/bat-wcl-2/igt@kms_psr@psr-sprite-plane-onoff.html
    - bat-bmg-1:          [SKIP][31] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) -> [SKIP][32] ([Intel XE#2234] / [Intel XE#2850]) +2 other tests skip
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/bat-bmg-1/igt@kms_psr@psr-sprite-plane-onoff.html
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/bat-bmg-1/igt@kms_psr@psr-sprite-plane-onoff.html
    - bat-bmg-2:          [SKIP][33] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) -> [SKIP][34] ([Intel XE#2234] / [Intel XE#2850]) +2 other tests skip
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/bat-bmg-2/igt@kms_psr@psr-sprite-plane-onoff.html
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/bat-bmg-2/igt@kms_psr@psr-sprite-plane-onoff.html

  
  [Intel XE#1024]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1024
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#6520]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6520
  [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
  [Intel XE#947]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/947


Build changes
-------------

  * IGT: IGT_8772 -> IGT_8773
  * Linux: xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440 -> xe-pw-161766v2

  IGT_8772: 8772
  IGT_8773: 8773
  xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440: f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440
  xe-pw-161766v2: 161766v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/index.html

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✗ Xe.CI.FULL: failure for drm/i915/overlay: Convert to parent interface (rev2)

[Patchwork]

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== Series Details ==

Series: drm/i915/overlay: Convert to parent interface (rev2)
URL   : https://patchwork.freedesktop.org/series/161766/
State : failure

== Summary ==

CI Bug Log - changes from xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440_FULL -> xe-pw-161766v2_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-161766v2_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-161766v2_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-161766v2_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@xe_configfs@ctx-restore-post-bb-invalid:
    - shard-lnl:          [PASS][1] -> [ABORT][2] +20 other tests abort
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-7/igt@xe_configfs@ctx-restore-post-bb-invalid.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-1/igt@xe_configfs@ctx-restore-post-bb-invalid.html

  * igt@xe_exec_compute_mode@twice-userptr-invalidate:
    - shard-bmg:          [PASS][3] -> [DMESG-WARN][4]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-7/igt@xe_exec_compute_mode@twice-userptr-invalidate.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-2/igt@xe_exec_compute_mode@twice-userptr-invalidate.html

  * igt@xe_fault_injection@inject-fault-probe-function-xe_ggtt_init_early:
    - shard-bmg:          [PASS][5] -> [ABORT][6] +21 other tests abort
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-1/igt@xe_fault_injection@inject-fault-probe-function-xe_ggtt_init_early.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-4/igt@xe_fault_injection@inject-fault-probe-function-xe_ggtt_init_early.html

  * igt@xe_fault_injection@inject-fault-probe-function-xe_guc_ads_init:
    - shard-lnl:          NOTRUN -> [ABORT][7]
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-7/igt@xe_fault_injection@inject-fault-probe-function-xe_guc_ads_init.html
    - shard-bmg:          NOTRUN -> [ABORT][8]
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-8/igt@xe_fault_injection@inject-fault-probe-function-xe_guc_ads_init.html

  
#### Warnings ####

  * igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv:
    - shard-lnl:          [ABORT][9] ([Intel XE#4757]) -> [ABORT][10]
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-8/igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv.html
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-2/igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv.html

  
Known issues
------------

  Here are the changes found in xe-pw-161766v2_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_big_fb@x-tiled-16bpp-rotate-270:
    - shard-lnl:          NOTRUN -> [SKIP][11] ([Intel XE#1407])
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-6/igt@kms_big_fb@x-tiled-16bpp-rotate-270.html
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#2327])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-9/igt@kms_big_fb@x-tiled-16bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-64bpp-rotate-270:
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#1124])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-3/igt@kms_big_fb@y-tiled-64bpp-rotate-270.html

  * igt@kms_ccs@bad-pixel-format-y-tiled-gen12-rc-ccs-cc:
    - shard-bmg:          NOTRUN -> [SKIP][14] ([Intel XE#2887]) +3 other tests skip
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-1/igt@kms_ccs@bad-pixel-format-y-tiled-gen12-rc-ccs-cc.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs@pipe-c-dp-2:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#2652]) +12 other tests skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-1/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs@pipe-c-dp-2.html

  * igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs-cc:
    - shard-lnl:          NOTRUN -> [SKIP][16] ([Intel XE#2887])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-5/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs-cc.html

  * igt@kms_chamelium_hpd@vga-hpd-with-enabled-mode:
    - shard-bmg:          NOTRUN -> [SKIP][17] ([Intel XE#2252])
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-1/igt@kms_chamelium_hpd@vga-hpd-with-enabled-mode.html

  * igt@kms_content_protection@content-type-change:
    - shard-bmg:          NOTRUN -> [SKIP][18] ([Intel XE#2341])
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-3/igt@kms_content_protection@content-type-change.html
    - shard-lnl:          NOTRUN -> [SKIP][19] ([Intel XE#3278] / [Intel XE#6973])
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-6/igt@kms_content_protection@content-type-change.html

  * igt@kms_content_protection@lic-type-0-hdcp14@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][20] ([Intel XE#1178] / [Intel XE#3304])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-6/igt@kms_content_protection@lic-type-0-hdcp14@pipe-a-dp-2.html

  * igt@kms_cursor_crc@cursor-offscreen-max-size:
    - shard-lnl:          NOTRUN -> [SKIP][21] ([Intel XE#1424])
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-5/igt@kms_cursor_crc@cursor-offscreen-max-size.html

  * igt@kms_cursor_crc@cursor-rapid-movement-512x170:
    - shard-bmg:          NOTRUN -> [SKIP][22] ([Intel XE#2321])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-3/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size:
    - shard-lnl:          NOTRUN -> [SKIP][23] ([Intel XE#309])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-1/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html

  * igt@kms_flip@2x-flip-vs-absolute-wf_vblank@cd-dp2-hdmi-a3:
    - shard-bmg:          [PASS][24] -> [DMESG-WARN][25] ([Intel XE#1727] / [Intel XE#6819]) +1 other test dmesg-warn
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-7/igt@kms_flip@2x-flip-vs-absolute-wf_vblank@cd-dp2-hdmi-a3.html
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-3/igt@kms_flip@2x-flip-vs-absolute-wf_vblank@cd-dp2-hdmi-a3.html

  * igt@kms_flip@2x-flip-vs-modeset-vs-hang:
    - shard-lnl:          NOTRUN -> [SKIP][26] ([Intel XE#1421])
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-6/igt@kms_flip@2x-flip-vs-modeset-vs-hang.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
    - shard-lnl:          [PASS][27] -> [FAIL][28] ([Intel XE#301]) +2 other tests fail
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-6/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
    - shard-lnl:          NOTRUN -> [SKIP][29] ([Intel XE#7178])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-6/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][30] ([Intel XE#7178]) +1 other test skip
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-5/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-shrfb-msflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#2311]) +4 other tests skip
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-shrfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@drrs-abgr161616f-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][32] ([Intel XE#7061]) +1 other test skip
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-abgr161616f-draw-mmap-wc.html
    - shard-lnl:          NOTRUN -> [SKIP][33] ([Intel XE#7061])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-1/igt@kms_frontbuffer_tracking@drrs-abgr161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][34] ([Intel XE#4141])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-pri-indfb-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][35] ([Intel XE#656]) +3 other tests skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-4/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#2313]) +1 other test skip
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-blt.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-lnl:          NOTRUN -> [SKIP][37] ([Intel XE#3374] / [Intel XE#3544])
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-5/igt@kms_hdr@brightness-with-hdr.html
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#3544])
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-4/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75@pipe-b:
    - shard-bmg:          NOTRUN -> [SKIP][39] ([Intel XE#2763] / [Intel XE#6886]) +4 other tests skip
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-9/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75@pipe-b.html

  * igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-fully-sf:
    - shard-bmg:          NOTRUN -> [SKIP][40] ([Intel XE#1489]) +1 other test skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-2/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr@fbc-psr-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][41] ([Intel XE#2234] / [Intel XE#2850]) +1 other test skip
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-4/igt@kms_psr@fbc-psr-suspend.html

  * igt@xe_eudebug@discovery-race:
    - shard-bmg:          NOTRUN -> [SKIP][42] ([Intel XE#4837])
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-1/igt@xe_eudebug@discovery-race.html

  * igt@xe_eudebug_online@writes-caching-vram-bb-vram-target-sram:
    - shard-lnl:          NOTRUN -> [SKIP][43] ([Intel XE#4837] / [Intel XE#6665])
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-3/igt@xe_eudebug_online@writes-caching-vram-bb-vram-target-sram.html

  * igt@xe_exec_balancer@many-virtual-userptr-invalidate-race:
    - shard-lnl:          NOTRUN -> [SKIP][44] ([Intel XE#7482]) +4 other tests skip
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-3/igt@xe_exec_balancer@many-virtual-userptr-invalidate-race.html

  * igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr:
    - shard-lnl:          NOTRUN -> [SKIP][45] ([Intel XE#1392])
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-8/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr.html
    - shard-bmg:          NOTRUN -> [SKIP][46] ([Intel XE#2322])
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-7/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr.html

  * igt@xe_exec_fault_mode@many-multi-queue-rebind-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][47] ([Intel XE#7136]) +2 other tests skip
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-8/igt@xe_exec_fault_mode@many-multi-queue-rebind-prefetch.html

  * igt@xe_exec_fault_mode@many-multi-queue-userptr-invalidate:
    - shard-lnl:          NOTRUN -> [SKIP][48] ([Intel XE#7136]) +2 other tests skip
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-2/igt@xe_exec_fault_mode@many-multi-queue-userptr-invalidate.html

  * igt@xe_exec_multi_queue@max-queues-preempt-mode-basic:
    - shard-lnl:          NOTRUN -> [SKIP][49] ([Intel XE#6874])
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-1/igt@xe_exec_multi_queue@max-queues-preempt-mode-basic.html

  * igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-priority:
    - shard-bmg:          NOTRUN -> [SKIP][50] ([Intel XE#6874]) +4 other tests skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-2/igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-priority.html

  * igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#7138]) +2 other tests skip
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-8/igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr-rebind.html

  * igt@xe_exec_threads@threads-multi-queue-shared-vm-rebind:
    - shard-lnl:          NOTRUN -> [SKIP][52] ([Intel XE#7138]) +1 other test skip
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-1/igt@xe_exec_threads@threads-multi-queue-shared-vm-rebind.html

  * igt@xe_multigpu_svm@mgpu-xgpu-access-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][53] ([Intel XE#6964])
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-8/igt@xe_multigpu_svm@mgpu-xgpu-access-prefetch.html

  * igt@xe_peer2peer@read:
    - shard-lnl:          NOTRUN -> [SKIP][54] ([Intel XE#1061] / [Intel XE#7326])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-8/igt@xe_peer2peer@read.html
    - shard-bmg:          NOTRUN -> [SKIP][55] ([Intel XE#2427] / [Intel XE#6953] / [Intel XE#7326])
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-8/igt@xe_peer2peer@read.html

  * igt@xe_pm@s4-d3cold-basic-exec:
    - shard-bmg:          NOTRUN -> [SKIP][56] ([Intel XE#2284]) +1 other test skip
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-2/igt@xe_pm@s4-d3cold-basic-exec.html

  * igt@xe_wedged@wedged-at-any-timeout:
    - shard-lnl:          [PASS][57] -> [ABORT][58] ([Intel XE#3119])
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-5/igt@xe_wedged@wedged-at-any-timeout.html
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-6/igt@xe_wedged@wedged-at-any-timeout.html

  
#### Possible fixes ####

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic:
    - shard-bmg:          [FAIL][59] ([Intel XE#7480]) -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-1/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-8/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html

  * igt@xe_evict@evict-mixed-many-threads-small:
    - shard-bmg:          [INCOMPLETE][61] ([Intel XE#6321]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-3/igt@xe_evict@evict-mixed-many-threads-small.html
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-6/igt@xe_evict@evict-mixed-many-threads-small.html

  * igt@xe_module_load@load:
    - shard-lnl:          ([PASS][63], [PASS][64], [PASS][65], [PASS][66], [PASS][67], [PASS][68], [PASS][69], [PASS][70], [PASS][71], [PASS][72], [PASS][73], [PASS][74], [PASS][75], [PASS][76], [PASS][77], [PASS][78], [PASS][79], [PASS][80], [PASS][81], [PASS][82], [PASS][83], [PASS][84], [PASS][85], [PASS][86], [SKIP][87], [PASS][88]) ([Intel XE#378]) -> ([PASS][89], [PASS][90], [PASS][91], [PASS][92], [PASS][93], [PASS][94], [PASS][95], [PASS][96], [PASS][97], [PASS][98], [PASS][99], [PASS][100], [PASS][101], [PASS][102], [PASS][103], [PASS][104], [PASS][105], [PASS][106], [PASS][107], [PASS][108], [PASS][109], [PASS][110], [PASS][111], [PASS][112])
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-7/igt@xe_module_load@load.html
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-4/igt@xe_module_load@load.html
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-7/igt@xe_module_load@load.html
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-7/igt@xe_module_load@load.html
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-3/igt@xe_module_load@load.html
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-3/igt@xe_module_load@load.html
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-3/igt@xe_module_load@load.html
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-4/igt@xe_module_load@load.html
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-8/igt@xe_module_load@load.html
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-6/igt@xe_module_load@load.html
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-6/igt@xe_module_load@load.html
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-5/igt@xe_module_load@load.html
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-5/igt@xe_module_load@load.html
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-1/igt@xe_module_load@load.html
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-5/igt@xe_module_load@load.html
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-2/igt@xe_module_load@load.html
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-4/igt@xe_module_load@load.html
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-1/igt@xe_module_load@load.html
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-6/igt@xe_module_load@load.html
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-2/igt@xe_module_load@load.html
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-2/igt@xe_module_load@load.html
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-2/igt@xe_module_load@load.html
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-8/igt@xe_module_load@load.html
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-1/igt@xe_module_load@load.html
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-3/igt@xe_module_load@load.html
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-8/igt@xe_module_load@load.html
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-1/igt@xe_module_load@load.html
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-4/igt@xe_module_load@load.html
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-7/igt@xe_module_load@load.html
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-2/igt@xe_module_load@load.html
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-3/igt@xe_module_load@load.html
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-2/igt@xe_module_load@load.html
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-4/igt@xe_module_load@load.html
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-1/igt@xe_module_load@load.html
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-2/igt@xe_module_load@load.html
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-8/igt@xe_module_load@load.html
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-8/igt@xe_module_load@load.html
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-6/igt@xe_module_load@load.html
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-8/igt@xe_module_load@load.html
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-6/igt@xe_module_load@load.html
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-5/igt@xe_module_load@load.html
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-5/igt@xe_module_load@load.html
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-5/igt@xe_module_load@load.html
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-4/igt@xe_module_load@load.html
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-7/igt@xe_module_load@load.html
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-7/igt@xe_module_load@load.html
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-3/igt@xe_module_load@load.html
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-1/igt@xe_module_load@load.html
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-6/igt@xe_module_load@load.html
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-3/igt@xe_module_load@load.html
    - shard-bmg:          ([PASS][113], [PASS][114], [PASS][115], [PASS][116], [PASS][117], [PASS][118], [PASS][119], [PASS][120], [PASS][121], [PASS][122], [PASS][123], [PASS][124], [PASS][125], [PASS][126], [PASS][127], [PASS][128], [PASS][129], [PASS][130], [PASS][131], [PASS][132], [PASS][133], [PASS][134], [PASS][135], [SKIP][136], [PASS][137], [PASS][138]) ([Intel XE#2457]) -> ([PASS][139], [PASS][140], [PASS][141], [PASS][142], [PASS][143], [PASS][144], [PASS][145], [PASS][146], [PASS][147], [PASS][148], [PASS][149], [PASS][150], [PASS][151], [PASS][152], [PASS][153], [PASS][154], [PASS][155], [PASS][156], [PASS][157], [PASS][158], [PASS][159], [PASS][160], [PASS][161], [PASS][162], [PASS][163])
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-6/igt@xe_module_load@load.html
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-8/igt@xe_module_load@load.html
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-8/igt@xe_module_load@load.html
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-3/igt@xe_module_load@load.html
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-3/igt@xe_module_load@load.html
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-9/igt@xe_module_load@load.html
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-9/igt@xe_module_load@load.html
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-2/igt@xe_module_load@load.html
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-1/igt@xe_module_load@load.html
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-6/igt@xe_module_load@load.html
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-7/igt@xe_module_load@load.html
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-7/igt@xe_module_load@load.html
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-5/igt@xe_module_load@load.html
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-4/igt@xe_module_load@load.html
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-4/igt@xe_module_load@load.html
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-2/igt@xe_module_load@load.html
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-3/igt@xe_module_load@load.html
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-6/igt@xe_module_load@load.html
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-4/igt@xe_module_load@load.html
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-1/igt@xe_module_load@load.html
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-2/igt@xe_module_load@load.html
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-7/igt@xe_module_load@load.html
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-1/igt@xe_module_load@load.html
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-1/igt@xe_module_load@load.html
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-5/igt@xe_module_load@load.html
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-5/igt@xe_module_load@load.html
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-7/igt@xe_module_load@load.html
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-4/igt@xe_module_load@load.html
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-4/igt@xe_module_load@load.html
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-5/igt@xe_module_load@load.html
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-3/igt@xe_module_load@load.html
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-9/igt@xe_module_load@load.html
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-8/igt@xe_module_load@load.html
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-6/igt@xe_module_load@load.html
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-8/igt@xe_module_load@load.html
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-7/igt@xe_module_load@load.html
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-8/igt@xe_module_load@load.html
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-5/igt@xe_module_load@load.html
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-2/igt@xe_module_load@load.html
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-6/igt@xe_module_load@load.html
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-5/igt@xe_module_load@load.html
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-3/igt@xe_module_load@load.html
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-2/igt@xe_module_load@load.html
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-1/igt@xe_module_load@load.html
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-9/igt@xe_module_load@load.html
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-1/igt@xe_module_load@load.html
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-4/igt@xe_module_load@load.html
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-3/igt@xe_module_load@load.html
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-1/igt@xe_module_load@load.html
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-7/igt@xe_module_load@load.html
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-9/igt@xe_module_load@load.html

  * igt@xe_sriov_flr@flr-vfs-parallel:
    - shard-bmg:          [FAIL][164] ([Intel XE#6569]) -> [PASS][165] +1 other test pass
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-1/igt@xe_sriov_flr@flr-vfs-parallel.html
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-5/igt@xe_sriov_flr@flr-vfs-parallel.html

  * igt@xe_sriov_vram@vf-access-beyond:
    - shard-bmg:          [FAIL][166] ([Intel XE#5937]) -> [PASS][167] +1 other test pass
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-6/igt@xe_sriov_vram@vf-access-beyond.html
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-7/igt@xe_sriov_vram@vf-access-beyond.html

  
#### Warnings ####

  * igt@kms_content_protection@lic-type-1:
    - shard-lnl:          [SKIP][168] ([Intel XE#3278]) -> [SKIP][169] ([Intel XE#3278] / [Intel XE#6973]) +1 other test skip
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-8/igt@kms_content_protection@lic-type-1.html
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-4/igt@kms_content_protection@lic-type-1.html

  * igt@kms_psr2_sf@fbc-pr-overlay-plane-update-continuous-sf:
    - shard-lnl:          [SKIP][170] ([Intel XE#1406] / [Intel XE#2893]) -> [SKIP][171] ([Intel XE#2893]) +4 other tests skip
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-1/igt@kms_psr2_sf@fbc-pr-overlay-plane-update-continuous-sf.html
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-2/igt@kms_psr2_sf@fbc-pr-overlay-plane-update-continuous-sf.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf:
    - shard-lnl:          [SKIP][172] ([Intel XE#1406] / [Intel XE#2893] / [Intel XE#4608]) -> [SKIP][173] ([Intel XE#2893] / [Intel XE#4608]) +3 other tests skip
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-7/igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf.html
   [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-3/igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf@pipe-b-edp-1:
    - shard-lnl:          [SKIP][174] ([Intel XE#1406] / [Intel XE#4608]) -> [SKIP][175] ([Intel XE#4608]) +7 other tests skip
   [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-4/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf@pipe-b-edp-1.html
   [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-8/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf@pipe-b-edp-1.html

  * igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-sf:
    - shard-bmg:          [SKIP][176] ([Intel XE#1406] / [Intel XE#1489]) -> [SKIP][177] ([Intel XE#1489]) +11 other tests skip
   [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-9/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-sf.html
   [177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-9/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-sf.html

  * igt@kms_psr2_su@page_flip-nv12:
    - shard-lnl:          [SKIP][178] ([Intel XE#1128] / [Intel XE#1406]) -> [SKIP][179] ([Intel XE#1128])
   [178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-lnl-1/igt@kms_psr2_su@page_flip-nv12.html
   [179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-lnl-8/igt@kms_psr2_su@page_flip-nv12.html
    - shard-bmg:          [SKIP][180] ([Intel XE#1406] / [Intel XE#2387]) -> [SKIP][181] ([Intel XE#2387])
   [180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-8/igt@kms_psr2_su@page_flip-nv12.html
   [181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-8/igt@kms_psr2_su@page_flip-nv12.html

  * igt@kms_psr@psr2-no-drrs:
    - shard-bmg:          [SKIP][182] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) -> [SKIP][183] ([Intel XE#2234] / [Intel XE#2850]) +22 other tests skip
   [182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-4/igt@kms_psr@psr2-no-drrs.html
   [183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-8/igt@kms_psr@psr2-no-drrs.html

  * igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
    - shard-bmg:          [SKIP][184] ([Intel XE#1406] / [Intel XE#2414]) -> [SKIP][185] ([Intel XE#2414])
   [184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-5/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
   [185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-7/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-bmg:          [SKIP][186] ([Intel XE#2426]) -> [SKIP][187] ([Intel XE#2509])
   [186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440/shard-bmg-7/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  
  [Intel XE#1061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1061
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1128
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
  [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
  [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
  [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
  [Intel XE#2414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2414
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2427]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2427
  [Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
  [Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#3119]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3119
  [Intel XE#3278]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3278
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608
  [Intel XE#4757]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4757
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#5937]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5937
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#6569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6569
  [Intel XE#6665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6665
  [Intel XE#6819]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6819
  [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#6953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6953
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#6973]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6973
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
  [Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7326]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7326
  [Intel XE#7480]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7480
  [Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482


Build changes
-------------

  * IGT: IGT_8772 -> IGT_8773
  * Linux: xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440 -> xe-pw-161766v2

  IGT_8772: 8772
  IGT_8773: 8773
  xe-4620-f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440: f0ec6252eb6d9a4f0cb5a437f5c21fec16d0a440
  xe-pw-161766v2: 161766v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v2/index.html

[-- Attachment #2: Type: text/html, Size: 45688 bytes --]

[PATCH v3 17/19] drm/i915/overlay: Don't use fetch_and_zero() in display code

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

We don't generally want fetch_and_zero() on the display side, so
stop using it in the display side intel_overlay_cleanup().
Fortunately we don't really have anything to do here apart from
freeing the data. And we'll keep on clearing the pointer, just
in case something somewhere cares about it.

Note that once i915_overlay_cleanup() is converted to the parent
interface we can't call it unconditionally (as xe won't have it).
So we need to keep the early bailout for overlay==NULL.

v2: Adjust the commit message since we do apparently
    have fetch_and_zero() in display code as well (Jani)
v3: Skip i915_overlay_cleanup() if the overlay wasn't initialized

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_overlay.c | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
index 10a235ce608e..37c60c08dd56 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -1554,13 +1554,11 @@ static void i915_overlay_cleanup(struct drm_device *drm)
 
 void intel_overlay_cleanup(struct intel_display *display)
 {
-	struct intel_overlay *overlay;
-
-	overlay = fetch_and_zero(&display->overlay);
-	if (!overlay)
+	if (!display->overlay)
 		return;
 
 	i915_overlay_cleanup(display->drm);
 
-	kfree(overlay);
+	kfree(display->overlay);
+	display->overlay = NULL;
 }
-- 
2.52.0

[PATCH v3 19/19] drm/i915/overlay: Convert overlay to parent interface

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Convert the direct i915_overlay_*() calls from the display
side to go over a new parent interface instead.

v2: Correctly handle the ERR_PTR returned by
    i915_overlay_obj_lookup() (Jani)
v3: Rebase due to the NULL check in intel_overlay_cleanup()

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_overlay.c | 36 +++++-----
 drivers/gpu/drm/i915/display/intel_overlay.h | 30 --------
 drivers/gpu/drm/i915/display/intel_parent.c  | 76 ++++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_parent.h  | 26 +++++++
 drivers/gpu/drm/i915/i915_driver.c           |  2 +
 drivers/gpu/drm/i915/i915_overlay.c          | 57 +++++++++------
 drivers/gpu/drm/i915/i915_overlay.h          | 34 +--------
 drivers/gpu/drm/xe/Makefile                  |  1 +
 include/drm/intel/display_parent_interface.h | 33 +++++++++
 9 files changed, 194 insertions(+), 101 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
index 497bd4ec2224..12a325ceae6f 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -30,13 +30,13 @@
 #include <drm/drm_gem.h>
 #include <drm/drm_print.h>
 
-#include "i915_overlay.h"
 #include "intel_color_regs.h"
 #include "intel_de.h"
 #include "intel_display_regs.h"
 #include "intel_display_types.h"
 #include "intel_frontbuffer.h"
 #include "intel_overlay.h"
+#include "intel_parent.h"
 #include "intel_pfit_regs.h"
 
 /* Limits for overlay size. According to intel doc, the real limits are:
@@ -199,7 +199,7 @@ void intel_overlay_reset(struct intel_display *display)
 	overlay->old_yscale = 0;
 	overlay->crtc = NULL;
 
-	i915_overlay_reset(display->drm);
+	intel_parent_overlay_reset(display);
 }
 
 static int packed_depth_bytes(u32 format)
@@ -477,19 +477,19 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
 	drm_WARN_ON(display->drm,
 		    !drm_modeset_is_locked(&display->drm->mode_config.connection_mutex));
 
-	ret = i915_overlay_release_old_vid(display->drm);
+	ret = intel_parent_overlay_release_old_vid(display);
 	if (ret != 0)
 		return ret;
 
 	atomic_inc(&display->restore.pending_fb_pin);
 
-	vma = i915_overlay_pin_fb(display->drm, obj, &offset);
+	vma = intel_parent_overlay_pin_fb(display, obj, &offset);
 	if (IS_ERR(vma)) {
 		ret = PTR_ERR(vma);
 		goto out_pin_section;
 	}
 
-	if (!i915_overlay_is_active(display->drm)) {
+	if (!intel_parent_overlay_is_active(display)) {
 		const struct intel_crtc_state *crtc_state =
 			overlay->crtc->config;
 		u32 oconfig = 0;
@@ -505,7 +505,7 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
 			OCONF_PIPE_A : OCONF_PIPE_B;
 		iowrite32(oconfig, &regs->OCONFIG);
 
-		ret = i915_overlay_on(display->drm, INTEL_FRONTBUFFER_OVERLAY(pipe));
+		ret = intel_parent_overlay_on(display, INTEL_FRONTBUFFER_OVERLAY(pipe));
 		if (ret != 0)
 			goto out_unpin;
 	}
@@ -563,14 +563,14 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
 	if (tmp & (1 << 17))
 		drm_dbg(display->drm, "overlay underrun, DOVSTA: %x\n", tmp);
 
-	ret = i915_overlay_continue(display->drm, vma, scale_changed);
+	ret = intel_parent_overlay_continue(display, vma, scale_changed);
 	if (ret)
 		goto out_unpin;
 
 	return 0;
 
 out_unpin:
-	i915_overlay_unpin_fb(display->drm, vma);
+	intel_parent_overlay_unpin_fb(display, vma);
 out_pin_section:
 	atomic_dec(&display->restore.pending_fb_pin);
 
@@ -585,14 +585,14 @@ int intel_overlay_switch_off(struct intel_overlay *overlay)
 	drm_WARN_ON(display->drm,
 		    !drm_modeset_is_locked(&display->drm->mode_config.connection_mutex));
 
-	ret = i915_overlay_recover_from_interrupt(display->drm);
+	ret = intel_parent_overlay_recover_from_interrupt(display);
 	if (ret != 0)
 		return ret;
 
-	if (!i915_overlay_is_active(display->drm))
+	if (!intel_parent_overlay_is_active(display))
 		return 0;
 
-	ret = i915_overlay_release_old_vid(display->drm);
+	ret = intel_parent_overlay_release_old_vid(display);
 	if (ret != 0)
 		return ret;
 
@@ -601,7 +601,7 @@ int intel_overlay_switch_off(struct intel_overlay *overlay)
 	overlay->crtc->overlay = NULL;
 	overlay->crtc = NULL;
 
-	return i915_overlay_off(display->drm);
+	return intel_parent_overlay_off(display);
 }
 
 static int check_overlay_possible_on_crtc(struct intel_overlay *overlay,
@@ -822,13 +822,13 @@ int intel_overlay_put_image_ioctl(struct drm_device *dev, void *data,
 		return -ENOENT;
 	crtc = to_intel_crtc(drmmode_crtc);
 
-	obj = i915_overlay_obj_lookup(dev, file_priv, params->bo_handle);
+	obj = intel_parent_overlay_obj_lookup(display, file_priv, params->bo_handle);
 	if (IS_ERR(obj))
 		return PTR_ERR(obj);
 
 	drm_modeset_lock_all(dev);
 
-	ret = i915_overlay_recover_from_interrupt(dev);
+	ret = intel_parent_overlay_recover_from_interrupt(display);
 	if (ret != 0)
 		goto out_unlock;
 
@@ -998,7 +998,7 @@ int intel_overlay_attrs_ioctl(struct drm_device *dev, void *data,
 			if (DISPLAY_VER(display) == 2)
 				goto out_unlock;
 
-			if (i915_overlay_is_active(display->drm)) {
+			if (intel_parent_overlay_is_active(display)) {
 				ret = -EBUSY;
 				goto out_unlock;
 			}
@@ -1036,8 +1036,8 @@ void intel_overlay_setup(struct intel_display *display)
 	if (!overlay)
 		return;
 
-	regs = i915_overlay_setup(display->drm,
-				  OVERLAY_NEEDS_PHYSICAL(display));
+	regs = intel_parent_overlay_setup(display,
+					  OVERLAY_NEEDS_PHYSICAL(display));
 	if (IS_ERR(regs))
 		goto out_free;
 
@@ -1071,7 +1071,7 @@ void intel_overlay_cleanup(struct intel_display *display)
 	if (!display->overlay)
 		return;
 
-	i915_overlay_cleanup(display->drm);
+	intel_parent_overlay_cleanup(display);
 
 	kfree(display->overlay);
 	display->overlay = NULL;
diff --git a/drivers/gpu/drm/i915/display/intel_overlay.h b/drivers/gpu/drm/i915/display/intel_overlay.h
index 4ef6882b9acb..a4291d6dd528 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.h
+++ b/drivers/gpu/drm/i915/display/intel_overlay.h
@@ -14,7 +14,6 @@ struct drm_printer;
 struct intel_display;
 struct intel_overlay;
 
-#ifdef I915
 void intel_overlay_setup(struct intel_display *display);
 bool intel_overlay_available(struct intel_display *display);
 void intel_overlay_cleanup(struct intel_display *display);
@@ -24,34 +23,5 @@ int intel_overlay_put_image_ioctl(struct drm_device *dev, void *data,
 int intel_overlay_attrs_ioctl(struct drm_device *dev, void *data,
 			      struct drm_file *file_priv);
 void intel_overlay_reset(struct intel_display *display);
-#else
-static inline void intel_overlay_setup(struct intel_display *display)
-{
-}
-static inline bool intel_overlay_available(struct intel_display *display)
-{
-	return false;
-}
-static inline void intel_overlay_cleanup(struct intel_display *display)
-{
-}
-static inline int intel_overlay_switch_off(struct intel_overlay *overlay)
-{
-	return 0;
-}
-static inline int intel_overlay_put_image_ioctl(struct drm_device *dev, void *data,
-						struct drm_file *file_priv)
-{
-	return 0;
-}
-static inline int intel_overlay_attrs_ioctl(struct drm_device *dev, void *data,
-					    struct drm_file *file_priv)
-{
-	return 0;
-}
-static inline void intel_overlay_reset(struct intel_display *display)
-{
-}
-#endif
 
 #endif /* __INTEL_OVERLAY_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_parent.c b/drivers/gpu/drm/i915/display/intel_parent.c
index 7f73695a0444..77c9fd259ed0 100644
--- a/drivers/gpu/drm/i915/display/intel_parent.c
+++ b/drivers/gpu/drm/i915/display/intel_parent.c
@@ -59,6 +59,82 @@ void intel_parent_irq_synchronize(struct intel_display *display)
 	display->parent->irq->synchronize(display->drm);
 }
 
+/* overlay */
+bool intel_parent_overlay_is_active(struct intel_display *display)
+{
+	return display->parent->overlay->is_active(display->drm);
+}
+
+int intel_parent_overlay_on(struct intel_display *display,
+			    u32 frontbuffer_bits)
+{
+	return display->parent->overlay->overlay_on(display->drm,
+						    frontbuffer_bits);
+}
+
+int intel_parent_overlay_continue(struct intel_display *display,
+				  struct i915_vma *vma,
+				  bool load_polyphase_filter)
+{
+	return display->parent->overlay->overlay_continue(display->drm, vma,
+							  load_polyphase_filter);
+}
+
+int intel_parent_overlay_off(struct intel_display *display)
+{
+	return display->parent->overlay->overlay_off(display->drm);
+}
+
+int intel_parent_overlay_recover_from_interrupt(struct intel_display *display)
+{
+	return display->parent->overlay->recover_from_interrupt(display->drm);
+}
+
+int intel_parent_overlay_release_old_vid(struct intel_display *display)
+{
+	return display->parent->overlay->release_old_vid(display->drm);
+}
+
+void intel_parent_overlay_reset(struct intel_display *display)
+{
+	display->parent->overlay->reset(display->drm);
+}
+
+struct i915_vma *intel_parent_overlay_pin_fb(struct intel_display *display,
+					     struct drm_gem_object *obj,
+					     u32 *offset)
+{
+	return display->parent->overlay->pin_fb(display->drm, obj, offset);
+}
+
+void intel_parent_overlay_unpin_fb(struct intel_display *display,
+				   struct i915_vma *vma)
+{
+	return display->parent->overlay->unpin_fb(display->drm, vma);
+}
+
+struct drm_gem_object *intel_parent_overlay_obj_lookup(struct intel_display *display,
+						       struct drm_file *filp,
+						       u32 handle)
+{
+	return display->parent->overlay->obj_lookup(display->drm,
+						    filp, handle);
+}
+
+void __iomem *intel_parent_overlay_setup(struct intel_display *display,
+					 bool needs_physical)
+{
+	if (drm_WARN_ON_ONCE(display->drm, !display->parent->overlay))
+		return ERR_PTR(-ENODEV);
+
+	return display->parent->overlay->setup(display->drm, needs_physical);
+}
+
+void intel_parent_overlay_cleanup(struct intel_display *display)
+{
+	display->parent->overlay->cleanup(display->drm);
+}
+
 /* panic */
 struct intel_panic *intel_parent_panic_alloc(struct intel_display *display)
 {
diff --git a/drivers/gpu/drm/i915/display/intel_parent.h b/drivers/gpu/drm/i915/display/intel_parent.h
index 04782bb26b61..91c37d68348a 100644
--- a/drivers/gpu/drm/i915/display/intel_parent.h
+++ b/drivers/gpu/drm/i915/display/intel_parent.h
@@ -7,7 +7,10 @@
 #include <linux/types.h>
 
 struct dma_fence;
+struct drm_file;
+struct drm_gem_object;
 struct drm_scanout_buffer;
+struct i915_vma;
 struct intel_display;
 struct intel_hdcp_gsc_context;
 struct intel_panic;
@@ -27,6 +30,29 @@ void intel_parent_hdcp_gsc_context_free(struct intel_display *display,
 bool intel_parent_irq_enabled(struct intel_display *display);
 void intel_parent_irq_synchronize(struct intel_display *display);
 
+/* overlay */
+bool intel_parent_overlay_is_active(struct intel_display *display);
+int intel_parent_overlay_on(struct intel_display *display,
+			    u32 frontbuffer_bits);
+int intel_parent_overlay_continue(struct intel_display *display,
+				  struct i915_vma *vma,
+				  bool load_polyphase_filter);
+int intel_parent_overlay_off(struct intel_display *display);
+int intel_parent_overlay_recover_from_interrupt(struct intel_display *display);
+int intel_parent_overlay_release_old_vid(struct intel_display *display);
+void intel_parent_overlay_reset(struct intel_display *display);
+struct i915_vma *intel_parent_overlay_pin_fb(struct intel_display *display,
+					     struct drm_gem_object *obj,
+					     u32 *offset);
+void intel_parent_overlay_unpin_fb(struct intel_display *display,
+				   struct i915_vma *vma);
+struct drm_gem_object *intel_parent_overlay_obj_lookup(struct intel_display *display,
+						       struct drm_file *filp,
+						       u32 handle);
+void __iomem *intel_parent_overlay_setup(struct intel_display *display,
+					 bool needs_physical);
+void intel_parent_overlay_cleanup(struct intel_display *display);
+
 /* panic */
 struct intel_panic *intel_parent_panic_alloc(struct intel_display *display);
 int intel_parent_panic_setup(struct intel_display *display, struct intel_panic *panic, struct drm_scanout_buffer *sb);
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index 6d8fbf845bc2..5a3b0309216f 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -106,6 +106,7 @@
 #include "i915_ioctl.h"
 #include "i915_irq.h"
 #include "i915_memcpy.h"
+#include "i915_overlay.h"
 #include "i915_panic.h"
 #include "i915_perf.h"
 #include "i915_query.h"
@@ -765,6 +766,7 @@ static const struct intel_display_parent_interface parent = {
 	.hdcp = &i915_display_hdcp_interface,
 	.initial_plane = &i915_display_initial_plane_interface,
 	.irq = &i915_display_irq_interface,
+	.overlay = &i915_display_overlay_interface,
 	.panic = &i915_display_panic_interface,
 	.pc8 = &i915_display_pc8_interface,
 	.pcode = &i915_display_pcode_interface,
diff --git a/drivers/gpu/drm/i915/i915_overlay.c b/drivers/gpu/drm/i915/i915_overlay.c
index 61869747c6bb..28518dbb5b8e 100644
--- a/drivers/gpu/drm/i915/i915_overlay.c
+++ b/drivers/gpu/drm/i915/i915_overlay.c
@@ -5,6 +5,7 @@
 
 #include <drm/drm_print.h>
 
+#include <drm/intel/display_parent_interface.h>
 #include <drm/intel/intel_gmd_interrupt_regs.h>
 
 #include "gem/i915_gem_internal.h"
@@ -88,7 +89,7 @@ alloc_request(struct i915_overlay *overlay, void (*fn)(struct i915_overlay *))
 	return rq;
 }
 
-bool i915_overlay_is_active(struct drm_device *drm)
+static bool i915_overlay_is_active(struct drm_device *drm)
 {
 	struct drm_i915_private *i915 = to_i915(drm);
 	struct i915_overlay *overlay = i915->overlay;
@@ -97,8 +98,8 @@ bool i915_overlay_is_active(struct drm_device *drm)
 }
 
 /* overlay needs to be disable in OCMD reg */
-int i915_overlay_on(struct drm_device *drm,
-		    u32 frontbuffer_bits)
+static int i915_overlay_on(struct drm_device *drm,
+			   u32 frontbuffer_bits)
 {
 	struct drm_i915_private *i915 = to_i915(drm);
 	struct i915_overlay *overlay = i915->overlay;
@@ -159,9 +160,9 @@ static void i915_overlay_flip_prepare(struct i915_overlay *overlay,
 }
 
 /* overlay needs to be enabled in OCMD reg */
-int i915_overlay_continue(struct drm_device *drm,
-			  struct i915_vma *vma,
-			  bool load_polyphase_filter)
+static int i915_overlay_continue(struct drm_device *drm,
+				 struct i915_vma *vma,
+				 bool load_polyphase_filter)
 {
 	struct drm_i915_private *i915 = to_i915(drm);
 	struct i915_overlay *overlay = i915->overlay;
@@ -210,7 +211,8 @@ static void i915_overlay_release_old_vma(struct i915_overlay *overlay)
 	i915_vma_put(vma);
 }
 
-static void i915_overlay_release_old_vid_tail(struct i915_overlay *overlay)
+static void
+i915_overlay_release_old_vid_tail(struct i915_overlay *overlay)
 {
 	i915_overlay_release_old_vma(overlay);
 }
@@ -237,7 +239,7 @@ static void i915_overlay_last_flip_retire(struct i915_active *active)
 }
 
 /* overlay needs to be disabled in OCMD reg */
-int i915_overlay_off(struct drm_device *drm)
+static int i915_overlay_off(struct drm_device *drm)
 {
 	struct drm_i915_private *i915 = to_i915(drm);
 	struct i915_overlay *overlay = i915->overlay;
@@ -286,7 +288,7 @@ int i915_overlay_off(struct drm_device *drm)
  * Recover from an interruption due to a signal.
  * We have to be careful not to repeat work forever an make forward progress.
  */
-int i915_overlay_recover_from_interrupt(struct drm_device *drm)
+static int i915_overlay_recover_from_interrupt(struct drm_device *drm)
 {
 	struct drm_i915_private *i915 = to_i915(drm);
 	struct i915_overlay *overlay = i915->overlay;
@@ -299,7 +301,7 @@ int i915_overlay_recover_from_interrupt(struct drm_device *drm)
  * Needs to be called before the overlay register are changed
  * via intel_overlay_(un)map_regs.
  */
-int i915_overlay_release_old_vid(struct drm_device *drm)
+static int i915_overlay_release_old_vid(struct drm_device *drm)
 {
 	struct drm_i915_private *i915 = to_i915(drm);
 	struct i915_overlay *overlay = i915->overlay;
@@ -337,7 +339,7 @@ int i915_overlay_release_old_vid(struct drm_device *drm)
 	return i915_active_wait(&overlay->last_flip);
 }
 
-void i915_overlay_reset(struct drm_device *drm)
+static void i915_overlay_reset(struct drm_device *drm)
 {
 	struct drm_i915_private *i915 = to_i915(drm);
 	struct i915_overlay *overlay = i915->overlay;
@@ -348,9 +350,9 @@ void i915_overlay_reset(struct drm_device *drm)
 	overlay->frontbuffer_bits = 0;
 }
 
-struct i915_vma *i915_overlay_pin_fb(struct drm_device *drm,
-				     struct drm_gem_object *obj,
-				     u32 *offset)
+static struct i915_vma *i915_overlay_pin_fb(struct drm_device *drm,
+					    struct drm_gem_object *obj,
+					    u32 *offset)
 {
 	struct drm_i915_gem_object *new_bo = to_intel_bo(obj);
 	struct i915_gem_ww_ctx ww;
@@ -379,13 +381,13 @@ struct i915_vma *i915_overlay_pin_fb(struct drm_device *drm,
 	return vma;
 }
 
-void i915_overlay_unpin_fb(struct drm_device *drm,
-			   struct i915_vma *vma)
+static void i915_overlay_unpin_fb(struct drm_device *drm,
+				  struct i915_vma *vma)
 {
 	i915_vma_unpin(vma);
 }
 
-struct drm_gem_object *
+static struct drm_gem_object *
 i915_overlay_obj_lookup(struct drm_device *drm,
 			struct drm_file *file_priv,
 			u32 handle)
@@ -444,8 +446,8 @@ static int get_registers(struct i915_overlay *overlay, bool use_phys)
 	return err;
 }
 
-void __iomem *i915_overlay_setup(struct drm_device *drm,
-				 bool needs_physical)
+static void __iomem *i915_overlay_setup(struct drm_device *drm,
+					bool needs_physical)
 {
 	struct drm_i915_private *i915 = to_i915(drm);
 	struct intel_engine_cs *engine;
@@ -477,7 +479,7 @@ void __iomem *i915_overlay_setup(struct drm_device *drm,
 	return overlay->regs;
 }
 
-void i915_overlay_cleanup(struct drm_device *drm)
+static void i915_overlay_cleanup(struct drm_device *drm)
 {
 	struct drm_i915_private *i915 = to_i915(drm);
 	struct i915_overlay *overlay;
@@ -498,3 +500,18 @@ void i915_overlay_cleanup(struct drm_device *drm)
 
 	kfree(overlay);
 }
+
+const struct intel_display_overlay_interface i915_display_overlay_interface = {
+	.is_active = i915_overlay_is_active,
+	.overlay_on = i915_overlay_on,
+	.overlay_continue = i915_overlay_continue,
+	.overlay_off = i915_overlay_off,
+	.recover_from_interrupt = i915_overlay_recover_from_interrupt,
+	.release_old_vid = i915_overlay_release_old_vid,
+	.reset = i915_overlay_reset,
+	.obj_lookup = i915_overlay_obj_lookup,
+	.pin_fb = i915_overlay_pin_fb,
+	.unpin_fb = i915_overlay_unpin_fb,
+	.setup = i915_overlay_setup,
+	.cleanup = i915_overlay_cleanup,
+};
diff --git a/drivers/gpu/drm/i915/i915_overlay.h b/drivers/gpu/drm/i915/i915_overlay.h
index f553de2abeaa..f8053eb8d189 100644
--- a/drivers/gpu/drm/i915/i915_overlay.h
+++ b/drivers/gpu/drm/i915/i915_overlay.h
@@ -6,38 +6,6 @@
 #ifndef __I915_OVERLAY_H__
 #define __I915_OVERLAY_H__
 
-#include <linux/types.h>
-
-struct drm_device;
-struct drm_file;
-struct drm_gem_object;
-struct i915_vma;
-
-bool i915_overlay_is_active(struct drm_device *drm);
-int i915_overlay_on(struct drm_device *drm,
-		    u32 frontbuffer_bits);
-int i915_overlay_continue(struct drm_device *drm,
-			  struct i915_vma *vma,
-			  bool load_polyphase_filter);
-int i915_overlay_off(struct drm_device *drm);
-int i915_overlay_recover_from_interrupt(struct drm_device *drm);
-int i915_overlay_release_old_vid(struct drm_device *drm);
-
-void i915_overlay_reset(struct drm_device *drm);
-
-struct i915_vma *i915_overlay_pin_fb(struct drm_device *drm,
-				     struct drm_gem_object *obj,
-				     u32 *offset);
-void i915_overlay_unpin_fb(struct drm_device *drm,
-			   struct i915_vma *vma);
-
-struct drm_gem_object *
-i915_overlay_obj_lookup(struct drm_device *drm,
-			struct drm_file *file_priv,
-			u32 handle);
-
-void __iomem *i915_overlay_setup(struct drm_device *drm,
-				 bool needs_physical);
-void i915_overlay_cleanup(struct drm_device *drm);
+extern const struct intel_display_overlay_interface i915_display_overlay_interface;
 
 #endif /* __I915_OVERLAY_H__ */
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 41ec698b3cc1..119e830498a8 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -304,6 +304,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
 	i915-display/intel_modeset_lock.o \
 	i915-display/intel_modeset_setup.o \
 	i915-display/intel_modeset_verify.o \
+	i915-display/intel_overlay.o \
 	i915-display/intel_panel.o \
 	i915-display/intel_parent.o \
 	i915-display/intel_pch.o \
diff --git a/include/drm/intel/display_parent_interface.h b/include/drm/intel/display_parent_interface.h
index 41f4afe7928c..8b248b914b88 100644
--- a/include/drm/intel/display_parent_interface.h
+++ b/include/drm/intel/display_parent_interface.h
@@ -9,6 +9,7 @@
 struct dma_fence;
 struct drm_crtc;
 struct drm_device;
+struct drm_file;
 struct drm_framebuffer;
 struct drm_gem_object;
 struct drm_plane_state;
@@ -55,6 +56,35 @@ struct intel_display_irq_interface {
 	void (*synchronize)(struct drm_device *drm);
 };
 
+struct intel_display_overlay_interface {
+	bool (*is_active)(struct drm_device *drm);
+
+	int (*overlay_on)(struct drm_device *drm,
+			  u32 frontbuffer_bits);
+	int (*overlay_continue)(struct drm_device *drm,
+				struct i915_vma *vma,
+				bool load_polyphase_filter);
+	int (*overlay_off)(struct drm_device *drm);
+	int (*recover_from_interrupt)(struct drm_device *drm);
+	int (*release_old_vid)(struct drm_device *drm);
+
+	void (*reset)(struct drm_device *drm);
+
+	struct i915_vma *(*pin_fb)(struct drm_device *drm,
+				   struct drm_gem_object *obj,
+				   u32 *offset);
+	void (*unpin_fb)(struct drm_device *drm,
+			 struct i915_vma *vma);
+
+	struct drm_gem_object *(*obj_lookup)(struct drm_device *drm,
+					     struct drm_file *filp,
+					     u32 handle);
+
+	void __iomem *(*setup)(struct drm_device *drm,
+			       bool needs_physical);
+	void (*cleanup)(struct drm_device *drm);
+};
+
 struct intel_display_panic_interface {
 	struct intel_panic *(*alloc)(void);
 	int (*setup)(struct intel_panic *panic, struct drm_scanout_buffer *sb);
@@ -139,6 +169,9 @@ struct intel_display_parent_interface {
 	/** @panic: Panic interface */
 	const struct intel_display_panic_interface *panic;
 
+	/** @overlay: Overlay. Optional. */
+	const struct intel_display_overlay_interface *overlay;
+
 	/** @pc8: PC8 interface. Optional. */
 	const struct intel_display_pc8_interface *pc8;
 
-- 
2.52.0

[PATCH v3 18/19] drm/i915/overlay: Move i915 specific code into i915_overlay.c

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Relocate the i915 driver specific parts of the overlay code
into i915_overlay.c. This leaves intel_overlay.c with just
the display specific code.

The one annoyance here is the DSPCLK_GATE_D register access
being done from i830_overlay_clock_gating(). The register
definition lives on the display side as we do need to access
it on other platforms there. Since it's just one register
and bit, I decided to just duplicate that part in i915_reg.h.

v2: Use kzalloc_obj()

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/Makefile                 |   1 +
 .../gpu/drm/i915/display/intel_display_regs.h |   2 -
 drivers/gpu/drm/i915/display/intel_overlay.c  | 490 +----------------
 drivers/gpu/drm/i915/i915_overlay.c           | 500 ++++++++++++++++++
 drivers/gpu/drm/i915/i915_overlay.h           |  43 ++
 drivers/gpu/drm/i915/i915_reg.h               |   4 +
 6 files changed, 550 insertions(+), 490 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/i915_overlay.c
 create mode 100644 drivers/gpu/drm/i915/i915_overlay.h

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 4d6c528d9881..45171de63ef9 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -80,6 +80,7 @@ i915-y += \
 	i915_dsb_buffer.o \
 	i915_hdcp_gsc.o \
 	i915_initial_plane.o \
+	i915_overlay.o \
 	i915_panic.o
 
 # "Graphics Technology" (aka we talk to the gpu)
diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h b/drivers/gpu/drm/i915/display/intel_display_regs.h
index 49e2a9e3ee0e..4746e9ebd920 100644
--- a/drivers/gpu/drm/i915/display/intel_display_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_display_regs.h
@@ -117,8 +117,6 @@
 #define   VLV_ERROR_PAGE_TABLE				(1 << 4)
 #define   VLV_ERROR_CLAIM				(1 << 0)
 
-#define GEN2_ISR	_MMIO(0x20ac)
-
 #define VLV_ERROR_REGS		I915_ERROR_REGS(VLV_EMR, VLV_EIR)
 
 #define _MBUS_ABOX0_CTL			0x45038
diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
index 37c60c08dd56..497bd4ec2224 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -27,24 +27,16 @@
  */
 
 #include <drm/drm_fourcc.h>
+#include <drm/drm_gem.h>
 #include <drm/drm_print.h>
-#include <drm/intel/intel_gmd_interrupt_regs.h>
 
-#include "gem/i915_gem_internal.h"
-#include "gem/i915_gem_object_frontbuffer.h"
-#include "gem/i915_gem_pm.h"
-
-#include "gt/intel_gpu_commands.h"
-#include "gt/intel_ring.h"
-
-#include "i915_drv.h"
+#include "i915_overlay.h"
 #include "intel_color_regs.h"
 #include "intel_de.h"
 #include "intel_display_regs.h"
 #include "intel_display_types.h"
 #include "intel_frontbuffer.h"
 #include "intel_overlay.h"
-#include "intel_pci_config.h"
 #include "intel_pfit_regs.h"
 
 /* Limits for overlay size. According to intel doc, the real limits are:
@@ -121,9 +113,6 @@
 #define RGB8I_TO_COLORKEY(c) \
 	((((c) & 0xff) << 16) | (((c) & 0xff) << 8) | (((c) & 0xff) << 0))
 
-/* overlay flip addr flag */
-#define OFC_UPDATE		0x1
-
 /* polyphase filter coefficients */
 #define N_HORIZ_Y_TAPS          5
 #define N_VERT_Y_TAPS           3
@@ -187,22 +176,6 @@ struct overlay_registers {
 	u16 RESERVEDG[0x100 / 2 - N_HORIZ_UV_TAPS * N_PHASES];
 };
 
-struct i915_overlay {
-	struct drm_i915_private *i915;
-	struct intel_context *context;
-	struct i915_vma *vma;
-	struct i915_vma *old_vma;
-	struct intel_frontbuffer *frontbuffer;
-	/* register access */
-	struct drm_i915_gem_object *reg_bo;
-	void __iomem *regs;
-	u32 flip_addr;
-	u32 frontbuffer_bits;
-	/* flip handling */
-	struct i915_active last_flip;
-	void (*flip_complete)(struct i915_overlay *overlay);
-};
-
 struct intel_overlay {
 	struct intel_display *display;
 	struct intel_crtc *crtc;
@@ -215,314 +188,6 @@ struct intel_overlay {
 	struct overlay_registers __iomem *regs;
 };
 
-static void i830_overlay_clock_gating(struct drm_i915_private *i915,
-				      bool enable)
-{
-	struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
-	u8 val;
-
-	/*
-	 * WA_OVERLAY_CLKGATE:alm
-	 *
-	 * FIXME should perhaps be done on the display side?
-	 */
-	if (enable)
-		intel_uncore_write(&i915->uncore, DSPCLK_GATE_D, 0);
-	else
-		intel_uncore_write(&i915->uncore, DSPCLK_GATE_D, OVRUNIT_CLOCK_GATE_DISABLE);
-
-	/* WA_DISABLE_L2CACHE_CLOCK_GATING:alm */
-	pci_bus_read_config_byte(pdev->bus,
-				 PCI_DEVFN(0, 0), I830_CLOCK_GATE, &val);
-	if (enable)
-		val &= ~I830_L2_CACHE_CLOCK_GATE_DISABLE;
-	else
-		val |= I830_L2_CACHE_CLOCK_GATE_DISABLE;
-	pci_bus_write_config_byte(pdev->bus,
-				  PCI_DEVFN(0, 0), I830_CLOCK_GATE, val);
-}
-
-static struct i915_request *
-alloc_request(struct i915_overlay *overlay, void (*fn)(struct i915_overlay *))
-{
-	struct i915_request *rq;
-	int err;
-
-	overlay->flip_complete = fn;
-
-	rq = i915_request_create(overlay->context);
-	if (IS_ERR(rq))
-		return rq;
-
-	err = i915_active_add_request(&overlay->last_flip, rq);
-	if (err) {
-		i915_request_add(rq);
-		return ERR_PTR(err);
-	}
-
-	return rq;
-}
-
-static bool i915_overlay_is_active(struct drm_device *drm)
-{
-	struct drm_i915_private *i915 = to_i915(drm);
-	struct i915_overlay *overlay = i915->overlay;
-
-	return overlay->frontbuffer_bits;
-}
-
-/* overlay needs to be disable in OCMD reg */
-static int i915_overlay_on(struct drm_device *drm,
-			   u32 frontbuffer_bits)
-{
-	struct drm_i915_private *i915 = to_i915(drm);
-	struct i915_overlay *overlay = i915->overlay;
-	struct i915_request *rq;
-	u32 *cs;
-
-	drm_WARN_ON(drm, i915_overlay_is_active(drm));
-
-	rq = alloc_request(overlay, NULL);
-	if (IS_ERR(rq))
-		return PTR_ERR(rq);
-
-	cs = intel_ring_begin(rq, 4);
-	if (IS_ERR(cs)) {
-		i915_request_add(rq);
-		return PTR_ERR(cs);
-	}
-
-	overlay->frontbuffer_bits = frontbuffer_bits;
-
-	if (IS_I830(i915))
-		i830_overlay_clock_gating(i915, false);
-
-	*cs++ = MI_OVERLAY_FLIP | MI_OVERLAY_ON;
-	*cs++ = overlay->flip_addr | OFC_UPDATE;
-	*cs++ = MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP;
-	*cs++ = MI_NOOP;
-	intel_ring_advance(rq, cs);
-
-	i915_request_add(rq);
-
-	return i915_active_wait(&overlay->last_flip);
-}
-
-static void i915_overlay_flip_prepare(struct i915_overlay *overlay,
-				      struct i915_vma *vma)
-{
-	struct drm_i915_private *i915 = overlay->i915;
-	struct intel_frontbuffer *frontbuffer = NULL;
-
-	drm_WARN_ON(&i915->drm, overlay->old_vma);
-
-	if (vma)
-		frontbuffer = intel_frontbuffer_get(intel_bo_to_drm_bo(vma->obj));
-
-	intel_frontbuffer_track(overlay->frontbuffer, frontbuffer,
-				overlay->frontbuffer_bits);
-
-	if (overlay->frontbuffer)
-		intel_frontbuffer_put(overlay->frontbuffer);
-	overlay->frontbuffer = frontbuffer;
-
-	overlay->old_vma = overlay->vma;
-	if (vma)
-		overlay->vma = i915_vma_get(vma);
-	else
-		overlay->vma = NULL;
-}
-
-/* overlay needs to be enabled in OCMD reg */
-static int i915_overlay_continue(struct drm_device *drm,
-				 struct i915_vma *vma,
-				 bool load_polyphase_filter)
-{
-	struct drm_i915_private *i915 = to_i915(drm);
-	struct i915_overlay *overlay = i915->overlay;
-	struct i915_request *rq;
-	u32 flip_addr = overlay->flip_addr;
-	u32 *cs;
-
-	drm_WARN_ON(drm, !i915_overlay_is_active(drm));
-
-	if (load_polyphase_filter)
-		flip_addr |= OFC_UPDATE;
-
-	rq = alloc_request(overlay, NULL);
-	if (IS_ERR(rq))
-		return PTR_ERR(rq);
-
-	cs = intel_ring_begin(rq, 2);
-	if (IS_ERR(cs)) {
-		i915_request_add(rq);
-		return PTR_ERR(cs);
-	}
-
-	*cs++ = MI_OVERLAY_FLIP | MI_OVERLAY_CONTINUE;
-	*cs++ = flip_addr;
-	intel_ring_advance(rq, cs);
-
-	i915_overlay_flip_prepare(overlay, vma);
-	i915_request_add(rq);
-
-	return 0;
-}
-
-static void i915_overlay_release_old_vma(struct i915_overlay *overlay)
-{
-	struct drm_i915_private *i915 = overlay->i915;
-	struct intel_display *display = i915->display;
-	struct i915_vma *vma;
-
-	vma = fetch_and_zero(&overlay->old_vma);
-	if (drm_WARN_ON(&i915->drm, !vma))
-		return;
-
-	intel_frontbuffer_flip(display, overlay->frontbuffer_bits);
-
-	i915_vma_unpin(vma);
-	i915_vma_put(vma);
-}
-
-static void i915_overlay_release_old_vid_tail(struct i915_overlay *overlay)
-{
-	i915_overlay_release_old_vma(overlay);
-}
-
-static void i915_overlay_off_tail(struct i915_overlay *overlay)
-{
-	struct drm_i915_private *i915 = overlay->i915;
-
-	i915_overlay_release_old_vma(overlay);
-
-	overlay->frontbuffer_bits = 0;
-
-	if (IS_I830(i915))
-		i830_overlay_clock_gating(i915, true);
-}
-
-static void i915_overlay_last_flip_retire(struct i915_active *active)
-{
-	struct i915_overlay *overlay =
-		container_of(active, typeof(*overlay), last_flip);
-
-	if (overlay->flip_complete)
-		overlay->flip_complete(overlay);
-}
-
-/* overlay needs to be disabled in OCMD reg */
-static int i915_overlay_off(struct drm_device *drm)
-{
-	struct drm_i915_private *i915 = to_i915(drm);
-	struct i915_overlay *overlay = i915->overlay;
-	struct i915_request *rq;
-	u32 *cs, flip_addr = overlay->flip_addr;
-
-	drm_WARN_ON(drm, !i915_overlay_is_active(drm));
-
-	/*
-	 * According to intel docs the overlay hw may hang (when switching
-	 * off) without loading the filter coeffs. It is however unclear whether
-	 * this applies to the disabling of the overlay or to the switching off
-	 * of the hw. Do it in both cases.
-	 */
-	flip_addr |= OFC_UPDATE;
-
-	rq = alloc_request(overlay, i915_overlay_off_tail);
-	if (IS_ERR(rq))
-		return PTR_ERR(rq);
-
-	cs = intel_ring_begin(rq, 6);
-	if (IS_ERR(cs)) {
-		i915_request_add(rq);
-		return PTR_ERR(cs);
-	}
-
-	/* wait for overlay to go idle */
-	*cs++ = MI_OVERLAY_FLIP | MI_OVERLAY_CONTINUE;
-	*cs++ = flip_addr;
-	*cs++ = MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP;
-
-	/* turn overlay off */
-	*cs++ = MI_OVERLAY_FLIP | MI_OVERLAY_OFF;
-	*cs++ = flip_addr;
-	*cs++ = MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP;
-
-	intel_ring_advance(rq, cs);
-
-	i915_overlay_flip_prepare(overlay, NULL);
-	i915_request_add(rq);
-
-	return i915_active_wait(&overlay->last_flip);
-}
-
-/*
- * Recover from an interruption due to a signal.
- * We have to be careful not to repeat work forever an make forward progress.
- */
-static int i915_overlay_recover_from_interrupt(struct drm_device *drm)
-{
-	struct drm_i915_private *i915 = to_i915(drm);
-	struct i915_overlay *overlay = i915->overlay;
-
-	return i915_active_wait(&overlay->last_flip);
-}
-
-/*
- * Wait for pending overlay flip and release old frame.
- * Needs to be called before the overlay register are changed
- * via intel_overlay_(un)map_regs.
- */
-static int i915_overlay_release_old_vid(struct drm_device *drm)
-{
-	struct drm_i915_private *i915 = to_i915(drm);
-	struct i915_overlay *overlay = i915->overlay;
-	struct i915_request *rq;
-	u32 *cs;
-
-	/*
-	 * Only wait if there is actually an old frame to release to
-	 * guarantee forward progress.
-	 */
-	if (!overlay->old_vma)
-		return 0;
-
-	if (!(intel_uncore_read(&i915->uncore, GEN2_ISR) & I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT)) {
-		i915_overlay_release_old_vid_tail(overlay);
-		return 0;
-	}
-
-	rq = alloc_request(overlay, i915_overlay_release_old_vid_tail);
-	if (IS_ERR(rq))
-		return PTR_ERR(rq);
-
-	cs = intel_ring_begin(rq, 2);
-	if (IS_ERR(cs)) {
-		i915_request_add(rq);
-		return PTR_ERR(cs);
-	}
-
-	*cs++ = MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP;
-	*cs++ = MI_NOOP;
-	intel_ring_advance(rq, cs);
-
-	i915_request_add(rq);
-
-	return i915_active_wait(&overlay->last_flip);
-}
-
-static void i915_overlay_reset(struct drm_device *drm)
-{
-	struct drm_i915_private *i915 = to_i915(drm);
-	struct i915_overlay *overlay = i915->overlay;
-
-	if (!overlay)
-		return;
-
-	overlay->frontbuffer_bits = 0;
-}
-
 void intel_overlay_reset(struct intel_display *display)
 {
 	struct intel_overlay *overlay = display->overlay;
@@ -796,43 +461,6 @@ static u32 overlay_cmd_reg(struct drm_intel_overlay_put_image *params)
 	return cmd;
 }
 
-static struct i915_vma *i915_overlay_pin_fb(struct drm_device *drm,
-					    struct drm_gem_object *obj,
-					    u32 *offset)
-{
-	struct drm_i915_gem_object *new_bo = to_intel_bo(obj);
-	struct i915_gem_ww_ctx ww;
-	struct i915_vma *vma;
-	int ret;
-
-	i915_gem_ww_ctx_init(&ww, true);
-retry:
-	ret = i915_gem_object_lock(new_bo, &ww);
-	if (!ret) {
-		vma = i915_gem_object_pin_to_display_plane(new_bo, &ww, 0, 0,
-							   NULL, PIN_MAPPABLE);
-		ret = PTR_ERR_OR_ZERO(vma);
-	}
-	if (ret == -EDEADLK) {
-		ret = i915_gem_ww_ctx_backoff(&ww);
-		if (!ret)
-			goto retry;
-	}
-	i915_gem_ww_ctx_fini(&ww);
-	if (ret)
-		return ERR_PTR(ret);
-
-	*offset = i915_ggtt_offset(vma);
-
-	return vma;
-}
-
-static void i915_overlay_unpin_fb(struct drm_device *drm,
-				  struct i915_vma *vma)
-{
-	i915_vma_unpin(vma);
-}
-
 static int intel_overlay_do_put_image(struct intel_overlay *overlay,
 				      struct drm_gem_object *obj,
 				      struct drm_intel_overlay_put_image *params)
@@ -1164,26 +792,6 @@ static int check_overlay_src(struct intel_display *display,
 	return 0;
 }
 
-static struct drm_gem_object *
-i915_overlay_obj_lookup(struct drm_device *drm,
-			struct drm_file *file_priv,
-			u32 handle)
-{
-	struct drm_i915_gem_object *bo;
-
-	bo = i915_gem_object_lookup(file_priv, handle);
-	if (!bo)
-		return ERR_PTR(-ENOENT);
-
-	if (i915_gem_object_is_tiled(bo)) {
-		drm_dbg(drm, "buffer used for overlay image can not be tiled\n");
-		i915_gem_object_put(bo);
-		return ERR_PTR(-EINVAL);
-	}
-
-	return intel_bo_to_drm_bo(bo);
-}
-
 int intel_overlay_put_image_ioctl(struct drm_device *dev, void *data,
 				  struct drm_file *file_priv)
 {
@@ -1416,78 +1024,6 @@ int intel_overlay_attrs_ioctl(struct drm_device *dev, void *data,
 	return ret;
 }
 
-static int get_registers(struct i915_overlay *overlay, bool use_phys)
-{
-	struct drm_i915_private *i915 = overlay->i915;
-	struct drm_i915_gem_object *obj;
-	struct i915_vma *vma;
-	int err;
-
-	obj = i915_gem_object_create_stolen(i915, PAGE_SIZE);
-	if (IS_ERR(obj))
-		obj = i915_gem_object_create_internal(i915, PAGE_SIZE);
-	if (IS_ERR(obj))
-		return PTR_ERR(obj);
-
-	vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, PIN_MAPPABLE);
-	if (IS_ERR(vma)) {
-		err = PTR_ERR(vma);
-		goto err_put_bo;
-	}
-
-	if (use_phys)
-		overlay->flip_addr = sg_dma_address(obj->mm.pages->sgl);
-	else
-		overlay->flip_addr = i915_ggtt_offset(vma);
-	overlay->regs = i915_vma_pin_iomap(vma);
-	i915_vma_unpin(vma);
-
-	if (IS_ERR(overlay->regs)) {
-		err = PTR_ERR(overlay->regs);
-		goto err_put_bo;
-	}
-
-	overlay->reg_bo = obj;
-	return 0;
-
-err_put_bo:
-	i915_gem_object_put(obj);
-	return err;
-}
-
-static void __iomem *i915_overlay_setup(struct drm_device *drm,
-					bool needs_physical)
-{
-	struct drm_i915_private *i915 = to_i915(drm);
-	struct intel_engine_cs *engine;
-	struct i915_overlay *overlay;
-	int ret;
-
-	engine = to_gt(i915)->engine[RCS0];
-	if (!engine || !engine->kernel_context)
-		return ERR_PTR(-ENOENT);
-
-	overlay = kzalloc_obj(*overlay);
-	if (!overlay)
-		return ERR_PTR(-ENOMEM);
-
-	overlay->i915 = i915;
-	overlay->context = engine->kernel_context;
-
-	i915_active_init(&overlay->last_flip,
-			 NULL, i915_overlay_last_flip_retire, 0);
-
-	ret = get_registers(overlay, needs_physical);
-	if (ret) {
-		kfree(overlay);
-		return ERR_PTR(ret);
-	}
-
-	i915->overlay = overlay;
-
-	return overlay->regs;
-}
-
 void intel_overlay_setup(struct intel_display *display)
 {
 	struct intel_overlay *overlay;
@@ -1530,28 +1066,6 @@ bool intel_overlay_available(struct intel_display *display)
 	return display->overlay;
 }
 
-static void i915_overlay_cleanup(struct drm_device *drm)
-{
-	struct drm_i915_private *i915 = to_i915(drm);
-	struct i915_overlay *overlay;
-
-	overlay = fetch_and_zero(&i915->overlay);
-	if (!overlay)
-		return;
-
-	/*
-	 * The bo's should be free'd by the generic code already.
-	 * Furthermore modesetting teardown happens beforehand so the
-	 * hardware should be off already.
-	 */
-	drm_WARN_ON(drm, i915_overlay_is_active(drm));
-
-	i915_gem_object_put(overlay->reg_bo);
-	i915_active_fini(&overlay->last_flip);
-
-	kfree(overlay);
-}
-
 void intel_overlay_cleanup(struct intel_display *display)
 {
 	if (!display->overlay)
diff --git a/drivers/gpu/drm/i915/i915_overlay.c b/drivers/gpu/drm/i915/i915_overlay.c
new file mode 100644
index 000000000000..61869747c6bb
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_overlay.c
@@ -0,0 +1,500 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright 2026, Intel Corporation.
+ */
+
+#include <drm/drm_print.h>
+
+#include <drm/intel/intel_gmd_interrupt_regs.h>
+
+#include "gem/i915_gem_internal.h"
+#include "gem/i915_gem_object_frontbuffer.h"
+#include "gem/i915_gem_pm.h"
+
+#include "gt/intel_gpu_commands.h"
+#include "gt/intel_ring.h"
+
+#include "i915_drv.h"
+#include "i915_overlay.h"
+#include "i915_reg.h"
+#include "intel_pci_config.h"
+
+#include "display/intel_frontbuffer.h"
+
+/* overlay flip addr flag */
+#define OFC_UPDATE		0x1
+
+struct i915_overlay {
+	struct drm_i915_private *i915;
+	struct intel_context *context;
+	struct i915_vma *vma;
+	struct i915_vma *old_vma;
+	struct intel_frontbuffer *frontbuffer;
+	/* register access */
+	struct drm_i915_gem_object *reg_bo;
+	void __iomem *regs;
+	u32 flip_addr;
+	u32 frontbuffer_bits;
+	/* flip handling */
+	struct i915_active last_flip;
+	void (*flip_complete)(struct i915_overlay *overlay);
+};
+
+static void i830_overlay_clock_gating(struct drm_i915_private *i915,
+				      bool enable)
+{
+	struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
+	u8 val;
+
+	/*
+	 * WA_OVERLAY_CLKGATE:alm
+	 *
+	 * FIXME should perhaps be done on the display side?
+	 */
+	if (enable)
+		intel_uncore_write(&i915->uncore, DSPCLK_GATE_D, 0);
+	else
+		intel_uncore_write(&i915->uncore, DSPCLK_GATE_D, OVRUNIT_CLOCK_GATE_DISABLE);
+
+	/* WA_DISABLE_L2CACHE_CLOCK_GATING:alm */
+	pci_bus_read_config_byte(pdev->bus,
+				 PCI_DEVFN(0, 0), I830_CLOCK_GATE, &val);
+	if (enable)
+		val &= ~I830_L2_CACHE_CLOCK_GATE_DISABLE;
+	else
+		val |= I830_L2_CACHE_CLOCK_GATE_DISABLE;
+	pci_bus_write_config_byte(pdev->bus,
+				  PCI_DEVFN(0, 0), I830_CLOCK_GATE, val);
+}
+
+static struct i915_request *
+alloc_request(struct i915_overlay *overlay, void (*fn)(struct i915_overlay *))
+{
+	struct i915_request *rq;
+	int err;
+
+	overlay->flip_complete = fn;
+
+	rq = i915_request_create(overlay->context);
+	if (IS_ERR(rq))
+		return rq;
+
+	err = i915_active_add_request(&overlay->last_flip, rq);
+	if (err) {
+		i915_request_add(rq);
+		return ERR_PTR(err);
+	}
+
+	return rq;
+}
+
+bool i915_overlay_is_active(struct drm_device *drm)
+{
+	struct drm_i915_private *i915 = to_i915(drm);
+	struct i915_overlay *overlay = i915->overlay;
+
+	return overlay->frontbuffer_bits;
+}
+
+/* overlay needs to be disable in OCMD reg */
+int i915_overlay_on(struct drm_device *drm,
+		    u32 frontbuffer_bits)
+{
+	struct drm_i915_private *i915 = to_i915(drm);
+	struct i915_overlay *overlay = i915->overlay;
+	struct i915_request *rq;
+	u32 *cs;
+
+	drm_WARN_ON(drm, i915_overlay_is_active(drm));
+
+	rq = alloc_request(overlay, NULL);
+	if (IS_ERR(rq))
+		return PTR_ERR(rq);
+
+	cs = intel_ring_begin(rq, 4);
+	if (IS_ERR(cs)) {
+		i915_request_add(rq);
+		return PTR_ERR(cs);
+	}
+
+	overlay->frontbuffer_bits = frontbuffer_bits;
+
+	if (IS_I830(i915))
+		i830_overlay_clock_gating(i915, false);
+
+	*cs++ = MI_OVERLAY_FLIP | MI_OVERLAY_ON;
+	*cs++ = overlay->flip_addr | OFC_UPDATE;
+	*cs++ = MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP;
+	*cs++ = MI_NOOP;
+	intel_ring_advance(rq, cs);
+
+	i915_request_add(rq);
+
+	return i915_active_wait(&overlay->last_flip);
+}
+
+static void i915_overlay_flip_prepare(struct i915_overlay *overlay,
+				      struct i915_vma *vma)
+{
+	struct drm_i915_private *i915 = overlay->i915;
+	struct intel_frontbuffer *frontbuffer = NULL;
+
+	drm_WARN_ON(&i915->drm, overlay->old_vma);
+
+	if (vma)
+		frontbuffer = intel_frontbuffer_get(intel_bo_to_drm_bo(vma->obj));
+
+	intel_frontbuffer_track(overlay->frontbuffer, frontbuffer,
+				overlay->frontbuffer_bits);
+
+	if (overlay->frontbuffer)
+		intel_frontbuffer_put(overlay->frontbuffer);
+	overlay->frontbuffer = frontbuffer;
+
+	overlay->old_vma = overlay->vma;
+	if (vma)
+		overlay->vma = i915_vma_get(vma);
+	else
+		overlay->vma = NULL;
+}
+
+/* overlay needs to be enabled in OCMD reg */
+int i915_overlay_continue(struct drm_device *drm,
+			  struct i915_vma *vma,
+			  bool load_polyphase_filter)
+{
+	struct drm_i915_private *i915 = to_i915(drm);
+	struct i915_overlay *overlay = i915->overlay;
+	struct i915_request *rq;
+	u32 flip_addr = overlay->flip_addr;
+	u32 *cs;
+
+	drm_WARN_ON(drm, !i915_overlay_is_active(drm));
+
+	if (load_polyphase_filter)
+		flip_addr |= OFC_UPDATE;
+
+	rq = alloc_request(overlay, NULL);
+	if (IS_ERR(rq))
+		return PTR_ERR(rq);
+
+	cs = intel_ring_begin(rq, 2);
+	if (IS_ERR(cs)) {
+		i915_request_add(rq);
+		return PTR_ERR(cs);
+	}
+
+	*cs++ = MI_OVERLAY_FLIP | MI_OVERLAY_CONTINUE;
+	*cs++ = flip_addr;
+	intel_ring_advance(rq, cs);
+
+	i915_overlay_flip_prepare(overlay, vma);
+	i915_request_add(rq);
+
+	return 0;
+}
+
+static void i915_overlay_release_old_vma(struct i915_overlay *overlay)
+{
+	struct drm_i915_private *i915 = overlay->i915;
+	struct intel_display *display = i915->display;
+	struct i915_vma *vma;
+
+	vma = fetch_and_zero(&overlay->old_vma);
+	if (drm_WARN_ON(&i915->drm, !vma))
+		return;
+
+	intel_frontbuffer_flip(display, overlay->frontbuffer_bits);
+
+	i915_vma_unpin(vma);
+	i915_vma_put(vma);
+}
+
+static void i915_overlay_release_old_vid_tail(struct i915_overlay *overlay)
+{
+	i915_overlay_release_old_vma(overlay);
+}
+
+static void i915_overlay_off_tail(struct i915_overlay *overlay)
+{
+	struct drm_i915_private *i915 = overlay->i915;
+
+	i915_overlay_release_old_vma(overlay);
+
+	overlay->frontbuffer_bits = 0;
+
+	if (IS_I830(i915))
+		i830_overlay_clock_gating(i915, true);
+}
+
+static void i915_overlay_last_flip_retire(struct i915_active *active)
+{
+	struct i915_overlay *overlay =
+		container_of(active, typeof(*overlay), last_flip);
+
+	if (overlay->flip_complete)
+		overlay->flip_complete(overlay);
+}
+
+/* overlay needs to be disabled in OCMD reg */
+int i915_overlay_off(struct drm_device *drm)
+{
+	struct drm_i915_private *i915 = to_i915(drm);
+	struct i915_overlay *overlay = i915->overlay;
+	struct i915_request *rq;
+	u32 *cs, flip_addr = overlay->flip_addr;
+
+	drm_WARN_ON(drm, !i915_overlay_is_active(drm));
+
+	/*
+	 * According to intel docs the overlay hw may hang (when switching
+	 * off) without loading the filter coeffs. It is however unclear whether
+	 * this applies to the disabling of the overlay or to the switching off
+	 * of the hw. Do it in both cases.
+	 */
+	flip_addr |= OFC_UPDATE;
+
+	rq = alloc_request(overlay, i915_overlay_off_tail);
+	if (IS_ERR(rq))
+		return PTR_ERR(rq);
+
+	cs = intel_ring_begin(rq, 6);
+	if (IS_ERR(cs)) {
+		i915_request_add(rq);
+		return PTR_ERR(cs);
+	}
+
+	/* wait for overlay to go idle */
+	*cs++ = MI_OVERLAY_FLIP | MI_OVERLAY_CONTINUE;
+	*cs++ = flip_addr;
+	*cs++ = MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP;
+
+	/* turn overlay off */
+	*cs++ = MI_OVERLAY_FLIP | MI_OVERLAY_OFF;
+	*cs++ = flip_addr;
+	*cs++ = MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP;
+
+	intel_ring_advance(rq, cs);
+
+	i915_overlay_flip_prepare(overlay, NULL);
+	i915_request_add(rq);
+
+	return i915_active_wait(&overlay->last_flip);
+}
+
+/*
+ * Recover from an interruption due to a signal.
+ * We have to be careful not to repeat work forever an make forward progress.
+ */
+int i915_overlay_recover_from_interrupt(struct drm_device *drm)
+{
+	struct drm_i915_private *i915 = to_i915(drm);
+	struct i915_overlay *overlay = i915->overlay;
+
+	return i915_active_wait(&overlay->last_flip);
+}
+
+/*
+ * Wait for pending overlay flip and release old frame.
+ * Needs to be called before the overlay register are changed
+ * via intel_overlay_(un)map_regs.
+ */
+int i915_overlay_release_old_vid(struct drm_device *drm)
+{
+	struct drm_i915_private *i915 = to_i915(drm);
+	struct i915_overlay *overlay = i915->overlay;
+	struct i915_request *rq;
+	u32 *cs;
+
+	/*
+	 * Only wait if there is actually an old frame to release to
+	 * guarantee forward progress.
+	 */
+	if (!overlay->old_vma)
+		return 0;
+
+	if (!(intel_uncore_read(&i915->uncore, GEN2_ISR) & I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT)) {
+		i915_overlay_release_old_vid_tail(overlay);
+		return 0;
+	}
+
+	rq = alloc_request(overlay, i915_overlay_release_old_vid_tail);
+	if (IS_ERR(rq))
+		return PTR_ERR(rq);
+
+	cs = intel_ring_begin(rq, 2);
+	if (IS_ERR(cs)) {
+		i915_request_add(rq);
+		return PTR_ERR(cs);
+	}
+
+	*cs++ = MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP;
+	*cs++ = MI_NOOP;
+	intel_ring_advance(rq, cs);
+
+	i915_request_add(rq);
+
+	return i915_active_wait(&overlay->last_flip);
+}
+
+void i915_overlay_reset(struct drm_device *drm)
+{
+	struct drm_i915_private *i915 = to_i915(drm);
+	struct i915_overlay *overlay = i915->overlay;
+
+	if (!overlay)
+		return;
+
+	overlay->frontbuffer_bits = 0;
+}
+
+struct i915_vma *i915_overlay_pin_fb(struct drm_device *drm,
+				     struct drm_gem_object *obj,
+				     u32 *offset)
+{
+	struct drm_i915_gem_object *new_bo = to_intel_bo(obj);
+	struct i915_gem_ww_ctx ww;
+	struct i915_vma *vma;
+	int ret;
+
+	i915_gem_ww_ctx_init(&ww, true);
+retry:
+	ret = i915_gem_object_lock(new_bo, &ww);
+	if (!ret) {
+		vma = i915_gem_object_pin_to_display_plane(new_bo, &ww, 0, 0,
+							   NULL, PIN_MAPPABLE);
+		ret = PTR_ERR_OR_ZERO(vma);
+	}
+	if (ret == -EDEADLK) {
+		ret = i915_gem_ww_ctx_backoff(&ww);
+		if (!ret)
+			goto retry;
+	}
+	i915_gem_ww_ctx_fini(&ww);
+	if (ret)
+		return ERR_PTR(ret);
+
+	*offset = i915_ggtt_offset(vma);
+
+	return vma;
+}
+
+void i915_overlay_unpin_fb(struct drm_device *drm,
+			   struct i915_vma *vma)
+{
+	i915_vma_unpin(vma);
+}
+
+struct drm_gem_object *
+i915_overlay_obj_lookup(struct drm_device *drm,
+			struct drm_file *file_priv,
+			u32 handle)
+{
+	struct drm_i915_gem_object *bo;
+
+	bo = i915_gem_object_lookup(file_priv, handle);
+	if (!bo)
+		return ERR_PTR(-ENOENT);
+
+	if (i915_gem_object_is_tiled(bo)) {
+		drm_dbg(drm, "buffer used for overlay image can not be tiled\n");
+		i915_gem_object_put(bo);
+		return ERR_PTR(-EINVAL);
+	}
+
+	return intel_bo_to_drm_bo(bo);
+}
+
+static int get_registers(struct i915_overlay *overlay, bool use_phys)
+{
+	struct drm_i915_private *i915 = overlay->i915;
+	struct drm_i915_gem_object *obj;
+	struct i915_vma *vma;
+	int err;
+
+	obj = i915_gem_object_create_stolen(i915, PAGE_SIZE);
+	if (IS_ERR(obj))
+		obj = i915_gem_object_create_internal(i915, PAGE_SIZE);
+	if (IS_ERR(obj))
+		return PTR_ERR(obj);
+
+	vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, PIN_MAPPABLE);
+	if (IS_ERR(vma)) {
+		err = PTR_ERR(vma);
+		goto err_put_bo;
+	}
+
+	if (use_phys)
+		overlay->flip_addr = sg_dma_address(obj->mm.pages->sgl);
+	else
+		overlay->flip_addr = i915_ggtt_offset(vma);
+	overlay->regs = i915_vma_pin_iomap(vma);
+	i915_vma_unpin(vma);
+
+	if (IS_ERR(overlay->regs)) {
+		err = PTR_ERR(overlay->regs);
+		goto err_put_bo;
+	}
+
+	overlay->reg_bo = obj;
+	return 0;
+
+err_put_bo:
+	i915_gem_object_put(obj);
+	return err;
+}
+
+void __iomem *i915_overlay_setup(struct drm_device *drm,
+				 bool needs_physical)
+{
+	struct drm_i915_private *i915 = to_i915(drm);
+	struct intel_engine_cs *engine;
+	struct i915_overlay *overlay;
+	int ret;
+
+	engine = to_gt(i915)->engine[RCS0];
+	if (!engine || !engine->kernel_context)
+		return ERR_PTR(-ENOENT);
+
+	overlay = kzalloc_obj(*overlay);
+	if (!overlay)
+		return ERR_PTR(-ENOMEM);
+
+	overlay->i915 = i915;
+	overlay->context = engine->kernel_context;
+
+	i915_active_init(&overlay->last_flip,
+			 NULL, i915_overlay_last_flip_retire, 0);
+
+	ret = get_registers(overlay, needs_physical);
+	if (ret) {
+		kfree(overlay);
+		return ERR_PTR(ret);
+	}
+
+	i915->overlay = overlay;
+
+	return overlay->regs;
+}
+
+void i915_overlay_cleanup(struct drm_device *drm)
+{
+	struct drm_i915_private *i915 = to_i915(drm);
+	struct i915_overlay *overlay;
+
+	overlay = fetch_and_zero(&i915->overlay);
+	if (!overlay)
+		return;
+
+	/*
+	 * The bo's should be free'd by the generic code already.
+	 * Furthermore modesetting teardown happens beforehand so the
+	 * hardware should be off already.
+	 */
+	drm_WARN_ON(drm, i915_overlay_is_active(drm));
+
+	i915_gem_object_put(overlay->reg_bo);
+	i915_active_fini(&overlay->last_flip);
+
+	kfree(overlay);
+}
diff --git a/drivers/gpu/drm/i915/i915_overlay.h b/drivers/gpu/drm/i915/i915_overlay.h
new file mode 100644
index 000000000000..f553de2abeaa
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_overlay.h
@@ -0,0 +1,43 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef __I915_OVERLAY_H__
+#define __I915_OVERLAY_H__
+
+#include <linux/types.h>
+
+struct drm_device;
+struct drm_file;
+struct drm_gem_object;
+struct i915_vma;
+
+bool i915_overlay_is_active(struct drm_device *drm);
+int i915_overlay_on(struct drm_device *drm,
+		    u32 frontbuffer_bits);
+int i915_overlay_continue(struct drm_device *drm,
+			  struct i915_vma *vma,
+			  bool load_polyphase_filter);
+int i915_overlay_off(struct drm_device *drm);
+int i915_overlay_recover_from_interrupt(struct drm_device *drm);
+int i915_overlay_release_old_vid(struct drm_device *drm);
+
+void i915_overlay_reset(struct drm_device *drm);
+
+struct i915_vma *i915_overlay_pin_fb(struct drm_device *drm,
+				     struct drm_gem_object *obj,
+				     u32 *offset);
+void i915_overlay_unpin_fb(struct drm_device *drm,
+			   struct i915_vma *vma);
+
+struct drm_gem_object *
+i915_overlay_obj_lookup(struct drm_device *drm,
+			struct drm_file *file_priv,
+			u32 handle);
+
+void __iomem *i915_overlay_setup(struct drm_device *drm,
+				 bool needs_physical);
+void i915_overlay_cleanup(struct drm_device *drm);
+
+#endif /* __I915_OVERLAY_H__ */
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 784d99afde64..5d99b99b0c57 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -338,6 +338,7 @@
 #define GEN2_IER	_MMIO(0x20a0)
 #define GEN2_IIR	_MMIO(0x20a4)
 #define GEN2_IMR	_MMIO(0x20a8)
+#define GEN2_ISR	_MMIO(0x20ac)
 
 #define GEN2_IRQ_REGS		I915_IRQ_REGS(GEN2_IMR, \
 					      GEN2_IER, \
@@ -777,4 +778,7 @@
 
 #define MTL_MEDIA_GSI_BASE		0x380000
 
+#define DSPCLK_GATE_D			_MMIO(0x6200)
+# define OVRUNIT_CLOCK_GATE_DISABLE		(1 << 3)
+
 #endif /* _I915_REG_H_ */
-- 
2.52.0

✗ CI.checkpatch: warning for drm/i915/overlay: Convert to parent interface (rev5)

[Patchwork]

== Series Details ==

Series: drm/i915/overlay: Convert to parent interface (rev5)
URL   : https://patchwork.freedesktop.org/series/161766/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
1f57ba1afceae32108bd24770069f764d940a0e4
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit b57c1c3dc57d3aebd3ac34de6a7be3ac9ee1021f
Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date:   Thu Feb 26 15:01:50 2026 +0200

    drm/i915/overlay: Convert overlay to parent interface
    
    Convert the direct i915_overlay_*() calls from the display
    side to go over a new parent interface instead.
    
    v2: Correctly handle the ERR_PTR returned by
        i915_overlay_obj_lookup() (Jani)
    v3: Rebase due to the NULL check in intel_overlay_cleanup()
    
    Reviewed-by: Jani Nikula <jani.nikula@intel.com>
    Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
+ /mt/dim checkpatch 50b03c02e68b265fb85f3844a4c24e57c5ad3b4f drm-intel
98d05e656cf4 drm/i915/overlay: Remove GPU hang snapshot stuff
4defcdaf30cf drm/i915/overlay: Track current frontbuffer_bits
0ed3632a5b72 drm/i915/overlay: Extract i915_overlay_is_active()
2267d092218d drm/i915/overlay: Remove redundant overlay->active
93555713573d drm/i915/overlay: Relocate the underrun check
3f6869728699 drm/i915/overlay: Introduce i915_overlay_obj_lookup()
b846bb0d72f6 drm/i915/overlay: Use struct drm_gem_object as the type
62f6e97b2235 drm/i915/overlay: Extract i915_overlay_reset()
43f5eb4824f6 drm/i915/overlay: Extract i915_overlay_setup()
730adea6e08a drm/i915/overlay: Extract i915_overlay_cleanup()
f5dbb6dce98d drm/i915/overlay: Abstract buffer (un)pinning
52daa180b5f9 drm/i915/overlay: Rename low level i915 specific functions
3efde5824453 drm/i915/overlay: Adjust i915 specific interfaces
6a43fe82c692 drm/i915/overlay: Make i830_overlay_clock_gating() i915 specific
f8c2bb79f50f drm/i915/overlay: s/dev_priv/i915/
4171da8adfe1 drm/i915/overlay: Split 'struct intel_overlay'
-:212: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#212: FILE: drivers/gpu/drm/i915/display/intel_overlay.c:491:
+	if (!(intel_uncore_read(&i915->uncore, GEN2_ISR) & I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT)) {

total: 0 errors, 1 warnings, 0 checks, 311 lines checked
cdcfbc9c8ae9 drm/i915/overlay: Don't use fetch_and_zero() in display code
abd441a32b9b drm/i915/overlay: Move i915 specific code into i915_overlay.c
-:608: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#608: 
new file mode 100644

-:928: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#928: FILE: drivers/gpu/drm/i915/i915_overlay.c:316:
+	if (!(intel_uncore_read(&i915->uncore, GEN2_ISR) & I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT)) {

total: 0 errors, 2 warnings, 0 checks, 1118 lines checked
b57c1c3dc57d drm/i915/overlay: Convert overlay to parent interface

✓ CI.KUnit: success for drm/i915/overlay: Convert to parent interface (rev5)

[Patchwork]

== Series Details ==

Series: drm/i915/overlay: Convert to parent interface (rev5)
URL   : https://patchwork.freedesktop.org/series/161766/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[13:45:59] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:46:04] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[13:46:34] Starting KUnit Kernel (1/1)...
[13:46:34] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:46:34] ================== guc_buf (11 subtests) ===================
[13:46:34] [PASSED] test_smallest
[13:46:34] [PASSED] test_largest
[13:46:34] [PASSED] test_granular
[13:46:34] [PASSED] test_unique
[13:46:34] [PASSED] test_overlap
[13:46:34] [PASSED] test_reusable
[13:46:34] [PASSED] test_too_big
[13:46:34] [PASSED] test_flush
[13:46:34] [PASSED] test_lookup
[13:46:34] [PASSED] test_data
[13:46:34] [PASSED] test_class
[13:46:34] ===================== [PASSED] guc_buf =====================
[13:46:34] =================== guc_dbm (7 subtests) ===================
[13:46:34] [PASSED] test_empty
[13:46:34] [PASSED] test_default
[13:46:34] ======================== test_size  ========================
[13:46:34] [PASSED] 4
[13:46:34] [PASSED] 8
[13:46:34] [PASSED] 32
[13:46:34] [PASSED] 256
[13:46:34] ==================== [PASSED] test_size ====================
[13:46:34] ======================= test_reuse  ========================
[13:46:34] [PASSED] 4
[13:46:34] [PASSED] 8
[13:46:34] [PASSED] 32
[13:46:34] [PASSED] 256
[13:46:34] =================== [PASSED] test_reuse ====================
[13:46:34] =================== test_range_overlap  ====================
[13:46:34] [PASSED] 4
[13:46:34] [PASSED] 8
[13:46:34] [PASSED] 32
[13:46:34] [PASSED] 256
[13:46:34] =============== [PASSED] test_range_overlap ================
[13:46:34] =================== test_range_compact  ====================
[13:46:34] [PASSED] 4
[13:46:34] [PASSED] 8
[13:46:34] [PASSED] 32
[13:46:34] [PASSED] 256
[13:46:34] =============== [PASSED] test_range_compact ================
[13:46:34] ==================== test_range_spare  =====================
[13:46:34] [PASSED] 4
[13:46:34] [PASSED] 8
[13:46:34] [PASSED] 32
[13:46:34] [PASSED] 256
[13:46:34] ================ [PASSED] test_range_spare =================
[13:46:34] ===================== [PASSED] guc_dbm =====================
[13:46:34] =================== guc_idm (6 subtests) ===================
[13:46:34] [PASSED] bad_init
[13:46:34] [PASSED] no_init
[13:46:34] [PASSED] init_fini
[13:46:34] [PASSED] check_used
[13:46:34] [PASSED] check_quota
[13:46:34] [PASSED] check_all
[13:46:34] ===================== [PASSED] guc_idm =====================
[13:46:34] ================== no_relay (3 subtests) ===================
[13:46:34] [PASSED] xe_drops_guc2pf_if_not_ready
[13:46:34] [PASSED] xe_drops_guc2vf_if_not_ready
[13:46:34] [PASSED] xe_rejects_send_if_not_ready
[13:46:34] ==================== [PASSED] no_relay =====================
[13:46:34] ================== pf_relay (14 subtests) ==================
[13:46:34] [PASSED] pf_rejects_guc2pf_too_short
[13:46:34] [PASSED] pf_rejects_guc2pf_too_long
[13:46:34] [PASSED] pf_rejects_guc2pf_no_payload
[13:46:34] [PASSED] pf_fails_no_payload
[13:46:34] [PASSED] pf_fails_bad_origin
[13:46:34] [PASSED] pf_fails_bad_type
[13:46:34] [PASSED] pf_txn_reports_error
[13:46:34] [PASSED] pf_txn_sends_pf2guc
[13:46:34] [PASSED] pf_sends_pf2guc
[13:46:34] [SKIPPED] pf_loopback_nop
[13:46:34] [SKIPPED] pf_loopback_echo
[13:46:34] [SKIPPED] pf_loopback_fail
[13:46:34] [SKIPPED] pf_loopback_busy
[13:46:34] [SKIPPED] pf_loopback_retry
[13:46:34] ==================== [PASSED] pf_relay =====================
[13:46:34] ================== vf_relay (3 subtests) ===================
[13:46:34] [PASSED] vf_rejects_guc2vf_too_short
[13:46:34] [PASSED] vf_rejects_guc2vf_too_long
[13:46:34] [PASSED] vf_rejects_guc2vf_no_payload
[13:46:34] ==================== [PASSED] vf_relay =====================
[13:46:34] ================ pf_gt_config (9 subtests) =================
[13:46:34] [PASSED] fair_contexts_1vf
[13:46:34] [PASSED] fair_doorbells_1vf
[13:46:34] [PASSED] fair_ggtt_1vf
[13:46:34] ====================== fair_vram_1vf  ======================
[13:46:34] [PASSED] 3.50 GiB
[13:46:34] [PASSED] 11.5 GiB
[13:46:34] [PASSED] 15.5 GiB
[13:46:34] [PASSED] 31.5 GiB
[13:46:34] [PASSED] 63.5 GiB
[13:46:34] [PASSED] 13.9 GiB
[13:46:34] ================== [PASSED] fair_vram_1vf ==================
[13:46:34] ================ fair_vram_1vf_admin_only  =================
[13:46:34] [PASSED] 3.50 GiB
[13:46:34] [PASSED] 11.5 GiB
[13:46:34] [PASSED] 15.5 GiB
[13:46:34] [PASSED] 31.5 GiB
[13:46:34] [PASSED] 63.5 GiB
[13:46:34] [PASSED] 13.9 GiB
[13:46:34] ============ [PASSED] fair_vram_1vf_admin_only =============
[13:46:34] ====================== fair_contexts  ======================
[13:46:34] [PASSED] 1 VF
[13:46:34] [PASSED] 2 VFs
[13:46:34] [PASSED] 3 VFs
[13:46:34] [PASSED] 4 VFs
[13:46:34] [PASSED] 5 VFs
[13:46:34] [PASSED] 6 VFs
[13:46:34] [PASSED] 7 VFs
[13:46:34] [PASSED] 8 VFs
[13:46:34] [PASSED] 9 VFs
[13:46:34] [PASSED] 10 VFs
[13:46:34] [PASSED] 11 VFs
[13:46:34] [PASSED] 12 VFs
[13:46:34] [PASSED] 13 VFs
[13:46:34] [PASSED] 14 VFs
[13:46:34] [PASSED] 15 VFs
[13:46:34] [PASSED] 16 VFs
[13:46:34] [PASSED] 17 VFs
[13:46:34] [PASSED] 18 VFs
[13:46:34] [PASSED] 19 VFs
[13:46:34] [PASSED] 20 VFs
[13:46:34] [PASSED] 21 VFs
[13:46:34] [PASSED] 22 VFs
[13:46:34] [PASSED] 23 VFs
[13:46:34] [PASSED] 24 VFs
[13:46:34] [PASSED] 25 VFs
[13:46:34] [PASSED] 26 VFs
[13:46:34] [PASSED] 27 VFs
[13:46:34] [PASSED] 28 VFs
[13:46:34] [PASSED] 29 VFs
[13:46:34] [PASSED] 30 VFs
[13:46:34] [PASSED] 31 VFs
[13:46:34] [PASSED] 32 VFs
[13:46:34] [PASSED] 33 VFs
[13:46:34] [PASSED] 34 VFs
[13:46:34] [PASSED] 35 VFs
[13:46:34] [PASSED] 36 VFs
[13:46:34] [PASSED] 37 VFs
[13:46:34] [PASSED] 38 VFs
[13:46:34] [PASSED] 39 VFs
[13:46:34] [PASSED] 40 VFs
[13:46:34] [PASSED] 41 VFs
[13:46:34] [PASSED] 42 VFs
[13:46:34] [PASSED] 43 VFs
[13:46:34] [PASSED] 44 VFs
[13:46:34] [PASSED] 45 VFs
[13:46:34] [PASSED] 46 VFs
[13:46:34] [PASSED] 47 VFs
[13:46:34] [PASSED] 48 VFs
[13:46:34] [PASSED] 49 VFs
[13:46:34] [PASSED] 50 VFs
[13:46:34] [PASSED] 51 VFs
[13:46:34] [PASSED] 52 VFs
[13:46:34] [PASSED] 53 VFs
[13:46:34] [PASSED] 54 VFs
[13:46:34] [PASSED] 55 VFs
[13:46:34] [PASSED] 56 VFs
[13:46:34] [PASSED] 57 VFs
[13:46:34] [PASSED] 58 VFs
[13:46:34] [PASSED] 59 VFs
[13:46:34] [PASSED] 60 VFs
[13:46:34] [PASSED] 61 VFs
[13:46:34] [PASSED] 62 VFs
[13:46:34] [PASSED] 63 VFs
[13:46:34] ================== [PASSED] fair_contexts ==================
[13:46:34] ===================== fair_doorbells  ======================
[13:46:34] [PASSED] 1 VF
[13:46:34] [PASSED] 2 VFs
[13:46:34] [PASSED] 3 VFs
[13:46:34] [PASSED] 4 VFs
[13:46:34] [PASSED] 5 VFs
[13:46:35] [PASSED] 6 VFs
[13:46:35] [PASSED] 7 VFs
[13:46:35] [PASSED] 8 VFs
[13:46:35] [PASSED] 9 VFs
[13:46:35] [PASSED] 10 VFs
[13:46:35] [PASSED] 11 VFs
[13:46:35] [PASSED] 12 VFs
[13:46:35] [PASSED] 13 VFs
[13:46:35] [PASSED] 14 VFs
[13:46:35] [PASSED] 15 VFs
[13:46:35] [PASSED] 16 VFs
[13:46:35] [PASSED] 17 VFs
[13:46:35] [PASSED] 18 VFs
[13:46:35] [PASSED] 19 VFs
[13:46:35] [PASSED] 20 VFs
[13:46:35] [PASSED] 21 VFs
[13:46:35] [PASSED] 22 VFs
[13:46:35] [PASSED] 23 VFs
[13:46:35] [PASSED] 24 VFs
[13:46:35] [PASSED] 25 VFs
[13:46:35] [PASSED] 26 VFs
[13:46:35] [PASSED] 27 VFs
[13:46:35] [PASSED] 28 VFs
[13:46:35] [PASSED] 29 VFs
[13:46:35] [PASSED] 30 VFs
[13:46:35] [PASSED] 31 VFs
[13:46:35] [PASSED] 32 VFs
[13:46:35] [PASSED] 33 VFs
[13:46:35] [PASSED] 34 VFs
[13:46:35] [PASSED] 35 VFs
[13:46:35] [PASSED] 36 VFs
[13:46:35] [PASSED] 37 VFs
[13:46:35] [PASSED] 38 VFs
[13:46:35] [PASSED] 39 VFs
[13:46:35] [PASSED] 40 VFs
[13:46:35] [PASSED] 41 VFs
[13:46:35] [PASSED] 42 VFs
[13:46:35] [PASSED] 43 VFs
[13:46:35] [PASSED] 44 VFs
[13:46:35] [PASSED] 45 VFs
[13:46:35] [PASSED] 46 VFs
[13:46:35] [PASSED] 47 VFs
[13:46:35] [PASSED] 48 VFs
[13:46:35] [PASSED] 49 VFs
[13:46:35] [PASSED] 50 VFs
[13:46:35] [PASSED] 51 VFs
[13:46:35] [PASSED] 52 VFs
[13:46:35] [PASSED] 53 VFs
[13:46:35] [PASSED] 54 VFs
[13:46:35] [PASSED] 55 VFs
[13:46:35] [PASSED] 56 VFs
[13:46:35] [PASSED] 57 VFs
[13:46:35] [PASSED] 58 VFs
[13:46:35] [PASSED] 59 VFs
[13:46:35] [PASSED] 60 VFs
[13:46:35] [PASSED] 61 VFs
[13:46:35] [PASSED] 62 VFs
[13:46:35] [PASSED] 63 VFs
[13:46:35] ================= [PASSED] fair_doorbells ==================
[13:46:35] ======================== fair_ggtt  ========================
[13:46:35] [PASSED] 1 VF
[13:46:35] [PASSED] 2 VFs
[13:46:35] [PASSED] 3 VFs
[13:46:35] [PASSED] 4 VFs
[13:46:35] [PASSED] 5 VFs
[13:46:35] [PASSED] 6 VFs
[13:46:35] [PASSED] 7 VFs
[13:46:35] [PASSED] 8 VFs
[13:46:35] [PASSED] 9 VFs
[13:46:35] [PASSED] 10 VFs
[13:46:35] [PASSED] 11 VFs
[13:46:35] [PASSED] 12 VFs
[13:46:35] [PASSED] 13 VFs
[13:46:35] [PASSED] 14 VFs
[13:46:35] [PASSED] 15 VFs
[13:46:35] [PASSED] 16 VFs
[13:46:35] [PASSED] 17 VFs
[13:46:35] [PASSED] 18 VFs
[13:46:35] [PASSED] 19 VFs
[13:46:35] [PASSED] 20 VFs
[13:46:35] [PASSED] 21 VFs
[13:46:35] [PASSED] 22 VFs
[13:46:35] [PASSED] 23 VFs
[13:46:35] [PASSED] 24 VFs
[13:46:35] [PASSED] 25 VFs
[13:46:35] [PASSED] 26 VFs
[13:46:35] [PASSED] 27 VFs
[13:46:35] [PASSED] 28 VFs
[13:46:35] [PASSED] 29 VFs
[13:46:35] [PASSED] 30 VFs
[13:46:35] [PASSED] 31 VFs
[13:46:35] [PASSED] 32 VFs
[13:46:35] [PASSED] 33 VFs
[13:46:35] [PASSED] 34 VFs
[13:46:35] [PASSED] 35 VFs
[13:46:35] [PASSED] 36 VFs
[13:46:35] [PASSED] 37 VFs
[13:46:35] [PASSED] 38 VFs
[13:46:35] [PASSED] 39 VFs
[13:46:35] [PASSED] 40 VFs
[13:46:35] [PASSED] 41 VFs
[13:46:35] [PASSED] 42 VFs
[13:46:35] [PASSED] 43 VFs
[13:46:35] [PASSED] 44 VFs
[13:46:35] [PASSED] 45 VFs
[13:46:35] [PASSED] 46 VFs
[13:46:35] [PASSED] 47 VFs
[13:46:35] [PASSED] 48 VFs
[13:46:35] [PASSED] 49 VFs
[13:46:35] [PASSED] 50 VFs
[13:46:35] [PASSED] 51 VFs
[13:46:35] [PASSED] 52 VFs
[13:46:35] [PASSED] 53 VFs
[13:46:35] [PASSED] 54 VFs
[13:46:35] [PASSED] 55 VFs
[13:46:35] [PASSED] 56 VFs
[13:46:35] [PASSED] 57 VFs
[13:46:35] [PASSED] 58 VFs
[13:46:35] [PASSED] 59 VFs
[13:46:35] [PASSED] 60 VFs
[13:46:35] [PASSED] 61 VFs
[13:46:35] [PASSED] 62 VFs
[13:46:35] [PASSED] 63 VFs
[13:46:35] ==================== [PASSED] fair_ggtt ====================
[13:46:35] ======================== fair_vram  ========================
[13:46:35] [PASSED] 1 VF
[13:46:35] [PASSED] 2 VFs
[13:46:35] [PASSED] 3 VFs
[13:46:35] [PASSED] 4 VFs
[13:46:35] [PASSED] 5 VFs
[13:46:35] [PASSED] 6 VFs
[13:46:35] [PASSED] 7 VFs
[13:46:35] [PASSED] 8 VFs
[13:46:35] [PASSED] 9 VFs
[13:46:35] [PASSED] 10 VFs
[13:46:35] [PASSED] 11 VFs
[13:46:35] [PASSED] 12 VFs
[13:46:35] [PASSED] 13 VFs
[13:46:35] [PASSED] 14 VFs
[13:46:35] [PASSED] 15 VFs
[13:46:35] [PASSED] 16 VFs
[13:46:35] [PASSED] 17 VFs
[13:46:35] [PASSED] 18 VFs
[13:46:35] [PASSED] 19 VFs
[13:46:35] [PASSED] 20 VFs
[13:46:35] [PASSED] 21 VFs
[13:46:35] [PASSED] 22 VFs
[13:46:35] [PASSED] 23 VFs
[13:46:35] [PASSED] 24 VFs
[13:46:35] [PASSED] 25 VFs
[13:46:35] [PASSED] 26 VFs
[13:46:35] [PASSED] 27 VFs
[13:46:35] [PASSED] 28 VFs
[13:46:35] [PASSED] 29 VFs
[13:46:35] [PASSED] 30 VFs
[13:46:35] [PASSED] 31 VFs
[13:46:35] [PASSED] 32 VFs
[13:46:35] [PASSED] 33 VFs
[13:46:35] [PASSED] 34 VFs
[13:46:35] [PASSED] 35 VFs
[13:46:35] [PASSED] 36 VFs
[13:46:35] [PASSED] 37 VFs
[13:46:35] [PASSED] 38 VFs
[13:46:35] [PASSED] 39 VFs
[13:46:35] [PASSED] 40 VFs
[13:46:35] [PASSED] 41 VFs
[13:46:35] [PASSED] 42 VFs
[13:46:35] [PASSED] 43 VFs
[13:46:35] [PASSED] 44 VFs
[13:46:35] [PASSED] 45 VFs
[13:46:35] [PASSED] 46 VFs
[13:46:35] [PASSED] 47 VFs
[13:46:35] [PASSED] 48 VFs
[13:46:35] [PASSED] 49 VFs
[13:46:35] [PASSED] 50 VFs
[13:46:35] [PASSED] 51 VFs
[13:46:35] [PASSED] 52 VFs
[13:46:35] [PASSED] 53 VFs
[13:46:35] [PASSED] 54 VFs
[13:46:35] [PASSED] 55 VFs
[13:46:35] [PASSED] 56 VFs
[13:46:35] [PASSED] 57 VFs
[13:46:35] [PASSED] 58 VFs
[13:46:35] [PASSED] 59 VFs
[13:46:35] [PASSED] 60 VFs
[13:46:35] [PASSED] 61 VFs
[13:46:35] [PASSED] 62 VFs
[13:46:35] [PASSED] 63 VFs
[13:46:35] ==================== [PASSED] fair_vram ====================
[13:46:35] ================== [PASSED] pf_gt_config ===================
[13:46:35] ===================== lmtt (1 subtest) =====================
[13:46:35] ======================== test_ops  =========================
[13:46:35] [PASSED] 2-level
[13:46:35] [PASSED] multi-level
[13:46:35] ==================== [PASSED] test_ops =====================
[13:46:35] ====================== [PASSED] lmtt =======================
[13:46:35] ================= pf_service (11 subtests) =================
[13:46:35] [PASSED] pf_negotiate_any
[13:46:35] [PASSED] pf_negotiate_base_match
[13:46:35] [PASSED] pf_negotiate_base_newer
[13:46:35] [PASSED] pf_negotiate_base_next
[13:46:35] [SKIPPED] pf_negotiate_base_older
[13:46:35] [PASSED] pf_negotiate_base_prev
[13:46:35] [PASSED] pf_negotiate_latest_match
[13:46:35] [PASSED] pf_negotiate_latest_newer
[13:46:35] [PASSED] pf_negotiate_latest_next
[13:46:35] [SKIPPED] pf_negotiate_latest_older
[13:46:35] [SKIPPED] pf_negotiate_latest_prev
[13:46:35] =================== [PASSED] pf_service ====================
[13:46:35] ================= xe_guc_g2g (2 subtests) ==================
[13:46:35] ============== xe_live_guc_g2g_kunit_default  ==============
[13:46:35] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[13:46:35] ============== xe_live_guc_g2g_kunit_allmem  ===============
[13:46:35] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[13:46:35] =================== [SKIPPED] xe_guc_g2g ===================
[13:46:35] =================== xe_mocs (2 subtests) ===================
[13:46:35] ================ xe_live_mocs_kernel_kunit  ================
[13:46:35] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[13:46:35] ================ xe_live_mocs_reset_kunit  =================
[13:46:35] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[13:46:35] ==================== [SKIPPED] xe_mocs =====================
[13:46:35] ================= xe_migrate (2 subtests) ==================
[13:46:35] ================= xe_migrate_sanity_kunit  =================
[13:46:35] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[13:46:35] ================== xe_validate_ccs_kunit  ==================
[13:46:35] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[13:46:35] =================== [SKIPPED] xe_migrate ===================
[13:46:35] ================== xe_dma_buf (1 subtest) ==================
[13:46:35] ==================== xe_dma_buf_kunit  =====================
[13:46:35] ================ [SKIPPED] xe_dma_buf_kunit ================
[13:46:35] =================== [SKIPPED] xe_dma_buf ===================
[13:46:35] ================= xe_bo_shrink (1 subtest) =================
[13:46:35] =================== xe_bo_shrink_kunit  ====================
[13:46:35] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[13:46:35] ================== [SKIPPED] xe_bo_shrink ==================
[13:46:35] ==================== xe_bo (2 subtests) ====================
[13:46:35] ================== xe_ccs_migrate_kunit  ===================
[13:46:35] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[13:46:35] ==================== xe_bo_evict_kunit  ====================
[13:46:35] =============== [SKIPPED] xe_bo_evict_kunit ================
[13:46:35] ===================== [SKIPPED] xe_bo ======================
[13:46:35] ==================== args (13 subtests) ====================
[13:46:35] [PASSED] count_args_test
[13:46:35] [PASSED] call_args_example
[13:46:35] [PASSED] call_args_test
[13:46:35] [PASSED] drop_first_arg_example
[13:46:35] [PASSED] drop_first_arg_test
[13:46:35] [PASSED] first_arg_example
[13:46:35] [PASSED] first_arg_test
[13:46:35] [PASSED] last_arg_example
[13:46:35] [PASSED] last_arg_test
[13:46:35] [PASSED] pick_arg_example
[13:46:35] [PASSED] if_args_example
[13:46:35] [PASSED] if_args_test
[13:46:35] [PASSED] sep_comma_example
[13:46:35] ====================== [PASSED] args =======================
[13:46:35] =================== xe_pci (3 subtests) ====================
[13:46:35] ==================== check_graphics_ip  ====================
[13:46:35] [PASSED] 12.00 Xe_LP
[13:46:35] [PASSED] 12.10 Xe_LP+
[13:46:35] [PASSED] 12.55 Xe_HPG
[13:46:35] [PASSED] 12.60 Xe_HPC
[13:46:35] [PASSED] 12.70 Xe_LPG
[13:46:35] [PASSED] 12.71 Xe_LPG
[13:46:35] [PASSED] 12.74 Xe_LPG+
[13:46:35] [PASSED] 20.01 Xe2_HPG
[13:46:35] [PASSED] 20.02 Xe2_HPG
[13:46:35] [PASSED] 20.04 Xe2_LPG
[13:46:35] [PASSED] 30.00 Xe3_LPG
[13:46:35] [PASSED] 30.01 Xe3_LPG
[13:46:35] [PASSED] 30.03 Xe3_LPG
[13:46:35] [PASSED] 30.04 Xe3_LPG
[13:46:35] [PASSED] 30.05 Xe3_LPG
[13:46:35] [PASSED] 35.10 Xe3p_LPG
[13:46:35] [PASSED] 35.11 Xe3p_XPC
[13:46:35] ================ [PASSED] check_graphics_ip ================
[13:46:35] ===================== check_media_ip  ======================
[13:46:35] [PASSED] 12.00 Xe_M
[13:46:35] [PASSED] 12.55 Xe_HPM
[13:46:35] [PASSED] 13.00 Xe_LPM+
[13:46:35] [PASSED] 13.01 Xe2_HPM
[13:46:35] [PASSED] 20.00 Xe2_LPM
[13:46:35] [PASSED] 30.00 Xe3_LPM
[13:46:35] [PASSED] 30.02 Xe3_LPM
[13:46:35] [PASSED] 35.00 Xe3p_LPM
[13:46:35] [PASSED] 35.03 Xe3p_HPM
[13:46:35] ================= [PASSED] check_media_ip ==================
[13:46:35] =================== check_platform_desc  ===================
[13:46:35] [PASSED] 0x9A60 (TIGERLAKE)
[13:46:35] [PASSED] 0x9A68 (TIGERLAKE)
[13:46:35] [PASSED] 0x9A70 (TIGERLAKE)
[13:46:35] [PASSED] 0x9A40 (TIGERLAKE)
[13:46:35] [PASSED] 0x9A49 (TIGERLAKE)
[13:46:35] [PASSED] 0x9A59 (TIGERLAKE)
[13:46:35] [PASSED] 0x9A78 (TIGERLAKE)
[13:46:35] [PASSED] 0x9AC0 (TIGERLAKE)
[13:46:35] [PASSED] 0x9AC9 (TIGERLAKE)
[13:46:35] [PASSED] 0x9AD9 (TIGERLAKE)
[13:46:35] [PASSED] 0x9AF8 (TIGERLAKE)
[13:46:35] [PASSED] 0x4C80 (ROCKETLAKE)
[13:46:35] [PASSED] 0x4C8A (ROCKETLAKE)
[13:46:35] [PASSED] 0x4C8B (ROCKETLAKE)
[13:46:35] [PASSED] 0x4C8C (ROCKETLAKE)
[13:46:35] [PASSED] 0x4C90 (ROCKETLAKE)
[13:46:35] [PASSED] 0x4C9A (ROCKETLAKE)
[13:46:35] [PASSED] 0x4680 (ALDERLAKE_S)
[13:46:35] [PASSED] 0x4682 (ALDERLAKE_S)
[13:46:35] [PASSED] 0x4688 (ALDERLAKE_S)
[13:46:35] [PASSED] 0x468A (ALDERLAKE_S)
[13:46:35] [PASSED] 0x468B (ALDERLAKE_S)
[13:46:35] [PASSED] 0x4690 (ALDERLAKE_S)
[13:46:35] [PASSED] 0x4692 (ALDERLAKE_S)
[13:46:35] [PASSED] 0x4693 (ALDERLAKE_S)
[13:46:35] [PASSED] 0x46A0 (ALDERLAKE_P)
[13:46:35] [PASSED] 0x46A1 (ALDERLAKE_P)
[13:46:35] [PASSED] 0x46A2 (ALDERLAKE_P)
[13:46:35] [PASSED] 0x46A3 (ALDERLAKE_P)
[13:46:35] [PASSED] 0x46A6 (ALDERLAKE_P)
[13:46:35] [PASSED] 0x46A8 (ALDERLAKE_P)
[13:46:35] [PASSED] 0x46AA (ALDERLAKE_P)
[13:46:35] [PASSED] 0x462A (ALDERLAKE_P)
[13:46:35] [PASSED] 0x4626 (ALDERLAKE_P)
[13:46:35] [PASSED] 0x4628 (ALDERLAKE_P)
[13:46:35] [PASSED] 0x46B0 (ALDERLAKE_P)
[13:46:35] [PASSED] 0x46B1 (ALDERLAKE_P)
[13:46:35] [PASSED] 0x46B2 (ALDERLAKE_P)
[13:46:35] [PASSED] 0x46B3 (ALDERLAKE_P)
[13:46:35] [PASSED] 0x46C0 (ALDERLAKE_P)
[13:46:35] [PASSED] 0x46C1 (ALDERLAKE_P)
[13:46:35] [PASSED] 0x46C2 (ALDERLAKE_P)
[13:46:35] [PASSED] 0x46C3 (ALDERLAKE_P)
[13:46:35] [PASSED] 0x46D0 (ALDERLAKE_N)
[13:46:35] [PASSED] 0x46D1 (ALDERLAKE_N)
[13:46:35] [PASSED] 0x46D2 (ALDERLAKE_N)
[13:46:35] [PASSED] 0x46D3 (ALDERLAKE_N)
[13:46:35] [PASSED] 0x46D4 (ALDERLAKE_N)
[13:46:35] [PASSED] 0xA721 (ALDERLAKE_P)
[13:46:35] [PASSED] 0xA7A1 (ALDERLAKE_P)
[13:46:35] [PASSED] 0xA7A9 (ALDERLAKE_P)
[13:46:35] [PASSED] 0xA7AC (ALDERLAKE_P)
[13:46:35] [PASSED] 0xA7AD (ALDERLAKE_P)
[13:46:35] [PASSED] 0xA720 (ALDERLAKE_P)
[13:46:35] [PASSED] 0xA7A0 (ALDERLAKE_P)
[13:46:35] [PASSED] 0xA7A8 (ALDERLAKE_P)
[13:46:35] [PASSED] 0xA7AA (ALDERLAKE_P)
[13:46:35] [PASSED] 0xA7AB (ALDERLAKE_P)
[13:46:35] [PASSED] 0xA780 (ALDERLAKE_S)
[13:46:35] [PASSED] 0xA781 (ALDERLAKE_S)
[13:46:35] [PASSED] 0xA782 (ALDERLAKE_S)
[13:46:35] [PASSED] 0xA783 (ALDERLAKE_S)
[13:46:35] [PASSED] 0xA788 (ALDERLAKE_S)
[13:46:35] [PASSED] 0xA789 (ALDERLAKE_S)
[13:46:35] [PASSED] 0xA78A (ALDERLAKE_S)
[13:46:35] [PASSED] 0xA78B (ALDERLAKE_S)
[13:46:35] [PASSED] 0x4905 (DG1)
[13:46:35] [PASSED] 0x4906 (DG1)
[13:46:35] [PASSED] 0x4907 (DG1)
[13:46:35] [PASSED] 0x4908 (DG1)
[13:46:35] [PASSED] 0x4909 (DG1)
[13:46:35] [PASSED] 0x56C0 (DG2)
[13:46:35] [PASSED] 0x56C2 (DG2)
[13:46:35] [PASSED] 0x56C1 (DG2)
[13:46:35] [PASSED] 0x7D51 (METEORLAKE)
[13:46:35] [PASSED] 0x7DD1 (METEORLAKE)
[13:46:35] [PASSED] 0x7D41 (METEORLAKE)
[13:46:35] [PASSED] 0x7D67 (METEORLAKE)
[13:46:35] [PASSED] 0xB640 (METEORLAKE)
[13:46:35] [PASSED] 0x56A0 (DG2)
[13:46:35] [PASSED] 0x56A1 (DG2)
[13:46:35] [PASSED] 0x56A2 (DG2)
[13:46:35] [PASSED] 0x56BE (DG2)
[13:46:35] [PASSED] 0x56BF (DG2)
[13:46:35] [PASSED] 0x5690 (DG2)
[13:46:35] [PASSED] 0x5691 (DG2)
[13:46:35] [PASSED] 0x5692 (DG2)
[13:46:35] [PASSED] 0x56A5 (DG2)
[13:46:35] [PASSED] 0x56A6 (DG2)
[13:46:35] [PASSED] 0x56B0 (DG2)
[13:46:35] [PASSED] 0x56B1 (DG2)
[13:46:35] [PASSED] 0x56BA (DG2)
[13:46:35] [PASSED] 0x56BB (DG2)
[13:46:35] [PASSED] 0x56BC (DG2)
[13:46:35] [PASSED] 0x56BD (DG2)
[13:46:35] [PASSED] 0x5693 (DG2)
[13:46:35] [PASSED] 0x5694 (DG2)
[13:46:35] [PASSED] 0x5695 (DG2)
[13:46:35] [PASSED] 0x56A3 (DG2)
[13:46:35] [PASSED] 0x56A4 (DG2)
[13:46:35] [PASSED] 0x56B2 (DG2)
[13:46:35] [PASSED] 0x56B3 (DG2)
[13:46:35] [PASSED] 0x5696 (DG2)
[13:46:35] [PASSED] 0x5697 (DG2)
[13:46:35] [PASSED] 0xB69 (PVC)
[13:46:35] [PASSED] 0xB6E (PVC)
[13:46:35] [PASSED] 0xBD4 (PVC)
[13:46:35] [PASSED] 0xBD5 (PVC)
[13:46:35] [PASSED] 0xBD6 (PVC)
[13:46:35] [PASSED] 0xBD7 (PVC)
[13:46:35] [PASSED] 0xBD8 (PVC)
[13:46:35] [PASSED] 0xBD9 (PVC)
[13:46:35] [PASSED] 0xBDA (PVC)
[13:46:35] [PASSED] 0xBDB (PVC)
[13:46:35] [PASSED] 0xBE0 (PVC)
[13:46:35] [PASSED] 0xBE1 (PVC)
[13:46:35] [PASSED] 0xBE5 (PVC)
[13:46:35] [PASSED] 0x7D40 (METEORLAKE)
[13:46:35] [PASSED] 0x7D45 (METEORLAKE)
[13:46:35] [PASSED] 0x7D55 (METEORLAKE)
[13:46:35] [PASSED] 0x7D60 (METEORLAKE)
[13:46:35] [PASSED] 0x7DD5 (METEORLAKE)
[13:46:35] [PASSED] 0x6420 (LUNARLAKE)
[13:46:35] [PASSED] 0x64A0 (LUNARLAKE)
[13:46:35] [PASSED] 0x64B0 (LUNARLAKE)
[13:46:35] [PASSED] 0xE202 (BATTLEMAGE)
[13:46:35] [PASSED] 0xE209 (BATTLEMAGE)
[13:46:35] [PASSED] 0xE20B (BATTLEMAGE)
[13:46:35] [PASSED] 0xE20C (BATTLEMAGE)
[13:46:35] [PASSED] 0xE20D (BATTLEMAGE)
[13:46:35] [PASSED] 0xE210 (BATTLEMAGE)
[13:46:35] [PASSED] 0xE211 (BATTLEMAGE)
[13:46:35] [PASSED] 0xE212 (BATTLEMAGE)
[13:46:35] [PASSED] 0xE216 (BATTLEMAGE)
[13:46:35] [PASSED] 0xE220 (BATTLEMAGE)
[13:46:35] [PASSED] 0xE221 (BATTLEMAGE)
[13:46:35] [PASSED] 0xE222 (BATTLEMAGE)
[13:46:35] [PASSED] 0xE223 (BATTLEMAGE)
[13:46:35] [PASSED] 0xB080 (PANTHERLAKE)
[13:46:35] [PASSED] 0xB081 (PANTHERLAKE)
[13:46:35] [PASSED] 0xB082 (PANTHERLAKE)
[13:46:35] [PASSED] 0xB083 (PANTHERLAKE)
[13:46:35] [PASSED] 0xB084 (PANTHERLAKE)
[13:46:35] [PASSED] 0xB085 (PANTHERLAKE)
[13:46:35] [PASSED] 0xB086 (PANTHERLAKE)
[13:46:35] [PASSED] 0xB087 (PANTHERLAKE)
[13:46:35] [PASSED] 0xB08F (PANTHERLAKE)
[13:46:35] [PASSED] 0xB090 (PANTHERLAKE)
[13:46:35] [PASSED] 0xB0A0 (PANTHERLAKE)
[13:46:35] [PASSED] 0xB0B0 (PANTHERLAKE)
[13:46:35] [PASSED] 0xFD80 (PANTHERLAKE)
[13:46:35] [PASSED] 0xFD81 (PANTHERLAKE)
[13:46:35] [PASSED] 0xD740 (NOVALAKE_S)
[13:46:35] [PASSED] 0xD741 (NOVALAKE_S)
[13:46:35] [PASSED] 0xD742 (NOVALAKE_S)
[13:46:35] [PASSED] 0xD743 (NOVALAKE_S)
[13:46:35] [PASSED] 0xD744 (NOVALAKE_S)
[13:46:35] [PASSED] 0xD745 (NOVALAKE_S)
[13:46:35] [PASSED] 0x674C (CRESCENTISLAND)
[13:46:35] [PASSED] 0xD750 (NOVALAKE_P)
[13:46:35] [PASSED] 0xD751 (NOVALAKE_P)
[13:46:35] [PASSED] 0xD752 (NOVALAKE_P)
[13:46:35] [PASSED] 0xD753 (NOVALAKE_P)
[13:46:35] [PASSED] 0xD754 (NOVALAKE_P)
[13:46:35] [PASSED] 0xD755 (NOVALAKE_P)
[13:46:35] [PASSED] 0xD756 (NOVALAKE_P)
[13:46:35] [PASSED] 0xD757 (NOVALAKE_P)
[13:46:35] [PASSED] 0xD75F (NOVALAKE_P)
[13:46:35] =============== [PASSED] check_platform_desc ===============
[13:46:35] ===================== [PASSED] xe_pci ======================
[13:46:35] =================== xe_rtp (2 subtests) ====================
[13:46:35] =============== xe_rtp_process_to_sr_tests  ================
[13:46:35] [PASSED] coalesce-same-reg
[13:46:35] [PASSED] no-match-no-add
[13:46:35] [PASSED] match-or
[13:46:35] [PASSED] match-or-xfail
[13:46:35] [PASSED] no-match-no-add-multiple-rules
[13:46:35] [PASSED] two-regs-two-entries
[13:46:35] [PASSED] clr-one-set-other
[13:46:35] [PASSED] set-field
[13:46:35] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[13:46:35] [PASSED] conflict-not-disjoint
[13:46:35] [PASSED] conflict-reg-type
[13:46:35] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[13:46:35] ================== xe_rtp_process_tests  ===================
[13:46:35] [PASSED] active1
[13:46:35] [PASSED] active2
[13:46:35] [PASSED] active-inactive
[13:46:35] [PASSED] inactive-active
[13:46:35] [PASSED] inactive-1st_or_active-inactive
[13:46:35] [PASSED] inactive-2nd_or_active-inactive
[13:46:35] [PASSED] inactive-last_or_active-inactive
[13:46:35] [PASSED] inactive-no_or_active-inactive
[13:46:35] ============== [PASSED] xe_rtp_process_tests ===============
[13:46:35] ===================== [PASSED] xe_rtp ======================
[13:46:35] ==================== xe_wa (1 subtest) =====================
[13:46:35] ======================== xe_wa_gt  =========================
[13:46:35] [PASSED] TIGERLAKE B0
[13:46:35] [PASSED] DG1 A0
[13:46:35] [PASSED] DG1 B0
[13:46:35] [PASSED] ALDERLAKE_S A0
[13:46:35] [PASSED] ALDERLAKE_S B0
[13:46:35] [PASSED] ALDERLAKE_S C0
[13:46:35] [PASSED] ALDERLAKE_S D0
[13:46:35] [PASSED] ALDERLAKE_P A0
[13:46:35] [PASSED] ALDERLAKE_P B0
[13:46:35] [PASSED] ALDERLAKE_P C0
[13:46:35] [PASSED] ALDERLAKE_S RPLS D0
[13:46:35] [PASSED] ALDERLAKE_P RPLU E0
[13:46:35] [PASSED] DG2 G10 C0
[13:46:35] [PASSED] DG2 G11 B1
[13:46:35] [PASSED] DG2 G12 A1
[13:46:35] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[13:46:35] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[13:46:35] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[13:46:35] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[13:46:35] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[13:46:35] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[13:46:35] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[13:46:35] ==================== [PASSED] xe_wa_gt =====================
[13:46:35] ====================== [PASSED] xe_wa ======================
[13:46:35] ============================================================
[13:46:35] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[13:46:35] Elapsed time: 35.343s total, 4.229s configuring, 30.497s building, 0.610s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[13:46:35] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:46:37] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[13:47:01] Starting KUnit Kernel (1/1)...
[13:47:01] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:47:01] ============ drm_test_pick_cmdline (2 subtests) ============
[13:47:01] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[13:47:01] =============== drm_test_pick_cmdline_named  ===============
[13:47:01] [PASSED] NTSC
[13:47:01] [PASSED] NTSC-J
[13:47:01] [PASSED] PAL
[13:47:01] [PASSED] PAL-M
[13:47:01] =========== [PASSED] drm_test_pick_cmdline_named ===========
[13:47:01] ============== [PASSED] drm_test_pick_cmdline ==============
[13:47:01] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[13:47:01] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[13:47:01] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[13:47:01] =========== drm_validate_clone_mode (2 subtests) ===========
[13:47:01] ============== drm_test_check_in_clone_mode  ===============
[13:47:01] [PASSED] in_clone_mode
[13:47:01] [PASSED] not_in_clone_mode
[13:47:01] ========== [PASSED] drm_test_check_in_clone_mode ===========
[13:47:01] =============== drm_test_check_valid_clones  ===============
[13:47:01] [PASSED] not_in_clone_mode
[13:47:01] [PASSED] valid_clone
[13:47:01] [PASSED] invalid_clone
[13:47:01] =========== [PASSED] drm_test_check_valid_clones ===========
[13:47:01] ============= [PASSED] drm_validate_clone_mode =============
[13:47:01] ============= drm_validate_modeset (1 subtest) =============
[13:47:01] [PASSED] drm_test_check_connector_changed_modeset
[13:47:01] ============== [PASSED] drm_validate_modeset ===============
[13:47:01] ====== drm_test_bridge_get_current_state (2 subtests) ======
[13:47:01] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[13:47:01] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[13:47:01] ======== [PASSED] drm_test_bridge_get_current_state ========
[13:47:01] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[13:47:01] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[13:47:01] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[13:47:01] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[13:47:01] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[13:47:01] ============== drm_bridge_alloc (2 subtests) ===============
[13:47:01] [PASSED] drm_test_drm_bridge_alloc_basic
[13:47:01] [PASSED] drm_test_drm_bridge_alloc_get_put
[13:47:01] ================ [PASSED] drm_bridge_alloc =================
[13:47:01] ============= drm_cmdline_parser (40 subtests) =============
[13:47:01] [PASSED] drm_test_cmdline_force_d_only
[13:47:01] [PASSED] drm_test_cmdline_force_D_only_dvi
[13:47:01] [PASSED] drm_test_cmdline_force_D_only_hdmi
[13:47:01] [PASSED] drm_test_cmdline_force_D_only_not_digital
[13:47:01] [PASSED] drm_test_cmdline_force_e_only
[13:47:01] [PASSED] drm_test_cmdline_res
[13:47:01] [PASSED] drm_test_cmdline_res_vesa
[13:47:01] [PASSED] drm_test_cmdline_res_vesa_rblank
[13:47:01] [PASSED] drm_test_cmdline_res_rblank
[13:47:01] [PASSED] drm_test_cmdline_res_bpp
[13:47:01] [PASSED] drm_test_cmdline_res_refresh
[13:47:01] [PASSED] drm_test_cmdline_res_bpp_refresh
[13:47:01] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[13:47:01] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[13:47:01] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[13:47:01] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[13:47:01] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[13:47:01] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[13:47:01] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[13:47:01] [PASSED] drm_test_cmdline_res_margins_force_on
[13:47:01] [PASSED] drm_test_cmdline_res_vesa_margins
[13:47:01] [PASSED] drm_test_cmdline_name
[13:47:01] [PASSED] drm_test_cmdline_name_bpp
[13:47:01] [PASSED] drm_test_cmdline_name_option
[13:47:01] [PASSED] drm_test_cmdline_name_bpp_option
[13:47:01] [PASSED] drm_test_cmdline_rotate_0
[13:47:01] [PASSED] drm_test_cmdline_rotate_90
[13:47:01] [PASSED] drm_test_cmdline_rotate_180
[13:47:01] [PASSED] drm_test_cmdline_rotate_270
[13:47:01] [PASSED] drm_test_cmdline_hmirror
[13:47:01] [PASSED] drm_test_cmdline_vmirror
[13:47:01] [PASSED] drm_test_cmdline_margin_options
[13:47:01] [PASSED] drm_test_cmdline_multiple_options
[13:47:01] [PASSED] drm_test_cmdline_bpp_extra_and_option
[13:47:01] [PASSED] drm_test_cmdline_extra_and_option
[13:47:01] [PASSED] drm_test_cmdline_freestanding_options
[13:47:01] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[13:47:01] [PASSED] drm_test_cmdline_panel_orientation
[13:47:01] ================ drm_test_cmdline_invalid  =================
[13:47:01] [PASSED] margin_only
[13:47:01] [PASSED] interlace_only
[13:47:01] [PASSED] res_missing_x
[13:47:01] [PASSED] res_missing_y
[13:47:01] [PASSED] res_bad_y
[13:47:01] [PASSED] res_missing_y_bpp
[13:47:01] [PASSED] res_bad_bpp
[13:47:01] [PASSED] res_bad_refresh
[13:47:01] [PASSED] res_bpp_refresh_force_on_off
[13:47:01] [PASSED] res_invalid_mode
[13:47:01] [PASSED] res_bpp_wrong_place_mode
[13:47:01] [PASSED] name_bpp_refresh
[13:47:01] [PASSED] name_refresh
[13:47:01] [PASSED] name_refresh_wrong_mode
[13:47:01] [PASSED] name_refresh_invalid_mode
[13:47:01] [PASSED] rotate_multiple
[13:47:01] [PASSED] rotate_invalid_val
[13:47:01] [PASSED] rotate_truncated
[13:47:01] [PASSED] invalid_option
[13:47:01] [PASSED] invalid_tv_option
[13:47:01] [PASSED] truncated_tv_option
[13:47:01] ============ [PASSED] drm_test_cmdline_invalid =============
[13:47:01] =============== drm_test_cmdline_tv_options  ===============
[13:47:01] [PASSED] NTSC
[13:47:01] [PASSED] NTSC_443
[13:47:01] [PASSED] NTSC_J
[13:47:01] [PASSED] PAL
[13:47:01] [PASSED] PAL_M
[13:47:01] [PASSED] PAL_N
[13:47:01] [PASSED] SECAM
[13:47:01] [PASSED] MONO_525
[13:47:01] [PASSED] MONO_625
[13:47:01] =========== [PASSED] drm_test_cmdline_tv_options ===========
[13:47:01] =============== [PASSED] drm_cmdline_parser ================
[13:47:01] ========== drmm_connector_hdmi_init (20 subtests) ==========
[13:47:01] [PASSED] drm_test_connector_hdmi_init_valid
[13:47:01] [PASSED] drm_test_connector_hdmi_init_bpc_8
[13:47:01] [PASSED] drm_test_connector_hdmi_init_bpc_10
[13:47:01] [PASSED] drm_test_connector_hdmi_init_bpc_12
[13:47:01] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[13:47:01] [PASSED] drm_test_connector_hdmi_init_bpc_null
[13:47:01] [PASSED] drm_test_connector_hdmi_init_formats_empty
[13:47:01] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[13:47:01] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[13:47:01] [PASSED] supported_formats=0x9 yuv420_allowed=1
[13:47:01] [PASSED] supported_formats=0x9 yuv420_allowed=0
[13:47:01] [PASSED] supported_formats=0x3 yuv420_allowed=1
[13:47:01] [PASSED] supported_formats=0x3 yuv420_allowed=0
[13:47:01] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[13:47:01] [PASSED] drm_test_connector_hdmi_init_null_ddc
[13:47:01] [PASSED] drm_test_connector_hdmi_init_null_product
[13:47:01] [PASSED] drm_test_connector_hdmi_init_null_vendor
[13:47:01] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[13:47:01] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[13:47:01] [PASSED] drm_test_connector_hdmi_init_product_valid
[13:47:01] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[13:47:01] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[13:47:01] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[13:47:01] ========= drm_test_connector_hdmi_init_type_valid  =========
[13:47:01] [PASSED] HDMI-A
[13:47:01] [PASSED] HDMI-B
[13:47:01] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[13:47:01] ======== drm_test_connector_hdmi_init_type_invalid  ========
[13:47:01] [PASSED] Unknown
[13:47:01] [PASSED] VGA
[13:47:01] [PASSED] DVI-I
[13:47:01] [PASSED] DVI-D
[13:47:01] [PASSED] DVI-A
[13:47:01] [PASSED] Composite
[13:47:01] [PASSED] SVIDEO
[13:47:01] [PASSED] LVDS
[13:47:01] [PASSED] Component
[13:47:01] [PASSED] DIN
[13:47:01] [PASSED] DP
[13:47:01] [PASSED] TV
[13:47:01] [PASSED] eDP
[13:47:01] [PASSED] Virtual
[13:47:01] [PASSED] DSI
[13:47:01] [PASSED] DPI
[13:47:01] [PASSED] Writeback
[13:47:01] [PASSED] SPI
[13:47:01] [PASSED] USB
[13:47:01] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[13:47:01] ============ [PASSED] drmm_connector_hdmi_init =============
[13:47:01] ============= drmm_connector_init (3 subtests) =============
[13:47:01] [PASSED] drm_test_drmm_connector_init
[13:47:01] [PASSED] drm_test_drmm_connector_init_null_ddc
[13:47:01] ========= drm_test_drmm_connector_init_type_valid  =========
[13:47:01] [PASSED] Unknown
[13:47:01] [PASSED] VGA
[13:47:01] [PASSED] DVI-I
[13:47:01] [PASSED] DVI-D
[13:47:01] [PASSED] DVI-A
[13:47:01] [PASSED] Composite
[13:47:01] [PASSED] SVIDEO
[13:47:01] [PASSED] LVDS
[13:47:01] [PASSED] Component
[13:47:01] [PASSED] DIN
[13:47:01] [PASSED] DP
[13:47:01] [PASSED] HDMI-A
[13:47:01] [PASSED] HDMI-B
[13:47:01] [PASSED] TV
[13:47:01] [PASSED] eDP
[13:47:01] [PASSED] Virtual
[13:47:01] [PASSED] DSI
[13:47:01] [PASSED] DPI
[13:47:01] [PASSED] Writeback
[13:47:01] [PASSED] SPI
[13:47:01] [PASSED] USB
[13:47:01] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[13:47:01] =============== [PASSED] drmm_connector_init ===============
[13:47:01] ========= drm_connector_dynamic_init (6 subtests) ==========
[13:47:01] [PASSED] drm_test_drm_connector_dynamic_init
[13:47:01] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[13:47:01] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[13:47:01] [PASSED] drm_test_drm_connector_dynamic_init_properties
[13:47:01] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[13:47:01] [PASSED] Unknown
[13:47:01] [PASSED] VGA
[13:47:01] [PASSED] DVI-I
[13:47:01] [PASSED] DVI-D
[13:47:01] [PASSED] DVI-A
[13:47:01] [PASSED] Composite
[13:47:01] [PASSED] SVIDEO
[13:47:01] [PASSED] LVDS
[13:47:01] [PASSED] Component
[13:47:01] [PASSED] DIN
[13:47:01] [PASSED] DP
[13:47:01] [PASSED] HDMI-A
[13:47:01] [PASSED] HDMI-B
[13:47:01] [PASSED] TV
[13:47:01] [PASSED] eDP
[13:47:01] [PASSED] Virtual
[13:47:01] [PASSED] DSI
[13:47:01] [PASSED] DPI
[13:47:01] [PASSED] Writeback
[13:47:01] [PASSED] SPI
[13:47:01] [PASSED] USB
[13:47:01] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[13:47:01] ======== drm_test_drm_connector_dynamic_init_name  =========
[13:47:01] [PASSED] Unknown
[13:47:01] [PASSED] VGA
[13:47:01] [PASSED] DVI-I
[13:47:01] [PASSED] DVI-D
[13:47:01] [PASSED] DVI-A
[13:47:01] [PASSED] Composite
[13:47:01] [PASSED] SVIDEO
[13:47:01] [PASSED] LVDS
[13:47:01] [PASSED] Component
[13:47:01] [PASSED] DIN
[13:47:01] [PASSED] DP
[13:47:01] [PASSED] HDMI-A
[13:47:01] [PASSED] HDMI-B
[13:47:01] [PASSED] TV
[13:47:01] [PASSED] eDP
[13:47:01] [PASSED] Virtual
[13:47:01] [PASSED] DSI
[13:47:01] [PASSED] DPI
[13:47:01] [PASSED] Writeback
[13:47:01] [PASSED] SPI
[13:47:01] [PASSED] USB
[13:47:01] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[13:47:01] =========== [PASSED] drm_connector_dynamic_init ============
[13:47:01] ==== drm_connector_dynamic_register_early (4 subtests) =====
[13:47:01] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[13:47:01] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[13:47:01] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[13:47:01] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[13:47:01] ====== [PASSED] drm_connector_dynamic_register_early =======
[13:47:01] ======= drm_connector_dynamic_register (7 subtests) ========
[13:47:01] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[13:47:01] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[13:47:01] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[13:47:01] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[13:47:01] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[13:47:01] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[13:47:01] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[13:47:01] ========= [PASSED] drm_connector_dynamic_register ==========
[13:47:01] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[13:47:01] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[13:47:01] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[13:47:01] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[13:47:01] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[13:47:01] ========== drm_test_get_tv_mode_from_name_valid  ===========
[13:47:01] [PASSED] NTSC
[13:47:01] [PASSED] NTSC-443
[13:47:01] [PASSED] NTSC-J
[13:47:01] [PASSED] PAL
[13:47:01] [PASSED] PAL-M
[13:47:01] [PASSED] PAL-N
[13:47:01] [PASSED] SECAM
[13:47:01] [PASSED] Mono
[13:47:01] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[13:47:01] [PASSED] drm_test_get_tv_mode_from_name_truncated
[13:47:01] ============ [PASSED] drm_get_tv_mode_from_name ============
[13:47:01] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[13:47:01] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[13:47:01] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[13:47:01] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[13:47:01] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[13:47:01] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[13:47:01] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[13:47:01] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[13:47:01] [PASSED] VIC 96
[13:47:01] [PASSED] VIC 97
[13:47:01] [PASSED] VIC 101
[13:47:01] [PASSED] VIC 102
[13:47:01] [PASSED] VIC 106
[13:47:01] [PASSED] VIC 107
[13:47:01] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[13:47:01] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[13:47:01] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[13:47:01] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[13:47:01] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[13:47:01] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[13:47:01] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[13:47:01] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[13:47:01] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[13:47:01] [PASSED] Automatic
[13:47:01] [PASSED] Full
[13:47:01] [PASSED] Limited 16:235
[13:47:01] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[13:47:01] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[13:47:01] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[13:47:01] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[13:47:01] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[13:47:01] [PASSED] RGB
[13:47:01] [PASSED] YUV 4:2:0
[13:47:01] [PASSED] YUV 4:2:2
[13:47:01] [PASSED] YUV 4:4:4
[13:47:01] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[13:47:01] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[13:47:01] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[13:47:01] ============= drm_damage_helper (21 subtests) ==============
[13:47:01] [PASSED] drm_test_damage_iter_no_damage
[13:47:01] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[13:47:01] [PASSED] drm_test_damage_iter_no_damage_src_moved
[13:47:01] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[13:47:01] [PASSED] drm_test_damage_iter_no_damage_not_visible
[13:47:01] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[13:47:01] [PASSED] drm_test_damage_iter_no_damage_no_fb
[13:47:01] [PASSED] drm_test_damage_iter_simple_damage
[13:47:01] [PASSED] drm_test_damage_iter_single_damage
[13:47:01] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[13:47:01] [PASSED] drm_test_damage_iter_single_damage_outside_src
[13:47:01] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[13:47:01] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[13:47:01] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[13:47:01] [PASSED] drm_test_damage_iter_single_damage_src_moved
[13:47:01] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[13:47:01] [PASSED] drm_test_damage_iter_damage
[13:47:01] [PASSED] drm_test_damage_iter_damage_one_intersect
[13:47:01] [PASSED] drm_test_damage_iter_damage_one_outside
[13:47:01] [PASSED] drm_test_damage_iter_damage_src_moved
[13:47:01] [PASSED] drm_test_damage_iter_damage_not_visible
[13:47:01] ================ [PASSED] drm_damage_helper ================
[13:47:01] ============== drm_dp_mst_helper (3 subtests) ==============
[13:47:01] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[13:47:01] [PASSED] Clock 154000 BPP 30 DSC disabled
[13:47:01] [PASSED] Clock 234000 BPP 30 DSC disabled
[13:47:01] [PASSED] Clock 297000 BPP 24 DSC disabled
[13:47:01] [PASSED] Clock 332880 BPP 24 DSC enabled
[13:47:01] [PASSED] Clock 324540 BPP 24 DSC enabled
[13:47:01] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[13:47:01] ============== drm_test_dp_mst_calc_pbn_div  ===============
[13:47:01] [PASSED] Link rate 2000000 lane count 4
[13:47:01] [PASSED] Link rate 2000000 lane count 2
[13:47:01] [PASSED] Link rate 2000000 lane count 1
[13:47:01] [PASSED] Link rate 1350000 lane count 4
[13:47:01] [PASSED] Link rate 1350000 lane count 2
[13:47:01] [PASSED] Link rate 1350000 lane count 1
[13:47:01] [PASSED] Link rate 1000000 lane count 4
[13:47:01] [PASSED] Link rate 1000000 lane count 2
[13:47:01] [PASSED] Link rate 1000000 lane count 1
[13:47:01] [PASSED] Link rate 810000 lane count 4
[13:47:01] [PASSED] Link rate 810000 lane count 2
[13:47:01] [PASSED] Link rate 810000 lane count 1
[13:47:01] [PASSED] Link rate 540000 lane count 4
[13:47:01] [PASSED] Link rate 540000 lane count 2
[13:47:01] [PASSED] Link rate 540000 lane count 1
[13:47:01] [PASSED] Link rate 270000 lane count 4
[13:47:01] [PASSED] Link rate 270000 lane count 2
[13:47:01] [PASSED] Link rate 270000 lane count 1
[13:47:01] [PASSED] Link rate 162000 lane count 4
[13:47:01] [PASSED] Link rate 162000 lane count 2
[13:47:01] [PASSED] Link rate 162000 lane count 1
[13:47:01] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[13:47:01] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[13:47:01] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[13:47:01] [PASSED] DP_POWER_UP_PHY with port number
[13:47:01] [PASSED] DP_POWER_DOWN_PHY with port number
[13:47:01] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[13:47:01] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[13:47:01] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[13:47:01] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[13:47:01] [PASSED] DP_QUERY_PAYLOAD with port number
[13:47:01] [PASSED] DP_QUERY_PAYLOAD with VCPI
[13:47:01] [PASSED] DP_REMOTE_DPCD_READ with port number
[13:47:01] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[13:47:01] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[13:47:01] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[13:47:01] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[13:47:01] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[13:47:01] [PASSED] DP_REMOTE_I2C_READ with port number
[13:47:01] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[13:47:01] [PASSED] DP_REMOTE_I2C_READ with transactions array
[13:47:01] [PASSED] DP_REMOTE_I2C_WRITE with port number
[13:47:01] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[13:47:01] [PASSED] DP_REMOTE_I2C_WRITE with data array
[13:47:01] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[13:47:01] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[13:47:01] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[13:47:01] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[13:47:01] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[13:47:01] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[13:47:01] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[13:47:01] ================ [PASSED] drm_dp_mst_helper ================
[13:47:01] ================== drm_exec (7 subtests) ===================
[13:47:01] [PASSED] sanitycheck
[13:47:01] [PASSED] test_lock
[13:47:01] [PASSED] test_lock_unlock
[13:47:01] [PASSED] test_duplicates
[13:47:01] [PASSED] test_prepare
[13:47:01] [PASSED] test_prepare_array
[13:47:01] [PASSED] test_multiple_loops
[13:47:01] ==================== [PASSED] drm_exec =====================
[13:47:01] =========== drm_format_helper_test (17 subtests) ===========
[13:47:01] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[13:47:01] [PASSED] single_pixel_source_buffer
[13:47:01] [PASSED] single_pixel_clip_rectangle
[13:47:01] [PASSED] well_known_colors
[13:47:01] [PASSED] destination_pitch
[13:47:01] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[13:47:01] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[13:47:01] [PASSED] single_pixel_source_buffer
[13:47:01] [PASSED] single_pixel_clip_rectangle
[13:47:01] [PASSED] well_known_colors
[13:47:01] [PASSED] destination_pitch
[13:47:01] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[13:47:01] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[13:47:01] [PASSED] single_pixel_source_buffer
[13:47:01] [PASSED] single_pixel_clip_rectangle
[13:47:01] [PASSED] well_known_colors
[13:47:01] [PASSED] destination_pitch
[13:47:01] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[13:47:01] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[13:47:01] [PASSED] single_pixel_source_buffer
[13:47:01] [PASSED] single_pixel_clip_rectangle
[13:47:01] [PASSED] well_known_colors
[13:47:01] [PASSED] destination_pitch
[13:47:01] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[13:47:01] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[13:47:01] [PASSED] single_pixel_source_buffer
[13:47:01] [PASSED] single_pixel_clip_rectangle
[13:47:01] [PASSED] well_known_colors
[13:47:01] [PASSED] destination_pitch
[13:47:01] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[13:47:01] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[13:47:01] [PASSED] single_pixel_source_buffer
[13:47:01] [PASSED] single_pixel_clip_rectangle
[13:47:01] [PASSED] well_known_colors
[13:47:01] [PASSED] destination_pitch
[13:47:01] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[13:47:01] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[13:47:01] [PASSED] single_pixel_source_buffer
[13:47:01] [PASSED] single_pixel_clip_rectangle
[13:47:01] [PASSED] well_known_colors
[13:47:01] [PASSED] destination_pitch
[13:47:01] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[13:47:01] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[13:47:01] [PASSED] single_pixel_source_buffer
[13:47:01] [PASSED] single_pixel_clip_rectangle
[13:47:01] [PASSED] well_known_colors
[13:47:01] [PASSED] destination_pitch
[13:47:01] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[13:47:01] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[13:47:01] [PASSED] single_pixel_source_buffer
[13:47:01] [PASSED] single_pixel_clip_rectangle
[13:47:01] [PASSED] well_known_colors
[13:47:01] [PASSED] destination_pitch
[13:47:01] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[13:47:01] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[13:47:01] [PASSED] single_pixel_source_buffer
[13:47:01] [PASSED] single_pixel_clip_rectangle
[13:47:01] [PASSED] well_known_colors
[13:47:01] [PASSED] destination_pitch
[13:47:01] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[13:47:01] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[13:47:01] [PASSED] single_pixel_source_buffer
[13:47:01] [PASSED] single_pixel_clip_rectangle
[13:47:01] [PASSED] well_known_colors
[13:47:01] [PASSED] destination_pitch
[13:47:01] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[13:47:01] ============== drm_test_fb_xrgb8888_to_mono  ===============
[13:47:01] [PASSED] single_pixel_source_buffer
[13:47:01] [PASSED] single_pixel_clip_rectangle
[13:47:01] [PASSED] well_known_colors
[13:47:01] [PASSED] destination_pitch
[13:47:01] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[13:47:01] ==================== drm_test_fb_swab  =====================
[13:47:01] [PASSED] single_pixel_source_buffer
[13:47:01] [PASSED] single_pixel_clip_rectangle
[13:47:01] [PASSED] well_known_colors
[13:47:01] [PASSED] destination_pitch
[13:47:01] ================ [PASSED] drm_test_fb_swab =================
[13:47:01] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[13:47:01] [PASSED] single_pixel_source_buffer
[13:47:01] [PASSED] single_pixel_clip_rectangle
[13:47:01] [PASSED] well_known_colors
[13:47:01] [PASSED] destination_pitch
[13:47:01] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[13:47:01] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[13:47:01] [PASSED] single_pixel_source_buffer
[13:47:01] [PASSED] single_pixel_clip_rectangle
[13:47:01] [PASSED] well_known_colors
[13:47:01] [PASSED] destination_pitch
[13:47:01] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[13:47:01] ================= drm_test_fb_clip_offset  =================
[13:47:01] [PASSED] pass through
[13:47:01] [PASSED] horizontal offset
[13:47:01] [PASSED] vertical offset
[13:47:01] [PASSED] horizontal and vertical offset
[13:47:01] [PASSED] horizontal offset (custom pitch)
[13:47:01] [PASSED] vertical offset (custom pitch)
[13:47:01] [PASSED] horizontal and vertical offset (custom pitch)
[13:47:01] ============= [PASSED] drm_test_fb_clip_offset =============
[13:47:01] =================== drm_test_fb_memcpy  ====================
[13:47:01] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[13:47:01] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[13:47:01] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[13:47:01] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[13:47:01] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[13:47:01] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[13:47:01] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[13:47:01] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[13:47:01] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[13:47:01] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[13:47:01] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[13:47:01] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[13:47:01] =============== [PASSED] drm_test_fb_memcpy ================
[13:47:01] ============= [PASSED] drm_format_helper_test ==============
[13:47:01] ================= drm_format (18 subtests) =================
[13:47:01] [PASSED] drm_test_format_block_width_invalid
[13:47:01] [PASSED] drm_test_format_block_width_one_plane
[13:47:01] [PASSED] drm_test_format_block_width_two_plane
[13:47:01] [PASSED] drm_test_format_block_width_three_plane
[13:47:01] [PASSED] drm_test_format_block_width_tiled
[13:47:01] [PASSED] drm_test_format_block_height_invalid
[13:47:01] [PASSED] drm_test_format_block_height_one_plane
[13:47:01] [PASSED] drm_test_format_block_height_two_plane
[13:47:01] [PASSED] drm_test_format_block_height_three_plane
[13:47:01] [PASSED] drm_test_format_block_height_tiled
[13:47:01] [PASSED] drm_test_format_min_pitch_invalid
[13:47:01] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[13:47:01] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[13:47:01] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[13:47:01] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[13:47:01] [PASSED] drm_test_format_min_pitch_two_plane
[13:47:01] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[13:47:01] [PASSED] drm_test_format_min_pitch_tiled
[13:47:01] =================== [PASSED] drm_format ====================
[13:47:01] ============== drm_framebuffer (10 subtests) ===============
[13:47:01] ========== drm_test_framebuffer_check_src_coords  ==========
[13:47:01] [PASSED] Success: source fits into fb
[13:47:01] [PASSED] Fail: overflowing fb with x-axis coordinate
[13:47:01] [PASSED] Fail: overflowing fb with y-axis coordinate
[13:47:01] [PASSED] Fail: overflowing fb with source width
[13:47:01] [PASSED] Fail: overflowing fb with source height
[13:47:01] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[13:47:01] [PASSED] drm_test_framebuffer_cleanup
[13:47:01] =============== drm_test_framebuffer_create  ===============
[13:47:01] [PASSED] ABGR8888 normal sizes
[13:47:01] [PASSED] ABGR8888 max sizes
[13:47:01] [PASSED] ABGR8888 pitch greater than min required
[13:47:01] [PASSED] ABGR8888 pitch less than min required
[13:47:01] [PASSED] ABGR8888 Invalid width
[13:47:01] [PASSED] ABGR8888 Invalid buffer handle
[13:47:01] [PASSED] No pixel format
[13:47:01] [PASSED] ABGR8888 Width 0
[13:47:01] [PASSED] ABGR8888 Height 0
[13:47:01] [PASSED] ABGR8888 Out of bound height * pitch combination
[13:47:01] [PASSED] ABGR8888 Large buffer offset
[13:47:01] [PASSED] ABGR8888 Buffer offset for inexistent plane
[13:47:01] [PASSED] ABGR8888 Invalid flag
[13:47:01] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[13:47:01] [PASSED] ABGR8888 Valid buffer modifier
[13:47:01] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[13:47:01] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[13:47:01] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[13:47:01] [PASSED] NV12 Normal sizes
[13:47:01] [PASSED] NV12 Max sizes
[13:47:01] [PASSED] NV12 Invalid pitch
[13:47:01] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[13:47:01] [PASSED] NV12 different  modifier per-plane
[13:47:01] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[13:47:01] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[13:47:01] [PASSED] NV12 Modifier for inexistent plane
[13:47:01] [PASSED] NV12 Handle for inexistent plane
[13:47:01] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[13:47:01] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[13:47:01] [PASSED] YVU420 Normal sizes
[13:47:01] [PASSED] YVU420 Max sizes
[13:47:01] [PASSED] YVU420 Invalid pitch
[13:47:01] [PASSED] YVU420 Different pitches
[13:47:01] [PASSED] YVU420 Different buffer offsets/pitches
[13:47:01] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[13:47:01] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[13:47:01] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[13:47:01] [PASSED] YVU420 Valid modifier
[13:47:01] [PASSED] YVU420 Different modifiers per plane
[13:47:01] [PASSED] YVU420 Modifier for inexistent plane
[13:47:01] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[13:47:01] [PASSED] X0L2 Normal sizes
[13:47:01] [PASSED] X0L2 Max sizes
[13:47:01] [PASSED] X0L2 Invalid pitch
[13:47:01] [PASSED] X0L2 Pitch greater than minimum required
[13:47:01] [PASSED] X0L2 Handle for inexistent plane
[13:47:01] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[13:47:01] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[13:47:01] [PASSED] X0L2 Valid modifier
[13:47:01] [PASSED] X0L2 Modifier for inexistent plane
[13:47:01] =========== [PASSED] drm_test_framebuffer_create ===========
[13:47:01] [PASSED] drm_test_framebuffer_free
[13:47:01] [PASSED] drm_test_framebuffer_init
[13:47:01] [PASSED] drm_test_framebuffer_init_bad_format
[13:47:01] [PASSED] drm_test_framebuffer_init_dev_mismatch
[13:47:01] [PASSED] drm_test_framebuffer_lookup
[13:47:01] [PASSED] drm_test_framebuffer_lookup_inexistent
[13:47:01] [PASSED] drm_test_framebuffer_modifiers_not_supported
[13:47:01] ================= [PASSED] drm_framebuffer =================
[13:47:01] ================ drm_gem_shmem (8 subtests) ================
[13:47:01] [PASSED] drm_gem_shmem_test_obj_create
[13:47:01] [PASSED] drm_gem_shmem_test_obj_create_private
[13:47:01] [PASSED] drm_gem_shmem_test_pin_pages
[13:47:01] [PASSED] drm_gem_shmem_test_vmap
[13:47:01] [PASSED] drm_gem_shmem_test_get_sg_table
[13:47:01] [PASSED] drm_gem_shmem_test_get_pages_sgt
[13:47:01] [PASSED] drm_gem_shmem_test_madvise
[13:47:01] [PASSED] drm_gem_shmem_test_purge
[13:47:01] ================== [PASSED] drm_gem_shmem ==================
[13:47:01] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[13:47:01] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[13:47:01] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[13:47:01] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[13:47:01] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[13:47:01] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[13:47:01] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[13:47:01] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[13:47:01] [PASSED] Automatic
[13:47:01] [PASSED] Full
[13:47:01] [PASSED] Limited 16:235
[13:47:01] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[13:47:01] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[13:47:01] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[13:47:01] [PASSED] drm_test_check_disable_connector
[13:47:01] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[13:47:01] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[13:47:01] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[13:47:01] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[13:47:01] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[13:47:01] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[13:47:01] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[13:47:01] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[13:47:01] [PASSED] drm_test_check_output_bpc_dvi
[13:47:01] [PASSED] drm_test_check_output_bpc_format_vic_1
[13:47:01] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[13:47:01] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[13:47:01] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[13:47:01] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[13:47:01] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[13:47:01] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[13:47:01] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[13:47:01] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[13:47:01] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[13:47:01] [PASSED] drm_test_check_broadcast_rgb_value
[13:47:01] [PASSED] drm_test_check_bpc_8_value
[13:47:01] [PASSED] drm_test_check_bpc_10_value
[13:47:01] [PASSED] drm_test_check_bpc_12_value
[13:47:01] [PASSED] drm_test_check_format_value
[13:47:01] [PASSED] drm_test_check_tmds_char_value
[13:47:01] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[13:47:01] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[13:47:01] [PASSED] drm_test_check_mode_valid
[13:47:01] [PASSED] drm_test_check_mode_valid_reject
[13:47:01] [PASSED] drm_test_check_mode_valid_reject_rate
[13:47:01] [PASSED] drm_test_check_mode_valid_reject_max_clock
[13:47:01] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[13:47:01] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[13:47:01] [PASSED] drm_test_check_infoframes
[13:47:01] [PASSED] drm_test_check_reject_avi_infoframe
[13:47:01] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[13:47:01] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[13:47:01] [PASSED] drm_test_check_reject_audio_infoframe
[13:47:01] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[13:47:01] ================= drm_managed (2 subtests) =================
[13:47:01] [PASSED] drm_test_managed_release_action
[13:47:01] [PASSED] drm_test_managed_run_action
[13:47:01] =================== [PASSED] drm_managed ===================
[13:47:01] =================== drm_mm (6 subtests) ====================
[13:47:01] [PASSED] drm_test_mm_init
[13:47:01] [PASSED] drm_test_mm_debug
[13:47:01] [PASSED] drm_test_mm_align32
[13:47:01] [PASSED] drm_test_mm_align64
[13:47:01] [PASSED] drm_test_mm_lowest
[13:47:01] [PASSED] drm_test_mm_highest
[13:47:01] ===================== [PASSED] drm_mm ======================
[13:47:01] ============= drm_modes_analog_tv (5 subtests) =============
[13:47:01] [PASSED] drm_test_modes_analog_tv_mono_576i
[13:47:01] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[13:47:01] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[13:47:01] [PASSED] drm_test_modes_analog_tv_pal_576i
[13:47:01] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[13:47:01] =============== [PASSED] drm_modes_analog_tv ===============
[13:47:01] ============== drm_plane_helper (2 subtests) ===============
[13:47:01] =============== drm_test_check_plane_state  ================
[13:47:01] [PASSED] clipping_simple
[13:47:01] [PASSED] clipping_rotate_reflect
[13:47:01] [PASSED] positioning_simple
[13:47:01] [PASSED] upscaling
[13:47:01] [PASSED] downscaling
[13:47:01] [PASSED] rounding1
[13:47:01] [PASSED] rounding2
[13:47:01] [PASSED] rounding3
[13:47:01] [PASSED] rounding4
[13:47:01] =========== [PASSED] drm_test_check_plane_state ============
[13:47:01] =========== drm_test_check_invalid_plane_state  ============
[13:47:01] [PASSED] positioning_invalid
[13:47:01] [PASSED] upscaling_invalid
[13:47:01] [PASSED] downscaling_invalid
[13:47:01] ======= [PASSED] drm_test_check_invalid_plane_state ========
[13:47:01] ================ [PASSED] drm_plane_helper =================
[13:47:01] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[13:47:01] ====== drm_test_connector_helper_tv_get_modes_check  =======
[13:47:01] [PASSED] None
[13:47:01] [PASSED] PAL
[13:47:01] [PASSED] NTSC
[13:47:01] [PASSED] Both, NTSC Default
[13:47:01] [PASSED] Both, PAL Default
[13:47:01] [PASSED] Both, NTSC Default, with PAL on command-line
[13:47:01] [PASSED] Both, PAL Default, with NTSC on command-line
[13:47:01] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[13:47:01] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[13:47:01] ================== drm_rect (9 subtests) ===================
[13:47:01] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[13:47:01] [PASSED] drm_test_rect_clip_scaled_not_clipped
[13:47:01] [PASSED] drm_test_rect_clip_scaled_clipped
[13:47:01] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[13:47:01] ================= drm_test_rect_intersect  =================
[13:47:01] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[13:47:01] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[13:47:01] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[13:47:01] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[13:47:01] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[13:47:01] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[13:47:01] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[13:47:01] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[13:47:01] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[13:47:01] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[13:47:01] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[13:47:01] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[13:47:01] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[13:47:01] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[13:47:01] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[13:47:01] ============= [PASSED] drm_test_rect_intersect =============
[13:47:01] ================ drm_test_rect_calc_hscale  ================
[13:47:01] [PASSED] normal use
[13:47:01] [PASSED] out of max range
[13:47:01] [PASSED] out of min range
[13:47:01] [PASSED] zero dst
[13:47:01] [PASSED] negative src
[13:47:01] [PASSED] negative dst
[13:47:01] ============ [PASSED] drm_test_rect_calc_hscale ============
[13:47:01] ================ drm_test_rect_calc_vscale  ================
[13:47:01] [PASSED] normal use
[13:47:01] [PASSED] out of max range
[13:47:01] [PASSED] out of min range
[13:47:01] [PASSED] zero dst
[13:47:01] [PASSED] negative src
[13:47:01] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[13:47:01] ============ [PASSED] drm_test_rect_calc_vscale ============
[13:47:01] ================== drm_test_rect_rotate  ===================
[13:47:01] [PASSED] reflect-x
[13:47:01] [PASSED] reflect-y
[13:47:01] [PASSED] rotate-0
[13:47:01] [PASSED] rotate-90
[13:47:01] [PASSED] rotate-180
[13:47:01] [PASSED] rotate-270
[13:47:01] ============== [PASSED] drm_test_rect_rotate ===============
[13:47:01] ================ drm_test_rect_rotate_inv  =================
[13:47:01] [PASSED] reflect-x
[13:47:01] [PASSED] reflect-y
[13:47:01] [PASSED] rotate-0
[13:47:01] [PASSED] rotate-90
[13:47:01] [PASSED] rotate-180
[13:47:01] [PASSED] rotate-270
[13:47:01] ============ [PASSED] drm_test_rect_rotate_inv =============
[13:47:01] ==================== [PASSED] drm_rect =====================
[13:47:01] ============ drm_sysfb_modeset_test (1 subtest) ============
[13:47:01] ============ drm_test_sysfb_build_fourcc_list  =============
[13:47:01] [PASSED] no native formats
[13:47:01] [PASSED] XRGB8888 as native format
[13:47:01] [PASSED] remove duplicates
[13:47:01] [PASSED] convert alpha formats
[13:47:01] [PASSED] random formats
[13:47:01] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[13:47:01] ============= [PASSED] drm_sysfb_modeset_test ==============
[13:47:01] ================== drm_fixp (2 subtests) ===================
[13:47:01] [PASSED] drm_test_int2fixp
[13:47:01] [PASSED] drm_test_sm2fixp
[13:47:01] ==================== [PASSED] drm_fixp =====================
[13:47:01] ============================================================
[13:47:01] Testing complete. Ran 621 tests: passed: 621
[13:47:01] Elapsed time: 26.012s total, 1.721s configuring, 24.125s building, 0.132s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[13:47:01] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:47:03] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[13:47:12] Starting KUnit Kernel (1/1)...
[13:47:12] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:47:12] ================= ttm_device (5 subtests) ==================
[13:47:12] [PASSED] ttm_device_init_basic
[13:47:12] [PASSED] ttm_device_init_multiple
[13:47:12] [PASSED] ttm_device_fini_basic
[13:47:12] [PASSED] ttm_device_init_no_vma_man
[13:47:12] ================== ttm_device_init_pools  ==================
[13:47:12] [PASSED] No DMA allocations, no DMA32 required
[13:47:12] [PASSED] DMA allocations, DMA32 required
[13:47:12] [PASSED] No DMA allocations, DMA32 required
[13:47:12] [PASSED] DMA allocations, no DMA32 required
[13:47:12] ============== [PASSED] ttm_device_init_pools ==============
[13:47:12] =================== [PASSED] ttm_device ====================
[13:47:12] ================== ttm_pool (8 subtests) ===================
[13:47:12] ================== ttm_pool_alloc_basic  ===================
[13:47:12] [PASSED] One page
[13:47:12] [PASSED] More than one page
[13:47:12] [PASSED] Above the allocation limit
[13:47:12] [PASSED] One page, with coherent DMA mappings enabled
[13:47:12] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[13:47:12] ============== [PASSED] ttm_pool_alloc_basic ===============
[13:47:12] ============== ttm_pool_alloc_basic_dma_addr  ==============
[13:47:12] [PASSED] One page
[13:47:12] [PASSED] More than one page
[13:47:12] [PASSED] Above the allocation limit
[13:47:12] [PASSED] One page, with coherent DMA mappings enabled
[13:47:12] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[13:47:12] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[13:47:12] [PASSED] ttm_pool_alloc_order_caching_match
[13:47:12] [PASSED] ttm_pool_alloc_caching_mismatch
[13:47:12] [PASSED] ttm_pool_alloc_order_mismatch
[13:47:12] [PASSED] ttm_pool_free_dma_alloc
[13:47:12] [PASSED] ttm_pool_free_no_dma_alloc
[13:47:12] [PASSED] ttm_pool_fini_basic
[13:47:12] ==================== [PASSED] ttm_pool =====================
[13:47:12] ================ ttm_resource (8 subtests) =================
[13:47:12] ================= ttm_resource_init_basic  =================
[13:47:12] [PASSED] Init resource in TTM_PL_SYSTEM
[13:47:12] [PASSED] Init resource in TTM_PL_VRAM
[13:47:12] [PASSED] Init resource in a private placement
[13:47:12] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[13:47:12] ============= [PASSED] ttm_resource_init_basic =============
[13:47:12] [PASSED] ttm_resource_init_pinned
[13:47:12] [PASSED] ttm_resource_fini_basic
[13:47:12] [PASSED] ttm_resource_manager_init_basic
[13:47:12] [PASSED] ttm_resource_manager_usage_basic
[13:47:12] [PASSED] ttm_resource_manager_set_used_basic
[13:47:12] [PASSED] ttm_sys_man_alloc_basic
[13:47:12] [PASSED] ttm_sys_man_free_basic
[13:47:12] ================== [PASSED] ttm_resource ===================
[13:47:12] =================== ttm_tt (15 subtests) ===================
[13:47:12] ==================== ttm_tt_init_basic  ====================
[13:47:12] [PASSED] Page-aligned size
[13:47:12] [PASSED] Extra pages requested
[13:47:12] ================ [PASSED] ttm_tt_init_basic ================
[13:47:12] [PASSED] ttm_tt_init_misaligned
[13:47:12] [PASSED] ttm_tt_fini_basic
[13:47:12] [PASSED] ttm_tt_fini_sg
[13:47:12] [PASSED] ttm_tt_fini_shmem
[13:47:12] [PASSED] ttm_tt_create_basic
[13:47:12] [PASSED] ttm_tt_create_invalid_bo_type
[13:47:12] [PASSED] ttm_tt_create_ttm_exists
[13:47:12] [PASSED] ttm_tt_create_failed
[13:47:12] [PASSED] ttm_tt_destroy_basic
[13:47:12] [PASSED] ttm_tt_populate_null_ttm
[13:47:12] [PASSED] ttm_tt_populate_populated_ttm
[13:47:12] [PASSED] ttm_tt_unpopulate_basic
[13:47:12] [PASSED] ttm_tt_unpopulate_empty_ttm
[13:47:12] [PASSED] ttm_tt_swapin_basic
[13:47:12] ===================== [PASSED] ttm_tt ======================
[13:47:12] =================== ttm_bo (14 subtests) ===================
[13:47:12] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[13:47:12] [PASSED] Cannot be interrupted and sleeps
[13:47:12] [PASSED] Cannot be interrupted, locks straight away
[13:47:12] [PASSED] Can be interrupted, sleeps
[13:47:12] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[13:47:12] [PASSED] ttm_bo_reserve_locked_no_sleep
[13:47:12] [PASSED] ttm_bo_reserve_no_wait_ticket
[13:47:12] [PASSED] ttm_bo_reserve_double_resv
[13:47:12] [PASSED] ttm_bo_reserve_interrupted
[13:47:12] [PASSED] ttm_bo_reserve_deadlock
[13:47:12] [PASSED] ttm_bo_unreserve_basic
[13:47:12] [PASSED] ttm_bo_unreserve_pinned
[13:47:12] [PASSED] ttm_bo_unreserve_bulk
[13:47:12] [PASSED] ttm_bo_fini_basic
[13:47:12] [PASSED] ttm_bo_fini_shared_resv
[13:47:12] [PASSED] ttm_bo_pin_basic
[13:47:12] [PASSED] ttm_bo_pin_unpin_resource
[13:47:12] [PASSED] ttm_bo_multiple_pin_one_unpin
[13:47:12] ===================== [PASSED] ttm_bo ======================
[13:47:12] ============== ttm_bo_validate (21 subtests) ===============
[13:47:12] ============== ttm_bo_init_reserved_sys_man  ===============
[13:47:12] [PASSED] Buffer object for userspace
[13:47:12] [PASSED] Kernel buffer object
[13:47:12] [PASSED] Shared buffer object
[13:47:12] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[13:47:12] ============== ttm_bo_init_reserved_mock_man  ==============
[13:47:12] [PASSED] Buffer object for userspace
[13:47:12] [PASSED] Kernel buffer object
[13:47:12] [PASSED] Shared buffer object
[13:47:12] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[13:47:12] [PASSED] ttm_bo_init_reserved_resv
[13:47:12] ================== ttm_bo_validate_basic  ==================
[13:47:12] [PASSED] Buffer object for userspace
[13:47:12] [PASSED] Kernel buffer object
[13:47:12] [PASSED] Shared buffer object
[13:47:12] ============== [PASSED] ttm_bo_validate_basic ==============
[13:47:12] [PASSED] ttm_bo_validate_invalid_placement
[13:47:12] ============= ttm_bo_validate_same_placement  ==============
[13:47:12] [PASSED] System manager
[13:47:12] [PASSED] VRAM manager
[13:47:12] ========= [PASSED] ttm_bo_validate_same_placement ==========
[13:47:12] [PASSED] ttm_bo_validate_failed_alloc
[13:47:12] [PASSED] ttm_bo_validate_pinned
[13:47:12] [PASSED] ttm_bo_validate_busy_placement
[13:47:12] ================ ttm_bo_validate_multihop  =================
[13:47:12] [PASSED] Buffer object for userspace
[13:47:12] [PASSED] Kernel buffer object
[13:47:12] [PASSED] Shared buffer object
[13:47:12] ============ [PASSED] ttm_bo_validate_multihop =============
[13:47:12] ========== ttm_bo_validate_no_placement_signaled  ==========
[13:47:12] [PASSED] Buffer object in system domain, no page vector
[13:47:12] [PASSED] Buffer object in system domain with an existing page vector
[13:47:12] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[13:47:12] ======== ttm_bo_validate_no_placement_not_signaled  ========
[13:47:12] [PASSED] Buffer object for userspace
[13:47:12] [PASSED] Kernel buffer object
[13:47:12] [PASSED] Shared buffer object
[13:47:12] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[13:47:12] [PASSED] ttm_bo_validate_move_fence_signaled
[13:47:12] ========= ttm_bo_validate_move_fence_not_signaled  =========
[13:47:12] [PASSED] Waits for GPU
[13:47:12] [PASSED] Tries to lock straight away
[13:47:12] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[13:47:12] [PASSED] ttm_bo_validate_happy_evict
[13:47:12] [PASSED] ttm_bo_validate_all_pinned_evict
[13:47:12] [PASSED] ttm_bo_validate_allowed_only_evict
[13:47:12] [PASSED] ttm_bo_validate_deleted_evict
[13:47:12] [PASSED] ttm_bo_validate_busy_domain_evict
[13:47:12] [PASSED] ttm_bo_validate_evict_gutting
[13:47:12] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[13:47:12] ================= [PASSED] ttm_bo_validate =================
[13:47:12] ============================================================
[13:47:12] Testing complete. Ran 101 tests: passed: 101
[13:47:12] Elapsed time: 11.351s total, 1.691s configuring, 9.443s building, 0.185s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for drm/i915/overlay: Convert to parent interface (rev5)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 2335 bytes --]

== Series Details ==

Series: drm/i915/overlay: Convert to parent interface (rev5)
URL   : https://patchwork.freedesktop.org/series/161766/
State : success

== Summary ==

CI Bug Log - changes from xe-4621-0bc433c973ba7ccbc6f32f818744d5fae3d84fda_BAT -> xe-pw-161766v5_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (14 -> 14)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-161766v5_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1:
    - bat-adlp-7:         [PASS][1] -> [DMESG-WARN][2] ([Intel XE#7483])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4621-0bc433c973ba7ccbc6f32f818744d5fae3d84fda/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1.html

  
#### Possible fixes ####

  * igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1:
    - bat-adlp-7:         [DMESG-WARN][3] ([Intel XE#7483]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4621-0bc433c973ba7ccbc6f32f818744d5fae3d84fda/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html

  * igt@xe_waitfence@reltime:
    - bat-dg2-oem2:       [FAIL][5] ([Intel XE#6520]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4621-0bc433c973ba7ccbc6f32f818744d5fae3d84fda/bat-dg2-oem2/igt@xe_waitfence@reltime.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/bat-dg2-oem2/igt@xe_waitfence@reltime.html

  
  [Intel XE#6520]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6520
  [Intel XE#7483]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7483


Build changes
-------------

  * Linux: xe-4621-0bc433c973ba7ccbc6f32f818744d5fae3d84fda -> xe-pw-161766v5

  IGT_8773: 8773
  xe-4621-0bc433c973ba7ccbc6f32f818744d5fae3d84fda: 0bc433c973ba7ccbc6f32f818744d5fae3d84fda
  xe-pw-161766v5: 161766v5

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/index.html

[-- Attachment #2: Type: text/html, Size: 3032 bytes --]

✓ Xe.CI.FULL: success for drm/i915/overlay: Convert to parent interface (rev5)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 44812 bytes --]

== Series Details ==

Series: drm/i915/overlay: Convert to parent interface (rev5)
URL   : https://patchwork.freedesktop.org/series/161766/
State : success

== Summary ==

CI Bug Log - changes from xe-4621-0bc433c973ba7ccbc6f32f818744d5fae3d84fda_FULL -> xe-pw-161766v5_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-161766v5_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_big_fb@4-tiled-16bpp-rotate-270:
    - shard-bmg:          NOTRUN -> [SKIP][1] ([Intel XE#2327]) +4 other tests skip
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-7/igt@kms_big_fb@4-tiled-16bpp-rotate-270.html

  * igt@kms_big_fb@linear-32bpp-rotate-90:
    - shard-lnl:          NOTRUN -> [SKIP][2] ([Intel XE#1407]) +3 other tests skip
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@kms_big_fb@linear-32bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-16bpp-rotate-0:
    - shard-bmg:          NOTRUN -> [SKIP][3] ([Intel XE#1124]) +8 other tests skip
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-5/igt@kms_big_fb@y-tiled-16bpp-rotate-0.html

  * igt@kms_big_fb@y-tiled-32bpp-rotate-0:
    - shard-lnl:          NOTRUN -> [SKIP][4] ([Intel XE#1124]) +7 other tests skip
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@kms_big_fb@y-tiled-32bpp-rotate-0.html

  * igt@kms_bw@connected-linear-tiling-3-displays-1920x1080p:
    - shard-lnl:          NOTRUN -> [SKIP][5] ([Intel XE#2191])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-2/igt@kms_bw@connected-linear-tiling-3-displays-1920x1080p.html

  * igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][6] ([Intel XE#2314] / [Intel XE#2894]) +1 other test skip
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-9/igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p.html

  * igt@kms_bw@linear-tiling-1-displays-2560x1440p:
    - shard-bmg:          [PASS][7] -> [SKIP][8] ([Intel XE#367])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4621-0bc433c973ba7ccbc6f32f818744d5fae3d84fda/shard-bmg-5/igt@kms_bw@linear-tiling-1-displays-2560x1440p.html
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-7/igt@kms_bw@linear-tiling-1-displays-2560x1440p.html

  * igt@kms_bw@linear-tiling-4-displays-2160x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#367]) +2 other tests skip
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-7/igt@kms_bw@linear-tiling-4-displays-2160x1440p.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc:
    - shard-lnl:          NOTRUN -> [SKIP][10] ([Intel XE#2887]) +11 other tests skip
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-2/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc.html

  * igt@kms_ccs@bad-rotation-90-y-tiled-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][11] ([Intel XE#2887]) +9 other tests skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-9/igt@kms_ccs@bad-rotation-90-y-tiled-ccs.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs:
    - shard-lnl:          NOTRUN -> [SKIP][12] ([Intel XE#3432])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-2/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs.html
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#3432])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs@pipe-a-hdmi-a-3:
    - shard-bmg:          NOTRUN -> [SKIP][14] ([Intel XE#2652]) +25 other tests skip
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-6/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs@pipe-a-hdmi-a-3.html

  * igt@kms_chamelium_color@ctm-blue-to-red:
    - shard-lnl:          NOTRUN -> [SKIP][15] ([Intel XE#306]) +1 other test skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@kms_chamelium_color@ctm-blue-to-red.html

  * igt@kms_chamelium_color@gamma:
    - shard-bmg:          NOTRUN -> [SKIP][16] ([Intel XE#2325]) +1 other test skip
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-5/igt@kms_chamelium_color@gamma.html

  * igt@kms_chamelium_frames@hdmi-cmp-planes-random:
    - shard-lnl:          NOTRUN -> [SKIP][17] ([Intel XE#373]) +6 other tests skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@kms_chamelium_frames@hdmi-cmp-planes-random.html

  * igt@kms_chamelium_hpd@hdmi-hpd-storm-disable:
    - shard-bmg:          NOTRUN -> [SKIP][18] ([Intel XE#2252]) +7 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-6/igt@kms_chamelium_hpd@hdmi-hpd-storm-disable.html

  * igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-a-plane-2:
    - shard-lnl:          NOTRUN -> [FAIL][19] ([Intel XE#7305]) +9 other tests fail
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-a-plane-2.html

  * igt@kms_color_pipeline@plane-lut3d-green-only:
    - shard-lnl:          NOTRUN -> [SKIP][20] ([Intel XE#6969] / [Intel XE#7006]) +1 other test skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@kms_color_pipeline@plane-lut3d-green-only.html

  * igt@kms_color_pipeline@plane-lut3d-green-only@pipe-a-plane-1:
    - shard-lnl:          NOTRUN -> [SKIP][21] ([Intel XE#6969]) +7 other tests skip
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@kms_color_pipeline@plane-lut3d-green-only@pipe-a-plane-1.html

  * igt@kms_content_protection@atomic@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][22] ([Intel XE#1178] / [Intel XE#3304])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-8/igt@kms_content_protection@atomic@pipe-a-dp-2.html

  * igt@kms_content_protection@dp-mst-lic-type-1:
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#2390] / [Intel XE#6974])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-9/igt@kms_content_protection@dp-mst-lic-type-1.html

  * igt@kms_content_protection@dp-mst-type-1-suspend-resume:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#6974])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-7/igt@kms_content_protection@dp-mst-type-1-suspend-resume.html

  * igt@kms_content_protection@lic-type-0-hdcp14:
    - shard-lnl:          NOTRUN -> [SKIP][25] ([Intel XE#6973])
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-2/igt@kms_content_protection@lic-type-0-hdcp14.html

  * igt@kms_content_protection@lic-type-0-hdcp14@pipe-a-dp-1:
    - shard-bmg:          NOTRUN -> [FAIL][26] ([Intel XE#3304]) +2 other tests fail
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-5/igt@kms_content_protection@lic-type-0-hdcp14@pipe-a-dp-1.html

  * igt@kms_content_protection@srm:
    - shard-lnl:          NOTRUN -> [SKIP][27] ([Intel XE#3278] / [Intel XE#6973])
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@kms_content_protection@srm.html

  * igt@kms_content_protection@suspend-resume:
    - shard-lnl:          NOTRUN -> [SKIP][28] ([Intel XE#6705] / [Intel XE#6973])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@kms_content_protection@suspend-resume.html

  * igt@kms_content_protection@uevent-hdcp14:
    - shard-bmg:          NOTRUN -> [FAIL][29] ([Intel XE#6707]) +2 other tests fail
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-6/igt@kms_content_protection@uevent-hdcp14.html

  * igt@kms_cursor_crc@cursor-offscreen-32x32:
    - shard-bmg:          NOTRUN -> [SKIP][30] ([Intel XE#2320]) +4 other tests skip
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-6/igt@kms_cursor_crc@cursor-offscreen-32x32.html

  * igt@kms_cursor_crc@cursor-random-512x170:
    - shard-lnl:          NOTRUN -> [SKIP][31] ([Intel XE#2321])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@kms_cursor_crc@cursor-random-512x170.html

  * igt@kms_cursor_crc@cursor-random-max-size:
    - shard-lnl:          NOTRUN -> [SKIP][32] ([Intel XE#1424]) +3 other tests skip
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-2/igt@kms_cursor_crc@cursor-random-max-size.html

  * igt@kms_cursor_crc@cursor-rapid-movement-512x512:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#2321])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-7/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html

  * igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy:
    - shard-lnl:          NOTRUN -> [SKIP][34] ([Intel XE#309]) +4 other tests skip
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-2/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
    - shard-lnl:          NOTRUN -> [SKIP][35] ([Intel XE#323])
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-6/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#2286])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-7/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html

  * igt@kms_dp_linktrain_fallback@dsc-fallback:
    - shard-lnl:          NOTRUN -> [SKIP][37] ([Intel XE#4331])
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@kms_dp_linktrain_fallback@dsc-fallback.html

  * igt@kms_dsc@dsc-with-output-formats:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#2244])
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-7/igt@kms_dsc@dsc-with-output-formats.html

  * igt@kms_feature_discovery@display-2x:
    - shard-lnl:          NOTRUN -> [SKIP][39] ([Intel XE#702])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-2/igt@kms_feature_discovery@display-2x.html

  * igt@kms_flip@2x-flip-vs-rmfb-interruptible:
    - shard-lnl:          NOTRUN -> [SKIP][40] ([Intel XE#1421]) +6 other tests skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@kms_flip@2x-flip-vs-rmfb-interruptible.html

  * igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling:
    - shard-lnl:          NOTRUN -> [SKIP][41] ([Intel XE#1397] / [Intel XE#1745]) +1 other test skip
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-2/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling@pipe-a-default-mode:
    - shard-lnl:          NOTRUN -> [SKIP][42] ([Intel XE#1397]) +1 other test skip
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-2/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling:
    - shard-lnl:          NOTRUN -> [SKIP][43] ([Intel XE#7178])
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][44] ([Intel XE#7178]) +2 other tests skip
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-7/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling.html

  * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-shrfb-draw-blt:
    - shard-lnl:          NOTRUN -> [SKIP][45] ([Intel XE#6312] / [Intel XE#651]) +9 other tests skip
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@drrs-abgr161616f-draw-render:
    - shard-lnl:          NOTRUN -> [SKIP][46] ([Intel XE#7061]) +1 other test skip
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@kms_frontbuffer_tracking@drrs-abgr161616f-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-plflip-blt:
    - shard-lnl:          NOTRUN -> [SKIP][47] ([Intel XE#656]) +26 other tests skip
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff:
    - shard-bmg:          NOTRUN -> [SKIP][48] ([Intel XE#4141]) +13 other tests skip
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbc-tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][49] ([Intel XE#2352])
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-9/igt@kms_frontbuffer_tracking@fbc-tiling-y.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-offscreen-pri-indfb-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][50] ([Intel XE#6312]) +1 other test skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-2/igt@kms_frontbuffer_tracking@fbcdrrs-1p-offscreen-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-shrfb-msflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#2311]) +25 other tests skip
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-shrfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][52] ([Intel XE#2313]) +23 other tests skip
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-argb161616f-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][53] ([Intel XE#7061]) +1 other test skip
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsr-argb161616f-draw-mmap-wc.html

  * igt@kms_hdmi_inject@inject-4k:
    - shard-lnl:          NOTRUN -> [SKIP][54] ([Intel XE#1470])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@kms_hdmi_inject@inject-4k.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-lnl:          NOTRUN -> [SKIP][55] ([Intel XE#3374] / [Intel XE#3544])
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_joiner@basic-max-non-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][56] ([Intel XE#4298])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-6/igt@kms_joiner@basic-max-non-joiner.html

  * igt@kms_joiner@invalid-modeset-force-ultra-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][57] ([Intel XE#6911])
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-5/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html

  * igt@kms_joiner@invalid-modeset-ultra-joiner:
    - shard-lnl:          NOTRUN -> [SKIP][58] ([Intel XE#6900]) +1 other test skip
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@kms_joiner@invalid-modeset-ultra-joiner.html

  * igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-modifier:
    - shard-lnl:          NOTRUN -> [SKIP][59] ([Intel XE#7283]) +3 other tests skip
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-2/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-modifier.html

  * igt@kms_plane@pixel-format-yf-tiled-ccs-modifier:
    - shard-bmg:          NOTRUN -> [SKIP][60] ([Intel XE#7283]) +4 other tests skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-7/igt@kms_plane@pixel-format-yf-tiled-ccs-modifier.html

  * igt@kms_plane_lowres@tiling-x@pipe-b-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][61] ([Intel XE#599]) +7 other tests skip
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@kms_plane_lowres@tiling-x@pipe-b-edp-1.html

  * igt@kms_plane_multiple@2x-tiling-none:
    - shard-lnl:          NOTRUN -> [SKIP][62] ([Intel XE#4596])
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@kms_plane_multiple@2x-tiling-none.html

  * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-pixel-formats@pipe-b:
    - shard-lnl:          NOTRUN -> [SKIP][63] ([Intel XE#2763] / [Intel XE#6886]) +1 other test skip
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-pixel-formats@pipe-b.html

  * igt@kms_pm_dc@dc5-retention-flops:
    - shard-lnl:          NOTRUN -> [SKIP][64] ([Intel XE#3309])
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-2/igt@kms_pm_dc@dc5-retention-flops.html
    - shard-bmg:          NOTRUN -> [SKIP][65] ([Intel XE#3309])
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-5/igt@kms_pm_dc@dc5-retention-flops.html

  * igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-fully-sf:
    - shard-bmg:          NOTRUN -> [SKIP][66] ([Intel XE#1489]) +6 other tests skip
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-9/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area:
    - shard-lnl:          NOTRUN -> [SKIP][67] ([Intel XE#2893] / [Intel XE#4608])
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area.html

  * igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area@pipe-b-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][68] ([Intel XE#4608]) +1 other test skip
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area@pipe-b-edp-1.html

  * igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf:
    - shard-lnl:          NOTRUN -> [SKIP][69] ([Intel XE#2893]) +4 other tests skip
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf.html

  * igt@kms_psr2_su@page_flip-p010:
    - shard-lnl:          NOTRUN -> [SKIP][70] ([Intel XE#1128])
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-2/igt@kms_psr2_su@page_flip-p010.html
    - shard-bmg:          NOTRUN -> [SKIP][71] ([Intel XE#2387])
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-5/igt@kms_psr2_su@page_flip-p010.html

  * igt@kms_psr@pr-cursor-plane-move:
    - shard-lnl:          NOTRUN -> [SKIP][72] ([Intel XE#1406]) +3 other tests skip
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@kms_psr@pr-cursor-plane-move.html

  * igt@kms_psr@psr-primary-blt:
    - shard-bmg:          NOTRUN -> [SKIP][73] ([Intel XE#2234] / [Intel XE#2850]) +7 other tests skip
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-7/igt@kms_psr@psr-primary-blt.html

  * igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
    - shard-bmg:          NOTRUN -> [SKIP][74] ([Intel XE#2414])
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-9/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html

  * igt@kms_rotation_crc@primary-rotation-90:
    - shard-lnl:          NOTRUN -> [SKIP][75] ([Intel XE#3414] / [Intel XE#3904]) +1 other test skip
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-2/igt@kms_rotation_crc@primary-rotation-90.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
    - shard-bmg:          NOTRUN -> [SKIP][76] ([Intel XE#3414] / [Intel XE#3904]) +1 other test skip
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-9/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html

  * igt@kms_sharpness_filter@invalid-plane-with-filter:
    - shard-bmg:          NOTRUN -> [SKIP][77] ([Intel XE#6503])
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-9/igt@kms_sharpness_filter@invalid-plane-with-filter.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-bmg:          NOTRUN -> [SKIP][78] ([Intel XE#2426])
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-7/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_tv_load_detect@load-detect:
    - shard-lnl:          NOTRUN -> [SKIP][79] ([Intel XE#330])
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@kms_tv_load_detect@load-detect.html

  * igt@kms_vrr@negative-basic:
    - shard-lnl:          NOTRUN -> [SKIP][80] ([Intel XE#1499]) +1 other test skip
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@kms_vrr@negative-basic.html

  * igt@kms_vrr@seamless-rr-switch-drrs:
    - shard-bmg:          NOTRUN -> [SKIP][81] ([Intel XE#1499])
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-5/igt@kms_vrr@seamless-rr-switch-drrs.html

  * igt@xe_compute@ccs-mode-basic:
    - shard-bmg:          NOTRUN -> [SKIP][82] ([Intel XE#6599])
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-9/igt@xe_compute@ccs-mode-basic.html

  * igt@xe_compute@eu-busy-10s:
    - shard-lnl:          NOTRUN -> [SKIP][83] ([Intel XE#6592] / [Intel XE#6645])
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@xe_compute@eu-busy-10s.html

  * igt@xe_eudebug@attach-debug-metadata:
    - shard-lnl:          NOTRUN -> [SKIP][84] ([Intel XE#4837]) +6 other tests skip
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@xe_eudebug@attach-debug-metadata.html

  * igt@xe_eudebug@basic-vm-access-userptr:
    - shard-bmg:          NOTRUN -> [SKIP][85] ([Intel XE#4837]) +7 other tests skip
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-5/igt@xe_eudebug@basic-vm-access-userptr.html

  * igt@xe_eudebug_online@interrupt-all:
    - shard-bmg:          NOTRUN -> [SKIP][86] ([Intel XE#4837] / [Intel XE#6665]) +3 other tests skip
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-9/igt@xe_eudebug_online@interrupt-all.html

  * igt@xe_eudebug_online@resume-one:
    - shard-lnl:          NOTRUN -> [SKIP][87] ([Intel XE#4837] / [Intel XE#6665]) +3 other tests skip
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@xe_eudebug_online@resume-one.html

  * igt@xe_evict@evict-threads-small-multi-queue:
    - shard-bmg:          NOTRUN -> [SKIP][88] ([Intel XE#7140]) +2 other tests skip
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-5/igt@xe_evict@evict-threads-small-multi-queue.html

  * igt@xe_evict_ccs@evict-overcommit-parallel-nofree-samefd:
    - shard-lnl:          NOTRUN -> [SKIP][89] ([Intel XE#6540] / [Intel XE#688]) +8 other tests skip
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@xe_evict_ccs@evict-overcommit-parallel-nofree-samefd.html

  * igt@xe_exec_balancer@no-exec-cm-parallel-userptr-invalidate-race:
    - shard-lnl:          NOTRUN -> [SKIP][90] ([Intel XE#7482]) +12 other tests skip
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@xe_exec_balancer@no-exec-cm-parallel-userptr-invalidate-race.html

  * igt@xe_exec_basic@many-execqueues-many-vm-userptr-rebind:
    - shard-bmg:          [PASS][91] -> [ABORT][92] ([Intel XE#5545] / [Intel XE#6652]) +1 other test abort
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4621-0bc433c973ba7ccbc6f32f818744d5fae3d84fda/shard-bmg-1/igt@xe_exec_basic@many-execqueues-many-vm-userptr-rebind.html
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-2/igt@xe_exec_basic@many-execqueues-many-vm-userptr-rebind.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race:
    - shard-lnl:          NOTRUN -> [SKIP][93] ([Intel XE#1392]) +5 other tests skip
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-2/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][94] ([Intel XE#2322]) +10 other tests skip
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-6/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-rebind.html

  * igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr:
    - shard-bmg:          NOTRUN -> [SKIP][95] ([Intel XE#7136]) +7 other tests skip
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-9/igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr.html

  * igt@xe_exec_fault_mode@twice-multi-queue-userptr-invalidate-race:
    - shard-lnl:          NOTRUN -> [SKIP][96] ([Intel XE#7136]) +8 other tests skip
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-2/igt@xe_exec_fault_mode@twice-multi-queue-userptr-invalidate-race.html

  * igt@xe_exec_multi_queue@many-execs-preempt-mode-fault-dyn-priority:
    - shard-lnl:          NOTRUN -> [SKIP][97] ([Intel XE#6874]) +21 other tests skip
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@xe_exec_multi_queue@many-execs-preempt-mode-fault-dyn-priority.html

  * igt@xe_exec_multi_queue@one-queue-priority-smem:
    - shard-bmg:          NOTRUN -> [SKIP][98] ([Intel XE#6874]) +25 other tests skip
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-6/igt@xe_exec_multi_queue@one-queue-priority-smem.html

  * igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-comp-single-vma:
    - shard-lnl:          NOTRUN -> [SKIP][99] ([Intel XE#6196])
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-2/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-comp-single-vma.html

  * igt@xe_exec_threads@threads-multi-queue-cm-shared-vm-userptr-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][100] ([Intel XE#7138]) +7 other tests skip
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-5/igt@xe_exec_threads@threads-multi-queue-cm-shared-vm-userptr-invalidate.html

  * igt@xe_exec_threads@threads-multi-queue-rebind-err:
    - shard-lnl:          NOTRUN -> [SKIP][101] ([Intel XE#7138]) +6 other tests skip
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-2/igt@xe_exec_threads@threads-multi-queue-rebind-err.html

  * igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit:
    - shard-bmg:          NOTRUN -> [SKIP][102] ([Intel XE#2229])
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-7/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html

  * igt@xe_media_fill@media-fill:
    - shard-lnl:          NOTRUN -> [SKIP][103] ([Intel XE#560] / [Intel XE#7321])
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@xe_media_fill@media-fill.html

  * igt@xe_mmap@small-bar:
    - shard-lnl:          NOTRUN -> [SKIP][104] ([Intel XE#512] / [Intel XE#7323])
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-2/igt@xe_mmap@small-bar.html
    - shard-bmg:          NOTRUN -> [SKIP][105] ([Intel XE#586] / [Intel XE#7323])
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-5/igt@xe_mmap@small-bar.html

  * igt@xe_multigpu_svm@mgpu-coherency-basic:
    - shard-lnl:          NOTRUN -> [SKIP][106] ([Intel XE#6964]) +1 other test skip
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@xe_multigpu_svm@mgpu-coherency-basic.html

  * igt@xe_multigpu_svm@mgpu-coherency-fail-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][107] ([Intel XE#6964]) +1 other test skip
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-7/igt@xe_multigpu_svm@mgpu-coherency-fail-prefetch.html

  * igt@xe_noexec_ping_pong@basic:
    - shard-lnl:          NOTRUN -> [SKIP][108] ([Intel XE#6259] / [Intel XE#7324])
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-2/igt@xe_noexec_ping_pong@basic.html

  * igt@xe_pm@d3cold-mmap-system:
    - shard-lnl:          NOTRUN -> [SKIP][109] ([Intel XE#2284] / [Intel XE#366]) +1 other test skip
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@xe_pm@d3cold-mmap-system.html

  * igt@xe_pm@s3-d3hot-basic-exec:
    - shard-lnl:          NOTRUN -> [SKIP][110] ([Intel XE#584]) +1 other test skip
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@xe_pm@s3-d3hot-basic-exec.html

  * igt@xe_pm_residency@aspm_link_residency:
    - shard-bmg:          [PASS][111] -> [SKIP][112] ([Intel XE#7258])
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4621-0bc433c973ba7ccbc6f32f818744d5fae3d84fda/shard-bmg-2/igt@xe_pm_residency@aspm_link_residency.html
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-5/igt@xe_pm_residency@aspm_link_residency.html
    - shard-lnl:          NOTRUN -> [SKIP][113] ([Intel XE#7271])
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-2/igt@xe_pm_residency@aspm_link_residency.html

  * igt@xe_pmu@all-fn-engine-activity-load:
    - shard-lnl:          NOTRUN -> [SKIP][114] ([Intel XE#4650])
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-6/igt@xe_pmu@all-fn-engine-activity-load.html

  * igt@xe_pxp@pxp-termination-key-update-post-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][115] ([Intel XE#4733]) +1 other test skip
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-6/igt@xe_pxp@pxp-termination-key-update-post-suspend.html

  * igt@xe_query@multigpu-query-invalid-cs-cycles:
    - shard-lnl:          NOTRUN -> [SKIP][116] ([Intel XE#944]) +1 other test skip
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@xe_query@multigpu-query-invalid-cs-cycles.html

  * igt@xe_query@multigpu-query-mem-usage:
    - shard-bmg:          NOTRUN -> [SKIP][117] ([Intel XE#944]) +1 other test skip
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-9/igt@xe_query@multigpu-query-mem-usage.html

  * igt@xe_sriov_admin@exec-quantum-write-readback-vfs-disabled:
    - shard-lnl:          NOTRUN -> [SKIP][118] ([Intel XE#7174]) +1 other test skip
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-2/igt@xe_sriov_admin@exec-quantum-write-readback-vfs-disabled.html

  * igt@xe_sriov_vram@vf-access-after-resize-down:
    - shard-lnl:          NOTRUN -> [SKIP][119] ([Intel XE#6376] / [Intel XE#7330])
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-5/igt@xe_sriov_vram@vf-access-after-resize-down.html

  
#### Possible fixes ####

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-lnl:          [FAIL][120] ([Intel XE#301] / [Intel XE#3149]) -> [PASS][121] +1 other test pass
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4621-0bc433c973ba7ccbc6f32f818744d5fae3d84fda/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@plain-flip-ts-check-interruptible@c-hdmi-a3:
    - shard-bmg:          [DMESG-WARN][122] -> [PASS][123]
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4621-0bc433c973ba7ccbc6f32f818744d5fae3d84fda/shard-bmg-2/igt@kms_flip@plain-flip-ts-check-interruptible@c-hdmi-a3.html
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-5/igt@kms_flip@plain-flip-ts-check-interruptible@c-hdmi-a3.html

  * igt@kms_flip@plain-flip-ts-check-interruptible@d-hdmi-a3:
    - shard-bmg:          [ABORT][124] ([Intel XE#5545] / [Intel XE#6652]) -> [PASS][125] +1 other test pass
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4621-0bc433c973ba7ccbc6f32f818744d5fae3d84fda/shard-bmg-2/igt@kms_flip@plain-flip-ts-check-interruptible@d-hdmi-a3.html
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-5/igt@kms_flip@plain-flip-ts-check-interruptible@d-hdmi-a3.html

  * igt@kms_hdr@invalid-hdr:
    - shard-bmg:          [SKIP][126] ([Intel XE#1503]) -> [PASS][127]
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4621-0bc433c973ba7ccbc6f32f818744d5fae3d84fda/shard-bmg-2/igt@kms_hdr@invalid-hdr.html
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-5/igt@kms_hdr@invalid-hdr.html

  * igt@xe_evict@evict-beng-mixed-many-threads-small:
    - shard-bmg:          [INCOMPLETE][128] ([Intel XE#6321]) -> [PASS][129]
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4621-0bc433c973ba7ccbc6f32f818744d5fae3d84fda/shard-bmg-9/igt@xe_evict@evict-beng-mixed-many-threads-small.html
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-3/igt@xe_evict@evict-beng-mixed-many-threads-small.html

  * igt@xe_exec_system_allocator@threads-many-execqueues-mmap-remap-ro-dontunmap:
    - shard-bmg:          [ABORT][130] ([Intel XE#6652]) -> [PASS][131]
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4621-0bc433c973ba7ccbc6f32f818744d5fae3d84fda/shard-bmg-3/igt@xe_exec_system_allocator@threads-many-execqueues-mmap-remap-ro-dontunmap.html
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-8/igt@xe_exec_system_allocator@threads-many-execqueues-mmap-remap-ro-dontunmap.html

  * igt@xe_fault_injection@vm-bind-fail-xe_vma_ops_alloc:
    - shard-bmg:          [ABORT][132] -> [PASS][133]
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4621-0bc433c973ba7ccbc6f32f818744d5fae3d84fda/shard-bmg-6/igt@xe_fault_injection@vm-bind-fail-xe_vma_ops_alloc.html
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-7/igt@xe_fault_injection@vm-bind-fail-xe_vma_ops_alloc.html

  
#### Warnings ####

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][134] ([Intel XE#3544]) -> [SKIP][135] ([Intel XE#3374] / [Intel XE#3544])
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4621-0bc433c973ba7ccbc6f32f818744d5fae3d84fda/shard-bmg-4/igt@kms_hdr@brightness-with-hdr.html
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-3/igt@kms_hdr@brightness-with-hdr.html

  * igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv:
    - shard-bmg:          [ABORT][136] ([Intel XE#5466]) -> [ABORT][137] ([Intel XE#5466] / [Intel XE#6652])
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4621-0bc433c973ba7ccbc6f32f818744d5fae3d84fda/shard-bmg-8/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/shard-bmg-7/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1128
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1397
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
  [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
  [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
  [Intel XE#1470]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1470
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
  [Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
  [Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2352
  [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
  [Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
  [Intel XE#2414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2414
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
  [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
  [Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323
  [Intel XE#3278]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3278
  [Intel XE#330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/330
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3309
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4298]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4298
  [Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608
  [Intel XE#4650]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4650
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/512
  [Intel XE#5466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5466
  [Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
  [Intel XE#560]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/560
  [Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584
  [Intel XE#586]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/586
  [Intel XE#599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/599
  [Intel XE#6196]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6196
  [Intel XE#6259]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6259
  [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6376
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#6592]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6592
  [Intel XE#6599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6599
  [Intel XE#6645]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6645
  [Intel XE#6652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6652
  [Intel XE#6665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6665
  [Intel XE#6705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6705
  [Intel XE#6707]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6707
  [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#6900]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6900
  [Intel XE#6911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6911
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#6969]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6969
  [Intel XE#6973]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6973
  [Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
  [Intel XE#7006]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7006
  [Intel XE#702]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/702
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
  [Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
  [Intel XE#7140]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7140
  [Intel XE#7174]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7174
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7258]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7258
  [Intel XE#7271]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7271
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7305]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7305
  [Intel XE#7321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7321
  [Intel XE#7323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7323
  [Intel XE#7324]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7324
  [Intel XE#7330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7330
  [Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * Linux: xe-4621-0bc433c973ba7ccbc6f32f818744d5fae3d84fda -> xe-pw-161766v5

  IGT_8773: 8773
  xe-4621-0bc433c973ba7ccbc6f32f818744d5fae3d84fda: 0bc433c973ba7ccbc6f32f818744d5fae3d84fda
  xe-pw-161766v5: 161766v5

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161766v5/index.html

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