* [PATCH 0/3] drm/xe: Add support for GPU health indicator
@ 2026-03-09 5:17 Soham Purkait
2026-03-09 5:17 ` [PATCH 1/3] From: Anoop Vijay <anoop.c.vijay@intel.com> Soham Purkait
` (6 more replies)
0 siblings, 7 replies; 10+ messages in thread
From: Soham Purkait @ 2026-03-09 5:17 UTC (permalink / raw)
To: intel-xe, riana.tauro, anshuman.gupta, aravind.iddamsetty,
badal.nilawar, raag.jadav, ravi.kishore.koppuravuri,
mallesh.koujalagi
Cc: soham.purkait, anoop.c.vijay
This series adds Xe GPU health indicator support as RAS functionality
through the System Controller mailbox and which is exposed via
sysfs interface.
It introduces the health command IDs and request/response structures
used by System Controller mailbox, then wires the functionality into Xe
so user space can query and update GPU health state via a single
sysfs node.
The sysfs file (gpu_health) is placed in the device level and behaves as
follows:
$ cat /sys/.../device/gpu_health
[ok] warning critical
$ echo critical > /sys/.../device/gpu_health
$ cat /sys/.../device/gpu_health
ok warning [critical]
Anoop Vijay (1):
From: Anoop Vijay <anoop.c.vijay@intel.com>
Soham Purkait (2):
drm/xe/xe_ras: Add structures and commands for RAS GPU health
indicator
drm/xe/xe_ras: Add RAS support for GPU health indicator
drivers/gpu/drm/xe/Makefile | 3 +
drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h | 31 ++
drivers/gpu/drm/xe/regs/xe_sysctrl_regs.h | 36 ++
drivers/gpu/drm/xe/xe_device.c | 8 +
drivers/gpu/drm/xe/xe_device_types.h | 6 +
drivers/gpu/drm/xe/xe_pci.c | 2 +
drivers/gpu/drm/xe/xe_pci_types.h | 1 +
drivers/gpu/drm/xe/xe_ras.c | 166 ++++++++
drivers/gpu/drm/xe/xe_ras.h | 13 +
drivers/gpu/drm/xe/xe_ras_types.h | 65 ++++
drivers/gpu/drm/xe/xe_sysctrl.c | 84 ++++
drivers/gpu/drm/xe/xe_sysctrl.h | 21 +
drivers/gpu/drm/xe/xe_sysctrl_mailbox.c | 364 ++++++++++++++++++
drivers/gpu/drm/xe/xe_sysctrl_mailbox.h | 31 ++
drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h | 50 +++
drivers/gpu/drm/xe/xe_sysctrl_types.h | 32 ++
16 files changed, 913 insertions(+)
create mode 100644 drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h
create mode 100644 drivers/gpu/drm/xe/regs/xe_sysctrl_regs.h
create mode 100644 drivers/gpu/drm/xe/xe_ras.c
create mode 100644 drivers/gpu/drm/xe/xe_ras.h
create mode 100644 drivers/gpu/drm/xe/xe_ras_types.h
create mode 100644 drivers/gpu/drm/xe/xe_sysctrl.c
create mode 100644 drivers/gpu/drm/xe/xe_sysctrl.h
create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_mailbox.h
create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_types.h
--
2.43.0
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH 1/3] From: Anoop Vijay <anoop.c.vijay@intel.com> 2026-03-09 5:17 [PATCH 0/3] drm/xe: Add support for GPU health indicator Soham Purkait @ 2026-03-09 5:17 ` Soham Purkait 2026-03-09 5:17 ` [PATCH 2/3] drm/xe/xe_ras: Add structures and commands for RAS GPU health indicator Soham Purkait ` (5 subsequent siblings) 6 siblings, 0 replies; 10+ messages in thread From: Soham Purkait @ 2026-03-09 5:17 UTC (permalink / raw) To: intel-xe, riana.tauro, anshuman.gupta, aravind.iddamsetty, badal.nilawar, raag.jadav, ravi.kishore.koppuravuri, mallesh.koujalagi Cc: soham.purkait, anoop.c.vijay [-- Warning: decoded text below may be mangled, UTF-8 assumed --] [-- Attachment #1: Type: text/plain; charset=yes, Size: 23888 bytes --] From: Anoop Vijay <anoop.c.vijay@intel.com> DO NOT REVIEW. COMPILATION ONLY This patch is from https://patchwork.freedesktop.org/series/159554/ Added only for Compilation. Signed-off-by: Soham Purkait <soham.purkait@intel.com> --- drivers/gpu/drm/xe/Makefile | 2 + drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h | 31 ++ drivers/gpu/drm/xe/regs/xe_sysctrl_regs.h | 36 ++ drivers/gpu/drm/xe/xe_device.c | 5 + drivers/gpu/drm/xe/xe_device_types.h | 6 + drivers/gpu/drm/xe/xe_pci.c | 2 + drivers/gpu/drm/xe/xe_pci_types.h | 1 + drivers/gpu/drm/xe/xe_sysctrl.c | 84 ++++ drivers/gpu/drm/xe/xe_sysctrl.h | 21 + drivers/gpu/drm/xe/xe_sysctrl_mailbox.c | 364 ++++++++++++++++++ drivers/gpu/drm/xe/xe_sysctrl_mailbox.h | 31 ++ drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h | 35 ++ drivers/gpu/drm/xe/xe_sysctrl_types.h | 32 ++ 13 files changed, 650 insertions(+) create mode 100644 drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h create mode 100644 drivers/gpu/drm/xe/regs/xe_sysctrl_regs.h create mode 100644 drivers/gpu/drm/xe/xe_sysctrl.c create mode 100644 drivers/gpu/drm/xe/xe_sysctrl.h create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_mailbox.c create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_mailbox.h create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_types.h diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile index ff778fb2d4ff..1890bbd1b28d 100644 --- a/drivers/gpu/drm/xe/Makefile +++ b/drivers/gpu/drm/xe/Makefile @@ -122,6 +122,8 @@ xe-y += xe_bb.o \ xe_step.o \ xe_survivability_mode.o \ xe_sync.o \ + xe_sysctrl.o \ + xe_sysctrl_mailbox.o \ xe_tile.o \ xe_tile_sysfs.o \ xe_tlb_inval.o \ diff --git a/drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h b/drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h new file mode 100644 index 000000000000..8eefb0ddafd7 --- /dev/null +++ b/drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2026 Intel Corporation + */ + +#ifndef _XE_SYSCTRL_ABI_H_ +#define _XE_SYSCTRL_ABI_H_ + +#include <linux/types.h> + +struct xe_sysctrl_mailbox_mkhi_msg_hdr { + __le32 data; +} __packed; + +struct xe_sysctrl_app_msg_hdr { + __le32 data; +} __packed; + +#define MKHI_HDR_GROUP_ID_MASK GENMASK(7, 0) +#define MKHI_HDR_COMMAND_MASK GENMASK(14, 8) +#define MKHI_HDR_COMMAND_MAX 0x7F +#define MKHI_HDR_IS_RESPONSE BIT(15) +#define MKHI_HDR_RESERVED_MASK GENMASK(23, 16) +#define MKHI_HDR_RESULT_MASK GENMASK(31, 24) + +#define APP_HDR_GROUP_ID_MASK GENMASK(7, 0) +#define APP_HDR_COMMAND_MASK GENMASK(15, 8) +#define APP_HDR_VERSION_MASK GENMASK(23, 16) +#define APP_HDR_RESERVED_MASK GENMASK(31, 24) + +#endif diff --git a/drivers/gpu/drm/xe/regs/xe_sysctrl_regs.h b/drivers/gpu/drm/xe/regs/xe_sysctrl_regs.h new file mode 100644 index 000000000000..f3c00f54a2ce --- /dev/null +++ b/drivers/gpu/drm/xe/regs/xe_sysctrl_regs.h @@ -0,0 +1,36 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2026 Intel Corporation + */ + +#ifndef _XE_SYSCTRL_REGS_H_ +#define _XE_SYSCTRL_REGS_H_ + +#include "xe_regs.h" + +#define SYSCTRL_BASE_OFFSET 0xdb000 +#define SYSCTRL_BASE (SOC_BASE + SYSCTRL_BASE_OFFSET) +#define SYSCTRL_MAILBOX_INDEX 0x03 +#define SYSCTRL_BAR_LENGTH 0x1000 + +#define SYSCTRL_MB_CTRL XE_REG(0x10) +#define SYSCTRL_MB_CTRL_RUN_BUSY REG_BIT(31) +#define SYSCTRL_MB_CTRL_IRQ REG_BIT(30) +#define SYSCTRL_MB_CTRL_RUN_BUSY_OUT REG_BIT(29) +#define SYSCTRL_MB_CTRL_PARAM3_MASK REG_GENMASK(28, 24) +#define SYSCTRL_MB_CTRL_PARAM2_MASK REG_GENMASK(23, 16) +#define SYSCTRL_MB_CTRL_PARAM1_MASK REG_GENMASK(15, 8) +#define SYSCTRL_MB_CTRL_COMMAND_MASK REG_GENMASK(7, 0) +#define SYSCTRL_MB_CTRL_MKHI_CMD REG_FIELD_PREP(SYSCTRL_MB_CTRL_COMMAND_MASK, 5) + +#define SYSCTRL_MB_DATA0 XE_REG(0x14) +#define SYSCTRL_MB_DATA1 XE_REG(0x18) +#define SYSCTRL_MB_DATA2 XE_REG(0x1C) +#define SYSCTRL_MB_DATA3 XE_REG(0x20) + +#define MKHI_FRAME_PHASE REG_BIT(24) +#define MKHI_FRAME_CURRENT_MASK REG_GENMASK(21, 16) +#define MKHI_FRAME_TOTAL_MASK REG_GENMASK(13, 8) +#define MKHI_FRAME_COMMAND_MASK REG_GENMASK(7, 0) + +#endif diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c index 3462645ca13c..1d61bb504e9b 100644 --- a/drivers/gpu/drm/xe/xe_device.c +++ b/drivers/gpu/drm/xe/xe_device.c @@ -65,6 +65,7 @@ #include "xe_survivability_mode.h" #include "xe_sriov.h" #include "xe_svm.h" +#include "xe_sysctrl.h" #include "xe_tile.h" #include "xe_ttm_stolen_mgr.h" #include "xe_ttm_sys_mgr.h" @@ -985,6 +986,10 @@ int xe_device_probe(struct xe_device *xe) if (err) goto err_unregister_display; + err = xe_sysctrl_init(xe); + if (err) + goto err_unregister_display; + err = xe_device_sysfs_init(xe); if (err) goto err_unregister_display; diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h index caa8f34a6744..ec66ef772cd6 100644 --- a/drivers/gpu/drm/xe/xe_device_types.h +++ b/drivers/gpu/drm/xe/xe_device_types.h @@ -26,6 +26,7 @@ #include "xe_sriov_vf_ccs_types.h" #include "xe_step_types.h" #include "xe_survivability_mode_types.h" +#include "xe_sysctrl_types.h" #include "xe_tile_types.h" #include "xe_validation.h" @@ -203,6 +204,8 @@ struct xe_device { u8 has_soc_remapper_telem:1; /** @info.has_sriov: Supports SR-IOV */ u8 has_sriov:1; + /** @info.has_sysctrl: Supports System Controller */ + u8 has_sysctrl:1; /** @info.has_usm: Device has unified shared memory support */ u8 has_usm:1; /** @info.has_64bit_timestamp: Device supports 64-bit timestamps */ @@ -512,6 +515,9 @@ struct xe_device { /** @i2c: I2C host controller */ struct xe_i2c *i2c; + /** @sc: System Controller */ + struct xe_sysctrl sc; + /** @atomic_svm_timeslice_ms: Atomic SVM fault timeslice MS */ u32 atomic_svm_timeslice_ms; diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c index 3ac99472d6dd..ad1e5ef2ee89 100644 --- a/drivers/gpu/drm/xe/xe_pci.c +++ b/drivers/gpu/drm/xe/xe_pci.c @@ -462,6 +462,7 @@ static const struct xe_device_desc cri_desc = { .has_soc_remapper_sysctrl = true, .has_soc_remapper_telem = true, .has_sriov = true, + .has_sysctrl = true, .max_gt_per_tile = 2, MULTI_LRC_MASK, .require_force_probe = true, @@ -761,6 +762,7 @@ static int xe_info_init_early(struct xe_device *xe, xe->info.has_soc_remapper_telem = desc->has_soc_remapper_telem; xe->info.has_sriov = xe_configfs_primary_gt_allowed(to_pci_dev(xe->drm.dev)) && desc->has_sriov; + xe->info.has_sysctrl = desc->has_sysctrl; xe->info.skip_guc_pc = desc->skip_guc_pc; xe->info.skip_mtcfg = desc->skip_mtcfg; xe->info.skip_pcode = desc->skip_pcode; diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h index 47e8a1552c2b..6ffef99b7973 100644 --- a/drivers/gpu/drm/xe/xe_pci_types.h +++ b/drivers/gpu/drm/xe/xe_pci_types.h @@ -57,6 +57,7 @@ struct xe_device_desc { u8 has_soc_remapper_sysctrl:1; u8 has_soc_remapper_telem:1; u8 has_sriov:1; + u8 has_sysctrl:1; u8 needs_scratch:1; u8 skip_guc_pc:1; u8 skip_mtcfg:1; diff --git a/drivers/gpu/drm/xe/xe_sysctrl.c b/drivers/gpu/drm/xe/xe_sysctrl.c new file mode 100644 index 000000000000..365f73ef680d --- /dev/null +++ b/drivers/gpu/drm/xe/xe_sysctrl.c @@ -0,0 +1,84 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright © 2026 Intel Corporation + */ + +#include <linux/device.h> +#include <linux/mutex.h> + +#include <drm/drm_managed.h> + +#include "regs/xe_sysctrl_regs.h" +#include "xe_assert.h" +#include "xe_device.h" +#include "xe_mmio.h" +#include "xe_printk.h" +#include "xe_soc_remapper.h" +#include "xe_sriov.h" +#include "xe_sysctrl.h" +#include "xe_sysctrl_mailbox.h" +#include "xe_sysctrl_types.h" + +/** + * DOC: System Controller (sysctrl) + * + * The System Controller (sysctrl) is an embedded microcontroller in Intel GPUs + * responsible for managing various low-level platform functions. Communication + * between the driver and the System Controller occurs via a mailbox interface, + * enabling the exchange of commands and responses. + * + * This module provides initialization routines and helper functions to interact + * with the System Controller through the mailbox. + */ +static void sysctrl_fini(void *arg) +{ + struct xe_device *xe = arg; + + xe->soc_remapper.set_sysctrl_region(xe, 0); +} + +/** + * xe_sysctrl_init() - Initialize System Controller subsystem + * @xe: xe device instance + * + * Entry point for System Controller initialization, called from xe_device_probe. + * This function checks platform support and initializes the system controller. + * + * Return: 0 on success, error code on failure + */ +int xe_sysctrl_init(struct xe_device *xe) +{ + struct xe_tile *tile = xe_device_get_root_tile(xe); + struct xe_sysctrl *sc = &xe->sc; + int ret; + + if (!xe->info.has_sysctrl) + return 0; + + if (IS_SRIOV_VF(xe)) + return 0; + + xe_assert(xe, xe->soc_remapper.set_sysctrl_region); + + xe->soc_remapper.set_sysctrl_region(xe, SYSCTRL_MAILBOX_INDEX); + + ret = devm_add_action_or_reset(xe->drm.dev, sysctrl_fini, xe); + if (ret) + return ret; + + sc->mmio = devm_kzalloc(xe->drm.dev, sizeof(*sc->mmio), GFP_KERNEL); + if (!sc->mmio) + return -ENOMEM; + + xe_mmio_init(sc->mmio, tile, tile->mmio.regs, tile->mmio.regs_size); + sc->mmio->adj_offset = SYSCTRL_BASE; + sc->mmio->adj_limit = U32_MAX; + + ret = drmm_mutex_init(&xe->drm, &sc->cmd_lock); + if (ret) + return ret; + + xe_sysctrl_mailbox_init(sc); + + return 0; +} diff --git a/drivers/gpu/drm/xe/xe_sysctrl.h b/drivers/gpu/drm/xe/xe_sysctrl.h new file mode 100644 index 000000000000..d5d8735038ae --- /dev/null +++ b/drivers/gpu/drm/xe/xe_sysctrl.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2026 Intel Corporation + */ + +#ifndef _XE_SYSCTRL_H_ +#define _XE_SYSCTRL_H_ + +#include <linux/container_of.h> + +#include "xe_device_types.h" +#include "xe_sysctrl_types.h" + +static inline struct xe_device *sc_to_xe(struct xe_sysctrl *sc) +{ + return container_of(sc, struct xe_device, sc); +} + +int xe_sysctrl_init(struct xe_device *xe); + +#endif diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c new file mode 100644 index 000000000000..0e154b6dcdc7 --- /dev/null +++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c @@ -0,0 +1,364 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright © 2026 Intel Corporation + */ + +#include <linux/bitfield.h> +#include <linux/cleanup.h> +#include <linux/container_of.h> +#include <linux/errno.h> +#include <linux/minmax.h> +#include <linux/mutex.h> +#include <linux/slab.h> +#include <linux/string.h> +#include <linux/types.h> + +#include "regs/xe_sysctrl_regs.h" +#include "xe_device.h" +#include "xe_device_types.h" +#include "xe_mmio.h" +#include "xe_pm.h" +#include "xe_printk.h" +#include "xe_sysctrl.h" +#include "xe_sysctrl_mailbox.h" +#include "xe_sysctrl_mailbox_types.h" +#include "xe_sysctrl_types.h" + +#define XE_SYSCTRL_MKHI_HDR_GROUP_ID(hdr) \ + FIELD_GET(MKHI_HDR_GROUP_ID_MASK, le32_to_cpu((hdr)->data)) + +#define XE_SYSCTRL_MKHI_HDR_COMMAND(hdr) \ + FIELD_GET(MKHI_HDR_COMMAND_MASK, le32_to_cpu((hdr)->data)) + +#define XE_SYSCTRL_MKHI_HDR_IS_RESPONSE(hdr) \ + FIELD_GET(MKHI_HDR_IS_RESPONSE, le32_to_cpu((hdr)->data)) + +#define XE_SYSCTRL_MKHI_HDR_RESULT(hdr) \ + FIELD_GET(MKHI_HDR_RESULT_MASK, le32_to_cpu((hdr)->data)) + +static bool sysctrl_wait_bit_clear(struct xe_sysctrl *sc, u32 bit_mask, + unsigned int timeout_ms) +{ + int ret; + + ret = xe_mmio_wait32_not(sc->mmio, SYSCTRL_MB_CTRL, bit_mask, bit_mask, + timeout_ms * 1000, NULL, false); + + return ret == 0; +} + +static bool sysctrl_wait_bit_set(struct xe_sysctrl *sc, u32 bit_mask, + unsigned int timeout_ms) +{ + int ret; + + ret = xe_mmio_wait32(sc->mmio, SYSCTRL_MB_CTRL, bit_mask, bit_mask, + timeout_ms * 1000, NULL, false); + + return ret == 0; +} + +static int sysctrl_write_frame(struct xe_sysctrl *sc, const void *frame, + size_t len) +{ + static const struct xe_reg regs[] = { + SYSCTRL_MB_DATA0, SYSCTRL_MB_DATA1, SYSCTRL_MB_DATA2, SYSCTRL_MB_DATA3 + }; + struct xe_device *xe = sc_to_xe(sc); + u32 val[XE_SYSCTRL_MB_FRAME_SIZE / sizeof(u32)] = {0}; + u32 dw = DIV_ROUND_UP(len, sizeof(u32)); + u32 i; + + xe_assert(xe, len > 0 && len <= XE_SYSCTRL_MB_FRAME_SIZE); + + memcpy(val, frame, len); + + for (i = 0; i < dw; i++) + xe_mmio_write32(sc->mmio, regs[i], val[i]); + + return 0; +} + +static int sysctrl_read_frame(struct xe_sysctrl *sc, void *frame, + size_t len) +{ + static const struct xe_reg regs[] = { + SYSCTRL_MB_DATA0, SYSCTRL_MB_DATA1, SYSCTRL_MB_DATA2, SYSCTRL_MB_DATA3 + }; + struct xe_device *xe = sc_to_xe(sc); + u32 val[XE_SYSCTRL_MB_FRAME_SIZE / sizeof(u32)] = {0}; + u32 dw = DIV_ROUND_UP(len, sizeof(u32)); + u32 i; + + xe_assert(xe, len > 0 && len <= XE_SYSCTRL_MB_FRAME_SIZE); + + for (i = 0; i < dw; i++) + val[i] = xe_mmio_read32(sc->mmio, regs[i]); + + memcpy(frame, val, len); + + return 0; +} + +static void sysctrl_clear_response(struct xe_sysctrl *sc) +{ + xe_mmio_rmw32(sc->mmio, SYSCTRL_MB_CTRL, SYSCTRL_MB_CTRL_RUN_BUSY_OUT, 0); +} + +static int sysctrl_prepare_command(struct xe_device *xe, + u8 group_id, u8 command, + const void *data_in, size_t data_in_len, + u8 **mbox_cmd, size_t *cmd_size) +{ + struct xe_sysctrl_mailbox_mkhi_msg_hdr *mkhi_hdr; + size_t size; + u8 *buffer; + + xe_assert(xe, command <= MKHI_HDR_COMMAND_MAX); + + if (data_in_len > XE_SYSCTRL_MB_MAX_MESSAGE_SIZE - sizeof(*mkhi_hdr)) { + xe_err(xe, "sysctrl: Input data too large: %zu bytes\n", data_in_len); + return -EINVAL; + } + + size = sizeof(*mkhi_hdr) + data_in_len; + + buffer = kmalloc(size, GFP_KERNEL); + if (!buffer) + return -ENOMEM; + + mkhi_hdr = (struct xe_sysctrl_mailbox_mkhi_msg_hdr *)buffer; + mkhi_hdr->data = cpu_to_le32(FIELD_PREP(MKHI_HDR_GROUP_ID_MASK, group_id) | + FIELD_PREP(MKHI_HDR_COMMAND_MASK, command)); + + if (data_in && data_in_len) + memcpy(buffer + sizeof(*mkhi_hdr), data_in, data_in_len); + + *mbox_cmd = buffer; + *cmd_size = size; + + return 0; +} + +static int sysctrl_send_frames(struct xe_sysctrl *sc, + const u8 *mbox_cmd, + size_t cmd_size, unsigned int timeout_ms) +{ + struct xe_device *xe = sc_to_xe(sc); + u32 ctrl_reg, total_frames, frame; + size_t bytes_sent, frame_size; + + total_frames = DIV_ROUND_UP(cmd_size, XE_SYSCTRL_MB_FRAME_SIZE); + + if (!sysctrl_wait_bit_clear(sc, SYSCTRL_MB_CTRL_RUN_BUSY, timeout_ms)) { + xe_err(xe, "sysctrl: Mailbox busy\n"); + return -EBUSY; + } + + sc->phase_bit ^= 1; + bytes_sent = 0; + + for (frame = 0; frame < total_frames; frame++) { + frame_size = min_t(size_t, cmd_size - bytes_sent, XE_SYSCTRL_MB_FRAME_SIZE); + + if (sysctrl_write_frame(sc, mbox_cmd + bytes_sent, frame_size)) { + xe_err(xe, "sysctrl: Failed to write frame %u\n", frame); + sc->phase_bit = 0; + return -EIO; + } + + ctrl_reg = SYSCTRL_MB_CTRL_RUN_BUSY | + REG_FIELD_PREP(MKHI_FRAME_CURRENT_MASK, frame) | + REG_FIELD_PREP(MKHI_FRAME_TOTAL_MASK, total_frames - 1) | + SYSCTRL_MB_CTRL_MKHI_CMD | + (sc->phase_bit ? MKHI_FRAME_PHASE : 0); + + xe_mmio_write32(sc->mmio, SYSCTRL_MB_CTRL, ctrl_reg); + + if (!sysctrl_wait_bit_clear(sc, SYSCTRL_MB_CTRL_RUN_BUSY, timeout_ms)) { + xe_err(xe, "sysctrl: Frame %u acknowledgment timeout\n", frame); + sc->phase_bit = 0; + return -ETIMEDOUT; + } + + bytes_sent += frame_size; + } + + return 0; +} + +static int sysctrl_process_frame(struct xe_sysctrl *sc, void *out, + size_t frame_size, unsigned int timeout_ms, + bool *done) +{ + u32 curr_frame, total_frames, ctrl_reg; + struct xe_device *xe = sc_to_xe(sc); + int ret; + + if (!sysctrl_wait_bit_set(sc, SYSCTRL_MB_CTRL_RUN_BUSY_OUT, timeout_ms)) { + xe_err(xe, "sysctrl: Response frame timeout\n"); + return -ETIMEDOUT; + } + + ctrl_reg = xe_mmio_read32(sc->mmio, SYSCTRL_MB_CTRL); + total_frames = FIELD_GET(MKHI_FRAME_TOTAL_MASK, ctrl_reg); + curr_frame = FIELD_GET(MKHI_FRAME_CURRENT_MASK, ctrl_reg); + + ret = sysctrl_read_frame(sc, out, frame_size); + if (ret) + return ret; + + sysctrl_clear_response(sc); + + if (curr_frame == total_frames) + *done = true; + + return 0; +} + +static int sysctrl_receive_frames(struct xe_sysctrl *sc, + const struct xe_sysctrl_mailbox_mkhi_msg_hdr *req, + void *data_out, size_t data_out_len, + size_t *rdata_len, unsigned int timeout_ms) +{ + struct xe_sysctrl_mailbox_mkhi_msg_hdr *mkhi_hdr; + struct xe_device *xe = sc_to_xe(sc); + size_t remain = sizeof(*mkhi_hdr) + data_out_len; + + u8 *buffer __free(kfree) = kzalloc(remain, GFP_KERNEL); + size_t frame_size; + bool done = false; + int ret = 0; + u8 *out; + + if (!buffer) + return -ENOMEM; + + out = buffer; + while (!done && remain) { + frame_size = min_t(size_t, remain, XE_SYSCTRL_MB_FRAME_SIZE); + + ret = sysctrl_process_frame(sc, out, frame_size, timeout_ms, + &done); + if (ret) + return ret; + + remain -= frame_size; + out += frame_size; + } + + mkhi_hdr = (struct xe_sysctrl_mailbox_mkhi_msg_hdr *)buffer; + + if (!XE_SYSCTRL_MKHI_HDR_IS_RESPONSE(mkhi_hdr) || + XE_SYSCTRL_MKHI_HDR_GROUP_ID(mkhi_hdr) != XE_SYSCTRL_MKHI_HDR_GROUP_ID(req) || + XE_SYSCTRL_MKHI_HDR_COMMAND(mkhi_hdr) != XE_SYSCTRL_MKHI_HDR_COMMAND(req)) { + xe_err(xe, "sysctrl: Response header mismatch\n"); + return -EPROTO; + } + + if (XE_SYSCTRL_MKHI_HDR_RESULT(mkhi_hdr) != 0) { + xe_err(xe, "sysctrl: Firmware error: 0x%02lx\n", + XE_SYSCTRL_MKHI_HDR_RESULT(mkhi_hdr)); + return -EIO; + } + + memcpy(data_out, mkhi_hdr + 1, data_out_len); + *rdata_len = out - buffer - sizeof(*mkhi_hdr); + + return 0; +} + +static int sysctrl_send_command(struct xe_sysctrl *sc, + const u8 *mbox_cmd, size_t cmd_size, + void *data_out, size_t data_out_len, + size_t *rdata_len, unsigned int timeout_ms) +{ + const struct xe_sysctrl_mailbox_mkhi_msg_hdr *mkhi_hdr; + size_t received; + int ret; + + ret = sysctrl_send_frames(sc, mbox_cmd, cmd_size, timeout_ms); + if (ret) + return ret; + + if (!data_out || !rdata_len) + return 0; + + mkhi_hdr = (const struct xe_sysctrl_mailbox_mkhi_msg_hdr *)mbox_cmd; + + ret = sysctrl_receive_frames(sc, mkhi_hdr, data_out, data_out_len, + &received, timeout_ms); + if (ret) + return ret; + + *rdata_len = received; + + return 0; +} + +/** + * xe_sysctrl_mailbox_init - Initialize System Controller mailbox interface + * @sc: System controller structure + * + * Initialize system controller mailbox interface for communication. + */ +void xe_sysctrl_mailbox_init(struct xe_sysctrl *sc) +{ + u32 ctrl_reg; + + ctrl_reg = xe_mmio_read32(sc->mmio, SYSCTRL_MB_CTRL); + sc->phase_bit = (ctrl_reg & MKHI_FRAME_PHASE) ? 1 : 0; +} + +/** + * xe_sysctrl_send_command() - Send command to System Controller via mailbox + * @sc: System Controller instance + * @cmd: Pointer to xe_sysctrl_mailbox_command structure + * @rdata_len: Pointer to store actual response data size (can be NULL) + * + * Send a command to the System Controller using MKHI protocol. Handles + * command preparation, fragmentation, transmission, and response reception. + * + * Return: 0 on success, negative error code on failure + */ +int xe_sysctrl_send_command(struct xe_sysctrl *sc, + struct xe_sysctrl_mailbox_command *cmd, + size_t *rdata_len) +{ + struct xe_device *xe = sc_to_xe(sc); + u8 group_id, command_code; + u8 *mbox_cmd = NULL; + size_t cmd_size = 0; + int ret = 0; + + xe_assert(xe, xe->info.has_sysctrl); + xe_assert(xe, !cmd->data_in || cmd->data_in_len); + xe_assert(xe, !cmd->data_out || cmd->data_out_len); + + group_id = XE_SYSCTRL_APP_HDR_GROUP_ID(&cmd->header); + command_code = XE_SYSCTRL_APP_HDR_COMMAND(&cmd->header); + + might_sleep(); + + ret = sysctrl_prepare_command(xe, group_id, command_code, + cmd->data_in, cmd->data_in_len, + &mbox_cmd, &cmd_size); + if (ret) { + xe_err(xe, "sysctrl: Failed to prepare command: %pe\n", ERR_PTR(ret)); + return ret; + } + + guard(xe_pm_runtime)(xe); + + guard(mutex)(&sc->cmd_lock); + + ret = sysctrl_send_command(sc, mbox_cmd, cmd_size, + cmd->data_out, cmd->data_out_len, rdata_len, + XE_SYSCTRL_MB_DEFAULT_TIMEOUT_MS); + if (ret) + xe_err(xe, "sysctrl: Mailbox command failed: %pe\n", ERR_PTR(ret)); + + kfree(mbox_cmd); + + return ret; +} diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h new file mode 100644 index 000000000000..91460be9e22c --- /dev/null +++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2026 Intel Corporation + */ + +#ifndef _XE_SYSCTRL_MAILBOX_H_ +#define _XE_SYSCTRL_MAILBOX_H_ + +#include <linux/bitfield.h> +#include <linux/types.h> + +#include "abi/xe_sysctrl_abi.h" + +struct xe_sysctrl; +struct xe_sysctrl_mailbox_command; + +#define XE_SYSCTRL_APP_HDR_GROUP_ID(hdr) \ + FIELD_GET(APP_HDR_GROUP_ID_MASK, le32_to_cpu((hdr)->data)) + +#define XE_SYSCTRL_APP_HDR_COMMAND(hdr) \ + FIELD_GET(APP_HDR_COMMAND_MASK, le32_to_cpu((hdr)->data)) + +#define XE_SYSCTRL_APP_HDR_VERSION(hdr) \ + FIELD_GET(APP_HDR_VERSION_MASK, le32_to_cpu((hdr)->data)) + +void xe_sysctrl_mailbox_init(struct xe_sysctrl *sc); +int xe_sysctrl_send_command(struct xe_sysctrl *sc, + struct xe_sysctrl_mailbox_command *cmd, + size_t *rdata_len); + +#endif diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h new file mode 100644 index 000000000000..32c35a6da1cb --- /dev/null +++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h @@ -0,0 +1,35 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2026 Intel Corporation + */ + +#ifndef _XE_SYSCTRL_MAILBOX_TYPES_H_ +#define _XE_SYSCTRL_MAILBOX_TYPES_H_ + +#include <linux/types.h> + +#include "abi/xe_sysctrl_abi.h" + +/** + * struct xe_sysctrl_mailbox_command - System Controller mailbox command + * @header: Application message header containing command information + * @data_in: Pointer to input payload data (can be NULL if no input data) + * @data_in_len: Size of input payload in bytes (0 if no input data) + * @data_out: Pointer to output buffer for response data (can be NULL if no response) + * @data_out_len: Size of output buffer in bytes (0 if no response expected) + */ +struct xe_sysctrl_mailbox_command { + struct xe_sysctrl_app_msg_hdr header; + void *data_in; + size_t data_in_len; + void *data_out; + size_t data_out_len; +}; + +#define XE_SYSCTRL_MB_FRAME_SIZE 16 +#define XE_SYSCTRL_MB_MAX_FRAMES 64 +#define XE_SYSCTRL_MB_MAX_MESSAGE_SIZE (XE_SYSCTRL_MB_FRAME_SIZE * XE_SYSCTRL_MB_MAX_FRAMES) + +#define XE_SYSCTRL_MB_DEFAULT_TIMEOUT_MS 500 + +#endif diff --git a/drivers/gpu/drm/xe/xe_sysctrl_types.h b/drivers/gpu/drm/xe/xe_sysctrl_types.h new file mode 100644 index 000000000000..c1a3f4c835b8 --- /dev/null +++ b/drivers/gpu/drm/xe/xe_sysctrl_types.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2026 Intel Corporation + */ + +#ifndef _XE_SYSCTRL_TYPES_H_ +#define _XE_SYSCTRL_TYPES_H_ + +#include <linux/mutex.h> +#include <linux/types.h> + +struct xe_mmio; + +/** + * struct xe_sysctrl - System Controller driver context + * + * This structure maintains the runtime state for System Controller + * communication. All fields are initialized during xe_sysctrl_init() + * and protected appropriately for concurrent access. + */ +struct xe_sysctrl { + /** @mmio: MMIO region for system control registers */ + struct xe_mmio *mmio; + + /** @cmd_lock: Mutex protecting mailbox command operations */ + struct mutex cmd_lock; + + /** @phase_bit: MKHI message boundary phase toggle bit (0 or 1) */ + bool phase_bit; +}; + +#endif -- 2.43.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 2/3] drm/xe/xe_ras: Add structures and commands for RAS GPU health indicator 2026-03-09 5:17 [PATCH 0/3] drm/xe: Add support for GPU health indicator Soham Purkait 2026-03-09 5:17 ` [PATCH 1/3] From: Anoop Vijay <anoop.c.vijay@intel.com> Soham Purkait @ 2026-03-09 5:17 ` Soham Purkait 2026-03-09 5:17 ` [PATCH 3/3] drm/xe/xe_ras: Add RAS support for " Soham Purkait ` (4 subsequent siblings) 6 siblings, 0 replies; 10+ messages in thread From: Soham Purkait @ 2026-03-09 5:17 UTC (permalink / raw) To: intel-xe, riana.tauro, anshuman.gupta, aravind.iddamsetty, badal.nilawar, raag.jadav, ravi.kishore.koppuravuri, mallesh.koujalagi Cc: soham.purkait, anoop.c.vijay [-- Warning: decoded text below may be mangled, UTF-8 assumed --] [-- Attachment #1: Type: text/plain; charset=yes, Size: 3366 bytes --] Add the sysctrl commands and response structures for GPU health indicator supported by RAS. Signed-off-by: Soham Purkait <soham.purkait@intel.com> --- drivers/gpu/drm/xe/xe_ras_types.h | 65 +++++++++++++++++++ drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h | 15 +++++ 2 files changed, 80 insertions(+) create mode 100644 drivers/gpu/drm/xe/xe_ras_types.h diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h new file mode 100644 index 000000000000..a05cfd971acd --- /dev/null +++ b/drivers/gpu/drm/xe/xe_ras_types.h @@ -0,0 +1,65 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2026 Intel Corporation + */ + +#ifndef _XE_RAS_TYPES_H_ +#define _XE_RAS_TYPES_H_ + +#include <linux/types.h> + +/** + * typedef xe_ras_health_status_t - Device health status values (8-bit) + * + * Three-state health indicator value reported by system controller commands. + * + * The expected values are: + * - 0: ok - The device is healthy and operating within normal parameters. + * - 1: warning - The device is experiencing minor issues but is still operational. + * - 2: critical - The device is in a critical state and may not be operational. + */ +typedef u8 xe_ras_health_status_t; + +/** + * struct xe_ras_health_get_input - Input for XE_SYSCTRL_CMD_GET_HEALTH + */ +struct xe_ras_health_get_input { + /** @reserved: Reserved for future use, must be 0 */ + u32 reserved[2]; +} __packed; + +/** + * struct xe_ras_health_get_response - Response for XE_SYSCTRL_CMD_GET_HEALTH + */ +struct xe_ras_health_get_response { + /** @current_health: Current health status (OK/WARNING/CRITICAL) */ + xe_ras_health_status_t current_health; + /** @reserved: Reserved for alignment */ + u8 reserved[3]; +} __packed; + +/** + * struct xe_ras_health_set_input - Input for XE_SYSCTRL_CMD_SET_HEALTH + */ +struct xe_ras_health_set_input { + /** @new_health: New health status to set */ + xe_ras_health_status_t new_health; + /** @reserved: Reserved for alignment */ + u8 reserved[3]; +} __packed; + +/** + * struct xe_ras_health_set_response - Response for XE_SYSCTRL_CMD_SET_HEALTH + */ +struct xe_ras_health_set_response { + /** @operation_status: Status of set operation (RAS_STATUS_*) */ + u32 operation_status; + /** @current_health: Health status after this change */ + xe_ras_health_status_t current_health; + /** @reserved: Reserved for alignment */ + u8 reserved[3]; + /** @reserved_2: Reserved for future expansion */ + u32 reserved_2[2]; +} __packed; + +#endif /* _XE_RAS_TYPES_H_ */ diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h index 32c35a6da1cb..a4d6dd0aaff5 100644 --- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h +++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h @@ -10,6 +10,21 @@ #include "abi/xe_sysctrl_abi.h" +/** + * enum xe_sysctrl_mailbox_command_id - RAS Command ID's for GFSP group + * + * @XE_SYSCTRL_CMD_GET_HEALTH: Get current health status + * @XE_SYSCTRL_CMD_SET_HEALTH: Set new health status + */ +enum xe_sysctrl_mailbox_command_id { + XE_SYSCTRL_CMD_GET_HEALTH = 0x0B, + XE_SYSCTRL_CMD_SET_HEALTH = 0x0C +}; + +enum xe_sysctrl_group { + XE_SYSCTRL_GROUP_GFSP = 1 +}; + /** * struct xe_sysctrl_mailbox_command - System Controller mailbox command * @header: Application message header containing command information -- 2.43.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 3/3] drm/xe/xe_ras: Add RAS support for GPU health indicator 2026-03-09 5:17 [PATCH 0/3] drm/xe: Add support for GPU health indicator Soham Purkait 2026-03-09 5:17 ` [PATCH 1/3] From: Anoop Vijay <anoop.c.vijay@intel.com> Soham Purkait 2026-03-09 5:17 ` [PATCH 2/3] drm/xe/xe_ras: Add structures and commands for RAS GPU health indicator Soham Purkait @ 2026-03-09 5:17 ` Soham Purkait 2026-04-08 11:49 ` Nilawar, Badal 2026-03-09 5:28 ` ✗ CI.checkpatch: warning for drm/xe: Add " Patchwork ` (3 subsequent siblings) 6 siblings, 1 reply; 10+ messages in thread From: Soham Purkait @ 2026-03-09 5:17 UTC (permalink / raw) To: intel-xe, riana.tauro, anshuman.gupta, aravind.iddamsetty, badal.nilawar, raag.jadav, ravi.kishore.koppuravuri, mallesh.koujalagi Cc: soham.purkait, anoop.c.vijay [-- Warning: decoded text below may be mangled, UTF-8 assumed --] [-- Attachment #1: Type: text/plain; charset=yes, Size: 6550 bytes --] GPU health indicator exposes a single sysfs interface (gpu_health), placed in the device level that allows administrators and user-space tools to both query and modify the GPU health status. Signed-off-by: Soham Purkait <soham.purkait@intel.com> --- drivers/gpu/drm/xe/Makefile | 1 + drivers/gpu/drm/xe/xe_device.c | 3 + drivers/gpu/drm/xe/xe_ras.c | 166 +++++++++++++++++++++++++++++++++ drivers/gpu/drm/xe/xe_ras.h | 13 +++ 4 files changed, 183 insertions(+) create mode 100644 drivers/gpu/drm/xe/xe_ras.c create mode 100644 drivers/gpu/drm/xe/xe_ras.h diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile index 1890bbd1b28d..ee18638f73c3 100644 --- a/drivers/gpu/drm/xe/Makefile +++ b/drivers/gpu/drm/xe/Makefile @@ -110,6 +110,7 @@ xe-y += xe_bb.o \ xe_pxp_debugfs.o \ xe_pxp_submit.o \ xe_query.o \ + xe_ras.o \ xe_range_fence.o \ xe_reg_sr.o \ xe_reg_whitelist.o \ diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c index 1d61bb504e9b..2283a18e1034 100644 --- a/drivers/gpu/drm/xe/xe_device.c +++ b/drivers/gpu/drm/xe/xe_device.c @@ -60,6 +60,7 @@ #include "xe_psmi.h" #include "xe_pxp.h" #include "xe_query.h" +#include "xe_ras.h" #include "xe_shrinker.h" #include "xe_soc_remapper.h" #include "xe_survivability_mode.h" @@ -1009,6 +1010,8 @@ int xe_device_probe(struct xe_device *xe) xe_vsec_init(xe); + xe_ras_init(xe); + err = xe_sriov_init_late(xe); if (err) goto err_unregister_display; diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c new file mode 100644 index 000000000000..44324fe3273b --- /dev/null +++ b/drivers/gpu/drm/xe/xe_ras.c @@ -0,0 +1,166 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright © 2026 Intel Corporation + */ + +#include "xe_device.h" +#include "xe_device_types.h" +#include "xe_printk.h" +#include "xe_ras.h" +#include "xe_ras_types.h" +#include "xe_sysctrl_mailbox.h" +#include "xe_sysctrl_mailbox_types.h" + +static const char * const gpu_health_states[] = { "ok", "warning", "critical" }; +static const char * const gpu_health_fmt[] = { + "[%s] %s %s\n", + "%s [%s] %s\n", + "%s %s [%s]\n", +}; + +static void prepare_sysctrl_command(struct xe_sysctrl_mailbox_command *command, + u32 cmd_mask, void *request, size_t request_len, + void *response, size_t response_len) +{ + struct xe_sysctrl_app_msg_hdr hdr = {0}; + u32 req_hdr; + + req_hdr = FIELD_PREP(APP_HDR_GROUP_ID_MASK, XE_SYSCTRL_GROUP_GFSP) | + FIELD_PREP(APP_HDR_COMMAND_MASK, cmd_mask); + + hdr.data = req_hdr; + command->header = hdr; + command->data_in = request; + command->data_in_len = request_len; + command->data_out = response; + command->data_out_len = response_len; +} + +static ssize_t gpu_health_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct xe_device *xe = kdev_to_xe_device(dev); + struct xe_sysctrl_mailbox_command command = {0}; + struct xe_ras_health_get_response response = {0}; + struct xe_ras_health_get_input request = {0}; + u8 health; + int ret; + size_t rlen = 0; + + prepare_sysctrl_command(&command, XE_SYSCTRL_CMD_GET_HEALTH, &request, + sizeof(request), &response, sizeof(response)); + ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen); + if (ret) { + xe_err(xe, "[RAS]: Sysctrl error ret %d\n", ret); + return -EIO; + } + if (rlen != sizeof(response)) { + xe_err(xe, + "[RAS]: invalid Sysctrl response length %zu (expected %zu)\n", + rlen, sizeof(response)); + return -EIO; + } + if (response.current_health >= ARRAY_SIZE(gpu_health_states)) { + xe_err(xe, "[RAS]: invalid health state %u from Sysctrl\n", + response.current_health); + return -EIO; + } + + health = response.current_health; + + xe_dbg(xe, "[RAS]: %s state = %d (%s)\n", + __func__, health, gpu_health_states[health]); + + return sysfs_emit(buf, gpu_health_fmt[health], + gpu_health_states[0], + gpu_health_states[1], + gpu_health_states[2]); +} + +static ssize_t gpu_health_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + struct xe_device *xe = kdev_to_xe_device(dev); + struct xe_sysctrl_mailbox_command command = {0}; + struct xe_ras_health_set_input request = {0}; + struct xe_ras_health_set_response response = {0}; + u8 health; + int ret; + size_t rlen = 0; + int state; + + state = __sysfs_match_string(gpu_health_states, + ARRAY_SIZE(gpu_health_states), + buf); + if (state < 0) + return -EINVAL; + + request.new_health = (xe_ras_health_status_t)state; + + prepare_sysctrl_command(&command, XE_SYSCTRL_CMD_SET_HEALTH, &request, + sizeof(request), &response, sizeof(response)); + ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen); + if (ret) { + xe_err(xe, "[RAS]: Sysctrl error ret %d\n", ret); + return -EIO; + } + if (rlen != sizeof(response)) { + xe_err(xe, + "[RAS]: invalid Sysctrl response length %zu (expected %zu)\n", + rlen, sizeof(response)); + return -EIO; + } + if (response.current_health >= ARRAY_SIZE(gpu_health_states)) { + xe_err(xe, "[RAS]: invalid health state %u from Sysctrl\n", + response.current_health); + return -EIO; + } + + health = response.current_health; + + xe_dbg(xe, "[RAS]: %s state=%d (%s)\n", + __func__, health, gpu_health_states[health]); + + return count; +} + +static DEVICE_ATTR_ADMIN_RW(gpu_health); + +static void gpu_health_sysfs_fini(void *arg) +{ + struct device *dev = arg; + + device_remove_file(dev, &dev_attr_gpu_health); +} + +static void gpu_health_indicator_sysfs_init(struct xe_device *xe) +{ + struct device *dev = xe->drm.dev; + int err; + + err = device_create_file(dev, &dev_attr_gpu_health); + if (err) + goto err; + + err = devm_add_action_or_reset(dev, gpu_health_sysfs_fini, dev); + if (err) + goto err; + + return; + +err: + xe_err(xe, "[RAS]: failed to initialize GPU health sysfs, err=%d\n", err); +} + +/** + * xe_ras_init - Initialize Xe RAS + * @xe: xe device instance + * + * Initialize Xe RAS + */ +void xe_ras_init(struct xe_device *xe) +{ + if (!xe->info.has_sysctrl) + return; + + gpu_health_indicator_sysfs_init(xe); +} diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h new file mode 100644 index 000000000000..14cb973603e7 --- /dev/null +++ b/drivers/gpu/drm/xe/xe_ras.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2026 Intel Corporation + */ + +#ifndef _XE_RAS_H_ +#define _XE_RAS_H_ + +struct xe_device; + +void xe_ras_init(struct xe_device *xe); + +#endif -- 2.43.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH 3/3] drm/xe/xe_ras: Add RAS support for GPU health indicator 2026-03-09 5:17 ` [PATCH 3/3] drm/xe/xe_ras: Add RAS support for " Soham Purkait @ 2026-04-08 11:49 ` Nilawar, Badal 2026-04-14 11:16 ` Purkait, Soham 0 siblings, 1 reply; 10+ messages in thread From: Nilawar, Badal @ 2026-04-08 11:49 UTC (permalink / raw) To: Soham Purkait, intel-xe, riana.tauro, anshuman.gupta, aravind.iddamsetty, raag.jadav, ravi.kishore.koppuravuri, mallesh.koujalagi Cc: anoop.c.vijay On 09-03-2026 10:47, Soham Purkait wrote: > GPU health indicator exposes a single sysfs interface (gpu_health), > placed in the device level that allows administrators and user-space > tools to both query and modify the GPU health status. > > Signed-off-by: Soham Purkait <soham.purkait@intel.com> > --- > drivers/gpu/drm/xe/Makefile | 1 + > drivers/gpu/drm/xe/xe_device.c | 3 + > drivers/gpu/drm/xe/xe_ras.c | 166 +++++++++++++++++++++++++++++++++ > drivers/gpu/drm/xe/xe_ras.h | 13 +++ > 4 files changed, 183 insertions(+) > create mode 100644 drivers/gpu/drm/xe/xe_ras.c > create mode 100644 drivers/gpu/drm/xe/xe_ras.h > > diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile > index 1890bbd1b28d..ee18638f73c3 100644 > --- a/drivers/gpu/drm/xe/Makefile > +++ b/drivers/gpu/drm/xe/Makefile > @@ -110,6 +110,7 @@ xe-y += xe_bb.o \ > xe_pxp_debugfs.o \ > xe_pxp_submit.o \ > xe_query.o \ > + xe_ras.o \ > xe_range_fence.o \ > xe_reg_sr.o \ > xe_reg_whitelist.o \ > diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c > index 1d61bb504e9b..2283a18e1034 100644 > --- a/drivers/gpu/drm/xe/xe_device.c > +++ b/drivers/gpu/drm/xe/xe_device.c > @@ -60,6 +60,7 @@ > #include "xe_psmi.h" > #include "xe_pxp.h" > #include "xe_query.h" > +#include "xe_ras.h" > #include "xe_shrinker.h" > #include "xe_soc_remapper.h" > #include "xe_survivability_mode.h" > @@ -1009,6 +1010,8 @@ int xe_device_probe(struct xe_device *xe) > > xe_vsec_init(xe); > > + xe_ras_init(xe); > + > err = xe_sriov_init_late(xe); > if (err) > goto err_unregister_display; > diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c > new file mode 100644 > index 000000000000..44324fe3273b > --- /dev/null > +++ b/drivers/gpu/drm/xe/xe_ras.c > @@ -0,0 +1,166 @@ > +// SPDX-License-Identifier: MIT > +/* > + * Copyright © 2026 Intel Corporation > + */ > + > +#include "xe_device.h" > +#include "xe_device_types.h" > +#include "xe_printk.h" > +#include "xe_ras.h" > +#include "xe_ras_types.h" > +#include "xe_sysctrl_mailbox.h" > +#include "xe_sysctrl_mailbox_types.h" > + > +static const char * const gpu_health_states[] = { "ok", "warning", "critical" }; > +static const char * const gpu_health_fmt[] = { > + "[%s] %s %s\n", > + "%s [%s] %s\n", > + "%s %s [%s]\n", > +}; > + > +static void prepare_sysctrl_command(struct xe_sysctrl_mailbox_command *command, > + u32 cmd_mask, void *request, size_t request_len, > + void *response, size_t response_len) > +{ > + struct xe_sysctrl_app_msg_hdr hdr = {0}; > + u32 req_hdr; > + > + req_hdr = FIELD_PREP(APP_HDR_GROUP_ID_MASK, XE_SYSCTRL_GROUP_GFSP) | > + FIELD_PREP(APP_HDR_COMMAND_MASK, cmd_mask); > + > + hdr.data = req_hdr; > + command->header = hdr; > + command->data_in = request; > + command->data_in_len = request_len; > + command->data_out = response; > + command->data_out_len = response_len; > +} > + > +static ssize_t gpu_health_show(struct device *dev, struct device_attribute *attr, char *buf) > +{ > + struct xe_device *xe = kdev_to_xe_device(dev); > + struct xe_sysctrl_mailbox_command command = {0}; > + struct xe_ras_health_get_response response = {0}; > + struct xe_ras_health_get_input request = {0}; > + u8 health; > + int ret; > + size_t rlen = 0; > + > + prepare_sysctrl_command(&command, XE_SYSCTRL_CMD_GET_HEALTH, &request, > + sizeof(request), &response, sizeof(response)); > + ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen); > + if (ret) { > + xe_err(xe, "[RAS]: Sysctrl error ret %d\n", ret); > + return -EIO; > + } > + if (rlen != sizeof(response)) { > + xe_err(xe, > + "[RAS]: invalid Sysctrl response length %zu (expected %zu)\n", > + rlen, sizeof(response)); > + return -EIO; > + } > + if (response.current_health >= ARRAY_SIZE(gpu_health_states)) { > + xe_err(xe, "[RAS]: invalid health state %u from Sysctrl\n", > + response.current_health); > + return -EIO; > + } > + > + health = response.current_health; > + > + xe_dbg(xe, "[RAS]: %s state = %d (%s)\n", > + __func__, health, gpu_health_states[health]); > + > + return sysfs_emit(buf, gpu_health_fmt[health], > + gpu_health_states[0], > + gpu_health_states[1], > + gpu_health_states[2]); > +} > + > +static ssize_t gpu_health_store(struct device *dev, struct device_attribute *attr, > + const char *buf, size_t count) > +{ > + struct xe_device *xe = kdev_to_xe_device(dev); > + struct xe_sysctrl_mailbox_command command = {0}; > + struct xe_ras_health_set_input request = {0}; > + struct xe_ras_health_set_response response = {0}; > + u8 health; > + int ret; > + size_t rlen = 0; > + int state; > + > + state = __sysfs_match_string(gpu_health_states, > + ARRAY_SIZE(gpu_health_states), > + buf); > + if (state < 0) > + return -EINVAL; > + > + request.new_health = (xe_ras_health_status_t)state; > + > + prepare_sysctrl_command(&command, XE_SYSCTRL_CMD_SET_HEALTH, &request, > + sizeof(request), &response, sizeof(response)); > + ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen); > + if (ret) { > + xe_err(xe, "[RAS]: Sysctrl error ret %d\n", ret); > + return -EIO; > + } > + if (rlen != sizeof(response)) { > + xe_err(xe, > + "[RAS]: invalid Sysctrl response length %zu (expected %zu)\n", > + rlen, sizeof(response)); > + return -EIO; > + } > + if (response.current_health >= ARRAY_SIZE(gpu_health_states)) { > + xe_err(xe, "[RAS]: invalid health state %u from Sysctrl\n", > + response.current_health); > + return -EIO; > + } > + > + health = response.current_health; > + > + xe_dbg(xe, "[RAS]: %s state=%d (%s)\n", > + __func__, health, gpu_health_states[health]); > + > + return count; > +} The function sets the health status, but its purpose is unclear to me. What happens if the health status is set to critical? How does the device behave in that case, and why and under what scenario would a user need to set this status? Thanks, Badal > + > +static DEVICE_ATTR_ADMIN_RW(gpu_health); > + > +static void gpu_health_sysfs_fini(void *arg) > +{ > + struct device *dev = arg; > + > + device_remove_file(dev, &dev_attr_gpu_health); > +} > + > +static void gpu_health_indicator_sysfs_init(struct xe_device *xe) > +{ > + struct device *dev = xe->drm.dev; > + int err; > + > + err = device_create_file(dev, &dev_attr_gpu_health); > + if (err) > + goto err; > + > + err = devm_add_action_or_reset(dev, gpu_health_sysfs_fini, dev); > + if (err) > + goto err; > + > + return; > + > +err: > + xe_err(xe, "[RAS]: failed to initialize GPU health sysfs, err=%d\n", err); > +} > + > +/** > + * xe_ras_init - Initialize Xe RAS > + * @xe: xe device instance > + * > + * Initialize Xe RAS > + */ > +void xe_ras_init(struct xe_device *xe) > +{ > + if (!xe->info.has_sysctrl) > + return; > + > + gpu_health_indicator_sysfs_init(xe); > +} > diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h > new file mode 100644 > index 000000000000..14cb973603e7 > --- /dev/null > +++ b/drivers/gpu/drm/xe/xe_ras.h > @@ -0,0 +1,13 @@ > +/* SPDX-License-Identifier: MIT */ > +/* > + * Copyright © 2026 Intel Corporation > + */ > + > +#ifndef _XE_RAS_H_ > +#define _XE_RAS_H_ > + > +struct xe_device; > + > +void xe_ras_init(struct xe_device *xe); > + > +#endif ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 3/3] drm/xe/xe_ras: Add RAS support for GPU health indicator 2026-04-08 11:49 ` Nilawar, Badal @ 2026-04-14 11:16 ` Purkait, Soham 0 siblings, 0 replies; 10+ messages in thread From: Purkait, Soham @ 2026-04-14 11:16 UTC (permalink / raw) To: Nilawar, Badal, intel-xe, riana.tauro, anshuman.gupta, aravind.iddamsetty, raag.jadav, ravi.kishore.koppuravuri, mallesh.koujalagi Cc: anoop.c.vijay Hi Badal, On 08-04-2026 17:19, Nilawar, Badal wrote: > > On 09-03-2026 10:47, Soham Purkait wrote: >> GPU health indicator exposes a single sysfs interface (gpu_health), >> placed in the device level that allows administrators and user-space >> tools to both query and modify the GPU health status. >> >> Signed-off-by: Soham Purkait <soham.purkait@intel.com> >> --- >> drivers/gpu/drm/xe/Makefile | 1 + >> drivers/gpu/drm/xe/xe_device.c | 3 + >> drivers/gpu/drm/xe/xe_ras.c | 166 +++++++++++++++++++++++++++++++++ >> drivers/gpu/drm/xe/xe_ras.h | 13 +++ >> 4 files changed, 183 insertions(+) >> create mode 100644 drivers/gpu/drm/xe/xe_ras.c >> create mode 100644 drivers/gpu/drm/xe/xe_ras.h >> >> diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile >> index 1890bbd1b28d..ee18638f73c3 100644 >> --- a/drivers/gpu/drm/xe/Makefile >> +++ b/drivers/gpu/drm/xe/Makefile >> @@ -110,6 +110,7 @@ xe-y += xe_bb.o \ >> xe_pxp_debugfs.o \ >> xe_pxp_submit.o \ >> xe_query.o \ >> + xe_ras.o \ >> xe_range_fence.o \ >> xe_reg_sr.o \ >> xe_reg_whitelist.o \ >> diff --git a/drivers/gpu/drm/xe/xe_device.c >> b/drivers/gpu/drm/xe/xe_device.c >> index 1d61bb504e9b..2283a18e1034 100644 >> --- a/drivers/gpu/drm/xe/xe_device.c >> +++ b/drivers/gpu/drm/xe/xe_device.c >> @@ -60,6 +60,7 @@ >> #include "xe_psmi.h" >> #include "xe_pxp.h" >> #include "xe_query.h" >> +#include "xe_ras.h" >> #include "xe_shrinker.h" >> #include "xe_soc_remapper.h" >> #include "xe_survivability_mode.h" >> @@ -1009,6 +1010,8 @@ int xe_device_probe(struct xe_device *xe) >> xe_vsec_init(xe); >> + xe_ras_init(xe); >> + >> err = xe_sriov_init_late(xe); >> if (err) >> goto err_unregister_display; >> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c >> new file mode 100644 >> index 000000000000..44324fe3273b >> --- /dev/null >> +++ b/drivers/gpu/drm/xe/xe_ras.c >> @@ -0,0 +1,166 @@ >> +// SPDX-License-Identifier: MIT >> +/* >> + * Copyright © 2026 Intel Corporation >> + */ >> + >> +#include "xe_device.h" >> +#include "xe_device_types.h" >> +#include "xe_printk.h" >> +#include "xe_ras.h" >> +#include "xe_ras_types.h" >> +#include "xe_sysctrl_mailbox.h" >> +#include "xe_sysctrl_mailbox_types.h" >> + >> +static const char * const gpu_health_states[] = { "ok", "warning", >> "critical" }; >> +static const char * const gpu_health_fmt[] = { >> + "[%s] %s %s\n", >> + "%s [%s] %s\n", >> + "%s %s [%s]\n", >> +}; >> + >> +static void prepare_sysctrl_command(struct >> xe_sysctrl_mailbox_command *command, >> + u32 cmd_mask, void *request, size_t request_len, >> + void *response, size_t response_len) >> +{ >> + struct xe_sysctrl_app_msg_hdr hdr = {0}; >> + u32 req_hdr; >> + >> + req_hdr = FIELD_PREP(APP_HDR_GROUP_ID_MASK, >> XE_SYSCTRL_GROUP_GFSP) | >> + FIELD_PREP(APP_HDR_COMMAND_MASK, cmd_mask); >> + >> + hdr.data = req_hdr; >> + command->header = hdr; >> + command->data_in = request; >> + command->data_in_len = request_len; >> + command->data_out = response; >> + command->data_out_len = response_len; >> +} >> + >> +static ssize_t gpu_health_show(struct device *dev, struct >> device_attribute *attr, char *buf) >> +{ >> + struct xe_device *xe = kdev_to_xe_device(dev); >> + struct xe_sysctrl_mailbox_command command = {0}; >> + struct xe_ras_health_get_response response = {0}; >> + struct xe_ras_health_get_input request = {0}; >> + u8 health; >> + int ret; >> + size_t rlen = 0; >> + >> + prepare_sysctrl_command(&command, XE_SYSCTRL_CMD_GET_HEALTH, >> &request, >> + sizeof(request), &response, sizeof(response)); >> + ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen); >> + if (ret) { >> + xe_err(xe, "[RAS]: Sysctrl error ret %d\n", ret); >> + return -EIO; >> + } >> + if (rlen != sizeof(response)) { >> + xe_err(xe, >> + "[RAS]: invalid Sysctrl response length %zu (expected >> %zu)\n", >> + rlen, sizeof(response)); >> + return -EIO; >> + } >> + if (response.current_health >= ARRAY_SIZE(gpu_health_states)) { >> + xe_err(xe, "[RAS]: invalid health state %u from Sysctrl\n", >> + response.current_health); >> + return -EIO; >> + } >> + >> + health = response.current_health; >> + >> + xe_dbg(xe, "[RAS]: %s state = %d (%s)\n", >> + __func__, health, gpu_health_states[health]); >> + >> + return sysfs_emit(buf, gpu_health_fmt[health], >> + gpu_health_states[0], >> + gpu_health_states[1], >> + gpu_health_states[2]); >> +} >> + >> +static ssize_t gpu_health_store(struct device *dev, struct >> device_attribute *attr, >> + const char *buf, size_t count) >> +{ >> + struct xe_device *xe = kdev_to_xe_device(dev); >> + struct xe_sysctrl_mailbox_command command = {0}; >> + struct xe_ras_health_set_input request = {0}; >> + struct xe_ras_health_set_response response = {0}; >> + u8 health; >> + int ret; >> + size_t rlen = 0; >> + int state; >> + >> + state = __sysfs_match_string(gpu_health_states, >> + ARRAY_SIZE(gpu_health_states), >> + buf); >> + if (state < 0) >> + return -EINVAL; >> + >> + request.new_health = (xe_ras_health_status_t)state; >> + >> + prepare_sysctrl_command(&command, XE_SYSCTRL_CMD_SET_HEALTH, >> &request, >> + sizeof(request), &response, sizeof(response)); >> + ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen); >> + if (ret) { >> + xe_err(xe, "[RAS]: Sysctrl error ret %d\n", ret); >> + return -EIO; >> + } >> + if (rlen != sizeof(response)) { >> + xe_err(xe, >> + "[RAS]: invalid Sysctrl response length %zu (expected >> %zu)\n", >> + rlen, sizeof(response)); >> + return -EIO; >> + } >> + if (response.current_health >= ARRAY_SIZE(gpu_health_states)) { >> + xe_err(xe, "[RAS]: invalid health state %u from Sysctrl\n", >> + response.current_health); >> + return -EIO; >> + } >> + >> + health = response.current_health; >> + >> + xe_dbg(xe, "[RAS]: %s state=%d (%s)\n", >> + __func__, health, gpu_health_states[health]); >> + >> + return count; >> +} > > The function sets the health status, but its purpose is unclear to me. > What happens if the health status is set to critical? How does the > device behave in that case, and why and under what scenario would a > user need to set this status? Setting the health status to "critical" is a way for the system (or an admin) to flag that the device has a serious issue and shouldn't be used for new workloads. When in this state, management tools and orchestration software will typically stop scheduling work on the device and alert operators for investigation. This status is set when hardware faults, persistent errors, or other critical problems are detected, or if an admin wants to proactively take the device out of service for maintenance or troubleshooting. Thanks, Soham > > Thanks, > Badal > >> + >> +static DEVICE_ATTR_ADMIN_RW(gpu_health); >> + >> +static void gpu_health_sysfs_fini(void *arg) >> +{ >> + struct device *dev = arg; >> + >> + device_remove_file(dev, &dev_attr_gpu_health); >> +} >> + >> +static void gpu_health_indicator_sysfs_init(struct xe_device *xe) >> +{ >> + struct device *dev = xe->drm.dev; >> + int err; >> + >> + err = device_create_file(dev, &dev_attr_gpu_health); >> + if (err) >> + goto err; >> + >> + err = devm_add_action_or_reset(dev, gpu_health_sysfs_fini, dev); >> + if (err) >> + goto err; >> + >> + return; >> + >> +err: >> + xe_err(xe, "[RAS]: failed to initialize GPU health sysfs, >> err=%d\n", err); >> +} >> + >> +/** >> + * xe_ras_init - Initialize Xe RAS >> + * @xe: xe device instance >> + * >> + * Initialize Xe RAS >> + */ >> +void xe_ras_init(struct xe_device *xe) >> +{ >> + if (!xe->info.has_sysctrl) >> + return; >> + >> + gpu_health_indicator_sysfs_init(xe); >> +} >> diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h >> new file mode 100644 >> index 000000000000..14cb973603e7 >> --- /dev/null >> +++ b/drivers/gpu/drm/xe/xe_ras.h >> @@ -0,0 +1,13 @@ >> +/* SPDX-License-Identifier: MIT */ >> +/* >> + * Copyright © 2026 Intel Corporation >> + */ >> + >> +#ifndef _XE_RAS_H_ >> +#define _XE_RAS_H_ >> + >> +struct xe_device; >> + >> +void xe_ras_init(struct xe_device *xe); >> + >> +#endif ^ permalink raw reply [flat|nested] 10+ messages in thread
* ✗ CI.checkpatch: warning for drm/xe: Add support for GPU health indicator 2026-03-09 5:17 [PATCH 0/3] drm/xe: Add support for GPU health indicator Soham Purkait ` (2 preceding siblings ...) 2026-03-09 5:17 ` [PATCH 3/3] drm/xe/xe_ras: Add RAS support for " Soham Purkait @ 2026-03-09 5:28 ` Patchwork 2026-03-09 5:30 ` ✓ CI.KUnit: success " Patchwork ` (2 subsequent siblings) 6 siblings, 0 replies; 10+ messages in thread From: Patchwork @ 2026-03-09 5:28 UTC (permalink / raw) To: Soham Purkait; +Cc: intel-xe == Series Details == Series: drm/xe: Add support for GPU health indicator URL : https://patchwork.freedesktop.org/series/162833/ State : warning == Summary == + KERNEL=/kernel + git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt Cloning into 'mt'... warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/ + git -C mt rev-list -n1 origin/master 1f57ba1afceae32108bd24770069f764d940a0e4 + cd /kernel + git config --global --add safe.directory /kernel + git log -n1 commit 85b1d770b5fefe6560e9ce13faf15880a8b9543b Author: Soham Purkait <soham.purkait@intel.com> Date: Mon Mar 9 10:47:05 2026 +0530 drm/xe/xe_ras: Add RAS support for GPU health indicator GPU health indicator exposes a single sysfs interface (gpu_health), placed in the device level that allows administrators and user-space tools to both query and modify the GPU health status. Signed-off-by: Soham Purkait <soham.purkait@intel.com> + /mt/dim checkpatch 6884fe03ff2bc5a2f501ba4710f950dd4933ac84 drm-intel a93b57538eb4 From: Anoop Vijay <anoop.c.vijay@intel.com> -:26: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #26: new file mode 100644 -:792: ERROR:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Anoop Vijay <anoop.c.vijay@intel.com>' total: 1 errors, 1 warnings, 0 checks, 704 lines checked ed6e45e0f24d drm/xe/xe_ras: Add structures and commands for RAS GPU health indicator -:13: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #13: new file mode 100644 total: 0 errors, 1 warnings, 0 checks, 86 lines checked 85b1d770b5fe drm/xe/xe_ras: Add RAS support for GPU health indicator -:46: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #46: new file mode 100644 total: 0 errors, 1 warnings, 0 checks, 201 lines checked ^ permalink raw reply [flat|nested] 10+ messages in thread
* ✓ CI.KUnit: success for drm/xe: Add support for GPU health indicator 2026-03-09 5:17 [PATCH 0/3] drm/xe: Add support for GPU health indicator Soham Purkait ` (3 preceding siblings ...) 2026-03-09 5:28 ` ✗ CI.checkpatch: warning for drm/xe: Add " Patchwork @ 2026-03-09 5:30 ` Patchwork 2026-03-09 6:36 ` ✓ Xe.CI.BAT: " Patchwork 2026-03-09 8:31 ` ✗ Xe.CI.FULL: failure " Patchwork 6 siblings, 0 replies; 10+ messages in thread From: Patchwork @ 2026-03-09 5:30 UTC (permalink / raw) To: Soham Purkait; +Cc: intel-xe == Series Details == Series: drm/xe: Add support for GPU health indicator URL : https://patchwork.freedesktop.org/series/162833/ State : success == Summary == + trap cleanup EXIT + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig [05:28:55] Configuring KUnit Kernel ... Generating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [05:28:59] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [05:29:29] Starting KUnit Kernel (1/1)... [05:29:29] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [05:29:30] ================== guc_buf (11 subtests) =================== [05:29:30] [PASSED] test_smallest [05:29:30] [PASSED] test_largest [05:29:30] [PASSED] test_granular [05:29:30] [PASSED] test_unique [05:29:30] [PASSED] test_overlap [05:29:30] [PASSED] test_reusable [05:29:30] [PASSED] test_too_big [05:29:30] [PASSED] test_flush [05:29:30] [PASSED] test_lookup [05:29:30] [PASSED] test_data [05:29:30] [PASSED] test_class [05:29:30] ===================== [PASSED] guc_buf ===================== [05:29:30] =================== guc_dbm (7 subtests) =================== [05:29:30] [PASSED] test_empty [05:29:30] [PASSED] test_default [05:29:30] ======================== test_size ======================== [05:29:30] [PASSED] 4 [05:29:30] [PASSED] 8 [05:29:30] [PASSED] 32 [05:29:30] [PASSED] 256 [05:29:30] ==================== [PASSED] test_size ==================== [05:29:30] ======================= test_reuse ======================== [05:29:30] [PASSED] 4 [05:29:30] [PASSED] 8 [05:29:30] [PASSED] 32 [05:29:30] [PASSED] 256 [05:29:30] =================== [PASSED] test_reuse ==================== [05:29:30] =================== test_range_overlap ==================== [05:29:30] [PASSED] 4 [05:29:30] [PASSED] 8 [05:29:30] [PASSED] 32 [05:29:30] [PASSED] 256 [05:29:30] =============== [PASSED] test_range_overlap ================ [05:29:30] =================== test_range_compact ==================== [05:29:30] [PASSED] 4 [05:29:30] [PASSED] 8 [05:29:30] [PASSED] 32 [05:29:30] [PASSED] 256 [05:29:30] =============== [PASSED] test_range_compact ================ [05:29:30] ==================== test_range_spare ===================== [05:29:30] [PASSED] 4 [05:29:30] [PASSED] 8 [05:29:30] [PASSED] 32 [05:29:30] [PASSED] 256 [05:29:30] ================ [PASSED] test_range_spare ================= [05:29:30] ===================== [PASSED] guc_dbm ===================== [05:29:30] =================== guc_idm (6 subtests) =================== [05:29:30] [PASSED] bad_init [05:29:30] [PASSED] no_init [05:29:30] [PASSED] init_fini [05:29:30] [PASSED] check_used [05:29:30] [PASSED] check_quota [05:29:30] [PASSED] check_all [05:29:30] ===================== [PASSED] guc_idm ===================== [05:29:30] ================== no_relay (3 subtests) =================== [05:29:30] [PASSED] xe_drops_guc2pf_if_not_ready [05:29:30] [PASSED] xe_drops_guc2vf_if_not_ready [05:29:30] [PASSED] xe_rejects_send_if_not_ready [05:29:30] ==================== [PASSED] no_relay ===================== [05:29:30] ================== pf_relay (14 subtests) ================== [05:29:30] [PASSED] pf_rejects_guc2pf_too_short [05:29:30] [PASSED] pf_rejects_guc2pf_too_long [05:29:30] [PASSED] pf_rejects_guc2pf_no_payload [05:29:30] [PASSED] pf_fails_no_payload [05:29:30] [PASSED] pf_fails_bad_origin [05:29:30] [PASSED] pf_fails_bad_type [05:29:30] [PASSED] pf_txn_reports_error [05:29:30] [PASSED] pf_txn_sends_pf2guc [05:29:30] [PASSED] pf_sends_pf2guc [05:29:30] [SKIPPED] pf_loopback_nop [05:29:30] [SKIPPED] pf_loopback_echo [05:29:30] [SKIPPED] pf_loopback_fail [05:29:30] [SKIPPED] pf_loopback_busy [05:29:30] [SKIPPED] pf_loopback_retry [05:29:30] ==================== [PASSED] pf_relay ===================== [05:29:30] ================== vf_relay (3 subtests) =================== [05:29:30] [PASSED] vf_rejects_guc2vf_too_short [05:29:30] [PASSED] vf_rejects_guc2vf_too_long [05:29:30] [PASSED] vf_rejects_guc2vf_no_payload [05:29:30] ==================== [PASSED] vf_relay ===================== [05:29:30] ================ pf_gt_config (9 subtests) ================= [05:29:30] [PASSED] fair_contexts_1vf [05:29:30] [PASSED] fair_doorbells_1vf [05:29:30] [PASSED] fair_ggtt_1vf [05:29:30] ====================== fair_vram_1vf ====================== [05:29:30] [PASSED] 3.50 GiB [05:29:30] [PASSED] 11.5 GiB [05:29:30] [PASSED] 15.5 GiB [05:29:30] [PASSED] 31.5 GiB [05:29:30] [PASSED] 63.5 GiB [05:29:30] [PASSED] 1.91 GiB [05:29:30] ================== [PASSED] fair_vram_1vf ================== [05:29:30] ================ fair_vram_1vf_admin_only ================= [05:29:30] [PASSED] 3.50 GiB [05:29:30] [PASSED] 11.5 GiB [05:29:30] [PASSED] 15.5 GiB [05:29:30] [PASSED] 31.5 GiB [05:29:30] [PASSED] 63.5 GiB [05:29:30] [PASSED] 1.91 GiB [05:29:30] ============ [PASSED] fair_vram_1vf_admin_only ============= [05:29:30] ====================== fair_contexts ====================== [05:29:30] [PASSED] 1 VF [05:29:30] [PASSED] 2 VFs [05:29:30] [PASSED] 3 VFs [05:29:30] [PASSED] 4 VFs [05:29:30] [PASSED] 5 VFs [05:29:30] [PASSED] 6 VFs [05:29:30] [PASSED] 7 VFs [05:29:30] [PASSED] 8 VFs [05:29:30] [PASSED] 9 VFs [05:29:30] [PASSED] 10 VFs [05:29:30] [PASSED] 11 VFs [05:29:30] [PASSED] 12 VFs [05:29:30] [PASSED] 13 VFs [05:29:30] [PASSED] 14 VFs [05:29:30] [PASSED] 15 VFs [05:29:30] [PASSED] 16 VFs [05:29:30] [PASSED] 17 VFs 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[05:29:30] [PASSED] 61 VFs [05:29:30] [PASSED] 62 VFs [05:29:30] [PASSED] 63 VFs [05:29:30] ================= [PASSED] fair_doorbells ================== [05:29:30] ======================== fair_ggtt ======================== [05:29:30] [PASSED] 1 VF [05:29:30] [PASSED] 2 VFs [05:29:30] [PASSED] 3 VFs [05:29:30] [PASSED] 4 VFs [05:29:30] [PASSED] 5 VFs [05:29:30] [PASSED] 6 VFs [05:29:30] [PASSED] 7 VFs [05:29:30] [PASSED] 8 VFs [05:29:30] [PASSED] 9 VFs [05:29:30] [PASSED] 10 VFs [05:29:30] [PASSED] 11 VFs [05:29:30] [PASSED] 12 VFs [05:29:30] [PASSED] 13 VFs [05:29:30] [PASSED] 14 VFs [05:29:30] [PASSED] 15 VFs [05:29:30] [PASSED] 16 VFs [05:29:30] [PASSED] 17 VFs [05:29:30] [PASSED] 18 VFs [05:29:30] [PASSED] 19 VFs [05:29:30] [PASSED] 20 VFs [05:29:30] [PASSED] 21 VFs [05:29:30] [PASSED] 22 VFs [05:29:30] [PASSED] 23 VFs [05:29:30] [PASSED] 24 VFs [05:29:30] [PASSED] 25 VFs [05:29:30] [PASSED] 26 VFs [05:29:30] [PASSED] 27 VFs [05:29:30] [PASSED] 28 VFs [05:29:30] [PASSED] 29 VFs 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======================== fair_vram ======================== [05:29:30] [PASSED] 1 VF [05:29:30] [PASSED] 2 VFs [05:29:30] [PASSED] 3 VFs [05:29:30] [PASSED] 4 VFs [05:29:30] [PASSED] 5 VFs [05:29:30] [PASSED] 6 VFs [05:29:30] [PASSED] 7 VFs [05:29:30] [PASSED] 8 VFs [05:29:30] [PASSED] 9 VFs [05:29:30] [PASSED] 10 VFs [05:29:30] [PASSED] 11 VFs [05:29:30] [PASSED] 12 VFs [05:29:30] [PASSED] 13 VFs [05:29:30] [PASSED] 14 VFs [05:29:30] [PASSED] 15 VFs [05:29:30] [PASSED] 16 VFs [05:29:30] [PASSED] 17 VFs [05:29:30] [PASSED] 18 VFs [05:29:30] [PASSED] 19 VFs [05:29:30] [PASSED] 20 VFs [05:29:30] [PASSED] 21 VFs [05:29:30] [PASSED] 22 VFs [05:29:30] [PASSED] 23 VFs [05:29:30] [PASSED] 24 VFs [05:29:30] [PASSED] 25 VFs [05:29:30] [PASSED] 26 VFs [05:29:30] [PASSED] 27 VFs [05:29:30] [PASSED] 28 VFs [05:29:30] [PASSED] 29 VFs [05:29:30] [PASSED] 30 VFs [05:29:30] [PASSED] 31 VFs [05:29:30] [PASSED] 32 VFs [05:29:30] [PASSED] 33 VFs [05:29:30] [PASSED] 34 VFs [05:29:30] [PASSED] 35 VFs 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======================== test_ops ========================= [05:29:30] [PASSED] 2-level [05:29:30] [PASSED] multi-level [05:29:30] ==================== [PASSED] test_ops ===================== [05:29:30] ====================== [PASSED] lmtt ======================= [05:29:30] ================= pf_service (11 subtests) ================= [05:29:30] [PASSED] pf_negotiate_any [05:29:30] [PASSED] pf_negotiate_base_match [05:29:30] [PASSED] pf_negotiate_base_newer [05:29:30] [PASSED] pf_negotiate_base_next [05:29:30] [SKIPPED] pf_negotiate_base_older [05:29:30] [PASSED] pf_negotiate_base_prev [05:29:30] [PASSED] pf_negotiate_latest_match [05:29:30] [PASSED] pf_negotiate_latest_newer [05:29:30] [PASSED] pf_negotiate_latest_next [05:29:30] [SKIPPED] pf_negotiate_latest_older [05:29:30] [SKIPPED] pf_negotiate_latest_prev [05:29:30] =================== [PASSED] pf_service ==================== [05:29:30] ================= xe_guc_g2g (2 subtests) ================== [05:29:30] ============== xe_live_guc_g2g_kunit_default ============== [05:29:30] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ========== [05:29:30] ============== xe_live_guc_g2g_kunit_allmem =============== [05:29:30] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ========== [05:29:30] =================== [SKIPPED] xe_guc_g2g =================== [05:29:30] =================== xe_mocs (2 subtests) =================== [05:29:30] ================ xe_live_mocs_kernel_kunit ================ [05:29:30] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============ [05:29:30] ================ xe_live_mocs_reset_kunit ================= [05:29:30] ============ [SKIPPED] xe_live_mocs_reset_kunit ============ [05:29:30] ==================== [SKIPPED] xe_mocs ===================== [05:29:30] ================= xe_migrate (2 subtests) ================== [05:29:30] ================= xe_migrate_sanity_kunit ================= [05:29:30] ============ [SKIPPED] xe_migrate_sanity_kunit ============= [05:29:30] ================== xe_validate_ccs_kunit ================== [05:29:30] ============= [SKIPPED] xe_validate_ccs_kunit ============== [05:29:30] =================== [SKIPPED] xe_migrate =================== [05:29:30] ================== xe_dma_buf (1 subtest) ================== [05:29:30] ==================== xe_dma_buf_kunit ===================== [05:29:30] ================ [SKIPPED] xe_dma_buf_kunit ================ [05:29:30] =================== [SKIPPED] xe_dma_buf =================== [05:29:30] ================= xe_bo_shrink (1 subtest) ================= [05:29:30] =================== xe_bo_shrink_kunit ==================== [05:29:30] =============== [SKIPPED] xe_bo_shrink_kunit =============== [05:29:30] ================== [SKIPPED] xe_bo_shrink ================== [05:29:30] ==================== xe_bo (2 subtests) ==================== [05:29:30] ================== xe_ccs_migrate_kunit =================== [05:29:30] ============== [SKIPPED] xe_ccs_migrate_kunit ============== [05:29:30] ==================== xe_bo_evict_kunit ==================== [05:29:30] =============== [SKIPPED] xe_bo_evict_kunit ================ [05:29:30] ===================== [SKIPPED] xe_bo ====================== [05:29:30] ==================== args (13 subtests) ==================== [05:29:30] [PASSED] count_args_test [05:29:30] [PASSED] call_args_example [05:29:30] [PASSED] call_args_test [05:29:30] [PASSED] drop_first_arg_example [05:29:30] [PASSED] drop_first_arg_test [05:29:30] [PASSED] first_arg_example [05:29:30] [PASSED] first_arg_test [05:29:30] [PASSED] last_arg_example [05:29:30] [PASSED] last_arg_test [05:29:30] [PASSED] pick_arg_example [05:29:30] [PASSED] if_args_example [05:29:30] [PASSED] if_args_test [05:29:30] [PASSED] sep_comma_example [05:29:30] ====================== [PASSED] args ======================= [05:29:30] =================== xe_pci (3 subtests) ==================== [05:29:30] ==================== check_graphics_ip ==================== [05:29:30] [PASSED] 12.00 Xe_LP [05:29:30] [PASSED] 12.10 Xe_LP+ [05:29:30] [PASSED] 12.55 Xe_HPG [05:29:30] [PASSED] 12.60 Xe_HPC [05:29:30] [PASSED] 12.70 Xe_LPG [05:29:30] [PASSED] 12.71 Xe_LPG [05:29:30] [PASSED] 12.74 Xe_LPG+ [05:29:30] [PASSED] 20.01 Xe2_HPG [05:29:30] [PASSED] 20.02 Xe2_HPG [05:29:30] [PASSED] 20.04 Xe2_LPG [05:29:30] [PASSED] 30.00 Xe3_LPG [05:29:30] [PASSED] 30.01 Xe3_LPG [05:29:30] [PASSED] 30.03 Xe3_LPG [05:29:30] [PASSED] 30.04 Xe3_LPG [05:29:30] [PASSED] 30.05 Xe3_LPG [05:29:30] [PASSED] 35.10 Xe3p_LPG [05:29:30] [PASSED] 35.11 Xe3p_XPC [05:29:30] ================ [PASSED] check_graphics_ip ================ [05:29:30] ===================== check_media_ip ====================== [05:29:30] [PASSED] 12.00 Xe_M [05:29:30] [PASSED] 12.55 Xe_HPM [05:29:30] [PASSED] 13.00 Xe_LPM+ [05:29:30] [PASSED] 13.01 Xe2_HPM [05:29:30] [PASSED] 20.00 Xe2_LPM [05:29:30] [PASSED] 30.00 Xe3_LPM [05:29:30] [PASSED] 30.02 Xe3_LPM [05:29:30] [PASSED] 35.00 Xe3p_LPM [05:29:30] [PASSED] 35.03 Xe3p_HPM [05:29:30] ================= [PASSED] check_media_ip ================== [05:29:30] =================== check_platform_desc =================== [05:29:30] [PASSED] 0x9A60 (TIGERLAKE) [05:29:30] [PASSED] 0x9A68 (TIGERLAKE) [05:29:30] [PASSED] 0x9A70 (TIGERLAKE) [05:29:30] [PASSED] 0x9A40 (TIGERLAKE) [05:29:30] [PASSED] 0x9A49 (TIGERLAKE) [05:29:30] [PASSED] 0x9A59 (TIGERLAKE) [05:29:30] [PASSED] 0x9A78 (TIGERLAKE) [05:29:30] [PASSED] 0x9AC0 (TIGERLAKE) [05:29:30] [PASSED] 0x9AC9 (TIGERLAKE) [05:29:30] [PASSED] 0x9AD9 (TIGERLAKE) [05:29:30] [PASSED] 0x9AF8 (TIGERLAKE) [05:29:30] [PASSED] 0x4C80 (ROCKETLAKE) [05:29:30] [PASSED] 0x4C8A (ROCKETLAKE) [05:29:30] [PASSED] 0x4C8B (ROCKETLAKE) [05:29:30] [PASSED] 0x4C8C (ROCKETLAKE) [05:29:30] [PASSED] 0x4C90 (ROCKETLAKE) [05:29:30] [PASSED] 0x4C9A (ROCKETLAKE) [05:29:30] [PASSED] 0x4680 (ALDERLAKE_S) [05:29:30] [PASSED] 0x4682 (ALDERLAKE_S) [05:29:30] [PASSED] 0x4688 (ALDERLAKE_S) [05:29:30] [PASSED] 0x468A (ALDERLAKE_S) [05:29:30] [PASSED] 0x468B (ALDERLAKE_S) [05:29:30] [PASSED] 0x4690 (ALDERLAKE_S) [05:29:30] [PASSED] 0x4692 (ALDERLAKE_S) [05:29:30] [PASSED] 0x4693 (ALDERLAKE_S) [05:29:30] [PASSED] 0x46A0 (ALDERLAKE_P) [05:29:30] [PASSED] 0x46A1 (ALDERLAKE_P) [05:29:30] [PASSED] 0x46A2 (ALDERLAKE_P) [05:29:30] [PASSED] 0x46A3 (ALDERLAKE_P) [05:29:30] [PASSED] 0x46A6 (ALDERLAKE_P) [05:29:30] [PASSED] 0x46A8 (ALDERLAKE_P) [05:29:30] [PASSED] 0x46AA (ALDERLAKE_P) [05:29:30] [PASSED] 0x462A (ALDERLAKE_P) [05:29:30] [PASSED] 0x4626 (ALDERLAKE_P) [05:29:30] [PASSED] 0x4628 (ALDERLAKE_P) [05:29:30] [PASSED] 0x46B0 (ALDERLAKE_P) [05:29:30] [PASSED] 0x46B1 (ALDERLAKE_P) [05:29:30] [PASSED] 0x46B2 (ALDERLAKE_P) [05:29:30] [PASSED] 0x46B3 (ALDERLAKE_P) [05:29:30] [PASSED] 0x46C0 (ALDERLAKE_P) [05:29:30] [PASSED] 0x46C1 (ALDERLAKE_P) [05:29:30] [PASSED] 0x46C2 (ALDERLAKE_P) [05:29:30] [PASSED] 0x46C3 (ALDERLAKE_P) [05:29:30] [PASSED] 0x46D0 (ALDERLAKE_N) [05:29:30] [PASSED] 0x46D1 (ALDERLAKE_N) [05:29:30] [PASSED] 0x46D2 (ALDERLAKE_N) [05:29:30] [PASSED] 0x46D3 (ALDERLAKE_N) [05:29:30] [PASSED] 0x46D4 (ALDERLAKE_N) [05:29:30] [PASSED] 0xA721 (ALDERLAKE_P) [05:29:30] [PASSED] 0xA7A1 (ALDERLAKE_P) [05:29:30] [PASSED] 0xA7A9 (ALDERLAKE_P) [05:29:30] [PASSED] 0xA7AC (ALDERLAKE_P) [05:29:30] [PASSED] 0xA7AD (ALDERLAKE_P) [05:29:30] [PASSED] 0xA720 (ALDERLAKE_P) [05:29:30] [PASSED] 0xA7A0 (ALDERLAKE_P) [05:29:30] [PASSED] 0xA7A8 (ALDERLAKE_P) [05:29:30] [PASSED] 0xA7AA (ALDERLAKE_P) [05:29:30] [PASSED] 0xA7AB (ALDERLAKE_P) [05:29:30] [PASSED] 0xA780 (ALDERLAKE_S) [05:29:30] [PASSED] 0xA781 (ALDERLAKE_S) [05:29:30] [PASSED] 0xA782 (ALDERLAKE_S) [05:29:30] [PASSED] 0xA783 (ALDERLAKE_S) [05:29:30] [PASSED] 0xA788 (ALDERLAKE_S) [05:29:30] [PASSED] 0xA789 (ALDERLAKE_S) [05:29:30] [PASSED] 0xA78A (ALDERLAKE_S) [05:29:30] [PASSED] 0xA78B (ALDERLAKE_S) [05:29:30] [PASSED] 0x4905 (DG1) [05:29:30] [PASSED] 0x4906 (DG1) [05:29:30] [PASSED] 0x4907 (DG1) [05:29:30] [PASSED] 0x4908 (DG1) [05:29:30] [PASSED] 0x4909 (DG1) [05:29:30] [PASSED] 0x56C0 (DG2) [05:29:30] [PASSED] 0x56C2 (DG2) [05:29:30] [PASSED] 0x56C1 (DG2) [05:29:30] [PASSED] 0x7D51 (METEORLAKE) [05:29:30] [PASSED] 0x7DD1 (METEORLAKE) [05:29:30] [PASSED] 0x7D41 (METEORLAKE) [05:29:30] [PASSED] 0x7D67 (METEORLAKE) [05:29:30] [PASSED] 0xB640 (METEORLAKE) [05:29:30] [PASSED] 0x56A0 (DG2) [05:29:30] [PASSED] 0x56A1 (DG2) [05:29:30] [PASSED] 0x56A2 (DG2) [05:29:30] [PASSED] 0x56BE (DG2) [05:29:30] [PASSED] 0x56BF (DG2) [05:29:30] [PASSED] 0x5690 (DG2) [05:29:30] [PASSED] 0x5691 (DG2) [05:29:30] [PASSED] 0x5692 (DG2) [05:29:30] [PASSED] 0x56A5 (DG2) [05:29:30] [PASSED] 0x56A6 (DG2) [05:29:30] [PASSED] 0x56B0 (DG2) [05:29:30] [PASSED] 0x56B1 (DG2) [05:29:30] [PASSED] 0x56BA (DG2) [05:29:30] [PASSED] 0x56BB (DG2) [05:29:30] [PASSED] 0x56BC (DG2) [05:29:30] [PASSED] 0x56BD (DG2) [05:29:30] [PASSED] 0x5693 (DG2) [05:29:30] [PASSED] 0x5694 (DG2) [05:29:30] [PASSED] 0x5695 (DG2) [05:29:30] [PASSED] 0x56A3 (DG2) [05:29:30] [PASSED] 0x56A4 (DG2) [05:29:30] [PASSED] 0x56B2 (DG2) [05:29:30] [PASSED] 0x56B3 (DG2) [05:29:30] [PASSED] 0x5696 (DG2) [05:29:30] [PASSED] 0x5697 (DG2) [05:29:30] [PASSED] 0xB69 (PVC) [05:29:30] [PASSED] 0xB6E (PVC) [05:29:30] [PASSED] 0xBD4 (PVC) [05:29:30] [PASSED] 0xBD5 (PVC) [05:29:30] [PASSED] 0xBD6 (PVC) [05:29:30] [PASSED] 0xBD7 (PVC) [05:29:30] [PASSED] 0xBD8 (PVC) [05:29:30] [PASSED] 0xBD9 (PVC) [05:29:30] [PASSED] 0xBDA (PVC) [05:29:30] [PASSED] 0xBDB (PVC) [05:29:30] [PASSED] 0xBE0 (PVC) [05:29:30] [PASSED] 0xBE1 (PVC) [05:29:30] [PASSED] 0xBE5 (PVC) [05:29:30] [PASSED] 0x7D40 (METEORLAKE) [05:29:30] [PASSED] 0x7D45 (METEORLAKE) [05:29:30] [PASSED] 0x7D55 (METEORLAKE) [05:29:30] [PASSED] 0x7D60 (METEORLAKE) [05:29:30] [PASSED] 0x7DD5 (METEORLAKE) [05:29:30] [PASSED] 0x6420 (LUNARLAKE) [05:29:30] [PASSED] 0x64A0 (LUNARLAKE) [05:29:30] [PASSED] 0x64B0 (LUNARLAKE) [05:29:30] [PASSED] 0xE202 (BATTLEMAGE) [05:29:30] [PASSED] 0xE209 (BATTLEMAGE) [05:29:30] [PASSED] 0xE20B (BATTLEMAGE) [05:29:30] [PASSED] 0xE20C (BATTLEMAGE) [05:29:30] [PASSED] 0xE20D (BATTLEMAGE) [05:29:30] [PASSED] 0xE210 (BATTLEMAGE) [05:29:30] [PASSED] 0xE211 (BATTLEMAGE) [05:29:30] [PASSED] 0xE212 (BATTLEMAGE) [05:29:30] [PASSED] 0xE216 (BATTLEMAGE) [05:29:30] [PASSED] 0xE220 (BATTLEMAGE) [05:29:30] [PASSED] 0xE221 (BATTLEMAGE) [05:29:30] [PASSED] 0xE222 (BATTLEMAGE) [05:29:30] [PASSED] 0xE223 (BATTLEMAGE) [05:29:30] [PASSED] 0xB080 (PANTHERLAKE) [05:29:30] [PASSED] 0xB081 (PANTHERLAKE) [05:29:30] [PASSED] 0xB082 (PANTHERLAKE) [05:29:30] [PASSED] 0xB083 (PANTHERLAKE) [05:29:30] [PASSED] 0xB084 (PANTHERLAKE) [05:29:30] [PASSED] 0xB085 (PANTHERLAKE) [05:29:30] [PASSED] 0xB086 (PANTHERLAKE) [05:29:30] [PASSED] 0xB087 (PANTHERLAKE) [05:29:30] [PASSED] 0xB08F (PANTHERLAKE) [05:29:30] [PASSED] 0xB090 (PANTHERLAKE) [05:29:30] [PASSED] 0xB0A0 (PANTHERLAKE) [05:29:30] [PASSED] 0xB0B0 (PANTHERLAKE) [05:29:30] [PASSED] 0xFD80 (PANTHERLAKE) [05:29:30] [PASSED] 0xFD81 (PANTHERLAKE) [05:29:30] [PASSED] 0xD740 (NOVALAKE_S) [05:29:30] [PASSED] 0xD741 (NOVALAKE_S) [05:29:30] [PASSED] 0xD742 (NOVALAKE_S) [05:29:30] [PASSED] 0xD743 (NOVALAKE_S) [05:29:30] [PASSED] 0xD744 (NOVALAKE_S) [05:29:30] [PASSED] 0xD745 (NOVALAKE_S) [05:29:30] [PASSED] 0x674C (CRESCENTISLAND) [05:29:30] [PASSED] 0xD750 (NOVALAKE_P) [05:29:30] [PASSED] 0xD751 (NOVALAKE_P) [05:29:30] [PASSED] 0xD752 (NOVALAKE_P) [05:29:30] [PASSED] 0xD753 (NOVALAKE_P) [05:29:30] [PASSED] 0xD754 (NOVALAKE_P) [05:29:30] [PASSED] 0xD755 (NOVALAKE_P) [05:29:30] [PASSED] 0xD756 (NOVALAKE_P) [05:29:30] [PASSED] 0xD757 (NOVALAKE_P) [05:29:30] [PASSED] 0xD75F (NOVALAKE_P) [05:29:30] =============== [PASSED] check_platform_desc =============== [05:29:30] ===================== [PASSED] xe_pci ====================== [05:29:30] =================== xe_rtp (2 subtests) ==================== [05:29:30] =============== xe_rtp_process_to_sr_tests ================ [05:29:30] [PASSED] coalesce-same-reg [05:29:30] [PASSED] no-match-no-add [05:29:30] [PASSED] match-or [05:29:30] [PASSED] match-or-xfail [05:29:30] [PASSED] no-match-no-add-multiple-rules [05:29:30] [PASSED] two-regs-two-entries [05:29:30] [PASSED] clr-one-set-other [05:29:30] [PASSED] set-field [05:29:30] [PASSED] conflict-duplicate stty: 'standard input': Inappropriate ioctl for device [05:29:30] [PASSED] conflict-not-disjoint [05:29:30] [PASSED] conflict-reg-type [05:29:30] =========== [PASSED] xe_rtp_process_to_sr_tests ============ [05:29:30] ================== xe_rtp_process_tests =================== [05:29:30] [PASSED] active1 [05:29:30] [PASSED] active2 [05:29:30] [PASSED] active-inactive [05:29:30] [PASSED] inactive-active [05:29:30] [PASSED] inactive-1st_or_active-inactive [05:29:30] [PASSED] inactive-2nd_or_active-inactive [05:29:30] [PASSED] inactive-last_or_active-inactive [05:29:30] [PASSED] inactive-no_or_active-inactive [05:29:30] ============== [PASSED] xe_rtp_process_tests =============== [05:29:30] ===================== [PASSED] xe_rtp ====================== [05:29:30] ==================== xe_wa (1 subtest) ===================== [05:29:30] ======================== xe_wa_gt ========================= [05:29:30] [PASSED] TIGERLAKE B0 [05:29:30] [PASSED] DG1 A0 [05:29:30] [PASSED] DG1 B0 [05:29:30] [PASSED] ALDERLAKE_S A0 [05:29:30] [PASSED] ALDERLAKE_S B0 [05:29:30] [PASSED] ALDERLAKE_S C0 [05:29:30] [PASSED] ALDERLAKE_S D0 [05:29:30] [PASSED] ALDERLAKE_P A0 [05:29:30] [PASSED] ALDERLAKE_P B0 [05:29:30] [PASSED] ALDERLAKE_P C0 [05:29:30] [PASSED] ALDERLAKE_S RPLS D0 [05:29:30] [PASSED] ALDERLAKE_P RPLU E0 [05:29:30] [PASSED] DG2 G10 C0 [05:29:30] [PASSED] DG2 G11 B1 [05:29:30] [PASSED] DG2 G12 A1 [05:29:30] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0 [05:29:30] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0 [05:29:30] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0 [05:29:30] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0 [05:29:30] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0 [05:29:30] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1 [05:29:30] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0 [05:29:30] ==================== [PASSED] xe_wa_gt ===================== [05:29:30] ====================== [PASSED] xe_wa ====================== [05:29:30] ============================================================ [05:29:30] Testing complete. Ran 597 tests: passed: 579, skipped: 18 [05:29:30] Elapsed time: 35.252s total, 4.243s configuring, 30.391s building, 0.606s running + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig [05:29:30] Configuring KUnit Kernel ... Regenerating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [05:29:32] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [05:29:56] Starting KUnit Kernel (1/1)... [05:29:56] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [05:29:56] ============ drm_test_pick_cmdline (2 subtests) ============ [05:29:56] [PASSED] drm_test_pick_cmdline_res_1920_1080_60 [05:29:56] =============== drm_test_pick_cmdline_named =============== [05:29:56] [PASSED] NTSC [05:29:56] [PASSED] NTSC-J [05:29:56] [PASSED] PAL [05:29:56] [PASSED] PAL-M [05:29:56] =========== [PASSED] drm_test_pick_cmdline_named =========== [05:29:56] ============== [PASSED] drm_test_pick_cmdline ============== [05:29:56] == drm_test_atomic_get_connector_for_encoder (1 subtest) === [05:29:56] [PASSED] drm_test_drm_atomic_get_connector_for_encoder [05:29:56] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ==== [05:29:56] =========== drm_validate_clone_mode (2 subtests) =========== [05:29:56] ============== drm_test_check_in_clone_mode =============== [05:29:56] [PASSED] in_clone_mode [05:29:56] [PASSED] not_in_clone_mode [05:29:56] ========== [PASSED] drm_test_check_in_clone_mode =========== [05:29:56] =============== drm_test_check_valid_clones =============== [05:29:56] [PASSED] not_in_clone_mode [05:29:56] [PASSED] valid_clone [05:29:56] [PASSED] invalid_clone [05:29:56] =========== [PASSED] drm_test_check_valid_clones =========== [05:29:56] ============= [PASSED] drm_validate_clone_mode ============= [05:29:56] ============= drm_validate_modeset (1 subtest) ============= [05:29:56] [PASSED] drm_test_check_connector_changed_modeset [05:29:56] ============== [PASSED] drm_validate_modeset =============== [05:29:56] ====== drm_test_bridge_get_current_state (2 subtests) ====== [05:29:56] [PASSED] drm_test_drm_bridge_get_current_state_atomic [05:29:56] [PASSED] drm_test_drm_bridge_get_current_state_legacy [05:29:56] ======== [PASSED] drm_test_bridge_get_current_state ======== [05:29:56] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ====== [05:29:56] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic [05:29:56] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled [05:29:56] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy [05:29:56] ======== [PASSED] drm_test_bridge_helper_reset_crtc ======== [05:29:56] ============== drm_bridge_alloc (2 subtests) =============== [05:29:56] [PASSED] drm_test_drm_bridge_alloc_basic [05:29:56] [PASSED] drm_test_drm_bridge_alloc_get_put [05:29:56] ================ [PASSED] drm_bridge_alloc ================= [05:29:56] ============= drm_cmdline_parser (40 subtests) ============= [05:29:56] [PASSED] drm_test_cmdline_force_d_only [05:29:56] [PASSED] drm_test_cmdline_force_D_only_dvi [05:29:56] [PASSED] drm_test_cmdline_force_D_only_hdmi [05:29:56] [PASSED] drm_test_cmdline_force_D_only_not_digital [05:29:56] [PASSED] drm_test_cmdline_force_e_only [05:29:56] [PASSED] drm_test_cmdline_res [05:29:56] [PASSED] drm_test_cmdline_res_vesa [05:29:56] [PASSED] drm_test_cmdline_res_vesa_rblank [05:29:56] [PASSED] drm_test_cmdline_res_rblank [05:29:56] [PASSED] drm_test_cmdline_res_bpp [05:29:56] [PASSED] drm_test_cmdline_res_refresh [05:29:56] [PASSED] drm_test_cmdline_res_bpp_refresh [05:29:56] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced [05:29:56] [PASSED] drm_test_cmdline_res_bpp_refresh_margins [05:29:56] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off [05:29:56] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on [05:29:56] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog [05:29:56] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital [05:29:56] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on [05:29:56] [PASSED] drm_test_cmdline_res_margins_force_on [05:29:56] [PASSED] drm_test_cmdline_res_vesa_margins [05:29:56] [PASSED] drm_test_cmdline_name [05:29:56] [PASSED] drm_test_cmdline_name_bpp [05:29:56] [PASSED] drm_test_cmdline_name_option [05:29:56] [PASSED] drm_test_cmdline_name_bpp_option [05:29:56] [PASSED] drm_test_cmdline_rotate_0 [05:29:56] [PASSED] drm_test_cmdline_rotate_90 [05:29:56] [PASSED] drm_test_cmdline_rotate_180 [05:29:56] [PASSED] drm_test_cmdline_rotate_270 [05:29:56] [PASSED] drm_test_cmdline_hmirror [05:29:56] [PASSED] drm_test_cmdline_vmirror [05:29:56] [PASSED] drm_test_cmdline_margin_options [05:29:56] [PASSED] drm_test_cmdline_multiple_options [05:29:56] [PASSED] drm_test_cmdline_bpp_extra_and_option [05:29:56] [PASSED] drm_test_cmdline_extra_and_option [05:29:56] [PASSED] drm_test_cmdline_freestanding_options [05:29:56] [PASSED] drm_test_cmdline_freestanding_force_e_and_options [05:29:56] [PASSED] drm_test_cmdline_panel_orientation [05:29:56] ================ drm_test_cmdline_invalid ================= [05:29:56] [PASSED] margin_only [05:29:56] [PASSED] interlace_only [05:29:56] [PASSED] res_missing_x [05:29:56] [PASSED] res_missing_y [05:29:56] [PASSED] res_bad_y [05:29:56] [PASSED] res_missing_y_bpp [05:29:56] [PASSED] res_bad_bpp [05:29:56] [PASSED] res_bad_refresh [05:29:56] [PASSED] res_bpp_refresh_force_on_off [05:29:56] [PASSED] res_invalid_mode [05:29:56] [PASSED] res_bpp_wrong_place_mode [05:29:56] [PASSED] name_bpp_refresh [05:29:56] [PASSED] name_refresh [05:29:56] [PASSED] name_refresh_wrong_mode [05:29:56] [PASSED] name_refresh_invalid_mode [05:29:56] [PASSED] rotate_multiple [05:29:56] [PASSED] rotate_invalid_val [05:29:56] [PASSED] rotate_truncated [05:29:56] [PASSED] invalid_option [05:29:56] [PASSED] invalid_tv_option [05:29:56] [PASSED] truncated_tv_option [05:29:56] ============ [PASSED] drm_test_cmdline_invalid ============= [05:29:56] =============== drm_test_cmdline_tv_options =============== [05:29:56] [PASSED] NTSC [05:29:56] [PASSED] NTSC_443 [05:29:56] [PASSED] NTSC_J [05:29:56] [PASSED] PAL [05:29:56] [PASSED] PAL_M [05:29:56] [PASSED] PAL_N [05:29:56] [PASSED] SECAM [05:29:56] [PASSED] MONO_525 [05:29:56] [PASSED] MONO_625 [05:29:56] =========== [PASSED] drm_test_cmdline_tv_options =========== [05:29:56] =============== [PASSED] drm_cmdline_parser ================ [05:29:56] ========== drmm_connector_hdmi_init (20 subtests) ========== [05:29:56] [PASSED] drm_test_connector_hdmi_init_valid [05:29:56] [PASSED] drm_test_connector_hdmi_init_bpc_8 [05:29:56] [PASSED] drm_test_connector_hdmi_init_bpc_10 [05:29:56] [PASSED] drm_test_connector_hdmi_init_bpc_12 [05:29:56] [PASSED] drm_test_connector_hdmi_init_bpc_invalid [05:29:56] [PASSED] drm_test_connector_hdmi_init_bpc_null [05:29:56] [PASSED] drm_test_connector_hdmi_init_formats_empty [05:29:56] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb [05:29:56] === drm_test_connector_hdmi_init_formats_yuv420_allowed === [05:29:56] [PASSED] supported_formats=0x9 yuv420_allowed=1 [05:29:56] [PASSED] supported_formats=0x9 yuv420_allowed=0 [05:29:56] [PASSED] supported_formats=0x3 yuv420_allowed=1 [05:29:56] [PASSED] supported_formats=0x3 yuv420_allowed=0 [05:29:56] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed === [05:29:56] [PASSED] drm_test_connector_hdmi_init_null_ddc [05:29:56] [PASSED] drm_test_connector_hdmi_init_null_product [05:29:56] [PASSED] drm_test_connector_hdmi_init_null_vendor [05:29:56] [PASSED] drm_test_connector_hdmi_init_product_length_exact [05:29:56] [PASSED] drm_test_connector_hdmi_init_product_length_too_long [05:29:56] [PASSED] drm_test_connector_hdmi_init_product_valid [05:29:56] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact [05:29:56] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long [05:29:56] [PASSED] drm_test_connector_hdmi_init_vendor_valid [05:29:56] ========= drm_test_connector_hdmi_init_type_valid ========= [05:29:56] [PASSED] HDMI-A [05:29:56] [PASSED] HDMI-B [05:29:56] ===== [PASSED] drm_test_connector_hdmi_init_type_valid ===== [05:29:56] ======== drm_test_connector_hdmi_init_type_invalid ======== [05:29:56] [PASSED] Unknown [05:29:56] [PASSED] VGA [05:29:56] [PASSED] DVI-I [05:29:56] [PASSED] DVI-D [05:29:56] [PASSED] DVI-A [05:29:56] [PASSED] Composite [05:29:56] [PASSED] SVIDEO [05:29:56] [PASSED] LVDS [05:29:56] [PASSED] Component [05:29:56] [PASSED] DIN [05:29:56] [PASSED] DP [05:29:56] [PASSED] TV [05:29:56] [PASSED] eDP [05:29:56] [PASSED] Virtual [05:29:56] [PASSED] DSI [05:29:56] [PASSED] DPI [05:29:56] [PASSED] Writeback [05:29:56] [PASSED] SPI [05:29:56] [PASSED] USB [05:29:56] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ==== [05:29:56] ============ [PASSED] drmm_connector_hdmi_init ============= [05:29:56] ============= drmm_connector_init (3 subtests) ============= [05:29:56] [PASSED] drm_test_drmm_connector_init [05:29:56] [PASSED] drm_test_drmm_connector_init_null_ddc [05:29:56] ========= drm_test_drmm_connector_init_type_valid ========= [05:29:56] [PASSED] Unknown [05:29:56] [PASSED] VGA [05:29:56] [PASSED] DVI-I [05:29:56] [PASSED] DVI-D [05:29:56] [PASSED] DVI-A [05:29:56] [PASSED] Composite [05:29:56] [PASSED] SVIDEO [05:29:56] [PASSED] LVDS [05:29:56] [PASSED] Component [05:29:56] [PASSED] DIN [05:29:56] [PASSED] DP [05:29:56] [PASSED] HDMI-A [05:29:56] [PASSED] HDMI-B [05:29:56] [PASSED] TV [05:29:56] [PASSED] eDP [05:29:56] [PASSED] Virtual [05:29:56] [PASSED] DSI [05:29:56] [PASSED] DPI [05:29:56] [PASSED] Writeback [05:29:56] [PASSED] SPI [05:29:56] [PASSED] USB [05:29:56] ===== [PASSED] drm_test_drmm_connector_init_type_valid ===== [05:29:56] =============== [PASSED] drmm_connector_init =============== [05:29:56] ========= drm_connector_dynamic_init (6 subtests) ========== [05:29:56] [PASSED] drm_test_drm_connector_dynamic_init [05:29:56] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc [05:29:56] [PASSED] drm_test_drm_connector_dynamic_init_not_added [05:29:56] [PASSED] drm_test_drm_connector_dynamic_init_properties [05:29:56] ===== drm_test_drm_connector_dynamic_init_type_valid ====== [05:29:56] [PASSED] Unknown [05:29:56] [PASSED] VGA [05:29:56] [PASSED] DVI-I [05:29:56] [PASSED] DVI-D [05:29:56] [PASSED] DVI-A [05:29:56] [PASSED] Composite [05:29:56] [PASSED] SVIDEO [05:29:56] [PASSED] LVDS [05:29:56] [PASSED] Component [05:29:56] [PASSED] DIN [05:29:56] [PASSED] DP [05:29:56] [PASSED] HDMI-A [05:29:56] [PASSED] HDMI-B [05:29:56] [PASSED] TV [05:29:56] [PASSED] eDP [05:29:56] [PASSED] Virtual [05:29:56] [PASSED] DSI [05:29:56] [PASSED] DPI [05:29:56] [PASSED] Writeback [05:29:56] [PASSED] SPI [05:29:56] [PASSED] USB [05:29:56] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid == [05:29:56] ======== drm_test_drm_connector_dynamic_init_name ========= [05:29:56] [PASSED] Unknown [05:29:56] [PASSED] VGA [05:29:56] [PASSED] DVI-I [05:29:56] [PASSED] DVI-D [05:29:56] [PASSED] DVI-A [05:29:56] [PASSED] Composite [05:29:56] [PASSED] SVIDEO [05:29:56] [PASSED] LVDS [05:29:56] [PASSED] Component [05:29:56] [PASSED] DIN [05:29:56] [PASSED] DP [05:29:56] [PASSED] HDMI-A [05:29:56] [PASSED] HDMI-B [05:29:56] [PASSED] TV [05:29:56] [PASSED] eDP [05:29:56] [PASSED] Virtual [05:29:56] [PASSED] DSI [05:29:56] [PASSED] DPI [05:29:56] [PASSED] Writeback [05:29:56] [PASSED] SPI [05:29:56] [PASSED] USB [05:29:56] ==== [PASSED] drm_test_drm_connector_dynamic_init_name ===== [05:29:56] =========== [PASSED] drm_connector_dynamic_init ============ [05:29:56] ==== drm_connector_dynamic_register_early (4 subtests) ===== [05:29:56] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list [05:29:56] [PASSED] drm_test_drm_connector_dynamic_register_early_defer [05:29:56] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init [05:29:56] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object [05:29:56] ====== [PASSED] drm_connector_dynamic_register_early ======= [05:29:56] ======= drm_connector_dynamic_register (7 subtests) ======== [05:29:56] [PASSED] drm_test_drm_connector_dynamic_register_on_list [05:29:56] [PASSED] drm_test_drm_connector_dynamic_register_no_defer [05:29:56] [PASSED] drm_test_drm_connector_dynamic_register_no_init [05:29:56] [PASSED] drm_test_drm_connector_dynamic_register_mode_object [05:29:56] [PASSED] drm_test_drm_connector_dynamic_register_sysfs [05:29:56] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name [05:29:56] [PASSED] drm_test_drm_connector_dynamic_register_debugfs [05:29:56] ========= [PASSED] drm_connector_dynamic_register ========== [05:29:56] = drm_connector_attach_broadcast_rgb_property (2 subtests) = [05:29:56] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property [05:29:56] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector [05:29:56] === [PASSED] drm_connector_attach_broadcast_rgb_property === [05:29:56] ========== drm_get_tv_mode_from_name (2 subtests) ========== [05:29:56] ========== drm_test_get_tv_mode_from_name_valid =========== [05:29:56] [PASSED] NTSC [05:29:56] [PASSED] NTSC-443 [05:29:56] [PASSED] NTSC-J [05:29:56] [PASSED] PAL [05:29:56] [PASSED] PAL-M [05:29:56] [PASSED] PAL-N [05:29:56] [PASSED] SECAM [05:29:56] [PASSED] Mono [05:29:56] ====== [PASSED] drm_test_get_tv_mode_from_name_valid ======= [05:29:56] [PASSED] drm_test_get_tv_mode_from_name_truncated [05:29:56] ============ [PASSED] drm_get_tv_mode_from_name ============ [05:29:56] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) = [05:29:56] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb [05:29:56] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc [05:29:56] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1 [05:29:56] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc [05:29:56] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1 [05:29:56] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double [05:29:56] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid = [05:29:56] [PASSED] VIC 96 [05:29:56] [PASSED] VIC 97 [05:29:56] [PASSED] VIC 101 [05:29:56] [PASSED] VIC 102 [05:29:56] [PASSED] VIC 106 [05:29:56] [PASSED] VIC 107 [05:29:56] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid === [05:29:56] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc [05:29:56] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc [05:29:56] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc [05:29:56] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc [05:29:56] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc [05:29:56] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ==== [05:29:56] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) == [05:29:56] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ==== [05:29:56] [PASSED] Automatic [05:29:56] [PASSED] Full [05:29:56] [PASSED] Limited 16:235 [05:29:56] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name === [05:29:56] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid [05:29:56] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ==== [05:29:56] == drm_hdmi_connector_get_output_format_name (2 subtests) == [05:29:56] === drm_test_drm_hdmi_connector_get_output_format_name ==== [05:29:56] [PASSED] RGB [05:29:56] [PASSED] YUV 4:2:0 [05:29:56] [PASSED] YUV 4:2:2 [05:29:56] [PASSED] YUV 4:4:4 [05:29:56] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name === [05:29:56] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid [05:29:56] ==== [PASSED] drm_hdmi_connector_get_output_format_name ==== [05:29:56] ============= drm_damage_helper (21 subtests) ============== [05:29:56] [PASSED] drm_test_damage_iter_no_damage [05:29:56] [PASSED] drm_test_damage_iter_no_damage_fractional_src [05:29:56] [PASSED] drm_test_damage_iter_no_damage_src_moved [05:29:56] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved [05:29:56] [PASSED] drm_test_damage_iter_no_damage_not_visible [05:29:56] [PASSED] drm_test_damage_iter_no_damage_no_crtc [05:29:56] [PASSED] drm_test_damage_iter_no_damage_no_fb [05:29:56] [PASSED] drm_test_damage_iter_simple_damage [05:29:56] [PASSED] drm_test_damage_iter_single_damage [05:29:56] [PASSED] drm_test_damage_iter_single_damage_intersect_src [05:29:56] [PASSED] drm_test_damage_iter_single_damage_outside_src [05:29:56] [PASSED] drm_test_damage_iter_single_damage_fractional_src [05:29:56] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src [05:29:56] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src [05:29:56] [PASSED] drm_test_damage_iter_single_damage_src_moved [05:29:56] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved [05:29:56] [PASSED] drm_test_damage_iter_damage [05:29:56] [PASSED] drm_test_damage_iter_damage_one_intersect [05:29:56] [PASSED] drm_test_damage_iter_damage_one_outside [05:29:56] [PASSED] drm_test_damage_iter_damage_src_moved [05:29:56] [PASSED] drm_test_damage_iter_damage_not_visible [05:29:56] ================ [PASSED] drm_damage_helper ================ [05:29:56] ============== drm_dp_mst_helper (3 subtests) ============== [05:29:56] ============== drm_test_dp_mst_calc_pbn_mode ============== [05:29:56] [PASSED] Clock 154000 BPP 30 DSC disabled [05:29:56] [PASSED] Clock 234000 BPP 30 DSC disabled [05:29:56] [PASSED] Clock 297000 BPP 24 DSC disabled [05:29:56] [PASSED] Clock 332880 BPP 24 DSC enabled [05:29:56] [PASSED] Clock 324540 BPP 24 DSC enabled [05:29:56] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ========== [05:29:56] ============== drm_test_dp_mst_calc_pbn_div =============== [05:29:56] [PASSED] Link rate 2000000 lane count 4 [05:29:56] [PASSED] Link rate 2000000 lane count 2 [05:29:56] [PASSED] Link rate 2000000 lane count 1 [05:29:56] [PASSED] Link rate 1350000 lane count 4 [05:29:56] [PASSED] Link rate 1350000 lane count 2 [05:29:56] [PASSED] Link rate 1350000 lane count 1 [05:29:56] [PASSED] Link rate 1000000 lane count 4 [05:29:56] [PASSED] Link rate 1000000 lane count 2 [05:29:56] [PASSED] Link rate 1000000 lane count 1 [05:29:56] [PASSED] Link rate 810000 lane count 4 [05:29:56] [PASSED] Link rate 810000 lane count 2 [05:29:56] [PASSED] Link rate 810000 lane count 1 [05:29:56] [PASSED] Link rate 540000 lane count 4 [05:29:56] [PASSED] Link rate 540000 lane count 2 [05:29:56] [PASSED] Link rate 540000 lane count 1 [05:29:56] [PASSED] Link rate 270000 lane count 4 [05:29:56] [PASSED] Link rate 270000 lane count 2 [05:29:56] [PASSED] Link rate 270000 lane count 1 [05:29:56] [PASSED] Link rate 162000 lane count 4 [05:29:56] [PASSED] Link rate 162000 lane count 2 [05:29:56] [PASSED] Link rate 162000 lane count 1 [05:29:56] ========== [PASSED] drm_test_dp_mst_calc_pbn_div =========== [05:29:56] ========= drm_test_dp_mst_sideband_msg_req_decode ========= [05:29:56] [PASSED] DP_ENUM_PATH_RESOURCES with port number [05:29:56] [PASSED] DP_POWER_UP_PHY with port number [05:29:56] [PASSED] DP_POWER_DOWN_PHY with port number [05:29:56] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks [05:29:56] [PASSED] DP_ALLOCATE_PAYLOAD with port number [05:29:56] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI [05:29:56] [PASSED] DP_ALLOCATE_PAYLOAD with PBN [05:29:56] [PASSED] DP_QUERY_PAYLOAD with port number [05:29:56] [PASSED] DP_QUERY_PAYLOAD with VCPI [05:29:56] [PASSED] DP_REMOTE_DPCD_READ with port number [05:29:56] [PASSED] DP_REMOTE_DPCD_READ with DPCD address [05:29:56] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes [05:29:56] [PASSED] DP_REMOTE_DPCD_WRITE with port number [05:29:56] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address [05:29:56] [PASSED] DP_REMOTE_DPCD_WRITE with data array [05:29:56] [PASSED] DP_REMOTE_I2C_READ with port number [05:29:56] [PASSED] DP_REMOTE_I2C_READ with I2C device ID [05:29:56] [PASSED] DP_REMOTE_I2C_READ with transactions array [05:29:56] [PASSED] DP_REMOTE_I2C_WRITE with port number [05:29:56] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID [05:29:56] [PASSED] DP_REMOTE_I2C_WRITE with data array [05:29:56] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID [05:29:56] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID [05:29:56] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event [05:29:56] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event [05:29:56] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior [05:29:56] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior [05:29:56] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode ===== [05:29:56] ================ [PASSED] drm_dp_mst_helper ================ [05:29:56] ================== drm_exec (7 subtests) =================== [05:29:56] [PASSED] sanitycheck [05:29:56] [PASSED] test_lock [05:29:56] [PASSED] test_lock_unlock [05:29:56] [PASSED] test_duplicates [05:29:56] [PASSED] test_prepare [05:29:56] [PASSED] test_prepare_array [05:29:56] [PASSED] test_multiple_loops [05:29:56] ==================== [PASSED] drm_exec ===================== [05:29:56] =========== drm_format_helper_test (17 subtests) =========== [05:29:56] ============== drm_test_fb_xrgb8888_to_gray8 ============== [05:29:56] [PASSED] single_pixel_source_buffer [05:29:56] [PASSED] single_pixel_clip_rectangle [05:29:56] [PASSED] well_known_colors [05:29:56] [PASSED] destination_pitch [05:29:56] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ========== [05:29:56] ============= drm_test_fb_xrgb8888_to_rgb332 ============== [05:29:56] [PASSED] single_pixel_source_buffer [05:29:56] [PASSED] single_pixel_clip_rectangle [05:29:56] [PASSED] well_known_colors [05:29:56] [PASSED] destination_pitch [05:29:56] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ========== [05:29:56] ============= drm_test_fb_xrgb8888_to_rgb565 ============== [05:29:56] [PASSED] single_pixel_source_buffer [05:29:56] [PASSED] single_pixel_clip_rectangle [05:29:56] [PASSED] well_known_colors [05:29:56] [PASSED] destination_pitch [05:29:56] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ========== [05:29:56] ============ drm_test_fb_xrgb8888_to_xrgb1555 ============= [05:29:56] [PASSED] single_pixel_source_buffer [05:29:56] [PASSED] single_pixel_clip_rectangle [05:29:56] [PASSED] well_known_colors [05:29:56] [PASSED] destination_pitch [05:29:56] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 ========= [05:29:56] ============ drm_test_fb_xrgb8888_to_argb1555 ============= [05:29:56] [PASSED] single_pixel_source_buffer [05:29:56] [PASSED] single_pixel_clip_rectangle [05:29:56] [PASSED] well_known_colors [05:29:56] [PASSED] destination_pitch [05:29:56] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 ========= [05:29:56] ============ drm_test_fb_xrgb8888_to_rgba5551 ============= [05:29:56] [PASSED] single_pixel_source_buffer [05:29:56] [PASSED] single_pixel_clip_rectangle [05:29:56] [PASSED] well_known_colors [05:29:56] [PASSED] destination_pitch [05:29:56] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 ========= [05:29:56] ============= drm_test_fb_xrgb8888_to_rgb888 ============== [05:29:56] [PASSED] single_pixel_source_buffer [05:29:56] [PASSED] single_pixel_clip_rectangle [05:29:56] [PASSED] well_known_colors [05:29:56] [PASSED] destination_pitch [05:29:56] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ========== [05:29:56] ============= drm_test_fb_xrgb8888_to_bgr888 ============== [05:29:56] [PASSED] single_pixel_source_buffer [05:29:56] [PASSED] single_pixel_clip_rectangle [05:29:56] [PASSED] well_known_colors [05:29:56] [PASSED] destination_pitch [05:29:56] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ========== [05:29:56] ============ drm_test_fb_xrgb8888_to_argb8888 ============= [05:29:56] [PASSED] single_pixel_source_buffer [05:29:56] [PASSED] single_pixel_clip_rectangle [05:29:56] [PASSED] well_known_colors [05:29:56] [PASSED] destination_pitch [05:29:56] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 ========= [05:29:56] =========== drm_test_fb_xrgb8888_to_xrgb2101010 =========== [05:29:56] [PASSED] single_pixel_source_buffer [05:29:56] [PASSED] single_pixel_clip_rectangle [05:29:56] [PASSED] well_known_colors [05:29:56] [PASSED] destination_pitch [05:29:56] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 ======= [05:29:56] =========== drm_test_fb_xrgb8888_to_argb2101010 =========== [05:29:56] [PASSED] single_pixel_source_buffer [05:29:56] [PASSED] single_pixel_clip_rectangle [05:29:56] [PASSED] well_known_colors [05:29:56] [PASSED] destination_pitch [05:29:56] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 ======= [05:29:56] ============== drm_test_fb_xrgb8888_to_mono =============== [05:29:56] [PASSED] single_pixel_source_buffer [05:29:56] [PASSED] single_pixel_clip_rectangle [05:29:56] [PASSED] well_known_colors [05:29:56] [PASSED] destination_pitch [05:29:56] ========== [PASSED] drm_test_fb_xrgb8888_to_mono =========== [05:29:56] ==================== drm_test_fb_swab ===================== [05:29:56] [PASSED] single_pixel_source_buffer [05:29:56] [PASSED] single_pixel_clip_rectangle [05:29:56] [PASSED] well_known_colors [05:29:56] [PASSED] destination_pitch [05:29:56] ================ [PASSED] drm_test_fb_swab ================= [05:29:56] ============ drm_test_fb_xrgb8888_to_xbgr8888 ============= [05:29:56] [PASSED] single_pixel_source_buffer [05:29:56] [PASSED] single_pixel_clip_rectangle [05:29:56] [PASSED] well_known_colors [05:29:56] [PASSED] destination_pitch [05:29:56] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 ========= [05:29:56] ============ drm_test_fb_xrgb8888_to_abgr8888 ============= [05:29:56] [PASSED] single_pixel_source_buffer [05:29:56] [PASSED] single_pixel_clip_rectangle [05:29:56] [PASSED] well_known_colors [05:29:56] [PASSED] destination_pitch [05:29:56] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 ========= [05:29:56] ================= drm_test_fb_clip_offset ================= [05:29:56] [PASSED] pass through [05:29:56] [PASSED] horizontal offset [05:29:56] [PASSED] vertical offset [05:29:56] [PASSED] horizontal and vertical offset [05:29:56] [PASSED] horizontal offset (custom pitch) [05:29:56] [PASSED] vertical offset (custom pitch) [05:29:56] [PASSED] horizontal and vertical offset (custom pitch) [05:29:56] ============= [PASSED] drm_test_fb_clip_offset ============= [05:29:56] =================== drm_test_fb_memcpy ==================== [05:29:56] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258) [05:29:56] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258) [05:29:56] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559) [05:29:56] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258) [05:29:56] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258) [05:29:56] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559) [05:29:56] [PASSED] well_known_colors: XB24 little-endian (0x34324258) [05:29:56] [PASSED] well_known_colors: XRA8 little-endian (0x38415258) [05:29:56] [PASSED] well_known_colors: YU24 little-endian (0x34325559) [05:29:56] [PASSED] destination_pitch: XB24 little-endian (0x34324258) [05:29:56] [PASSED] destination_pitch: XRA8 little-endian (0x38415258) [05:29:56] [PASSED] destination_pitch: YU24 little-endian (0x34325559) [05:29:56] =============== [PASSED] drm_test_fb_memcpy ================ [05:29:56] ============= [PASSED] drm_format_helper_test ============== [05:29:56] ================= drm_format (18 subtests) ================= [05:29:56] [PASSED] drm_test_format_block_width_invalid [05:29:56] [PASSED] drm_test_format_block_width_one_plane [05:29:56] [PASSED] drm_test_format_block_width_two_plane [05:29:56] [PASSED] drm_test_format_block_width_three_plane [05:29:56] [PASSED] drm_test_format_block_width_tiled [05:29:56] [PASSED] drm_test_format_block_height_invalid [05:29:56] [PASSED] drm_test_format_block_height_one_plane [05:29:56] [PASSED] drm_test_format_block_height_two_plane [05:29:56] [PASSED] drm_test_format_block_height_three_plane [05:29:56] [PASSED] drm_test_format_block_height_tiled [05:29:56] [PASSED] drm_test_format_min_pitch_invalid [05:29:56] [PASSED] drm_test_format_min_pitch_one_plane_8bpp [05:29:56] [PASSED] drm_test_format_min_pitch_one_plane_16bpp [05:29:56] [PASSED] drm_test_format_min_pitch_one_plane_24bpp [05:29:56] [PASSED] drm_test_format_min_pitch_one_plane_32bpp [05:29:56] [PASSED] drm_test_format_min_pitch_two_plane [05:29:56] [PASSED] drm_test_format_min_pitch_three_plane_8bpp [05:29:56] [PASSED] drm_test_format_min_pitch_tiled [05:29:56] =================== [PASSED] drm_format ==================== [05:29:56] ============== drm_framebuffer (10 subtests) =============== [05:29:56] ========== drm_test_framebuffer_check_src_coords ========== [05:29:56] [PASSED] Success: source fits into fb [05:29:56] [PASSED] Fail: overflowing fb with x-axis coordinate [05:29:56] [PASSED] Fail: overflowing fb with y-axis coordinate [05:29:56] [PASSED] Fail: overflowing fb with source width [05:29:56] [PASSED] Fail: overflowing fb with source height [05:29:56] ====== [PASSED] drm_test_framebuffer_check_src_coords ====== [05:29:56] [PASSED] drm_test_framebuffer_cleanup [05:29:56] =============== drm_test_framebuffer_create =============== [05:29:56] [PASSED] ABGR8888 normal sizes [05:29:56] [PASSED] ABGR8888 max sizes [05:29:56] [PASSED] ABGR8888 pitch greater than min required [05:29:56] [PASSED] ABGR8888 pitch less than min required [05:29:56] [PASSED] ABGR8888 Invalid width [05:29:56] [PASSED] ABGR8888 Invalid buffer handle [05:29:56] [PASSED] No pixel format [05:29:56] [PASSED] ABGR8888 Width 0 [05:29:56] [PASSED] ABGR8888 Height 0 [05:29:56] [PASSED] ABGR8888 Out of bound height * pitch combination [05:29:56] [PASSED] ABGR8888 Large buffer offset [05:29:56] [PASSED] ABGR8888 Buffer offset for inexistent plane [05:29:56] [PASSED] ABGR8888 Invalid flag [05:29:56] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers [05:29:56] [PASSED] ABGR8888 Valid buffer modifier [05:29:56] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE) [05:29:56] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS [05:29:56] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS [05:29:56] [PASSED] NV12 Normal sizes [05:29:56] [PASSED] NV12 Max sizes [05:29:56] [PASSED] NV12 Invalid pitch [05:29:56] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag [05:29:56] [PASSED] NV12 different modifier per-plane [05:29:56] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE [05:29:56] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS [05:29:56] [PASSED] NV12 Modifier for inexistent plane [05:29:56] [PASSED] NV12 Handle for inexistent plane [05:29:56] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS [05:29:56] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier [05:29:56] [PASSED] YVU420 Normal sizes [05:29:56] [PASSED] YVU420 Max sizes [05:29:56] [PASSED] YVU420 Invalid pitch [05:29:56] [PASSED] YVU420 Different pitches [05:29:56] [PASSED] YVU420 Different buffer offsets/pitches [05:29:56] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS [05:29:56] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS [05:29:56] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS [05:29:56] [PASSED] YVU420 Valid modifier [05:29:56] [PASSED] YVU420 Different modifiers per plane [05:29:56] [PASSED] YVU420 Modifier for inexistent plane [05:29:56] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR) [05:29:56] [PASSED] X0L2 Normal sizes [05:29:56] [PASSED] X0L2 Max sizes [05:29:56] [PASSED] X0L2 Invalid pitch [05:29:56] [PASSED] X0L2 Pitch greater than minimum required [05:29:56] [PASSED] X0L2 Handle for inexistent plane [05:29:56] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set [05:29:56] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set [05:29:56] [PASSED] X0L2 Valid modifier [05:29:56] [PASSED] X0L2 Modifier for inexistent plane [05:29:56] =========== [PASSED] drm_test_framebuffer_create =========== [05:29:56] [PASSED] drm_test_framebuffer_free [05:29:56] [PASSED] drm_test_framebuffer_init [05:29:56] [PASSED] drm_test_framebuffer_init_bad_format [05:29:56] [PASSED] drm_test_framebuffer_init_dev_mismatch [05:29:56] [PASSED] drm_test_framebuffer_lookup [05:29:56] [PASSED] drm_test_framebuffer_lookup_inexistent [05:29:56] [PASSED] drm_test_framebuffer_modifiers_not_supported [05:29:56] ================= [PASSED] drm_framebuffer ================= [05:29:56] ================ drm_gem_shmem (8 subtests) ================ [05:29:56] [PASSED] drm_gem_shmem_test_obj_create [05:29:56] [PASSED] drm_gem_shmem_test_obj_create_private [05:29:56] [PASSED] drm_gem_shmem_test_pin_pages [05:29:56] [PASSED] drm_gem_shmem_test_vmap [05:29:56] [PASSED] drm_gem_shmem_test_get_sg_table [05:29:56] [PASSED] drm_gem_shmem_test_get_pages_sgt [05:29:56] [PASSED] drm_gem_shmem_test_madvise [05:29:56] [PASSED] drm_gem_shmem_test_purge [05:29:56] ================== [PASSED] drm_gem_shmem ================== [05:29:56] === drm_atomic_helper_connector_hdmi_check (27 subtests) === [05:29:56] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode [05:29:56] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1 [05:29:56] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode [05:29:56] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1 [05:29:56] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode [05:29:56] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1 [05:29:56] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 ======= [05:29:56] [PASSED] Automatic [05:29:56] [PASSED] Full [05:29:56] [PASSED] Limited 16:235 [05:29:56] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 === [05:29:56] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed [05:29:56] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed [05:29:56] [PASSED] drm_test_check_disable_connector [05:29:56] [PASSED] drm_test_check_hdmi_funcs_reject_rate [05:29:56] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb [05:29:56] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420 [05:29:56] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422 [05:29:56] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420 [05:29:56] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420 [05:29:56] [PASSED] drm_test_check_output_bpc_crtc_mode_changed [05:29:56] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed [05:29:56] [PASSED] drm_test_check_output_bpc_dvi [05:29:56] [PASSED] drm_test_check_output_bpc_format_vic_1 [05:29:56] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only [05:29:56] [PASSED] drm_test_check_output_bpc_format_display_rgb_only [05:29:56] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only [05:29:56] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only [05:29:56] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc [05:29:56] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc [05:29:56] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc [05:29:56] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ====== [05:29:56] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ==== [05:29:56] [PASSED] drm_test_check_broadcast_rgb_value [05:29:56] [PASSED] drm_test_check_bpc_8_value [05:29:56] [PASSED] drm_test_check_bpc_10_value [05:29:56] [PASSED] drm_test_check_bpc_12_value [05:29:56] [PASSED] drm_test_check_format_value [05:29:56] [PASSED] drm_test_check_tmds_char_value [05:29:56] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ====== [05:29:56] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) = [05:29:56] [PASSED] drm_test_check_mode_valid [05:29:56] [PASSED] drm_test_check_mode_valid_reject [05:29:56] [PASSED] drm_test_check_mode_valid_reject_rate [05:29:56] [PASSED] drm_test_check_mode_valid_reject_max_clock [05:29:56] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid === [05:29:56] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) = [05:29:56] [PASSED] drm_test_check_infoframes [05:29:56] [PASSED] drm_test_check_reject_avi_infoframe [05:29:56] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8 [05:29:56] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10 [05:29:56] [PASSED] drm_test_check_reject_audio_infoframe [05:29:56] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes === [05:29:56] ================= drm_managed (2 subtests) ================= [05:29:56] [PASSED] drm_test_managed_release_action [05:29:56] [PASSED] drm_test_managed_run_action [05:29:56] =================== [PASSED] drm_managed =================== [05:29:56] =================== drm_mm (6 subtests) ==================== [05:29:56] [PASSED] drm_test_mm_init [05:29:56] [PASSED] drm_test_mm_debug [05:29:56] [PASSED] drm_test_mm_align32 [05:29:56] [PASSED] drm_test_mm_align64 [05:29:56] [PASSED] drm_test_mm_lowest [05:29:56] [PASSED] drm_test_mm_highest [05:29:56] ===================== [PASSED] drm_mm ====================== [05:29:56] ============= drm_modes_analog_tv (5 subtests) ============= [05:29:56] [PASSED] drm_test_modes_analog_tv_mono_576i [05:29:56] [PASSED] drm_test_modes_analog_tv_ntsc_480i [05:29:56] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined [05:29:56] [PASSED] drm_test_modes_analog_tv_pal_576i [05:29:56] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined [05:29:56] =============== [PASSED] drm_modes_analog_tv =============== [05:29:56] ============== drm_plane_helper (2 subtests) =============== [05:29:56] =============== drm_test_check_plane_state ================ [05:29:56] [PASSED] clipping_simple [05:29:56] [PASSED] clipping_rotate_reflect [05:29:56] [PASSED] positioning_simple [05:29:56] [PASSED] upscaling [05:29:56] [PASSED] downscaling [05:29:56] [PASSED] rounding1 [05:29:56] [PASSED] rounding2 [05:29:56] [PASSED] rounding3 [05:29:56] [PASSED] rounding4 [05:29:56] =========== [PASSED] drm_test_check_plane_state ============ [05:29:56] =========== drm_test_check_invalid_plane_state ============ [05:29:56] [PASSED] positioning_invalid [05:29:56] [PASSED] upscaling_invalid [05:29:56] [PASSED] downscaling_invalid [05:29:56] ======= [PASSED] drm_test_check_invalid_plane_state ======== [05:29:56] ================ [PASSED] drm_plane_helper ================= [05:29:56] ====== drm_connector_helper_tv_get_modes (1 subtest) ======= [05:29:56] ====== drm_test_connector_helper_tv_get_modes_check ======= [05:29:56] [PASSED] None [05:29:56] [PASSED] PAL [05:29:56] [PASSED] NTSC [05:29:56] [PASSED] Both, NTSC Default [05:29:56] [PASSED] Both, PAL Default [05:29:56] [PASSED] Both, NTSC Default, with PAL on command-line [05:29:56] [PASSED] Both, PAL Default, with NTSC on command-line [05:29:56] == [PASSED] drm_test_connector_helper_tv_get_modes_check === [05:29:56] ======== [PASSED] drm_connector_helper_tv_get_modes ======== [05:29:56] ================== drm_rect (9 subtests) =================== [05:29:56] [PASSED] drm_test_rect_clip_scaled_div_by_zero [05:29:56] [PASSED] drm_test_rect_clip_scaled_not_clipped [05:29:56] [PASSED] drm_test_rect_clip_scaled_clipped [05:29:56] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned [05:29:56] ================= drm_test_rect_intersect ================= [05:29:56] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0 [05:29:56] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1 [05:29:56] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0 [05:29:56] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1 [05:29:56] [PASSED] right x left: 2x1+0+0 x 3x1+1+0 [05:29:56] [PASSED] left x right: 3x1+1+0 x 2x1+0+0 [05:29:56] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1 [05:29:56] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0 [05:29:56] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1 [05:29:56] [PASSED] touching side: 1x1+0+0 x 1x1+1+0 [05:29:56] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0 [05:29:56] [PASSED] inside another: 2x2+0+0 x 1x1+1+1 [05:29:56] [PASSED] far away: 1x1+0+0 x 1x1+3+6 [05:29:56] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10 [05:29:56] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10 [05:29:56] ============= [PASSED] drm_test_rect_intersect ============= [05:29:56] ================ drm_test_rect_calc_hscale ================ [05:29:56] [PASSED] normal use [05:29:56] [PASSED] out of max range [05:29:56] [PASSED] out of min range [05:29:56] [PASSED] zero dst [05:29:56] [PASSED] negative src [05:29:56] [PASSED] negative dst [05:29:56] ============ [PASSED] drm_test_rect_calc_hscale ============ [05:29:56] ================ drm_test_rect_calc_vscale ================ [05:29:56] [PASSED] normal use [05:29:56] [PASSED] out of max range [05:29:56] [PASSED] out of min range [05:29:56] [PASSED] zero dst [05:29:56] [PASSED] negative src [05:29:56] [PASSED] negative dst stty: 'standard input': Inappropriate ioctl for device [05:29:56] ============ [PASSED] drm_test_rect_calc_vscale ============ [05:29:56] ================== drm_test_rect_rotate =================== [05:29:56] [PASSED] reflect-x [05:29:56] [PASSED] reflect-y [05:29:56] [PASSED] rotate-0 [05:29:56] [PASSED] rotate-90 [05:29:56] [PASSED] rotate-180 [05:29:56] [PASSED] rotate-270 [05:29:56] ============== [PASSED] drm_test_rect_rotate =============== [05:29:56] ================ drm_test_rect_rotate_inv ================= [05:29:56] [PASSED] reflect-x [05:29:56] [PASSED] reflect-y [05:29:56] [PASSED] rotate-0 [05:29:56] [PASSED] rotate-90 [05:29:56] [PASSED] rotate-180 [05:29:56] [PASSED] rotate-270 [05:29:56] ============ [PASSED] drm_test_rect_rotate_inv ============= [05:29:56] ==================== [PASSED] drm_rect ===================== [05:29:56] ============ drm_sysfb_modeset_test (1 subtest) ============ [05:29:56] ============ drm_test_sysfb_build_fourcc_list ============= [05:29:56] [PASSED] no native formats [05:29:56] [PASSED] XRGB8888 as native format [05:29:56] [PASSED] remove duplicates [05:29:56] [PASSED] convert alpha formats [05:29:56] [PASSED] random formats [05:29:56] ======== [PASSED] drm_test_sysfb_build_fourcc_list ========= [05:29:56] ============= [PASSED] drm_sysfb_modeset_test ============== [05:29:56] ================== drm_fixp (2 subtests) =================== [05:29:56] [PASSED] drm_test_int2fixp [05:29:56] [PASSED] drm_test_sm2fixp [05:29:56] ==================== [PASSED] drm_fixp ===================== [05:29:56] ============================================================ [05:29:56] Testing complete. Ran 621 tests: passed: 621 [05:29:56] Elapsed time: 26.042s total, 1.704s configuring, 24.171s building, 0.165s running + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig [05:29:56] Configuring KUnit Kernel ... Regenerating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [05:29:58] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [05:30:08] Starting KUnit Kernel (1/1)... [05:30:08] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [05:30:08] ================= ttm_device (5 subtests) ================== [05:30:08] [PASSED] ttm_device_init_basic [05:30:08] [PASSED] ttm_device_init_multiple [05:30:08] [PASSED] ttm_device_fini_basic [05:30:08] [PASSED] ttm_device_init_no_vma_man [05:30:08] ================== ttm_device_init_pools ================== [05:30:08] [PASSED] No DMA allocations, no DMA32 required [05:30:08] [PASSED] DMA allocations, DMA32 required [05:30:08] [PASSED] No DMA allocations, DMA32 required [05:30:08] [PASSED] DMA allocations, no DMA32 required [05:30:08] ============== [PASSED] ttm_device_init_pools ============== [05:30:08] =================== [PASSED] ttm_device ==================== [05:30:08] ================== ttm_pool (8 subtests) =================== [05:30:08] ================== ttm_pool_alloc_basic =================== [05:30:08] [PASSED] One page [05:30:08] [PASSED] More than one page [05:30:08] [PASSED] Above the allocation limit [05:30:08] [PASSED] One page, with coherent DMA mappings enabled [05:30:08] [PASSED] Above the allocation limit, with coherent DMA mappings enabled [05:30:08] ============== [PASSED] ttm_pool_alloc_basic =============== [05:30:08] ============== ttm_pool_alloc_basic_dma_addr ============== [05:30:08] [PASSED] One page [05:30:08] [PASSED] More than one page [05:30:08] [PASSED] Above the allocation limit [05:30:08] [PASSED] One page, with coherent DMA mappings enabled [05:30:08] [PASSED] Above the allocation limit, with coherent DMA mappings enabled [05:30:08] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ========== [05:30:08] [PASSED] ttm_pool_alloc_order_caching_match [05:30:08] [PASSED] ttm_pool_alloc_caching_mismatch [05:30:08] [PASSED] ttm_pool_alloc_order_mismatch [05:30:08] [PASSED] ttm_pool_free_dma_alloc [05:30:08] [PASSED] ttm_pool_free_no_dma_alloc [05:30:08] [PASSED] ttm_pool_fini_basic [05:30:08] ==================== [PASSED] ttm_pool ===================== [05:30:08] ================ ttm_resource (8 subtests) ================= [05:30:08] ================= ttm_resource_init_basic ================= [05:30:08] [PASSED] Init resource in TTM_PL_SYSTEM [05:30:08] [PASSED] Init resource in TTM_PL_VRAM [05:30:08] [PASSED] Init resource in a private placement [05:30:08] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags [05:30:08] ============= [PASSED] ttm_resource_init_basic ============= [05:30:08] [PASSED] ttm_resource_init_pinned [05:30:08] [PASSED] ttm_resource_fini_basic [05:30:08] [PASSED] ttm_resource_manager_init_basic [05:30:08] [PASSED] ttm_resource_manager_usage_basic [05:30:08] [PASSED] ttm_resource_manager_set_used_basic [05:30:08] [PASSED] ttm_sys_man_alloc_basic [05:30:08] [PASSED] ttm_sys_man_free_basic [05:30:08] ================== [PASSED] ttm_resource =================== [05:30:08] =================== ttm_tt (15 subtests) =================== [05:30:08] ==================== ttm_tt_init_basic ==================== [05:30:08] [PASSED] Page-aligned size [05:30:08] [PASSED] Extra pages requested [05:30:08] ================ [PASSED] ttm_tt_init_basic ================ [05:30:08] [PASSED] ttm_tt_init_misaligned [05:30:08] [PASSED] ttm_tt_fini_basic [05:30:08] [PASSED] ttm_tt_fini_sg [05:30:08] [PASSED] ttm_tt_fini_shmem [05:30:08] [PASSED] ttm_tt_create_basic [05:30:08] [PASSED] ttm_tt_create_invalid_bo_type [05:30:08] [PASSED] ttm_tt_create_ttm_exists [05:30:08] [PASSED] ttm_tt_create_failed [05:30:08] [PASSED] ttm_tt_destroy_basic [05:30:08] [PASSED] ttm_tt_populate_null_ttm [05:30:08] [PASSED] ttm_tt_populate_populated_ttm [05:30:08] [PASSED] ttm_tt_unpopulate_basic [05:30:08] [PASSED] ttm_tt_unpopulate_empty_ttm [05:30:08] [PASSED] ttm_tt_swapin_basic [05:30:08] ===================== [PASSED] ttm_tt ====================== [05:30:08] =================== ttm_bo (14 subtests) =================== [05:30:08] =========== ttm_bo_reserve_optimistic_no_ticket =========== [05:30:08] [PASSED] Cannot be interrupted and sleeps [05:30:08] [PASSED] Cannot be interrupted, locks straight away [05:30:08] [PASSED] Can be interrupted, sleeps [05:30:08] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket ======= [05:30:08] [PASSED] ttm_bo_reserve_locked_no_sleep [05:30:08] [PASSED] ttm_bo_reserve_no_wait_ticket [05:30:08] [PASSED] ttm_bo_reserve_double_resv [05:30:08] [PASSED] ttm_bo_reserve_interrupted [05:30:08] [PASSED] ttm_bo_reserve_deadlock [05:30:08] [PASSED] ttm_bo_unreserve_basic [05:30:08] [PASSED] ttm_bo_unreserve_pinned [05:30:08] [PASSED] ttm_bo_unreserve_bulk [05:30:08] [PASSED] ttm_bo_fini_basic [05:30:08] [PASSED] ttm_bo_fini_shared_resv [05:30:08] [PASSED] ttm_bo_pin_basic [05:30:08] [PASSED] ttm_bo_pin_unpin_resource [05:30:08] [PASSED] ttm_bo_multiple_pin_one_unpin [05:30:08] ===================== [PASSED] ttm_bo ====================== [05:30:08] ============== ttm_bo_validate (21 subtests) =============== [05:30:08] ============== ttm_bo_init_reserved_sys_man =============== [05:30:08] [PASSED] Buffer object for userspace [05:30:08] [PASSED] Kernel buffer object [05:30:08] [PASSED] Shared buffer object [05:30:08] ========== [PASSED] ttm_bo_init_reserved_sys_man =========== [05:30:08] ============== ttm_bo_init_reserved_mock_man ============== [05:30:08] [PASSED] Buffer object for userspace [05:30:08] [PASSED] Kernel buffer object [05:30:08] [PASSED] Shared buffer object [05:30:08] ========== [PASSED] ttm_bo_init_reserved_mock_man ========== [05:30:08] [PASSED] ttm_bo_init_reserved_resv [05:30:08] ================== ttm_bo_validate_basic ================== [05:30:08] [PASSED] Buffer object for userspace [05:30:08] [PASSED] Kernel buffer object [05:30:08] [PASSED] Shared buffer object [05:30:08] ============== [PASSED] ttm_bo_validate_basic ============== [05:30:08] [PASSED] ttm_bo_validate_invalid_placement [05:30:08] ============= ttm_bo_validate_same_placement ============== [05:30:08] [PASSED] System manager [05:30:08] [PASSED] VRAM manager [05:30:08] ========= [PASSED] ttm_bo_validate_same_placement ========== [05:30:08] [PASSED] ttm_bo_validate_failed_alloc [05:30:08] [PASSED] ttm_bo_validate_pinned [05:30:08] [PASSED] ttm_bo_validate_busy_placement [05:30:08] ================ ttm_bo_validate_multihop ================= [05:30:08] [PASSED] Buffer object for userspace [05:30:08] [PASSED] Kernel buffer object [05:30:08] [PASSED] Shared buffer object [05:30:08] ============ [PASSED] ttm_bo_validate_multihop ============= [05:30:08] ========== ttm_bo_validate_no_placement_signaled ========== [05:30:08] [PASSED] Buffer object in system domain, no page vector [05:30:08] [PASSED] Buffer object in system domain with an existing page vector [05:30:08] ====== [PASSED] ttm_bo_validate_no_placement_signaled ====== [05:30:08] ======== ttm_bo_validate_no_placement_not_signaled ======== [05:30:08] [PASSED] Buffer object for userspace [05:30:08] [PASSED] Kernel buffer object [05:30:08] [PASSED] Shared buffer object [05:30:08] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ==== [05:30:08] [PASSED] ttm_bo_validate_move_fence_signaled [05:30:08] ========= ttm_bo_validate_move_fence_not_signaled ========= [05:30:08] [PASSED] Waits for GPU [05:30:08] [PASSED] Tries to lock straight away [05:30:08] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled ===== [05:30:08] [PASSED] ttm_bo_validate_happy_evict [05:30:08] [PASSED] ttm_bo_validate_all_pinned_evict [05:30:08] [PASSED] ttm_bo_validate_allowed_only_evict [05:30:08] [PASSED] ttm_bo_validate_deleted_evict [05:30:08] [PASSED] ttm_bo_validate_busy_domain_evict [05:30:08] [PASSED] ttm_bo_validate_evict_gutting [05:30:08] [PASSED] ttm_bo_validate_recrusive_evict stty: 'standard input': Inappropriate ioctl for device [05:30:08] ================= [PASSED] ttm_bo_validate ================= [05:30:08] ============================================================ [05:30:08] Testing complete. Ran 101 tests: passed: 101 [05:30:08] Elapsed time: 11.545s total, 1.743s configuring, 9.585s building, 0.169s running + cleanup ++ stat -c %u:%g /kernel + chown -R 1003:1003 /kernel ^ permalink raw reply [flat|nested] 10+ messages in thread
* ✓ Xe.CI.BAT: success for drm/xe: Add support for GPU health indicator 2026-03-09 5:17 [PATCH 0/3] drm/xe: Add support for GPU health indicator Soham Purkait ` (4 preceding siblings ...) 2026-03-09 5:30 ` ✓ CI.KUnit: success " Patchwork @ 2026-03-09 6:36 ` Patchwork 2026-03-09 8:31 ` ✗ Xe.CI.FULL: failure " Patchwork 6 siblings, 0 replies; 10+ messages in thread From: Patchwork @ 2026-03-09 6:36 UTC (permalink / raw) To: Soham Purkait; +Cc: intel-xe [-- Attachment #1: Type: text/plain, Size: 2343 bytes --] == Series Details == Series: drm/xe: Add support for GPU health indicator URL : https://patchwork.freedesktop.org/series/162833/ State : success == Summary == CI Bug Log - changes from xe-4678-6884fe03ff2bc5a2f501ba4710f950dd4933ac84_BAT -> xe-pw-162833v1_BAT ==================================================== Summary ------- **SUCCESS** No regressions found. Participating hosts (13 -> 14) ------------------------------ Additional (1): bat-bmg-3 Known issues ------------ Here are the changes found in xe-pw-162833v1_BAT that come from known issues: ### IGT changes ### #### Issues hit #### * igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1: - bat-adlp-7: [PASS][1] -> [DMESG-WARN][2] ([Intel XE#7483]) [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4678-6884fe03ff2bc5a2f501ba4710f950dd4933ac84/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html * igt@xe_peer2peer@read@read-gpua-vram01-gpub-system-p2p: - bat-bmg-3: NOTRUN -> [SKIP][3] ([Intel XE#6566]) +3 other tests skip [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/bat-bmg-3/igt@xe_peer2peer@read@read-gpua-vram01-gpub-system-p2p.html #### Possible fixes #### * igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1: - bat-adlp-7: [DMESG-WARN][4] ([Intel XE#7483]) -> [PASS][5] [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4678-6884fe03ff2bc5a2f501ba4710f950dd4933ac84/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1.html [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1.html [Intel XE#6566]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6566 [Intel XE#7483]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7483 Build changes ------------- * Linux: xe-4678-6884fe03ff2bc5a2f501ba4710f950dd4933ac84 -> xe-pw-162833v1 IGT_8784: c7d12b3499ef1698373f246748e68c05ada0579e @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git xe-4678-6884fe03ff2bc5a2f501ba4710f950dd4933ac84: 6884fe03ff2bc5a2f501ba4710f950dd4933ac84 xe-pw-162833v1: 162833v1 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/index.html [-- Attachment #2: Type: text/html, Size: 3039 bytes --] ^ permalink raw reply [flat|nested] 10+ messages in thread
* ✗ Xe.CI.FULL: failure for drm/xe: Add support for GPU health indicator 2026-03-09 5:17 [PATCH 0/3] drm/xe: Add support for GPU health indicator Soham Purkait ` (5 preceding siblings ...) 2026-03-09 6:36 ` ✓ Xe.CI.BAT: " Patchwork @ 2026-03-09 8:31 ` Patchwork 6 siblings, 0 replies; 10+ messages in thread From: Patchwork @ 2026-03-09 8:31 UTC (permalink / raw) To: Soham Purkait; +Cc: intel-xe [-- Attachment #1: Type: text/plain, Size: 14365 bytes --] == Series Details == Series: drm/xe: Add support for GPU health indicator URL : https://patchwork.freedesktop.org/series/162833/ State : failure == Summary == CI Bug Log - changes from xe-4678-6884fe03ff2bc5a2f501ba4710f950dd4933ac84_FULL -> xe-pw-162833v1_FULL ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with xe-pw-162833v1_FULL absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in xe-pw-162833v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (2 -> 2) ------------------------------ No changes in participating hosts Possible new issues ------------------- Here are the unknown changes that may have been introduced in xe-pw-162833v1_FULL: ### IGT changes ### #### Possible regressions #### * igt@kms_plane@pixel-format-linear-modifier@pipe-a-plane-0: - shard-lnl: [PASS][1] -> [FAIL][2] +2 other tests fail [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4678-6884fe03ff2bc5a2f501ba4710f950dd4933ac84/shard-lnl-7/igt@kms_plane@pixel-format-linear-modifier@pipe-a-plane-0.html [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/shard-lnl-1/igt@kms_plane@pixel-format-linear-modifier@pipe-a-plane-0.html Known issues ------------ Here are the changes found in xe-pw-162833v1_FULL that come from known issues: ### IGT changes ### #### Issues hit #### * igt@kms_big_fb@linear-64bpp-rotate-270: - shard-bmg: NOTRUN -> [SKIP][3] ([Intel XE#2327]) +2 other tests skip [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/shard-bmg-5/igt@kms_big_fb@linear-64bpp-rotate-270.html * igt@kms_big_fb@yf-tiled-8bpp-rotate-180: - shard-bmg: NOTRUN -> [SKIP][4] ([Intel XE#1124]) +4 other tests skip [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/shard-bmg-4/igt@kms_big_fb@yf-tiled-8bpp-rotate-180.html * igt@kms_bw@linear-tiling-2-displays-1920x1080p: - shard-bmg: NOTRUN -> [SKIP][5] ([Intel XE#367] / [Intel XE#7354]) [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/shard-bmg-9/igt@kms_bw@linear-tiling-2-displays-1920x1080p.html * igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs@pipe-c-dp-2: - shard-bmg: NOTRUN -> [SKIP][6] ([Intel XE#2652]) +8 other tests skip [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/shard-bmg-5/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs@pipe-c-dp-2.html * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs: - shard-bmg: NOTRUN -> [SKIP][7] ([Intel XE#3432]) [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs.html * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs: - shard-bmg: NOTRUN -> [SKIP][8] ([Intel XE#2887]) [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/shard-bmg-9/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs.html * igt@kms_chamelium_hpd@dp-hpd-for-each-pipe: - shard-bmg: NOTRUN -> [SKIP][9] ([Intel XE#2252]) +2 other tests skip [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/shard-bmg-5/igt@kms_chamelium_hpd@dp-hpd-for-each-pipe.html * igt@kms_content_protection@dp-mst-lic-type-0: - shard-bmg: NOTRUN -> [SKIP][10] ([Intel XE#2390] / [Intel XE#6974]) [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/shard-bmg-5/igt@kms_content_protection@dp-mst-lic-type-0.html * igt@kms_content_protection@type1: - shard-bmg: NOTRUN -> [SKIP][11] ([Intel XE#2341]) [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/shard-bmg-9/igt@kms_content_protection@type1.html * igt@kms_cursor_crc@cursor-random-max-size: - shard-bmg: NOTRUN -> [SKIP][12] ([Intel XE#2320]) [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/shard-bmg-9/igt@kms_cursor_crc@cursor-random-max-size.html * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-3: - shard-bmg: NOTRUN -> [SKIP][13] ([Intel XE#1340] / [Intel XE#7435]) [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/shard-bmg-9/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-3.html * igt@kms_flip@flip-vs-expired-vblank@a-edp1: - shard-lnl: [PASS][14] -> [FAIL][15] ([Intel XE#301]) +1 other test fail [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4678-6884fe03ff2bc5a2f501ba4710f950dd4933ac84/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc: - shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#2311]) +5 other tests skip [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/shard-bmg-9/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff: - shard-bmg: NOTRUN -> [SKIP][17] ([Intel XE#4141]) +4 other tests skip [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/shard-bmg-9/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-msflip-blt: - shard-bmg: NOTRUN -> [SKIP][18] ([Intel XE#2313]) +8 other tests skip [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-msflip-blt.html * igt@kms_frontbuffer_tracking@fbcpsr-argb161616f-draw-render: - shard-bmg: NOTRUN -> [SKIP][19] ([Intel XE#7061] / [Intel XE#7356]) +3 other tests skip [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/shard-bmg-9/igt@kms_frontbuffer_tracking@fbcpsr-argb161616f-draw-render.html * igt@kms_plane@pixel-format-yf-tiled-modifier: - shard-bmg: NOTRUN -> [SKIP][20] ([Intel XE#7283]) [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/shard-bmg-9/igt@kms_plane@pixel-format-yf-tiled-modifier.html * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-a: - shard-bmg: NOTRUN -> [SKIP][21] ([Intel XE#2763] / [Intel XE#6886]) +4 other tests skip [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/shard-bmg-9/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-a.html * igt@kms_pm_rpm@modeset-lpsp-stress: - shard-bmg: NOTRUN -> [SKIP][22] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#7383] / [Intel XE#836]) +1 other test skip [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/shard-bmg-5/igt@kms_pm_rpm@modeset-lpsp-stress.html * igt@kms_psr@psr2-no-drrs: - shard-bmg: NOTRUN -> [SKIP][23] ([Intel XE#2234] / [Intel XE#2850]) +4 other tests skip [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/shard-bmg-9/igt@kms_psr@psr2-no-drrs.html * igt@kms_sharpness_filter@filter-dpms: - shard-bmg: NOTRUN -> [SKIP][24] ([Intel XE#6503]) [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/shard-bmg-9/igt@kms_sharpness_filter@filter-dpms.html * igt@xe_eudebug@attach-debug-metadata: - shard-bmg: NOTRUN -> [SKIP][25] ([Intel XE#4837]) [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/shard-bmg-9/igt@xe_eudebug@attach-debug-metadata.html * igt@xe_eudebug_online@pagefault-one-of-many: - shard-bmg: NOTRUN -> [SKIP][26] ([Intel XE#6665]) [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/shard-bmg-9/igt@xe_eudebug_online@pagefault-one-of-many.html * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-rebind: - shard-bmg: NOTRUN -> [SKIP][27] ([Intel XE#2322] / [Intel XE#7372]) +1 other test skip [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/shard-bmg-5/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-rebind.html * igt@xe_exec_fault_mode@many-execqueues-multi-queue-invalid-userptr-fault: - shard-bmg: NOTRUN -> [SKIP][28] ([Intel XE#7136]) +3 other tests skip [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/shard-bmg-9/igt@xe_exec_fault_mode@many-execqueues-multi-queue-invalid-userptr-fault.html * igt@xe_exec_multi_queue@few-execs-preempt-mode-userptr-invalidate: - shard-bmg: NOTRUN -> [SKIP][29] ([Intel XE#6874]) +5 other tests skip [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/shard-bmg-9/igt@xe_exec_multi_queue@few-execs-preempt-mode-userptr-invalidate.html * igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-basic: - shard-bmg: NOTRUN -> [SKIP][30] ([Intel XE#7138]) [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/shard-bmg-9/igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-basic.html * igt@xe_multigpu_svm@mgpu-coherency-fail-prefetch: - shard-bmg: NOTRUN -> [SKIP][31] ([Intel XE#6964]) [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/shard-bmg-9/igt@xe_multigpu_svm@mgpu-coherency-fail-prefetch.html * igt@xe_query@multigpu-query-invalid-extension: - shard-bmg: NOTRUN -> [SKIP][32] ([Intel XE#944]) [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/shard-bmg-9/igt@xe_query@multigpu-query-invalid-extension.html #### Warnings #### * igt@kms_hdr@brightness-with-hdr: - shard-bmg: [SKIP][33] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][34] ([Intel XE#3544]) [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4678-6884fe03ff2bc5a2f501ba4710f950dd4933ac84/shard-bmg-7/igt@kms_hdr@brightness-with-hdr.html [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/shard-bmg-9/igt@kms_hdr@brightness-with-hdr.html * igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv: - shard-bmg: [ABORT][35] ([Intel XE#5466] / [Intel XE#6652]) -> [ABORT][36] ([Intel XE#5466] / [Intel XE#6652] / [Intel XE#7577]) [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4678-6884fe03ff2bc5a2f501ba4710f950dd4933ac84/shard-bmg-6/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/shard-bmg-6/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124 [Intel XE#1340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1340 [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439 [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234 [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252 [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311 [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313 [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320 [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322 [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327 [Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341 [Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390 [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652 [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763 [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850 [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887 [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301 [Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141 [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374 [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432 [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544 [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367 [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141 [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837 [Intel XE#5466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5466 [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503 [Intel XE#6652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6652 [Intel XE#6665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6665 [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874 [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886 [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964 [Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974 [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061 [Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136 [Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138 [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283 [Intel XE#7354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7354 [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356 [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372 [Intel XE#7383]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7383 [Intel XE#7435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7435 [Intel XE#7577]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7577 [Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836 [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944 Build changes ------------- * Linux: xe-4678-6884fe03ff2bc5a2f501ba4710f950dd4933ac84 -> xe-pw-162833v1 IGT_8784: c7d12b3499ef1698373f246748e68c05ada0579e @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git xe-4678-6884fe03ff2bc5a2f501ba4710f950dd4933ac84: 6884fe03ff2bc5a2f501ba4710f950dd4933ac84 xe-pw-162833v1: 162833v1 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162833v1/index.html [-- Attachment #2: Type: text/html, Size: 15774 bytes --] ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2026-04-14 11:16 UTC | newest] Thread overview: 10+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-03-09 5:17 [PATCH 0/3] drm/xe: Add support for GPU health indicator Soham Purkait 2026-03-09 5:17 ` [PATCH 1/3] From: Anoop Vijay <anoop.c.vijay@intel.com> Soham Purkait 2026-03-09 5:17 ` [PATCH 2/3] drm/xe/xe_ras: Add structures and commands for RAS GPU health indicator Soham Purkait 2026-03-09 5:17 ` [PATCH 3/3] drm/xe/xe_ras: Add RAS support for " Soham Purkait 2026-04-08 11:49 ` Nilawar, Badal 2026-04-14 11:16 ` Purkait, Soham 2026-03-09 5:28 ` ✗ CI.checkpatch: warning for drm/xe: Add " Patchwork 2026-03-09 5:30 ` ✓ CI.KUnit: success " Patchwork 2026-03-09 6:36 ` ✓ Xe.CI.BAT: " Patchwork 2026-03-09 8:31 ` ✗ Xe.CI.FULL: failure " Patchwork
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