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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org
Subject: [PATCH 1/3] drm/i915/de: Introduce intel_de.c and move intel_de_{read, write}8() there
Date: Fri, 13 Mar 2026 13:10:26 +0200	[thread overview]
Message-ID: <20260313111028.25159-2-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20260313111028.25159-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

intel_de_{read,write}() aren't performance critical so having them
as static inline is pointless. Introduce intel_de.c and move the
implementation there.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/Makefile           |  1 +
 drivers/gpu/drm/i915/display/intel_de.c | 23 +++++++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_de.h | 22 +++-------------------
 drivers/gpu/drm/xe/Makefile             |  1 +
 4 files changed, 28 insertions(+), 19 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/display/intel_de.c

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 7e9d9b666511..099f7b68bb30 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -253,6 +253,7 @@ i915-y += \
 	display/intel_crtc_state_dump.o \
 	display/intel_cursor.o \
 	display/intel_dbuf_bw.o \
+	display/intel_de.o \
 	display/intel_display.o \
 	display/intel_display_conversion.o \
 	display/intel_display_driver.o \
diff --git a/drivers/gpu/drm/i915/display/intel_de.c b/drivers/gpu/drm/i915/display/intel_de.c
new file mode 100644
index 000000000000..5348c1d51eb8
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_de.c
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#include <drm/drm_print.h>
+
+#include "intel_de.h"
+
+u8 intel_de_read8(struct intel_display *display, i915_reg_t reg)
+{
+	/* this is only used on VGA registers (possible on pre-g4x) */
+	drm_WARN_ON(display->drm, DISPLAY_VER(display) >= 5 || display->platform.g4x);
+
+	return intel_uncore_read8(__to_uncore(display), reg);
+}
+
+void intel_de_write8(struct intel_display *display, i915_reg_t reg, u8 val)
+{
+	drm_WARN_ON(display->drm, DISPLAY_VER(display) >= 5 || display->platform.g4x);
+
+	intel_uncore_write8(__to_uncore(display), reg, val);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_de.h b/drivers/gpu/drm/i915/display/intel_de.h
index f30f3f8ebee1..8ca5904ba84e 100644
--- a/drivers/gpu/drm/i915/display/intel_de.h
+++ b/drivers/gpu/drm/i915/display/intel_de.h
@@ -6,8 +6,6 @@
 #ifndef __INTEL_DE_H__
 #define __INTEL_DE_H__
 
-#include <drm/drm_print.h>
-
 #include "intel_display_core.h"
 #include "intel_dmc_wl.h"
 #include "intel_dsb.h"
@@ -19,6 +17,9 @@ static inline struct intel_uncore *__to_uncore(struct intel_display *display)
 	return to_intel_uncore(display->drm);
 }
 
+u8 intel_de_read8(struct intel_display *display, i915_reg_t reg);
+void intel_de_write8(struct intel_display *display, i915_reg_t reg, u8 val);
+
 static inline u32
 intel_de_read(struct intel_display *display, i915_reg_t reg)
 {
@@ -33,23 +34,6 @@ intel_de_read(struct intel_display *display, i915_reg_t reg)
 	return val;
 }
 
-static inline u8
-intel_de_read8(struct intel_display *display, i915_reg_t reg)
-{
-	/* this is only used on VGA registers (possible on pre-g4x) */
-	drm_WARN_ON(display->drm, DISPLAY_VER(display) >= 5 || display->platform.g4x);
-
-	return intel_uncore_read8(__to_uncore(display), reg);
-}
-
-static inline void
-intel_de_write8(struct intel_display *display, i915_reg_t reg, u8 val)
-{
-	drm_WARN_ON(display->drm, DISPLAY_VER(display) >= 5 || display->platform.g4x);
-
-	intel_uncore_write8(__to_uncore(display), reg, val);
-}
-
 static inline u64
 intel_de_read64_2x32(struct intel_display *display,
 		     i915_reg_t lower_reg, i915_reg_t upper_reg)
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 50608312bc66..0399a5f9a107 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -251,6 +251,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
 	i915-display/intel_dbuf_bw.o \
 	i915-display/intel_ddi.o \
 	i915-display/intel_ddi_buf_trans.o \
+	i915-display/intel_de.o \
 	i915-display/intel_display.o \
 	i915-display/intel_display_conversion.o \
 	i915-display/intel_display_device.o \
-- 
2.52.0


  reply	other threads:[~2026-03-13 11:10 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-13 11:10 [PATCH 0/3] drm/i915/de: Move register polling into display code Ville Syrjala
2026-03-13 11:10 ` Ville Syrjala [this message]
2026-03-13 14:21   ` [PATCH 1/3] drm/i915/de: Introduce intel_de.c and move intel_de_{read, write}8() there Jani Nikula
2026-03-13 11:10 ` [PATCH 2/3] drm/i915/de: Move intel_de_wait*() into intel_de.c Ville Syrjala
2026-03-13 14:21   ` Jani Nikula
2026-03-13 11:10 ` [PATCH 3/3] drm/i915/de: Implement register polling in the display code Ville Syrjala
2026-03-13 15:03   ` Jani Nikula
2026-03-17  7:52     ` Ville Syrjälä
2026-03-23  9:50     ` Ville Syrjälä
2026-03-14  8:09   ` kernel test robot
2026-03-23  9:43   ` [PATCH v2 " Ville Syrjala
2026-03-13 11:15 ` ✗ CI.checkpatch: warning for drm/i915/de: Move register polling into " Patchwork
2026-03-13 11:17 ` ✓ CI.KUnit: success " Patchwork
2026-03-13 11:51 ` ✓ Xe.CI.BAT: " Patchwork
2026-03-14 14:29 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-03-23 10:43 ` ✗ CI.checkpatch: warning for drm/i915/de: Move register polling into display code (rev2) Patchwork
2026-03-23 10:45 ` ✓ CI.KUnit: success " Patchwork
2026-03-23 11:26 ` ✓ Xe.CI.BAT: " Patchwork
2026-03-23 13:56 ` ✓ Xe.CI.FULL: " Patchwork

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