From: Gustavo Sousa <gustavo.sousa@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: Gustavo Sousa <gustavo.sousa@intel.com>,
Matt Roper <matthew.d.roper@intel.com>
Subject: [PATCH v2 5/8] drm/xe: Extract xe_hw_engine_setup_reg_lrc()
Date: Fri, 08 May 2026 18:42:35 -0300 [thread overview]
Message-ID: <20260508-rtp-mcr-check-v2-5-9897b147a5d2@intel.com> (raw)
In-Reply-To: <20260508-rtp-mcr-check-v2-0-9897b147a5d2@intel.com>
The steps for processing RTP rules that build up an engine's reg_lrc
arguably belongs to xe_hw_engine.c and should be encapsulated into a
function in that unit.
Move that logic to a new function called xe_hw_engine_setup_reg_lrc().
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
With the dropping of patch "drm/xe/kunit: Include hw_engines in xe_wa
test" from v1, this patch is not really required anymore, but it is a
good refactor IMO, so I decided to keep it in the series.
---
drivers/gpu/drm/xe/xe_gt.c | 5 +----
drivers/gpu/drm/xe/xe_hw_engine.c | 15 +++++++++++++--
drivers/gpu/drm/xe/xe_hw_engine.h | 2 +-
3 files changed, 15 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index cdc678d1ae1f..c4b25daad542 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -393,10 +393,7 @@ int xe_gt_record_default_lrcs(struct xe_gt *gt)
if (gt->default_lrc[hwe->class])
continue;
- xe_reg_sr_init(&hwe->reg_lrc, hwe->name, xe);
- xe_wa_process_lrc(hwe);
- xe_hw_engine_setup_default_lrc_state(hwe);
- xe_tuning_process_lrc(hwe);
+ xe_hw_engine_setup_reg_lrc(hwe);
default_lrc = drmm_kzalloc(&xe->drm,
xe_gt_lrc_size(gt, hwe->class),
diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
index 0f0e08bcc182..05f0932dbb94 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine.c
+++ b/drivers/gpu/drm/xe/xe_hw_engine.c
@@ -337,8 +337,8 @@ static bool xe_rtp_cfeg_wmtp_disabled(const struct xe_device *xe,
return xe_mmio_read32(&hwe->gt->mmio, XEHP_FUSE4) & CFEG_WMTP_DISABLE;
}
-void
-xe_hw_engine_setup_default_lrc_state(struct xe_hw_engine *hwe)
+static void
+hw_engine_setup_default_lrc_state(struct xe_hw_engine *hwe)
{
struct xe_gt *gt = hwe->gt;
const u8 mocs_write_idx = gt->mocs.uc_index;
@@ -375,6 +375,17 @@ xe_hw_engine_setup_default_lrc_state(struct xe_hw_engine *hwe)
&hwe->reg_lrc, true);
}
+void xe_hw_engine_setup_reg_lrc(struct xe_hw_engine *hwe)
+{
+ struct xe_gt *gt = hwe->gt;
+ struct xe_device *xe = gt_to_xe(gt);
+
+ xe_reg_sr_init(&hwe->reg_lrc, hwe->name, xe);
+ xe_wa_process_lrc(hwe);
+ hw_engine_setup_default_lrc_state(hwe);
+ xe_tuning_process_lrc(hwe);
+}
+
static void
hw_engine_setup_default_state(struct xe_hw_engine *hwe)
{
diff --git a/drivers/gpu/drm/xe/xe_hw_engine.h b/drivers/gpu/drm/xe/xe_hw_engine.h
index ee9218773b51..c3ee37f8cfc0 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine.h
+++ b/drivers/gpu/drm/xe/xe_hw_engine.h
@@ -59,7 +59,7 @@ struct xe_hw_engine_snapshot *
xe_hw_engine_snapshot_capture(struct xe_hw_engine *hwe, struct xe_exec_queue *q);
void xe_hw_engine_snapshot_free(struct xe_hw_engine_snapshot *snapshot);
void xe_hw_engine_print(struct xe_hw_engine *hwe, struct drm_printer *p);
-void xe_hw_engine_setup_default_lrc_state(struct xe_hw_engine *hwe);
+void xe_hw_engine_setup_reg_lrc(struct xe_hw_engine *hwe);
bool xe_hw_engine_is_reserved(struct xe_hw_engine *hwe);
--
2.53.0
next prev parent reply other threads:[~2026-05-08 21:43 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-08 21:42 [PATCH v2 0/8] Fix MCR inconsistencies in RTP tables Gustavo Sousa
2026-05-08 21:42 ` [PATCH v2 1/8] drm/xe: Define CACHE_MODE_1 as MCR register Gustavo Sousa
2026-05-08 21:42 ` [PATCH v2 2/8] drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN1 Gustavo Sousa
2026-05-08 21:42 ` [PATCH v2 3/8] drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN4 Gustavo Sousa
2026-05-13 22:35 ` Matt Roper
2026-05-08 21:42 ` [PATCH v2 4/8] drm/xe/kunit: Add xe_kunit_helper_is_live_test() Gustavo Sousa
2026-05-11 10:37 ` Jani Nikula
2026-05-11 11:45 ` Gustavo Sousa
2026-05-11 12:03 ` Jani Nikula
2026-05-11 12:30 ` Gustavo Sousa
2026-05-11 20:33 ` Rodrigo Vivi
2026-05-11 21:01 ` Gustavo Sousa
2026-05-12 19:00 ` Rodrigo Vivi
2026-05-12 19:26 ` Michal Wajdeczko
2026-05-13 13:03 ` Gustavo Sousa
2026-05-13 12:58 ` Gustavo Sousa
2026-05-08 21:42 ` Gustavo Sousa [this message]
2026-05-08 21:42 ` [PATCH v2 6/8] drm/xe/kunit: Use KUNIT_EXPECT_EQ() in xe_wa_gt() Gustavo Sousa
2026-05-08 21:42 ` [PATCH v2 7/8] drm/xe/mcr: Extract reg_in_steering_type_ranges() Gustavo Sousa
2026-05-08 21:42 ` [PATCH v2 8/8] drm/xe/reg_sr: Do sanity check for MCR vs non-MCR Gustavo Sousa
2026-05-13 22:49 ` Matt Roper
2026-05-08 21:50 ` ✓ CI.KUnit: success for Fix MCR inconsistencies in RTP tables (rev2) Patchwork
2026-05-08 23:04 ` ✓ Xe.CI.BAT: " Patchwork
2026-05-09 10:54 ` ✗ Xe.CI.FULL: failure " Patchwork
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