* [PATCH v4 0/8] drm/xe: add page size allocation mode control and coverage
@ 2026-07-13 2:25 Nareshkumar Gollakoti
2026-07-13 2:25 ` [PATCH v4 1/8] drm/xe: add page size allocation control state to xe_device Nareshkumar Gollakoti
` (9 more replies)
0 siblings, 10 replies; 11+ messages in thread
From: Nareshkumar Gollakoti @ 2026-07-13 2:25 UTC (permalink / raw)
To: intel-xe; +Cc: himal.prasad.ghimiray, naresh.kumar.g
Some platforms support multiple page sizes for user BO allocations,
including 4K, 64K, 2M, and 1G.
For validation and debug, it is useful to control the page size
selection policy for user BOs so that specific allocation paths can be
exercised deterministically. In particular, this makes it possible to
force allocations into 2M-only, 1G-only, or mixed modes.
In mixed mode, allocations are distributed across the supported page
sizes in a round-robin manner. For example, for four user BOs, the
selected page sizes would be:
- BO1: 4K
- BO2: 64K
- BO3: 2M
- BO4: 1G
This series adds debug page-size allocation control for user BO in xe
This series includes:
- debug control state in xe_device
- add Kconfig option for debug page-size allocation control
- a debugfs knob to select allocation mode
- 1G BO alignment flag handling
- debug policy application at user BO create time
- propagation into VMA map flags
- PT bind support for selecting leaf level (4K/64K, 2M, 1G paths)
- add live Kunit coverage for BO page size allocation
The default path is unchanged when the debug control is not enabled.
v2
-- addressed v1 comments at
https://patchwork.freedesktop.org/series/169640/
v3
- refactor the design
- update patches based on review feedback
- due to space missing after drm/xe: it created a new series
https://patchwork.freedesktop.org/series/170246/
v4
- initialize page-size control state before userspace-visible registration
- add Kconfig support before CONFIG_DRM_XE_DEBUG_PAGE_SIZE users
- limit debugfs and BO policy handling to supported dGFX VRAM paths
- add fast-path mode checks and ALIGN() overflow handling
- preserve existing BO NEEDS_* flags
- defer mixed-mode index advancement until successful
BO create ioctl completion
- replace 2M/1G vma_flags propagation with stable target_leaf_level state
- propagate target_leaf_level from bind op to VMA and into PT bind
- allow smaller huge-page fallback and fix clear_pt handling in PT walk
- skip VRAM-only live KUnit tests on non-dGFX
and restore state on all exits
Nareshkumar Gollakoti (8):
drm/xe: add page size allocation control state to xe_device
drm/xe: add Kconfig option for debug page-size allocation control
drm/xe/debugfs: add page-size allocation mode knob
drm/xe: add XE_BO_FLAG_NEEDS_1G for minimum page-size sizing
drm/xe: apply debug page-size allocation policy to user BOs
drm/xe/vm: propagate BO page-size requirements to VMA map flags
drm/xe/pt: allow selecting the bind leaf PTE level
drm/xe/tests: add live KUnit coverage for BO page-size allocation
modes
drivers/gpu/drm/xe/Kconfig.debug | 16 ++
drivers/gpu/drm/xe/tests/xe_bo.c | 244 ++++++++++++++++++++
drivers/gpu/drm/xe/tests/xe_live_test_mod.c | 2 +
drivers/gpu/drm/xe/xe_bo.c | 157 ++++++++++++-
drivers/gpu/drm/xe/xe_bo.h | 1 +
drivers/gpu/drm/xe/xe_debugfs.c | 62 +++++
drivers/gpu/drm/xe/xe_device.c | 9 +
drivers/gpu/drm/xe/xe_device_types.h | 25 ++
drivers/gpu/drm/xe/xe_pt.c | 29 ++-
drivers/gpu/drm/xe/xe_vm.c | 23 ++
drivers/gpu/drm/xe/xe_vm_types.h | 9 +
11 files changed, 573 insertions(+), 4 deletions(-)
--
2.43.0
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v4 1/8] drm/xe: add page size allocation control state to xe_device
2026-07-13 2:25 [PATCH v4 0/8] drm/xe: add page size allocation mode control and coverage Nareshkumar Gollakoti
@ 2026-07-13 2:25 ` Nareshkumar Gollakoti
2026-07-13 2:25 ` [PATCH v4 2/8] drm/xe: add Kconfig option for debug page-size allocation control Nareshkumar Gollakoti
` (8 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Nareshkumar Gollakoti @ 2026-07-13 2:25 UTC (permalink / raw)
To: intel-xe; +Cc: himal.prasad.ghimiray, naresh.kumar.g
Introduce xe_page_size_alloc_ctrl_mode and add page_size_alloc_ctrl
state to struct xe_device along with mutex lock.
The new control supports forcing user BO allocations to 2M pages,
forcing them to 1G pages, or using a mixed round-robin mode across
4K, 64K, 2M, and 1G page sizes. Track the current mixed-mode index
in xe_device so allocation policy can be applied consistently.
v2
- make cur_index to atomic as update need in later patch to
avoid race/concurency (sashiko)
v3
- reworded comments
- protect mode/index updates with a mutex for proper concurrency handling
v4(sashiko)
- move xe_debug_page_size_alloc_ctrl_init() before drm_dev_register(),
so mutex and control states are initialized
before any userspace visibility
Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
drivers/gpu/drm/xe/xe_device.c | 9 +++++++++
drivers/gpu/drm/xe/xe_device_types.h | 25 +++++++++++++++++++++++++
2 files changed, 34 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index c9fa4bfed2b9..6143e3603023 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -923,6 +923,13 @@ static void xe_device_wedged_fini(struct drm_device *drm, void *arg)
xe_pm_runtime_put(xe);
}
+static void xe_debug_page_size_alloc_ctrl_init(struct xe_device *xe)
+{
+ mutex_init(&xe->page_size_alloc_ctrl.lock);
+ xe->page_size_alloc_ctrl.mode = XE_PAGE_SIZE_ALLOC_CTRL_MODE_NONE;
+ xe->page_size_alloc_ctrl.cur_index = 0;
+}
+
int xe_device_probe(struct xe_device *xe)
{
struct xe_tile *tile;
@@ -1075,6 +1082,8 @@ int xe_device_probe(struct xe_device *xe)
if (err)
return err;
+ xe_debug_page_size_alloc_ctrl_init(xe);
+
err = drm_dev_register(&xe->drm, 0);
if (err)
return err;
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 022e08205897..8cd70756413b 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -61,6 +61,21 @@ enum xe_wedged_mode {
XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET = 2,
};
+/**
+ * enum xe_page_size_alloc_ctrl_mode - User BO page-size allocation control modes
+ * @XE_PAGE_SIZE_ALLOC_CTRL_MODE_NONE: Use the normal allocation policy
+ * @XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_2M: Force user BO allocations to 2M pages
+ * @XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_1G: Force user BO allocations to 1G pages
+ * @XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED: Select page sizes in round-robin order
+ * (4K, 64K, 2M, 1G)
+ */
+enum xe_page_size_alloc_ctrl_mode {
+ XE_PAGE_SIZE_ALLOC_CTRL_MODE_NONE = 0,
+ XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_2M,
+ XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_1G,
+ XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED
+};
+
#define XE_BO_INVALID_OFFSET LONG_MAX
#define GRAPHICS_VER(xe) ((xe)->info.graphics_verx100 / 100)
@@ -474,6 +489,16 @@ struct xe_device {
/** @late_bind: xe mei late bind interface */
struct xe_late_bind late_bind;
+ /** @page_size_alloc_ctrl: User BO page-size allocation debug control state */
+ struct {
+ /** @mode: xe page size allocation control mode */
+ enum xe_page_size_alloc_ctrl_mode mode;
+ /** @cur_index: Round-robin index used by mixed mode */
+ u32 cur_index;
+ /** @lock: Protects @mode and @cur_index */
+ struct mutex lock;
+ } page_size_alloc_ctrl;
+
/** @oa: oa observation subsystem */
struct xe_oa oa;
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v4 2/8] drm/xe: add Kconfig option for debug page-size allocation control
2026-07-13 2:25 [PATCH v4 0/8] drm/xe: add page size allocation mode control and coverage Nareshkumar Gollakoti
2026-07-13 2:25 ` [PATCH v4 1/8] drm/xe: add page size allocation control state to xe_device Nareshkumar Gollakoti
@ 2026-07-13 2:25 ` Nareshkumar Gollakoti
2026-07-13 2:25 ` [PATCH v4 3/8] drm/xe/debugfs: add page-size allocation mode knob Nareshkumar Gollakoti
` (7 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Nareshkumar Gollakoti @ 2026-07-13 2:25 UTC (permalink / raw)
To: intel-xe; +Cc: himal.prasad.ghimiray, naresh.kumar.g
Add a Kconfig option to enable the debugfs interface used to control user
BO page-size allocation policy for validation and development.
When enabled, the driver exposes a debugfs knob that can force 2M mode,
force 1G mode, or select mixed round-robin page-size allocation behavior
on platforms that support multiple page sizes.
This option is intended for debug/testing only and does not provide a
stable userspace interface.
v4
- remove default n and refactor help and description
Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
drivers/gpu/drm/xe/Kconfig.debug | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/xe/Kconfig.debug b/drivers/gpu/drm/xe/Kconfig.debug
index 01227c77f6d7..79118d9efd93 100644
--- a/drivers/gpu/drm/xe/Kconfig.debug
+++ b/drivers/gpu/drm/xe/Kconfig.debug
@@ -86,6 +86,22 @@ config DRM_XE_KUNIT_TEST
If in doubt, say "N".
+config DRM_XE_DEBUG_PAGE_SIZE
+ bool "Enable debug control for user BO page-size allocation"
+ depends on DRM_XE_DEBUG && DEBUG_FS
+ help
+ Expose a debugfs knob to override user BO page-size allocation
+ handling for validation and debug. Supported modes include forced
+ 2M, forced 1G, and a mixed mode that exercises 4K, 64K, 2M, and
+ 1G page-size paths on platforms that support them.
+
+ This is an unstable debugfs interface intended for development and
+ validation only. Its layout, contents, and existence may change or
+ be removed at any time with no regression warranty.
+
+ Recommended for driver developers only.
+ If in doubt, say "N".
+
config DRM_XE_DEBUG_GUC
bool "Enable extra GuC related debug options"
depends on DRM_XE_DEBUG
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v4 3/8] drm/xe/debugfs: add page-size allocation mode knob
2026-07-13 2:25 [PATCH v4 0/8] drm/xe: add page size allocation mode control and coverage Nareshkumar Gollakoti
2026-07-13 2:25 ` [PATCH v4 1/8] drm/xe: add page size allocation control state to xe_device Nareshkumar Gollakoti
2026-07-13 2:25 ` [PATCH v4 2/8] drm/xe: add Kconfig option for debug page-size allocation control Nareshkumar Gollakoti
@ 2026-07-13 2:25 ` Nareshkumar Gollakoti
2026-07-13 2:25 ` [PATCH v4 4/8] drm/xe: add XE_BO_FLAG_NEEDS_1G for minimum page-size sizing Nareshkumar Gollakoti
` (6 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Nareshkumar Gollakoti @ 2026-07-13 2:25 UTC (permalink / raw)
To: intel-xe; +Cc: himal.prasad.ghimiray, naresh.kumar.g
Expose a debugfs control to override the page-size allocation mode used
for user BOs.
The interface allows switching between the default allocation policy,
forced 2M, forced 1G, and mixed allocation modes at runtime. This
provides a simple way to validate behavior and debug page-size-dependent
allocation flows.
The debugfs entry is built only when CONFIG_DRM_XE_DEBUG_PAGE_SIZE is
enabled.
v2
- update changelog to match mutex-based cur_index handling
- reset cur_index when switching to mixed mode (sashiko)
v3
- add CONFIG guard for page-size allocation debugfs support (Himal)
- create debugfs entry under CONFIG_DRM_XE_DEBUG_PAGE_SIZE
v4
- reorderd this patch with kconfig patch to ensure patch builds
- Gurding this debug knob for only discrete graphics
Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
drivers/gpu/drm/xe/xe_debugfs.c | 62 +++++++++++++++++++++++++++++++++
1 file changed, 62 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_debugfs.c b/drivers/gpu/drm/xe/xe_debugfs.c
index 8c391c7b017a..6ab2d51033f8 100644
--- a/drivers/gpu/drm/xe/xe_debugfs.c
+++ b/drivers/gpu/drm/xe/xe_debugfs.c
@@ -564,6 +564,56 @@ static const struct file_operations disable_late_binding_fops = {
.write = disable_late_binding_set,
};
+#if IS_ENABLED(CONFIG_DRM_XE_DEBUG_PAGE_SIZE)
+static ssize_t page_size_alloc_mode_show(struct file *f, char __user *ubuf,
+ size_t size, loff_t *pos)
+{
+ struct xe_device *xe = file_inode(f)->i_private;
+ char buf[32];
+ int len;
+
+ mutex_lock(&xe->page_size_alloc_ctrl.lock);
+
+ len = scnprintf(buf, sizeof(buf), "%u\n",
+ xe->page_size_alloc_ctrl.mode);
+ mutex_unlock(&xe->page_size_alloc_ctrl.lock);
+
+ return simple_read_from_buffer(ubuf, size, pos, buf, len);
+}
+
+static ssize_t page_size_alloc_mode_set(struct file *f, const char __user *ubuf,
+ size_t size, loff_t *pos)
+{
+ struct xe_device *xe = file_inode(f)->i_private;
+ unsigned int val;
+ int ret;
+
+ ret = kstrtouint_from_user(ubuf, size, 0, &val);
+ if (ret)
+ return ret;
+
+ if (val > XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED)
+ return -EINVAL;
+
+ mutex_lock(&xe->page_size_alloc_ctrl.lock);
+
+ if (val == XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED)
+ xe->page_size_alloc_ctrl.cur_index = 0;
+
+ xe->page_size_alloc_ctrl.mode = (enum xe_page_size_alloc_ctrl_mode)val;
+
+ mutex_unlock(&xe->page_size_alloc_ctrl.lock);
+
+ return size;
+}
+
+static const struct file_operations page_size_alloc_mode_fops = {
+ .owner = THIS_MODULE,
+ .read = page_size_alloc_mode_show,
+ .write = page_size_alloc_mode_set,
+};
+#endif
+
void xe_debugfs_register(struct xe_device *xe)
{
struct ttm_device *bdev = &xe->ttm;
@@ -616,6 +666,18 @@ void xe_debugfs_register(struct xe_device *xe)
debugfs_create_file("disable_late_binding", 0600, root, xe,
&disable_late_binding_fops);
+#if IS_ENABLED(CONFIG_DRM_XE_DEBUG_PAGE_SIZE)
+ /*
+ * Expose a debugfs knob to control user BO page-size allocation:
+ * 0 - default behavior
+ * 1 - force 2M page allocations
+ * 2 - force 1G page allocations
+ * 3 - mixed mode: select 4K, 64K, 2M, and 1G in round-robin order
+ */
+ if (IS_DGFX(xe))
+ debugfs_create_file("page_size_alloc_mode", 0600, root, xe,
+ &page_size_alloc_mode_fops);
+#endif
/*
* Don't expose page reclaim configuration file if not supported by the
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v4 4/8] drm/xe: add XE_BO_FLAG_NEEDS_1G for minimum page-size sizing
2026-07-13 2:25 [PATCH v4 0/8] drm/xe: add page size allocation mode control and coverage Nareshkumar Gollakoti
` (2 preceding siblings ...)
2026-07-13 2:25 ` [PATCH v4 3/8] drm/xe/debugfs: add page-size allocation mode knob Nareshkumar Gollakoti
@ 2026-07-13 2:25 ` Nareshkumar Gollakoti
2026-07-13 2:25 ` [PATCH v4 5/8] drm/xe: apply debug page-size allocation policy to user BOs Nareshkumar Gollakoti
` (5 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Nareshkumar Gollakoti @ 2026-07-13 2:25 UTC (permalink / raw)
To: intel-xe; +Cc: himal.prasad.ghimiray, naresh.kumar.g
Add XE_BO_FLAG_NEEDS_1G to mark BOs that require 1G minimum page-size
sizing.
Update xe_bo_init_locked() to honor the new flag in the existing
VRAM/stolen-memory minimum page-size sizing path. When
XE_BO_FLAG_NEEDS_1G is set, the BO size is rounded up to 1G. Otherwise,
the existing 2M and 64K sizing behavior is preserved.
If multiple minimum page-size flags are set, the largest requirement
takes precedence: 1G over 2M over 64K.
v3
- commit message reworded
Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
drivers/gpu/drm/xe/xe_bo.c | 12 ++++++++++--
drivers/gpu/drm/xe/xe_bo.h | 1 +
2 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
index 4c80bac67622..9dbf59fad421 100644
--- a/drivers/gpu/drm/xe/xe_bo.c
+++ b/drivers/gpu/drm/xe/xe_bo.c
@@ -2323,8 +2323,16 @@ struct xe_bo *xe_bo_init_locked(struct xe_device *xe, struct xe_bo *bo,
if (flags & (XE_BO_FLAG_VRAM_MASK | XE_BO_FLAG_STOLEN) &&
!(flags & XE_BO_FLAG_IGNORE_MIN_PAGE_SIZE) &&
((xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K) ||
- (flags & (XE_BO_FLAG_NEEDS_64K | XE_BO_FLAG_NEEDS_2M)))) {
- size_t align = flags & XE_BO_FLAG_NEEDS_2M ? SZ_2M : SZ_64K;
+ (flags & (XE_BO_FLAG_NEEDS_64K | XE_BO_FLAG_NEEDS_2M |
+ XE_BO_FLAG_NEEDS_1G)))) {
+ size_t align;
+
+ if (flags & XE_BO_FLAG_NEEDS_1G)
+ align = SZ_1G;
+ else if (flags & XE_BO_FLAG_NEEDS_2M)
+ align = SZ_2M;
+ else
+ align = SZ_64K;
aligned_size = ALIGN(size, align);
if (type != ttm_bo_type_device)
diff --git a/drivers/gpu/drm/xe/xe_bo.h b/drivers/gpu/drm/xe/xe_bo.h
index 6340317f7d2e..d5d023cac367 100644
--- a/drivers/gpu/drm/xe/xe_bo.h
+++ b/drivers/gpu/drm/xe/xe_bo.h
@@ -52,6 +52,7 @@
#define XE_BO_FLAG_CPU_ADDR_MIRROR BIT(24)
#define XE_BO_FLAG_FORCE_USER_VRAM BIT(25)
#define XE_BO_FLAG_NO_COMPRESSION BIT(26)
+#define XE_BO_FLAG_NEEDS_1G BIT(27)
/* this one is trigger internally only */
#define XE_BO_FLAG_INTERNAL_TEST BIT(30)
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v4 5/8] drm/xe: apply debug page-size allocation policy to user BOs
2026-07-13 2:25 [PATCH v4 0/8] drm/xe: add page size allocation mode control and coverage Nareshkumar Gollakoti
` (3 preceding siblings ...)
2026-07-13 2:25 ` [PATCH v4 4/8] drm/xe: add XE_BO_FLAG_NEEDS_1G for minimum page-size sizing Nareshkumar Gollakoti
@ 2026-07-13 2:25 ` Nareshkumar Gollakoti
2026-07-13 2:25 ` [PATCH v4 6/8] drm/xe/vm: propagate BO page-size requirements to VMA map flags Nareshkumar Gollakoti
` (4 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Nareshkumar Gollakoti @ 2026-07-13 2:25 UTC (permalink / raw)
To: intel-xe; +Cc: himal.prasad.ghimiray, naresh.kumar.g
Apply the debug page-size allocation policy during user BO creation.
When page-size allocation control is enabled, override the user BO
page-size selection flags based on the selected debug mode and round the
requested size up to the corresponding granularity:
- 2M mode selects 2M handling
- 1G mode selects 1G handling
- mixed mode selects the page size from the current mixed-mode index
This is intended for internal debug and validation flows. When the
control mode is left at the default setting, the normal user BO creation
path is unchanged.
v2
- ensure debug page-size allocation does not
affect the default path (sashiko)
- rework synchronization for concurrent access (sashiko)
- refactor commit message for readability
v3
- update user BO size alignment based on debug policy mode
- reword commit message
- ensure normal user flow is unchanged when debug policy is disabled
v4(sashiko)
- limit debug page-size policy application to VRAM BOs
- do not override preexisting page-size requirement flags
- advance mixed-mode index only after successful
BO create ioctl completion
- add overflow checks before ALIGN() in debug page-size handling
- ensure CONFIG_DRM_XE_DEBUG_PAGE_SIZE enabled and it is dgfx
Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
drivers/gpu/drm/xe/xe_bo.c | 145 +++++++++++++++++++++++++++++++++++++
1 file changed, 145 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
index 9dbf59fad421..43ae853222ea 100644
--- a/drivers/gpu/drm/xe/xe_bo.c
+++ b/drivers/gpu/drm/xe/xe_bo.c
@@ -2612,6 +2612,144 @@ static struct xe_bo *xe_bo_create_novm(struct xe_device *xe, struct xe_tile *til
return ret ? ERR_PTR(ret) : bo;
}
+static void xe_bo_debug_mixed_mode_cur_index_advance(struct xe_device *xe)
+{
+ if (!IS_ENABLED(CONFIG_DRM_XE_DEBUG_PAGE_SIZE) || !IS_DGFX(xe))
+ return;
+
+ mutex_lock(&xe->page_size_alloc_ctrl.lock);
+ if (xe->page_size_alloc_ctrl.mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED)
+ xe->page_size_alloc_ctrl.cur_index++;
+ mutex_unlock(&xe->page_size_alloc_ctrl.lock);
+}
+
+static bool xe_size_align_overflows(size_t size, size_t align)
+{
+ return size > SIZE_MAX - (align - 1);
+}
+
+static u32 get_flag_from_cur_index_in_mixed_mode(struct xe_device *xe, size_t *align_size,
+ int *err)
+{
+ static const u32 map[4] = {
+ 0, /* default mode 4K */
+ XE_BO_FLAG_NEEDS_64K,
+ XE_BO_FLAG_NEEDS_2M,
+ XE_BO_FLAG_NEEDS_1G,
+ };
+ u32 idx;
+
+ lockdep_assert_held(&xe->page_size_alloc_ctrl.lock);
+
+ *err = 0;
+ idx = xe->page_size_alloc_ctrl.cur_index % ARRAY_SIZE(map);
+
+ if (!map[idx])
+ return 0;
+
+ if (map[idx] == XE_BO_FLAG_NEEDS_64K) {
+ if (xe_size_align_overflows(*align_size, SZ_64K)) {
+ *err = -EINVAL;
+ return 0;
+ }
+ *align_size = ALIGN(*align_size, SZ_64K);
+ return map[idx];
+ }
+
+ if (map[idx] == XE_BO_FLAG_NEEDS_2M) {
+ if (xe_size_align_overflows(*align_size, SZ_2M)) {
+ *err = -EINVAL;
+ return 0;
+ }
+ *align_size = ALIGN(*align_size, SZ_2M);
+ return map[idx];
+ }
+
+ if (map[idx] == XE_BO_FLAG_NEEDS_1G) {
+ if (xe_size_align_overflows(*align_size, SZ_1G)) {
+ *err = -EINVAL;
+ return 0;
+ }
+ *align_size = ALIGN(*align_size, SZ_1G);
+ return map[idx];
+ }
+
+ return 0;
+}
+
+static int xe_bo_apply_debug_page_size_policy(struct xe_device *xe,
+ u32 *bo_flags,
+ size_t *size)
+{
+ enum xe_page_size_alloc_ctrl_mode mode;
+ u32 want = 0;
+ size_t align_size = *size;
+ int err = 0;
+
+ if (!IS_ENABLED(CONFIG_DRM_XE_DEBUG_PAGE_SIZE) || !IS_DGFX(xe))
+ return 0;
+ /*
+ * The debug page-size policy is only meaningful for BOs placed in
+ * VRAM, where the downstream BO init path can
+ * actually honor the corresponding minimum page-size requirement.
+ */
+ if (!(*bo_flags & XE_BO_FLAG_VRAM_MASK))
+ return 0;
+
+ /*
+ * Do not override existing page-size requirement flags, since they
+ * may reflect functional requirements for specific BO types.
+ */
+ if (*bo_flags & (XE_BO_FLAG_NEEDS_64K |
+ XE_BO_FLAG_NEEDS_2M |
+ XE_BO_FLAG_NEEDS_1G))
+ return 0;
+
+ if (!READ_ONCE(xe->page_size_alloc_ctrl.mode))
+ return 0;
+
+ mutex_lock(&xe->page_size_alloc_ctrl.lock);
+
+ mode = xe->page_size_alloc_ctrl.mode;
+ if (mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_NONE) {
+ goto out_unlock;
+ } else if (mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_2M) {
+ if (xe_size_align_overflows(align_size, SZ_2M)) {
+ err = -EINVAL;
+ goto out_unlock;
+ }
+ want = XE_BO_FLAG_NEEDS_2M;
+ align_size = ALIGN(align_size, SZ_2M);
+ } else if (mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_1G) {
+ if (xe_size_align_overflows(align_size, SZ_1G)) {
+ err = -EINVAL;
+ goto out_unlock;
+ }
+ want = XE_BO_FLAG_NEEDS_1G;
+ align_size = ALIGN(align_size, SZ_1G);
+ } else if (mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED) {
+ want = get_flag_from_cur_index_in_mixed_mode(xe, &align_size, &err);
+ if (err)
+ goto out_unlock;
+ } else {
+ goto out_unlock;
+ }
+
+ mutex_unlock(&xe->page_size_alloc_ctrl.lock);
+
+ *bo_flags |= want;
+ /*
+ * Apply the debug page-size policy by rounding the user BO size up to
+ * the selected granularity.
+ */
+ *size = align_size;
+ return err;
+
+out_unlock:
+ mutex_unlock(&xe->page_size_alloc_ctrl.lock);
+ return err;
+}
+
/**
* xe_bo_create_user() - Create a user BO
* @xe: The xe device.
@@ -2632,9 +2770,14 @@ struct xe_bo *xe_bo_create_user(struct xe_device *xe,
u32 flags, struct drm_exec *exec)
{
struct xe_bo *bo;
+ int err;
flags |= XE_BO_FLAG_USER;
+ err = xe_bo_apply_debug_page_size_policy(xe, &flags, &size);
+ if (err)
+ return ERR_PTR(err);
+
if (vm || exec) {
xe_assert(xe, exec);
bo = __xe_bo_create_locked(xe, NULL, vm, size, 0, ~0ULL,
@@ -3439,6 +3582,8 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data,
if (err)
goto out_vm;
+ xe_bo_debug_mixed_mode_cur_index_advance(xe);
+
if (args->extensions) {
err = gem_create_user_extensions(xe, bo, args->extensions, 0);
if (err)
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v4 6/8] drm/xe/vm: propagate BO page-size requirements to VMA map flags
2026-07-13 2:25 [PATCH v4 0/8] drm/xe: add page size allocation mode control and coverage Nareshkumar Gollakoti
` (4 preceding siblings ...)
2026-07-13 2:25 ` [PATCH v4 5/8] drm/xe: apply debug page-size allocation policy to user BOs Nareshkumar Gollakoti
@ 2026-07-13 2:25 ` Nareshkumar Gollakoti
2026-07-13 2:25 ` [PATCH v4 7/8] drm/xe/pt: allow selecting the bind leaf PTE level Nareshkumar Gollakoti
` (3 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Nareshkumar Gollakoti @ 2026-07-13 2:25 UTC (permalink / raw)
To: intel-xe; +Cc: himal.prasad.ghimiray, naresh.kumar.g
Propagate user BO page-size requirement flags into VM bind map
operations.
When a user BO carries a page-size requirement flag, set the
corresponding VMA PTE flag during bind-op construction. This covers
64K, 2M, and 1G page sizes and allows the debug page-size allocation
policy selected at BO creation time to be reflected in page-table
mapping behavior.
v3
- BO page-size requirement overrides prior map-state flags
- reword commit message
v4
- address review feedback on XE_VMA_CREATE_MASK dependency
- carry 2M/1G request state in target_leaf_level instead of vma_flags
- propagate target_leaf_level from bind op to VMA state
- avoid using accumulated gpuva.flags as future bind policy input
Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
drivers/gpu/drm/xe/xe_vm.c | 23 +++++++++++++++++++++++
drivers/gpu/drm/xe/xe_vm_types.h | 9 +++++++++
2 files changed, 32 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index 080c2fff0e95..503ed6984512 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -2390,6 +2390,23 @@ static void xe_svm_prefetch_gpuva_ops_fini(struct drm_gpuva_ops *ops)
}
}
+static void xe_vma_apply_debug_page_size_flag(struct xe_vma_op *op,
+ struct xe_bo *bo)
+{
+ if (!bo)
+ return;
+
+ if (!(bo->flags & XE_BO_FLAG_USER))
+ return;
+
+ op->map.target_leaf_level = 0;
+
+ if (bo->flags & XE_BO_FLAG_NEEDS_1G)
+ op->map.target_leaf_level = 2;
+ else if (bo->flags & XE_BO_FLAG_NEEDS_2M)
+ op->map.target_leaf_level = 1;
+}
+
/*
* Create operations list from IOCTL arguments, setup operations fields so parse
* and commit steps are decoupled from IOCTL arguments. This step can fail.
@@ -2485,6 +2502,11 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_vma_ops *vops,
op->map.pat_index = pat_index;
op->map.invalidate_on_bind =
__xe_vm_needs_clear_scratch_pages(vm, flags);
+ /*
+ * Propagate debug BO page-size requirement into the VMA bind operation
+ * for user BO binds.
+ */
+ xe_vma_apply_debug_page_size_flag(op, bo);
} else if (__op->op == DRM_GPUVA_OP_PREFETCH) {
struct xe_vma *vma = gpuva_to_vma(op->base.prefetch.va);
struct xe_tile *tile;
@@ -4808,6 +4830,7 @@ static int xe_vm_alloc_vma(struct xe_vm *vm,
*/
if (is_madvise)
xe_vma_mem_attr_copy(&vma->attr, &tmp_attr);
+ vma->target_leaf_level = op->map.target_leaf_level;
}
}
diff --git a/drivers/gpu/drm/xe/xe_vm_types.h b/drivers/gpu/drm/xe/xe_vm_types.h
index 635ed29b9a69..c94328662dfc 100644
--- a/drivers/gpu/drm/xe/xe_vm_types.h
+++ b/drivers/gpu/drm/xe/xe_vm_types.h
@@ -174,6 +174,13 @@ struct xe_vma {
* and encoding of the PTEs for this vma.
*/
struct xe_vma_mem_attr attr;
+ /**
+ * @target_leaf_level: requested PT leaf level for this VMA
+ *
+ * 0 for normal 4K/64K mappings, 1 for 2M huge-page mappings,
+ * and 2 for 1G huge-page mappings.
+ */
+ u8 target_leaf_level;
};
/**
@@ -422,6 +429,8 @@ struct xe_vma_op_map {
bool request_decompress;
/** @pat_index: The pat index to use for this operation. */
u16 pat_index;
+ /** @target_leaf_level: requested PT leaf level for this operation */
+ u8 target_leaf_level;
};
/** struct xe_vma_op_remap - VMA remap operation */
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v4 7/8] drm/xe/pt: allow selecting the bind leaf PTE level
2026-07-13 2:25 [PATCH v4 0/8] drm/xe: add page size allocation mode control and coverage Nareshkumar Gollakoti
` (5 preceding siblings ...)
2026-07-13 2:25 ` [PATCH v4 6/8] drm/xe/vm: propagate BO page-size requirements to VMA map flags Nareshkumar Gollakoti
@ 2026-07-13 2:25 ` Nareshkumar Gollakoti
2026-07-13 2:25 ` [PATCH v4 8/8] drm/xe/tests: add live KUnit coverage for BO page-size allocation modes Nareshkumar Gollakoti
` (2 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Nareshkumar Gollakoti @ 2026-07-13 2:25 UTC (permalink / raw)
To: intel-xe; +Cc: himal.prasad.ghimiray, naresh.kumar.g
Add a target_leaf_level field to the page-table bind walk and use it to
control the level at which leaf entries are emitted.
By default, the bind walk emits level-0 leaf PTEs and relies on
xe_pt_hugepte_possible() to select huge mappings when possible. Add an
explicit target leaf level so the walk can stop earlier when the VMA
requests a larger mapping size.
Use level 1 for 2M PDE mappings and level 2 for 1G PDP mappings, while
keeping level 0 for normal mappings. The existing huge-page heuristic is
preserved for the default level-0 path.
This allows the bind path to emit 2M and 1G leaf entries when requested
by the VMA, while still validating alignment and size requirements.
v2
- avoid using max_level to control walk depth
- use target_leaf_level to preserve the normal walk behavior
- keep the default huge-page heuristic only for the level-0 path
- refine commit message
v3
- reword commit message
- v4
- allow fallback to smaller huge-page levels for non-zero target_leaf_level
- avoid constraining clear_pt walks by target_leaf_level
Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
drivers/gpu/drm/xe/xe_pt.c | 29 +++++++++++++++++++++++++++--
1 file changed, 27 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
index e466f714bf86..506757defa20 100644
--- a/drivers/gpu/drm/xe/xe_pt.c
+++ b/drivers/gpu/drm/xe/xe_pt.c
@@ -302,6 +302,13 @@ struct xe_pt_stage_bind_walk {
bool needs_64K;
/** @clear_pt: clear page table entries during the bind walk */
bool clear_pt;
+ /** @target_leaf_level: Page-table level at which to emit leaf PTEs
+ * 0 for normal 4K/64K mappings, 1 for 2M huge pages, and 2 for 1G huge
+ * pages. The walk still traverses from the root down; this field tells
+ * xe_pt_stage_bind_entry() to treat the selected level as a leaf instead
+ * of descending further.
+ */
+ u32 target_leaf_level;
/**
* @vma: VMA being mapped
*/
@@ -514,6 +521,17 @@ xe_pt_is_pte_ps64K(u64 addr, u64 next, struct xe_pt_stage_bind_walk *xe_walk)
return xe_walk->found_64K;
}
+static bool xe_pt_huge_leaf_allowed(u64 addr, u64 next, unsigned int level,
+ struct xe_pt_stage_bind_walk *xe_walk)
+{
+ if (xe_walk->clear_pt)
+ return xe_pt_hugepte_possible(addr, next, level, xe_walk);
+
+ return (xe_walk->target_leaf_level == 0 ||
+ level <= xe_walk->target_leaf_level) &&
+ xe_pt_hugepte_possible(addr, next, level, xe_walk);
+}
+
static int
xe_pt_stage_bind_entry(struct xe_ptw *parent, pgoff_t offset,
unsigned int level, u64 addr, u64 next,
@@ -531,8 +549,14 @@ xe_pt_stage_bind_entry(struct xe_ptw *parent, pgoff_t offset,
int ret = 0;
u64 pte;
- /* Is this a leaf entry ?*/
- if (level == 0 || xe_pt_hugepte_possible(addr, next, level, xe_walk)) {
+ /*
+ * Is this a leaf entry?
+ * Always create a 4K leaf at level 0. For huge pages (level > 0),
+ * validate alignment and size with xe_pt_hugepte_possible().
+ * When target_leaf_level is set, allow fallback to smaller huge pages
+ * (e.g., 1G -> 2M -> 64K -> 4K) by accepting any level <= target.
+ */
+ if (level == 0 || xe_pt_huge_leaf_allowed(addr, next, level, xe_walk)) {
struct xe_res_cursor *curs = xe_walk->curs;
struct xe_bo *bo = xe_vma_bo(xe_walk->vma);
bool is_null_or_purged = xe_vma_is_null(xe_walk->vma) ||
@@ -774,6 +798,7 @@ xe_pt_stage_bind(struct xe_tile *tile, struct xe_vma *vma,
xe_svm_notifier_unlock(vm);
}
+ xe_walk.target_leaf_level = vma->target_leaf_level;
xe_walk.needs_64K = (vm->flags & XE_VM_FLAG_64K);
if (clear_pt)
goto walk_pt;
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v4 8/8] drm/xe/tests: add live KUnit coverage for BO page-size allocation modes
2026-07-13 2:25 [PATCH v4 0/8] drm/xe: add page size allocation mode control and coverage Nareshkumar Gollakoti
` (6 preceding siblings ...)
2026-07-13 2:25 ` [PATCH v4 7/8] drm/xe/pt: allow selecting the bind leaf PTE level Nareshkumar Gollakoti
@ 2026-07-13 2:25 ` Nareshkumar Gollakoti
2026-07-13 2:33 ` ✗ CI.checkpatch: warning for drm/xe: add page size allocation mode control and coverage (rev2) Patchwork
2026-07-13 2:35 ` ✓ CI.KUnit: success " Patchwork
9 siblings, 0 replies; 11+ messages in thread
From: Nareshkumar Gollakoti @ 2026-07-13 2:25 UTC (permalink / raw)
To: intel-xe; +Cc: himal.prasad.ghimiray, naresh.kumar.g
Add live KUnit coverage for the debug-controlled BO
page-size allocation modes.
The new tests cover forced 2M mode, forced 1G mode,
and mixed mode. They verify that user BO creation applies
the expected NEEDS_* flags, that no unexpected page-size flags are
added in the forced modes, that BO size is rounded as expected, and
that page_alignment matches the selected leaf size.
The mixed-mode test does not assume a strict per-allocation rotation
sequence, since the device-global mixed-mode index may be perturbed by
concurrent BO creation on a live system. Instead,
it validates that each allocation results in
one valid mixed-mode page-size outcome.
Treat transient VRAM allocation failures as skipped test cases so the
tests can run in varying live environments without producing false
failures.
v3
- address review comments
- rework mixed-mode test to avoid assuming strict rotation order
- reword commit message
v4
- skip VRAM-targeted live tests on non-dGFX devices
Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
drivers/gpu/drm/xe/tests/xe_bo.c | 244 ++++++++++++++++++++
drivers/gpu/drm/xe/tests/xe_live_test_mod.c | 2 +
2 files changed, 246 insertions(+)
diff --git a/drivers/gpu/drm/xe/tests/xe_bo.c b/drivers/gpu/drm/xe/tests/xe_bo.c
index 49c95ed67d7e..5f1e3d9d43db 100644
--- a/drivers/gpu/drm/xe/tests/xe_bo.c
+++ b/drivers/gpu/drm/xe/tests/xe_bo.c
@@ -22,6 +22,235 @@
#include "xe_pci.h"
#include "xe_pm.h"
+struct page_size_alloc_saved {
+ enum xe_page_size_alloc_ctrl_mode mode;
+ u32 cur_index;
+};
+
+/* Caller must hold xe->page_size_alloc_ctrl.lock. */
+static void page_size_alloc_save(struct xe_device *xe,
+ struct page_size_alloc_saved *s)
+{
+ s->mode = xe->page_size_alloc_ctrl.mode;
+ s->cur_index = xe->page_size_alloc_ctrl.cur_index;
+}
+
+static void page_size_alloc_restore(struct xe_device *xe,
+ const struct page_size_alloc_saved *s)
+{
+ mutex_lock(&xe->page_size_alloc_ctrl.lock);
+ xe->page_size_alloc_ctrl.mode = s->mode;
+ xe->page_size_alloc_ctrl.cur_index = s->cur_index;
+ mutex_unlock(&xe->page_size_alloc_ctrl.lock);
+}
+
+/* Map a NEEDS_* flag to the expected leaf size and request size. */
+struct leaf_info {
+ u64 leaf;
+ u64 alloc_size;
+ u32 flag;
+ const char *name;
+};
+
+static const struct leaf_info leaf_2m = {
+ .leaf = SZ_2M,
+ .alloc_size = SZ_2M - PAGE_SIZE,
+ .flag = XE_BO_FLAG_NEEDS_2M,
+ .name = "2M",
+};
+
+static const struct leaf_info leaf_1g = {
+ .leaf = SZ_1G,
+ .alloc_size = SZ_1G - PAGE_SIZE,
+ .flag = XE_BO_FLAG_NEEDS_1G,
+ .name = "1G",
+};
+
+static void run_only_leaf(struct kunit *test,
+ enum xe_page_size_alloc_ctrl_mode mode,
+ const struct leaf_info *li)
+{
+ struct xe_device *xe = test->priv;
+ struct page_size_alloc_saved saved;
+ struct xe_bo *bo;
+ struct ttm_buffer_object *ttm_bo;
+ u32 other_flags;
+
+ if (!IS_ENABLED(CONFIG_DRM_XE_DEBUG_PAGE_SIZE)) {
+ kunit_skip(test, "CONFIG_DRM_XE_DEBUG_PAGE_SIZE not enabled");
+ return;
+ }
+
+ if (!IS_DGFX(xe)) {
+ kunit_skip(test, "requires dGFX VRAM");
+ return;
+ }
+
+ mutex_lock(&xe->page_size_alloc_ctrl.lock);
+ page_size_alloc_save(xe, &saved);
+ xe->page_size_alloc_ctrl.mode = mode;
+ mutex_unlock(&xe->page_size_alloc_ctrl.lock);
+
+ bo = xe_bo_create_user(xe, NULL, li->alloc_size,
+ DRM_XE_GEM_CPU_CACHING_WC,
+ XE_BO_FLAG_VRAM0, NULL);
+ if (IS_ERR(bo)) {
+ page_size_alloc_restore(xe, &saved);
+ if (PTR_ERR(bo) == -ENOSPC) {
+ kunit_skip(test,
+ "no contiguous %s VRAM available right now",
+ li->name);
+ return;
+ }
+
+ KUNIT_FAIL(test, "%s BO alloc failed: %pe", li->name, bo);
+ return;
+ }
+
+ ttm_bo = &bo->ttm;
+
+ /* 1) The mode added the right NEEDS_* flag. */
+ KUNIT_EXPECT_TRUE_MSG(test, bo->flags & li->flag,
+ "%s: flag missing, flags=0x%x",
+ li->name, bo->flags);
+
+ /* 2) No other NEEDS_* flags accidentally tagged on. */
+ other_flags = (XE_BO_FLAG_NEEDS_64K |
+ XE_BO_FLAG_NEEDS_2M |
+ XE_BO_FLAG_NEEDS_1G) & ~li->flag;
+ KUNIT_EXPECT_FALSE_MSG(test, bo->flags & other_flags,
+ "%s: stray flags=0x%x",
+ li->name, bo->flags);
+ /* 3) BO size was rounded up to the expected leaf size. */
+ KUNIT_EXPECT_EQ_MSG(test, xe_bo_size(bo), li->leaf,
+ "%s: bo size=%llu expected=%llu",
+ li->name,
+ (u64)xe_bo_size(bo),
+ (u64)li->leaf);
+ /*
+ * 4) Allocator honored the requested alignment.
+ * ttm_bo->page_alignment is stored in PAGE_SIZE units, so compare against
+ * the expected leaf size converted with >> PAGE_SHIFT.
+ */
+ KUNIT_EXPECT_EQ_MSG(test, ttm_bo->page_alignment,
+ li->leaf >> PAGE_SHIFT,
+ "%s: page_alignment=%u pages expected=%llu pages",
+ li->name, ttm_bo->page_alignment,
+ (u64)(li->leaf >> PAGE_SHIFT));
+
+ xe_bo_put(bo);
+ page_size_alloc_restore(xe, &saved);
+}
+
+static void xe_bo_page_size_alloc_only_2m(struct kunit *test)
+{
+ run_only_leaf(test, XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_2M, &leaf_2m);
+}
+
+static void xe_bo_page_size_alloc_only_1g(struct kunit *test)
+{
+ run_only_leaf(test, XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_1G, &leaf_1g);
+}
+
+static void xe_bo_page_size_alloc_mixed_bos(struct kunit *test)
+{
+ struct xe_device *xe = test->priv;
+ struct page_size_alloc_saved saved;
+ struct xe_bo *bo;
+ struct ttm_buffer_object *ttm_bo;
+ u32 all_flags = XE_BO_FLAG_NEEDS_64K | XE_BO_FLAG_NEEDS_2M |
+ XE_BO_FLAG_NEEDS_1G;
+ u32 flags;
+ u64 expected_align;
+ int i;
+ const int n = 4;
+
+ if (!IS_ENABLED(CONFIG_DRM_XE_DEBUG_PAGE_SIZE)) {
+ kunit_skip(test, "CONFIG_DRM_XE_DEBUG_PAGE_SIZE not enabled");
+ return;
+ }
+
+ if (!IS_DGFX(xe)) {
+ kunit_skip(test, "requires dGFX VRAM");
+ return;
+ }
+
+ mutex_lock(&xe->page_size_alloc_ctrl.lock);
+ page_size_alloc_save(xe, &saved);
+ xe->page_size_alloc_ctrl.mode = XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED;
+ xe->page_size_alloc_ctrl.cur_index = 0;
+ mutex_unlock(&xe->page_size_alloc_ctrl.lock);
+
+ for (i = 0; i < n; i++) {
+ /*
+ * Request a size valid for any mixed-mode slot. Since cur_index is
+ * device-global and may be perturbed by concurrent allocations on
+ * a live system, do not assume this iteration will see a specific
+ * slot.
+ */
+ bo = xe_bo_create_user(xe, NULL, SZ_1G,
+ DRM_XE_GEM_CPU_CACHING_WC,
+ XE_BO_FLAG_VRAM0, NULL);
+ if (IS_ERR(bo)) {
+ int err = PTR_ERR(bo);
+
+ page_size_alloc_restore(xe, &saved);
+ if (err == -ENOSPC) {
+ kunit_skip(test,
+ "mixed mode BO allocation unavailable: %d",
+ err);
+ return;
+ }
+ KUNIT_FAIL(test, "iter=%d alloc failed: %pe", i, bo);
+ return;
+ }
+
+ ttm_bo = &bo->ttm;
+ flags = bo->flags & all_flags;
+ /*
+ * Mixed mode may result in:
+ * 0-> default/4K
+ * XE_BO_FLAG_NEEDS_64K
+ * XE_BO_FLAG_NEEDS_2M
+ * XE_BO_FLAG_NEEDS_1G
+ * Any other combination is invalid.
+ */
+ if (flags == 0) {
+ expected_align = SZ_4K;
+ } else if (flags == XE_BO_FLAG_NEEDS_64K) {
+ expected_align = SZ_64K;
+ } else if (flags == XE_BO_FLAG_NEEDS_2M) {
+ expected_align = SZ_2M;
+ } else if (flags == XE_BO_FLAG_NEEDS_1G) {
+ expected_align = SZ_1G;
+ } else {
+ KUNIT_FAIL(test,
+ "iter=%d invalid mixed-mode flags: 0x%x",
+ i, flags);
+ xe_bo_put(bo);
+ page_size_alloc_restore(xe, &saved);
+ return;
+ }
+ /*
+ * BO size should remain valid for the selected mode. Since the
+ * request is SZ_1G, it should remain unchanged regardless of the
+ * selected page-size policy.
+ */
+ KUNIT_EXPECT_EQ_MSG(test, xe_bo_size(bo), (u64)SZ_1G,
+ "iter=%d size=%llu expected=%llu",
+ i,
+ (u64)xe_bo_size(bo),
+ (u64)SZ_1G);
+ KUNIT_EXPECT_EQ_MSG(test, ttm_bo->page_alignment,
+ expected_align >> PAGE_SHIFT,
+ "iter=%d flags=0x%x page_alignment=%u pages expected=%llu pages",
+ i, flags, ttm_bo->page_alignment,
+ (u64)(expected_align >> PAGE_SHIFT));
+ xe_bo_put(bo);
+ }
+ page_size_alloc_restore(xe, &saved);
+}
+
static int ccs_test_migrate(struct xe_tile *tile, struct xe_bo *bo,
bool clear, u64 get_val, u64 assign_val,
struct kunit *test, struct drm_exec *exec)
@@ -609,6 +838,21 @@ static struct kunit_case xe_bo_tests[] = {
{}
};
+static struct kunit_case xe_bo_page_size_alloc_cases[] = {
+ KUNIT_CASE_PARAM(xe_bo_page_size_alloc_only_2m, xe_pci_live_device_gen_param),
+ KUNIT_CASE_PARAM(xe_bo_page_size_alloc_only_1g, xe_pci_live_device_gen_param),
+ KUNIT_CASE_PARAM(xe_bo_page_size_alloc_mixed_bos, xe_pci_live_device_gen_param),
+ {}
+};
+
+VISIBLE_IF_KUNIT
+struct kunit_suite xe_bo_page_size_alloc_suite = {
+ .name = "xe_bo_page_size_alloc",
+ .test_cases = xe_bo_page_size_alloc_cases,
+ .init = xe_kunit_helper_xe_device_live_test_init,
+};
+EXPORT_SYMBOL_IF_KUNIT(xe_bo_page_size_alloc_suite);
+
VISIBLE_IF_KUNIT
struct kunit_suite xe_bo_test_suite = {
.name = "xe_bo",
diff --git a/drivers/gpu/drm/xe/tests/xe_live_test_mod.c b/drivers/gpu/drm/xe/tests/xe_live_test_mod.c
index c55e46f1ae92..3d48a92e1201 100644
--- a/drivers/gpu/drm/xe/tests/xe_live_test_mod.c
+++ b/drivers/gpu/drm/xe/tests/xe_live_test_mod.c
@@ -11,6 +11,7 @@ extern struct kunit_suite xe_dma_buf_test_suite;
extern struct kunit_suite xe_migrate_test_suite;
extern struct kunit_suite xe_mocs_test_suite;
extern struct kunit_suite xe_guc_g2g_test_suite;
+extern struct kunit_suite xe_bo_page_size_alloc_suite;
kunit_test_suite(xe_bo_test_suite);
kunit_test_suite(xe_bo_shrink_test_suite);
@@ -18,6 +19,7 @@ kunit_test_suite(xe_dma_buf_test_suite);
kunit_test_suite(xe_migrate_test_suite);
kunit_test_suite(xe_mocs_test_suite);
kunit_test_suite(xe_guc_g2g_test_suite);
+kunit_test_suite(xe_bo_page_size_alloc_suite);
MODULE_AUTHOR("Intel Corporation");
MODULE_LICENSE("GPL");
--
2.43.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* ✗ CI.checkpatch: warning for drm/xe: add page size allocation mode control and coverage (rev2)
2026-07-13 2:25 [PATCH v4 0/8] drm/xe: add page size allocation mode control and coverage Nareshkumar Gollakoti
` (7 preceding siblings ...)
2026-07-13 2:25 ` [PATCH v4 8/8] drm/xe/tests: add live KUnit coverage for BO page-size allocation modes Nareshkumar Gollakoti
@ 2026-07-13 2:33 ` Patchwork
2026-07-13 2:35 ` ✓ CI.KUnit: success " Patchwork
9 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2026-07-13 2:33 UTC (permalink / raw)
To: Nareshkumar Gollakoti; +Cc: intel-xe
== Series Details ==
Series: drm/xe: add page size allocation mode control and coverage (rev2)
URL : https://patchwork.freedesktop.org/series/168905/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
061140b9bc586ae7f40abc1249c97e1cc72d1b9d
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit d620d29be9911aa349b2e3dca77f9c48143aaf73
Author: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
Date: Mon Jul 13 07:55:41 2026 +0530
drm/xe/tests: add live KUnit coverage for BO page-size allocation modes
Add live KUnit coverage for the debug-controlled BO
page-size allocation modes.
The new tests cover forced 2M mode, forced 1G mode,
and mixed mode. They verify that user BO creation applies
the expected NEEDS_* flags, that no unexpected page-size flags are
added in the forced modes, that BO size is rounded as expected, and
that page_alignment matches the selected leaf size.
The mixed-mode test does not assume a strict per-allocation rotation
sequence, since the device-global mixed-mode index may be perturbed by
concurrent BO creation on a live system. Instead,
it validates that each allocation results in
one valid mixed-mode page-size outcome.
Treat transient VRAM allocation failures as skipped test cases so the
tests can run in varying live environments without producing false
failures.
v3
- address review comments
- rework mixed-mode test to avoid assuming strict rotation order
- reword commit message
v4
- skip VRAM-targeted live tests on non-dGFX devices
Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
+ /mt/dim checkpatch 67aa8ad5c4c59cd1a7c379ad70feec4c04caebaf drm-intel
4fb7de3b1acc drm/xe: add page size allocation control state to xe_device
4cdacea8cdbf drm/xe: add Kconfig option for debug page-size allocation control
cd3303e13caf drm/xe/debugfs: add page-size allocation mode knob
da2d7b4d946d drm/xe: add XE_BO_FLAG_NEEDS_1G for minimum page-size sizing
a025e2788d57 drm/xe: apply debug page-size allocation policy to user BOs
bb020d376827 drm/xe/vm: propagate BO page-size requirements to VMA map flags
1eb5472b6538 drm/xe/pt: allow selecting the bind leaf PTE level
d620d29be991 drm/xe/tests: add live KUnit coverage for BO page-size allocation modes
-:305: WARNING:AVOID_EXTERNS: externs should be avoided in .c files
#305: FILE: drivers/gpu/drm/xe/tests/xe_live_test_mod.c:14:
+extern struct kunit_suite xe_bo_page_size_alloc_suite;
total: 0 errors, 1 warnings, 0 checks, 270 lines checked
^ permalink raw reply [flat|nested] 11+ messages in thread
* ✓ CI.KUnit: success for drm/xe: add page size allocation mode control and coverage (rev2)
2026-07-13 2:25 [PATCH v4 0/8] drm/xe: add page size allocation mode control and coverage Nareshkumar Gollakoti
` (8 preceding siblings ...)
2026-07-13 2:33 ` ✗ CI.checkpatch: warning for drm/xe: add page size allocation mode control and coverage (rev2) Patchwork
@ 2026-07-13 2:35 ` Patchwork
9 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2026-07-13 2:35 UTC (permalink / raw)
To: Nareshkumar Gollakoti; +Cc: intel-xe
== Series Details ==
Series: drm/xe: add page size allocation mode control and coverage (rev2)
URL : https://patchwork.freedesktop.org/series/168905/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[02:33:59] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[02:34:03] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[02:34:35] Starting KUnit Kernel (1/1)...
[02:34:35] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[02:34:35] ================== guc_buf (11 subtests) ===================
[02:34:35] [PASSED] test_smallest
[02:34:35] [PASSED] test_largest
[02:34:35] [PASSED] test_granular
[02:34:35] [PASSED] test_unique
[02:34:35] [PASSED] test_overlap
[02:34:35] [PASSED] test_reusable
[02:34:35] [PASSED] test_too_big
[02:34:35] [PASSED] test_flush
[02:34:35] [PASSED] test_lookup
[02:34:35] [PASSED] test_data
[02:34:35] [PASSED] test_class
[02:34:35] ===================== [PASSED] guc_buf =====================
[02:34:35] =================== guc_dbm (7 subtests) ===================
[02:34:35] [PASSED] test_empty
[02:34:35] [PASSED] test_default
[02:34:35] ======================== test_size ========================
[02:34:35] [PASSED] 4
[02:34:35] [PASSED] 8
[02:34:35] [PASSED] 32
[02:34:35] [PASSED] 256
[02:34:35] ==================== [PASSED] test_size ====================
[02:34:35] ======================= test_reuse ========================
[02:34:35] [PASSED] 4
[02:34:35] [PASSED] 8
[02:34:35] [PASSED] 32
[02:34:35] [PASSED] 256
[02:34:35] =================== [PASSED] test_reuse ====================
[02:34:35] =================== test_range_overlap ====================
[02:34:35] [PASSED] 4
[02:34:35] [PASSED] 8
[02:34:35] [PASSED] 32
[02:34:35] [PASSED] 256
[02:34:35] =============== [PASSED] test_range_overlap ================
[02:34:35] =================== test_range_compact ====================
[02:34:35] [PASSED] 4
[02:34:35] [PASSED] 8
[02:34:35] [PASSED] 32
[02:34:35] [PASSED] 256
[02:34:35] =============== [PASSED] test_range_compact ================
[02:34:35] ==================== test_range_spare =====================
[02:34:35] [PASSED] 4
[02:34:35] [PASSED] 8
[02:34:35] [PASSED] 32
[02:34:35] [PASSED] 256
[02:34:35] ================ [PASSED] test_range_spare =================
[02:34:35] ===================== [PASSED] guc_dbm =====================
[02:34:36] =================== guc_idm (6 subtests) ===================
[02:34:36] [PASSED] bad_init
[02:34:36] [PASSED] no_init
[02:34:36] [PASSED] init_fini
[02:34:36] [PASSED] check_used
[02:34:36] [PASSED] check_quota
[02:34:36] [PASSED] check_all
[02:34:36] ===================== [PASSED] guc_idm =====================
[02:34:36] =============== guc_klv_helpers (9 subtests) ===============
[02:34:36] [PASSED] test_count
[02:34:36] [PASSED] test_encode_u32
[02:34:36] [PASSED] test_encode_u64
[02:34:36] [PASSED] test_encode_string
[02:34:36] [PASSED] test_encode_object_raw
[02:34:36] [PASSED] test_encode_object_klv
[02:34:36] [PASSED] test_encode_object_nested
[02:34:36] [PASSED] test_encode_object_basic
[02:34:36] [PASSED] test_print
[02:34:36] ================= [PASSED] guc_klv_helpers =================
[02:34:36] ================== no_relay (3 subtests) ===================
[02:34:36] [PASSED] xe_drops_guc2pf_if_not_ready
[02:34:36] [PASSED] xe_drops_guc2vf_if_not_ready
[02:34:36] [PASSED] xe_rejects_send_if_not_ready
[02:34:36] ==================== [PASSED] no_relay =====================
[02:34:36] ================== pf_relay (14 subtests) ==================
[02:34:36] [PASSED] pf_rejects_guc2pf_too_short
[02:34:36] [PASSED] pf_rejects_guc2pf_too_long
[02:34:36] [PASSED] pf_rejects_guc2pf_no_payload
[02:34:36] [PASSED] pf_fails_no_payload
[02:34:36] [PASSED] pf_fails_bad_origin
[02:34:36] [PASSED] pf_fails_bad_type
[02:34:36] [PASSED] pf_txn_reports_error
[02:34:36] [PASSED] pf_txn_sends_pf2guc
[02:34:36] [PASSED] pf_sends_pf2guc
[02:34:36] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[02:34:36] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[02:34:36] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[02:34:36] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[02:34:36] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[02:34:36] ==================== [PASSED] pf_relay =====================
[02:34:36] ================== vf_relay (3 subtests) ===================
[02:34:36] [PASSED] vf_rejects_guc2vf_too_short
[02:34:36] [PASSED] vf_rejects_guc2vf_too_long
[02:34:36] [PASSED] vf_rejects_guc2vf_no_payload
[02:34:36] ==================== [PASSED] vf_relay =====================
[02:34:36] ================ pf_gt_config (9 subtests) =================
[02:34:36] [PASSED] fair_contexts_1vf
[02:34:36] [PASSED] fair_doorbells_1vf
[02:34:36] [PASSED] fair_ggtt_1vf
[02:34:36] ====================== fair_vram_1vf ======================
[02:34:36] [PASSED] 3.50 GiB
[02:34:36] [PASSED] 11.5 GiB
[02:34:36] [PASSED] 15.5 GiB
[02:34:36] [PASSED] 31.5 GiB
[02:34:36] [PASSED] 63.5 GiB
[02:34:36] [PASSED] 1.91 GiB
[02:34:36] ================== [PASSED] fair_vram_1vf ==================
[02:34:36] ================ fair_vram_1vf_admin_only =================
[02:34:36] [PASSED] 3.50 GiB
[02:34:36] [PASSED] 11.5 GiB
[02:34:36] [PASSED] 15.5 GiB
[02:34:36] [PASSED] 31.5 GiB
[02:34:36] [PASSED] 63.5 GiB
[02:34:36] [PASSED] 1.91 GiB
[02:34:36] ============ [PASSED] fair_vram_1vf_admin_only =============
[02:34:36] ====================== fair_contexts ======================
[02:34:36] [PASSED] 1 VF
[02:34:36] [PASSED] 2 VFs
[02:34:36] [PASSED] 3 VFs
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[02:34:36] [PASSED] 50 VFs
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[02:34:36] [PASSED] 61 VFs
[02:34:36] [PASSED] 62 VFs
[02:34:36] [PASSED] 63 VFs
[02:34:36] ================== [PASSED] fair_contexts ==================
[02:34:36] ===================== fair_doorbells ======================
[02:34:36] [PASSED] 1 VF
[02:34:36] [PASSED] 2 VFs
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[02:34:36] [PASSED] 50 VFs
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[02:34:36] [PASSED] 62 VFs
[02:34:36] [PASSED] 63 VFs
[02:34:36] ================= [PASSED] fair_doorbells ==================
[02:34:36] ======================== fair_ggtt ========================
[02:34:36] [PASSED] 1 VF
[02:34:36] [PASSED] 2 VFs
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[02:34:36] [PASSED] 63 VFs
[02:34:36] ==================== [PASSED] fair_ggtt ====================
[02:34:36] ======================== fair_vram ========================
[02:34:36] [PASSED] 1 VF
[02:34:36] [PASSED] 2 VFs
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[02:34:36] [PASSED] 37 VFs
[02:34:36] [PASSED] 38 VFs
[02:34:36] [PASSED] 39 VFs
[02:34:36] [PASSED] 40 VFs
[02:34:36] [PASSED] 41 VFs
[02:34:36] [PASSED] 42 VFs
[02:34:36] [PASSED] 43 VFs
[02:34:36] [PASSED] 44 VFs
[02:34:36] [PASSED] 45 VFs
[02:34:36] [PASSED] 46 VFs
[02:34:36] [PASSED] 47 VFs
[02:34:36] [PASSED] 48 VFs
[02:34:36] [PASSED] 49 VFs
[02:34:36] [PASSED] 50 VFs
[02:34:36] [PASSED] 51 VFs
[02:34:36] [PASSED] 52 VFs
[02:34:36] [PASSED] 53 VFs
[02:34:36] [PASSED] 54 VFs
[02:34:36] [PASSED] 55 VFs
[02:34:36] [PASSED] 56 VFs
[02:34:36] [PASSED] 57 VFs
[02:34:36] [PASSED] 58 VFs
[02:34:36] [PASSED] 59 VFs
[02:34:36] [PASSED] 60 VFs
[02:34:36] [PASSED] 61 VFs
[02:34:36] [PASSED] 62 VFs
[02:34:36] [PASSED] 63 VFs
[02:34:36] ==================== [PASSED] fair_vram ====================
[02:34:36] ================== [PASSED] pf_gt_config ===================
[02:34:36] ===================== lmtt (1 subtest) =====================
[02:34:36] ======================== test_ops =========================
[02:34:36] [PASSED] 2-level
[02:34:36] [PASSED] multi-level
[02:34:36] ==================== [PASSED] test_ops =====================
[02:34:36] ====================== [PASSED] lmtt =======================
[02:34:36] ================= sriov_packet (1 subtest) =================
[02:34:36] [PASSED] test_descriptor_init
[02:34:36] ================== [PASSED] sriov_packet ===================
[02:34:36] ================= pf_service (11 subtests) =================
[02:34:36] [PASSED] pf_negotiate_any
[02:34:36] [PASSED] pf_negotiate_base_match
[02:34:36] [PASSED] pf_negotiate_base_newer
[02:34:36] [PASSED] pf_negotiate_base_next
[02:34:36] [SKIPPED] pf_negotiate_base_older (no older minor)
[02:34:36] [PASSED] pf_negotiate_base_prev
[02:34:36] [PASSED] pf_negotiate_latest_match
[02:34:36] [PASSED] pf_negotiate_latest_newer
[02:34:36] [PASSED] pf_negotiate_latest_next
[02:34:36] [SKIPPED] pf_negotiate_latest_older (no older minor)
[02:34:36] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[02:34:36] =================== [PASSED] pf_service ====================
[02:34:36] ============ xe_bo_page_size_alloc (3 subtests) ============
[02:34:36] ============== xe_bo_page_size_alloc_only_2m ==============
[02:34:36] ========= [SKIPPED] xe_bo_page_size_alloc_only_2m ==========
[02:34:36] ============== xe_bo_page_size_alloc_only_1g ==============
[02:34:36] ========= [SKIPPED] xe_bo_page_size_alloc_only_1g ==========
[02:34:36] ============= xe_bo_page_size_alloc_mixed_bos =============
[02:34:36] ======== [SKIPPED] xe_bo_page_size_alloc_mixed_bos =========
[02:34:36] ============= [SKIPPED] xe_bo_page_size_alloc ==============
[02:34:36] ================= xe_guc_g2g (2 subtests) ==================
[02:34:36] ============== xe_live_guc_g2g_kunit_default ==============
[02:34:36] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[02:34:36] ============== xe_live_guc_g2g_kunit_allmem ===============
[02:34:36] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[02:34:36] =================== [SKIPPED] xe_guc_g2g ===================
[02:34:36] =================== xe_mocs (2 subtests) ===================
[02:34:36] ================ xe_live_mocs_kernel_kunit ================
[02:34:36] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[02:34:36] ================ xe_live_mocs_reset_kunit =================
[02:34:36] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[02:34:36] ==================== [SKIPPED] xe_mocs =====================
[02:34:36] ================= xe_migrate (2 subtests) ==================
[02:34:36] ================= xe_migrate_sanity_kunit =================
[02:34:36] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[02:34:36] ================== xe_validate_ccs_kunit ==================
[02:34:36] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[02:34:36] =================== [SKIPPED] xe_migrate ===================
[02:34:36] ================== xe_dma_buf (1 subtest) ==================
[02:34:36] ==================== xe_dma_buf_kunit =====================
[02:34:36] ================ [SKIPPED] xe_dma_buf_kunit ================
[02:34:36] =================== [SKIPPED] xe_dma_buf ===================
[02:34:36] ================= xe_bo_shrink (1 subtest) =================
[02:34:36] =================== xe_bo_shrink_kunit ====================
[02:34:36] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[02:34:36] ================== [SKIPPED] xe_bo_shrink ==================
[02:34:36] ==================== xe_bo (2 subtests) ====================
[02:34:36] ================== xe_ccs_migrate_kunit ===================
[02:34:36] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[02:34:36] ==================== xe_bo_evict_kunit ====================
[02:34:36] =============== [SKIPPED] xe_bo_evict_kunit ================
[02:34:36] ===================== [SKIPPED] xe_bo ======================
[02:34:36] ==================== args (13 subtests) ====================
[02:34:36] [PASSED] count_args_test
[02:34:36] [PASSED] call_args_example
[02:34:36] [PASSED] call_args_test
[02:34:36] [PASSED] drop_first_arg_example
[02:34:36] [PASSED] drop_first_arg_test
[02:34:36] [PASSED] first_arg_example
[02:34:36] [PASSED] first_arg_test
[02:34:36] [PASSED] last_arg_example
[02:34:36] [PASSED] last_arg_test
[02:34:36] [PASSED] pick_arg_example
[02:34:36] [PASSED] if_args_example
[02:34:36] [PASSED] if_args_test
[02:34:36] [PASSED] sep_comma_example
[02:34:36] ====================== [PASSED] args =======================
[02:34:36] =================== xe_pci (3 subtests) ====================
[02:34:36] ==================== check_graphics_ip ====================
[02:34:36] [PASSED] 12.00 Xe_LP
[02:34:36] [PASSED] 12.10 Xe_LP+
[02:34:36] [PASSED] 12.55 Xe_HPG
[02:34:36] [PASSED] 12.60 Xe_HPC
[02:34:36] [PASSED] 12.70 Xe_LPG
[02:34:36] [PASSED] 12.71 Xe_LPG
[02:34:36] [PASSED] 12.74 Xe_LPG+
[02:34:36] [PASSED] 20.01 Xe2_HPG
[02:34:36] [PASSED] 20.02 Xe2_HPG
[02:34:36] [PASSED] 20.04 Xe2_LPG
[02:34:36] [PASSED] 30.00 Xe3_LPG
[02:34:36] [PASSED] 30.01 Xe3_LPG
[02:34:36] [PASSED] 30.03 Xe3_LPG
[02:34:36] [PASSED] 30.04 Xe3_LPG
[02:34:36] [PASSED] 30.05 Xe3_LPG
[02:34:36] [PASSED] 35.10 Xe3p_LPG
[02:34:36] [PASSED] 35.11 Xe3p_XPC
[02:34:36] ================ [PASSED] check_graphics_ip ================
[02:34:36] ===================== check_media_ip ======================
[02:34:36] [PASSED] 12.00 Xe_M
[02:34:36] [PASSED] 12.55 Xe_HPM
[02:34:36] [PASSED] 13.00 Xe_LPM+
[02:34:36] [PASSED] 13.01 Xe2_HPM
[02:34:36] [PASSED] 20.00 Xe2_LPM
[02:34:36] [PASSED] 30.00 Xe3_LPM
[02:34:36] [PASSED] 30.02 Xe3_LPM
[02:34:36] [PASSED] 35.00 Xe3p_LPM
[02:34:36] [PASSED] 35.03 Xe3p_HPM
[02:34:36] ================= [PASSED] check_media_ip ==================
[02:34:36] =================== check_platform_desc ===================
[02:34:36] [PASSED] 0x9A60 (TIGERLAKE)
[02:34:36] [PASSED] 0x9A68 (TIGERLAKE)
[02:34:36] [PASSED] 0x9A70 (TIGERLAKE)
[02:34:36] [PASSED] 0x9A40 (TIGERLAKE)
[02:34:36] [PASSED] 0x9A49 (TIGERLAKE)
[02:34:36] [PASSED] 0x9A59 (TIGERLAKE)
[02:34:36] [PASSED] 0x9A78 (TIGERLAKE)
[02:34:36] [PASSED] 0x9AC0 (TIGERLAKE)
[02:34:36] [PASSED] 0x9AC9 (TIGERLAKE)
[02:34:36] [PASSED] 0x9AD9 (TIGERLAKE)
[02:34:36] [PASSED] 0x9AF8 (TIGERLAKE)
[02:34:36] [PASSED] 0x4C80 (ROCKETLAKE)
[02:34:36] [PASSED] 0x4C8A (ROCKETLAKE)
[02:34:36] [PASSED] 0x4C8B (ROCKETLAKE)
[02:34:36] [PASSED] 0x4C8C (ROCKETLAKE)
[02:34:36] [PASSED] 0x4C90 (ROCKETLAKE)
[02:34:36] [PASSED] 0x4C9A (ROCKETLAKE)
[02:34:36] [PASSED] 0x4680 (ALDERLAKE_S)
[02:34:36] [PASSED] 0x4682 (ALDERLAKE_S)
[02:34:36] [PASSED] 0x4688 (ALDERLAKE_S)
[02:34:36] [PASSED] 0x468A (ALDERLAKE_S)
[02:34:36] [PASSED] 0x468B (ALDERLAKE_S)
[02:34:36] [PASSED] 0x4690 (ALDERLAKE_S)
[02:34:36] [PASSED] 0x4692 (ALDERLAKE_S)
[02:34:36] [PASSED] 0x4693 (ALDERLAKE_S)
[02:34:36] [PASSED] 0x46A0 (ALDERLAKE_P)
[02:34:36] [PASSED] 0x46A1 (ALDERLAKE_P)
[02:34:36] [PASSED] 0x46A2 (ALDERLAKE_P)
[02:34:36] [PASSED] 0x46A3 (ALDERLAKE_P)
[02:34:36] [PASSED] 0x46A6 (ALDERLAKE_P)
[02:34:36] [PASSED] 0x46A8 (ALDERLAKE_P)
[02:34:36] [PASSED] 0x46AA (ALDERLAKE_P)
[02:34:36] [PASSED] 0x462A (ALDERLAKE_P)
[02:34:36] [PASSED] 0x4626 (ALDERLAKE_P)
[02:34:36] [PASSED] 0x4628 (ALDERLAKE_P)
[02:34:36] [PASSED] 0x46B0 (ALDERLAKE_P)
[02:34:36] [PASSED] 0x46B1 (ALDERLAKE_P)
[02:34:36] [PASSED] 0x46B2 (ALDERLAKE_P)
[02:34:36] [PASSED] 0x46B3 (ALDERLAKE_P)
[02:34:36] [PASSED] 0x46C0 (ALDERLAKE_P)
[02:34:36] [PASSED] 0x46C1 (ALDERLAKE_P)
[02:34:36] [PASSED] 0x46C2 (ALDERLAKE_P)
[02:34:36] [PASSED] 0x46C3 (ALDERLAKE_P)
[02:34:36] [PASSED] 0x46D0 (ALDERLAKE_N)
[02:34:36] [PASSED] 0x46D1 (ALDERLAKE_N)
[02:34:36] [PASSED] 0x46D2 (ALDERLAKE_N)
[02:34:36] [PASSED] 0x46D3 (ALDERLAKE_N)
[02:34:36] [PASSED] 0x46D4 (ALDERLAKE_N)
[02:34:36] [PASSED] 0xA721 (ALDERLAKE_P)
[02:34:36] [PASSED] 0xA7A1 (ALDERLAKE_P)
[02:34:36] [PASSED] 0xA7A9 (ALDERLAKE_P)
[02:34:36] [PASSED] 0xA7AC (ALDERLAKE_P)
[02:34:36] [PASSED] 0xA7AD (ALDERLAKE_P)
[02:34:36] [PASSED] 0xA720 (ALDERLAKE_P)
[02:34:36] [PASSED] 0xA7A0 (ALDERLAKE_P)
[02:34:36] [PASSED] 0xA7A8 (ALDERLAKE_P)
[02:34:36] [PASSED] 0xA7AA (ALDERLAKE_P)
[02:34:36] [PASSED] 0xA7AB (ALDERLAKE_P)
[02:34:36] [PASSED] 0xA780 (ALDERLAKE_S)
[02:34:36] [PASSED] 0xA781 (ALDERLAKE_S)
[02:34:36] [PASSED] 0xA782 (ALDERLAKE_S)
[02:34:36] [PASSED] 0xA783 (ALDERLAKE_S)
[02:34:36] [PASSED] 0xA788 (ALDERLAKE_S)
[02:34:36] [PASSED] 0xA789 (ALDERLAKE_S)
[02:34:36] [PASSED] 0xA78A (ALDERLAKE_S)
[02:34:36] [PASSED] 0xA78B (ALDERLAKE_S)
[02:34:36] [PASSED] 0x4905 (DG1)
[02:34:36] [PASSED] 0x4906 (DG1)
[02:34:36] [PASSED] 0x4907 (DG1)
[02:34:36] [PASSED] 0x4908 (DG1)
[02:34:36] [PASSED] 0x4909 (DG1)
[02:34:36] [PASSED] 0x56C0 (DG2)
[02:34:36] [PASSED] 0x56C2 (DG2)
[02:34:36] [PASSED] 0x56C1 (DG2)
[02:34:36] [PASSED] 0x7D51 (METEORLAKE)
[02:34:36] [PASSED] 0x7DD1 (METEORLAKE)
[02:34:36] [PASSED] 0x7D41 (METEORLAKE)
[02:34:36] [PASSED] 0x7D67 (METEORLAKE)
[02:34:36] [PASSED] 0xB640 (METEORLAKE)
[02:34:36] [PASSED] 0x56A0 (DG2)
[02:34:36] [PASSED] 0x56A1 (DG2)
[02:34:36] [PASSED] 0x56A2 (DG2)
[02:34:36] [PASSED] 0x56BE (DG2)
[02:34:36] [PASSED] 0x56BF (DG2)
[02:34:36] [PASSED] 0x5690 (DG2)
[02:34:36] [PASSED] 0x5691 (DG2)
[02:34:36] [PASSED] 0x5692 (DG2)
[02:34:36] [PASSED] 0x56A5 (DG2)
[02:34:36] [PASSED] 0x56A6 (DG2)
[02:34:36] [PASSED] 0x56B0 (DG2)
[02:34:36] [PASSED] 0x56B1 (DG2)
[02:34:36] [PASSED] 0x56BA (DG2)
[02:34:36] [PASSED] 0x56BB (DG2)
[02:34:36] [PASSED] 0x56BC (DG2)
[02:34:36] [PASSED] 0x56BD (DG2)
[02:34:36] [PASSED] 0x5693 (DG2)
[02:34:36] [PASSED] 0x5694 (DG2)
[02:34:36] [PASSED] 0x5695 (DG2)
[02:34:36] [PASSED] 0x56A3 (DG2)
[02:34:36] [PASSED] 0x56A4 (DG2)
[02:34:36] [PASSED] 0x56B2 (DG2)
[02:34:36] [PASSED] 0x56B3 (DG2)
[02:34:36] [PASSED] 0x5696 (DG2)
[02:34:36] [PASSED] 0x5697 (DG2)
[02:34:36] [PASSED] 0xB69 (PVC)
[02:34:36] [PASSED] 0xB6E (PVC)
[02:34:36] [PASSED] 0xBD4 (PVC)
[02:34:36] [PASSED] 0xBD5 (PVC)
[02:34:36] [PASSED] 0xBD6 (PVC)
[02:34:36] [PASSED] 0xBD7 (PVC)
[02:34:36] [PASSED] 0xBD8 (PVC)
[02:34:36] [PASSED] 0xBD9 (PVC)
[02:34:36] [PASSED] 0xBDA (PVC)
[02:34:36] [PASSED] 0xBDB (PVC)
[02:34:36] [PASSED] 0xBE0 (PVC)
[02:34:36] [PASSED] 0xBE1 (PVC)
[02:34:36] [PASSED] 0xBE5 (PVC)
[02:34:36] [PASSED] 0x7D40 (METEORLAKE)
[02:34:36] [PASSED] 0x7D45 (METEORLAKE)
[02:34:36] [PASSED] 0x7D55 (METEORLAKE)
[02:34:36] [PASSED] 0x7D60 (METEORLAKE)
[02:34:36] [PASSED] 0x7DD5 (METEORLAKE)
[02:34:36] [PASSED] 0x6420 (LUNARLAKE)
[02:34:36] [PASSED] 0x64A0 (LUNARLAKE)
[02:34:36] [PASSED] 0x64B0 (LUNARLAKE)
[02:34:36] [PASSED] 0xE202 (BATTLEMAGE)
[02:34:36] [PASSED] 0xE209 (BATTLEMAGE)
[02:34:36] [PASSED] 0xE20B (BATTLEMAGE)
[02:34:36] [PASSED] 0xE20C (BATTLEMAGE)
[02:34:36] [PASSED] 0xE20D (BATTLEMAGE)
[02:34:36] [PASSED] 0xE210 (BATTLEMAGE)
[02:34:36] [PASSED] 0xE211 (BATTLEMAGE)
[02:34:36] [PASSED] 0xE212 (BATTLEMAGE)
[02:34:36] [PASSED] 0xE216 (BATTLEMAGE)
[02:34:36] [PASSED] 0xE220 (BATTLEMAGE)
[02:34:36] [PASSED] 0xE221 (BATTLEMAGE)
[02:34:36] [PASSED] 0xE222 (BATTLEMAGE)
[02:34:36] [PASSED] 0xE223 (BATTLEMAGE)
[02:34:36] [PASSED] 0xB080 (PANTHERLAKE)
[02:34:36] [PASSED] 0xB081 (PANTHERLAKE)
[02:34:36] [PASSED] 0xB082 (PANTHERLAKE)
[02:34:36] [PASSED] 0xB083 (PANTHERLAKE)
[02:34:36] [PASSED] 0xB084 (PANTHERLAKE)
[02:34:36] [PASSED] 0xB085 (PANTHERLAKE)
[02:34:36] [PASSED] 0xB086 (PANTHERLAKE)
[02:34:36] [PASSED] 0xB087 (PANTHERLAKE)
[02:34:36] [PASSED] 0xB08F (PANTHERLAKE)
[02:34:36] [PASSED] 0xB090 (PANTHERLAKE)
[02:34:36] [PASSED] 0xB0A0 (PANTHERLAKE)
[02:34:36] [PASSED] 0xB0B0 (PANTHERLAKE)
[02:34:36] [PASSED] 0xFD80 (PANTHERLAKE)
[02:34:36] [PASSED] 0xFD81 (PANTHERLAKE)
[02:34:36] [PASSED] 0xD740 (NOVALAKE_S)
[02:34:36] [PASSED] 0xD741 (NOVALAKE_S)
[02:34:36] [PASSED] 0xD742 (NOVALAKE_S)
[02:34:36] [PASSED] 0xD743 (NOVALAKE_S)
[02:34:36] [PASSED] 0xD745 (NOVALAKE_S)
[02:34:36] [PASSED] 0xD74A (NOVALAKE_S)
[02:34:36] [PASSED] 0xD74B (NOVALAKE_S)
[02:34:36] [PASSED] 0x674C (CRESCENTISLAND)
[02:34:36] [PASSED] 0x674D (CRESCENTISLAND)
[02:34:36] [PASSED] 0x674E (CRESCENTISLAND)
[02:34:36] [PASSED] 0x674F (CRESCENTISLAND)
[02:34:36] [PASSED] 0x6750 (CRESCENTISLAND)
[02:34:36] [PASSED] 0xD750 (NOVALAKE_P)
[02:34:36] [PASSED] 0xD751 (NOVALAKE_P)
[02:34:36] [PASSED] 0xD752 (NOVALAKE_P)
[02:34:36] [PASSED] 0xD753 (NOVALAKE_P)
[02:34:36] [PASSED] 0xD754 (NOVALAKE_P)
[02:34:36] [PASSED] 0xD755 (NOVALAKE_P)
[02:34:36] [PASSED] 0xD756 (NOVALAKE_P)
[02:34:36] [PASSED] 0xD757 (NOVALAKE_P)
[02:34:36] [PASSED] 0xD75F (NOVALAKE_P)
[02:34:36] =============== [PASSED] check_platform_desc ===============
[02:34:36] ===================== [PASSED] xe_pci ======================
[02:34:36] ============= xe_rtp_tables_test (5 subtests) ==============
[02:34:36] ================== xe_rtp_table_gt_test ===================
[02:34:36] [PASSED] gt_was/14011060649
[02:34:36] [PASSED] gt_was/14011059788
[02:34:36] [PASSED] gt_was/14015795083
[02:34:36] [PASSED] gt_was/16021867713
[02:34:36] [PASSED] gt_was/14019449301
[02:34:36] [PASSED] gt_was/16028005424
[02:34:36] [PASSED] gt_was/14026578760
[02:34:36] [PASSED] gt_was/1409420604
[02:34:36] [PASSED] gt_was/1408615072
[02:34:36] [PASSED] gt_was/22010523718
[02:34:36] [PASSED] gt_was/14011006942
[02:34:36] [PASSED] gt_was/14014830051
[02:34:36] [PASSED] gt_was/18018781329
[02:34:36] [PASSED] gt_was/1509235366
[02:34:36] [PASSED] gt_was/18018781329
[02:34:36] [PASSED] gt_was/16016694945
[02:34:36] [PASSED] gt_was/14018575942
[02:34:36] [PASSED] gt_was/22016670082
[02:34:36] [PASSED] gt_was/22016670082
[02:34:36] [PASSED] gt_was/14017421178
[02:34:36] [PASSED] gt_was/16025250150
[02:34:36] [PASSED] gt_was/14021871409
[02:34:36] [PASSED] gt_was/16021865536
[02:34:36] [PASSED] gt_was/14021486841
[02:34:36] [PASSED] gt_was/14025160223
[02:34:36] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[02:34:36] [PASSED] gt_was/14025635424
[02:34:36] [PASSED] gt_was/16028005424
[02:34:36] ============== [PASSED] xe_rtp_table_gt_test ===============
[02:34:36] ================== xe_rtp_table_gt_test ===================
[02:34:36] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[02:34:36] [PASSED] gt_tunings/Tuning: 32B Access Enable
[02:34:36] [PASSED] gt_tunings/Tuning: L3 cache
[02:34:36] [PASSED] gt_tunings/Tuning: L3 cache - media
[02:34:36] [PASSED] gt_tunings/Tuning: Compression Overfetch
[02:34:36] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[02:34:36] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[02:34:36] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[02:34:36] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[02:34:36] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[02:34:36] [PASSED] gt_tunings/Tuning: Stateless compression control
[02:34:36] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[02:34:36] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[02:34:36] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[02:34:36] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[02:34:36] ============== [PASSED] xe_rtp_table_gt_test ===============
[02:34:36] ================== xe_rtp_table_oob_test ==================
[02:34:36] [PASSED] oob_was/1607983814
[02:34:36] [PASSED] oob_was/16010904313
[02:34:36] [PASSED] oob_was/18022495364
[02:34:36] [PASSED] oob_was/22012773006
[02:34:36] [PASSED] oob_was/14014475959
[02:34:36] [PASSED] oob_was/22011391025
[02:34:36] [PASSED] oob_was/22012727170
[02:34:36] [PASSED] oob_was/22012727685
[02:34:36] [PASSED] oob_was/22016596838
[02:34:36] [PASSED] oob_was/18020744125
[02:34:36] [PASSED] oob_was/1409600907
[02:34:36] [PASSED] oob_was/22014953428
[02:34:36] [PASSED] oob_was/16017236439
[02:34:36] [PASSED] oob_was/14019821291
[02:34:36] [PASSED] oob_was/14015076503
[02:34:36] [PASSED] oob_was/14018913170
[02:34:36] [PASSED] oob_was/14018094691
[02:34:36] [PASSED] oob_was/18024947630
[02:34:36] [PASSED] oob_was/16022287689
[02:34:36] [PASSED] oob_was/13011645652
[02:34:36] [PASSED] oob_was/14022293748
[02:34:36] [PASSED] oob_was/22019794406
[02:34:36] [PASSED] oob_was/22019338487
[02:34:36] [PASSED] oob_was/16023588340
[02:34:36] [PASSED] oob_was/14019789679
[02:34:36] [PASSED] oob_was/14022866841
[02:34:36] [PASSED] oob_was/16021333562
[02:34:36] [PASSED] oob_was/14016712196
[02:34:36] [PASSED] oob_was/14015568240
[02:34:36] [PASSED] oob_was/18013179988
[02:34:36] [PASSED] oob_was/1508761755
[02:34:36] [PASSED] oob_was/16023105232
[02:34:36] [PASSED] oob_was/16026508708
[02:34:36] [PASSED] oob_was/14020001231
[02:34:36] [PASSED] oob_was/16023683509
[02:34:36] [PASSED] oob_was/14025515070
[02:34:36] [PASSED] oob_was/15015404425_disable
[02:34:36] [PASSED] oob_was/16026007364
[02:34:36] [PASSED] oob_was/14020316580
[02:34:36] [PASSED] oob_was/14025883347
[02:34:36] [PASSED] oob_was/16029380221
[02:34:36] [PASSED] oob_was/22022079272
[02:34:36] [PASSED] oob_was/16029897822
[02:34:36] ============== [PASSED] xe_rtp_table_oob_test ==============
[02:34:36] ================ xe_rtp_table_dev_oob_test ================
[02:34:36] [PASSED] device_oob_was/22010954014
[02:34:36] [PASSED] device_oob_was/15015404425
[02:34:36] [PASSED] device_oob_was/22019338487_display
[02:34:36] [PASSED] device_oob_was/14022085890
[02:34:36] [PASSED] device_oob_was/14026539277
[02:34:36] [PASSED] device_oob_was/14026633728
[02:34:36] [PASSED] device_oob_was/14026746987
[02:34:36] [PASSED] device_oob_was/14026779378
[02:34:36] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[02:34:36] ========== xe_rtp_table_missing_upper_bound_test ==========
[02:34:36] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[02:34:36] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[02:34:36] [PASSED] register_whitelist/1806527549
[02:34:36] [PASSED] register_whitelist/allow_read_ctx_timestamp
[02:34:36] [PASSED] register_whitelist/allow_read_queue_timestamp
[02:34:36] [PASSED] register_whitelist/16014440446
[02:34:36] [PASSED] register_whitelist/16017236439
[02:34:36] [PASSED] register_whitelist/16020183090
[02:34:36] [PASSED] register_whitelist/14024997852
[02:34:36] [PASSED] register_whitelist/14024997852
[02:34:36] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[02:34:36] =============== [PASSED] xe_rtp_tables_test ================
[02:34:36] =================== xe_rtp (3 subtests) ====================
[02:34:36] =================== xe_rtp_rules_tests ====================
[02:34:36] [PASSED] no
[02:34:36] [PASSED] yes
[02:34:36] [PASSED] no-and-no
[02:34:36] [PASSED] no-and-yes
[02:34:36] [PASSED] yes-and-no
[02:34:36] [PASSED] yes-and-yes
[02:34:36] [PASSED] no-or-no
[02:34:36] [PASSED] no-or-yes
[02:34:36] [PASSED] yes-or-no
[02:34:36] [PASSED] yes-or-yes
[02:34:36] [PASSED] no-yes-or-yes-no
[02:34:36] [PASSED] no-yes-or-yes-yes
[02:34:36] [PASSED] yes-yes-or-no-yes
[02:34:36] [PASSED] yes-yes-or-yes-yes
[02:34:36] [PASSED] no-no-or-yes-or-no
[02:34:36] [PASSED] or
[02:34:36] [PASSED] or-yes
[02:34:36] [PASSED] or-no
[02:34:36] [PASSED] yes-or
[02:34:36] [PASSED] no-or
[02:34:36] [PASSED] no-or-or-yes
[02:34:36] [PASSED] yes-or-or-no
[02:34:36] [PASSED] no-or-or-no
[02:34:36] [PASSED] missing-context-engine-class
[02:34:36] [PASSED] missing-context-engine-class-or-yes
[02:34:36] [PASSED] missing-context-engine-class-or-or-yes
[02:34:36] =============== [PASSED] xe_rtp_rules_tests ================
[02:34:36] =============== xe_rtp_process_to_sr_tests ================
[02:34:36] [PASSED] coalesce-same-reg
[02:34:36] [PASSED] coalesce-same-reg-literal-and-func
[02:34:36] [PASSED] no-match-no-add
[02:34:36] [PASSED] two-regs-two-entries
[02:34:36] [PASSED] clr-one-set-other
[02:34:36] [PASSED] set-field
[02:34:36] [PASSED] conflict-duplicate
[02:34:36] [PASSED] conflict-not-disjoint
[02:34:36] [PASSED] conflict-not-disjoint-literal-and-func
[02:34:36] [PASSED] conflict-reg-type
[02:34:36] [PASSED] bad-mcr-reg-forced-to-regular
[02:34:36] [PASSED] bad-regular-reg-forced-to-mcr
[02:34:36] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[02:34:36] ================== xe_rtp_process_tests ===================
[02:34:36] [PASSED] active1
[02:34:36] [PASSED] active2
[02:34:36] [PASSED] active-inactive
[02:34:36] [PASSED] inactive-active
[02:34:36] [PASSED] inactive-active-inactive
[02:34:36] [PASSED] inactive-inactive-inactive
[02:34:36] ============== [PASSED] xe_rtp_process_tests ===============
[02:34:36] ===================== [PASSED] xe_rtp ======================
[02:34:36] ==================== xe_wa (1 subtest) =====================
[02:34:36] ======================== xe_wa_gt =========================
[02:34:36] [PASSED] TIGERLAKE B0
[02:34:36] [PASSED] DG1 A0
[02:34:36] [PASSED] DG1 B0
[02:34:36] [PASSED] ALDERLAKE_S A0
[02:34:36] [PASSED] ALDERLAKE_S B0
[02:34:36] [PASSED] ALDERLAKE_S C0
[02:34:36] [PASSED] ALDERLAKE_S D0
[02:34:36] [PASSED] ALDERLAKE_P A0
[02:34:36] [PASSED] ALDERLAKE_P B0
[02:34:36] [PASSED] ALDERLAKE_P C0
[02:34:36] [PASSED] ALDERLAKE_S RPLS D0
[02:34:36] [PASSED] ALDERLAKE_P RPLU E0
[02:34:36] [PASSED] DG2 G10 C0
[02:34:36] [PASSED] DG2 G11 B1
[02:34:36] [PASSED] DG2 G12 A1
[02:34:36] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[02:34:36] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[02:34:36] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[02:34:36] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[02:34:36] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[02:34:36] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[02:34:36] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[02:34:36] ==================== [PASSED] xe_wa_gt =====================
[02:34:36] ====================== [PASSED] xe_wa ======================
[02:34:36] ============================================================
[02:34:36] Testing complete. Ran 744 tests: passed: 723, skipped: 21
[02:34:36] Elapsed time: 36.848s total, 4.428s configuring, 31.753s building, 0.643s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[02:34:36] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[02:34:38] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[02:35:03] Starting KUnit Kernel (1/1)...
[02:35:03] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[02:35:03] ============ drm_test_pick_cmdline (2 subtests) ============
[02:35:03] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[02:35:03] =============== drm_test_pick_cmdline_named ===============
[02:35:03] [PASSED] NTSC
[02:35:03] [PASSED] NTSC-J
[02:35:03] [PASSED] PAL
[02:35:03] [PASSED] PAL-M
[02:35:03] =========== [PASSED] drm_test_pick_cmdline_named ===========
[02:35:03] ============== [PASSED] drm_test_pick_cmdline ==============
[02:35:03] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[02:35:03] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[02:35:03] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[02:35:03] =========== drm_validate_clone_mode (2 subtests) ===========
[02:35:03] ============== drm_test_check_in_clone_mode ===============
[02:35:03] [PASSED] in_clone_mode
[02:35:03] [PASSED] not_in_clone_mode
[02:35:03] ========== [PASSED] drm_test_check_in_clone_mode ===========
[02:35:03] =============== drm_test_check_valid_clones ===============
[02:35:03] [PASSED] not_in_clone_mode
[02:35:03] [PASSED] valid_clone
[02:35:03] [PASSED] invalid_clone
[02:35:03] =========== [PASSED] drm_test_check_valid_clones ===========
[02:35:03] ============= [PASSED] drm_validate_clone_mode =============
[02:35:03] ============= drm_validate_modeset (1 subtest) =============
[02:35:03] [PASSED] drm_test_check_connector_changed_modeset
[02:35:03] ============== [PASSED] drm_validate_modeset ===============
[02:35:03] ====== drm_test_bridge_get_current_state (2 subtests) ======
[02:35:03] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[02:35:03] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[02:35:03] ======== [PASSED] drm_test_bridge_get_current_state ========
[02:35:03] ====== drm_test_bridge_helper_reset_crtc (4 subtests) ======
[02:35:03] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[02:35:03] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[02:35:03] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[02:35:03] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[02:35:03] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[02:35:03] ============== drm_bridge_alloc (2 subtests) ===============
[02:35:03] [PASSED] drm_test_drm_bridge_alloc_basic
[02:35:03] [PASSED] drm_test_drm_bridge_alloc_get_put
[02:35:03] ================ [PASSED] drm_bridge_alloc =================
[02:35:03] ============= drm_bridge_bus_fmt (5 subtests) ==============
[02:35:03] [PASSED] drm_test_bridge_rgb_yuv_rgb
[02:35:03] [PASSED] drm_test_bridge_must_convert_to_yuv444
[02:35:03] [PASSED] drm_test_bridge_hdmi_auto_rgb
[02:35:03] [PASSED] drm_test_bridge_auto_first
[02:35:03] [PASSED] drm_test_bridge_rgb_yuv_no_path
[02:35:03] =============== [PASSED] drm_bridge_bus_fmt ================
[02:35:03] ============= drm_cmdline_parser (40 subtests) =============
[02:35:03] [PASSED] drm_test_cmdline_force_d_only
[02:35:03] [PASSED] drm_test_cmdline_force_D_only_dvi
[02:35:03] [PASSED] drm_test_cmdline_force_D_only_hdmi
[02:35:03] [PASSED] drm_test_cmdline_force_D_only_not_digital
[02:35:03] [PASSED] drm_test_cmdline_force_e_only
[02:35:03] [PASSED] drm_test_cmdline_res
[02:35:03] [PASSED] drm_test_cmdline_res_vesa
[02:35:03] [PASSED] drm_test_cmdline_res_vesa_rblank
[02:35:03] [PASSED] drm_test_cmdline_res_rblank
[02:35:03] [PASSED] drm_test_cmdline_res_bpp
[02:35:03] [PASSED] drm_test_cmdline_res_refresh
[02:35:03] [PASSED] drm_test_cmdline_res_bpp_refresh
[02:35:03] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[02:35:03] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[02:35:03] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[02:35:03] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[02:35:03] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[02:35:03] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[02:35:03] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[02:35:03] [PASSED] drm_test_cmdline_res_margins_force_on
[02:35:03] [PASSED] drm_test_cmdline_res_vesa_margins
[02:35:03] [PASSED] drm_test_cmdline_name
[02:35:03] [PASSED] drm_test_cmdline_name_bpp
[02:35:03] [PASSED] drm_test_cmdline_name_option
[02:35:03] [PASSED] drm_test_cmdline_name_bpp_option
[02:35:03] [PASSED] drm_test_cmdline_rotate_0
[02:35:03] [PASSED] drm_test_cmdline_rotate_90
[02:35:03] [PASSED] drm_test_cmdline_rotate_180
[02:35:03] [PASSED] drm_test_cmdline_rotate_270
[02:35:03] [PASSED] drm_test_cmdline_hmirror
[02:35:03] [PASSED] drm_test_cmdline_vmirror
[02:35:03] [PASSED] drm_test_cmdline_margin_options
[02:35:03] [PASSED] drm_test_cmdline_multiple_options
[02:35:03] [PASSED] drm_test_cmdline_bpp_extra_and_option
[02:35:03] [PASSED] drm_test_cmdline_extra_and_option
[02:35:03] [PASSED] drm_test_cmdline_freestanding_options
[02:35:03] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[02:35:03] [PASSED] drm_test_cmdline_panel_orientation
[02:35:03] ================ drm_test_cmdline_invalid =================
[02:35:03] [PASSED] margin_only
[02:35:03] [PASSED] interlace_only
[02:35:03] [PASSED] res_missing_x
[02:35:03] [PASSED] res_missing_y
[02:35:03] [PASSED] res_bad_y
[02:35:03] [PASSED] res_missing_y_bpp
[02:35:03] [PASSED] res_bad_bpp
[02:35:03] [PASSED] res_bad_refresh
[02:35:03] [PASSED] res_bpp_refresh_force_on_off
[02:35:03] [PASSED] res_invalid_mode
[02:35:03] [PASSED] res_bpp_wrong_place_mode
[02:35:03] [PASSED] name_bpp_refresh
[02:35:03] [PASSED] name_refresh
[02:35:03] [PASSED] name_refresh_wrong_mode
[02:35:03] [PASSED] name_refresh_invalid_mode
[02:35:03] [PASSED] rotate_multiple
[02:35:03] [PASSED] rotate_invalid_val
[02:35:03] [PASSED] rotate_truncated
[02:35:03] [PASSED] invalid_option
[02:35:03] [PASSED] invalid_tv_option
[02:35:03] [PASSED] truncated_tv_option
[02:35:03] ============ [PASSED] drm_test_cmdline_invalid =============
[02:35:03] =============== drm_test_cmdline_tv_options ===============
[02:35:03] [PASSED] NTSC
[02:35:03] [PASSED] NTSC_443
[02:35:03] [PASSED] NTSC_J
[02:35:03] [PASSED] PAL
[02:35:03] [PASSED] PAL_M
[02:35:03] [PASSED] PAL_N
[02:35:03] [PASSED] SECAM
[02:35:03] [PASSED] MONO_525
[02:35:03] [PASSED] MONO_625
[02:35:03] =========== [PASSED] drm_test_cmdline_tv_options ===========
[02:35:03] =============== [PASSED] drm_cmdline_parser ================
[02:35:03] ========== drmm_connector_hdmi_init (20 subtests) ==========
[02:35:03] [PASSED] drm_test_connector_hdmi_init_valid
[02:35:03] [PASSED] drm_test_connector_hdmi_init_bpc_8
[02:35:03] [PASSED] drm_test_connector_hdmi_init_bpc_10
[02:35:03] [PASSED] drm_test_connector_hdmi_init_bpc_12
[02:35:03] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[02:35:03] [PASSED] drm_test_connector_hdmi_init_bpc_null
[02:35:03] [PASSED] drm_test_connector_hdmi_init_formats_empty
[02:35:03] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[02:35:03] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[02:35:03] [PASSED] supported_formats=0x9 yuv420_allowed=1
[02:35:03] [PASSED] supported_formats=0x9 yuv420_allowed=0
[02:35:03] [PASSED] supported_formats=0x5 yuv420_allowed=1
[02:35:03] [PASSED] supported_formats=0x5 yuv420_allowed=0
[02:35:03] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[02:35:03] [PASSED] drm_test_connector_hdmi_init_null_ddc
[02:35:03] [PASSED] drm_test_connector_hdmi_init_null_product
[02:35:03] [PASSED] drm_test_connector_hdmi_init_null_vendor
[02:35:03] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[02:35:03] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[02:35:03] [PASSED] drm_test_connector_hdmi_init_product_valid
[02:35:03] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[02:35:03] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[02:35:03] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[02:35:03] ========= drm_test_connector_hdmi_init_type_valid =========
[02:35:03] [PASSED] HDMI-A
[02:35:03] [PASSED] HDMI-B
[02:35:03] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[02:35:03] ======== drm_test_connector_hdmi_init_type_invalid ========
[02:35:03] [PASSED] Unknown
[02:35:03] [PASSED] VGA
[02:35:03] [PASSED] DVI-I
[02:35:03] [PASSED] DVI-D
[02:35:03] [PASSED] DVI-A
[02:35:03] [PASSED] Composite
[02:35:03] [PASSED] SVIDEO
[02:35:03] [PASSED] LVDS
[02:35:03] [PASSED] Component
[02:35:03] [PASSED] DIN
[02:35:03] [PASSED] DP
[02:35:03] [PASSED] TV
[02:35:03] [PASSED] eDP
[02:35:03] [PASSED] Virtual
[02:35:03] [PASSED] DSI
[02:35:03] [PASSED] DPI
[02:35:03] [PASSED] Writeback
[02:35:03] [PASSED] SPI
[02:35:03] [PASSED] USB
[02:35:03] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[02:35:03] ============ [PASSED] drmm_connector_hdmi_init =============
[02:35:03] ============= drmm_connector_init (3 subtests) =============
[02:35:03] [PASSED] drm_test_drmm_connector_init
[02:35:03] [PASSED] drm_test_drmm_connector_init_null_ddc
[02:35:03] ========= drm_test_drmm_connector_init_type_valid =========
[02:35:03] [PASSED] Unknown
[02:35:03] [PASSED] VGA
[02:35:03] [PASSED] DVI-I
[02:35:03] [PASSED] DVI-D
[02:35:03] [PASSED] DVI-A
[02:35:03] [PASSED] Composite
[02:35:03] [PASSED] SVIDEO
[02:35:03] [PASSED] LVDS
[02:35:03] [PASSED] Component
[02:35:03] [PASSED] DIN
[02:35:03] [PASSED] DP
[02:35:03] [PASSED] HDMI-A
[02:35:03] [PASSED] HDMI-B
[02:35:03] [PASSED] TV
[02:35:03] [PASSED] eDP
[02:35:03] [PASSED] Virtual
[02:35:03] [PASSED] DSI
[02:35:03] [PASSED] DPI
[02:35:03] [PASSED] Writeback
[02:35:03] [PASSED] SPI
[02:35:03] [PASSED] USB
[02:35:03] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[02:35:03] =============== [PASSED] drmm_connector_init ===============
[02:35:03] ========= drm_connector_dynamic_init (6 subtests) ==========
[02:35:03] [PASSED] drm_test_drm_connector_dynamic_init
[02:35:03] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[02:35:03] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[02:35:03] [PASSED] drm_test_drm_connector_dynamic_init_properties
[02:35:03] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[02:35:03] [PASSED] Unknown
[02:35:03] [PASSED] VGA
[02:35:03] [PASSED] DVI-I
[02:35:03] [PASSED] DVI-D
[02:35:03] [PASSED] DVI-A
[02:35:03] [PASSED] Composite
[02:35:03] [PASSED] SVIDEO
[02:35:03] [PASSED] LVDS
[02:35:03] [PASSED] Component
[02:35:03] [PASSED] DIN
[02:35:03] [PASSED] DP
[02:35:03] [PASSED] HDMI-A
[02:35:03] [PASSED] HDMI-B
[02:35:03] [PASSED] TV
[02:35:03] [PASSED] eDP
[02:35:03] [PASSED] Virtual
[02:35:03] [PASSED] DSI
[02:35:03] [PASSED] DPI
[02:35:03] [PASSED] Writeback
[02:35:03] [PASSED] SPI
[02:35:03] [PASSED] USB
[02:35:03] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[02:35:03] ======== drm_test_drm_connector_dynamic_init_name =========
[02:35:03] [PASSED] Unknown
[02:35:03] [PASSED] VGA
[02:35:03] [PASSED] DVI-I
[02:35:03] [PASSED] DVI-D
[02:35:03] [PASSED] DVI-A
[02:35:03] [PASSED] Composite
[02:35:03] [PASSED] SVIDEO
[02:35:03] [PASSED] LVDS
[02:35:03] [PASSED] Component
[02:35:03] [PASSED] DIN
[02:35:03] [PASSED] DP
[02:35:03] [PASSED] HDMI-A
[02:35:03] [PASSED] HDMI-B
[02:35:03] [PASSED] TV
[02:35:03] [PASSED] eDP
[02:35:03] [PASSED] Virtual
[02:35:03] [PASSED] DSI
[02:35:03] [PASSED] DPI
[02:35:03] [PASSED] Writeback
[02:35:03] [PASSED] SPI
[02:35:03] [PASSED] USB
[02:35:03] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[02:35:03] =========== [PASSED] drm_connector_dynamic_init ============
[02:35:03] ==== drm_connector_dynamic_register_early (4 subtests) =====
[02:35:03] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[02:35:03] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[02:35:03] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[02:35:03] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[02:35:03] ====== [PASSED] drm_connector_dynamic_register_early =======
[02:35:03] ======= drm_connector_dynamic_register (7 subtests) ========
[02:35:03] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[02:35:03] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[02:35:03] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[02:35:03] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[02:35:03] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[02:35:03] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[02:35:03] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[02:35:03] ========= [PASSED] drm_connector_dynamic_register ==========
[02:35:03] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[02:35:03] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[02:35:03] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[02:35:03] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[02:35:03] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[02:35:03] ========== drm_test_get_tv_mode_from_name_valid ===========
[02:35:03] [PASSED] NTSC
[02:35:03] [PASSED] NTSC-443
[02:35:03] [PASSED] NTSC-J
[02:35:03] [PASSED] PAL
[02:35:03] [PASSED] PAL-M
[02:35:03] [PASSED] PAL-N
[02:35:03] [PASSED] SECAM
[02:35:03] [PASSED] Mono
[02:35:03] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[02:35:03] [PASSED] drm_test_get_tv_mode_from_name_truncated
[02:35:03] ============ [PASSED] drm_get_tv_mode_from_name ============
[02:35:03] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[02:35:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[02:35:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[02:35:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[02:35:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[02:35:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[02:35:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[02:35:03] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[02:35:03] [PASSED] VIC 96
[02:35:03] [PASSED] VIC 97
[02:35:03] [PASSED] VIC 101
[02:35:03] [PASSED] VIC 102
[02:35:03] [PASSED] VIC 106
[02:35:03] [PASSED] VIC 107
[02:35:03] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[02:35:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[02:35:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[02:35:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[02:35:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[02:35:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[02:35:03] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[02:35:03] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[02:35:03] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[02:35:03] [PASSED] Automatic
[02:35:03] [PASSED] Full
[02:35:03] [PASSED] Limited 16:235
[02:35:03] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[02:35:03] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[02:35:03] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[02:35:03] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[02:35:03] === drm_test_drm_hdmi_connector_get_output_format_name ====
[02:35:03] [PASSED] RGB
[02:35:03] [PASSED] YUV 4:2:0
[02:35:03] [PASSED] YUV 4:2:2
[02:35:03] [PASSED] YUV 4:4:4
[02:35:03] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[02:35:03] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[02:35:03] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[02:35:03] ============= drm_damage_helper (21 subtests) ==============
[02:35:03] [PASSED] drm_test_damage_iter_no_damage
[02:35:03] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[02:35:03] [PASSED] drm_test_damage_iter_no_damage_src_moved
[02:35:03] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[02:35:03] [PASSED] drm_test_damage_iter_no_damage_not_visible
[02:35:03] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[02:35:03] [PASSED] drm_test_damage_iter_no_damage_no_fb
[02:35:03] [PASSED] drm_test_damage_iter_simple_damage
[02:35:03] [PASSED] drm_test_damage_iter_single_damage
[02:35:03] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[02:35:03] [PASSED] drm_test_damage_iter_single_damage_outside_src
[02:35:03] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[02:35:03] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[02:35:03] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[02:35:03] [PASSED] drm_test_damage_iter_single_damage_src_moved
[02:35:03] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[02:35:03] [PASSED] drm_test_damage_iter_damage
[02:35:03] [PASSED] drm_test_damage_iter_damage_one_intersect
[02:35:03] [PASSED] drm_test_damage_iter_damage_one_outside
[02:35:03] [PASSED] drm_test_damage_iter_damage_src_moved
[02:35:03] [PASSED] drm_test_damage_iter_damage_not_visible
[02:35:03] ================ [PASSED] drm_damage_helper ================
[02:35:03] ============== drm_dp_mst_helper (3 subtests) ==============
[02:35:03] ============== drm_test_dp_mst_calc_pbn_mode ==============
[02:35:03] [PASSED] Clock 154000 BPP 30 DSC disabled
[02:35:03] [PASSED] Clock 234000 BPP 30 DSC disabled
[02:35:03] [PASSED] Clock 297000 BPP 24 DSC disabled
[02:35:03] [PASSED] Clock 332880 BPP 24 DSC enabled
[02:35:03] [PASSED] Clock 324540 BPP 24 DSC enabled
[02:35:03] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[02:35:03] ============== drm_test_dp_mst_calc_pbn_div ===============
[02:35:03] [PASSED] Link rate 2000000 lane count 4
[02:35:03] [PASSED] Link rate 2000000 lane count 2
[02:35:03] [PASSED] Link rate 2000000 lane count 1
[02:35:03] [PASSED] Link rate 1350000 lane count 4
[02:35:03] [PASSED] Link rate 1350000 lane count 2
[02:35:03] [PASSED] Link rate 1350000 lane count 1
[02:35:03] [PASSED] Link rate 1000000 lane count 4
[02:35:03] [PASSED] Link rate 1000000 lane count 2
[02:35:03] [PASSED] Link rate 1000000 lane count 1
[02:35:03] [PASSED] Link rate 810000 lane count 4
[02:35:03] [PASSED] Link rate 810000 lane count 2
[02:35:03] [PASSED] Link rate 810000 lane count 1
[02:35:03] [PASSED] Link rate 540000 lane count 4
[02:35:03] [PASSED] Link rate 540000 lane count 2
[02:35:03] [PASSED] Link rate 540000 lane count 1
[02:35:03] [PASSED] Link rate 270000 lane count 4
[02:35:03] [PASSED] Link rate 270000 lane count 2
[02:35:03] [PASSED] Link rate 270000 lane count 1
[02:35:03] [PASSED] Link rate 162000 lane count 4
[02:35:03] [PASSED] Link rate 162000 lane count 2
[02:35:03] [PASSED] Link rate 162000 lane count 1
[02:35:03] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[02:35:03] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[02:35:03] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[02:35:03] [PASSED] DP_POWER_UP_PHY with port number
[02:35:03] [PASSED] DP_POWER_DOWN_PHY with port number
[02:35:03] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[02:35:03] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[02:35:03] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[02:35:03] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[02:35:03] [PASSED] DP_QUERY_PAYLOAD with port number
[02:35:03] [PASSED] DP_QUERY_PAYLOAD with VCPI
[02:35:03] [PASSED] DP_REMOTE_DPCD_READ with port number
[02:35:03] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[02:35:03] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[02:35:03] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[02:35:03] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[02:35:03] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[02:35:03] [PASSED] DP_REMOTE_I2C_READ with port number
[02:35:03] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[02:35:03] [PASSED] DP_REMOTE_I2C_READ with transactions array
[02:35:03] [PASSED] DP_REMOTE_I2C_WRITE with port number
[02:35:03] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[02:35:03] [PASSED] DP_REMOTE_I2C_WRITE with data array
[02:35:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[02:35:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[02:35:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[02:35:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[02:35:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[02:35:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[02:35:03] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[02:35:03] ================ [PASSED] drm_dp_mst_helper ================
[02:35:03] ================== drm_exec (7 subtests) ===================
[02:35:03] [PASSED] sanitycheck
[02:35:03] [PASSED] test_lock
[02:35:03] [PASSED] test_lock_unlock
[02:35:03] [PASSED] test_duplicates
[02:35:03] [PASSED] test_prepare
[02:35:03] [PASSED] test_prepare_array
[02:35:03] [PASSED] test_multiple_loops
[02:35:03] ==================== [PASSED] drm_exec =====================
[02:35:03] =========== drm_format_helper_test (17 subtests) ===========
[02:35:03] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[02:35:03] [PASSED] single_pixel_source_buffer
[02:35:03] [PASSED] single_pixel_clip_rectangle
[02:35:03] [PASSED] well_known_colors
[02:35:03] [PASSED] destination_pitch
[02:35:03] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[02:35:03] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[02:35:03] [PASSED] single_pixel_source_buffer
[02:35:03] [PASSED] single_pixel_clip_rectangle
[02:35:03] [PASSED] well_known_colors
[02:35:03] [PASSED] destination_pitch
[02:35:03] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[02:35:03] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[02:35:03] [PASSED] single_pixel_source_buffer
[02:35:03] [PASSED] single_pixel_clip_rectangle
[02:35:03] [PASSED] well_known_colors
[02:35:03] [PASSED] destination_pitch
[02:35:03] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[02:35:03] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[02:35:03] [PASSED] single_pixel_source_buffer
[02:35:03] [PASSED] single_pixel_clip_rectangle
[02:35:03] [PASSED] well_known_colors
[02:35:03] [PASSED] destination_pitch
[02:35:03] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[02:35:03] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[02:35:03] [PASSED] single_pixel_source_buffer
[02:35:03] [PASSED] single_pixel_clip_rectangle
[02:35:03] [PASSED] well_known_colors
[02:35:03] [PASSED] destination_pitch
[02:35:03] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[02:35:03] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[02:35:03] [PASSED] single_pixel_source_buffer
[02:35:03] [PASSED] single_pixel_clip_rectangle
[02:35:03] [PASSED] well_known_colors
[02:35:03] [PASSED] destination_pitch
[02:35:03] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[02:35:03] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[02:35:03] [PASSED] single_pixel_source_buffer
[02:35:03] [PASSED] single_pixel_clip_rectangle
[02:35:03] [PASSED] well_known_colors
[02:35:03] [PASSED] destination_pitch
[02:35:03] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[02:35:03] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[02:35:03] [PASSED] single_pixel_source_buffer
[02:35:03] [PASSED] single_pixel_clip_rectangle
[02:35:03] [PASSED] well_known_colors
[02:35:03] [PASSED] destination_pitch
[02:35:03] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[02:35:03] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[02:35:03] [PASSED] single_pixel_source_buffer
[02:35:03] [PASSED] single_pixel_clip_rectangle
[02:35:03] [PASSED] well_known_colors
[02:35:03] [PASSED] destination_pitch
[02:35:03] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[02:35:03] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[02:35:03] [PASSED] single_pixel_source_buffer
[02:35:03] [PASSED] single_pixel_clip_rectangle
[02:35:03] [PASSED] well_known_colors
[02:35:03] [PASSED] destination_pitch
[02:35:03] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[02:35:03] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[02:35:03] [PASSED] single_pixel_source_buffer
[02:35:03] [PASSED] single_pixel_clip_rectangle
[02:35:03] [PASSED] well_known_colors
[02:35:03] [PASSED] destination_pitch
[02:35:03] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[02:35:03] ============== drm_test_fb_xrgb8888_to_mono ===============
[02:35:03] [PASSED] single_pixel_source_buffer
[02:35:03] [PASSED] single_pixel_clip_rectangle
[02:35:03] [PASSED] well_known_colors
[02:35:03] [PASSED] destination_pitch
[02:35:03] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[02:35:03] ==================== drm_test_fb_swab =====================
[02:35:03] [PASSED] single_pixel_source_buffer
[02:35:03] [PASSED] single_pixel_clip_rectangle
[02:35:03] [PASSED] well_known_colors
[02:35:03] [PASSED] destination_pitch
[02:35:03] ================ [PASSED] drm_test_fb_swab =================
[02:35:03] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[02:35:03] [PASSED] single_pixel_source_buffer
[02:35:03] [PASSED] single_pixel_clip_rectangle
[02:35:03] [PASSED] well_known_colors
[02:35:03] [PASSED] destination_pitch
[02:35:03] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[02:35:03] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[02:35:03] [PASSED] single_pixel_source_buffer
[02:35:03] [PASSED] single_pixel_clip_rectangle
[02:35:03] [PASSED] well_known_colors
[02:35:03] [PASSED] destination_pitch
[02:35:03] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[02:35:03] ================= drm_test_fb_clip_offset =================
[02:35:03] [PASSED] pass through
[02:35:03] [PASSED] horizontal offset
[02:35:03] [PASSED] vertical offset
[02:35:03] [PASSED] horizontal and vertical offset
[02:35:03] [PASSED] horizontal offset (custom pitch)
[02:35:03] [PASSED] vertical offset (custom pitch)
[02:35:03] [PASSED] horizontal and vertical offset (custom pitch)
[02:35:03] ============= [PASSED] drm_test_fb_clip_offset =============
[02:35:03] =================== drm_test_fb_memcpy ====================
[02:35:03] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[02:35:03] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[02:35:03] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[02:35:03] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[02:35:03] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[02:35:03] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[02:35:03] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[02:35:03] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[02:35:03] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[02:35:03] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[02:35:03] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[02:35:03] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[02:35:03] =============== [PASSED] drm_test_fb_memcpy ================
[02:35:03] ============= [PASSED] drm_format_helper_test ==============
[02:35:03] ================= drm_format (18 subtests) =================
[02:35:03] [PASSED] drm_test_format_block_width_invalid
[02:35:03] [PASSED] drm_test_format_block_width_one_plane
[02:35:03] [PASSED] drm_test_format_block_width_two_plane
[02:35:03] [PASSED] drm_test_format_block_width_three_plane
[02:35:03] [PASSED] drm_test_format_block_width_tiled
[02:35:03] [PASSED] drm_test_format_block_height_invalid
[02:35:03] [PASSED] drm_test_format_block_height_one_plane
[02:35:03] [PASSED] drm_test_format_block_height_two_plane
[02:35:03] [PASSED] drm_test_format_block_height_three_plane
[02:35:03] [PASSED] drm_test_format_block_height_tiled
[02:35:03] [PASSED] drm_test_format_min_pitch_invalid
[02:35:03] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[02:35:03] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[02:35:03] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[02:35:03] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[02:35:03] [PASSED] drm_test_format_min_pitch_two_plane
[02:35:03] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[02:35:03] [PASSED] drm_test_format_min_pitch_tiled
[02:35:03] =================== [PASSED] drm_format ====================
[02:35:03] ============== drm_framebuffer (10 subtests) ===============
[02:35:03] ========== drm_test_framebuffer_check_src_coords ==========
[02:35:03] [PASSED] Success: source fits into fb
[02:35:03] [PASSED] Fail: overflowing fb with x-axis coordinate
[02:35:03] [PASSED] Fail: overflowing fb with y-axis coordinate
[02:35:03] [PASSED] Fail: overflowing fb with source width
[02:35:03] [PASSED] Fail: overflowing fb with source height
[02:35:03] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[02:35:03] [PASSED] drm_test_framebuffer_cleanup
[02:35:03] =============== drm_test_framebuffer_create ===============
[02:35:03] [PASSED] ABGR8888 normal sizes
[02:35:03] [PASSED] ABGR8888 max sizes
[02:35:03] [PASSED] ABGR8888 pitch greater than min required
[02:35:03] [PASSED] ABGR8888 pitch less than min required
[02:35:03] [PASSED] ABGR8888 Invalid width
[02:35:03] [PASSED] ABGR8888 Invalid buffer handle
[02:35:03] [PASSED] No pixel format
[02:35:03] [PASSED] ABGR8888 Width 0
[02:35:03] [PASSED] ABGR8888 Height 0
[02:35:03] [PASSED] ABGR8888 Out of bound height * pitch combination
[02:35:03] [PASSED] ABGR8888 Large buffer offset
[02:35:03] [PASSED] ABGR8888 Buffer offset for inexistent plane
[02:35:03] [PASSED] ABGR8888 Invalid flag
[02:35:03] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[02:35:03] [PASSED] ABGR8888 Valid buffer modifier
[02:35:03] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[02:35:03] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[02:35:03] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[02:35:03] [PASSED] NV12 Normal sizes
[02:35:03] [PASSED] NV12 Max sizes
[02:35:03] [PASSED] NV12 Invalid pitch
[02:35:03] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[02:35:03] [PASSED] NV12 different modifier per-plane
[02:35:03] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[02:35:03] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[02:35:03] [PASSED] NV12 Modifier for inexistent plane
[02:35:03] [PASSED] NV12 Handle for inexistent plane
[02:35:03] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[02:35:03] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[02:35:03] [PASSED] YVU420 Normal sizes
[02:35:03] [PASSED] YVU420 Max sizes
[02:35:03] [PASSED] YVU420 Invalid pitch
[02:35:03] [PASSED] YVU420 Different pitches
[02:35:03] [PASSED] YVU420 Different buffer offsets/pitches
[02:35:03] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[02:35:03] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[02:35:03] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[02:35:03] [PASSED] YVU420 Valid modifier
[02:35:03] [PASSED] YVU420 Different modifiers per plane
[02:35:03] [PASSED] YVU420 Modifier for inexistent plane
[02:35:03] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[02:35:03] [PASSED] X0L2 Normal sizes
[02:35:03] [PASSED] X0L2 Max sizes
[02:35:03] [PASSED] X0L2 Invalid pitch
[02:35:03] [PASSED] X0L2 Pitch greater than minimum required
[02:35:03] [PASSED] X0L2 Handle for inexistent plane
[02:35:03] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[02:35:03] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[02:35:03] [PASSED] X0L2 Valid modifier
[02:35:03] [PASSED] X0L2 Modifier for inexistent plane
[02:35:03] =========== [PASSED] drm_test_framebuffer_create ===========
[02:35:03] [PASSED] drm_test_framebuffer_free
[02:35:03] [PASSED] drm_test_framebuffer_init
[02:35:03] [PASSED] drm_test_framebuffer_init_bad_format
[02:35:03] [PASSED] drm_test_framebuffer_init_dev_mismatch
[02:35:03] [PASSED] drm_test_framebuffer_lookup
[02:35:03] [PASSED] drm_test_framebuffer_lookup_inexistent
[02:35:03] [PASSED] drm_test_framebuffer_modifiers_not_supported
[02:35:03] ================= [PASSED] drm_framebuffer =================
[02:35:03] ================ drm_gem_shmem (8 subtests) ================
[02:35:03] [PASSED] drm_gem_shmem_test_obj_create
[02:35:03] [PASSED] drm_gem_shmem_test_obj_create_private
[02:35:03] [PASSED] drm_gem_shmem_test_pin_pages
[02:35:03] [PASSED] drm_gem_shmem_test_vmap
[02:35:03] [PASSED] drm_gem_shmem_test_get_sg_table
[02:35:03] [PASSED] drm_gem_shmem_test_get_pages_sgt
[02:35:03] [PASSED] drm_gem_shmem_test_madvise
[02:35:03] [PASSED] drm_gem_shmem_test_purge
[02:35:03] ================== [PASSED] drm_gem_shmem ==================
[02:35:03] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[02:35:03] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[02:35:03] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[02:35:03] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[02:35:03] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[02:35:03] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[02:35:03] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[02:35:03] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[02:35:03] [PASSED] Automatic
[02:35:03] [PASSED] Full
[02:35:03] [PASSED] Limited 16:235
[02:35:03] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[02:35:03] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[02:35:03] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[02:35:03] [PASSED] drm_test_check_disable_connector
[02:35:03] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[02:35:03] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[02:35:03] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[02:35:03] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[02:35:03] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[02:35:03] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[02:35:03] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[02:35:03] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[02:35:03] [PASSED] drm_test_check_output_bpc_dvi
[02:35:03] [PASSED] drm_test_check_output_bpc_format_vic_1
[02:35:03] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[02:35:03] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[02:35:03] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[02:35:03] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[02:35:03] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[02:35:03] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[02:35:03] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[02:35:03] ============ drm_test_check_hdmi_color_format =============
[02:35:03] [PASSED] AUTO -> RGB
[02:35:03] [PASSED] YCBCR422 -> YUV422
[02:35:03] [PASSED] YCBCR420 -> YUV420
[02:35:03] [PASSED] YCBCR444 -> YUV444
[02:35:03] [PASSED] RGB -> RGB
[02:35:03] ======== [PASSED] drm_test_check_hdmi_color_format =========
[02:35:03] ======== drm_test_check_hdmi_color_format_420_only ========
[02:35:03] [PASSED] RGB should fail
[02:35:03] [PASSED] YUV444 should fail
[02:35:03] [PASSED] YUV422 should fail
[02:35:03] [PASSED] YUV420 should work
[02:35:03] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[02:35:03] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[02:35:03] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[02:35:03] [PASSED] drm_test_check_broadcast_rgb_value
[02:35:03] [PASSED] drm_test_check_bpc_8_value
[02:35:03] [PASSED] drm_test_check_bpc_10_value
[02:35:03] [PASSED] drm_test_check_bpc_12_value
[02:35:03] [PASSED] drm_test_check_format_value
[02:35:03] [PASSED] drm_test_check_tmds_char_value
[02:35:03] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[02:35:03] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[02:35:03] [PASSED] drm_test_check_mode_valid
[02:35:03] [PASSED] drm_test_check_mode_valid_reject
[02:35:03] [PASSED] drm_test_check_mode_valid_reject_rate
[02:35:03] [PASSED] drm_test_check_mode_valid_reject_max_clock
[02:35:03] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[02:35:03] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[02:35:03] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[02:35:03] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[02:35:03] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[02:35:03] [PASSED] drm_test_check_infoframes
[02:35:03] [PASSED] drm_test_check_reject_avi_infoframe
[02:35:03] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[02:35:03] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[02:35:03] [PASSED] drm_test_check_reject_audio_infoframe
[02:35:03] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[02:35:03] ================= drm_managed (2 subtests) =================
[02:35:03] [PASSED] drm_test_managed_release_action
[02:35:03] [PASSED] drm_test_managed_run_action
[02:35:03] =================== [PASSED] drm_managed ===================
[02:35:03] =================== drm_mm (6 subtests) ====================
[02:35:03] [PASSED] drm_test_mm_init
[02:35:03] [PASSED] drm_test_mm_debug
[02:35:03] [PASSED] drm_test_mm_align32
[02:35:03] [PASSED] drm_test_mm_align64
[02:35:03] [PASSED] drm_test_mm_lowest
[02:35:03] [PASSED] drm_test_mm_highest
[02:35:03] ===================== [PASSED] drm_mm ======================
[02:35:03] ============= drm_modes_analog_tv (5 subtests) =============
[02:35:03] [PASSED] drm_test_modes_analog_tv_mono_576i
[02:35:03] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[02:35:03] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[02:35:03] [PASSED] drm_test_modes_analog_tv_pal_576i
[02:35:03] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[02:35:03] =============== [PASSED] drm_modes_analog_tv ===============
[02:35:03] ============== drm_plane_helper (2 subtests) ===============
[02:35:03] =============== drm_test_check_plane_state ================
[02:35:03] [PASSED] clipping_simple
[02:35:03] [PASSED] clipping_rotate_reflect
[02:35:03] [PASSED] positioning_simple
[02:35:03] [PASSED] upscaling
[02:35:03] [PASSED] downscaling
[02:35:03] [PASSED] rounding1
[02:35:03] [PASSED] rounding2
[02:35:03] [PASSED] rounding3
[02:35:03] [PASSED] rounding4
[02:35:03] =========== [PASSED] drm_test_check_plane_state ============
[02:35:03] =========== drm_test_check_invalid_plane_state ============
[02:35:03] [PASSED] positioning_invalid
[02:35:03] [PASSED] upscaling_invalid
[02:35:03] [PASSED] downscaling_invalid
[02:35:03] ======= [PASSED] drm_test_check_invalid_plane_state ========
[02:35:03] ================ [PASSED] drm_plane_helper =================
[02:35:03] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[02:35:03] ====== drm_test_connector_helper_tv_get_modes_check =======
[02:35:03] [PASSED] None
[02:35:03] [PASSED] PAL
[02:35:03] [PASSED] NTSC
[02:35:03] [PASSED] Both, NTSC Default
[02:35:03] [PASSED] Both, PAL Default
[02:35:03] [PASSED] Both, NTSC Default, with PAL on command-line
[02:35:03] [PASSED] Both, PAL Default, with NTSC on command-line
[02:35:03] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[02:35:03] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[02:35:03] ================== drm_rect (9 subtests) ===================
[02:35:03] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[02:35:03] [PASSED] drm_test_rect_clip_scaled_not_clipped
[02:35:03] [PASSED] drm_test_rect_clip_scaled_clipped
[02:35:03] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[02:35:03] ================= drm_test_rect_intersect =================
[02:35:03] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[02:35:03] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[02:35:03] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[02:35:03] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[02:35:03] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[02:35:03] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[02:35:03] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[02:35:03] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[02:35:03] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[02:35:03] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[02:35:03] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[02:35:03] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[02:35:03] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[02:35:03] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[02:35:03] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[02:35:03] ============= [PASSED] drm_test_rect_intersect =============
[02:35:03] ================ drm_test_rect_calc_hscale ================
[02:35:03] [PASSED] normal use
[02:35:03] [PASSED] out of max range
[02:35:03] [PASSED] out of min range
[02:35:03] [PASSED] zero dst
[02:35:03] [PASSED] negative src
[02:35:03] [PASSED] negative dst
[02:35:03] ============ [PASSED] drm_test_rect_calc_hscale ============
[02:35:03] ================ drm_test_rect_calc_vscale ================
[02:35:03] [PASSED] normal use
[02:35:03] [PASSED] out of max range
[02:35:03] [PASSED] out of min range
[02:35:03] [PASSED] zero dst
[02:35:03] [PASSED] negative src
[02:35:03] [PASSED] negative dst
[02:35:03] ============ [PASSED] drm_test_rect_calc_vscale ============
[02:35:03] ================== drm_test_rect_rotate ===================
[02:35:03] [PASSED] reflect-x
[02:35:03] [PASSED] reflect-y
[02:35:03] [PASSED] rotate-0
[02:35:03] [PASSED] rotate-90
[02:35:03] [PASSED] rotate-180
[02:35:03] [PASSED] rotate-270
[02:35:03] ============== [PASSED] drm_test_rect_rotate ===============
[02:35:03] ================ drm_test_rect_rotate_inv =================
[02:35:03] [PASSED] reflect-x
[02:35:03] [PASSED] reflect-y
[02:35:03] [PASSED] rotate-0
[02:35:03] [PASSED] rotate-90
[02:35:03] [PASSED] rotate-180
[02:35:03] [PASSED] rotate-270
[02:35:03] ============ [PASSED] drm_test_rect_rotate_inv =============
[02:35:03] ==================== [PASSED] drm_rect =====================
[02:35:03] ============ drm_sysfb_modeset_test (1 subtest) ============
[02:35:03] ============ drm_test_sysfb_build_fourcc_list =============
[02:35:03] [PASSED] no native formats
[02:35:03] [PASSED] XRGB8888 as native format
[02:35:03] [PASSED] remove duplicates
[02:35:03] [PASSED] convert alpha formats
[02:35:03] [PASSED] random formats
[02:35:03] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[02:35:03] ============= [PASSED] drm_sysfb_modeset_test ==============
[02:35:03] ================== drm_fixp (2 subtests) ===================
[02:35:03] [PASSED] drm_test_int2fixp
[02:35:03] [PASSED] drm_test_sm2fixp
[02:35:03] ==================== [PASSED] drm_fixp =====================
[02:35:03] ============================================================
[02:35:03] Testing complete. Ran 639 tests: passed: 639
[02:35:03] Elapsed time: 26.825s total, 1.807s configuring, 24.850s building, 0.143s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[02:35:03] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[02:35:05] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[02:35:15] Starting KUnit Kernel (1/1)...
[02:35:15] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[02:35:15] ================= ttm_device (5 subtests) ==================
[02:35:15] [PASSED] ttm_device_init_basic
[02:35:15] [PASSED] ttm_device_init_multiple
[02:35:15] [PASSED] ttm_device_fini_basic
[02:35:15] [PASSED] ttm_device_init_no_vma_man
[02:35:15] ================== ttm_device_init_pools ==================
[02:35:15] [PASSED] No DMA allocations, no DMA32 required
[02:35:15] [PASSED] DMA allocations, DMA32 required
[02:35:15] [PASSED] No DMA allocations, DMA32 required
[02:35:15] [PASSED] DMA allocations, no DMA32 required
[02:35:15] ============== [PASSED] ttm_device_init_pools ==============
[02:35:15] =================== [PASSED] ttm_device ====================
[02:35:15] ================== ttm_pool (8 subtests) ===================
[02:35:15] ================== ttm_pool_alloc_basic ===================
[02:35:15] [PASSED] One page
[02:35:15] [PASSED] More than one page
[02:35:15] [PASSED] Above the allocation limit
[02:35:15] [PASSED] One page, with coherent DMA mappings enabled
[02:35:15] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[02:35:15] ============== [PASSED] ttm_pool_alloc_basic ===============
[02:35:15] ============== ttm_pool_alloc_basic_dma_addr ==============
[02:35:15] [PASSED] One page
[02:35:15] [PASSED] More than one page
[02:35:15] [PASSED] Above the allocation limit
[02:35:15] [PASSED] One page, with coherent DMA mappings enabled
[02:35:15] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[02:35:15] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[02:35:15] [PASSED] ttm_pool_alloc_order_caching_match
[02:35:15] [PASSED] ttm_pool_alloc_caching_mismatch
[02:35:15] [PASSED] ttm_pool_alloc_order_mismatch
[02:35:15] [PASSED] ttm_pool_free_dma_alloc
[02:35:15] [PASSED] ttm_pool_free_no_dma_alloc
[02:35:15] [PASSED] ttm_pool_fini_basic
[02:35:15] ==================== [PASSED] ttm_pool =====================
[02:35:15] ================ ttm_resource (8 subtests) =================
[02:35:15] ================= ttm_resource_init_basic =================
[02:35:15] [PASSED] Init resource in TTM_PL_SYSTEM
[02:35:15] [PASSED] Init resource in TTM_PL_VRAM
[02:35:15] [PASSED] Init resource in a private placement
[02:35:15] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[02:35:15] ============= [PASSED] ttm_resource_init_basic =============
[02:35:15] [PASSED] ttm_resource_init_pinned
[02:35:15] [PASSED] ttm_resource_fini_basic
[02:35:15] [PASSED] ttm_resource_manager_init_basic
[02:35:15] [PASSED] ttm_resource_manager_usage_basic
[02:35:15] [PASSED] ttm_resource_manager_set_used_basic
[02:35:15] [PASSED] ttm_sys_man_alloc_basic
[02:35:15] [PASSED] ttm_sys_man_free_basic
[02:35:15] ================== [PASSED] ttm_resource ===================
[02:35:15] =================== ttm_tt (15 subtests) ===================
[02:35:15] ==================== ttm_tt_init_basic ====================
[02:35:15] [PASSED] Page-aligned size
[02:35:15] [PASSED] Extra pages requested
[02:35:15] ================ [PASSED] ttm_tt_init_basic ================
[02:35:15] [PASSED] ttm_tt_init_misaligned
[02:35:15] [PASSED] ttm_tt_fini_basic
[02:35:15] [PASSED] ttm_tt_fini_sg
[02:35:15] [PASSED] ttm_tt_fini_shmem
[02:35:15] [PASSED] ttm_tt_create_basic
[02:35:15] [PASSED] ttm_tt_create_invalid_bo_type
[02:35:15] [PASSED] ttm_tt_create_ttm_exists
[02:35:15] [PASSED] ttm_tt_create_failed
[02:35:15] [PASSED] ttm_tt_destroy_basic
[02:35:15] [PASSED] ttm_tt_populate_null_ttm
[02:35:15] [PASSED] ttm_tt_populate_populated_ttm
[02:35:15] [PASSED] ttm_tt_unpopulate_basic
[02:35:15] [PASSED] ttm_tt_unpopulate_empty_ttm
[02:35:15] [PASSED] ttm_tt_swapin_basic
[02:35:15] ===================== [PASSED] ttm_tt ======================
[02:35:15] =================== ttm_bo (14 subtests) ===================
[02:35:15] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[02:35:15] [PASSED] Cannot be interrupted and sleeps
[02:35:15] [PASSED] Cannot be interrupted, locks straight away
[02:35:15] [PASSED] Can be interrupted, sleeps
[02:35:15] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[02:35:15] [PASSED] ttm_bo_reserve_locked_no_sleep
[02:35:15] [PASSED] ttm_bo_reserve_no_wait_ticket
[02:35:15] [PASSED] ttm_bo_reserve_double_resv
[02:35:15] [PASSED] ttm_bo_reserve_interrupted
[02:35:15] [PASSED] ttm_bo_reserve_deadlock
[02:35:15] [PASSED] ttm_bo_unreserve_basic
[02:35:15] [PASSED] ttm_bo_unreserve_pinned
[02:35:15] [PASSED] ttm_bo_unreserve_bulk
[02:35:15] [PASSED] ttm_bo_fini_basic
[02:35:15] [PASSED] ttm_bo_fini_shared_resv
[02:35:15] [PASSED] ttm_bo_pin_basic
[02:35:15] [PASSED] ttm_bo_pin_unpin_resource
[02:35:15] [PASSED] ttm_bo_multiple_pin_one_unpin
[02:35:15] ===================== [PASSED] ttm_bo ======================
[02:35:15] ============== ttm_bo_validate (22 subtests) ===============
[02:35:15] ============== ttm_bo_init_reserved_sys_man ===============
[02:35:15] [PASSED] Buffer object for userspace
[02:35:15] [PASSED] Kernel buffer object
[02:35:15] [PASSED] Shared buffer object
[02:35:15] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[02:35:15] ============== ttm_bo_init_reserved_mock_man ==============
[02:35:15] [PASSED] Buffer object for userspace
[02:35:15] [PASSED] Kernel buffer object
[02:35:15] [PASSED] Shared buffer object
[02:35:15] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[02:35:15] [PASSED] ttm_bo_init_reserved_resv
[02:35:15] ================== ttm_bo_validate_basic ==================
[02:35:15] [PASSED] Buffer object for userspace
[02:35:15] [PASSED] Kernel buffer object
[02:35:15] [PASSED] Shared buffer object
[02:35:15] ============== [PASSED] ttm_bo_validate_basic ==============
[02:35:15] [PASSED] ttm_bo_validate_invalid_placement
[02:35:15] ============= ttm_bo_validate_same_placement ==============
[02:35:15] [PASSED] System manager
[02:35:15] [PASSED] VRAM manager
[02:35:15] ========= [PASSED] ttm_bo_validate_same_placement ==========
[02:35:15] [PASSED] ttm_bo_validate_failed_alloc
[02:35:15] [PASSED] ttm_bo_validate_pinned
[02:35:15] [PASSED] ttm_bo_validate_busy_placement
[02:35:15] ================ ttm_bo_validate_multihop =================
[02:35:15] [PASSED] Buffer object for userspace
[02:35:15] [PASSED] Kernel buffer object
[02:35:15] [PASSED] Shared buffer object
[02:35:15] ============ [PASSED] ttm_bo_validate_multihop =============
[02:35:15] ========== ttm_bo_validate_no_placement_signaled ==========
[02:35:15] [PASSED] Buffer object in system domain, no page vector
[02:35:15] [PASSED] Buffer object in system domain with an existing page vector
[02:35:15] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[02:35:15] ======== ttm_bo_validate_no_placement_not_signaled ========
[02:35:15] [PASSED] Buffer object for userspace
[02:35:15] [PASSED] Kernel buffer object
[02:35:15] [PASSED] Shared buffer object
[02:35:15] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[02:35:15] [PASSED] ttm_bo_validate_move_fence_signaled
[02:35:15] ========= ttm_bo_validate_move_fence_not_signaled =========
[02:35:15] [PASSED] Waits for GPU
[02:35:15] [PASSED] Tries to lock straight away
[02:35:15] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[02:35:15] [PASSED] ttm_bo_validate_swapout
[02:35:15] [PASSED] ttm_bo_validate_happy_evict
[02:35:15] [PASSED] ttm_bo_validate_all_pinned_evict
[02:35:15] [PASSED] ttm_bo_validate_allowed_only_evict
[02:35:15] [PASSED] ttm_bo_validate_deleted_evict
[02:35:15] [PASSED] ttm_bo_validate_busy_domain_evict
[02:35:15] [PASSED] ttm_bo_validate_evict_gutting
[02:35:15] [PASSED] ttm_bo_validate_recrusive_evict
[02:35:15] ================= [PASSED] ttm_bo_validate =================
[02:35:15] ============================================================
[02:35:15] Testing complete. Ran 102 tests: passed: 102
[02:35:15] Elapsed time: 11.958s total, 1.839s configuring, 9.855s building, 0.230s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 11+ messages in thread
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2026-07-13 2:25 [PATCH v4 0/8] drm/xe: add page size allocation mode control and coverage Nareshkumar Gollakoti
2026-07-13 2:25 ` [PATCH v4 1/8] drm/xe: add page size allocation control state to xe_device Nareshkumar Gollakoti
2026-07-13 2:25 ` [PATCH v4 2/8] drm/xe: add Kconfig option for debug page-size allocation control Nareshkumar Gollakoti
2026-07-13 2:25 ` [PATCH v4 3/8] drm/xe/debugfs: add page-size allocation mode knob Nareshkumar Gollakoti
2026-07-13 2:25 ` [PATCH v4 4/8] drm/xe: add XE_BO_FLAG_NEEDS_1G for minimum page-size sizing Nareshkumar Gollakoti
2026-07-13 2:25 ` [PATCH v4 5/8] drm/xe: apply debug page-size allocation policy to user BOs Nareshkumar Gollakoti
2026-07-13 2:25 ` [PATCH v4 6/8] drm/xe/vm: propagate BO page-size requirements to VMA map flags Nareshkumar Gollakoti
2026-07-13 2:25 ` [PATCH v4 7/8] drm/xe/pt: allow selecting the bind leaf PTE level Nareshkumar Gollakoti
2026-07-13 2:25 ` [PATCH v4 8/8] drm/xe/tests: add live KUnit coverage for BO page-size allocation modes Nareshkumar Gollakoti
2026-07-13 2:33 ` ✗ CI.checkpatch: warning for drm/xe: add page size allocation mode control and coverage (rev2) Patchwork
2026-07-13 2:35 ` ✓ CI.KUnit: success " Patchwork
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