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* [PATCH v10 00/10] Introduce Xe PCIe FLR
@ 2026-08-21 11:23 Raag Jadav
  2026-08-21 11:23 ` [PATCH v10 01/10] drm/xe/uc_fw: Allow re-initializing firmware Raag Jadav
                   ` (13 more replies)
  0 siblings, 14 replies; 22+ messages in thread
From: Raag Jadav @ 2026-08-21 11:23 UTC (permalink / raw)
  To: intel-xe
  Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
	michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
	dev, jani.nikula, lukasz.laguna, lukas, daniele.ceraolospurio,
	badal.nilawar, Raag Jadav

Here's my humble attempt at introducing PCIe Function Level Reset (FLR)
support in xe driver. This is ofcourse a half baked implementation and
only limited to re-initializing GT. This needs to be extended for a lot
of components which are expected to be added as a follow up.

Detailed description in commit message and documentation.

PS: All xe_exec_basic tests and clpeak run smoothly after FLR. Give it
a spin and let me know if any regressions.

Trigger it with:

$ echo 1 > /sys/bus/pci/devices/<BDF>/reset

 v2: Re-initialize migrate context (Matthew Brost)
     Add kernel doc (Matthew Brost)
     Spell out Function Level Reset (Jani)

 v3: Cancel in-flight jobs before FLR

 v4: Teardown exec queues instead of mangling scheduler pending list (Matthew Brost)

 v5: Re-initialize kernel queues through submission backend (Matthew Brost)
     Prevent PM ref leak for wedged device (Matthew Brost)

 v6: Skip uC firmware selection during re-initialization (Daniele)
     Add IS_DGFX() and EXEC_QUEUE_FLAG_KERNEL asserts (Daniele)
     s/flr_done/reinit (Daniele)
     Repurpose system suspend/resume helpers for FLR (Daniele)
     Add PCIe FLR documentation (Daniele)

 v7: Refine PCIe FLR documentation (Daniele)
     Introduce xe_pci_reset_skip() helper (Lukasz)

 v8: Set fw state to XE_UC_FIRMWARE_INIT_FAIL on failure (Daniele)
     Introduce xe_sched_reinit() (Daniele)
     Maintain timeout per scheduler instance (Daniele)
     s/reinit/reinit_kernel (Daniele)

 v9: Move drm_sched_is_stopped() assert to xe_sched_reinit() (Daniele)
     Add negative asserts for GSC and PXP (Daniele)
     Provide xe_lrc_ctx_init() as regular function (Daniele)
     Redesign wedged state management to prevent races (Sashiko)
     Add 'Xe' prefix to document title (Rodrigo)

v10: Spell out temporary device wedging in subject (Lukasz)
     Update documentation to include PCI Error Handling (Lukasz)
     Maintain wedged reference on FLR failure (Lukasz)

Raag Jadav (10):
  drm/xe/uc_fw: Allow re-initializing firmware
  drm/xe/guc_submit: Introduce guc_exec_queue_reinit_kernel()
  drm/xe/gt: Introduce FLR helpers
  drm/xe/bo_evict: Introduce xe_bo_restore_map()
  drm/xe/exec_queue: Introduce xe_exec_queue_reinit()
  drm/xe/migrate: Introduce xe_migrate_reinit()
  drm/xe/pm: Introduce xe_device_suspend/resume()
  drm/xe: Introduce temporary device wedging
  drm/xe/pci: Introduce PCIe Function Level Reset
  drm/xe/doc: Wire up PCI Error Handling

 Documentation/gpu/xe/index.rst              |   1 +
 Documentation/gpu/xe/xe_pci_error.rst       |   8 +
 drivers/gpu/drm/xe/xe_bo_evict.c            |  51 +++-
 drivers/gpu/drm/xe/xe_bo_evict.h            |   2 +
 drivers/gpu/drm/xe/xe_device.c              | 256 ++++++++++++++++++--
 drivers/gpu/drm/xe/xe_device.h              |  10 +-
 drivers/gpu/drm/xe/xe_device_types.h        |  11 +-
 drivers/gpu/drm/xe/xe_exec_queue.c          |  47 +++-
 drivers/gpu/drm/xe/xe_exec_queue.h          |   1 +
 drivers/gpu/drm/xe/xe_exec_queue_types.h    |   2 +
 drivers/gpu/drm/xe/xe_execlist.c            |   6 +
 drivers/gpu/drm/xe/xe_gpu_scheduler.c       |  17 ++
 drivers/gpu/drm/xe/xe_gpu_scheduler.h       |   1 +
 drivers/gpu/drm/xe/xe_gpu_scheduler_types.h |   5 +
 drivers/gpu/drm/xe/xe_gsc.c                 |  14 ++
 drivers/gpu/drm/xe/xe_gsc.h                 |   1 +
 drivers/gpu/drm/xe/xe_gt.c                  |  33 +++
 drivers/gpu/drm/xe/xe_gt.h                  |   2 +
 drivers/gpu/drm/xe/xe_guc.c                 |  29 +++
 drivers/gpu/drm/xe/xe_guc.h                 |   2 +
 drivers/gpu/drm/xe/xe_guc_submit.c          |   9 +
 drivers/gpu/drm/xe/xe_huc.c                 |  14 ++
 drivers/gpu/drm/xe/xe_huc.h                 |   1 +
 drivers/gpu/drm/xe/xe_lrc.c                 |  15 +-
 drivers/gpu/drm/xe/xe_lrc.h                 |   2 +
 drivers/gpu/drm/xe/xe_migrate.c             |  12 +
 drivers/gpu/drm/xe/xe_migrate.h             |   1 +
 drivers/gpu/drm/xe/xe_pci.c                 |   1 +
 drivers/gpu/drm/xe/xe_pci_error.c           | 138 ++++++++++-
 drivers/gpu/drm/xe/xe_pm.c                  | 103 +-------
 drivers/gpu/drm/xe/xe_uc.c                  |  73 ++++++
 drivers/gpu/drm/xe/xe_uc.h                  |   2 +
 drivers/gpu/drm/xe/xe_uc_fw.c               |  67 +++++
 drivers/gpu/drm/xe/xe_uc_fw.h               |   1 +
 drivers/gpu/drm/xe/xe_uc_types.h            |  14 ++
 35 files changed, 806 insertions(+), 146 deletions(-)
 create mode 100644 Documentation/gpu/xe/xe_pci_error.rst

-- 
2.43.0


^ permalink raw reply	[flat|nested] 22+ messages in thread

* [PATCH v10 01/10] drm/xe/uc_fw: Allow re-initializing firmware
  2026-08-21 11:23 [PATCH v10 00/10] Introduce Xe PCIe FLR Raag Jadav
@ 2026-08-21 11:23 ` Raag Jadav
  2026-08-21 11:41   ` sashiko-bot
  2026-08-21 11:23 ` [PATCH v10 02/10] drm/xe/guc_submit: Introduce guc_exec_queue_reinit_kernel() Raag Jadav
                   ` (12 subsequent siblings)
  13 siblings, 1 reply; 22+ messages in thread
From: Raag Jadav @ 2026-08-21 11:23 UTC (permalink / raw)
  To: intel-xe
  Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
	michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
	dev, jani.nikula, lukasz.laguna, lukas, daniele.ceraolospurio,
	badal.nilawar, Raag Jadav

In preparation of usecases which require re-initializing firmware without
reloading the driver, introduce xe_uc_fw_reinit(). The uC firmware bo
already exists but since it's contents are on VRAM, they are lost on PCIe
FLR. Copy the firmware back to it's bo and mark it as loadable as part of
re-initialization.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
v2: Add kernel doc (Matthew Brost)
v6: Skip uC firmware selection during re-initialization (Daniele)
v8: Set fw state to XE_UC_FIRMWARE_INIT_FAIL on failure (Daniele)
---
 drivers/gpu/drm/xe/xe_uc_fw.c | 67 +++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_uc_fw.h |  1 +
 2 files changed, 68 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_uc_fw.c b/drivers/gpu/drm/xe/xe_uc_fw.c
index a8e6f18cc9b4..8577ddf95710 100644
--- a/drivers/gpu/drm/xe/xe_uc_fw.c
+++ b/drivers/gpu/drm/xe/xe_uc_fw.c
@@ -834,6 +834,14 @@ static int uc_fw_copy(struct xe_uc_fw *uc_fw, const void *data, size_t size, u32
 	return err;
 }
 
+static void uc_fw_reinit(struct xe_uc_fw *uc_fw, const void *data)
+{
+	struct xe_device *xe = uc_fw_to_xe(uc_fw);
+
+	xe_map_memcpy_to(xe, &uc_fw->bo->vmap, 0, data, uc_fw->size);
+	xe_uc_fw_change_status(uc_fw, XE_UC_FIRMWARE_LOADABLE);
+}
+
 int xe_uc_fw_init(struct xe_uc_fw *uc_fw)
 {
 	const struct firmware *fw = NULL;
@@ -857,6 +865,65 @@ int xe_uc_fw_init(struct xe_uc_fw *uc_fw)
 }
 ALLOW_ERROR_INJECTION(xe_uc_fw_init, ERRNO); /* See xe_pci_probe() */
 
+/**
+ * xe_uc_fw_reinit() - Re-initialize uC firmware into its bo
+ * @uc_fw: uC firmware
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_uc_fw_reinit(struct xe_uc_fw *uc_fw)
+{
+	struct xe_device *xe = uc_fw_to_xe(uc_fw);
+	struct xe_uc_fw_version old_fw, new_fw;
+	const struct firmware *fw = NULL;
+	int err;
+
+	/* Make sure the status was cleared the last time we reset the uc */
+	xe_assert(xe, !xe_uc_fw_is_loaded(uc_fw));
+
+	/* We shouldn't be here for the firmware which wasn't available */
+	if (!xe_uc_fw_is_available(uc_fw))
+		return -ENOEXEC;
+
+	old_fw = uc_fw->versions.found[XE_UC_FW_VER_RELEASE];
+
+	err = firmware_request_nowarn(&fw, uc_fw->path, xe->drm.dev);
+	if (err)
+		goto init_fail;
+
+	err = parse_headers(uc_fw, fw);
+	if (err)
+		goto restore_old;
+
+	new_fw = uc_fw->versions.found[XE_UC_FW_VER_RELEASE];
+	if (memcmp(&old_fw, &new_fw, sizeof(old_fw)) || uc_fw->size != fw->size) {
+		drm_err(&xe->drm, "%s firmware mismatch on %s",
+			xe_uc_fw_type_repr(uc_fw->type), uc_fw->path);
+
+		err = -ENOEXEC;
+		goto restore_old;
+	}
+
+	uc_fw_reinit(uc_fw, fw->data);
+	uc_fw_release(fw);
+	return 0;
+
+restore_old:
+	/*
+	 * parse_headers() updates version details, so restore original version
+	 * before bailing.
+	 *
+	 * TODO: Create a struct of all the fields touched by parse_headers()
+	 * and restore them all.
+	 */
+	uc_fw->versions.found[XE_UC_FW_VER_RELEASE] = old_fw;
+init_fail:
+	xe_uc_fw_change_status(uc_fw, XE_UC_FIRMWARE_INIT_FAIL);
+	/* OK even if fw is NULL */
+	uc_fw_release(fw);
+	return err;
+}
+
 static u32 uc_fw_ggtt_offset(struct xe_uc_fw *uc_fw)
 {
 	return xe_bo_ggtt_addr(uc_fw->bo);
diff --git a/drivers/gpu/drm/xe/xe_uc_fw.h b/drivers/gpu/drm/xe/xe_uc_fw.h
index f2d3a3e7208b..6debdb924310 100644
--- a/drivers/gpu/drm/xe/xe_uc_fw.h
+++ b/drivers/gpu/drm/xe/xe_uc_fw.h
@@ -15,6 +15,7 @@
 struct drm_printer;
 
 int xe_uc_fw_init(struct xe_uc_fw *uc_fw);
+int xe_uc_fw_reinit(struct xe_uc_fw *uc_fw);
 size_t xe_uc_fw_copy_rsa(struct xe_uc_fw *uc_fw, void *dst, u32 max_len);
 int xe_uc_fw_upload(struct xe_uc_fw *uc_fw, u32 offset, u32 dma_flags);
 int xe_uc_fw_check_version_requirements(struct xe_uc_fw *uc_fw);
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 22+ messages in thread

* [PATCH v10 02/10] drm/xe/guc_submit: Introduce guc_exec_queue_reinit_kernel()
  2026-08-21 11:23 [PATCH v10 00/10] Introduce Xe PCIe FLR Raag Jadav
  2026-08-21 11:23 ` [PATCH v10 01/10] drm/xe/uc_fw: Allow re-initializing firmware Raag Jadav
@ 2026-08-21 11:23 ` Raag Jadav
  2026-08-21 11:52   ` sashiko-bot
  2026-08-21 11:23 ` [PATCH v10 03/10] drm/xe/gt: Introduce FLR helpers Raag Jadav
                   ` (11 subsequent siblings)
  13 siblings, 1 reply; 22+ messages in thread
From: Raag Jadav @ 2026-08-21 11:23 UTC (permalink / raw)
  To: intel-xe
  Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
	michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
	dev, jani.nikula, lukasz.laguna, lukas, daniele.ceraolospurio,
	badal.nilawar, Raag Jadav

In preparation of usecases which require re-initializing GuC submission
after PCIe FLR, introduce guc_exec_queue_reinit_kernel() helper. This will
restore kernel queues which might have been killed before PCIe FLR.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
v4: Teardown exec queues instead of mangling scheduler pending list (Matthew Brost)
v5: Re-initialize kernel queues through submission backend (Matthew Brost)
v8: Introduce xe_sched_reinit() (Daniele)
    Maintain timeout per scheduler instance (Daniele)
    s/reinit/reinit_kernel (Daniele)
v9: Move drm_sched_is_stopped() assert to xe_sched_reinit() (Daniele)
---
 drivers/gpu/drm/xe/xe_exec_queue_types.h    |  2 ++
 drivers/gpu/drm/xe/xe_execlist.c            |  6 ++++++
 drivers/gpu/drm/xe/xe_gpu_scheduler.c       | 17 +++++++++++++++++
 drivers/gpu/drm/xe/xe_gpu_scheduler.h       |  1 +
 drivers/gpu/drm/xe/xe_gpu_scheduler_types.h |  5 +++++
 drivers/gpu/drm/xe/xe_guc_submit.c          |  9 +++++++++
 6 files changed, 40 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_exec_queue_types.h b/drivers/gpu/drm/xe/xe_exec_queue_types.h
index 95f75d61a647..3b5bcd08f624 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue_types.h
+++ b/drivers/gpu/drm/xe/xe_exec_queue_types.h
@@ -297,6 +297,8 @@ struct xe_exec_queue {
 struct xe_exec_queue_ops {
 	/** @init: Initialize exec queue for submission backend */
 	int (*init)(struct xe_exec_queue *q);
+	/** @reinit_kernel: Re-initialize kernel queue for submission backend */
+	void (*reinit_kernel)(struct xe_exec_queue *q);
 	/** @kill: Kill inflight submissions for backend */
 	void (*kill)(struct xe_exec_queue *q);
 	/** @fini: Undoes the init() for submission backend */
diff --git a/drivers/gpu/drm/xe/xe_execlist.c b/drivers/gpu/drm/xe/xe_execlist.c
index cc33ae80e8cf..fba0d2850905 100644
--- a/drivers/gpu/drm/xe/xe_execlist.c
+++ b/drivers/gpu/drm/xe/xe_execlist.c
@@ -403,6 +403,11 @@ static void execlist_exec_queue_destroy_async(struct work_struct *w)
 	xe_exec_queue_fini(q);
 }
 
+static void execlist_exec_queue_reinit_kernel(struct xe_exec_queue *q)
+{
+	/* NIY */
+}
+
 static void execlist_exec_queue_kill(struct xe_exec_queue *q)
 {
 	/* NIY */
@@ -460,6 +465,7 @@ static bool execlist_exec_queue_reset_status(struct xe_exec_queue *q)
 
 static const struct xe_exec_queue_ops execlist_exec_queue_ops = {
 	.init = execlist_exec_queue_init,
+	.reinit_kernel = execlist_exec_queue_reinit_kernel,
 	.kill = execlist_exec_queue_kill,
 	.fini = execlist_exec_queue_fini,
 	.destroy = execlist_exec_queue_destroy,
diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler.c b/drivers/gpu/drm/xe/xe_gpu_scheduler.c
index 67d8ce368486..e85bc4077809 100644
--- a/drivers/gpu/drm/xe/xe_gpu_scheduler.c
+++ b/drivers/gpu/drm/xe/xe_gpu_scheduler.c
@@ -3,7 +3,10 @@
  * Copyright © 2023 Intel Corporation
  */
 
+#include "xe_assert.h"
+#include "xe_exec_queue_types.h"
 #include "xe_gpu_scheduler.h"
+#include "xe_guc_exec_queue_types.h"
 
 static void xe_sched_process_msg_queue(struct xe_gpu_scheduler *sched)
 {
@@ -76,6 +79,7 @@ int xe_sched_init(struct xe_gpu_scheduler *sched,
 	};
 
 	sched->ops = xe_ops;
+	sched->timeout = timeout;
 	spin_lock_init(&sched->msg_lock);
 	INIT_LIST_HEAD(&sched->msgs);
 	INIT_WORK(&sched->work_process_msg, xe_sched_process_msg_work);
@@ -83,6 +87,19 @@ int xe_sched_init(struct xe_gpu_scheduler *sched,
 	return drm_sched_init(&sched->base, &args);
 }
 
+void xe_sched_reinit(struct xe_gpu_scheduler *sched)
+{
+	struct xe_guc_exec_queue *ge = container_of(sched, struct xe_guc_exec_queue, sched);
+
+	xe_gt_assert(ge->q->gt, drm_sched_is_stopped(&sched->base));
+
+	/*
+	 * TODO: Implement drm_sched_reinit() instead of requiring the
+	 * driver to restore individual fields.
+	 */
+	sched->base.timeout = sched->timeout;
+}
+
 void xe_sched_fini(struct xe_gpu_scheduler *sched)
 {
 	xe_sched_submission_stop(sched);
diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler.h b/drivers/gpu/drm/xe/xe_gpu_scheduler.h
index 664c2db56af3..22e24b4b7171 100644
--- a/drivers/gpu/drm/xe/xe_gpu_scheduler.h
+++ b/drivers/gpu/drm/xe/xe_gpu_scheduler.h
@@ -17,6 +17,7 @@ int xe_sched_init(struct xe_gpu_scheduler *sched,
 		  long timeout, struct workqueue_struct *timeout_wq,
 		  atomic_t *score, const char *name,
 		  struct device *dev);
+void xe_sched_reinit(struct xe_gpu_scheduler *sched);
 void xe_sched_fini(struct xe_gpu_scheduler *sched);
 
 void xe_sched_submission_start(struct xe_gpu_scheduler *sched);
diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler_types.h b/drivers/gpu/drm/xe/xe_gpu_scheduler_types.h
index 63d9bf92583c..e73fdacca164 100644
--- a/drivers/gpu/drm/xe/xe_gpu_scheduler_types.h
+++ b/drivers/gpu/drm/xe/xe_gpu_scheduler_types.h
@@ -51,6 +51,11 @@ struct xe_gpu_scheduler {
 	spinlock_t				msg_lock;
 	/** @work_process_msg: processes messages */
 	struct work_struct		work_process_msg;
+	/**
+	 * @timeout: timeout for the scheduler instance, to be restored
+	 * during exec queue re-initialization
+	 */
+	long				timeout;
 };
 
 #define xe_sched_entity		drm_sched_entity
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index 99d8c807ff05..f7519e55b610 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -2130,6 +2130,14 @@ static int guc_exec_queue_init(struct xe_exec_queue *q)
 	return err;
 }
 
+static void guc_exec_queue_reinit_kernel(struct xe_exec_queue *q)
+{
+	xe_gt_assert(q->gt, q->flags & EXEC_QUEUE_FLAG_KERNEL);
+
+	atomic_set(&q->guc->state, 0);
+	xe_sched_reinit(&q->guc->sched);
+}
+
 static void guc_exec_queue_kill(struct xe_exec_queue *q)
 {
 	trace_xe_exec_queue_kill(q);
@@ -2597,6 +2605,7 @@ static bool guc_exec_queue_reset_status(struct xe_exec_queue *q)
  */
 static const struct xe_exec_queue_ops guc_exec_queue_ops = {
 	.init = guc_exec_queue_init,
+	.reinit_kernel = guc_exec_queue_reinit_kernel,
 	.kill = guc_exec_queue_kill,
 	.fini = guc_exec_queue_fini,
 	.destroy = guc_exec_queue_destroy,
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 22+ messages in thread

* [PATCH v10 03/10] drm/xe/gt: Introduce FLR helpers
  2026-08-21 11:23 [PATCH v10 00/10] Introduce Xe PCIe FLR Raag Jadav
  2026-08-21 11:23 ` [PATCH v10 01/10] drm/xe/uc_fw: Allow re-initializing firmware Raag Jadav
  2026-08-21 11:23 ` [PATCH v10 02/10] drm/xe/guc_submit: Introduce guc_exec_queue_reinit_kernel() Raag Jadav
@ 2026-08-21 11:23 ` Raag Jadav
  2026-08-21 11:23 ` [PATCH v10 04/10] drm/xe/bo_evict: Introduce xe_bo_restore_map() Raag Jadav
                   ` (10 subsequent siblings)
  13 siblings, 0 replies; 22+ messages in thread
From: Raag Jadav @ 2026-08-21 11:23 UTC (permalink / raw)
  To: intel-xe
  Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
	michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
	dev, jani.nikula, lukasz.laguna, lukas, daniele.ceraolospurio,
	badal.nilawar, Raag Jadav

In preparation of usecases which require preparing/re-initializing GT and
all its uCs before/after PCIe FLR, introduce flr_prepare/reinit() helpers.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
---
v2: Add kernel doc (Matthew Brost)
v4: Teardown exec queues instead of mangling scheduler pending list (Matthew Brost)
v6: Add IS_DGFX() assert (Daniele)
    s/flr_done/reinit (Daniele)
---
 drivers/gpu/drm/xe/xe_gsc.c      | 14 ++++++
 drivers/gpu/drm/xe/xe_gsc.h      |  1 +
 drivers/gpu/drm/xe/xe_gt.c       | 23 ++++++++++
 drivers/gpu/drm/xe/xe_gt.h       |  2 +
 drivers/gpu/drm/xe/xe_guc.c      | 29 +++++++++++++
 drivers/gpu/drm/xe/xe_guc.h      |  2 +
 drivers/gpu/drm/xe/xe_huc.c      | 14 ++++++
 drivers/gpu/drm/xe/xe_huc.h      |  1 +
 drivers/gpu/drm/xe/xe_uc.c       | 73 ++++++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_uc.h       |  2 +
 drivers/gpu/drm/xe/xe_uc_types.h | 14 ++++++
 11 files changed, 175 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_gsc.c b/drivers/gpu/drm/xe/xe_gsc.c
index 524ac56bdcc7..475e44455c9e 100644
--- a/drivers/gpu/drm/xe/xe_gsc.c
+++ b/drivers/gpu/drm/xe/xe_gsc.c
@@ -548,6 +548,20 @@ void xe_gsc_wait_for_worker_completion(struct xe_gsc *gsc)
 		flush_work(&gsc->work);
 }
 
+/**
+ * xe_gsc_reinit() - Re-initialize GSC after FLR
+ * @gsc: The GSC object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_gsc_reinit(struct xe_gsc *gsc)
+{
+	if (!xe_uc_fw_is_loadable(&gsc->fw))
+		return 0;
+
+	return xe_uc_fw_reinit(&gsc->fw);
+}
+
 void xe_gsc_stop_prepare(struct xe_gsc *gsc)
 {
 	struct xe_gt *gt = gsc_to_gt(gsc);
diff --git a/drivers/gpu/drm/xe/xe_gsc.h b/drivers/gpu/drm/xe/xe_gsc.h
index b8b8e0810ad9..ce390bffb163 100644
--- a/drivers/gpu/drm/xe/xe_gsc.h
+++ b/drivers/gpu/drm/xe/xe_gsc.h
@@ -15,6 +15,7 @@ struct xe_hw_engine;
 
 int xe_gsc_init(struct xe_gsc *gsc);
 int xe_gsc_init_post_hwconfig(struct xe_gsc *gsc);
+int xe_gsc_reinit(struct xe_gsc *gsc);
 void xe_gsc_wait_for_worker_completion(struct xe_gsc *gsc);
 void xe_gsc_stop_prepare(struct xe_gsc *gsc);
 void xe_gsc_load_start(struct xe_gsc *gsc);
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index 6805e0d3bf21..d4fac8c4d8a4 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -910,6 +910,29 @@ static int do_gt_restart(struct xe_gt *gt)
 	return 0;
 }
 
+/**
+ * xe_gt_flr_prepare() - Prepare GT for FLR
+ * @gt: the GT object
+ *
+ * Prepare all GT uCs for FLR.
+ */
+void xe_gt_flr_prepare(struct xe_gt *gt)
+{
+	xe_gt_sanitize(gt);
+	xe_uc_flr_prepare(&gt->uc);
+}
+
+/**
+ * xe_gt_reinit() - Re-initialize GT after FLR
+ * @gt: the GT object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_gt_reinit(struct xe_gt *gt)
+{
+	return xe_uc_reinit(&gt->uc);
+}
+
 static void gt_reset_worker(struct work_struct *w)
 {
 	struct xe_gt *gt = container_of(w, typeof(*gt), reset.worker);
diff --git a/drivers/gpu/drm/xe/xe_gt.h b/drivers/gpu/drm/xe/xe_gt.h
index 65a4655b0994..1e56355318c9 100644
--- a/drivers/gpu/drm/xe/xe_gt.h
+++ b/drivers/gpu/drm/xe/xe_gt.h
@@ -37,8 +37,10 @@
 })
 
 struct xe_gt *xe_gt_alloc(struct xe_tile *tile);
+void xe_gt_flr_prepare(struct xe_gt *gt);
 int xe_gt_init_early(struct xe_gt *gt);
 int xe_gt_init(struct xe_gt *gt);
+int xe_gt_reinit(struct xe_gt *gt);
 void xe_gt_mmio_init(struct xe_gt *gt);
 void xe_gt_declare_wedged(struct xe_gt *gt);
 int xe_gt_record_default_lrcs(struct xe_gt *gt);
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index c7f8bbd4cb92..ffe7f0847e76 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -1709,6 +1709,35 @@ void xe_guc_sanitize(struct xe_guc *guc)
 	xe_guc_submit_disable(guc);
 }
 
+/**
+ * xe_guc_flr_prepare() - Prepare GuC for FLR
+ * @guc: The GuC object
+ *
+ * Stop GuC submission and tear down exec queues.
+ */
+void xe_guc_flr_prepare(struct xe_guc *guc)
+{
+	if (!xe_uc_fw_is_loadable(&guc->fw))
+		return;
+
+	xe_guc_submit_stop(guc);
+	xe_guc_submit_pause_abort(guc);
+}
+
+/**
+ * xe_guc_reinit() - Re-initialize GuC after FLR
+ * @guc: The GuC object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_guc_reinit(struct xe_guc *guc)
+{
+	if (!xe_uc_fw_is_loadable(&guc->fw))
+		return 0;
+
+	return xe_uc_fw_reinit(&guc->fw);
+}
+
 int xe_guc_reset_prepare(struct xe_guc *guc)
 {
 	return xe_guc_submit_reset_prepare(guc);
diff --git a/drivers/gpu/drm/xe/xe_guc.h b/drivers/gpu/drm/xe/xe_guc.h
index 61e3ee19a59b..e0226cc28046 100644
--- a/drivers/gpu/drm/xe/xe_guc.h
+++ b/drivers/gpu/drm/xe/xe_guc.h
@@ -32,10 +32,12 @@
 struct drm_printer;
 
 void xe_guc_comm_init_early(struct xe_guc *guc);
+void xe_guc_flr_prepare(struct xe_guc *guc);
 int xe_guc_init_noalloc(struct xe_guc *guc);
 int xe_guc_init(struct xe_guc *guc);
 int xe_guc_init_post_hwconfig(struct xe_guc *guc);
 int xe_guc_post_load_init(struct xe_guc *guc);
+int xe_guc_reinit(struct xe_guc *guc);
 int xe_guc_reset(struct xe_guc *guc);
 int xe_guc_upload(struct xe_guc *guc);
 int xe_guc_min_load_for_hwconfig(struct xe_guc *guc);
diff --git a/drivers/gpu/drm/xe/xe_huc.c b/drivers/gpu/drm/xe/xe_huc.c
index 57afe21444b1..c73e1acbd091 100644
--- a/drivers/gpu/drm/xe/xe_huc.c
+++ b/drivers/gpu/drm/xe/xe_huc.c
@@ -296,6 +296,20 @@ void xe_huc_sanitize(struct xe_huc *huc)
 	xe_uc_fw_sanitize(&huc->fw);
 }
 
+/**
+ * xe_huc_reinit() - Re-initialize HuC after FLR
+ * @huc: The HuC object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_huc_reinit(struct xe_huc *huc)
+{
+	if (!xe_uc_fw_is_loadable(&huc->fw))
+		return 0;
+
+	return xe_uc_fw_reinit(&huc->fw);
+}
+
 void xe_huc_print_info(struct xe_huc *huc, struct drm_printer *p)
 {
 	struct xe_gt *gt = huc_to_gt(huc);
diff --git a/drivers/gpu/drm/xe/xe_huc.h b/drivers/gpu/drm/xe/xe_huc.h
index fa1c45e70443..cb1a770b4a9c 100644
--- a/drivers/gpu/drm/xe/xe_huc.h
+++ b/drivers/gpu/drm/xe/xe_huc.h
@@ -19,6 +19,7 @@ enum xe_huc_auth_types {
 
 int xe_huc_init(struct xe_huc *huc);
 int xe_huc_init_post_hwconfig(struct xe_huc *huc);
+int xe_huc_reinit(struct xe_huc *huc);
 int xe_huc_upload(struct xe_huc *huc);
 int xe_huc_auth(struct xe_huc *huc, enum xe_huc_auth_types type);
 bool xe_huc_is_authenticated(struct xe_huc *huc, enum xe_huc_auth_types type);
diff --git a/drivers/gpu/drm/xe/xe_uc.c b/drivers/gpu/drm/xe/xe_uc.c
index 65f59f06177f..4b9b5ea4fb08 100644
--- a/drivers/gpu/drm/xe/xe_uc.c
+++ b/drivers/gpu/drm/xe/xe_uc.c
@@ -18,6 +18,7 @@
 #include "xe_guc_submit.h"
 #include "xe_huc.h"
 #include "xe_sriov.h"
+#include "xe_uc_fw.h"
 #include "xe_wopcm.h"
 
 static struct xe_gt *
@@ -278,6 +279,78 @@ static void uc_reset_wait(struct xe_uc *uc)
 		goto again;
 }
 
+static void uc_flr_prepare(struct work_struct *w)
+{
+	struct xe_uc_flr *flr = container_of(w, struct xe_uc_flr, work);
+	struct xe_uc *uc = flr->uc;
+
+	xe_gt_assert(uc_to_gt(uc), xe_device_wedged(uc_to_xe(uc)));
+
+	xe_uc_reset_prepare(uc);
+	xe_guc_flr_prepare(&uc->guc);
+}
+
+static void uc_flr_sanitize(struct work_struct *w)
+{
+	struct xe_uc_flr *flr = container_of(w, struct xe_uc_flr, work);
+	struct xe_uc *uc = flr->uc;
+
+	/* TODO: Sanitize GSC firmware */
+	xe_gt_assert(uc_to_gt(uc), IS_DGFX(uc_to_xe(uc)));
+	xe_gt_assert(uc_to_gt(uc), !xe_uc_fw_is_loadable(&uc->gsc.fw));
+
+	xe_uc_stop(uc);
+	xe_uc_sanitize(uc);
+}
+
+/**
+ * xe_uc_flr_prepare() - Prepare uCs for FLR
+ * @uc: The uC object
+ *
+ * Tear down pending work and stop all uCs.
+ */
+void xe_uc_flr_prepare(struct xe_uc *uc)
+{
+	struct xe_uc_flr flr = { .uc = uc };
+	struct xe_gt *gt = uc_to_gt(uc);
+
+	/*
+	 * We'll be tearing down exec queues which signals all fences and frees the
+	 * jobs but all of that happens asynchronously, so make sure we don't disrupt
+	 * the scheduler while jobs are still in-flight.
+	 */
+	INIT_WORK_ONSTACK(&flr.work, uc_flr_prepare);
+	queue_work(gt->ordered_wq, &flr.work);
+	flush_work(&flr.work);
+	destroy_work_on_stack(&flr.work);
+
+	INIT_WORK_ONSTACK(&flr.work, uc_flr_sanitize);
+	queue_work(gt->ordered_wq, &flr.work);
+	flush_work(&flr.work);
+	destroy_work_on_stack(&flr.work);
+}
+
+/**
+ * xe_uc_reinit() - Re-initialize uCs after FLR
+ * @uc: The uC object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_uc_reinit(struct xe_uc *uc)
+{
+	int ret;
+
+	ret = xe_guc_reinit(&uc->guc);
+	if (ret)
+		return ret;
+
+	ret = xe_huc_reinit(&uc->huc);
+	if (ret)
+		return ret;
+
+	return xe_gsc_reinit(&uc->gsc);
+}
+
 void xe_uc_suspend_prepare(struct xe_uc *uc)
 {
 	xe_gsc_wait_for_worker_completion(&uc->gsc);
diff --git a/drivers/gpu/drm/xe/xe_uc.h b/drivers/gpu/drm/xe/xe_uc.h
index 255a54a8f876..e06f7937111f 100644
--- a/drivers/gpu/drm/xe/xe_uc.h
+++ b/drivers/gpu/drm/xe/xe_uc.h
@@ -8,10 +8,12 @@
 
 struct xe_uc;
 
+void xe_uc_flr_prepare(struct xe_uc *uc);
 int xe_uc_init_noalloc(struct xe_uc *uc);
 int xe_uc_init(struct xe_uc *uc);
 int xe_uc_init_post_hwconfig(struct xe_uc *uc);
 int xe_uc_load_hw(struct xe_uc *uc);
+int xe_uc_reinit(struct xe_uc *uc);
 int xe_uc_reset_prepare(struct xe_uc *uc);
 void xe_uc_runtime_resume(struct xe_uc *uc);
 void xe_uc_runtime_suspend(struct xe_uc *uc);
diff --git a/drivers/gpu/drm/xe/xe_uc_types.h b/drivers/gpu/drm/xe/xe_uc_types.h
index 1708379dc834..2b47382f7b3b 100644
--- a/drivers/gpu/drm/xe/xe_uc_types.h
+++ b/drivers/gpu/drm/xe/xe_uc_types.h
@@ -25,4 +25,18 @@ struct xe_uc {
 	struct xe_wopcm wopcm;
 };
 
+/**
+ * struct xe_uc_flr - uC FLR teardown
+ */
+struct xe_uc_flr {
+	/** @uc: uC to schedule FLR worker on */
+	struct xe_uc *uc;
+
+	/**
+	 * @work: worker for FLR teardown to be done async allowing to safely
+	 * flush all code paths
+	 */
+	struct work_struct work;
+};
+
 #endif
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 22+ messages in thread

* [PATCH v10 04/10] drm/xe/bo_evict: Introduce xe_bo_restore_map()
  2026-08-21 11:23 [PATCH v10 00/10] Introduce Xe PCIe FLR Raag Jadav
                   ` (2 preceding siblings ...)
  2026-08-21 11:23 ` [PATCH v10 03/10] drm/xe/gt: Introduce FLR helpers Raag Jadav
@ 2026-08-21 11:23 ` Raag Jadav
  2026-08-21 11:23 ` [PATCH v10 05/10] drm/xe/exec_queue: Introduce xe_exec_queue_reinit() Raag Jadav
                   ` (9 subsequent siblings)
  13 siblings, 0 replies; 22+ messages in thread
From: Raag Jadav @ 2026-08-21 11:23 UTC (permalink / raw)
  To: intel-xe
  Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
	michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
	dev, jani.nikula, lukasz.laguna, lukas, daniele.ceraolospurio,
	badal.nilawar, Raag Jadav, Varun Gupta

PCIe FLR clears all hardware state along with GGTT mappings of all
existing bos. Iterate over early and late kernel bo list and restore
their GGTT mappings in hardware, so that driver can make use of them
during re-initialization after PCIe FLR.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
Reviewed-by: Varun Gupta <varun.gupta@intel.com>
---
v2: Add kernel doc (Matthew Brost)
---
 drivers/gpu/drm/xe/xe_bo_evict.c | 51 +++++++++++++++++++++++++++-----
 drivers/gpu/drm/xe/xe_bo_evict.h |  2 ++
 2 files changed, 45 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_bo_evict.c b/drivers/gpu/drm/xe/xe_bo_evict.c
index 7661fca7f278..fa75140c88fe 100644
--- a/drivers/gpu/drm/xe/xe_bo_evict.c
+++ b/drivers/gpu/drm/xe/xe_bo_evict.c
@@ -189,14 +189,8 @@ int xe_bo_evict_all(struct xe_device *xe)
 				     xe_bo_evict_pinned);
 }
 
-static int xe_bo_restore_and_map_ggtt(struct xe_bo *bo)
+static int xe_bo_map_ggtt(struct xe_bo *bo)
 {
-	int ret;
-
-	ret = xe_bo_restore_pinned(bo);
-	if (ret)
-		return ret;
-
 	if (bo->flags & XE_BO_FLAG_GGTT) {
 		struct xe_tile *tile;
 		u8 id;
@@ -212,6 +206,41 @@ static int xe_bo_restore_and_map_ggtt(struct xe_bo *bo)
 	return 0;
 }
 
+/**
+ * xe_bo_restore_map() - Restore GGTT mappings of kernel bos
+ * @xe: xe device
+ *
+ * PCIe FLR clears all hardware state along with GGTT mappings of all
+ * existing bos. Iterate over early and late kernel bo list and restore
+ * their GGTT mappings in hardware, so that driver can make use of them
+ * during re-initialization after PCIe FLR.
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_bo_restore_map(struct xe_device *xe)
+{
+	int ret;
+
+	ret = xe_bo_apply_to_pinned(xe, &xe->pinned.early.kernel_bo_present,
+				    &xe->pinned.early.kernel_bo_present, xe_bo_map_ggtt);
+	if (!ret)
+		ret = xe_bo_apply_to_pinned(xe, &xe->pinned.late.kernel_bo_present,
+					    &xe->pinned.late.kernel_bo_present, xe_bo_map_ggtt);
+
+	return ret;
+}
+
+static int xe_bo_restore_and_map_ggtt(struct xe_bo *bo)
+{
+	int ret;
+
+	ret = xe_bo_restore_pinned(bo);
+	if (ret)
+		return ret;
+
+	return xe_bo_map_ggtt(bo);
+}
+
 /**
  * xe_bo_restore_early - restore early phase kernel BOs to VRAM
  *
@@ -270,7 +299,13 @@ int xe_bo_restore_late(struct xe_device *xe)
 	return ret;
 }
 
-static void xe_bo_pci_dev_remove_pinned(struct xe_device *xe)
+/**
+ * xe_bo_pci_dev_remove_pinned() - Unmap external bos
+ * @xe: xe device
+ *
+ * Drop dma mappings of all external pinned bos.
+ */
+void xe_bo_pci_dev_remove_pinned(struct xe_device *xe)
 {
 	struct xe_tile *tile;
 	unsigned int id;
diff --git a/drivers/gpu/drm/xe/xe_bo_evict.h b/drivers/gpu/drm/xe/xe_bo_evict.h
index e8385cb7f5e9..d4f5b87243e7 100644
--- a/drivers/gpu/drm/xe/xe_bo_evict.h
+++ b/drivers/gpu/drm/xe/xe_bo_evict.h
@@ -14,7 +14,9 @@ int xe_bo_notifier_prepare_all_pinned(struct xe_device *xe);
 void xe_bo_notifier_unprepare_all_pinned(struct xe_device *xe);
 int xe_bo_restore_early(struct xe_device *xe);
 int xe_bo_restore_late(struct xe_device *xe);
+int xe_bo_restore_map(struct xe_device *xe);
 
+void xe_bo_pci_dev_remove_pinned(struct xe_device *xe);
 void xe_bo_pci_dev_remove_all(struct xe_device *xe);
 
 int xe_bo_pinned_init(struct xe_device *xe);
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 22+ messages in thread

* [PATCH v10 05/10] drm/xe/exec_queue: Introduce xe_exec_queue_reinit()
  2026-08-21 11:23 [PATCH v10 00/10] Introduce Xe PCIe FLR Raag Jadav
                   ` (3 preceding siblings ...)
  2026-08-21 11:23 ` [PATCH v10 04/10] drm/xe/bo_evict: Introduce xe_bo_restore_map() Raag Jadav
@ 2026-08-21 11:23 ` Raag Jadav
  2026-08-21 11:43   ` sashiko-bot
  2026-08-21 11:23 ` [PATCH v10 06/10] drm/xe/migrate: Introduce xe_migrate_reinit() Raag Jadav
                   ` (8 subsequent siblings)
  13 siblings, 1 reply; 22+ messages in thread
From: Raag Jadav @ 2026-08-21 11:23 UTC (permalink / raw)
  To: intel-xe
  Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
	michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
	dev, jani.nikula, lukasz.laguna, lukas, daniele.ceraolospurio,
	badal.nilawar, Raag Jadav

In preparation of usecases which require re-initializing exec queue
after PCIe FLR, introduce xe_exec_queue_reinit() helper. All the exec
queue LCRs already exist but the context is lost on PCIe FLR and needs
re-initialization.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
v2: Re-initialize migrate context (Matthew Brost)
v6: Add IS_DGFX() and EXEC_QUEUE_FLAG_KERNEL asserts (Daniele)
v9: Add negative asserts for GSC and PXP (Daniele)
    Provide xe_lrc_ctx_init() as regular function (Daniele)
---
 drivers/gpu/drm/xe/xe_exec_queue.c | 47 +++++++++++++++++++++++++++---
 drivers/gpu/drm/xe/xe_exec_queue.h |  1 +
 drivers/gpu/drm/xe/xe_lrc.c        | 15 ++++++++--
 drivers/gpu/drm/xe/xe_lrc.h        |  2 ++
 4 files changed, 59 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index c4213bb9c137..ffff9efe518f 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -27,6 +27,7 @@
 #include "xe_migrate.h"
 #include "xe_pm.h"
 #include "xe_trace.h"
+#include "xe_uc_fw.h"
 #include "xe_vm.h"
 #include "xe_pxp.h"
 
@@ -332,9 +333,8 @@ static void __xe_exec_queue_fini(struct xe_exec_queue *q)
 		xe_lrc_put(q->lrc[i]);
 }
 
-static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
+static u32 xe_lrc_init_flags(struct xe_exec_queue *q, u32 exec_queue_flags)
 {
-	int i, err;
 	u32 flags = 0;
 
 	/*
@@ -357,6 +357,13 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
 	if (q->flags & EXEC_QUEUE_FLAG_DISABLE_STATE_CACHE_PERF_FIX)
 		flags |= XE_LRC_DISABLE_STATE_CACHE_PERF_FIX;
 
+	return flags;
+}
+
+static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
+{
+	int i, err;
+
 	err = q->ops->init(q);
 	if (err)
 		return err;
@@ -380,8 +387,8 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
 
 			marker = xe_gt_sriov_vf_wait_valid_ggtt(q->gt);
 
-			lrc = xe_lrc_create(q->hwe, q->vm, q->replay_state,
-					    xe_lrc_ring_size(), q->msix_vec, flags);
+			lrc = xe_lrc_create(q->hwe, q->vm, q->replay_state, xe_lrc_ring_size(),
+					    q->msix_vec, xe_lrc_init_flags(q, exec_queue_flags));
 			if (IS_ERR(lrc)) {
 				err = PTR_ERR(lrc);
 				goto err_lrc;
@@ -403,6 +410,38 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
 	return err;
 }
 
+/**
+ * xe_exec_queue_reinit() - Re-initialize exec queue
+ * @q: exec queue to re-initialize
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_exec_queue_reinit(struct xe_exec_queue *q)
+{
+	struct xe_gt *gt = q->gt;
+	int i, err;
+
+	/* TODO: Re-initialize GSC and PXP queues */
+	xe_gt_assert(gt, IS_DGFX(gt_to_xe(gt)));
+	xe_gt_assert(gt, !xe_uc_fw_is_loadable(&gt->uc.gsc.fw));
+	xe_gt_assert(gt, !xe_pxp_is_enabled(gt_to_xe(gt)->pxp));
+
+	/* Re-initialization only allowed for kernel queues */
+	xe_gt_assert(gt, q->flags & EXEC_QUEUE_FLAG_KERNEL);
+
+	/* Re-initialize submission backend */
+	q->ops->reinit_kernel(q);
+
+	for (i = 0; i < q->width; i++) {
+		err = xe_lrc_ctx_init(q->lrc[i], q->hwe, q->vm, q->replay_state,
+				      q->msix_vec, xe_lrc_init_flags(q, q->flags));
+		if (err)
+			return err;
+	}
+
+	return 0;
+}
+
 /**
  * xe_exec_queue_create() - Create an exec queue
  * @xe: Xe device
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.h b/drivers/gpu/drm/xe/xe_exec_queue.h
index 0225426c57b0..236fa44c2a72 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.h
+++ b/drivers/gpu/drm/xe/xe_exec_queue.h
@@ -34,6 +34,7 @@ struct xe_exec_queue *xe_exec_queue_create_bind(struct xe_device *xe,
 void xe_exec_queue_fini(struct xe_exec_queue *q);
 void xe_exec_queue_destroy(struct kref *ref);
 void xe_exec_queue_assign_name(struct xe_exec_queue *q, u32 instance);
+int xe_exec_queue_reinit(struct xe_exec_queue *q);
 
 static inline struct xe_exec_queue *
 xe_exec_queue_get_unless_zero(struct xe_exec_queue *q)
diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index 35b4e8289b5f..79b363978ea4 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -1486,8 +1486,19 @@ void xe_lrc_set_multi_queue_priority(struct xe_lrc *lrc, enum xe_multi_queue_pri
 	lrc->desc |= FIELD_PREP(LRC_PRIORITY, xe_multi_queue_prio_to_lrc(lrc, priority));
 }
 
-static int xe_lrc_ctx_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct xe_vm *vm,
-			   void *replay_state, u16 msix_vec, u32 init_flags)
+/**
+ * xe_lrc_ctx_init() - Initialize LRC with context details
+ * @lrc: Pointer to the LRC
+ * @hwe: Hardware Engine
+ * @vm: The VM (address space)
+ * @replay_state: GPU hang replay state
+ * @msix_vec: MSI-X interrupt vector (for platforms that support it)
+ * @init_flags: LRC initialization flags
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_lrc_ctx_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct xe_vm *vm,
+		    void *replay_state, u16 msix_vec, u32 init_flags)
 {
 	struct xe_gt *gt = hwe->gt;
 	struct xe_tile *tile = gt_to_tile(gt);
diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h
index 7be5e3da8bc8..0af66013fa29 100644
--- a/drivers/gpu/drm/xe/xe_lrc.h
+++ b/drivers/gpu/drm/xe/xe_lrc.h
@@ -63,6 +63,8 @@ struct xe_lrc_snapshot {
 
 struct xe_lrc *xe_lrc_create(struct xe_hw_engine *hwe, struct xe_vm *vm,
 			     void *replay_state, u32 ring_size, u16 msix_vec, u32 flags);
+int xe_lrc_ctx_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct xe_vm *vm,
+		    void *replay_state, u16 msix_vec, u32 init_flags);
 void xe_lrc_destroy(struct kref *ref);
 
 /**
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 22+ messages in thread

* [PATCH v10 06/10] drm/xe/migrate: Introduce xe_migrate_reinit()
  2026-08-21 11:23 [PATCH v10 00/10] Introduce Xe PCIe FLR Raag Jadav
                   ` (4 preceding siblings ...)
  2026-08-21 11:23 ` [PATCH v10 05/10] drm/xe/exec_queue: Introduce xe_exec_queue_reinit() Raag Jadav
@ 2026-08-21 11:23 ` Raag Jadav
  2026-08-21 11:39   ` sashiko-bot
  2026-08-21 11:23 ` [PATCH v10 07/10] drm/xe/pm: Introduce xe_device_suspend/resume() Raag Jadav
                   ` (7 subsequent siblings)
  13 siblings, 1 reply; 22+ messages in thread
From: Raag Jadav @ 2026-08-21 11:23 UTC (permalink / raw)
  To: intel-xe
  Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
	michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
	dev, jani.nikula, lukasz.laguna, lukas, daniele.ceraolospurio,
	badal.nilawar, Raag Jadav

In preparation of usecases which require re-initializing migrate context
after PCIe FLR, introduce xe_migrate_reinit() helper. Migrate exec queue
and pt_bo already exist in migrate structure but since their contents live
on VRAM, they are lost on PCIe FLR and need re-initialization.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
---
v2: Re-initialize migrate context (Matthew Brost)
---
 drivers/gpu/drm/xe/xe_gt.c      | 10 ++++++++++
 drivers/gpu/drm/xe/xe_migrate.c | 12 ++++++++++++
 drivers/gpu/drm/xe/xe_migrate.h |  1 +
 3 files changed, 23 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index d4fac8c4d8a4..d2578af4967a 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -930,6 +930,16 @@ void xe_gt_flr_prepare(struct xe_gt *gt)
  */
 int xe_gt_reinit(struct xe_gt *gt)
 {
+	int err;
+
+	if (xe_gt_is_main_type(gt)) {
+		struct xe_tile *tile = gt_to_tile(gt);
+
+		err = xe_migrate_reinit(tile->migrate);
+		if (err)
+			return err;
+	}
+
 	return xe_uc_reinit(&gt->uc);
 }
 
diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index 75b83687f1b5..eac91a4b78ed 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -454,6 +454,18 @@ static int xe_migrate_lock_prepare_vm(struct xe_tile *tile, struct xe_migrate *m
 	return err;
 }
 
+/**
+ * xe_migrate_reinit() - Re-initialize a migrate context
+ * @m: The migration context
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_migrate_reinit(struct xe_migrate *m)
+{
+	xe_migrate_prepare_vm(m->tile, m, m->q->vm, NULL);
+	return xe_exec_queue_reinit(m->q);
+}
+
 /**
  * xe_migrate_init() - Initialize a migrate context
  * @m: The migration context
diff --git a/drivers/gpu/drm/xe/xe_migrate.h b/drivers/gpu/drm/xe/xe_migrate.h
index c3a268b01768..3d95d14de146 100644
--- a/drivers/gpu/drm/xe/xe_migrate.h
+++ b/drivers/gpu/drm/xe/xe_migrate.h
@@ -112,6 +112,7 @@ struct xe_migrate_pt_update {
 
 struct xe_migrate *xe_migrate_alloc(struct xe_tile *tile);
 int xe_migrate_init(struct xe_migrate *m);
+int xe_migrate_reinit(struct xe_migrate *m);
 
 struct dma_fence *xe_migrate_to_vram(struct xe_migrate *m,
 				     unsigned long npages,
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 22+ messages in thread

* [PATCH v10 07/10] drm/xe/pm: Introduce xe_device_suspend/resume()
  2026-08-21 11:23 [PATCH v10 00/10] Introduce Xe PCIe FLR Raag Jadav
                   ` (5 preceding siblings ...)
  2026-08-21 11:23 ` [PATCH v10 06/10] drm/xe/migrate: Introduce xe_migrate_reinit() Raag Jadav
@ 2026-08-21 11:23 ` Raag Jadav
  2026-08-21 11:43   ` sashiko-bot
  2026-08-21 11:23 ` [PATCH v10 08/10] drm/xe: Introduce temporary device wedging Raag Jadav
                   ` (6 subsequent siblings)
  13 siblings, 1 reply; 22+ messages in thread
From: Raag Jadav @ 2026-08-21 11:23 UTC (permalink / raw)
  To: intel-xe
  Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
	michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
	dev, jani.nikula, lukasz.laguna, lukas, daniele.ceraolospurio,
	badal.nilawar, Raag Jadav

PCIe FLR prepare/re-initialization flows pretty much reflect system
suspend/resume flows with a few notable exceptions. Repurpose existing
helpers for PCIe FLR with an explicit flag to distinguish between both
flows.

Suggested-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
v6: Repurpose system suspend/resume helpers for FLR (Daniele)
---
 drivers/gpu/drm/xe/xe_device.c | 150 +++++++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_device.h |   2 +
 drivers/gpu/drm/xe/xe_pm.c     | 103 ++--------------------
 3 files changed, 160 insertions(+), 95 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 74d566693dfd..0ffed5d1cadb 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -38,6 +38,7 @@
 #include "xe_force_wake.h"
 #include "xe_ggtt.h"
 #include "xe_gt.h"
+#include "xe_gt_idle.h"
 #include "xe_gt_mcr.h"
 #include "xe_gt_printk.h"
 #include "xe_gt_sriov_vf.h"
@@ -67,6 +68,7 @@
 #include "xe_soc_remapper.h"
 #include "xe_survivability_mode.h"
 #include "xe_sriov.h"
+#include "xe_sriov_vf_ccs.h"
 #include "xe_svm.h"
 #include "xe_sysctrl.h"
 #include "xe_tile.h"
@@ -1575,3 +1577,151 @@ struct xe_vm *xe_device_asid_to_vm(struct xe_device *xe, u32 asid)
 
 	return vm;
 }
+
+/**
+ * xe_device_suspend() - Common helper for system suspend and FLR prepare
+ * @xe: xe device instance
+ * @flr: indicate FLR prepare
+ *
+ * Return: 0 on success, negative error code otherwise.
+ */
+int xe_device_suspend(struct xe_device *xe, bool flr)
+{
+	struct xe_gt *gt;
+	u8 id;
+	int err;
+
+	err = xe_pxp_pm_suspend(xe->pxp);
+	if (err)
+		return err;
+
+	xe_late_bind_wait_for_worker_completion(&xe->late_bind);
+
+	for_each_gt(gt, xe, id)
+		xe_gt_suspend_prepare(gt);
+
+	if (flr) {
+		for_each_gt(gt, xe, id)
+			xe_gt_flr_prepare(gt);
+	} else {
+		xe_display_pm_suspend(xe);
+
+		/* FIXME: Super racey... */
+		err = xe_bo_evict_all(xe);
+		if (err)
+			goto err_display;
+
+		for_each_gt(gt, xe, id) {
+			err = xe_gt_suspend(gt);
+			if (err)
+				goto err_display;
+		}
+	}
+
+	xe_irq_suspend(xe);
+
+	if (flr) {
+		/* TODO: Drop all user bos */
+		xe_bo_pci_dev_remove_pinned(xe);
+
+		unmap_mapping_range(xe->drm.anon_inode->i_mapping, 0, 0, 1);
+	} else {
+		xe_display_pm_suspend_late(xe);
+
+		xe_i2c_pm_suspend(xe);
+	}
+
+	return 0;
+
+err_display:
+	xe_display_pm_resume(xe);
+	xe_pxp_pm_resume(xe->pxp);
+	return err;
+}
+
+/**
+ * xe_device_resume() - Common helper for system resume and re-initialization post FLR
+ * @xe: xe device instance
+ * @flr: indicate re-initialization post FLR
+ *
+ * Return: 0 on success, negative error code otherwise.
+ */
+int xe_device_resume(struct xe_device *xe, bool flr)
+{
+	struct xe_tile *tile;
+	struct xe_gt *gt;
+	u8 id;
+	int err;
+
+	for_each_gt(gt, xe, id)
+		xe_gt_idle_disable_c6(gt);
+
+	for_each_tile(tile, xe, id)
+		xe_wa_apply_tile_workarounds(tile);
+
+	err = xe_pcode_ready(xe, true);
+	if (err)
+		return err;
+
+	assert_lmem_ready(xe);
+
+	if (flr) {
+		err = xe_bo_restore_map(xe);
+		if (err)
+			return err;
+
+		for_each_gt(gt, xe, id) {
+			err = xe_gt_reinit(gt);
+			if (err)
+				return err;
+		}
+	} else {
+		xe_display_pm_resume_early(xe);
+
+		/*
+		 * This only restores pinned memory which is the memory required for the
+		 * GT(s) to resume.
+		 */
+		err = xe_bo_restore_early(xe);
+		if (err)
+			return err;
+	}
+
+	xe_i2c_pm_resume(xe, true);
+
+	xe_sysctrl_pm_resume(xe);
+
+	xe_irq_resume(xe);
+
+	for_each_gt(gt, xe, id) {
+		err = xe_gt_resume(gt);
+		if (err)
+			break;
+	}
+
+	if (flr) {
+		if (err)
+			return err;
+	} else {
+		/*
+		 * Try to bring up display before bailing from GT resume failure,
+		 * so we don't leave the user clueless with a blank screen.
+		 */
+		xe_display_pm_resume(xe);
+		if (err)
+			return err;
+
+		err = xe_bo_restore_late(xe);
+		if (err)
+			return err;
+
+		if (IS_VF_CCS_READY(xe))
+			xe_sriov_vf_ccs_register_context(xe);
+	}
+
+	xe_pxp_pm_resume(xe->pxp);
+
+	xe_late_bind_fw_load(&xe->late_bind);
+
+	return 0;
+}
diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
index 6c4cfaebc44a..67083915320a 100644
--- a/drivers/gpu/drm/xe/xe_device.h
+++ b/drivers/gpu/drm/xe/xe_device.h
@@ -48,7 +48,9 @@ int xe_device_init_early(struct xe_device *xe);
 int xe_device_probe_early(struct xe_device *xe);
 int xe_device_probe(struct xe_device *xe);
 void xe_device_remove(struct xe_device *xe);
+int xe_device_resume(struct xe_device *xe, bool flr);
 void xe_device_shutdown(struct xe_device *xe);
+int xe_device_suspend(struct xe_device *xe, bool flr);
 
 void xe_device_wmb(struct xe_device *xe);
 
diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c
index f517bf453b54..6de4f9ad31ae 100644
--- a/drivers/gpu/drm/xe/xe_pm.c
+++ b/drivers/gpu/drm/xe/xe_pm.c
@@ -172,52 +172,18 @@ static void xe_rpm_lockmap_release(const struct xe_device *xe)
  */
 int xe_pm_suspend(struct xe_device *xe)
 {
-	struct xe_gt *gt;
-	u8 id;
 	int err;
 
 	drm_dbg(&xe->drm, "Suspending device\n");
 	xe_pm_block_begin_signalling();
 	trace_xe_pm_suspend(xe, __builtin_return_address(0));
 
-	err = xe_pxp_pm_suspend(xe->pxp);
+	err = xe_device_suspend(xe, false);
 	if (err)
-		goto err;
+		drm_dbg(&xe->drm, "Device suspend failed %d\n", err);
+	else
+		drm_dbg(&xe->drm, "Device suspended\n");
 
-	xe_late_bind_wait_for_worker_completion(&xe->late_bind);
-
-	for_each_gt(gt, xe, id)
-		xe_gt_suspend_prepare(gt);
-
-	xe_display_pm_suspend(xe);
-
-	/* FIXME: Super racey... */
-	err = xe_bo_evict_all(xe);
-	if (err)
-		goto err_display;
-
-	for_each_gt(gt, xe, id) {
-		err = xe_gt_suspend(gt);
-		if (err)
-			goto err_display;
-	}
-
-	xe_irq_suspend(xe);
-
-	xe_display_pm_suspend_late(xe);
-
-	xe_i2c_pm_suspend(xe);
-
-	drm_dbg(&xe->drm, "Device suspended\n");
-	xe_pm_block_end_signalling();
-
-	return 0;
-
-err_display:
-	xe_display_pm_resume(xe);
-	xe_pxp_pm_resume(xe->pxp);
-err:
-	drm_dbg(&xe->drm, "Device suspend failed %d\n", err);
 	xe_pm_block_end_signalling();
 	return err;
 }
@@ -230,71 +196,18 @@ int xe_pm_suspend(struct xe_device *xe)
  */
 int xe_pm_resume(struct xe_device *xe)
 {
-	struct xe_tile *tile;
-	struct xe_gt *gt;
-	u8 id;
 	int err;
 
 	xe_pm_block_begin_signalling();
 	drm_dbg(&xe->drm, "Resuming device\n");
 	trace_xe_pm_resume(xe, __builtin_return_address(0));
 
-	for_each_gt(gt, xe, id)
-		xe_gt_idle_disable_c6(gt);
-
-	for_each_tile(tile, xe, id)
-		xe_wa_apply_tile_workarounds(tile);
-
-	err = xe_pcode_ready(xe, true);
-	if (err)
-		return err;
-
-	xe_display_pm_resume_early(xe);
-
-	/*
-	 * This only restores pinned memory which is the memory required for the
-	 * GT(s) to resume.
-	 */
-	err = xe_bo_restore_early(xe);
-	if (err)
-		goto err;
-
-	xe_i2c_pm_resume(xe, true);
-
-	xe_sysctrl_pm_resume(xe);
-
-	xe_irq_resume(xe);
-
-	for_each_gt(gt, xe, id) {
-		err = xe_gt_resume(gt);
-		if (err)
-			break;
-	}
-
-	/*
-	 * Try to bring up display before bailing from GT resume failure,
-	 * so we don't leave the user clueless with a blank screen.
-	 */
-	xe_display_pm_resume(xe);
-	if (err)
-		goto err;
-
-	err = xe_bo_restore_late(xe);
+	err = xe_device_resume(xe, false);
 	if (err)
-		goto err;
-
-	xe_pxp_pm_resume(xe->pxp);
-
-	if (IS_VF_CCS_READY(xe))
-		xe_sriov_vf_ccs_register_context(xe);
-
-	xe_late_bind_fw_load(&xe->late_bind);
+		drm_dbg(&xe->drm, "Device resume failed %d\n", err);
+	else
+		drm_dbg(&xe->drm, "Device resumed\n");
 
-	drm_dbg(&xe->drm, "Device resumed\n");
-	xe_pm_block_end_signalling();
-	return 0;
-err:
-	drm_dbg(&xe->drm, "Device resume failed %d\n", err);
 	xe_pm_block_end_signalling();
 	return err;
 }
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 22+ messages in thread

* [PATCH v10 08/10] drm/xe: Introduce temporary device wedging
  2026-08-21 11:23 [PATCH v10 00/10] Introduce Xe PCIe FLR Raag Jadav
                   ` (6 preceding siblings ...)
  2026-08-21 11:23 ` [PATCH v10 07/10] drm/xe/pm: Introduce xe_device_suspend/resume() Raag Jadav
@ 2026-08-21 11:23 ` Raag Jadav
  2026-08-21 11:37   ` sashiko-bot
  2026-08-21 11:23 ` [PATCH v10 09/10] drm/xe/pci: Introduce PCIe Function Level Reset Raag Jadav
                   ` (5 subsequent siblings)
  13 siblings, 1 reply; 22+ messages in thread
From: Raag Jadav @ 2026-08-21 11:23 UTC (permalink / raw)
  To: intel-xe
  Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
	michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
	dev, jani.nikula, lukasz.laguna, lukas, daniele.ceraolospurio,
	badal.nilawar, Raag Jadav

Currently, wedged state is serving a single usecase where the device is
permanently declared wedged, but this doesn't allow any wedged state
management for runtime usecases. In preparation of usecases which require
to facilitate temporary device wedging, convert wedged.flag to wedged.ref
which serves as a driver internal refcount for wedged state and blocks
critical path execution during device lifetime. While at it, introduce
wedged.perm which signifies permanent device wedging and operates
independent of the refcount allowing relevant cleanup action on unwind
path.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
 v9: Redesign to prevent races (Sashiko)
v10: Spell out temporary device wedging in subject (Lukasz)
---
 drivers/gpu/drm/xe/xe_device.c       | 106 ++++++++++++++++++++-------
 drivers/gpu/drm/xe/xe_device.h       |   8 +-
 drivers/gpu/drm/xe/xe_device_types.h |   8 +-
 drivers/gpu/drm/xe/xe_pci.c          |   1 +
 drivers/gpu/drm/xe/xe_pci_error.c    |  10 ++-
 5 files changed, 96 insertions(+), 37 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 0ffed5d1cadb..8317bb9b81b4 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -607,6 +607,10 @@ int xe_device_init_early(struct xe_device *xe)
 	if (err)
 		return err;
 
+	err = drmm_mutex_init(&xe->drm, &xe->wedged.lock);
+	if (err)
+		return err;
+
 	err = xe_pm_init_early(xe);
 	if (err)
 		return err;
@@ -930,8 +934,10 @@ static void xe_device_wedged_fini(struct drm_device *drm, void *arg)
 {
 	struct xe_device *xe = arg;
 
-	if (atomic_read(&xe->wedged.flag))
-		xe_pm_runtime_put(xe);
+	if (xe->wedged.perm)
+		xe_device_wedged_put(xe);
+
+	xe_assert(xe, !xe_device_wedged(xe));
 }
 
 #ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
@@ -1433,6 +1439,50 @@ u64 xe_device_uncanonicalize_addr(struct xe_device *xe, u64 address)
  *   firmware and restore device to normal operation.
  */
 
+/**
+ * xe_device_wedged_get() - Acquire wedged reference
+ * @xe: xe device instance
+ *
+ * Get runtime PM reference and block critical path execution.
+ */
+void xe_device_wedged_get(struct xe_device *xe)
+{
+	int ref;
+
+	/* We should not be runtime suspending as long as critical paths are blocked */
+	xe_pm_runtime_get_noresume(xe);
+
+	ref = atomic_inc_return(&xe->wedged.ref);
+	xe_assert(xe, ref > 0);
+}
+
+/**
+ * xe_device_wedged_put() - Relinquish wedged reference
+ * @xe: xe device instance
+ *
+ * Restore critical path execution and put runtime PM reference.
+ */
+void xe_device_wedged_put(struct xe_device *xe)
+{
+	int ref;
+
+	ref = atomic_dec_return(&xe->wedged.ref);
+	xe_assert(xe, ref >= 0);
+
+	xe_pm_runtime_put(xe);
+}
+
+/**
+ * xe_device_wedged() - Check for wedged device
+ * @xe: xe device instance
+ *
+ * Returns: %true if device is wedged, %false otherwise.
+ */
+bool xe_device_wedged(struct xe_device *xe)
+{
+	return atomic_read(&xe->wedged.ref);
+}
+
 /**
  * xe_device_set_wedged_method - Set wedged recovery method
  * @xe: xe device instance
@@ -1476,36 +1526,40 @@ void xe_device_declare_wedged(struct xe_device *xe)
 		return;
 	}
 
-	if (!atomic_xchg(&xe->wedged.flag, 1)) {
-		xe->needs_flr_on_fini = true;
-		xe_pm_runtime_get_noresume(xe);
+	mutex_lock(&xe->wedged.lock);
 
-		xe_log_err_fatal(xe, WEDGED, -EIO, "Device declared wedged!\n");
-		xe_err_once(xe, "IOCTLs and executions are now blocked!\n"
-			    "For recovery procedure, refer to %s\n"
-			    "Please file a _new_ bug report at %s\n",
-			    WEDGED_URL, XE_BUG_URL);
-	}
+	if (xe->wedged.perm)
+		goto out;
+
+	xe_device_wedged_get(xe);
+	xe->wedged.perm = true;
+	xe->needs_flr_on_fini = true;
+
+	xe_log_err_fatal(xe, WEDGED, -EIO, "Device declared wedged!\n");
+	xe_err_once(xe, "IOCTLs and executions are now blocked!\n"
+			"For recovery procedure, refer to %s\n"
+			"Please file a _new_ bug report at %s\n",
+			WEDGED_URL, XE_BUG_URL);
 
 	for_each_gt(gt, xe, id)
 		xe_gt_declare_wedged(gt);
 
-	if (xe_device_wedged(xe)) {
-		/*
-		 * XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET is intended for debugging
-		 * hangs, so wedge the device with 'none' recovery method and have
-		 * it available to the user for debugging.
-		 */
-		if (xe->wedged.mode == XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET)
-			xe_device_set_wedged_method(xe, DRM_WEDGE_RECOVERY_NONE);
-		/* If no wedge recovery method is set, use default */
-		else if (!xe->wedged.method)
-			xe_device_set_wedged_method(xe, DRM_WEDGE_RECOVERY_REBIND |
-						    DRM_WEDGE_RECOVERY_BUS_RESET);
+	/*
+	 * XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET is intended for debugging
+	 * hangs, so wedge the device with 'none' recovery method and have
+	 * it available to the user for debugging.
+	 */
+	if (xe->wedged.mode == XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET)
+		xe_device_set_wedged_method(xe, DRM_WEDGE_RECOVERY_NONE);
+	/* If no wedge recovery method is set, use default */
+	else if (!xe->wedged.method)
+		xe_device_set_wedged_method(xe, DRM_WEDGE_RECOVERY_REBIND |
+					    DRM_WEDGE_RECOVERY_BUS_RESET);
 
-		/* Notify userspace of wedged device */
-		drm_dev_wedged_event(&xe->drm, xe->wedged.method, NULL);
-	}
+	/* Notify userspace of wedged device */
+	drm_dev_wedged_event(&xe->drm, xe->wedged.method, NULL);
+out:
+	mutex_unlock(&xe->wedged.lock);
 }
 
 /**
diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
index 67083915320a..8fff3fd489c7 100644
--- a/drivers/gpu/drm/xe/xe_device.h
+++ b/drivers/gpu/drm/xe/xe_device.h
@@ -209,11 +209,6 @@ bool xe_device_is_l2_flush_optimized(struct xe_device *xe);
 void xe_device_td_flush(struct xe_device *xe);
 void xe_device_l2_flush(struct xe_device *xe);
 
-static inline bool xe_device_wedged(struct xe_device *xe)
-{
-	return atomic_read(&xe->wedged.flag);
-}
-
 #ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
 static inline bool xe_debug_page_size_supported(struct xe_device *xe)
 {
@@ -262,6 +257,9 @@ static inline bool xe_debug_page_size_mode_is_mixed(struct xe_device *xe)
 }
 #endif
 
+void xe_device_wedged_get(struct xe_device *xe);
+void xe_device_wedged_put(struct xe_device *xe);
+bool xe_device_wedged(struct xe_device *xe);
 void xe_device_set_wedged_method(struct xe_device *xe, unsigned long method);
 void xe_device_declare_wedged(struct xe_device *xe);
 int xe_device_validate_wedged_mode(struct xe_device *xe, unsigned int mode);
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 180d450a6deb..7be3f15bf7a0 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -526,14 +526,18 @@ struct xe_device {
 
 	/** @wedged: Struct to control Wedged States and mode */
 	struct {
-		/** @wedged.flag: Xe device faced a critical error and is now blocked. */
-		atomic_t flag;
+		/** @wedged.ref: Refcount for wedged device, blocks critical path execution */
+		atomic_t ref;
 		/** @wedged.mode: Mode controlled by kernel parameter and debugfs */
 		enum xe_wedged_mode mode;
 		/** @wedged.method: Recovery method to be sent in the drm device wedged uevent */
 		unsigned long method;
 		/** @wedged.inconsistent_reset: Inconsistent reset policy state between GTs */
 		bool inconsistent_reset;
+		/** @wedged.perm: Permanently wedged, needs cleanup on fini */
+		bool perm;
+		/** @wedged.lock: Lock protecting wedged state */
+		struct mutex lock;
 	} wedged;
 
 	/** @devres_group: devres group */
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 1e04e8ef2611..9a6c8e16a0b5 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -1390,6 +1390,7 @@ static int xe_pci_runtime_suspend(struct device *dev)
 	 */
 	xe_assert(xe, !IS_SRIOV_VF(xe));
 	xe_assert(xe, !pci_num_vf(pdev));
+	xe_assert(xe, !xe_device_wedged(xe));
 
 	err = xe_pm_runtime_suspend(xe);
 	if (err)
diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
index 79ce0c671549..48466d726eae 100644
--- a/drivers/gpu/drm/xe/xe_pci_error.c
+++ b/drivers/gpu/drm/xe/xe_pci_error.c
@@ -25,8 +25,10 @@ static void prepare_device_for_reset(struct pci_dev *pdev)
 	 * xe_device_wedged_fini() releases runtime pm if wedged flag is set, so acquire a runtime
 	 * pm reference to avoid underflow.
 	 */
-	if (!atomic_xchg(&xe->wedged.flag, 1))
-		xe_pm_runtime_get_noresume(xe);
+	xe_device_wedged_get(xe);
+
+	/* TODO: We shouldn't be doing such ugly hacks, reuse FLR helpers and drop this. */
+	xe->wedged.perm = true;
 
 	xe_device_set_in_reset(xe);
 
@@ -126,7 +128,7 @@ static pci_ers_result_t xe_pci_error_slot_reset(struct pci_dev *pdev)
 	xe = pdev_to_xe_device(pdev);
 
 	/* Wedge the device to prevent I/O operations till the resume callback */
-	atomic_set(&xe->wedged.flag, 1);
+	xe_device_wedged_get(xe);
 
 	return PCI_ERS_RESULT_RECOVERED;
 }
@@ -137,7 +139,7 @@ static void xe_pci_error_resume(struct pci_dev *pdev)
 
 	xe_info(xe, "PCI error: resume\n");
 
-	atomic_set(&xe->wedged.flag, 0);
+	xe_device_wedged_put(xe);
 }
 
 const struct pci_error_handlers xe_pci_error_handlers = {
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 22+ messages in thread

* [PATCH v10 09/10] drm/xe/pci: Introduce PCIe Function Level Reset
  2026-08-21 11:23 [PATCH v10 00/10] Introduce Xe PCIe FLR Raag Jadav
                   ` (7 preceding siblings ...)
  2026-08-21 11:23 ` [PATCH v10 08/10] drm/xe: Introduce temporary device wedging Raag Jadav
@ 2026-08-21 11:23 ` Raag Jadav
  2026-08-21 11:39   ` sashiko-bot
  2026-08-21 11:23 ` [PATCH v10 10/10] drm/xe/doc: Wire up PCI Error Handling Raag Jadav
                   ` (4 subsequent siblings)
  13 siblings, 1 reply; 22+ messages in thread
From: Raag Jadav @ 2026-08-21 11:23 UTC (permalink / raw)
  To: intel-xe
  Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
	michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
	dev, jani.nikula, lukasz.laguna, lukas, daniele.ceraolospurio,
	badal.nilawar, Raag Jadav

With bare minimum pieces in place, we can finally introduce PCIe Function
Level Reset (FLR) support which re-initializes hardware state without the
need for reloading the driver from userspace. All VRAM contents are lost
along with hardware state and driver takes care of recreating the required
kernel bos as part of re-initialization, but user still needs to recreate
user bos and reload context after PCIe FLR.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 v2: Spell out Function Level Reset (Jani)
 v5: Prevent PM ref leak for wedged device (Matthew Brost)
 v6: Add PCIe FLR documentation (Daniele)
 v7: Refine PCIe FLR documentation (Daniele)
     Introduce xe_pci_reset_skip() helper (Lukasz)
 v9: Add 'Xe' prefix to document title (Rodrigo)
v10: Update documentation to include PCI Error Handling (Lukasz)
     Maintain wedged reference on FLR failure (Lukasz)
---
 drivers/gpu/drm/xe/xe_device_types.h |   3 +
 drivers/gpu/drm/xe/xe_pci_error.c    | 128 +++++++++++++++++++++++++++
 2 files changed, 131 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 7be3f15bf7a0..8cbb5b747710 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -518,6 +518,9 @@ struct xe_device {
 	/** @pxp: Encapsulate Protected Xe Path support */
 	struct xe_pxp *pxp;
 
+	/** @flr_prepared: Prepared for function-reset */
+	bool flr_prepared;
+
 	/** @needs_flr_on_fini: requests function-reset on fini */
 	bool needs_flr_on_fini;
 
diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
index 48466d726eae..81c4e55fae8f 100644
--- a/drivers/gpu/drm/xe/xe_pci_error.c
+++ b/drivers/gpu/drm/xe/xe_pci_error.c
@@ -12,8 +12,55 @@
 #include "xe_pm.h"
 #include "xe_printk.h"
 #include "xe_ras.h"
+#include "xe_sriov_pf_helpers.h"
 #include "xe_survivability_mode.h"
 
+/**
+ * DOC: Xe PCI Error Handling
+ *
+ * Xe driver registers PCI callbacks which are called by PCI core in case of
+ * bus errors or resets.
+ *
+ * Currently both Function Level Reset (FLR) and bus error handling callbacks are
+ * supported. Both wipe the VRAM and resets the state of all the hardware units.
+ * Therefore, the contents of all exec queues and BOs in VRAM are lost, and the
+ * hardware needs a full re-initialization. The way Xe driver handles it, is
+ * pretty much similar to system suspend/resume flow with a few notable exceptions.
+ *
+ * Prepare phase:
+ *
+ * - Temporarily wedge the device to prevent userspace access
+ * - Kill exec queues which signals all fences and frees in-flight jobs
+ * - Stop the scheduler and all submissions to GuC
+ * - The fact that FLR is needed is because hardware could be in corrupted state
+ *   and access unreliable, so skip memory eviction due to untrustworthy VRAM
+ *   contents
+ * - Remove all memory mappings since VRAM contents will be lost
+ *
+ * Re-initialization phase:
+ *
+ * - Recreate kernel BOs due to skipped memory eviction in prepare phase
+ * - Restore kernel queues which were killed in prepare phase
+ * - Reload all uC firmwares
+ * - Bring up all hardware units
+ * - Unwedge the device to allow userspace access
+ *
+ * Since VRAM contents are lost, the user is expected to recreate user memory
+ * and reload context.
+ *
+ * TODO: Reuse FLR callbacks for bus error handling.
+ *
+ * Current implementation is only limited to re-initializing GT. This needs to
+ * be extended for a lot of components listed below.
+ *
+ * - Proper re-initialization of GSC and PXP for integrated platforms
+ * - SR-IOV cases which need PF and VF synchronization
+ * - Re-initialization of all child devices registered by Xe
+ * - Prepare existing xe_device_wedged() users for temporary wedging
+ * - MM corner cases
+ * - Display
+ */
+
 static void prepare_device_for_reset(struct pci_dev *pdev)
 {
 	struct xe_device *xe = pdev_to_xe_device(pdev);
@@ -142,9 +189,90 @@ static void xe_pci_error_resume(struct pci_dev *pdev)
 	xe_device_wedged_put(xe);
 }
 
+static inline bool xe_pci_reset_skip(struct xe_device *xe)
+{
+	return !IS_DGFX(xe) || IS_SRIOV_VF(xe) || xe_sriov_pf_num_vfs(xe) || xe->info.probe_display;
+}
+
+static void xe_pci_reset_prepare(struct pci_dev *pdev)
+{
+	struct xe_device *xe = pdev_to_xe_device(pdev);
+	int err;
+
+	err = xe_pci_reset_skip(xe);
+	if (err) {
+		xe_err(xe, "PCIe FLR not supported\n");
+		goto wedge;
+	}
+
+	err = xe_device_wedged(xe);
+	if (err)
+		xe_err(xe, "PCIe FLR failed, device in unexpected state\n");
+
+wedge:
+	/* Wedge the device to prevent userspace access but don't send the event yet */
+	xe_device_wedged_get(xe);
+	if (err)
+		return;
+
+	/*
+	 * The hardware could be in corrupted state and access unreliable, but we try to
+	 * update data structures and cleanup any pending work to avoid side effects during
+	 * PCIe FLR. This will be similar to system suspend flow but without eviction.
+	 */
+	err = xe_device_suspend(xe, true);
+	if (err) {
+		xe_err(xe, "Failed to prepare for PCIe FLR\n");
+		return;
+	}
+
+	xe->flr_prepared = true;
+	xe_info(xe, "Prepared for PCIe FLR\n");
+}
+
+static void xe_pci_reset_done(struct pci_dev *pdev)
+{
+	struct xe_device *xe = pdev_to_xe_device(pdev);
+	int err;
+
+	err = xe_pci_reset_skip(xe);
+	if (err)
+		goto out;
+
+	if (!xe->flr_prepared)
+		goto out;
+
+	/* Unprepare early in case we fail */
+	xe->flr_prepared = false;
+
+	/*
+	 * We already have the data structures intact, so try to re-initialize the device.
+	 * This will be similar to system resume flow, except we'll also need to recreate
+	 * kernel bos and restore kernel queues.
+	 */
+	err = xe_device_resume(xe, true);
+	if (err) {
+		xe_err(xe, "Re-initialization failed\n");
+		goto out;
+	}
+
+	/* Unwedge to allow userspace access */
+	xe_device_wedged_put(xe);
+	xe_info(xe, "Re-initialization success\n");
+
+	return;
+out:
+	/* Most likely the device is unusable and there's nothing we can do about it */
+	xe_device_declare_wedged(xe);
+	/* Drop local reference */
+	xe_device_wedged_put(xe);
+}
+
 const struct pci_error_handlers xe_pci_error_handlers = {
 	.error_detected	= xe_pci_error_detected,
 	.mmio_enabled	= xe_pci_error_mmio_enabled,
 	.slot_reset	= xe_pci_error_slot_reset,
 	.resume		= xe_pci_error_resume,
+	.reset_prepare	= xe_pci_reset_prepare,
+	.reset_done	= xe_pci_reset_done,
 };
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 22+ messages in thread

* [PATCH v10 10/10] drm/xe/doc: Wire up PCI Error Handling
  2026-08-21 11:23 [PATCH v10 00/10] Introduce Xe PCIe FLR Raag Jadav
                   ` (8 preceding siblings ...)
  2026-08-21 11:23 ` [PATCH v10 09/10] drm/xe/pci: Introduce PCIe Function Level Reset Raag Jadav
@ 2026-08-21 11:23 ` Raag Jadav
  2026-08-21 11:31 ` ✗ CI.checkpatch: warning for Introduce Xe PCIe FLR (rev10) Patchwork
                   ` (3 subsequent siblings)
  13 siblings, 0 replies; 22+ messages in thread
From: Raag Jadav @ 2026-08-21 11:23 UTC (permalink / raw)
  To: intel-xe
  Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
	michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
	dev, jani.nikula, lukasz.laguna, lukas, daniele.ceraolospurio,
	badal.nilawar, Raag Jadav

Wire up PCI Error Handling documentation.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Lukasz Laguna <lukasz.laguna@intel.com>
---
 Documentation/gpu/xe/index.rst        | 1 +
 Documentation/gpu/xe/xe_pci_error.rst | 8 ++++++++
 2 files changed, 9 insertions(+)
 create mode 100644 Documentation/gpu/xe/xe_pci_error.rst

diff --git a/Documentation/gpu/xe/index.rst b/Documentation/gpu/xe/index.rst
index 0247a255f7e6..497a0a4b12f6 100644
--- a/Documentation/gpu/xe/index.rst
+++ b/Documentation/gpu/xe/index.rst
@@ -36,3 +36,4 @@ The display, or :ref:`drm-kms`, support for drm/xe is provided by
    xe_configfs
    xe_gt_stats
    xe_sigid
+   xe_pci_error
diff --git a/Documentation/gpu/xe/xe_pci_error.rst b/Documentation/gpu/xe/xe_pci_error.rst
new file mode 100644
index 000000000000..25cc5a8adf99
--- /dev/null
+++ b/Documentation/gpu/xe/xe_pci_error.rst
@@ -0,0 +1,8 @@
+.. SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+=====================
+Xe PCI Error Handling
+=====================
+
+.. kernel-doc:: drivers/gpu/drm/xe/xe_pci_error.c
+   :doc: Xe PCI Error Handling
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 22+ messages in thread

* ✗ CI.checkpatch: warning for Introduce Xe PCIe FLR (rev10)
  2026-08-21 11:23 [PATCH v10 00/10] Introduce Xe PCIe FLR Raag Jadav
                   ` (9 preceding siblings ...)
  2026-08-21 11:23 ` [PATCH v10 10/10] drm/xe/doc: Wire up PCI Error Handling Raag Jadav
@ 2026-08-21 11:31 ` Patchwork
  2026-08-21 11:33 ` ✓ CI.KUnit: success " Patchwork
                   ` (2 subsequent siblings)
  13 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2026-08-21 11:31 UTC (permalink / raw)
  To: Raag Jadav; +Cc: intel-xe

== Series Details ==

Series: Introduce Xe PCIe FLR (rev10)
URL   : https://patchwork.freedesktop.org/series/162055/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
061140b9bc586ae7f40abc1249c97e1cc72d1b9d
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit fa662ae8def37b7fb92bff92362191e2368f17fe
Author: Raag Jadav <raag.jadav@intel.com>
Date:   Fri Aug 21 16:53:32 2026 +0530

    drm/xe/doc: Wire up PCI Error Handling
    
    Wire up PCI Error Handling documentation.
    
    Signed-off-by: Raag Jadav <raag.jadav@intel.com>
    Reviewed-by: Lukasz Laguna <lukasz.laguna@intel.com>
+ /mt/dim checkpatch 7ae51381a25c66d497ec65fda2f1c329cb6f618f drm-intel
a3e78fa42941 drm/xe/uc_fw: Allow re-initializing firmware
f24bf74fdb5d drm/xe/guc_submit: Introduce guc_exec_queue_reinit_kernel()
5540a759d6cb drm/xe/gt: Introduce FLR helpers
1e1698916a05 drm/xe/bo_evict: Introduce xe_bo_restore_map()
60e951528bb1 drm/xe/exec_queue: Introduce xe_exec_queue_reinit()
567d8348ce3b drm/xe/migrate: Introduce xe_migrate_reinit()
cf4ce1d90d80 drm/xe/pm: Introduce xe_device_suspend/resume()
e75d4df53665 drm/xe: Introduce temporary device wedging
7123e16f42cd drm/xe/pci: Introduce PCIe Function Level Reset
fa662ae8def3 drm/xe/doc: Wire up PCI Error Handling
-:21: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#21: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 12 lines checked



^ permalink raw reply	[flat|nested] 22+ messages in thread

* ✓ CI.KUnit: success for Introduce Xe PCIe FLR (rev10)
  2026-08-21 11:23 [PATCH v10 00/10] Introduce Xe PCIe FLR Raag Jadav
                   ` (10 preceding siblings ...)
  2026-08-21 11:31 ` ✗ CI.checkpatch: warning for Introduce Xe PCIe FLR (rev10) Patchwork
@ 2026-08-21 11:33 ` Patchwork
  2026-08-21 12:37 ` ✓ Xe.CI.BAT: " Patchwork
  2026-08-21 14:38 ` ✓ Xe.CI.FULL: " Patchwork
  13 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2026-08-21 11:33 UTC (permalink / raw)
  To: Raag Jadav; +Cc: intel-xe

== Series Details ==

Series: Introduce Xe PCIe FLR (rev10)
URL   : https://patchwork.freedesktop.org/series/162055/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[11:31:29] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:31:34] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:32:05] Starting KUnit Kernel (1/1)...
[11:32:05] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:32:06] ================== guc_buf (11 subtests) ===================
[11:32:06] [PASSED] test_smallest
[11:32:06] [PASSED] test_largest
[11:32:06] [PASSED] test_granular
[11:32:06] [PASSED] test_unique
[11:32:06] [PASSED] test_overlap
[11:32:06] [PASSED] test_reusable
[11:32:06] [PASSED] test_too_big
[11:32:06] [PASSED] test_flush
[11:32:06] [PASSED] test_lookup
[11:32:06] [PASSED] test_data
[11:32:06] [PASSED] test_class
[11:32:06] ===================== [PASSED] guc_buf =====================
[11:32:06] =================== guc_dbm (7 subtests) ===================
[11:32:06] [PASSED] test_empty
[11:32:06] [PASSED] test_default
[11:32:06] ======================== test_size  ========================
[11:32:06] [PASSED] 4
[11:32:06] [PASSED] 8
[11:32:06] [PASSED] 32
[11:32:06] [PASSED] 256
[11:32:06] ==================== [PASSED] test_size ====================
[11:32:06] ======================= test_reuse  ========================
[11:32:06] [PASSED] 4
[11:32:06] [PASSED] 8
[11:32:06] [PASSED] 32
[11:32:06] [PASSED] 256
[11:32:06] =================== [PASSED] test_reuse ====================
[11:32:06] =================== test_range_overlap  ====================
[11:32:06] [PASSED] 4
[11:32:06] [PASSED] 8
[11:32:06] [PASSED] 32
[11:32:06] [PASSED] 256
[11:32:06] =============== [PASSED] test_range_overlap ================
[11:32:06] =================== test_range_compact  ====================
[11:32:06] [PASSED] 4
[11:32:06] [PASSED] 8
[11:32:06] [PASSED] 32
[11:32:06] [PASSED] 256
[11:32:06] =============== [PASSED] test_range_compact ================
[11:32:06] ==================== test_range_spare  =====================
[11:32:06] [PASSED] 4
[11:32:06] [PASSED] 8
[11:32:06] [PASSED] 32
[11:32:06] [PASSED] 256
[11:32:06] ================ [PASSED] test_range_spare =================
[11:32:06] ===================== [PASSED] guc_dbm =====================
[11:32:06] =================== guc_idm (6 subtests) ===================
[11:32:06] [PASSED] bad_init
[11:32:06] [PASSED] no_init
[11:32:06] [PASSED] init_fini
[11:32:06] [PASSED] check_used
[11:32:06] [PASSED] check_quota
[11:32:06] [PASSED] check_all
[11:32:06] ===================== [PASSED] guc_idm =====================
[11:32:06] =============== guc_klv_helpers (9 subtests) ===============
[11:32:06] [PASSED] test_count
[11:32:06] [PASSED] test_encode_u32
[11:32:06] [PASSED] test_encode_u64
[11:32:06] [PASSED] test_encode_string
[11:32:06] [PASSED] test_encode_object_raw
[11:32:06] [PASSED] test_encode_object_klv
[11:32:06] [PASSED] test_encode_object_nested
[11:32:06] [PASSED] test_encode_object_basic
[11:32:06] [PASSED] test_print
[11:32:06] ================= [PASSED] guc_klv_helpers =================
[11:32:06] =================== xe_log (4 subtests) ====================
[11:32:06] [PASSED] demo_cper
[11:32:06] [PASSED] demo_dmesg
[11:32:06] ======================= test_dmesg  ========================
[11:32:06] [PASSED] test_fatal
[11:32:06] [PASSED] test_fatal_tile
[11:32:06] [PASSED] test_fatal_gt
[11:32:06] [PASSED] test_fatal_comp
[11:32:06] [PASSED] test_fatal_comp_tile
[11:32:06] [PASSED] test_fatal_comp_gt
[11:32:06] [PASSED] test_fatal_all
[11:32:06] [PASSED] test_recoverable
[11:32:06] [PASSED] test_recoverable_tile
[11:32:06] [PASSED] test_recoverable_gt
[11:32:06] [PASSED] test_recoverable_comp
[11:32:06] [PASSED] test_recoverable_comp_tile
[11:32:06] [PASSED] test_recoverable_comp_gt
[11:32:06] [PASSED] test_recoverable_all
[11:32:06] [PASSED] test_info
[11:32:06] [PASSED] test_info_tile
[11:32:06] [PASSED] test_info_gt
[11:32:06] [PASSED] test_info_err
[11:32:06] [PASSED] test_info_comp
[11:32:06] [PASSED] test_info_comp_tile
[11:32:06] [PASSED] test_info_comp_gt
[11:32:06] [PASSED] test_info_all
[11:32:06] [PASSED] test_hw_fatal
[11:32:06] [PASSED] test_hw_recoverable
[11:32:06] [PASSED] test_hw_corrected
[11:32:06] [PASSED] test_hw_informational
[11:32:06] =================== [PASSED] test_dmesg ====================
[11:32:06] ====================== test_invalid  =======================
[11:32:06] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[11:32:06] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[11:32:06] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[11:32:06] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[11:32:06] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[11:32:06] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[11:32:06] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[11:32:06] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[11:32:06] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[11:32:06] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[11:32:06] ================== [SKIPPED] test_invalid ==================
[11:32:06] ===================== [PASSED] xe_log ======================
[11:32:06] ================== no_relay (3 subtests) ===================
[11:32:06] [PASSED] xe_drops_guc2pf_if_not_ready
[11:32:06] [PASSED] xe_drops_guc2vf_if_not_ready
[11:32:06] [PASSED] xe_rejects_send_if_not_ready
[11:32:06] ==================== [PASSED] no_relay =====================
[11:32:06] ================== pf_relay (14 subtests) ==================
[11:32:06] [PASSED] pf_rejects_guc2pf_too_short
[11:32:06] [PASSED] pf_rejects_guc2pf_too_long
[11:32:06] [PASSED] pf_rejects_guc2pf_no_payload
[11:32:06] [PASSED] pf_fails_no_payload
[11:32:06] [PASSED] pf_fails_bad_origin
[11:32:06] [PASSED] pf_fails_bad_type
[11:32:06] [PASSED] pf_txn_reports_error
[11:32:06] [PASSED] pf_txn_sends_pf2guc
[11:32:06] [PASSED] pf_sends_pf2guc
[11:32:06] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[11:32:06] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[11:32:06] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[11:32:06] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[11:32:06] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[11:32:06] ==================== [PASSED] pf_relay =====================
[11:32:06] ================== vf_relay (3 subtests) ===================
[11:32:06] [PASSED] vf_rejects_guc2vf_too_short
[11:32:06] [PASSED] vf_rejects_guc2vf_too_long
[11:32:06] [PASSED] vf_rejects_guc2vf_no_payload
[11:32:06] ==================== [PASSED] vf_relay =====================
[11:32:06] ================ pf_gt_config (9 subtests) =================
[11:32:06] [PASSED] fair_contexts_1vf
[11:32:06] [PASSED] fair_doorbells_1vf
[11:32:06] [PASSED] fair_ggtt_1vf
[11:32:06] ====================== fair_vram_1vf  ======================
[11:32:06] [PASSED] 3.50 GiB
[11:32:06] [PASSED] 11.5 GiB
[11:32:06] [PASSED] 15.5 GiB
[11:32:06] [PASSED] 31.5 GiB
[11:32:06] [PASSED] 63.5 GiB
[11:32:06] [PASSED] 1.91 GiB
[11:32:06] ================== [PASSED] fair_vram_1vf ==================
[11:32:06] ================ fair_vram_1vf_admin_only  =================
[11:32:06] [PASSED] 3.50 GiB
[11:32:06] [PASSED] 11.5 GiB
[11:32:06] [PASSED] 15.5 GiB
[11:32:06] [PASSED] 31.5 GiB
[11:32:06] [PASSED] 63.5 GiB
[11:32:06] [PASSED] 1.91 GiB
[11:32:06] ============ [PASSED] fair_vram_1vf_admin_only =============
[11:32:06] ====================== fair_contexts  ======================
[11:32:06] [PASSED] 1 VF
[11:32:06] [PASSED] 2 VFs
[11:32:06] [PASSED] 3 VFs
[11:32:06] [PASSED] 4 VFs
[11:32:06] [PASSED] 5 VFs
[11:32:06] [PASSED] 6 VFs
[11:32:06] [PASSED] 7 VFs
[11:32:06] [PASSED] 8 VFs
[11:32:06] [PASSED] 9 VFs
[11:32:06] [PASSED] 10 VFs
[11:32:06] [PASSED] 11 VFs
[11:32:06] [PASSED] 12 VFs
[11:32:06] [PASSED] 13 VFs
[11:32:06] [PASSED] 14 VFs
[11:32:06] [PASSED] 15 VFs
[11:32:06] [PASSED] 16 VFs
[11:32:06] [PASSED] 17 VFs
[11:32:06] [PASSED] 18 VFs
[11:32:06] [PASSED] 19 VFs
[11:32:06] [PASSED] 20 VFs
[11:32:06] [PASSED] 21 VFs
[11:32:06] [PASSED] 22 VFs
[11:32:06] [PASSED] 23 VFs
[11:32:06] [PASSED] 24 VFs
[11:32:06] [PASSED] 25 VFs
[11:32:06] [PASSED] 26 VFs
[11:32:06] [PASSED] 27 VFs
[11:32:06] [PASSED] 28 VFs
[11:32:06] [PASSED] 29 VFs
[11:32:06] [PASSED] 30 VFs
[11:32:06] [PASSED] 31 VFs
[11:32:06] [PASSED] 32 VFs
[11:32:06] [PASSED] 33 VFs
[11:32:06] [PASSED] 34 VFs
[11:32:06] [PASSED] 35 VFs
[11:32:06] [PASSED] 36 VFs
[11:32:06] [PASSED] 37 VFs
[11:32:06] [PASSED] 38 VFs
[11:32:06] [PASSED] 39 VFs
[11:32:06] [PASSED] 40 VFs
[11:32:06] [PASSED] 41 VFs
[11:32:06] [PASSED] 42 VFs
[11:32:06] [PASSED] 43 VFs
[11:32:06] [PASSED] 44 VFs
[11:32:06] [PASSED] 45 VFs
[11:32:06] [PASSED] 46 VFs
[11:32:06] [PASSED] 47 VFs
[11:32:06] [PASSED] 48 VFs
[11:32:06] [PASSED] 49 VFs
[11:32:06] [PASSED] 50 VFs
[11:32:06] [PASSED] 51 VFs
[11:32:06] [PASSED] 52 VFs
[11:32:06] [PASSED] 53 VFs
[11:32:06] [PASSED] 54 VFs
[11:32:06] [PASSED] 55 VFs
[11:32:06] [PASSED] 56 VFs
[11:32:06] [PASSED] 57 VFs
[11:32:06] [PASSED] 58 VFs
[11:32:06] [PASSED] 59 VFs
[11:32:06] [PASSED] 60 VFs
[11:32:06] [PASSED] 61 VFs
[11:32:06] [PASSED] 62 VFs
[11:32:06] [PASSED] 63 VFs
[11:32:06] ================== [PASSED] fair_contexts ==================
[11:32:06] ===================== fair_doorbells  ======================
[11:32:06] [PASSED] 1 VF
[11:32:06] [PASSED] 2 VFs
[11:32:06] [PASSED] 3 VFs
[11:32:06] [PASSED] 4 VFs
[11:32:06] [PASSED] 5 VFs
[11:32:06] [PASSED] 6 VFs
[11:32:06] [PASSED] 7 VFs
[11:32:06] [PASSED] 8 VFs
[11:32:06] [PASSED] 9 VFs
[11:32:06] [PASSED] 10 VFs
[11:32:06] [PASSED] 11 VFs
[11:32:06] [PASSED] 12 VFs
[11:32:06] [PASSED] 13 VFs
[11:32:06] [PASSED] 14 VFs
[11:32:06] [PASSED] 15 VFs
[11:32:06] [PASSED] 16 VFs
[11:32:06] [PASSED] 17 VFs
[11:32:06] [PASSED] 18 VFs
[11:32:06] [PASSED] 19 VFs
[11:32:06] [PASSED] 20 VFs
[11:32:06] [PASSED] 21 VFs
[11:32:06] [PASSED] 22 VFs
[11:32:06] [PASSED] 23 VFs
[11:32:06] [PASSED] 24 VFs
[11:32:06] [PASSED] 25 VFs
[11:32:06] [PASSED] 26 VFs
[11:32:06] [PASSED] 27 VFs
[11:32:06] [PASSED] 28 VFs
[11:32:06] [PASSED] 29 VFs
[11:32:06] [PASSED] 30 VFs
[11:32:06] [PASSED] 31 VFs
[11:32:06] [PASSED] 32 VFs
[11:32:06] [PASSED] 33 VFs
[11:32:06] [PASSED] 34 VFs
[11:32:06] [PASSED] 35 VFs
[11:32:06] [PASSED] 36 VFs
[11:32:06] [PASSED] 37 VFs
[11:32:06] [PASSED] 38 VFs
[11:32:06] [PASSED] 39 VFs
[11:32:06] [PASSED] 40 VFs
[11:32:06] [PASSED] 41 VFs
[11:32:06] [PASSED] 42 VFs
[11:32:06] [PASSED] 43 VFs
[11:32:06] [PASSED] 44 VFs
[11:32:06] [PASSED] 45 VFs
[11:32:06] [PASSED] 46 VFs
[11:32:06] [PASSED] 47 VFs
[11:32:06] [PASSED] 48 VFs
[11:32:06] [PASSED] 49 VFs
[11:32:06] [PASSED] 50 VFs
[11:32:06] [PASSED] 51 VFs
[11:32:06] [PASSED] 52 VFs
[11:32:06] [PASSED] 53 VFs
[11:32:06] [PASSED] 54 VFs
[11:32:06] [PASSED] 55 VFs
[11:32:06] [PASSED] 56 VFs
[11:32:06] [PASSED] 57 VFs
[11:32:06] [PASSED] 58 VFs
[11:32:06] [PASSED] 59 VFs
[11:32:06] [PASSED] 60 VFs
[11:32:06] [PASSED] 61 VFs
[11:32:06] [PASSED] 62 VFs
[11:32:06] [PASSED] 63 VFs
[11:32:06] ================= [PASSED] fair_doorbells ==================
[11:32:06] ======================== fair_ggtt  ========================
[11:32:06] [PASSED] 1 VF
[11:32:06] [PASSED] 2 VFs
[11:32:06] [PASSED] 3 VFs
[11:32:06] [PASSED] 4 VFs
[11:32:06] [PASSED] 5 VFs
[11:32:06] [PASSED] 6 VFs
[11:32:06] [PASSED] 7 VFs
[11:32:06] [PASSED] 8 VFs
[11:32:06] [PASSED] 9 VFs
[11:32:06] [PASSED] 10 VFs
[11:32:06] [PASSED] 11 VFs
[11:32:06] [PASSED] 12 VFs
[11:32:06] [PASSED] 13 VFs
[11:32:06] [PASSED] 14 VFs
[11:32:06] [PASSED] 15 VFs
[11:32:06] [PASSED] 16 VFs
[11:32:06] [PASSED] 17 VFs
[11:32:06] [PASSED] 18 VFs
[11:32:06] [PASSED] 19 VFs
[11:32:06] [PASSED] 20 VFs
[11:32:06] [PASSED] 21 VFs
[11:32:06] [PASSED] 22 VFs
[11:32:06] [PASSED] 23 VFs
[11:32:06] [PASSED] 24 VFs
[11:32:06] [PASSED] 25 VFs
[11:32:06] [PASSED] 26 VFs
[11:32:06] [PASSED] 27 VFs
[11:32:06] [PASSED] 28 VFs
[11:32:06] [PASSED] 29 VFs
[11:32:06] [PASSED] 30 VFs
[11:32:06] [PASSED] 31 VFs
[11:32:06] [PASSED] 32 VFs
[11:32:06] [PASSED] 33 VFs
[11:32:06] [PASSED] 34 VFs
[11:32:06] [PASSED] 35 VFs
[11:32:06] [PASSED] 36 VFs
[11:32:06] [PASSED] 37 VFs
[11:32:06] [PASSED] 38 VFs
[11:32:06] [PASSED] 39 VFs
[11:32:06] [PASSED] 40 VFs
[11:32:06] [PASSED] 41 VFs
[11:32:06] [PASSED] 42 VFs
[11:32:06] [PASSED] 43 VFs
[11:32:06] [PASSED] 44 VFs
[11:32:06] [PASSED] 45 VFs
[11:32:06] [PASSED] 46 VFs
[11:32:06] [PASSED] 47 VFs
[11:32:06] [PASSED] 48 VFs
[11:32:06] [PASSED] 49 VFs
[11:32:06] [PASSED] 50 VFs
[11:32:06] [PASSED] 51 VFs
[11:32:06] [PASSED] 52 VFs
[11:32:06] [PASSED] 53 VFs
[11:32:06] [PASSED] 54 VFs
[11:32:06] [PASSED] 55 VFs
[11:32:06] [PASSED] 56 VFs
[11:32:06] [PASSED] 57 VFs
[11:32:06] [PASSED] 58 VFs
[11:32:06] [PASSED] 59 VFs
[11:32:06] [PASSED] 60 VFs
[11:32:06] [PASSED] 61 VFs
[11:32:06] [PASSED] 62 VFs
[11:32:06] [PASSED] 63 VFs
[11:32:06] ==================== [PASSED] fair_ggtt ====================
[11:32:06] ======================== fair_vram  ========================
[11:32:06] [PASSED] 1 VF
[11:32:06] [PASSED] 2 VFs
[11:32:06] [PASSED] 3 VFs
[11:32:06] [PASSED] 4 VFs
[11:32:06] [PASSED] 5 VFs
[11:32:06] [PASSED] 6 VFs
[11:32:06] [PASSED] 7 VFs
[11:32:06] [PASSED] 8 VFs
[11:32:06] [PASSED] 9 VFs
[11:32:06] [PASSED] 10 VFs
[11:32:06] [PASSED] 11 VFs
[11:32:06] [PASSED] 12 VFs
[11:32:06] [PASSED] 13 VFs
[11:32:06] [PASSED] 14 VFs
[11:32:06] [PASSED] 15 VFs
[11:32:06] [PASSED] 16 VFs
[11:32:06] [PASSED] 17 VFs
[11:32:06] [PASSED] 18 VFs
[11:32:06] [PASSED] 19 VFs
[11:32:06] [PASSED] 20 VFs
[11:32:06] [PASSED] 21 VFs
[11:32:06] [PASSED] 22 VFs
[11:32:06] [PASSED] 23 VFs
[11:32:06] [PASSED] 24 VFs
[11:32:06] [PASSED] 25 VFs
[11:32:06] [PASSED] 26 VFs
[11:32:06] [PASSED] 27 VFs
[11:32:06] [PASSED] 28 VFs
[11:32:06] [PASSED] 29 VFs
[11:32:06] [PASSED] 30 VFs
[11:32:06] [PASSED] 31 VFs
[11:32:06] [PASSED] 32 VFs
[11:32:06] [PASSED] 33 VFs
[11:32:06] [PASSED] 34 VFs
[11:32:06] [PASSED] 35 VFs
[11:32:06] [PASSED] 36 VFs
[11:32:06] [PASSED] 37 VFs
[11:32:06] [PASSED] 38 VFs
[11:32:06] [PASSED] 39 VFs
[11:32:06] [PASSED] 40 VFs
[11:32:06] [PASSED] 41 VFs
[11:32:06] [PASSED] 42 VFs
[11:32:06] [PASSED] 43 VFs
[11:32:06] [PASSED] 44 VFs
[11:32:06] [PASSED] 45 VFs
[11:32:06] [PASSED] 46 VFs
[11:32:06] [PASSED] 47 VFs
[11:32:06] [PASSED] 48 VFs
[11:32:06] [PASSED] 49 VFs
[11:32:06] [PASSED] 50 VFs
[11:32:06] [PASSED] 51 VFs
[11:32:06] [PASSED] 52 VFs
[11:32:06] [PASSED] 53 VFs
[11:32:06] [PASSED] 54 VFs
[11:32:06] [PASSED] 55 VFs
[11:32:06] [PASSED] 56 VFs
[11:32:06] [PASSED] 57 VFs
[11:32:06] [PASSED] 58 VFs
[11:32:06] [PASSED] 59 VFs
[11:32:06] [PASSED] 60 VFs
[11:32:06] [PASSED] 61 VFs
[11:32:06] [PASSED] 62 VFs
[11:32:06] [PASSED] 63 VFs
[11:32:06] ==================== [PASSED] fair_vram ====================
[11:32:06] ================== [PASSED] pf_gt_config ===================
[11:32:06] ===================== lmtt (1 subtest) =====================
[11:32:06] ======================== test_ops  =========================
[11:32:06] [PASSED] 2-level
[11:32:06] [PASSED] multi-level
[11:32:06] ==================== [PASSED] test_ops =====================
[11:32:06] ====================== [PASSED] lmtt =======================
[11:32:06] ================= sriov_packet (1 subtest) =================
[11:32:06] [PASSED] test_descriptor_init
[11:32:06] ================== [PASSED] sriov_packet ===================
[11:32:06] ================= pf_service (11 subtests) =================
[11:32:06] [PASSED] pf_negotiate_any
[11:32:06] [PASSED] pf_negotiate_base_match
[11:32:06] [PASSED] pf_negotiate_base_newer
[11:32:06] [PASSED] pf_negotiate_base_next
[11:32:06] [SKIPPED] pf_negotiate_base_older (no older minor)
[11:32:06] [PASSED] pf_negotiate_base_prev
[11:32:06] [PASSED] pf_negotiate_latest_match
[11:32:06] [PASSED] pf_negotiate_latest_newer
[11:32:06] [PASSED] pf_negotiate_latest_next
[11:32:06] [SKIPPED] pf_negotiate_latest_older (no older minor)
[11:32:06] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[11:32:06] =================== [PASSED] pf_service ====================
[11:32:06] ================= xe_guc_g2g (2 subtests) ==================
[11:32:06] ============== xe_live_guc_g2g_kunit_default  ==============
[11:32:06] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[11:32:06] ============== xe_live_guc_g2g_kunit_allmem  ===============
[11:32:06] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[11:32:06] =================== [SKIPPED] xe_guc_g2g ===================
[11:32:06] =================== xe_mocs (2 subtests) ===================
[11:32:06] ================ xe_live_mocs_kernel_kunit  ================
[11:32:06] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[11:32:06] ================ xe_live_mocs_reset_kunit  =================
[11:32:06] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[11:32:06] ==================== [SKIPPED] xe_mocs =====================
[11:32:06] ================= xe_migrate (2 subtests) ==================
[11:32:06] ================= xe_migrate_sanity_kunit  =================
[11:32:06] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[11:32:06] ================== xe_validate_ccs_kunit  ==================
[11:32:06] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[11:32:06] =================== [SKIPPED] xe_migrate ===================
[11:32:06] ================== xe_dma_buf (1 subtest) ==================
[11:32:06] ==================== xe_dma_buf_kunit  =====================
[11:32:06] ================ [SKIPPED] xe_dma_buf_kunit ================
[11:32:06] =================== [SKIPPED] xe_dma_buf ===================
[11:32:06] ================= xe_bo_shrink (1 subtest) =================
[11:32:06] =================== xe_bo_shrink_kunit  ====================
[11:32:06] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[11:32:06] ================== [SKIPPED] xe_bo_shrink ==================
[11:32:06] ==================== xe_bo (2 subtests) ====================
[11:32:06] ================== xe_ccs_migrate_kunit  ===================
[11:32:06] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[11:32:06] ==================== xe_bo_evict_kunit  ====================
[11:32:06] =============== [SKIPPED] xe_bo_evict_kunit ================
[11:32:06] ===================== [SKIPPED] xe_bo ======================
[11:32:06] =================== xe_any (9 subtests) ====================
[11:32:06] [PASSED] test_to_xe
[11:32:06] [PASSED] test_to_dev
[11:32:06] [PASSED] test_to_pdev
[11:32:06] [PASSED] test_to_drm
[11:32:06] [PASSED] test_if_pdev
[11:32:06] [PASSED] test_if_xe
[11:32:06] [PASSED] test_if_tile
[11:32:06] [PASSED] test_if_gt
[11:32:06] [PASSED] test_to_id
[11:32:06] ===================== [PASSED] xe_any ======================
[11:32:06] ==================== args (13 subtests) ====================
[11:32:06] [PASSED] count_args_test
[11:32:06] [PASSED] call_args_example
[11:32:06] [PASSED] call_args_test
[11:32:06] [PASSED] drop_first_arg_example
[11:32:06] [PASSED] drop_first_arg_test
[11:32:06] [PASSED] first_arg_example
[11:32:06] [PASSED] first_arg_test
[11:32:06] [PASSED] last_arg_example
[11:32:06] [PASSED] last_arg_test
[11:32:06] [PASSED] pick_arg_example
[11:32:06] [PASSED] if_args_example
[11:32:06] [PASSED] if_args_test
[11:32:06] [PASSED] sep_comma_example
[11:32:06] ====================== [PASSED] args =======================
[11:32:06] =================== xe_pci (3 subtests) ====================
[11:32:06] ==================== check_graphics_ip  ====================
[11:32:06] [PASSED] 12.00 Xe_LP
[11:32:06] [PASSED] 12.10 Xe_LP+
[11:32:06] [PASSED] 12.55 Xe_HPG
[11:32:06] [PASSED] 12.60 Xe_HPC
[11:32:06] [PASSED] 12.70 Xe_LPG
[11:32:06] [PASSED] 12.71 Xe_LPG
[11:32:06] [PASSED] 12.74 Xe_LPG+
[11:32:06] [PASSED] 20.01 Xe2_HPG
[11:32:06] [PASSED] 20.02 Xe2_HPG
[11:32:06] [PASSED] 20.04 Xe2_LPG
[11:32:06] [PASSED] 30.00 Xe3_LPG
[11:32:06] [PASSED] 30.01 Xe3_LPG
[11:32:06] [PASSED] 30.03 Xe3_LPG
[11:32:06] [PASSED] 30.04 Xe3_LPG
[11:32:06] [PASSED] 30.05 Xe3_LPG
[11:32:06] [PASSED] 35.10 Xe3p_LPG
[11:32:06] [PASSED] 35.11 Xe3p_XPC
[11:32:06] ================ [PASSED] check_graphics_ip ================
[11:32:06] ===================== check_media_ip  ======================
[11:32:06] [PASSED] 12.00 Xe_M
[11:32:06] [PASSED] 12.55 Xe_HPM
[11:32:06] [PASSED] 13.00 Xe_LPM+
[11:32:06] [PASSED] 13.01 Xe2_HPM
[11:32:06] [PASSED] 20.00 Xe2_LPM
[11:32:06] [PASSED] 30.00 Xe3_LPM
[11:32:06] [PASSED] 30.02 Xe3_LPM
[11:32:06] [PASSED] 35.00 Xe3p_LPM
[11:32:06] [PASSED] 35.03 Xe3p_HPM
[11:32:06] ================= [PASSED] check_media_ip ==================
[11:32:06] =================== check_platform_desc  ===================
[11:32:06] [PASSED] 0x9A60 (TIGERLAKE)
[11:32:06] [PASSED] 0x9A68 (TIGERLAKE)
[11:32:06] [PASSED] 0x9A70 (TIGERLAKE)
[11:32:06] [PASSED] 0x9A40 (TIGERLAKE)
[11:32:06] [PASSED] 0x9A49 (TIGERLAKE)
[11:32:06] [PASSED] 0x9A59 (TIGERLAKE)
[11:32:06] [PASSED] 0x9A78 (TIGERLAKE)
[11:32:06] [PASSED] 0x9AC0 (TIGERLAKE)
[11:32:06] [PASSED] 0x9AC9 (TIGERLAKE)
[11:32:06] [PASSED] 0x9AD9 (TIGERLAKE)
[11:32:06] [PASSED] 0x9AF8 (TIGERLAKE)
[11:32:06] [PASSED] 0x4C80 (ROCKETLAKE)
[11:32:06] [PASSED] 0x4C8A (ROCKETLAKE)
[11:32:06] [PASSED] 0x4C8B (ROCKETLAKE)
[11:32:06] [PASSED] 0x4C8C (ROCKETLAKE)
[11:32:06] [PASSED] 0x4C90 (ROCKETLAKE)
[11:32:06] [PASSED] 0x4C9A (ROCKETLAKE)
[11:32:06] [PASSED] 0x4680 (ALDERLAKE_S)
[11:32:06] [PASSED] 0x4682 (ALDERLAKE_S)
[11:32:06] [PASSED] 0x4688 (ALDERLAKE_S)
[11:32:06] [PASSED] 0x468A (ALDERLAKE_S)
[11:32:06] [PASSED] 0x468B (ALDERLAKE_S)
[11:32:06] [PASSED] 0x4690 (ALDERLAKE_S)
[11:32:06] [PASSED] 0x4692 (ALDERLAKE_S)
[11:32:06] [PASSED] 0x4693 (ALDERLAKE_S)
[11:32:06] [PASSED] 0x46A0 (ALDERLAKE_P)
[11:32:06] [PASSED] 0x46A1 (ALDERLAKE_P)
[11:32:06] [PASSED] 0x46A2 (ALDERLAKE_P)
[11:32:06] [PASSED] 0x46A3 (ALDERLAKE_P)
[11:32:06] [PASSED] 0x46A6 (ALDERLAKE_P)
[11:32:06] [PASSED] 0x46A8 (ALDERLAKE_P)
[11:32:06] [PASSED] 0x46AA (ALDERLAKE_P)
[11:32:06] [PASSED] 0x462A (ALDERLAKE_P)
[11:32:06] [PASSED] 0x4626 (ALDERLAKE_P)
[11:32:06] [PASSED] 0x4628 (ALDERLAKE_P)
[11:32:06] [PASSED] 0x46B0 (ALDERLAKE_P)
[11:32:06] [PASSED] 0x46B1 (ALDERLAKE_P)
[11:32:06] [PASSED] 0x46B2 (ALDERLAKE_P)
[11:32:06] [PASSED] 0x46B3 (ALDERLAKE_P)
[11:32:06] [PASSED] 0x46C0 (ALDERLAKE_P)
[11:32:06] [PASSED] 0x46C1 (ALDERLAKE_P)
[11:32:06] [PASSED] 0x46C2 (ALDERLAKE_P)
[11:32:06] [PASSED] 0x46C3 (ALDERLAKE_P)
[11:32:06] [PASSED] 0x46D0 (ALDERLAKE_N)
[11:32:06] [PASSED] 0x46D1 (ALDERLAKE_N)
[11:32:06] [PASSED] 0x46D2 (ALDERLAKE_N)
[11:32:06] [PASSED] 0x46D3 (ALDERLAKE_N)
[11:32:06] [PASSED] 0x46D4 (ALDERLAKE_N)
[11:32:06] [PASSED] 0xA721 (ALDERLAKE_P)
[11:32:06] [PASSED] 0xA7A1 (ALDERLAKE_P)
[11:32:06] [PASSED] 0xA7A9 (ALDERLAKE_P)
[11:32:06] [PASSED] 0xA7AC (ALDERLAKE_P)
[11:32:06] [PASSED] 0xA7AD (ALDERLAKE_P)
[11:32:06] [PASSED] 0xA720 (ALDERLAKE_P)
[11:32:06] [PASSED] 0xA7A0 (ALDERLAKE_P)
[11:32:06] [PASSED] 0xA7A8 (ALDERLAKE_P)
[11:32:06] [PASSED] 0xA7AA (ALDERLAKE_P)
[11:32:06] [PASSED] 0xA7AB (ALDERLAKE_P)
[11:32:06] [PASSED] 0xA780 (ALDERLAKE_S)
[11:32:06] [PASSED] 0xA781 (ALDERLAKE_S)
[11:32:06] [PASSED] 0xA782 (ALDERLAKE_S)
[11:32:06] [PASSED] 0xA783 (ALDERLAKE_S)
[11:32:06] [PASSED] 0xA788 (ALDERLAKE_S)
[11:32:06] [PASSED] 0xA789 (ALDERLAKE_S)
[11:32:06] [PASSED] 0xA78A (ALDERLAKE_S)
[11:32:06] [PASSED] 0xA78B (ALDERLAKE_S)
[11:32:06] [PASSED] 0x4905 (DG1)
[11:32:06] [PASSED] 0x4906 (DG1)
[11:32:06] [PASSED] 0x4907 (DG1)
[11:32:06] [PASSED] 0x4908 (DG1)
[11:32:06] [PASSED] 0x4909 (DG1)
[11:32:06] [PASSED] 0x56C0 (DG2)
[11:32:06] [PASSED] 0x56C2 (DG2)
[11:32:06] [PASSED] 0x56C1 (DG2)
[11:32:06] [PASSED] 0x7D51 (METEORLAKE)
[11:32:06] [PASSED] 0x7DD1 (METEORLAKE)
[11:32:06] [PASSED] 0x7D41 (METEORLAKE)
[11:32:06] [PASSED] 0x7D67 (METEORLAKE)
[11:32:06] [PASSED] 0xB640 (METEORLAKE)
[11:32:06] [PASSED] 0x56A0 (DG2)
[11:32:06] [PASSED] 0x56A1 (DG2)
[11:32:06] [PASSED] 0x56A2 (DG2)
[11:32:06] [PASSED] 0x56BE (DG2)
[11:32:06] [PASSED] 0x56BF (DG2)
[11:32:06] [PASSED] 0x5690 (DG2)
[11:32:06] [PASSED] 0x5691 (DG2)
[11:32:06] [PASSED] 0x5692 (DG2)
[11:32:06] [PASSED] 0x56A5 (DG2)
[11:32:06] [PASSED] 0x56A6 (DG2)
[11:32:06] [PASSED] 0x56B0 (DG2)
[11:32:06] [PASSED] 0x56B1 (DG2)
[11:32:06] [PASSED] 0x56BA (DG2)
[11:32:06] [PASSED] 0x56BB (DG2)
[11:32:06] [PASSED] 0x56BC (DG2)
[11:32:06] [PASSED] 0x56BD (DG2)
[11:32:06] [PASSED] 0x5693 (DG2)
[11:32:06] [PASSED] 0x5694 (DG2)
[11:32:06] [PASSED] 0x5695 (DG2)
[11:32:06] [PASSED] 0x56A3 (DG2)
[11:32:06] [PASSED] 0x56A4 (DG2)
[11:32:06] [PASSED] 0x56B2 (DG2)
[11:32:06] [PASSED] 0x56B3 (DG2)
[11:32:06] [PASSED] 0x5696 (DG2)
[11:32:06] [PASSED] 0x5697 (DG2)
[11:32:06] [PASSED] 0xB69 (PVC)
[11:32:06] [PASSED] 0xB6E (PVC)
[11:32:06] [PASSED] 0xBD4 (PVC)
[11:32:06] [PASSED] 0xBD5 (PVC)
[11:32:06] [PASSED] 0xBD6 (PVC)
[11:32:06] [PASSED] 0xBD7 (PVC)
[11:32:06] [PASSED] 0xBD8 (PVC)
[11:32:06] [PASSED] 0xBD9 (PVC)
[11:32:06] [PASSED] 0xBDA (PVC)
[11:32:06] [PASSED] 0xBDB (PVC)
[11:32:06] [PASSED] 0xBE0 (PVC)
[11:32:06] [PASSED] 0xBE1 (PVC)
[11:32:06] [PASSED] 0xBE5 (PVC)
[11:32:06] [PASSED] 0x7D40 (METEORLAKE)
[11:32:06] [PASSED] 0x7D45 (METEORLAKE)
[11:32:06] [PASSED] 0x7D55 (METEORLAKE)
[11:32:06] [PASSED] 0x7D60 (METEORLAKE)
[11:32:06] [PASSED] 0x7DD5 (METEORLAKE)
[11:32:06] [PASSED] 0x6420 (LUNARLAKE)
[11:32:06] [PASSED] 0x64A0 (LUNARLAKE)
[11:32:06] [PASSED] 0x64B0 (LUNARLAKE)
[11:32:06] [PASSED] 0xE202 (BATTLEMAGE)
[11:32:06] [PASSED] 0xE209 (BATTLEMAGE)
[11:32:06] [PASSED] 0xE20B (BATTLEMAGE)
[11:32:06] [PASSED] 0xE20C (BATTLEMAGE)
[11:32:06] [PASSED] 0xE20D (BATTLEMAGE)
[11:32:06] [PASSED] 0xE210 (BATTLEMAGE)
[11:32:06] [PASSED] 0xE211 (BATTLEMAGE)
[11:32:06] [PASSED] 0xE212 (BATTLEMAGE)
[11:32:06] [PASSED] 0xE216 (BATTLEMAGE)
[11:32:06] [PASSED] 0xE220 (BATTLEMAGE)
[11:32:06] [PASSED] 0xE221 (BATTLEMAGE)
[11:32:06] [PASSED] 0xE222 (BATTLEMAGE)
[11:32:06] [PASSED] 0xE223 (BATTLEMAGE)
[11:32:06] [PASSED] 0xB080 (PANTHERLAKE)
[11:32:06] [PASSED] 0xB081 (PANTHERLAKE)
[11:32:06] [PASSED] 0xB082 (PANTHERLAKE)
[11:32:06] [PASSED] 0xB083 (PANTHERLAKE)
[11:32:06] [PASSED] 0xB084 (PANTHERLAKE)
[11:32:06] [PASSED] 0xB085 (PANTHERLAKE)
[11:32:06] [PASSED] 0xB086 (PANTHERLAKE)
[11:32:06] [PASSED] 0xB087 (PANTHERLAKE)
[11:32:06] [PASSED] 0xB08F (PANTHERLAKE)
[11:32:06] [PASSED] 0xB090 (PANTHERLAKE)
[11:32:06] [PASSED] 0xB0A0 (PANTHERLAKE)
[11:32:06] [PASSED] 0xB0B0 (PANTHERLAKE)
[11:32:06] [PASSED] 0xFD80 (PANTHERLAKE)
[11:32:06] [PASSED] 0xFD81 (PANTHERLAKE)
[11:32:06] [PASSED] 0xD740 (NOVALAKE_S)
[11:32:06] [PASSED] 0xD741 (NOVALAKE_S)
[11:32:06] [PASSED] 0xD742 (NOVALAKE_S)
[11:32:06] [PASSED] 0xD743 (NOVALAKE_S)
[11:32:06] [PASSED] 0xD745 (NOVALAKE_S)
[11:32:06] [PASSED] 0xD74A (NOVALAKE_S)
[11:32:06] [PASSED] 0xD74B (NOVALAKE_S)
[11:32:06] [PASSED] 0x674C (CRESCENTISLAND)
[11:32:06] [PASSED] 0x674D (CRESCENTISLAND)
[11:32:06] [PASSED] 0x674E (CRESCENTISLAND)
[11:32:06] [PASSED] 0x674F (CRESCENTISLAND)
[11:32:06] [PASSED] 0x6750 (CRESCENTISLAND)
[11:32:06] [PASSED] 0xD750 (NOVALAKE_P)
[11:32:06] [PASSED] 0xD751 (NOVALAKE_P)
[11:32:06] [PASSED] 0xD752 (NOVALAKE_P)
[11:32:06] [PASSED] 0xD753 (NOVALAKE_P)
[11:32:06] [PASSED] 0xD754 (NOVALAKE_P)
[11:32:06] [PASSED] 0xD755 (NOVALAKE_P)
[11:32:06] [PASSED] 0xD756 (NOVALAKE_P)
[11:32:06] [PASSED] 0xD757 (NOVALAKE_P)
[11:32:06] [PASSED] 0xD75F (NOVALAKE_P)
[11:32:06] =============== [PASSED] check_platform_desc ===============
[11:32:06] ===================== [PASSED] xe_pci ======================
[11:32:06] ============= xe_rtp_tables_test (5 subtests) ==============
[11:32:06] ================== xe_rtp_table_gt_test  ===================
[11:32:06] [PASSED] gt_was/14011060649
[11:32:06] [PASSED] gt_was/14011059788
[11:32:06] [PASSED] gt_was/14015795083
[11:32:06] [PASSED] gt_was/16021867713
[11:32:06] [PASSED] gt_was/14019449301
[11:32:06] [PASSED] gt_was/16028005424
[11:32:06] [PASSED] gt_was/14026578760
[11:32:06] [PASSED] gt_was/1409420604
[11:32:06] [PASSED] gt_was/1408615072
[11:32:06] [PASSED] gt_was/22010523718
[11:32:06] [PASSED] gt_was/14011006942
[11:32:06] [PASSED] gt_was/14014830051
[11:32:06] [PASSED] gt_was/18018781329
[11:32:06] [PASSED] gt_was/1509235366
[11:32:06] [PASSED] gt_was/18018781329
[11:32:06] [PASSED] gt_was/16016694945
[11:32:06] [PASSED] gt_was/14018575942
[11:32:06] [PASSED] gt_was/22016670082
[11:32:06] [PASSED] gt_was/22016670082
[11:32:06] [PASSED] gt_was/14017421178
[11:32:06] [PASSED] gt_was/16025250150
[11:32:06] [PASSED] gt_was/14021871409
[11:32:06] [PASSED] gt_was/16021865536
[11:32:06] [PASSED] gt_was/14021486841
[11:32:06] [PASSED] gt_was/14025160223
[11:32:06] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[11:32:06] [PASSED] gt_was/14025635424
[11:32:06] [PASSED] gt_was/16028005424
[11:32:06] ============== [PASSED] xe_rtp_table_gt_test ===============
[11:32:06] ================== xe_rtp_table_gt_test  ===================
[11:32:06] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[11:32:06] [PASSED] gt_tunings/Tuning: 32B Access Enable
[11:32:06] [PASSED] gt_tunings/Tuning: L3 cache
[11:32:06] [PASSED] gt_tunings/Tuning: L3 cache - media
[11:32:06] [PASSED] gt_tunings/Tuning: Compression Overfetch
[11:32:06] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[11:32:06] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[11:32:06] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[11:32:06] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[11:32:06] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[11:32:06] [PASSED] gt_tunings/Tuning: Stateless compression control
[11:32:06] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[11:32:06] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[11:32:06] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[11:32:06] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[11:32:06] ============== [PASSED] xe_rtp_table_gt_test ===============
[11:32:06] ================== xe_rtp_table_oob_test  ==================
[11:32:06] [PASSED] oob_was/1607983814
[11:32:06] [PASSED] oob_was/16010904313
[11:32:06] [PASSED] oob_was/18022495364
[11:32:06] [PASSED] oob_was/22012773006
[11:32:06] [PASSED] oob_was/14014475959
[11:32:06] [PASSED] oob_was/22011391025
[11:32:06] [PASSED] oob_was/22012727170
[11:32:06] [PASSED] oob_was/22012727685
[11:32:06] [PASSED] oob_was/22016596838
[11:32:06] [PASSED] oob_was/18020744125
[11:32:06] [PASSED] oob_was/1409600907
[11:32:06] [PASSED] oob_was/22014953428
[11:32:06] [PASSED] oob_was/16017236439
[11:32:06] [PASSED] oob_was/14019821291
[11:32:06] [PASSED] oob_was/14015076503
[11:32:06] [PASSED] oob_was/14018913170
[11:32:06] [PASSED] oob_was/14018094691
[11:32:06] [PASSED] oob_was/18024947630
[11:32:06] [PASSED] oob_was/16022287689
[11:32:06] [PASSED] oob_was/13011645652
[11:32:06] [PASSED] oob_was/14022293748
[11:32:06] [PASSED] oob_was/22019794406
[11:32:06] [PASSED] oob_was/22019338487
[11:32:06] [PASSED] oob_was/16023588340
[11:32:06] [PASSED] oob_was/14019789679
[11:32:06] [PASSED] oob_was/14022866841
[11:32:06] [PASSED] oob_was/16021333562
[11:32:06] [PASSED] oob_was/14016712196
[11:32:06] [PASSED] oob_was/14015568240
[11:32:06] [PASSED] oob_was/18013179988
[11:32:06] [PASSED] oob_was/1508761755
[11:32:06] [PASSED] oob_was/16023105232
[11:32:06] [PASSED] oob_was/16026508708
[11:32:06] [PASSED] oob_was/14020001231
[11:32:06] [PASSED] oob_was/16023683509
[11:32:06] [PASSED] oob_was/14025515070
[11:32:06] [PASSED] oob_was/15015404425_disable
[11:32:06] [PASSED] oob_was/16026007364
[11:32:06] [PASSED] oob_was/14020316580
[11:32:06] [PASSED] oob_was/14025883347
[11:32:06] [PASSED] oob_was/16029380221
[11:32:06] [PASSED] oob_was/22022079272
[11:32:06] [PASSED] oob_was/16029897822
[11:32:06] [PASSED] oob_was/14027054324
[11:32:06] ============== [PASSED] xe_rtp_table_oob_test ==============
[11:32:06] ================ xe_rtp_table_dev_oob_test  ================
[11:32:06] [PASSED] device_oob_was/22010954014
[11:32:06] [PASSED] device_oob_was/15015404425
[11:32:06] [PASSED] device_oob_was/22019338487_display
[11:32:06] [PASSED] device_oob_was/14022085890
[11:32:06] [PASSED] device_oob_was/14026539277
[11:32:06] [PASSED] device_oob_was/14026633728
[11:32:06] [PASSED] device_oob_was/14026746987
[11:32:06] [PASSED] device_oob_was/14026779378
[11:32:06] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[11:32:06] ========== xe_rtp_table_missing_upper_bound_test  ==========
[11:32:06] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[11:32:06] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[11:32:06] [PASSED] register_whitelist/1806527549
[11:32:06] [PASSED] register_whitelist/allow_read_ctx_timestamp
[11:32:06] [PASSED] register_whitelist/allow_read_queue_timestamp
[11:32:06] [PASSED] register_whitelist/16014440446
[11:32:06] [PASSED] register_whitelist/16017236439
[11:32:06] [PASSED] register_whitelist/16020183090
[11:32:06] [PASSED] register_whitelist/14024997852
[11:32:06] [PASSED] register_whitelist/14024997852
[11:32:06] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[11:32:06] =============== [PASSED] xe_rtp_tables_test ================
[11:32:06] =================== xe_rtp (3 subtests) ====================
[11:32:06] =================== xe_rtp_rules_tests  ====================
[11:32:06] [PASSED] no
[11:32:06] [PASSED] yes
[11:32:06] [PASSED] no-and-no
[11:32:06] [PASSED] no-and-yes
[11:32:06] [PASSED] yes-and-no
[11:32:06] [PASSED] yes-and-yes
[11:32:06] [PASSED] no-or-no
[11:32:06] [PASSED] no-or-yes
[11:32:06] [PASSED] yes-or-no
[11:32:06] [PASSED] yes-or-yes
[11:32:06] [PASSED] no-yes-or-yes-no
[11:32:06] [PASSED] no-yes-or-yes-yes
[11:32:06] [PASSED] yes-yes-or-no-yes
[11:32:06] [PASSED] yes-yes-or-yes-yes
[11:32:06] [PASSED] no-no-or-yes-or-no
[11:32:06] [PASSED] or
[11:32:06] [PASSED] or-yes
[11:32:06] [PASSED] or-no
[11:32:06] [PASSED] yes-or
[11:32:06] [PASSED] no-or
[11:32:06] [PASSED] no-or-or-yes
[11:32:06] [PASSED] yes-or-or-no
[11:32:06] [PASSED] no-or-or-no
[11:32:06] [PASSED] missing-context-engine-class
[11:32:06] [PASSED] missing-context-engine-class-or-yes
[11:32:06] [PASSED] missing-context-engine-class-or-or-yes
[11:32:06] =============== [PASSED] xe_rtp_rules_tests ================
[11:32:06] =============== xe_rtp_process_to_sr_tests  ================
[11:32:06] [PASSED] coalesce-same-reg
[11:32:06] [PASSED] coalesce-same-reg-literal-and-func
[11:32:06] [PASSED] no-match-no-add
[11:32:06] [PASSED] two-regs-two-entries
[11:32:06] [PASSED] clr-one-set-other
[11:32:06] [PASSED] set-field
[11:32:06] [PASSED] conflict-duplicate
[11:32:06] [PASSED] conflict-not-disjoint
[11:32:06] [PASSED] conflict-not-disjoint-literal-and-func
[11:32:06] [PASSED] conflict-reg-type
[11:32:06] [PASSED] bad-mcr-reg-forced-to-regular
[11:32:06] [PASSED] bad-regular-reg-forced-to-mcr
[11:32:06] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[11:32:06] ================== xe_rtp_process_tests  ===================
[11:32:06] [PASSED] active1
[11:32:06] [PASSED] active2
[11:32:06] [PASSED] active-inactive
[11:32:06] [PASSED] inactive-active
[11:32:06] [PASSED] inactive-active-inactive
[11:32:06] [PASSED] inactive-inactive-inactive
[11:32:06] ============== [PASSED] xe_rtp_process_tests ===============
[11:32:06] ===================== [PASSED] xe_rtp ======================
[11:32:06] ==================== xe_wa (1 subtest) =====================
[11:32:06] ======================== xe_wa_gt  =========================
[11:32:06] [PASSED] TIGERLAKE B0
[11:32:06] [PASSED] DG1 A0
[11:32:06] [PASSED] DG1 B0
[11:32:06] [PASSED] ALDERLAKE_S A0
[11:32:06] [PASSED] ALDERLAKE_S B0
[11:32:06] [PASSED] ALDERLAKE_S C0
[11:32:06] [PASSED] ALDERLAKE_S D0
[11:32:06] [PASSED] ALDERLAKE_P A0
[11:32:06] [PASSED] ALDERLAKE_P B0
[11:32:06] [PASSED] ALDERLAKE_P C0
[11:32:06] [PASSED] ALDERLAKE_S RPLS D0
[11:32:06] [PASSED] ALDERLAKE_P RPLU E0
[11:32:06] [PASSED] DG2 G10 C0
[11:32:06] [PASSED] DG2 G11 B1
[11:32:06] [PASSED] DG2 G12 A1
[11:32:06] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[11:32:06] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[11:32:06] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[11:32:06] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[11:32:06] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[11:32:06] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[11:32:06] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[11:32:06] ==================== [PASSED] xe_wa_gt =====================
[11:32:06] ====================== [PASSED] xe_wa ======================
[11:32:06] ============================================================
[11:32:06] Testing complete. Ran 789 tests: passed: 761, skipped: 28
[11:32:06] Elapsed time: 37.044s total, 4.396s configuring, 31.932s building, 0.678s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[11:32:06] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:32:08] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:32:33] Starting KUnit Kernel (1/1)...
[11:32:33] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:32:33] ============ drm_test_pick_cmdline (2 subtests) ============
[11:32:33] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[11:32:33] =============== drm_test_pick_cmdline_named  ===============
[11:32:33] [PASSED] NTSC
[11:32:33] [PASSED] NTSC-J
[11:32:33] [PASSED] PAL
[11:32:33] [PASSED] PAL-M
[11:32:33] =========== [PASSED] drm_test_pick_cmdline_named ===========
[11:32:33] ============== [PASSED] drm_test_pick_cmdline ==============
[11:32:33] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[11:32:33] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[11:32:33] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[11:32:33] =========== drm_validate_clone_mode (2 subtests) ===========
[11:32:33] ============== drm_test_check_in_clone_mode  ===============
[11:32:33] [PASSED] in_clone_mode
[11:32:33] [PASSED] not_in_clone_mode
[11:32:33] ========== [PASSED] drm_test_check_in_clone_mode ===========
[11:32:33] =============== drm_test_check_valid_clones  ===============
[11:32:33] [PASSED] not_in_clone_mode
[11:32:33] [PASSED] valid_clone
[11:32:33] [PASSED] invalid_clone
[11:32:33] =========== [PASSED] drm_test_check_valid_clones ===========
[11:32:33] ============= [PASSED] drm_validate_clone_mode =============
[11:32:33] ============= drm_validate_modeset (1 subtest) =============
[11:32:33] [PASSED] drm_test_check_connector_changed_modeset
[11:32:33] ============== [PASSED] drm_validate_modeset ===============
[11:32:33] ====== drm_test_bridge_get_current_state (1 subtest) =======
[11:32:33] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[11:32:33] ======== [PASSED] drm_test_bridge_get_current_state ========
[11:32:33] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[11:32:33] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[11:32:33] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[11:32:33] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[11:32:33] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[11:32:33] ============== drm_bridge_alloc (2 subtests) ===============
[11:32:33] [PASSED] drm_test_drm_bridge_alloc_basic
[11:32:33] [PASSED] drm_test_drm_bridge_alloc_get_put
[11:32:33] ================ [PASSED] drm_bridge_alloc =================
[11:32:33] ============= drm_bridge_bus_fmt (5 subtests) ==============
[11:32:33] [PASSED] drm_test_bridge_rgb_yuv_rgb
[11:32:33] [PASSED] drm_test_bridge_must_convert_to_yuv444
[11:32:33] [PASSED] drm_test_bridge_hdmi_auto_rgb
[11:32:33] [PASSED] drm_test_bridge_auto_first
[11:32:33] [PASSED] drm_test_bridge_rgb_yuv_no_path
[11:32:33] =============== [PASSED] drm_bridge_bus_fmt ================
[11:32:33] ============= drm_cmdline_parser (40 subtests) =============
[11:32:33] [PASSED] drm_test_cmdline_force_d_only
[11:32:33] [PASSED] drm_test_cmdline_force_D_only_dvi
[11:32:33] [PASSED] drm_test_cmdline_force_D_only_hdmi
[11:32:33] [PASSED] drm_test_cmdline_force_D_only_not_digital
[11:32:33] [PASSED] drm_test_cmdline_force_e_only
[11:32:33] [PASSED] drm_test_cmdline_res
[11:32:33] [PASSED] drm_test_cmdline_res_vesa
[11:32:33] [PASSED] drm_test_cmdline_res_vesa_rblank
[11:32:33] [PASSED] drm_test_cmdline_res_rblank
[11:32:33] [PASSED] drm_test_cmdline_res_bpp
[11:32:33] [PASSED] drm_test_cmdline_res_refresh
[11:32:33] [PASSED] drm_test_cmdline_res_bpp_refresh
[11:32:33] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[11:32:33] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[11:32:33] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[11:32:33] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[11:32:33] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[11:32:33] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[11:32:33] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[11:32:33] [PASSED] drm_test_cmdline_res_margins_force_on
[11:32:33] [PASSED] drm_test_cmdline_res_vesa_margins
[11:32:33] [PASSED] drm_test_cmdline_name
[11:32:33] [PASSED] drm_test_cmdline_name_bpp
[11:32:33] [PASSED] drm_test_cmdline_name_option
[11:32:33] [PASSED] drm_test_cmdline_name_bpp_option
[11:32:33] [PASSED] drm_test_cmdline_rotate_0
[11:32:33] [PASSED] drm_test_cmdline_rotate_90
[11:32:33] [PASSED] drm_test_cmdline_rotate_180
[11:32:33] [PASSED] drm_test_cmdline_rotate_270
[11:32:33] [PASSED] drm_test_cmdline_hmirror
[11:32:33] [PASSED] drm_test_cmdline_vmirror
[11:32:33] [PASSED] drm_test_cmdline_margin_options
[11:32:33] [PASSED] drm_test_cmdline_multiple_options
[11:32:33] [PASSED] drm_test_cmdline_bpp_extra_and_option
[11:32:33] [PASSED] drm_test_cmdline_extra_and_option
[11:32:33] [PASSED] drm_test_cmdline_freestanding_options
[11:32:33] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[11:32:33] [PASSED] drm_test_cmdline_panel_orientation
[11:32:33] ================ drm_test_cmdline_invalid  =================
[11:32:33] [PASSED] margin_only
[11:32:33] [PASSED] interlace_only
[11:32:33] [PASSED] res_missing_x
[11:32:33] [PASSED] res_missing_y
[11:32:33] [PASSED] res_bad_y
[11:32:33] [PASSED] res_missing_y_bpp
[11:32:33] [PASSED] res_bad_bpp
[11:32:33] [PASSED] res_bad_refresh
[11:32:33] [PASSED] res_bpp_refresh_force_on_off
[11:32:33] [PASSED] res_invalid_mode
[11:32:33] [PASSED] res_bpp_wrong_place_mode
[11:32:33] [PASSED] name_bpp_refresh
[11:32:33] [PASSED] name_refresh
[11:32:33] [PASSED] name_refresh_wrong_mode
[11:32:33] [PASSED] name_refresh_invalid_mode
[11:32:33] [PASSED] rotate_multiple
[11:32:33] [PASSED] rotate_invalid_val
[11:32:33] [PASSED] rotate_truncated
[11:32:33] [PASSED] invalid_option
[11:32:33] [PASSED] invalid_tv_option
[11:32:33] [PASSED] truncated_tv_option
[11:32:33] ============ [PASSED] drm_test_cmdline_invalid =============
[11:32:33] =============== drm_test_cmdline_tv_options  ===============
[11:32:33] [PASSED] NTSC
[11:32:33] [PASSED] NTSC_443
[11:32:33] [PASSED] NTSC_J
[11:32:33] [PASSED] PAL
[11:32:33] [PASSED] PAL_M
[11:32:33] [PASSED] PAL_N
[11:32:33] [PASSED] SECAM
[11:32:33] [PASSED] MONO_525
[11:32:33] [PASSED] MONO_625
[11:32:33] =========== [PASSED] drm_test_cmdline_tv_options ===========
[11:32:33] =============== [PASSED] drm_cmdline_parser ================
[11:32:33] ========== drmm_connector_hdmi_init (20 subtests) ==========
[11:32:33] [PASSED] drm_test_connector_hdmi_init_valid
[11:32:33] [PASSED] drm_test_connector_hdmi_init_bpc_8
[11:32:33] [PASSED] drm_test_connector_hdmi_init_bpc_10
[11:32:33] [PASSED] drm_test_connector_hdmi_init_bpc_12
[11:32:33] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[11:32:33] [PASSED] drm_test_connector_hdmi_init_bpc_null
[11:32:33] [PASSED] drm_test_connector_hdmi_init_formats_empty
[11:32:33] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[11:32:33] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[11:32:33] [PASSED] supported_formats=0x9 yuv420_allowed=1
[11:32:33] [PASSED] supported_formats=0x9 yuv420_allowed=0
[11:32:33] [PASSED] supported_formats=0x5 yuv420_allowed=1
[11:32:33] [PASSED] supported_formats=0x5 yuv420_allowed=0
[11:32:33] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[11:32:33] [PASSED] drm_test_connector_hdmi_init_null_ddc
[11:32:33] [PASSED] drm_test_connector_hdmi_init_null_product
[11:32:33] [PASSED] drm_test_connector_hdmi_init_null_vendor
[11:32:33] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[11:32:33] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[11:32:33] [PASSED] drm_test_connector_hdmi_init_product_valid
[11:32:33] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[11:32:33] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[11:32:33] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[11:32:33] ========= drm_test_connector_hdmi_init_type_valid  =========
[11:32:33] [PASSED] HDMI-A
[11:32:33] [PASSED] HDMI-B
[11:32:33] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[11:32:33] ======== drm_test_connector_hdmi_init_type_invalid  ========
[11:32:33] [PASSED] Unknown
[11:32:33] [PASSED] VGA
[11:32:33] [PASSED] DVI-I
[11:32:33] [PASSED] DVI-D
[11:32:33] [PASSED] DVI-A
[11:32:33] [PASSED] Composite
[11:32:33] [PASSED] SVIDEO
[11:32:33] [PASSED] LVDS
[11:32:33] [PASSED] Component
[11:32:33] [PASSED] DIN
[11:32:33] [PASSED] DP
[11:32:33] [PASSED] TV
[11:32:33] [PASSED] eDP
[11:32:33] [PASSED] Virtual
[11:32:33] [PASSED] DSI
[11:32:33] [PASSED] DPI
[11:32:33] [PASSED] Writeback
[11:32:33] [PASSED] SPI
[11:32:33] [PASSED] USB
[11:32:33] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[11:32:33] ============ [PASSED] drmm_connector_hdmi_init =============
[11:32:33] ============= drmm_connector_init (3 subtests) =============
[11:32:33] [PASSED] drm_test_drmm_connector_init
[11:32:33] [PASSED] drm_test_drmm_connector_init_null_ddc
[11:32:33] ========= drm_test_drmm_connector_init_type_valid  =========
[11:32:33] [PASSED] Unknown
[11:32:33] [PASSED] VGA
[11:32:33] [PASSED] DVI-I
[11:32:33] [PASSED] DVI-D
[11:32:33] [PASSED] DVI-A
[11:32:33] [PASSED] Composite
[11:32:33] [PASSED] SVIDEO
[11:32:33] [PASSED] LVDS
[11:32:33] [PASSED] Component
[11:32:33] [PASSED] DIN
[11:32:33] [PASSED] DP
[11:32:33] [PASSED] HDMI-A
[11:32:33] [PASSED] HDMI-B
[11:32:33] [PASSED] TV
[11:32:33] [PASSED] eDP
[11:32:33] [PASSED] Virtual
[11:32:33] [PASSED] DSI
[11:32:33] [PASSED] DPI
[11:32:33] [PASSED] Writeback
[11:32:33] [PASSED] SPI
[11:32:33] [PASSED] USB
[11:32:33] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[11:32:33] =============== [PASSED] drmm_connector_init ===============
[11:32:33] ========= drm_connector_dynamic_init (6 subtests) ==========
[11:32:33] [PASSED] drm_test_drm_connector_dynamic_init
[11:32:33] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[11:32:33] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[11:32:33] [PASSED] drm_test_drm_connector_dynamic_init_properties
[11:32:33] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[11:32:33] [PASSED] Unknown
[11:32:33] [PASSED] VGA
[11:32:33] [PASSED] DVI-I
[11:32:33] [PASSED] DVI-D
[11:32:33] [PASSED] DVI-A
[11:32:33] [PASSED] Composite
[11:32:33] [PASSED] SVIDEO
[11:32:33] [PASSED] LVDS
[11:32:33] [PASSED] Component
[11:32:33] [PASSED] DIN
[11:32:33] [PASSED] DP
[11:32:33] [PASSED] HDMI-A
[11:32:33] [PASSED] HDMI-B
[11:32:33] [PASSED] TV
[11:32:33] [PASSED] eDP
[11:32:33] [PASSED] Virtual
[11:32:33] [PASSED] DSI
[11:32:33] [PASSED] DPI
[11:32:33] [PASSED] Writeback
[11:32:33] [PASSED] SPI
[11:32:33] [PASSED] USB
[11:32:33] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[11:32:33] ======== drm_test_drm_connector_dynamic_init_name  =========
[11:32:33] [PASSED] Unknown
[11:32:33] [PASSED] VGA
[11:32:33] [PASSED] DVI-I
[11:32:33] [PASSED] DVI-D
[11:32:33] [PASSED] DVI-A
[11:32:33] [PASSED] Composite
[11:32:33] [PASSED] SVIDEO
[11:32:33] [PASSED] LVDS
[11:32:33] [PASSED] Component
[11:32:33] [PASSED] DIN
[11:32:33] [PASSED] DP
[11:32:33] [PASSED] HDMI-A
[11:32:33] [PASSED] HDMI-B
[11:32:33] [PASSED] TV
[11:32:33] [PASSED] eDP
[11:32:33] [PASSED] Virtual
[11:32:33] [PASSED] DSI
[11:32:33] [PASSED] DPI
[11:32:33] [PASSED] Writeback
[11:32:33] [PASSED] SPI
[11:32:33] [PASSED] USB
[11:32:33] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[11:32:33] =========== [PASSED] drm_connector_dynamic_init ============
[11:32:33] ==== drm_connector_dynamic_register_early (4 subtests) =====
[11:32:33] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[11:32:33] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[11:32:33] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[11:32:33] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[11:32:33] ====== [PASSED] drm_connector_dynamic_register_early =======
[11:32:33] ======= drm_connector_dynamic_register (7 subtests) ========
[11:32:33] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[11:32:33] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[11:32:33] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[11:32:33] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[11:32:33] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[11:32:33] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[11:32:33] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[11:32:33] ========= [PASSED] drm_connector_dynamic_register ==========
[11:32:33] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[11:32:33] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[11:32:33] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[11:32:33] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[11:32:33] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[11:32:33] ========== drm_test_get_tv_mode_from_name_valid  ===========
[11:32:33] [PASSED] NTSC
[11:32:33] [PASSED] NTSC-443
[11:32:33] [PASSED] NTSC-J
[11:32:33] [PASSED] PAL
[11:32:33] [PASSED] PAL-M
[11:32:33] [PASSED] PAL-N
[11:32:33] [PASSED] SECAM
[11:32:33] [PASSED] Mono
[11:32:33] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[11:32:33] [PASSED] drm_test_get_tv_mode_from_name_truncated
[11:32:33] ============ [PASSED] drm_get_tv_mode_from_name ============
[11:32:33] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[11:32:33] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[11:32:33] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[11:32:33] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[11:32:33] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[11:32:33] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[11:32:33] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[11:32:33] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[11:32:33] [PASSED] VIC 96
[11:32:33] [PASSED] VIC 97
[11:32:33] [PASSED] VIC 101
[11:32:33] [PASSED] VIC 102
[11:32:33] [PASSED] VIC 106
[11:32:33] [PASSED] VIC 107
[11:32:33] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[11:32:33] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[11:32:33] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[11:32:33] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[11:32:33] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[11:32:33] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[11:32:33] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[11:32:33] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[11:32:33] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[11:32:33] [PASSED] Automatic
[11:32:33] [PASSED] Full
[11:32:33] [PASSED] Limited 16:235
[11:32:33] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[11:32:33] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[11:32:33] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[11:32:33] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[11:32:33] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[11:32:33] [PASSED] RGB
[11:32:33] [PASSED] YUV 4:2:0
[11:32:33] [PASSED] YUV 4:2:2
[11:32:33] [PASSED] YUV 4:4:4
[11:32:33] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[11:32:33] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[11:32:33] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[11:32:33] ============= drm_damage_helper (21 subtests) ==============
[11:32:33] [PASSED] drm_test_damage_iter_no_damage
[11:32:33] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[11:32:33] [PASSED] drm_test_damage_iter_no_damage_src_moved
[11:32:33] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[11:32:33] [PASSED] drm_test_damage_iter_no_damage_not_visible
[11:32:33] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[11:32:33] [PASSED] drm_test_damage_iter_no_damage_no_fb
[11:32:33] [PASSED] drm_test_damage_iter_simple_damage
[11:32:33] [PASSED] drm_test_damage_iter_single_damage
[11:32:33] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[11:32:33] [PASSED] drm_test_damage_iter_single_damage_outside_src
[11:32:33] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[11:32:33] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[11:32:33] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[11:32:33] [PASSED] drm_test_damage_iter_single_damage_src_moved
[11:32:33] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[11:32:33] [PASSED] drm_test_damage_iter_damage
[11:32:33] [PASSED] drm_test_damage_iter_damage_one_intersect
[11:32:33] [PASSED] drm_test_damage_iter_damage_one_outside
[11:32:33] [PASSED] drm_test_damage_iter_damage_src_moved
[11:32:33] [PASSED] drm_test_damage_iter_damage_not_visible
[11:32:33] ================ [PASSED] drm_damage_helper ================
[11:32:33] ============== drm_dp_mst_helper (3 subtests) ==============
[11:32:33] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[11:32:33] [PASSED] Clock 154000 BPP 30 DSC disabled
[11:32:33] [PASSED] Clock 234000 BPP 30 DSC disabled
[11:32:33] [PASSED] Clock 297000 BPP 24 DSC disabled
[11:32:33] [PASSED] Clock 332880 BPP 24 DSC enabled
[11:32:33] [PASSED] Clock 324540 BPP 24 DSC enabled
[11:32:33] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[11:32:33] ============== drm_test_dp_mst_calc_pbn_div  ===============
[11:32:33] [PASSED] Link rate 2000000 lane count 4
[11:32:33] [PASSED] Link rate 2000000 lane count 2
[11:32:33] [PASSED] Link rate 2000000 lane count 1
[11:32:33] [PASSED] Link rate 1350000 lane count 4
[11:32:33] [PASSED] Link rate 1350000 lane count 2
[11:32:33] [PASSED] Link rate 1350000 lane count 1
[11:32:33] [PASSED] Link rate 1000000 lane count 4
[11:32:33] [PASSED] Link rate 1000000 lane count 2
[11:32:33] [PASSED] Link rate 1000000 lane count 1
[11:32:33] [PASSED] Link rate 810000 lane count 4
[11:32:33] [PASSED] Link rate 810000 lane count 2
[11:32:33] [PASSED] Link rate 810000 lane count 1
[11:32:33] [PASSED] Link rate 540000 lane count 4
[11:32:33] [PASSED] Link rate 540000 lane count 2
[11:32:33] [PASSED] Link rate 540000 lane count 1
[11:32:33] [PASSED] Link rate 270000 lane count 4
[11:32:33] [PASSED] Link rate 270000 lane count 2
[11:32:33] [PASSED] Link rate 270000 lane count 1
[11:32:33] [PASSED] Link rate 162000 lane count 4
[11:32:33] [PASSED] Link rate 162000 lane count 2
[11:32:33] [PASSED] Link rate 162000 lane count 1
[11:32:33] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[11:32:33] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[11:32:33] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[11:32:33] [PASSED] DP_POWER_UP_PHY with port number
[11:32:33] [PASSED] DP_POWER_DOWN_PHY with port number
[11:32:33] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[11:32:33] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[11:32:33] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[11:32:33] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[11:32:33] [PASSED] DP_QUERY_PAYLOAD with port number
[11:32:33] [PASSED] DP_QUERY_PAYLOAD with VCPI
[11:32:33] [PASSED] DP_REMOTE_DPCD_READ with port number
[11:32:33] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[11:32:33] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[11:32:33] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[11:32:33] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[11:32:33] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[11:32:33] [PASSED] DP_REMOTE_I2C_READ with port number
[11:32:33] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[11:32:33] [PASSED] DP_REMOTE_I2C_READ with transactions array
[11:32:33] [PASSED] DP_REMOTE_I2C_WRITE with port number
[11:32:33] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[11:32:33] [PASSED] DP_REMOTE_I2C_WRITE with data array
[11:32:33] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[11:32:33] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[11:32:33] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[11:32:33] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[11:32:33] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[11:32:33] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[11:32:33] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[11:32:33] ================ [PASSED] drm_dp_mst_helper ================
[11:32:33] ================== drm_exec (7 subtests) ===================
[11:32:33] [PASSED] sanitycheck
[11:32:33] [PASSED] test_lock
[11:32:33] [PASSED] test_lock_unlock
[11:32:33] [PASSED] test_duplicates
[11:32:33] [PASSED] test_prepare
[11:32:33] [PASSED] test_prepare_array
[11:32:33] [PASSED] test_multiple_loops
[11:32:33] ==================== [PASSED] drm_exec =====================
[11:32:33] =========== drm_format_helper_test (17 subtests) ===========
[11:32:33] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[11:32:33] [PASSED] single_pixel_source_buffer
[11:32:33] [PASSED] single_pixel_clip_rectangle
[11:32:33] [PASSED] well_known_colors
[11:32:33] [PASSED] destination_pitch
[11:32:33] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[11:32:33] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[11:32:33] [PASSED] single_pixel_source_buffer
[11:32:33] [PASSED] single_pixel_clip_rectangle
[11:32:33] [PASSED] well_known_colors
[11:32:33] [PASSED] destination_pitch
[11:32:33] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[11:32:33] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[11:32:33] [PASSED] single_pixel_source_buffer
[11:32:33] [PASSED] single_pixel_clip_rectangle
[11:32:33] [PASSED] well_known_colors
[11:32:33] [PASSED] destination_pitch
[11:32:33] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[11:32:33] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[11:32:33] [PASSED] single_pixel_source_buffer
[11:32:33] [PASSED] single_pixel_clip_rectangle
[11:32:33] [PASSED] well_known_colors
[11:32:33] [PASSED] destination_pitch
[11:32:33] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[11:32:33] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[11:32:33] [PASSED] single_pixel_source_buffer
[11:32:33] [PASSED] single_pixel_clip_rectangle
[11:32:33] [PASSED] well_known_colors
[11:32:33] [PASSED] destination_pitch
[11:32:33] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[11:32:33] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[11:32:33] [PASSED] single_pixel_source_buffer
[11:32:33] [PASSED] single_pixel_clip_rectangle
[11:32:33] [PASSED] well_known_colors
[11:32:33] [PASSED] destination_pitch
[11:32:33] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[11:32:33] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[11:32:33] [PASSED] single_pixel_source_buffer
[11:32:33] [PASSED] single_pixel_clip_rectangle
[11:32:33] [PASSED] well_known_colors
[11:32:33] [PASSED] destination_pitch
[11:32:33] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[11:32:33] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[11:32:33] [PASSED] single_pixel_source_buffer
[11:32:33] [PASSED] single_pixel_clip_rectangle
[11:32:33] [PASSED] well_known_colors
[11:32:33] [PASSED] destination_pitch
[11:32:33] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[11:32:33] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[11:32:33] [PASSED] single_pixel_source_buffer
[11:32:33] [PASSED] single_pixel_clip_rectangle
[11:32:33] [PASSED] well_known_colors
[11:32:33] [PASSED] destination_pitch
[11:32:33] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[11:32:33] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[11:32:33] [PASSED] single_pixel_source_buffer
[11:32:33] [PASSED] single_pixel_clip_rectangle
[11:32:33] [PASSED] well_known_colors
[11:32:33] [PASSED] destination_pitch
[11:32:33] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[11:32:33] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[11:32:33] [PASSED] single_pixel_source_buffer
[11:32:33] [PASSED] single_pixel_clip_rectangle
[11:32:33] [PASSED] well_known_colors
[11:32:33] [PASSED] destination_pitch
[11:32:33] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[11:32:33] ============== drm_test_fb_xrgb8888_to_mono  ===============
[11:32:33] [PASSED] single_pixel_source_buffer
[11:32:33] [PASSED] single_pixel_clip_rectangle
[11:32:33] [PASSED] well_known_colors
[11:32:33] [PASSED] destination_pitch
[11:32:33] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[11:32:33] ==================== drm_test_fb_swab  =====================
[11:32:33] [PASSED] single_pixel_source_buffer
[11:32:33] [PASSED] single_pixel_clip_rectangle
[11:32:33] [PASSED] well_known_colors
[11:32:33] [PASSED] destination_pitch
[11:32:33] ================ [PASSED] drm_test_fb_swab =================
[11:32:33] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[11:32:33] [PASSED] single_pixel_source_buffer
[11:32:33] [PASSED] single_pixel_clip_rectangle
[11:32:33] [PASSED] well_known_colors
[11:32:33] [PASSED] destination_pitch
[11:32:33] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[11:32:33] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[11:32:33] [PASSED] single_pixel_source_buffer
[11:32:33] [PASSED] single_pixel_clip_rectangle
[11:32:33] [PASSED] well_known_colors
[11:32:33] [PASSED] destination_pitch
[11:32:33] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[11:32:33] ================= drm_test_fb_clip_offset  =================
[11:32:33] [PASSED] pass through
[11:32:33] [PASSED] horizontal offset
[11:32:33] [PASSED] vertical offset
[11:32:33] [PASSED] horizontal and vertical offset
[11:32:33] [PASSED] horizontal offset (custom pitch)
[11:32:33] [PASSED] vertical offset (custom pitch)
[11:32:33] [PASSED] horizontal and vertical offset (custom pitch)
[11:32:33] ============= [PASSED] drm_test_fb_clip_offset =============
[11:32:33] =================== drm_test_fb_memcpy  ====================
[11:32:33] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[11:32:33] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[11:32:33] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[11:32:33] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[11:32:33] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[11:32:33] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[11:32:33] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[11:32:33] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[11:32:33] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[11:32:33] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[11:32:33] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[11:32:33] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[11:32:33] =============== [PASSED] drm_test_fb_memcpy ================
[11:32:33] ============= [PASSED] drm_format_helper_test ==============
[11:32:33] ================= drm_format (18 subtests) =================
[11:32:33] [PASSED] drm_test_format_block_width_invalid
[11:32:33] [PASSED] drm_test_format_block_width_one_plane
[11:32:33] [PASSED] drm_test_format_block_width_two_plane
[11:32:33] [PASSED] drm_test_format_block_width_three_plane
[11:32:33] [PASSED] drm_test_format_block_width_tiled
[11:32:33] [PASSED] drm_test_format_block_height_invalid
[11:32:33] [PASSED] drm_test_format_block_height_one_plane
[11:32:33] [PASSED] drm_test_format_block_height_two_plane
[11:32:33] [PASSED] drm_test_format_block_height_three_plane
[11:32:33] [PASSED] drm_test_format_block_height_tiled
[11:32:33] [PASSED] drm_test_format_min_pitch_invalid
[11:32:33] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[11:32:33] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[11:32:33] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[11:32:33] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[11:32:33] [PASSED] drm_test_format_min_pitch_two_plane
[11:32:33] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[11:32:33] [PASSED] drm_test_format_min_pitch_tiled
[11:32:33] =================== [PASSED] drm_format ====================
[11:32:33] ============== drm_framebuffer (10 subtests) ===============
[11:32:33] ========== drm_test_framebuffer_check_src_coords  ==========
[11:32:33] [PASSED] Success: source fits into fb
[11:32:33] [PASSED] Fail: overflowing fb with x-axis coordinate
[11:32:33] [PASSED] Fail: overflowing fb with y-axis coordinate
[11:32:33] [PASSED] Fail: overflowing fb with source width
[11:32:33] [PASSED] Fail: overflowing fb with source height
[11:32:33] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[11:32:33] [PASSED] drm_test_framebuffer_cleanup
[11:32:33] =============== drm_test_framebuffer_create  ===============
[11:32:33] [PASSED] ABGR8888 normal sizes
[11:32:33] [PASSED] ABGR8888 max sizes
[11:32:33] [PASSED] ABGR8888 pitch greater than min required
[11:32:33] [PASSED] ABGR8888 pitch less than min required
[11:32:33] [PASSED] ABGR8888 Invalid width
[11:32:33] [PASSED] ABGR8888 Invalid buffer handle
[11:32:33] [PASSED] No pixel format
[11:32:33] [PASSED] ABGR8888 Width 0
[11:32:33] [PASSED] ABGR8888 Height 0
[11:32:33] [PASSED] ABGR8888 Out of bound height * pitch combination
[11:32:33] [PASSED] ABGR8888 Large buffer offset
[11:32:33] [PASSED] ABGR8888 Buffer offset for inexistent plane
[11:32:33] [PASSED] ABGR8888 Invalid flag
[11:32:33] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[11:32:33] [PASSED] ABGR8888 Valid buffer modifier
[11:32:33] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[11:32:33] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[11:32:33] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[11:32:33] [PASSED] NV12 Normal sizes
[11:32:33] [PASSED] NV12 Max sizes
[11:32:33] [PASSED] NV12 Invalid pitch
[11:32:33] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[11:32:33] [PASSED] NV12 different  modifier per-plane
[11:32:33] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[11:32:33] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[11:32:33] [PASSED] NV12 Modifier for inexistent plane
[11:32:33] [PASSED] NV12 Handle for inexistent plane
[11:32:33] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[11:32:33] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[11:32:33] [PASSED] YVU420 Normal sizes
[11:32:33] [PASSED] YVU420 Max sizes
[11:32:33] [PASSED] YVU420 Invalid pitch
[11:32:33] [PASSED] YVU420 Different pitches
[11:32:33] [PASSED] YVU420 Different buffer offsets/pitches
[11:32:33] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[11:32:33] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[11:32:33] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[11:32:33] [PASSED] YVU420 Valid modifier
[11:32:33] [PASSED] YVU420 Different modifiers per plane
[11:32:33] [PASSED] YVU420 Modifier for inexistent plane
[11:32:33] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[11:32:33] [PASSED] X0L2 Normal sizes
[11:32:33] [PASSED] X0L2 Max sizes
[11:32:33] [PASSED] X0L2 Invalid pitch
[11:32:33] [PASSED] X0L2 Pitch greater than minimum required
[11:32:33] [PASSED] X0L2 Handle for inexistent plane
[11:32:33] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[11:32:33] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[11:32:33] [PASSED] X0L2 Valid modifier
[11:32:33] [PASSED] X0L2 Modifier for inexistent plane
[11:32:33] =========== [PASSED] drm_test_framebuffer_create ===========
[11:32:33] [PASSED] drm_test_framebuffer_free
[11:32:33] [PASSED] drm_test_framebuffer_init
[11:32:33] [PASSED] drm_test_framebuffer_init_bad_format
[11:32:33] [PASSED] drm_test_framebuffer_init_dev_mismatch
[11:32:33] [PASSED] drm_test_framebuffer_lookup
[11:32:33] [PASSED] drm_test_framebuffer_lookup_inexistent
[11:32:33] [PASSED] drm_test_framebuffer_modifiers_not_supported
[11:32:33] ================= [PASSED] drm_framebuffer =================
[11:32:33] ================ drm_gem_shmem (8 subtests) ================
[11:32:33] [PASSED] drm_gem_shmem_test_obj_create
[11:32:33] [PASSED] drm_gem_shmem_test_obj_create_private
[11:32:33] [PASSED] drm_gem_shmem_test_pin_pages
[11:32:33] [PASSED] drm_gem_shmem_test_vmap
[11:32:33] [PASSED] drm_gem_shmem_test_get_sg_table
[11:32:33] [PASSED] drm_gem_shmem_test_get_pages_sgt
[11:32:33] [PASSED] drm_gem_shmem_test_madvise
[11:32:33] [PASSED] drm_gem_shmem_test_purge
[11:32:33] ================== [PASSED] drm_gem_shmem ==================
[11:32:33] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[11:32:33] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[11:32:33] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[11:32:33] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[11:32:33] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[11:32:33] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[11:32:33] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[11:32:33] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[11:32:33] [PASSED] Automatic
[11:32:33] [PASSED] Full
[11:32:33] [PASSED] Limited 16:235
[11:32:33] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[11:32:33] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[11:32:33] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[11:32:33] [PASSED] drm_test_check_disable_connector
[11:32:33] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[11:32:33] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[11:32:33] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[11:32:33] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[11:32:33] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[11:32:33] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[11:32:33] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[11:32:33] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[11:32:33] [PASSED] drm_test_check_output_bpc_dvi
[11:32:33] [PASSED] drm_test_check_output_bpc_format_vic_1
[11:32:33] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[11:32:33] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[11:32:33] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[11:32:33] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[11:32:33] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[11:32:33] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[11:32:33] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[11:32:33] ============ drm_test_check_hdmi_color_format  =============
[11:32:33] [PASSED] AUTO -> RGB
[11:32:33] [PASSED] YCBCR422 -> YUV422
[11:32:33] [PASSED] YCBCR420 -> YUV420
[11:32:33] [PASSED] YCBCR444 -> YUV444
[11:32:33] [PASSED] RGB -> RGB
[11:32:33] ======== [PASSED] drm_test_check_hdmi_color_format =========
[11:32:33] ======== drm_test_check_hdmi_color_format_420_only  ========
[11:32:33] [PASSED] RGB should fail
[11:32:33] [PASSED] YUV444 should fail
[11:32:33] [PASSED] YUV422 should fail
[11:32:33] [PASSED] YUV420 should work
[11:32:33] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[11:32:33] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[11:32:33] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[11:32:33] [PASSED] drm_test_check_broadcast_rgb_value
[11:32:33] [PASSED] drm_test_check_bpc_8_value
[11:32:33] [PASSED] drm_test_check_bpc_10_value
[11:32:33] [PASSED] drm_test_check_bpc_12_value
[11:32:33] [PASSED] drm_test_check_format_value
[11:32:33] [PASSED] drm_test_check_tmds_char_value
[11:32:33] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[11:32:33] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[11:32:33] [PASSED] drm_test_check_mode_valid
[11:32:33] [PASSED] drm_test_check_mode_valid_reject
[11:32:33] [PASSED] drm_test_check_mode_valid_reject_rate
[11:32:33] [PASSED] drm_test_check_mode_valid_reject_max_clock
[11:32:33] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[11:32:33] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[11:32:33] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[11:32:33] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[11:32:33] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[11:32:33] [PASSED] drm_test_check_infoframes
[11:32:33] [PASSED] drm_test_check_reject_avi_infoframe
[11:32:33] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[11:32:33] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[11:32:33] [PASSED] drm_test_check_reject_audio_infoframe
[11:32:33] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[11:32:33] ================= drm_managed (2 subtests) =================
[11:32:33] [PASSED] drm_test_managed_release_action
[11:32:33] [PASSED] drm_test_managed_run_action
[11:32:33] =================== [PASSED] drm_managed ===================
[11:32:33] =================== drm_mm (6 subtests) ====================
[11:32:33] [PASSED] drm_test_mm_init
[11:32:33] [PASSED] drm_test_mm_debug
[11:32:33] [PASSED] drm_test_mm_align32
[11:32:33] [PASSED] drm_test_mm_align64
[11:32:33] [PASSED] drm_test_mm_lowest
[11:32:33] [PASSED] drm_test_mm_highest
[11:32:33] ===================== [PASSED] drm_mm ======================
[11:32:33] ============= drm_modes_analog_tv (5 subtests) =============
[11:32:33] [PASSED] drm_test_modes_analog_tv_mono_576i
[11:32:33] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[11:32:33] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[11:32:33] [PASSED] drm_test_modes_analog_tv_pal_576i
[11:32:33] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[11:32:33] =============== [PASSED] drm_modes_analog_tv ===============
[11:32:33] ============== drm_plane_helper (2 subtests) ===============
[11:32:33] =============== drm_test_check_plane_state  ================
[11:32:33] [PASSED] clipping_simple
[11:32:33] [PASSED] clipping_rotate_reflect
[11:32:33] [PASSED] positioning_simple
[11:32:33] [PASSED] upscaling
[11:32:33] [PASSED] downscaling
[11:32:33] [PASSED] rounding1
[11:32:33] [PASSED] rounding2
[11:32:33] [PASSED] rounding3
[11:32:33] [PASSED] rounding4
[11:32:33] =========== [PASSED] drm_test_check_plane_state ============
[11:32:33] =========== drm_test_check_invalid_plane_state  ============
[11:32:33] [PASSED] positioning_invalid
[11:32:33] [PASSED] upscaling_invalid
[11:32:33] [PASSED] downscaling_invalid
[11:32:33] ======= [PASSED] drm_test_check_invalid_plane_state ========
[11:32:33] ================ [PASSED] drm_plane_helper =================
[11:32:33] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[11:32:33] ====== drm_test_connector_helper_tv_get_modes_check  =======
[11:32:33] [PASSED] None
[11:32:33] [PASSED] PAL
[11:32:33] [PASSED] NTSC
[11:32:33] [PASSED] Both, NTSC Default
[11:32:33] [PASSED] Both, PAL Default
[11:32:33] [PASSED] Both, NTSC Default, with PAL on command-line
[11:32:33] [PASSED] Both, PAL Default, with NTSC on command-line
[11:32:33] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[11:32:33] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[11:32:33] ================== drm_rect (9 subtests) ===================
[11:32:33] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[11:32:33] [PASSED] drm_test_rect_clip_scaled_not_clipped
[11:32:33] [PASSED] drm_test_rect_clip_scaled_clipped
[11:32:33] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[11:32:33] ================= drm_test_rect_intersect  =================
[11:32:33] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[11:32:33] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[11:32:33] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[11:32:33] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[11:32:33] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[11:32:33] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[11:32:33] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[11:32:33] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[11:32:33] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[11:32:33] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[11:32:33] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[11:32:33] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[11:32:33] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[11:32:33] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[11:32:33] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[11:32:33] ============= [PASSED] drm_test_rect_intersect =============
[11:32:33] ================ drm_test_rect_calc_hscale  ================
[11:32:33] [PASSED] normal use
[11:32:33] [PASSED] out of max range
[11:32:33] [PASSED] out of min range
[11:32:33] [PASSED] zero dst
[11:32:33] [PASSED] negative src
[11:32:33] [PASSED] negative dst
[11:32:33] ============ [PASSED] drm_test_rect_calc_hscale ============
[11:32:33] ================ drm_test_rect_calc_vscale  ================
[11:32:33] [PASSED] normal use
[11:32:33] [PASSED] out of max range
[11:32:33] [PASSED] out of min range
[11:32:33] [PASSED] zero dst
[11:32:33] [PASSED] negative src
[11:32:33] [PASSED] negative dst
[11:32:33] ============ [PASSED] drm_test_rect_calc_vscale ============
[11:32:33] ================== drm_test_rect_rotate  ===================
[11:32:33] [PASSED] reflect-x
[11:32:33] [PASSED] reflect-y
[11:32:33] [PASSED] rotate-0
[11:32:33] [PASSED] rotate-90
[11:32:33] [PASSED] rotate-180
[11:32:33] [PASSED] rotate-270
[11:32:33] ============== [PASSED] drm_test_rect_rotate ===============
[11:32:33] ================ drm_test_rect_rotate_inv  =================
[11:32:33] [PASSED] reflect-x
[11:32:33] [PASSED] reflect-y
[11:32:33] [PASSED] rotate-0
[11:32:33] [PASSED] rotate-90
[11:32:33] [PASSED] rotate-180
[11:32:33] [PASSED] rotate-270
[11:32:33] ============ [PASSED] drm_test_rect_rotate_inv =============
[11:32:33] ==================== [PASSED] drm_rect =====================
[11:32:33] ============ drm_sysfb_modeset_test (1 subtest) ============
[11:32:33] ============ drm_test_sysfb_build_fourcc_list  =============
[11:32:33] [PASSED] no native formats
[11:32:33] [PASSED] XRGB8888 as native format
[11:32:33] [PASSED] remove duplicates
[11:32:33] [PASSED] convert alpha formats
[11:32:33] [PASSED] random formats
[11:32:33] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[11:32:33] ============= [PASSED] drm_sysfb_modeset_test ==============
[11:32:33] ================== drm_fixp (2 subtests) ===================
[11:32:33] [PASSED] drm_test_int2fixp
[11:32:33] [PASSED] drm_test_sm2fixp
[11:32:33] ==================== [PASSED] drm_fixp =====================
[11:32:33] ============================================================
[11:32:33] Testing complete. Ran 637 tests: passed: 637
[11:32:33] Elapsed time: 26.582s total, 1.754s configuring, 24.663s building, 0.137s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[11:32:33] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:32:35] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:32:45] Starting KUnit Kernel (1/1)...
[11:32:45] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:32:45] ================= ttm_device (5 subtests) ==================
[11:32:45] [PASSED] ttm_device_init_basic
[11:32:45] [PASSED] ttm_device_init_multiple
[11:32:45] [PASSED] ttm_device_fini_basic
[11:32:45] [PASSED] ttm_device_init_no_vma_man
[11:32:45] ================== ttm_device_init_pools  ==================
[11:32:45] [PASSED] No DMA allocations, no DMA32 required
[11:32:45] [PASSED] DMA allocations, DMA32 required
[11:32:45] [PASSED] No DMA allocations, DMA32 required
[11:32:45] [PASSED] DMA allocations, no DMA32 required
[11:32:45] ============== [PASSED] ttm_device_init_pools ==============
[11:32:45] =================== [PASSED] ttm_device ====================
[11:32:45] ================== ttm_pool (8 subtests) ===================
[11:32:45] ================== ttm_pool_alloc_basic  ===================
[11:32:45] [PASSED] One page
[11:32:45] [PASSED] More than one page
[11:32:45] [PASSED] Above the allocation limit
[11:32:45] [PASSED] One page, with coherent DMA mappings enabled
[11:32:45] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[11:32:45] ============== [PASSED] ttm_pool_alloc_basic ===============
[11:32:45] ============== ttm_pool_alloc_basic_dma_addr  ==============
[11:32:45] [PASSED] One page
[11:32:45] [PASSED] More than one page
[11:32:45] [PASSED] Above the allocation limit
[11:32:45] [PASSED] One page, with coherent DMA mappings enabled
[11:32:45] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[11:32:45] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[11:32:45] [PASSED] ttm_pool_alloc_order_caching_match
[11:32:45] [PASSED] ttm_pool_alloc_caching_mismatch
[11:32:45] [PASSED] ttm_pool_alloc_order_mismatch
[11:32:45] [PASSED] ttm_pool_free_dma_alloc
[11:32:45] [PASSED] ttm_pool_free_no_dma_alloc
[11:32:45] [PASSED] ttm_pool_fini_basic
[11:32:45] ==================== [PASSED] ttm_pool =====================
[11:32:45] ================ ttm_resource (8 subtests) =================
[11:32:45] ================= ttm_resource_init_basic  =================
[11:32:45] [PASSED] Init resource in TTM_PL_SYSTEM
[11:32:45] [PASSED] Init resource in TTM_PL_VRAM
[11:32:45] [PASSED] Init resource in a private placement
[11:32:45] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[11:32:45] ============= [PASSED] ttm_resource_init_basic =============
[11:32:45] [PASSED] ttm_resource_init_pinned
[11:32:45] [PASSED] ttm_resource_fini_basic
[11:32:45] [PASSED] ttm_resource_manager_init_basic
[11:32:45] [PASSED] ttm_resource_manager_usage_basic
[11:32:45] [PASSED] ttm_resource_manager_set_used_basic
[11:32:45] [PASSED] ttm_sys_man_alloc_basic
[11:32:45] [PASSED] ttm_sys_man_free_basic
[11:32:45] ================== [PASSED] ttm_resource ===================
[11:32:45] =================== ttm_tt (15 subtests) ===================
[11:32:45] ==================== ttm_tt_init_basic  ====================
[11:32:45] [PASSED] Page-aligned size
[11:32:45] [PASSED] Extra pages requested
[11:32:45] ================ [PASSED] ttm_tt_init_basic ================
[11:32:45] [PASSED] ttm_tt_init_misaligned
[11:32:45] [PASSED] ttm_tt_fini_basic
[11:32:45] [PASSED] ttm_tt_fini_sg
[11:32:45] [PASSED] ttm_tt_fini_shmem
[11:32:45] [PASSED] ttm_tt_create_basic
[11:32:45] [PASSED] ttm_tt_create_invalid_bo_type
[11:32:45] [PASSED] ttm_tt_create_ttm_exists
[11:32:45] [PASSED] ttm_tt_create_failed
[11:32:45] [PASSED] ttm_tt_destroy_basic
[11:32:45] [PASSED] ttm_tt_populate_null_ttm
[11:32:45] [PASSED] ttm_tt_populate_populated_ttm
[11:32:45] [PASSED] ttm_tt_unpopulate_basic
[11:32:45] [PASSED] ttm_tt_unpopulate_empty_ttm
[11:32:45] [PASSED] ttm_tt_swapin_basic
[11:32:45] ===================== [PASSED] ttm_tt ======================
[11:32:45] =================== ttm_bo (14 subtests) ===================
[11:32:45] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[11:32:45] [PASSED] Cannot be interrupted and sleeps
[11:32:45] [PASSED] Cannot be interrupted, locks straight away
[11:32:45] [PASSED] Can be interrupted, sleeps
[11:32:45] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[11:32:45] [PASSED] ttm_bo_reserve_locked_no_sleep
[11:32:45] [PASSED] ttm_bo_reserve_no_wait_ticket
[11:32:45] [PASSED] ttm_bo_reserve_double_resv
[11:32:45] [PASSED] ttm_bo_reserve_interrupted
[11:32:45] [PASSED] ttm_bo_reserve_deadlock
[11:32:45] [PASSED] ttm_bo_unreserve_basic
[11:32:45] [PASSED] ttm_bo_unreserve_pinned
[11:32:45] [PASSED] ttm_bo_unreserve_bulk
[11:32:45] [PASSED] ttm_bo_fini_basic
[11:32:45] [PASSED] ttm_bo_fini_shared_resv
[11:32:45] [PASSED] ttm_bo_pin_basic
[11:32:45] [PASSED] ttm_bo_pin_unpin_resource
[11:32:45] [PASSED] ttm_bo_multiple_pin_one_unpin
[11:32:45] ===================== [PASSED] ttm_bo ======================
[11:32:45] ============== ttm_bo_validate (22 subtests) ===============
[11:32:45] ============== ttm_bo_init_reserved_sys_man  ===============
[11:32:45] [PASSED] Buffer object for userspace
[11:32:45] [PASSED] Kernel buffer object
[11:32:45] [PASSED] Shared buffer object
[11:32:45] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[11:32:45] ============== ttm_bo_init_reserved_mock_man  ==============
[11:32:45] [PASSED] Buffer object for userspace
[11:32:45] [PASSED] Kernel buffer object
[11:32:45] [PASSED] Shared buffer object
[11:32:45] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[11:32:45] [PASSED] ttm_bo_init_reserved_resv
[11:32:45] ================== ttm_bo_validate_basic  ==================
[11:32:45] [PASSED] Buffer object for userspace
[11:32:45] [PASSED] Kernel buffer object
[11:32:45] [PASSED] Shared buffer object
[11:32:45] ============== [PASSED] ttm_bo_validate_basic ==============
[11:32:45] [PASSED] ttm_bo_validate_invalid_placement
[11:32:45] ============= ttm_bo_validate_same_placement  ==============
[11:32:45] [PASSED] System manager
[11:32:45] [PASSED] VRAM manager
[11:32:45] ========= [PASSED] ttm_bo_validate_same_placement ==========
[11:32:45] [PASSED] ttm_bo_validate_failed_alloc
[11:32:45] [PASSED] ttm_bo_validate_pinned
[11:32:45] [PASSED] ttm_bo_validate_busy_placement
[11:32:45] ================ ttm_bo_validate_multihop  =================
[11:32:45] [PASSED] Buffer object for userspace
[11:32:45] [PASSED] Kernel buffer object
[11:32:45] [PASSED] Shared buffer object
[11:32:45] ============ [PASSED] ttm_bo_validate_multihop =============
[11:32:45] ========== ttm_bo_validate_no_placement_signaled  ==========
[11:32:45] [PASSED] Buffer object in system domain, no page vector
[11:32:45] [PASSED] Buffer object in system domain with an existing page vector
[11:32:45] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[11:32:45] ======== ttm_bo_validate_no_placement_not_signaled  ========
[11:32:45] [PASSED] Buffer object for userspace
[11:32:45] [PASSED] Kernel buffer object
[11:32:45] [PASSED] Shared buffer object
[11:32:45] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[11:32:45] [PASSED] ttm_bo_validate_move_fence_signaled
[11:32:45] ========= ttm_bo_validate_move_fence_not_signaled  =========
[11:32:45] [PASSED] Waits for GPU
[11:32:45] [PASSED] Tries to lock straight away
[11:32:45] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[11:32:45] [PASSED] ttm_bo_validate_swapout
[11:32:45] [PASSED] ttm_bo_validate_happy_evict
[11:32:45] [PASSED] ttm_bo_validate_all_pinned_evict
[11:32:45] [PASSED] ttm_bo_validate_allowed_only_evict
[11:32:45] [PASSED] ttm_bo_validate_deleted_evict
[11:32:45] [PASSED] ttm_bo_validate_busy_domain_evict
[11:32:45] [PASSED] ttm_bo_validate_evict_gutting
[11:32:45] [PASSED] ttm_bo_validate_recrusive_evict
[11:32:45] ================= [PASSED] ttm_bo_validate =================
[11:32:45] ============================================================
[11:32:45] Testing complete. Ran 102 tests: passed: 102
[11:32:45] Elapsed time: 11.978s total, 1.782s configuring, 9.981s building, 0.185s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[11:32:45] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:32:47] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:32:56] Starting KUnit Kernel (1/1)...
[11:32:56] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:32:56] =============== dma-buf-fence (12 subtests) ================
[11:32:56] [PASSED] test_sanitycheck
[11:32:56] [PASSED] test_signaling
[11:32:56] [PASSED] test_add_callback
[11:32:56] [PASSED] test_late_add_callback
[11:32:56] [PASSED] test_rm_callback
[11:32:56] [PASSED] test_late_rm_callback
[11:32:56] [PASSED] test_status
[11:32:56] [PASSED] test_error
[11:32:56] [PASSED] test_wait
[11:32:56] [PASSED] test_wait_timeout
[11:32:56] [PASSED] test_stub
[11:32:56] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[11:32:56] ================== [PASSED] dma-buf-fence ==================
[11:32:56] ============ dma-buf-fence-chain (11 subtests) =============
[11:32:56] [PASSED] test_sanitycheck
[11:32:56] [PASSED] test_find_seqno
[11:32:56] [PASSED] test_find_signaled
[11:32:56] [PASSED] test_find_out_of_order
[11:33:01] [PASSED] test_find_gap
[11:33:01] [PASSED] test_find_race
[11:33:01] [PASSED] test_signal_forward
[11:33:01] [PASSED] test_signal_backward
[11:33:01] [PASSED] test_wait_forward
[11:33:01] [PASSED] test_wait_backward
[11:33:01] [PASSED] test_wait_random
[11:33:01] =============== [PASSED] dma-buf-fence-chain ===============
[11:33:01] ============ dma-buf-fence-unwrap (10 subtests) ============
[11:33:01] [PASSED] test_sanitycheck
[11:33:01] [PASSED] test_unwrap_array
[11:33:01] [PASSED] test_unwrap_chain
[11:33:01] [PASSED] test_unwrap_chain_array
[11:33:01] [PASSED] test_unwrap_merge
[11:33:01] [PASSED] test_unwrap_merge_duplicate
[11:33:01] [PASSED] test_unwrap_merge_seqno
[11:33:01] [PASSED] test_unwrap_merge_order
[11:33:01] [PASSED] test_unwrap_merge_complex
[11:33:01] [PASSED] test_unwrap_merge_complex_seqno
[11:33:01] ============== [PASSED] dma-buf-fence-unwrap ===============
[11:33:01] ================ dma-buf-resv (5 subtests) =================
[11:33:01] [PASSED] test_sanitycheck
[11:33:01] ===================== test_signaling  ======================
[11:33:01] [PASSED] kernel
[11:33:01] [PASSED] write
[11:33:01] [PASSED] read
[11:33:01] [PASSED] bookkeep
[11:33:01] ================= [PASSED] test_signaling ==================
[11:33:01] ====================== test_for_each  ======================
[11:33:01] [PASSED] kernel
[11:33:01] [PASSED] write
[11:33:01] [PASSED] read
[11:33:01] [PASSED] bookkeep
[11:33:01] ================== [PASSED] test_for_each ==================
[11:33:01] ================= test_for_each_unlocked  ==================
[11:33:01] [PASSED] kernel
[11:33:01] [PASSED] write
[11:33:01] [PASSED] read
[11:33:01] [PASSED] bookkeep
[11:33:01] ============= [PASSED] test_for_each_unlocked ==============
[11:33:01] ===================== test_get_fences  =====================
[11:33:01] [PASSED] kernel
[11:33:01] [PASSED] write
[11:33:01] [PASSED] read
[11:33:01] [PASSED] bookkeep
[11:33:01] ================= [PASSED] test_get_fences =================
[11:33:01] ================== [PASSED] dma-buf-resv ===================
[11:33:01] ============================================================
[11:33:01] Testing complete. Ran 50 tests: passed: 49, skipped: 1
[11:33:01] Elapsed time: 15.862s total, 1.853s configuring, 8.687s building, 5.282s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel



^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [PATCH v10 08/10] drm/xe: Introduce temporary device wedging
  2026-08-21 11:23 ` [PATCH v10 08/10] drm/xe: Introduce temporary device wedging Raag Jadav
@ 2026-08-21 11:37   ` sashiko-bot
  0 siblings, 0 replies; 22+ messages in thread
From: sashiko-bot @ 2026-08-21 11:37 UTC (permalink / raw)
  To: Raag Jadav; +Cc: intel-xe

Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
- [Critical] Sleeping in atomic context due to `mutex_lock()` in `xe_device_declare_wedged()`.
- [High] Unprotected state modification and double-increment of `wedged.ref` in `prepare_device_for_reset()`.
- [High] Temporary wedged state from PCI error recovery leaks PM reference and triggers teardown assert if recovery aborts.
--

--- Patch [8]: [PATCH v10 08/10] drm/xe: Introduce temporary device wedging ---
commit 102094142d418b8de53397ac8e1fbe1c7ca46ae9
Author: Raag Jadav <raag.jadav@intel.com>

drm/xe: Introduce temporary device wedging

This commit converts the boolean wedged flag to a reference count to allow
temporary wedged states. It also introduces a perm flag for permanent
wedging and a mutex to protect the wedged state transitions.

> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> --- a/drivers/gpu/drm/xe/xe_device.c
> +++ b/drivers/gpu/drm/xe/xe_device.c
[ ... ]
> @@ -1476,36 +1526,40 @@ void xe_device_declare_wedged(struct xe_device *xe)
>  		return;
>  	}
>  
> -	if (!atomic_xchg(&xe->wedged.flag, 1)) {
> -		xe->needs_flr_on_fini = true;
> -		xe_pm_runtime_get_noresume(xe);
> +	mutex_lock(&xe->wedged.lock);

[Severity: Critical]
Can this cause a sleeping in atomic context panic?

xe_device_declare_wedged() can be called from hard IRQ contexts, for
example:

xe_mert_irq_handler()
  mert_handle_cat_error()
    xe_device_declare_wedged()

Since mutex_lock() can sleep, taking it here from an interrupt handler
would lead to a scheduling while atomic regression.

[ ... ]
> diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
> --- a/drivers/gpu/drm/xe/xe_pci_error.c
> +++ b/drivers/gpu/drm/xe/xe_pci_error.c
> @@ -25,8 +25,10 @@ static void prepare_device_for_reset(struct pci_dev *pdev)
>  	 * xe_device_wedged_fini() releases runtime pm if wedged flag is set, so acquire a runtime
>  	 * pm reference to avoid underflow.
>  	 */
> -	if (!atomic_xchg(&xe->wedged.flag, 1))
> -		xe_pm_runtime_get_noresume(xe);
> +	xe_device_wedged_get(xe);
> +
> +	/* TODO: We shouldn't be doing such ugly hacks, reuse FLR helpers and drop this. */
> +	xe->wedged.perm = true;

[Severity: High]
Could this leak a reference and cause an assertion failure during device
teardown if the device is already wedged?

Unlike the old atomic_xchg code which checked if the device was already
wedged, xe_device_wedged_get() increments the reference count unconditionally.
If the device is already wedged from a previous event, the reference count
will be incremented twice.

During teardown, xe_device_wedged_fini() only drops a single reference
when wedged.perm is true:

drivers/gpu/drm/xe/xe_device.c:xe_device_wedged_fini() {
    if (xe->wedged.perm)
        xe_device_wedged_put(xe);

    xe_assert(xe, !xe_device_wedged(xe));
}

Will the second reference be left behind and trip the xe_assert() check?
Also, should the state modification here be protected by xe->wedged.lock?

[ ... ]
> @@ -126,7 +128,7 @@ static pci_ers_result_t xe_pci_error_slot_reset(struct pci_dev *pdev)
>  	xe = pdev_to_xe_device(pdev);
>  
>  	/* Wedge the device to prevent I/O operations till the resume callback */
> -	atomic_set(&xe->wedged.flag, 1);
> +	xe_device_wedged_get(xe);

[Severity: High]
If the PCI error recovery aborts or fails here, and the device is subsequently
unbound, will this leak the runtime PM reference?

This code acquires a temporary wedged reference but does not set
xe->wedged.perm to true. If the expected xe_pci_error_resume() is never
called due to a recovery failure, xe_device_wedged_fini() will see
xe->wedged.perm as false and skip dropping the reference, which would
ultimately trigger the xe_assert(xe, !xe_device_wedged(xe)) on teardown.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260821112436.545405-1-raag.jadav@intel.com?part=8

^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [PATCH v10 09/10] drm/xe/pci: Introduce PCIe Function Level Reset
  2026-08-21 11:23 ` [PATCH v10 09/10] drm/xe/pci: Introduce PCIe Function Level Reset Raag Jadav
@ 2026-08-21 11:39   ` sashiko-bot
  0 siblings, 0 replies; 22+ messages in thread
From: sashiko-bot @ 2026-08-21 11:39 UTC (permalink / raw)
  To: Raag Jadav; +Cc: intel-xe

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Missing hardware quiescence before PCI reset leads to potential system panics.
--

--- Patch [9]: [PATCH v10 09/10] drm/xe/pci: Introduce PCIe Function Level Reset ---
commit f3c8299b36fc1f6ea55ecfbcd781c310e60e62ab
Author: Raag Jadav <raag.jadav@intel.com>

drm/xe/pci: Introduce PCIe Function Level Reset

This commit introduces PCIe Function Level Reset (FLR) support which 
re-initializes hardware state without the need for reloading the driver 
from userspace.

> diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
> index 48466d726eae6..81c4e55fae8f0 100644
> --- a/drivers/gpu/drm/xe/xe_pci_error.c
> +++ b/drivers/gpu/drm/xe/xe_pci_error.c

> [ ... ]

> @@ -142,9 +189,90 @@ static void xe_pci_error_resume(struct pci_dev *pdev)
> +static void xe_pci_reset_prepare(struct pci_dev *pdev)
> +{
> +	struct xe_device *xe = pdev_to_xe_device(pdev);
> +	int err;
> +
> +	err = xe_pci_reset_skip(xe);
> +	if (err) {
> +		xe_err(xe, "PCIe FLR not supported\n");
> +		goto wedge;
> +	}
> +
> +	err = xe_device_wedged(xe);
> +	if (err)
> +		xe_err(xe, "PCIe FLR failed, device in unexpected state\n");
> +
> +wedge:
> +	/* Wedge the device to prevent userspace access but don't send the event yet */
> +	xe_device_wedged_get(xe);
> +	if (err)
> +		return;

[Severity: High]
Since xe_pci_reset_prepare() is a void callback, the PCI core will proceed
with the physical reset unconditionally even if we return early here. 

If xe_pci_reset_skip(xe) returns true, we jump to the wedge label with err
evaluating to true. This causes the function to return immediately after
xe_device_wedged_get(xe).

Does this skip the hardware quiescence (xe_device_suspend) while the PCI
core still performs the physical reset? 

If a user triggers a sysfs reset on a device that skips FLR, could this
leave VRAM mapped and DMA active during the reset, resulting in PCIe
Unsupported Requests and fatal AER faults that panic the system?

> +
> +	/*
> +	 * The hardware could be in corrupted state and access unreliable, but we try to
> +	 * update data structures and cleanup any pending work to avoid side effects during
> +	 * PCIe FLR. This will be similar to system suspend flow but without eviction.
> +	 */
> +	err = xe_device_suspend(xe, true);
> +	if (err) {
> +		xe_err(xe, "Failed to prepare for PCIe FLR\n");
> +		return;
> +	}
> +
> +	xe->flr_prepared = true;
> +	xe_info(xe, "Prepared for PCIe FLR\n");
> +}

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260821112436.545405-1-raag.jadav@intel.com?part=9

^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [PATCH v10 06/10] drm/xe/migrate: Introduce xe_migrate_reinit()
  2026-08-21 11:23 ` [PATCH v10 06/10] drm/xe/migrate: Introduce xe_migrate_reinit() Raag Jadav
@ 2026-08-21 11:39   ` sashiko-bot
  0 siblings, 0 replies; 22+ messages in thread
From: sashiko-bot @ 2026-08-21 11:39 UTC (permalink / raw)
  To: Raag Jadav; +Cc: intel-xe

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] xe_migrate_reinit() fails to clear the VRAM-backed page table BOs (m->pt_bo and the root page table) after a PCIe FLR, leaving garbage PDEs/PTEs.
--

--- Patch [6]: [PATCH v10 06/10] drm/xe/migrate: Introduce xe_migrate_reinit() ---
commit 897712e0d4905c2317c45ed76acb56c7362ca8d9
Author: Raag Jadav <raag.jadav@intel.com>

drm/xe/migrate: Introduce xe_migrate_reinit()

This commit introduces the xe_migrate_reinit() helper to re-initialize the
migrate context after a PCIe FLR. Since the migrate exec queue and pt_bo live
on VRAM, their contents are lost during FLR and require re-initialization.

> diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
> index 75b83687f1b5d..eac91a4b78ed9 100644
> --- a/drivers/gpu/drm/xe/xe_migrate.c
> +++ b/drivers/gpu/drm/xe/xe_migrate.c

[ ... ]

> @@ -454,6 +454,18 @@ static int xe_migrate_lock_prepare_vm(struct xe_tile *tile, struct xe_migrate *m
>  	return err;
>  }
>  
> +/**
> + * xe_migrate_reinit() - Re-initialize a migrate context
> + * @m: The migration context
> + *
> + * Returns: 0 on success, negative error code otherwise.
> + */
> +int xe_migrate_reinit(struct xe_migrate *m)
> +{
> +	xe_migrate_prepare_vm(m->tile, m, m->q->vm, NULL);
> +	return xe_exec_queue_reinit(m->q);
> +}

[Severity: High]
Does this code leave garbage PDEs/PTEs in the VRAM-backed page table BOs
after a PCIe FLR?

Since the FLR garbles VRAM contents, and xe_migrate_prepare_vm() only writes
specific PDEs and PTEs rather than zeroing out the entire page table space,
the unwritten regions in m->pt_bo and the root page table will retain VRAM
garbage.

Could this cause the GPU page walker to speculatively fetch garbage PDEs/PTEs
(which may randomly have the Valid bit set), leading to unauthorized memory
accesses, fatal page faults, or GPU hangs?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260821112436.545405-1-raag.jadav@intel.com?part=6

^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [PATCH v10 01/10] drm/xe/uc_fw: Allow re-initializing firmware
  2026-08-21 11:23 ` [PATCH v10 01/10] drm/xe/uc_fw: Allow re-initializing firmware Raag Jadav
@ 2026-08-21 11:41   ` sashiko-bot
  0 siblings, 0 replies; 22+ messages in thread
From: sashiko-bot @ 2026-08-21 11:41 UTC (permalink / raw)
  To: Raag Jadav; +Cc: intel-xe

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:

New issues:
- [High] xe_uc_fw_reinit() lacks an IS_SRIOV_VF() check, causing VF firmware state corruption and potential NULL pointer dereference.

Pre-existing issues:
- [High] Integer overflow in parse_gsc_layout() leads to out-of-bounds read and potential kernel panic.
--

--- Patch [1]: [PATCH v10 01/10] drm/xe/uc_fw: Allow re-initializing firmware ---
commit 0789aa0c08f22f9ec32c3de1bbde4b80f0984ba2
Author: Raag Jadav <raag.jadav@intel.com>

drm/xe/uc_fw: Allow re-initializing firmware

This commit introduces xe_uc_fw_reinit() to support re-initializing
firmware without reloading the driver. It copies the firmware back
to its buffer object and marks it as loadable after events like
PCIe FLR.

> diff --git a/drivers/gpu/drm/xe/xe_uc_fw.c b/drivers/gpu/drm/xe/xe_uc_fw.c
> --- a/drivers/gpu/drm/xe/xe_uc_fw.c
> +++ b/drivers/gpu/drm/xe/xe_uc_fw.c
[ ... ]
> +/**
> + * xe_uc_fw_reinit() - Re-initialize uC firmware into its bo
> + * @uc_fw: uC firmware
> + *
> + * Returns: 0 on success, negative error code otherwise.
> + */
> +int xe_uc_fw_reinit(struct xe_uc_fw *uc_fw)
> +{
> +	struct xe_device *xe = uc_fw_to_xe(uc_fw);
> +	struct xe_uc_fw_version old_fw, new_fw;
> +	const struct firmware *fw = NULL;
> +	int err;
> +
> +	/* Make sure the status was cleared the last time we reset the uc */
> +	xe_assert(xe, !xe_uc_fw_is_loaded(uc_fw));
> +
> +	/* We shouldn't be here for the firmware which wasn't available */
> +	if (!xe_uc_fw_is_available(uc_fw))
> +		return -ENOEXEC;

[Severity: High]
Does this code safely handle SR-IOV Virtual Functions (VFs)?

On VFs, firmware loading is handled by the PF, so the VF initializes its
firmware state with the dummy path "Loaded by PF" and skips allocating
uc_fw->bo. Since the VF reaches the XE_UC_FIRMWARE_PRELOADED status, the
xe_uc_fw_is_available() check above will pass.

Because there is no IS_SRIOV_VF() check here, this proceeds to request
the dummy firmware path. If that request fails, the VF's status is
incorrectly overwritten to XE_UC_FIRMWARE_INIT_FAIL.

If a file named "Loaded by PF" actually exists, the code proceeds to call
uc_fw_reinit():

drivers/gpu/drm/xe/xe_uc_fw.c:uc_fw_reinit() {
    ...
    xe_map_memcpy_to(xe, &uc_fw->bo->vmap, 0, data, uc_fw->size);
    ...
}

Since uc_fw->bo is NULL on VFs, will this lead to a NULL pointer
dereference?

> +
> +	old_fw = uc_fw->versions.found[XE_UC_FW_VER_RELEASE];
> +
> +	err = firmware_request_nowarn(&fw, uc_fw->path, xe->drm.dev);
> +	if (err)
> +		goto init_fail;
> +
> +	err = parse_headers(uc_fw, fw);

[Severity: High]
This isn't a bug introduced by this patch, but could the firmware parsing
called here be vulnerable to an integer overflow?

Inside parse_headers(), when handling GSC firmware, it calls
parse_gsc_layout() which performs the following bounds check:

drivers/gpu/drm/xe/xe_uc_fw.c:parse_gsc_layout() {
    ...
    min_size = layout->boot1.offset + layout->boot1.size;
    if (size < min_size) {
        ...
        return -ENODATA;
    }
    ...
    bpdt_header = data + layout->boot1.offset;
    if (bpdt_header->signature != GSC_BPDT_HEADER_SIGNATURE) {
    ...
}

Since both layout->boot1.offset and layout->boot1.size are 32-bit
unsigned integers, can a crafted firmware cause their sum to wrap around?

If they wrap before being assigned to the 64-bit min_size, the bounds
check would be bypassed, potentially resulting in an out-of-bounds read
when dereferencing bpdt_header->signature.

> +	if (err)
> +		goto restore_old;
[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260821112436.545405-1-raag.jadav@intel.com?part=1

^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [PATCH v10 07/10] drm/xe/pm: Introduce xe_device_suspend/resume()
  2026-08-21 11:23 ` [PATCH v10 07/10] drm/xe/pm: Introduce xe_device_suspend/resume() Raag Jadav
@ 2026-08-21 11:43   ` sashiko-bot
  0 siblings, 0 replies; 22+ messages in thread
From: sashiko-bot @ 2026-08-21 11:43 UTC (permalink / raw)
  To: Raag Jadav; +Cc: intel-xe

Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:

New issues:
- [Critical] External pinned BOs lose their DMA mappings during FLR suspend but are not unbound from GPU VMs and not restored on FLR resume, leading to an exploitable DMA UAF.
- [High] Deadlock in FLR prepare path due to waiting for migration jobs after disabling interrupts and stopping GuC.

Pre-existing issues:
- [High] Incomplete rollback on GT suspend failure leaves device in an inconsistent state.
--

--- Patch [7]: [PATCH v10 07/10] drm/xe/pm: Introduce xe_device_suspend/resume() ---
commit ee6e16bf1e226eef6a606f3d7137d9fbf63f7e82
Author: Raag Jadav <raag.jadav@intel.com>

drm/xe/pm: Introduce xe_device_suspend/resume()
    
PCIe FLR prepare/re-initialization flows pretty much reflect system
suspend/resume flows with a few notable exceptions. Repurpose existing
helpers for PCIe FLR with an explicit flag to distinguish between both
flows.

> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> index 396d02eb2af83..012ba47660982 100644
> --- a/drivers/gpu/drm/xe/xe_device.c
> +++ b/drivers/gpu/drm/xe/xe_device.c
[ ... ]
> +int xe_device_suspend(struct xe_device *xe, bool flr)
> +{
> +	struct xe_gt *gt;
> +	u8 id;
> +	int err;
> +
> +	err = xe_pxp_pm_suspend(xe->pxp);
> +	if (err)
> +		return err;
> +
> +	xe_late_bind_wait_for_worker_completion(&xe->late_bind);
> +
> +	for_each_gt(gt, xe, id)
> +		xe_gt_suspend_prepare(gt);
> +
> +	if (flr) {
> +		for_each_gt(gt, xe, id)
> +			xe_gt_flr_prepare(gt);
> +	} else {
> +		xe_display_pm_suspend(xe);
> +
> +		/* FIXME: Super racey... */
> +		err = xe_bo_evict_all(xe);
> +		if (err)
> +			goto err_display;
> +
> +		for_each_gt(gt, xe, id) {
> +			err = xe_gt_suspend(gt);
> +			if (err)
> +				goto err_display;
> +		}
> +	}
> +
> +	xe_irq_suspend(xe);
> +
> +	if (flr) {
> +		/* TODO: Drop all user bos */
> +		xe_bo_pci_dev_remove_pinned(xe);

[Severity: High]
Can this cause a deadlock during the PCIe FLR prepare sequence?

When flr is true, xe_gt_flr_prepare() stops GuC scheduling. The
guc_exec_queue_stop() function explicitly skips banning and triggering
cleanup for kernel queues like the migrate engine, leaving pending migration
jobs in the scheduler.

Later we call xe_irq_suspend() which disables hardware interrupts. Then
xe_bo_pci_dev_remove_pinned() calls xe_tile_migrate_wait(), performing a
blocking dma_fence_wait() on the migrate engine's last job fence.

Since GuC is stopped, interrupts are disabled, and TDR wasn't queued, will
the fence ever signal?

> +
> +		unmap_mapping_range(xe->drm.anon_inode->i_mapping, 0, 0, 1);
> +	} else {
> +		xe_display_pm_suspend_late(xe);
> +
> +		xe_i2c_pm_suspend(xe);
> +	}
> +
> +	return 0;
> +
> +err_display:
> +	xe_display_pm_resume(xe);
> +	xe_pxp_pm_resume(xe->pxp);
> +	return err;
> +}

[Severity: High]
This is a pre-existing issue, but does this error path leave the system in an
inconsistent state if we fail during system suspend?

If xe_bo_evict_all() fails (e.g., due to system memory pressure), or
xe_gt_suspend() fails on a subsequent GT, we jump to err_display.

The error path only resumes the display and PXP, but doesn't resume the already
suspended GTs, undo xe_gt_suspend_prepare(), or restore the evicted BOs. Could
this leave the device permanently broken until a reboot?

[ ... ]
> +int xe_device_resume(struct xe_device *xe, bool flr)
> +{
[ ... ]
> +	if (flr) {
> +		if (err)
> +			return err;
> +	} else {
> +		/*
> +		 * Try to bring up display before bailing from GT resume failure,
> +		 * so we don't leave the user clueless with a blank screen.
> +		 */
> +		xe_display_pm_resume(xe);
> +		if (err)
> +			return err;
> +
> +		err = xe_bo_restore_late(xe);

[Severity: Critical]
Does skipping xe_bo_restore_late() during FLR resume create an IOMMU bypass or
Use-After-Free risk?

During FLR suspend, xe_bo_pci_dev_remove_pinned() unmaps DMA for external BOs
(dma-bufs), but the GPU page tables (which may reside in system memory and
survive FLR) are not updated to remove the old IOVAs.

When resuming from FLR, we take the "flr == true" branch above and skip
xe_bo_restore_late(). Since we skip remapping the external BOs, are those BOs
left unmapped while their old IOVAs remain in the surviving GPU VMs?

If userspace submits jobs to the old GPU VMs, and the GPU accesses the unmapped
IOVAs, could the GPU silently corrupt or exfiltrate memory if the IOMMU has
reallocated those IOVAs to another device or process?

> +		if (err)
> +			return err;
> +
> +		if (IS_VF_CCS_READY(xe))
> +			xe_sriov_vf_ccs_register_context(xe);
> +	}
> +
> +	xe_pxp_pm_resume(xe->pxp);
> +
> +	xe_late_bind_fw_load(&xe->late_bind);
> +
> +	return 0;
> +}

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260821112436.545405-1-raag.jadav@intel.com?part=7

^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [PATCH v10 05/10] drm/xe/exec_queue: Introduce xe_exec_queue_reinit()
  2026-08-21 11:23 ` [PATCH v10 05/10] drm/xe/exec_queue: Introduce xe_exec_queue_reinit() Raag Jadav
@ 2026-08-21 11:43   ` sashiko-bot
  0 siblings, 0 replies; 22+ messages in thread
From: sashiko-bot @ 2026-08-21 11:43 UTC (permalink / raw)
  To: Raag Jadav; +Cc: intel-xe

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:

Pre-existing issues:
- [High] A local denial of service (kernel panic) is possible when a user space application sets the DRM_XE_EXEC_QUEUE_SET_HANG_REPLAY_STATE property on platforms where default_lrc is not populated.
--

--- Patch [5]: [PATCH v10 05/10] drm/xe/exec_queue: Introduce xe_exec_queue_reinit() ---
commit a8c85ce636fedba930156524ab6e248c40456eee
Author: Raag Jadav <raag.jadav@intel.com>

drm/xe/exec_queue: Introduce xe_exec_queue_reinit()

In preparation of usecases which require re-initializing exec queue
after PCIe FLR, introduce xe_exec_queue_reinit() helper. All the exec
queue LCRs already exist but the context is lost on PCIe FLR and needs
re-initialization.

> diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
> index 35b4e8289b5fe..79b363978ea49 100644
> --- a/drivers/gpu/drm/xe/xe_lrc.c
> +++ b/drivers/gpu/drm/xe/xe_lrc.c

[ ... ]

> @@ -1486,8 +1486,19 @@ void xe_lrc_set_multi_queue_priority(struct xe_lrc *lrc, enum xe_multi_queue_pri
>  	lrc->desc |= FIELD_PREP(LRC_PRIORITY, xe_multi_queue_prio_to_lrc(lrc, priority));
>  }
>  
> -static int xe_lrc_ctx_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct xe_vm *vm,
> -			   void *replay_state, u16 msix_vec, u32 init_flags)
> +/**
> + * xe_lrc_ctx_init() - Initialize LRC with context details
> + * @lrc: Pointer to the LRC
> + * @hwe: Hardware Engine
> + * @vm: The VM (address space)
> + * @replay_state: GPU hang replay state
> + * @msix_vec: MSI-X interrupt vector (for platforms that support it)
> + * @init_flags: LRC initialization flags
> + *
> + * Returns: 0 on success, negative error code otherwise.
> + */
> +int xe_lrc_ctx_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct xe_vm *vm,
> +		    void *replay_state, u16 msix_vec, u32 init_flags)
>  {
>  	struct xe_gt *gt = hwe->gt;
>  	struct xe_tile *tile = gt_to_tile(gt);

[Severity: High]
This is a pre-existing issue, but can this code cause a NULL pointer
dereference when replay_state is set?

If a user space application calls the xe_exec_queue_create IOCTL with the
DRM_XE_EXEC_QUEUE_SET_HANG_REPLAY_STATE extension, q->replay_state is
populated. Inside xe_lrc_ctx_init(), the code checks:

    if (gt->default_lrc[hwe->class] || replay_state) {
        xe_map_memset(xe, &map, 0, 0, LRC_PPHWSP_SIZE);
        xe_map_memcpy_to(xe, &map, LRC_PPHWSP_SIZE,
                         gt->default_lrc[hwe->class] + LRC_PPHWSP_SIZE,
                         lrc->size - LRC_PPHWSP_SIZE);

If the queue is created on a platform where GuC submission is disabled,
gt->default_lrc is not populated during initialization and remains NULL.

Because replay_state is true, the condition passes, and we unconditionally
evaluate gt->default_lrc[hwe->class] + LRC_PPHWSP_SIZE as the source pointer
for xe_map_memcpy_to(), leading to a kernel panic.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260821112436.545405-1-raag.jadav@intel.com?part=5

^ permalink raw reply	[flat|nested] 22+ messages in thread

* Re: [PATCH v10 02/10] drm/xe/guc_submit: Introduce guc_exec_queue_reinit_kernel()
  2026-08-21 11:23 ` [PATCH v10 02/10] drm/xe/guc_submit: Introduce guc_exec_queue_reinit_kernel() Raag Jadav
@ 2026-08-21 11:52   ` sashiko-bot
  0 siblings, 0 replies; 22+ messages in thread
From: sashiko-bot @ 2026-08-21 11:52 UTC (permalink / raw)
  To: Raag Jadav; +Cc: intel-xe

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] Unprotected modification of scheduler timeout in xe_sched_reinit() races with active TDR work, and drm_sched_is_stopped() assert will falsely trigger.
- [Medium] Layering violation: generic `xe_gpu_scheduler` component directly references GuC-specific `xe_guc_exec_queue` via downcast.
--

--- Patch [2]: [PATCH v10 02/10] drm/xe/guc_submit: Introduce guc_exec_queue_reinit_kernel() ---
commit 9c5abd285bbf057d5cc8df0e74c9cc1e73a4d283
Author: Raag Jadav <raag.jadav@intel.com>

drm/xe/guc_submit: Introduce guc_exec_queue_reinit_kernel()

In preparation of usecases which require re-initializing GuC submission
after PCIe FLR, introduce guc_exec_queue_reinit_kernel() helper. This will
restore kernel queues which might have been killed before PCIe FLR.

> diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler.c b/drivers/gpu/drm/xe/xe_gpu_scheduler.c
> --- a/drivers/gpu/drm/xe/xe_gpu_scheduler.c
> +++ b/drivers/gpu/drm/xe/xe_gpu_scheduler.c

[ ... ]

> @@ -84,6 +88,19 @@ int xe_sched_init(struct xe_gpu_scheduler *sched,
>  	return drm_sched_init(&sched->base, &args);
>  }
>  
> +void xe_sched_reinit(struct xe_gpu_scheduler *sched)
> +{
> +	struct xe_guc_exec_queue *ge = container_of(sched, struct xe_guc_exec_queue, sched);

[Severity: Medium]
Is it safe for the generic xe_gpu_scheduler component to directly downcast to
the GuC-specific xe_guc_exec_queue structure?

If xe_sched_reinit() is ever called by another submission backend (such as
execlists), couldn't this result in an invalid downcast and potential
memory corruption?

> +
> +	xe_gt_assert(ge->q->gt, drm_sched_is_stopped(&sched->base));
> +
> +	/*
> +	 * TODO: Implement drm_sched_reinit() instead of requiring the
> +	 * driver to restore individual fields.
> +	 */
> +	sched->base.timeout = sched->timeout;

[Severity: High]
Will the drm_sched_is_stopped() assert falsely trigger during PCIe FLR?

During hardware resets like PCIe FLR, xe_guc_submit_pause_abort() executes on
kernel queues, calling xe_sched_submission_start() (which sets pause_submit to
false) and queuing TDR via guc_exec_queue_kill(). If xe_sched_reinit() is
later called on the same queue, the scheduler is no longer stopped, causing
this assert to fail.

Additionally, does modifying sched->base.timeout here race with the concurrent
TDR work (work_tdr)? Modifying it without calling cancel_delayed_work_sync()
might leave the TDR work executing with an inconsistent timeout state on a
re-initialized kernel queue.

> +}
> +
>  void xe_sched_fini(struct xe_gpu_scheduler *sched)

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260821112436.545405-1-raag.jadav@intel.com?part=2

^ permalink raw reply	[flat|nested] 22+ messages in thread

* ✓ Xe.CI.BAT: success for Introduce Xe PCIe FLR (rev10)
  2026-08-21 11:23 [PATCH v10 00/10] Introduce Xe PCIe FLR Raag Jadav
                   ` (11 preceding siblings ...)
  2026-08-21 11:33 ` ✓ CI.KUnit: success " Patchwork
@ 2026-08-21 12:37 ` Patchwork
  2026-08-21 14:38 ` ✓ Xe.CI.FULL: " Patchwork
  13 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2026-08-21 12:37 UTC (permalink / raw)
  To: Raag Jadav; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 904 bytes --]

== Series Details ==

Series: Introduce Xe PCIe FLR (rev10)
URL   : https://patchwork.freedesktop.org/series/162055/
State : success

== Summary ==

CI Bug Log - changes from xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d_BAT -> xe-pw-162055v10_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (12 -> 12)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * IGT: IGT_9067 -> IGT_9068
  * Linux: xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d -> xe-pw-162055v10

  IGT_9067: 9067
  IGT_9068: 9068
  xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d: e484d618c3d6147169cc9c1edd2956ea7290877d
  xe-pw-162055v10: 162055v10

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/index.html

[-- Attachment #2: Type: text/html, Size: 1467 bytes --]

^ permalink raw reply	[flat|nested] 22+ messages in thread

* ✓ Xe.CI.FULL: success for Introduce Xe PCIe FLR (rev10)
  2026-08-21 11:23 [PATCH v10 00/10] Introduce Xe PCIe FLR Raag Jadav
                   ` (12 preceding siblings ...)
  2026-08-21 12:37 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-08-21 14:38 ` Patchwork
  13 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2026-08-21 14:38 UTC (permalink / raw)
  To: Raag Jadav; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 53825 bytes --]

== Series Details ==

Series: Introduce Xe PCIe FLR (rev10)
URL   : https://patchwork.freedesktop.org/series/162055/
State : success

== Summary ==

CI Bug Log - changes from xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d_FULL -> xe-pw-162055v10_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-162055v10_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
    - shard-bmg:          NOTRUN -> [SKIP][1] ([Intel XE#2370])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-3/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html

  * igt@kms_big_fb@linear-16bpp-rotate-90:
    - shard-lnl:          NOTRUN -> [SKIP][2] ([Intel XE#1407])
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-lnl-4/igt@kms_big_fb@linear-16bpp-rotate-90.html

  * igt@kms_big_fb@x-tiled-32bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][3] ([Intel XE#2327]) +2 other tests skip
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-4/igt@kms_big_fb@x-tiled-32bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-16bpp-rotate-180:
    - shard-lnl:          NOTRUN -> [SKIP][4] ([Intel XE#1124]) +1 other test skip
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-lnl-2/igt@kms_big_fb@y-tiled-16bpp-rotate-180.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-bmg:          NOTRUN -> [SKIP][5] ([Intel XE#1124]) +8 other tests skip
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-2/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_big_fb@yf-tiled-addfb:
    - shard-bmg:          NOTRUN -> [SKIP][6] ([Intel XE#2328] / [Intel XE#7367])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-9/igt@kms_big_fb@yf-tiled-addfb.html

  * igt@kms_big_fb@yf-tiled-addfb-size-overflow:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#610] / [Intel XE#7387])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-10/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html

  * igt@kms_bw@connected-linear-tiling-3-displays-target-3840x2160p:
    - shard-bmg:          NOTRUN -> [SKIP][8] ([Intel XE#7679])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-6/igt@kms_bw@connected-linear-tiling-3-displays-target-3840x2160p.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#3432])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-10/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#2887]) +16 other tests skip
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-8/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc.html

  * igt@kms_chamelium_color@ctm-negative:
    - shard-bmg:          NOTRUN -> [SKIP][11] ([Intel XE#2325] / [Intel XE#7358])
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-7/igt@kms_chamelium_color@ctm-negative.html

  * igt@kms_chamelium_color_pipeline@plane-ctm3x4-lut1d:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#7358])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-8/igt@kms_chamelium_color_pipeline@plane-ctm3x4-lut1d.html

  * igt@kms_chamelium_edid@hdmi-edid-read:
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#2252]) +4 other tests skip
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-2/igt@kms_chamelium_edid@hdmi-edid-read.html
    - shard-lnl:          NOTRUN -> [SKIP][14] ([Intel XE#373])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-lnl-6/igt@kms_chamelium_edid@hdmi-edid-read.html

  * igt@kms_chamelium_sharpness_filter@filter-basic:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#6507])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-7/igt@kms_chamelium_sharpness_filter@filter-basic.html

  * igt@kms_content_protection@dp-mst-type-0-hdcp14:
    - shard-bmg:          NOTRUN -> [SKIP][16] ([Intel XE#6974])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-9/igt@kms_content_protection@dp-mst-type-0-hdcp14.html

  * igt@kms_content_protection@legacy:
    - shard-bmg:          NOTRUN -> [FAIL][17] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) +3 other tests fail
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-3/igt@kms_content_protection@legacy.html

  * igt@kms_content_protection@uevent-hdcp14:
    - shard-bmg:          NOTRUN -> [FAIL][18] ([Intel XE#6707] / [Intel XE#7439]) +1 other test fail
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-6/igt@kms_content_protection@uevent-hdcp14.html

  * igt@kms_cursor_crc@cursor-onscreen-32x32:
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#2320]) +2 other tests skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-5/igt@kms_cursor_crc@cursor-onscreen-32x32.html

  * igt@kms_cursor_crc@cursor-sliding-512x512:
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#2321] / [Intel XE#7355]) +3 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-10/igt@kms_cursor_crc@cursor-sliding-512x512.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions:
    - shard-lnl:          NOTRUN -> [SKIP][21] ([Intel XE#309] / [Intel XE#7343])
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-lnl-6/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic:
    - shard-bmg:          [PASS][22] -> [FAIL][23] ([Intel XE#7571])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-6/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-1/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-bmg:          [PASS][24] -> [FAIL][25] ([Intel XE#7809])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-9/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_dirtyfb@drrs-dirtyfb-ioctl:
    - shard-bmg:          NOTRUN -> [SKIP][26] ([Intel XE#1508])
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-8/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html

  * igt@kms_dsc@dsc-basic:
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#8265]) +3 other tests skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-9/igt@kms_dsc@dsc-basic.html

  * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests:
    - shard-bmg:          NOTRUN -> [SKIP][28] ([Intel XE#4422] / [Intel XE#7442]) +1 other test skip
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-7/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests.html

  * igt@kms_fbcon_fbt@fbc:
    - shard-bmg:          NOTRUN -> [SKIP][29] ([Intel XE#4156] / [Intel XE#7425])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-4/igt@kms_fbcon_fbt@fbc.html

  * igt@kms_feature_discovery@dp-mst:
    - shard-bmg:          NOTRUN -> [SKIP][30] ([Intel XE#2375])
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-7/igt@kms_feature_discovery@dp-mst.html

  * igt@kms_feature_discovery@psr1:
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#2374] / [Intel XE#6127])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-4/igt@kms_feature_discovery@psr1.html

  * igt@kms_flip@flip-vs-absolute-wf_vblank:
    - shard-lnl:          [PASS][32] -> [FAIL][33] ([Intel XE#3098] / [Intel XE#3149]) +1 other test fail
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-lnl-1/igt@kms_flip@flip-vs-absolute-wf_vblank.html
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-lnl-5/igt@kms_flip@flip-vs-absolute-wf_vblank.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible@d-dp2:
    - shard-bmg:          [PASS][34] -> [FAIL][35] ([Intel XE#3098]) +1 other test fail
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-2/igt@kms_flip@plain-flip-fb-recreate-interruptible@d-dp2.html
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-1/igt@kms_flip@plain-flip-fb-recreate-interruptible@d-dp2.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#7178] / [Intel XE#7351]) +4 other tests skip
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-1/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][37] ([Intel XE#4141]) +12 other tests skip
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-9/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-offscreen-pri-indfb-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][38] ([Intel XE#6312]) +1 other test skip
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-lnl-2/igt@kms_frontbuffer_tracking@fbcdrrs-1p-offscreen-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-rte:
    - shard-lnl:          NOTRUN -> [SKIP][39] ([Intel XE#6312] / [Intel XE#651])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-lnl-7/igt@kms_frontbuffer_tracking@fbcdrrs-1p-rte.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-indfb-pgflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][40] ([Intel XE#2311]) +58 other tests skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-abgr161616f-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][41] ([Intel XE#7061]) +5 other tests skip
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcdrrshdr-abgr161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbchdr-2p-primscrn-shrfb-pgflip-blt:
    - shard-lnl:          NOTRUN -> [SKIP][42] ([Intel XE#7905]) +5 other tests skip
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-lnl-4/igt@kms_frontbuffer_tracking@fbchdr-2p-primscrn-shrfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-msflip-blt:
    - shard-lnl:          NOTRUN -> [SKIP][43] ([Intel XE#656] / [Intel XE#7905]) +3 other tests skip
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-lnl-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-primscrn-pri-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][44] ([Intel XE#2313]) +57 other tests skip
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-primscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][45] ([Intel XE#7399])
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcpsrhdr-tiling-y.html

  * igt@kms_frontbuffer_tracking@hdr-1p-primscrn-shrfb-plflip-blt:
    - shard-lnl:          NOTRUN -> [SKIP][46] ([Intel XE#7865]) +3 other tests skip
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-lnl-7/igt@kms_frontbuffer_tracking@hdr-1p-primscrn-shrfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@hdr-abgr161616f-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][47] ([Intel XE#7061]) +1 other test skip
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-lnl-6/igt@kms_frontbuffer_tracking@hdr-abgr161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-argb161616f-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][48] ([Intel XE#7061] / [Intel XE#7356]) +4 other tests skip
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-2/igt@kms_frontbuffer_tracking@psr-argb161616f-draw-mmap-wc.html

  * igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][49] ([Intel XE#4090] / [Intel XE#7443])
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-9/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html

  * igt@kms_plane@pixel-format-4-tiled-bmg-ccs-modifier@pipe-a-plane-5:
    - shard-bmg:          NOTRUN -> [SKIP][50] ([Intel XE#8303]) +3 other tests skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-8/igt@kms_plane@pixel-format-4-tiled-bmg-ccs-modifier@pipe-a-plane-5.html

  * igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#7283])
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-4/igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier.html

  * igt@kms_plane@pixel-format-yf-tiled-ccs-modifier-source-clamping:
    - shard-lnl:          NOTRUN -> [SKIP][52] ([Intel XE#7283])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-lnl-2/igt@kms_plane@pixel-format-yf-tiled-ccs-modifier-source-clamping.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-a:
    - shard-bmg:          NOTRUN -> [SKIP][53] ([Intel XE#2763] / [Intel XE#6886]) +4 other tests skip
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-10/igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-a.html

  * igt@kms_pm_backlight@fade-with-dpms:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#7376] / [Intel XE#7760] / [Intel XE#870]) +2 other tests skip
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-4/igt@kms_pm_backlight@fade-with-dpms.html

  * igt@kms_pm_dc@dc3co-after-dc6@pr-xrgb8888:
    - shard-bmg:          NOTRUN -> [SKIP][55] ([Intel XE#8395] / [Intel XE#8396]) +1 other test skip
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-1/igt@kms_pm_dc@dc3co-after-dc6@pr-xrgb8888.html

  * igt@kms_pm_dc@dc3co-after-dc6@psr2-yuv420:
    - shard-bmg:          NOTRUN -> [SKIP][56] ([Intel XE#8396]) +1 other test skip
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-1/igt@kms_pm_dc@dc3co-after-dc6@psr2-yuv420.html

  * igt@kms_pm_dc@dc6-dpms:
    - shard-lnl:          [PASS][57] -> [FAIL][58] ([Intel XE#8399]) +1 other test fail
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-lnl-6/igt@kms_pm_dc@dc6-dpms.html
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-lnl-8/igt@kms_pm_dc@dc6-dpms.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf:
    - shard-bmg:          NOTRUN -> [SKIP][59] ([Intel XE#1489]) +5 other tests skip
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-10/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf.html

  * igt@kms_psr@psr-primary-page-flip:
    - shard-bmg:          NOTRUN -> [SKIP][60] ([Intel XE#2234] / [Intel XE#2850]) +14 other tests skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-8/igt@kms_psr@psr-primary-page-flip.html

  * igt@kms_psr@psr2-primary-render:
    - shard-bmg:          NOTRUN -> [SKIP][61] ([Intel XE#2234])
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-6/igt@kms_psr@psr2-primary-render.html

  * igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
    - shard-lnl:          [PASS][62] -> [SKIP][63] ([Intel XE#8361])
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-lnl-7/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-lnl-7/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html

  * igt@kms_rotation_crc@primary-rotation-270:
    - shard-bmg:          NOTRUN -> [SKIP][64] ([Intel XE#3904] / [Intel XE#7342])
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-2/igt@kms_rotation_crc@primary-rotation-270.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
    - shard-bmg:          NOTRUN -> [SKIP][65] ([Intel XE#2330] / [Intel XE#5813])
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-7/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html

  * igt@kms_scaling_modes@scaling-mode-center:
    - shard-bmg:          NOTRUN -> [SKIP][66] ([Intel XE#2413])
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-6/igt@kms_scaling_modes@scaling-mode-center.html

  * igt@kms_setmode@invalid-clone-single-crtc:
    - shard-lnl:          NOTRUN -> [SKIP][67] ([Intel XE#1435])
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-lnl-7/igt@kms_setmode@invalid-clone-single-crtc.html

  * igt@kms_sharpness_filter@filter-dpms:
    - shard-bmg:          NOTRUN -> [SKIP][68] ([Intel XE#6503])
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-10/igt@kms_sharpness_filter@filter-dpms.html

  * igt@kms_vrr@lobf-dc3co:
    - shard-bmg:          NOTRUN -> [SKIP][69] ([Intel XE#8397])
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-1/igt@kms_vrr@lobf-dc3co.html

  * igt@xe_evict@evict-beng-mixed-many-threads-small:
    - shard-bmg:          [PASS][70] -> [INCOMPLETE][71] ([Intel XE#6321] / [Intel XE#8355])
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-9/igt@xe_evict@evict-beng-mixed-many-threads-small.html
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-7/igt@xe_evict@evict-beng-mixed-many-threads-small.html

  * igt@xe_evict@evict-small-external-cm:
    - shard-lnl:          NOTRUN -> [SKIP][72] ([Intel XE#6540] / [Intel XE#688])
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-lnl-4/igt@xe_evict@evict-small-external-cm.html

  * igt@xe_evict@evict-small-external-multi-queue:
    - shard-bmg:          NOTRUN -> [SKIP][73] ([Intel XE#8370])
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-9/igt@xe_evict@evict-small-external-multi-queue.html

  * igt@xe_exec_balancer@many-execqueues-virtual-basic:
    - shard-lnl:          NOTRUN -> [SKIP][74] ([Intel XE#7482])
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-lnl-3/igt@xe_exec_balancer@many-execqueues-virtual-basic.html

  * igt@xe_exec_basic@multigpu-once-basic-defer-bind:
    - shard-bmg:          NOTRUN -> [SKIP][75] ([Intel XE#2322] / [Intel XE#7372]) +7 other tests skip
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-7/igt@xe_exec_basic@multigpu-once-basic-defer-bind.html

  * igt@xe_exec_basic@multigpu-once-null:
    - shard-lnl:          NOTRUN -> [SKIP][76] ([Intel XE#1392]) +1 other test skip
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-lnl-1/igt@xe_exec_basic@multigpu-once-null.html

  * igt@xe_exec_fault_mode@many-multi-queue-rebind-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][77] ([Intel XE#8374]) +10 other tests skip
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-7/igt@xe_exec_fault_mode@many-multi-queue-rebind-prefetch.html

  * igt@xe_exec_multi_queue@many-execs-preempt-mode-fault-dyn-priority:
    - shard-lnl:          NOTRUN -> [SKIP][78] ([Intel XE#8364]) +1 other test skip
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-lnl-7/igt@xe_exec_multi_queue@many-execs-preempt-mode-fault-dyn-priority.html

  * igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-dyn-priority-smem:
    - shard-bmg:          NOTRUN -> [SKIP][79] ([Intel XE#8364]) +28 other tests skip
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-9/igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-dyn-priority-smem.html

  * igt@xe_exec_reset@multi-queue-cat-error-on-secondary:
    - shard-bmg:          NOTRUN -> [SKIP][80] ([Intel XE#8369])
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-6/igt@xe_exec_reset@multi-queue-cat-error-on-secondary.html

  * igt@xe_exec_threads@threads-multi-queue-cm-shared-vm-basic:
    - shard-lnl:          NOTRUN -> [SKIP][81] ([Intel XE#8378]) +1 other test skip
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-lnl-2/igt@xe_exec_threads@threads-multi-queue-cm-shared-vm-basic.html

  * igt@xe_exec_threads@threads-multi-queue-mixed-userptr-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][82] ([Intel XE#8378]) +9 other tests skip
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-2/igt@xe_exec_threads@threads-multi-queue-mixed-userptr-rebind.html

  * igt@xe_mmap@pci-membarrier:
    - shard-lnl:          NOTRUN -> [SKIP][83] ([Intel XE#5100] / [Intel XE#7322] / [Intel XE#7408])
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-lnl-6/igt@xe_mmap@pci-membarrier.html

  * igt@xe_multigpu_svm@mgpu-coherency-conflict:
    - shard-bmg:          NOTRUN -> [SKIP][84] ([Intel XE#6964]) +1 other test skip
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-2/igt@xe_multigpu_svm@mgpu-coherency-conflict.html

  * igt@xe_oa@non-zero-reason:
    - shard-bmg:          NOTRUN -> [FAIL][85] ([Intel XE#7334]) +1 other test fail
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-3/igt@xe_oa@non-zero-reason.html

  * igt@xe_page_reclaim@many-vma-same-bo:
    - shard-bmg:          NOTRUN -> [SKIP][86] ([Intel XE#7793]) +1 other test skip
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-5/igt@xe_page_reclaim@many-vma-same-bo.html

  * igt@xe_peer2peer@write:
    - shard-bmg:          NOTRUN -> [SKIP][87] ([Intel XE#2427] / [Intel XE#6953] / [Intel XE#7326] / [Intel XE#7353])
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-7/igt@xe_peer2peer@write.html

  * igt@xe_pm@d3cold-i2c:
    - shard-bmg:          NOTRUN -> [SKIP][88] ([Intel XE#5694] / [Intel XE#7370])
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-2/igt@xe_pm@d3cold-i2c.html

  * igt@xe_pm@d3cold-mmap-system:
    - shard-bmg:          NOTRUN -> [SKIP][89] ([Intel XE#2284] / [Intel XE#7370])
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-1/igt@xe_pm@d3cold-mmap-system.html

  * igt@xe_pxp@pxp-termination-key-update-post-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][90] ([Intel XE#4733] / [Intel XE#7417]) +2 other tests skip
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-3/igt@xe_pxp@pxp-termination-key-update-post-suspend.html

  * igt@xe_query@multigpu-query-hwconfig:
    - shard-bmg:          NOTRUN -> [SKIP][91] ([Intel XE#944])
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-4/igt@xe_query@multigpu-query-hwconfig.html

  * igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs@vf-random:
    - shard-bmg:          [PASS][92] -> [FAIL][93] ([Intel XE#7992]) +1 other test fail
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-2/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs@vf-random.html
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-2/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs@vf-random.html

  * igt@xe_sriov_flr@flr-vfs-parallel:
    - shard-bmg:          [PASS][94] -> [FAIL][95] ([Intel XE#6569])
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-2/igt@xe_sriov_flr@flr-vfs-parallel.html
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-5/igt@xe_sriov_flr@flr-vfs-parallel.html

  * igt@xe_sriov_vram@vf-access-beyond:
    - shard-lnl:          NOTRUN -> [SKIP][96] ([Intel XE#6376] / [Intel XE#7330] / [Intel XE#7422])
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-lnl-3/igt@xe_sriov_vram@vf-access-beyond.html

  * igt@xe_wedged@basic-wedged:
    - shard-bmg:          NOTRUN -> [DMESG-WARN][97] ([Intel XE#8963])
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-6/igt@xe_wedged@basic-wedged.html

  
#### Possible fixes ####

  * igt@core_hotunplug@hotreplug:
    - shard-bmg:          [ABORT][98] ([Intel XE#8007]) -> [PASS][99] +1 other test pass
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-10/igt@core_hotunplug@hotreplug.html
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-6/igt@core_hotunplug@hotreplug.html

  * igt@intel_hwmon@hwmon-write:
    - shard-bmg:          [FAIL][100] ([Intel XE#8583]) -> [PASS][101]
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-1/igt@intel_hwmon@hwmon-write.html
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-6/igt@intel_hwmon@hwmon-write.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
    - shard-bmg:          [INCOMPLETE][102] ([Intel XE#7084] / [Intel XE#8150]) -> [PASS][103] +1 other test pass
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-8/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-7/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html

  * igt@kms_color@ctm-blue-to-red:
    - shard-bmg:          [FAIL][104] -> [PASS][105] +1 other test pass
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-5/igt@kms_color@ctm-blue-to-red.html
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-4/igt@kms_color@ctm-blue-to-red.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-lnl:          [FAIL][106] ([Intel XE#7949] / [i915#4767]) -> [PASS][107]
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-lnl-5/igt@kms_fbcon_fbt@fbc-suspend.html
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-lnl-2/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_pm_rpm@basic-rte:
    - shard-bmg:          [SKIP][108] -> [PASS][109]
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-5/igt@kms_pm_rpm@basic-rte.html
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-1/igt@kms_pm_rpm@basic-rte.html

  * igt@testdisplay:
    - shard-bmg:          [DMESG-FAIL][110] -> [PASS][111]
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-5/igt@testdisplay.html
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-2/igt@testdisplay.html

  * igt@xe_exec_system_allocator@process-many-large-malloc-race:
    - shard-bmg:          [SKIP][112] ([Intel XE#8589]) -> [PASS][113] +84 other tests pass
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-5/igt@xe_exec_system_allocator@process-many-large-malloc-race.html
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-8/igt@xe_exec_system_allocator@process-many-large-malloc-race.html

  
#### Warnings ####

  * igt@kms_big_fb@x-tiled-64bpp-rotate-270:
    - shard-bmg:          [SKIP][114] ([Intel XE#8589]) -> [SKIP][115] ([Intel XE#2327]) +1 other test skip
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-5/igt@kms_big_fb@x-tiled-64bpp-rotate-270.html
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-5/igt@kms_big_fb@x-tiled-64bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-addfb:
    - shard-bmg:          [SKIP][116] ([Intel XE#8589]) -> [SKIP][117] ([Intel XE#2328] / [Intel XE#7367])
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-5/igt@kms_big_fb@y-tiled-addfb.html
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-7/igt@kms_big_fb@y-tiled-addfb.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
    - shard-bmg:          [SKIP][118] ([Intel XE#8589]) -> [SKIP][119] ([Intel XE#1124]) +1 other test skip
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-5/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-10/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html

  * igt@kms_bw@linear-tiling-1-displays-target-2560x1440p:
    - shard-bmg:          [SKIP][120] ([Intel XE#8589]) -> [SKIP][121] ([Intel XE#367])
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-5/igt@kms_bw@linear-tiling-1-displays-target-2560x1440p.html
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-5/igt@kms_bw@linear-tiling-1-displays-target-2560x1440p.html

  * igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs:
    - shard-bmg:          [SKIP][122] ([Intel XE#8589]) -> [SKIP][123] ([Intel XE#2887]) +1 other test skip
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-5/igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs.html
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-7/igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs.html

  * igt@kms_chamelium_audio@hdmi-audio:
    - shard-bmg:          [SKIP][124] ([Intel XE#8589]) -> [SKIP][125] ([Intel XE#2252]) +1 other test skip
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-5/igt@kms_chamelium_audio@hdmi-audio.html
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-9/igt@kms_chamelium_audio@hdmi-audio.html

  * igt@kms_chamelium_color@ctm-blue-to-red:
    - shard-bmg:          [SKIP][126] ([Intel XE#8589]) -> [SKIP][127] ([Intel XE#2325] / [Intel XE#7358])
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-5/igt@kms_chamelium_color@ctm-blue-to-red.html
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-6/igt@kms_chamelium_color@ctm-blue-to-red.html

  * igt@kms_cursor_crc@cursor-offscreen-32x32:
    - shard-bmg:          [SKIP][128] ([Intel XE#8589]) -> [SKIP][129] ([Intel XE#2320]) +1 other test skip
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-5/igt@kms_cursor_crc@cursor-offscreen-32x32.html
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-8/igt@kms_cursor_crc@cursor-offscreen-32x32.html

  * igt@kms_dp_link_training@uhbr-mst:
    - shard-bmg:          [SKIP][130] ([Intel XE#8589]) -> [SKIP][131] ([Intel XE#4354] / [Intel XE#7386])
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-5/igt@kms_dp_link_training@uhbr-mst.html
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-5/igt@kms_dp_link_training@uhbr-mst.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-render:
    - shard-bmg:          [SKIP][132] ([Intel XE#8589]) -> [SKIP][133] ([Intel XE#4141]) +1 other test skip
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-render.html
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][134] ([Intel XE#8589]) -> [SKIP][135] ([Intel XE#2311]) +6 other tests skip
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y:
    - shard-bmg:          [SKIP][136] ([Intel XE#8589]) -> [SKIP][137] ([Intel XE#2352] / [Intel XE#7399])
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y.html
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y.html

  * igt@kms_frontbuffer_tracking@fbchdr-argb161616f-draw-mmap-wc:
    - shard-bmg:          [SKIP][138] ([Intel XE#8589]) -> [SKIP][139] ([Intel XE#7061])
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-5/igt@kms_frontbuffer_tracking@fbchdr-argb161616f-draw-mmap-wc.html
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-8/igt@kms_frontbuffer_tracking@fbchdr-argb161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-wc:
    - shard-bmg:          [SKIP][140] ([Intel XE#8589]) -> [SKIP][141] ([Intel XE#2313]) +5 other tests skip
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-5/igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-wc.html
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-9/igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-wc.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][142] ([Intel XE#8589]) -> [SKIP][143] ([Intel XE#3374] / [Intel XE#3544])
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-5/igt@kms_hdr@brightness-with-hdr.html
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-6/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
    - shard-bmg:          [SKIP][144] ([Intel XE#8589]) -> [SKIP][145] ([Intel XE#7591])
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-5/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-8/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html

  * igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-modifier:
    - shard-bmg:          [SKIP][146] ([Intel XE#8589]) -> [SKIP][147] ([Intel XE#7283]) +1 other test skip
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-5/igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-modifier.html
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-2/igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-modifier.html

  * igt@kms_plane_multiple@2x-tiling-yf:
    - shard-bmg:          [SKIP][148] ([Intel XE#8589]) -> [SKIP][149] ([Intel XE#5021] / [Intel XE#7377])
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-5/igt@kms_plane_multiple@2x-tiling-yf.html
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-8/igt@kms_plane_multiple@2x-tiling-yf.html

  * igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-sf:
    - shard-bmg:          [SKIP][150] ([Intel XE#8589]) -> [SKIP][151] ([Intel XE#1489])
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-5/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-sf.html
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-9/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-sf.html

  * igt@kms_psr@psr-sprite-plane-onoff:
    - shard-bmg:          [SKIP][152] ([Intel XE#8589]) -> [SKIP][153] ([Intel XE#2234] / [Intel XE#2850]) +3 other tests skip
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-5/igt@kms_psr@psr-sprite-plane-onoff.html
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-9/igt@kms_psr@psr-sprite-plane-onoff.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-bmg:          [SKIP][154] ([Intel XE#2426] / [Intel XE#5848]) -> [FAIL][155] ([Intel XE#1729] / [Intel XE#7424])
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern.html
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-4/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_vrr@lobf:
    - shard-bmg:          [SKIP][156] ([Intel XE#8589]) -> [SKIP][157] ([Intel XE#2168] / [Intel XE#7444])
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-5/igt@kms_vrr@lobf.html
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-10/igt@kms_vrr@lobf.html

  * igt@sriov_basic@pf-unbind-with-vfs-enabled-numvfs-all:
    - shard-bmg:          [ABORT][158] ([Intel XE#8868]) -> [FAIL][159] ([Intel XE#7992])
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-3/igt@sriov_basic@pf-unbind-with-vfs-enabled-numvfs-all.html
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-2/igt@sriov_basic@pf-unbind-with-vfs-enabled-numvfs-all.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-defer-mmap:
    - shard-bmg:          [SKIP][160] ([Intel XE#8589]) -> [SKIP][161] ([Intel XE#2322] / [Intel XE#7372])
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-5/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-defer-mmap.html
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-2/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-defer-mmap.html

  * igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr-prefetch:
    - shard-bmg:          [SKIP][162] ([Intel XE#8589]) -> [SKIP][163] ([Intel XE#8374]) +1 other test skip
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-5/igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr-prefetch.html
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-6/igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr-prefetch.html

  * igt@xe_exec_multi_queue@many-execs-dyn-priority:
    - shard-bmg:          [SKIP][164] ([Intel XE#8589]) -> [SKIP][165] ([Intel XE#8364]) +2 other tests skip
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-5/igt@xe_exec_multi_queue@many-execs-dyn-priority.html
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-6/igt@xe_exec_multi_queue@many-execs-dyn-priority.html

  * igt@xe_exec_reset@multi-queue-close-execqueues:
    - shard-bmg:          [SKIP][166] ([Intel XE#8589]) -> [SKIP][167] ([Intel XE#8369])
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-5/igt@xe_exec_reset@multi-queue-close-execqueues.html
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-2/igt@xe_exec_reset@multi-queue-close-execqueues.html

  * igt@xe_exec_threads@threads-multi-queue-mixed-basic:
    - shard-bmg:          [SKIP][168] ([Intel XE#8589]) -> [SKIP][169] ([Intel XE#8378])
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-5/igt@xe_exec_threads@threads-multi-queue-mixed-basic.html
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-6/igt@xe_exec_threads@threads-multi-queue-mixed-basic.html

  * igt@xe_fault_injection@inject-fault-probe-function-xe_tile_init_early:
    - shard-bmg:          [SKIP][170] ([Intel XE#8589]) -> [ABORT][171] ([Intel XE#8007])
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-5/igt@xe_fault_injection@inject-fault-probe-function-xe_tile_init_early.html
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-10/igt@xe_fault_injection@inject-fault-probe-function-xe_tile_init_early.html

  * igt@xe_pm@vram-d3cold-threshold:
    - shard-bmg:          [SKIP][172] ([Intel XE#8589]) -> [SKIP][173] ([Intel XE#579] / [Intel XE#7329] / [Intel XE#7517])
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-5/igt@xe_pm@vram-d3cold-threshold.html
   [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-10/igt@xe_pm@vram-d3cold-threshold.html

  * igt@xe_query@multigpu-query-invalid-extension:
    - shard-bmg:          [SKIP][174] ([Intel XE#8589]) -> [SKIP][175] ([Intel XE#944])
   [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d/shard-bmg-5/igt@xe_query@multigpu-query-invalid-extension.html
   [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/shard-bmg-4/igt@xe_query@multigpu-query-invalid-extension.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
  [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1508
  [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
  [Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2328]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2328
  [Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
  [Intel XE#2352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2352
  [Intel XE#2370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2370
  [Intel XE#2374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2374
  [Intel XE#2375]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2375
  [Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2427]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2427
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#3098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3098
  [Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4090]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4090
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4156]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4156
  [Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
  [Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
  [Intel XE#5100]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5100
  [Intel XE#5694]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5694
  [Intel XE#579]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/579
  [Intel XE#5813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5813
  [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
  [Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
  [Intel XE#6127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6127
  [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6376
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#6507]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6507
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#6569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6569
  [Intel XE#6707]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6707
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#6953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6953
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7084]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7084
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7322
  [Intel XE#7326]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7326
  [Intel XE#7329]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7329
  [Intel XE#7330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7330
  [Intel XE#7334]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7334
  [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
  [Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7353]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7353
  [Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
  [Intel XE#7367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7367
  [Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
  [Intel XE#7376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7376
  [Intel XE#7377]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7377
  [Intel XE#7386]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7386
  [Intel XE#7387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7387
  [Intel XE#7399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7399
  [Intel XE#7408]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7408
  [Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
  [Intel XE#7422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7422
  [Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
  [Intel XE#7425]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7425
  [Intel XE#7439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7439
  [Intel XE#7442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7442
  [Intel XE#7443]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7443
  [Intel XE#7444]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7444
  [Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
  [Intel XE#7517]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7517
  [Intel XE#7571]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7571
  [Intel XE#7591]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7591
  [Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
  [Intel XE#7760]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7760
  [Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
  [Intel XE#7809]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7809
  [Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865
  [Intel XE#7905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7905
  [Intel XE#7949]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7949
  [Intel XE#7992]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7992
  [Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
  [Intel XE#8150]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8150
  [Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
  [Intel XE#8303]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8303
  [Intel XE#8355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8355
  [Intel XE#8361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8361
  [Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
  [Intel XE#8369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8369
  [Intel XE#8370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8370
  [Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
  [Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
  [Intel XE#8395]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8395
  [Intel XE#8396]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8396
  [Intel XE#8397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8397
  [Intel XE#8399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8399
  [Intel XE#8583]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8583
  [Intel XE#8589]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8589
  [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
  [Intel XE#8868]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8868
  [Intel XE#8963]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8963
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
  [i915#4767]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4767


Build changes
-------------

  * IGT: IGT_9067 -> IGT_9068
  * Linux: xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d -> xe-pw-162055v10

  IGT_9067: 9067
  IGT_9068: 9068
  xe-5629-e484d618c3d6147169cc9c1edd2956ea7290877d: e484d618c3d6147169cc9c1edd2956ea7290877d
  xe-pw-162055v10: 162055v10

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v10/index.html

[-- Attachment #2: Type: text/html, Size: 61686 bytes --]

^ permalink raw reply	[flat|nested] 22+ messages in thread

end of thread, other threads:[~2026-08-21 14:38 UTC | newest]

Thread overview: 22+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-08-21 11:23 [PATCH v10 00/10] Introduce Xe PCIe FLR Raag Jadav
2026-08-21 11:23 ` [PATCH v10 01/10] drm/xe/uc_fw: Allow re-initializing firmware Raag Jadav
2026-08-21 11:41   ` sashiko-bot
2026-08-21 11:23 ` [PATCH v10 02/10] drm/xe/guc_submit: Introduce guc_exec_queue_reinit_kernel() Raag Jadav
2026-08-21 11:52   ` sashiko-bot
2026-08-21 11:23 ` [PATCH v10 03/10] drm/xe/gt: Introduce FLR helpers Raag Jadav
2026-08-21 11:23 ` [PATCH v10 04/10] drm/xe/bo_evict: Introduce xe_bo_restore_map() Raag Jadav
2026-08-21 11:23 ` [PATCH v10 05/10] drm/xe/exec_queue: Introduce xe_exec_queue_reinit() Raag Jadav
2026-08-21 11:43   ` sashiko-bot
2026-08-21 11:23 ` [PATCH v10 06/10] drm/xe/migrate: Introduce xe_migrate_reinit() Raag Jadav
2026-08-21 11:39   ` sashiko-bot
2026-08-21 11:23 ` [PATCH v10 07/10] drm/xe/pm: Introduce xe_device_suspend/resume() Raag Jadav
2026-08-21 11:43   ` sashiko-bot
2026-08-21 11:23 ` [PATCH v10 08/10] drm/xe: Introduce temporary device wedging Raag Jadav
2026-08-21 11:37   ` sashiko-bot
2026-08-21 11:23 ` [PATCH v10 09/10] drm/xe/pci: Introduce PCIe Function Level Reset Raag Jadav
2026-08-21 11:39   ` sashiko-bot
2026-08-21 11:23 ` [PATCH v10 10/10] drm/xe/doc: Wire up PCI Error Handling Raag Jadav
2026-08-21 11:31 ` ✗ CI.checkpatch: warning for Introduce Xe PCIe FLR (rev10) Patchwork
2026-08-21 11:33 ` ✓ CI.KUnit: success " Patchwork
2026-08-21 12:37 ` ✓ Xe.CI.BAT: " Patchwork
2026-08-21 14:38 ` ✓ Xe.CI.FULL: " Patchwork

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