* [PATCH v3 0/3] drm/xe: Update Wa_14026539277
@ 2026-08-21 21:36 Gustavo Sousa
2026-08-21 21:36 ` [PATCH v3 1/3] drm/xe: Extract override_has_cached_pt() Gustavo Sousa
` (6 more replies)
0 siblings, 7 replies; 11+ messages in thread
From: Gustavo Sousa @ 2026-08-21 21:36 UTC (permalink / raw)
To: intel-xe
Cc: Gustavo Sousa, Matthew Auld, José Roberto de Souza,
Filip Hazubski
The definition of Wa_14026539277 has been updated in the workaround
database and requires a different implementation. Let's revert the
existing one and then add the up-to-date implementation.
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
Changes in v3:
- Changed patch "drm/xe: Add up-to-date implementation for
Wa_14026539277" to handle 2-way-coherent PAT indexes irrespective of
L3 cache policy.
- Link to v2: https://patch.msgid.link/20260724-wa_14026539277-v2-0-ad786cc6ba1e@intel.com
Changes in v2:
- Details of the changes are in the patch's changelog.
- Link to v1: https://patch.msgid.link/20260721-wa_14026539277-v1-0-09fa102f3084@intel.com
---
Gustavo Sousa (3):
drm/xe: Extract override_has_cached_pt()
Revert "drm/xe/nvlp: Implement Wa_14026539277"
drm/xe: Add up-to-date implementation for Wa_14026539277
drivers/gpu/drm/xe/regs/xe_gt_regs.h | 4 --
drivers/gpu/drm/xe/xe_pat.h | 10 +++++
drivers/gpu/drm/xe/xe_device.c | 28 ++++++++++----
drivers/gpu/drm/xe/xe_gt.c | 39 -------------------
drivers/gpu/drm/xe/xe_pat.c | 64 ++++++++++++++++++++++++++++---
drivers/gpu/drm/xe/xe_vm.c | 5 +++
drivers/gpu/drm/xe/xe_vm_madvise.c | 3 ++
drivers/gpu/drm/xe/xe_device_wa_oob.rules | 1 -
drivers/gpu/drm/xe/xe_wa_oob.rules | 1 +
9 files changed, 97 insertions(+), 58 deletions(-)
---
base-commit: 58d59a40e2a041d3c159fab8bf5d5dc19d28da6c
change-id: 20260701-wa_14026539277-9d39ae09ab75
Best regards,
--
Gustavo Sousa <gustavo.sousa@intel.com>
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH v3 1/3] drm/xe: Extract override_has_cached_pt() 2026-08-21 21:36 [PATCH v3 0/3] drm/xe: Update Wa_14026539277 Gustavo Sousa @ 2026-08-21 21:36 ` Gustavo Sousa 2026-08-21 21:36 ` [PATCH v3 2/3] Revert "drm/xe/nvlp: Implement Wa_14026539277" Gustavo Sousa ` (5 subsequent siblings) 6 siblings, 0 replies; 11+ messages in thread From: Gustavo Sousa @ 2026-08-21 21:36 UTC (permalink / raw) To: intel-xe; +Cc: Gustavo Sousa, Matthew Auld Some platforms support cached page tables, but some workarounds might require disabling the cached access on the CPU side. One such example is Wa_16029380221, but there could be others as well. Extract the code responsible for overriding xe->info.has_cached_pt into a new function called override_has_cached_pt(), so that we have a common place to add the necessary runtime checks specific for has_cached_pt. Reviewed-by: Matthew Auld <matthew.auld@intel.com> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com> --- drivers/gpu/drm/xe/xe_device.c | 24 ++++++++++++++++-------- 1 file changed, 16 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c index 74d566693dfd..ccf7ef3cf3e7 100644 --- a/drivers/gpu/drm/xe/xe_device.c +++ b/drivers/gpu/drm/xe/xe_device.c @@ -842,6 +842,21 @@ int xe_device_probe_early(struct xe_device *xe) } ALLOW_ERROR_INJECTION(xe_device_probe_early, ERRNO); /* See xe_pci_probe() */ +static void override_has_cached_pt(struct xe_device *xe) +{ + struct xe_gt *gt; + u8 id; + + /* + * Wa_16029380221: The affected GT will always use non-coherent + * access to page tables, so we must do uncached writes from the + * CPU. + */ + for_each_gt(gt, xe, id) + if (XE_GT_WA(gt, 16029380221)) + xe->info.has_cached_pt = false; +} + static int probe_has_flat_ccs(struct xe_device *xe) { struct xe_gt *gt; @@ -982,14 +997,7 @@ int xe_device_probe(struct xe_device *xe) return err; } - /* - * Wa_16029380221: The affected GT will always use non-coherent - * access to page tables, so we must do uncached writes from the - * CPU. - */ - for_each_gt(gt, xe, id) - if (XE_GT_WA(gt, 16029380221)) - xe->info.has_cached_pt = false; + override_has_cached_pt(xe); for_each_tile(tile, xe, id) { err = xe_ggtt_init_early(tile->mem.ggtt); -- 2.55.0 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v3 2/3] Revert "drm/xe/nvlp: Implement Wa_14026539277" 2026-08-21 21:36 [PATCH v3 0/3] drm/xe: Update Wa_14026539277 Gustavo Sousa 2026-08-21 21:36 ` [PATCH v3 1/3] drm/xe: Extract override_has_cached_pt() Gustavo Sousa @ 2026-08-21 21:36 ` Gustavo Sousa 2026-08-21 21:36 ` [PATCH v3 3/3] drm/xe: Add up-to-date implementation for Wa_14026539277 Gustavo Sousa ` (4 subsequent siblings) 6 siblings, 0 replies; 11+ messages in thread From: Gustavo Sousa @ 2026-08-21 21:36 UTC (permalink / raw) To: intel-xe; +Cc: Gustavo Sousa, Matthew Auld This reverts commit 0919b266456d81e71277c5963d4e806e85b65232. The definition of Wa_14026539277 has been updated in the workaround database and requires a different implementation. So let's revert the current implementation; a follow-up change will add the proper handling for this workaround. Reviewed-by: Matthew Auld <matthew.auld@intel.com> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com> --- drivers/gpu/drm/xe/regs/xe_gt_regs.h | 4 ---- drivers/gpu/drm/xe/xe_gt.c | 39 ------------------------------- drivers/gpu/drm/xe/xe_device_wa_oob.rules | 1 - 3 files changed, 44 deletions(-) diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h index 48c515d91882..0ec01488d6db 100644 --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h @@ -456,10 +456,6 @@ #define XEHPC_L3CLOS_MASK(i) XE_REG_MCR(0xb194 + (i) * 8) -#define L2COMPUTESIDECTRL XE_REG_MCR(0xb1c0) -#define CECTRL REG_GENMASK(2, 1) -#define CECTRL_CENODATA_ALWAYS REG_FIELD_PREP(CECTRL, 0x0) - #define XE2_GLOBAL_INVAL XE_REG(0xb404) #define XE2LPM_L3SQCREG2 XE_REG_MCR(0xb604) diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c index 6805e0d3bf21..eab8492836ea 100644 --- a/drivers/gpu/drm/xe/xe_gt.c +++ b/drivers/gpu/drm/xe/xe_gt.c @@ -12,7 +12,6 @@ #include <drm/drm_managed.h> #include <uapi/drm/xe_drm.h> -#include <generated/xe_device_wa_oob.h> #include <generated/xe_wa_oob.h> #include "instructions/xe_alu_commands.h" @@ -456,35 +455,6 @@ int xe_gt_record_default_lrcs(struct xe_gt *gt) return err; } -static void wa_14026539277(struct xe_gt *gt) -{ - struct xe_device *xe = gt_to_xe(gt); - u32 val; - - /* - * FIXME: We currently can't use FUNC(xe_rtp_match_not_sriov_vf) in the - * rules for Wa_14026539277 due to xe_wa_process_device_oob() being - * called before xe_sriov_probe_early(); and we can't move the call to - * the former to happen after the latter because MMIO read functions - * already depend on a device OOB workaround. This needs to be fixed by - * allowing workaround checks to happen at different stages of driver - * initialization. - */ - if (IS_SRIOV_VF(xe)) - return; - - if (!XE_DEVICE_WA(xe, 14026539277)) - return; - - if (!xe_gt_is_main_type(gt)) - return; - - val = xe_gt_mcr_unicast_read_any(gt, L2COMPUTESIDECTRL); - val &= ~CECTRL; - val |= CECTRL_CENODATA_ALWAYS; - xe_gt_mcr_multicast_write(gt, L2COMPUTESIDECTRL, val); -} - int xe_gt_init_early(struct xe_gt *gt) { int err; @@ -610,15 +580,6 @@ static int gt_init_with_gt_forcewake(struct xe_gt *gt) */ gt->info.gmdid = xe_mmio_read32(>->mmio, GMD_ID); - /* - * Wa_14026539277 can't be implemented as a regular GT workaround (i.e. - * as an entry in gt_was[]) for two reasons: it is actually a device - * workaround that happens to involve programming a GT register; and it - * needs to be applied early to avoid getting the hardware in a bad - * state before we have a chance to do the necessary programming. - */ - wa_14026539277(gt); - return 0; } diff --git a/drivers/gpu/drm/xe/xe_device_wa_oob.rules b/drivers/gpu/drm/xe/xe_device_wa_oob.rules index d8dc41851425..356b4707dafe 100644 --- a/drivers/gpu/drm/xe/xe_device_wa_oob.rules +++ b/drivers/gpu/drm/xe/xe_device_wa_oob.rules @@ -3,7 +3,6 @@ PLATFORM(PANTHERLAKE) 22019338487_display PLATFORM(LUNARLAKE) 14022085890 SUBPLATFORM(BATTLEMAGE, G21) -14026539277 PLATFORM(NOVALAKE_P), PLATFORM_STEP(A0, B0) 14026633728 PLATFORM(CRESCENTISLAND) 14026746987 PLATFORM(CRESCENTISLAND) 14026779378 PLATFORM(CRESCENTISLAND) -- 2.55.0 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v3 3/3] drm/xe: Add up-to-date implementation for Wa_14026539277 2026-08-21 21:36 [PATCH v3 0/3] drm/xe: Update Wa_14026539277 Gustavo Sousa 2026-08-21 21:36 ` [PATCH v3 1/3] drm/xe: Extract override_has_cached_pt() Gustavo Sousa 2026-08-21 21:36 ` [PATCH v3 2/3] Revert "drm/xe/nvlp: Implement Wa_14026539277" Gustavo Sousa @ 2026-08-21 21:36 ` Gustavo Sousa 2026-08-21 21:42 ` Gustavo Sousa 2026-08-21 21:52 ` sashiko-bot 2026-08-21 21:43 ` ✗ CI.checkpatch: warning for drm/xe: Update Wa_14026539277 Patchwork ` (3 subsequent siblings) 6 siblings, 2 replies; 11+ messages in thread From: Gustavo Sousa @ 2026-08-21 21:36 UTC (permalink / raw) To: intel-xe Cc: Gustavo Sousa, José Roberto de Souza, Filip Hazubski, Matthew Auld Wa_14026539277 is a temporary workaround that targets only A* steppings of graphics version 35.10 and requires that we avoid using 2-way coherency for device-cacheable memory accesses. For driver-internal usage, we convert those configurations to be device-uncached and 1-way-coherent; on the UAPI side, we reject VM_BIND/MADVISE calls that are 2-way-coherent and leave it up to userspace to select the alternative option that is most appropriate to their usage. v2: - Add missing bits to convert the PAT value to device-uncacheable in wa_14026539277_fixup_pat_value(). (Sashiko) - Also validate the PAT index in the DRM_XE_VM_MADVISE ioctl. (Sashiko) - Match against the graphics IP instead of the platform. v3: - Handle any 2-way-coherent PAT index irrespective of L3 cache policy, because L3 UC can be promoted to cached by MOCS. (Matt) Cc: José Roberto de Souza <jose.souza@intel.com> Cc: Filip Hazubski <filip.hazubski@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com> --- drivers/gpu/drm/xe/xe_pat.h | 10 ++++++ drivers/gpu/drm/xe/xe_device.c | 16 ++++++---- drivers/gpu/drm/xe/xe_pat.c | 64 ++++++++++++++++++++++++++++++++++---- drivers/gpu/drm/xe/xe_vm.c | 5 +++ drivers/gpu/drm/xe/xe_vm_madvise.c | 3 ++ drivers/gpu/drm/xe/xe_wa_oob.rules | 1 + 6 files changed, 87 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_pat.h b/drivers/gpu/drm/xe/xe_pat.h index 7060f66e1d63..10374022f1d2 100644 --- a/drivers/gpu/drm/xe/xe_pat.h +++ b/drivers/gpu/drm/xe/xe_pat.h @@ -82,6 +82,16 @@ bool xe_pat_index_get_comp_en(struct xe_device *xe, u16 pat_index); */ u16 xe_pat_index_get_l3_policy(struct xe_device *xe, u16 pat_index); +/** + * xe_pat_wa_14026539277_reserved - Is this PAT index reserved from + * use due to Wa_14026539277? + * @xe: xe device + * @pat_index: The pat_index to query + * + * Return: a boolean indicating whether the PAT index is reserved or not. + */ +bool xe_pat_wa_14026539277_reserved(struct xe_device *xe, u16 pat_index); + #define xe_cache_pat_idx(xe, cache_mode) ({ \ const struct xe_device *__xedev = (xe); \ enum xe_cache_level __mode = (cache_mode); \ diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c index ccf7ef3cf3e7..516da74b542f 100644 --- a/drivers/gpu/drm/xe/xe_device.c +++ b/drivers/gpu/drm/xe/xe_device.c @@ -847,14 +847,18 @@ static void override_has_cached_pt(struct xe_device *xe) struct xe_gt *gt; u8 id; - /* - * Wa_16029380221: The affected GT will always use non-coherent - * access to page tables, so we must do uncached writes from the - * CPU. - */ - for_each_gt(gt, xe, id) + for_each_gt(gt, xe, id) { + /* + * Wa_16029380221: The affected GT will always use + * non-coherent access to page tables, so we must do + * uncached writes from the CPU. + */ if (XE_GT_WA(gt, 16029380221)) xe->info.has_cached_pt = false; + + if (XE_GT_WA(gt, 14026539277)) + xe->info.has_cached_pt = false; + } } static int probe_has_flat_ccs(struct xe_device *xe) diff --git a/drivers/gpu/drm/xe/xe_pat.c b/drivers/gpu/drm/xe/xe_pat.c index a5fe1beec652..66378128377c 100644 --- a/drivers/gpu/drm/xe/xe_pat.c +++ b/drivers/gpu/drm/xe/xe_pat.c @@ -313,6 +313,40 @@ u16 xe_pat_index_get_l3_policy(struct xe_device *xe, u16 pat_index) return REG_FIELD_GET(XE2_L3_POLICY, xe->pat.table[pat_index].value); } +bool xe_pat_wa_14026539277_reserved(struct xe_device *xe, u16 pat_index) +{ + struct xe_gt *gt; + u8 id; + bool has_wa = false; + + for_each_gt(gt, xe, id) { + if (XE_GT_WA(gt, 14026539277)) { + has_wa = true; + break; + } + } + + /* + * Disallow 2-way coherency for any L3 cache policy because + * XE_L3_POLICY_UC could still be promoted to a cached policy + * by MOCS indices. + */ + return has_wa && xe_pat_index_get_coh_mode(xe, pat_index) == XE_COH_2WAY; +} + +static u32 wa_14026539277_fixup_pat_value(struct xe_gt *gt, u32 value) +{ + if (XE_GT_WA(gt, 14026539277)) { + if (REG_FIELD_GET(XE2_COH_MODE, value) == XE_COH_2WAY) { + value &= ~(XE2_L3_POLICY | XE2_COH_MODE); + value |= REG_FIELD_PREP(XE2_L3_POLICY, XE_L3_POLICY_UC) | + REG_FIELD_PREP(XE2_COH_MODE, XE_COH_1WAY); + } + } + + return value; +} + static const struct xe_pat_table_entry *gt_pta_entry(struct xe_gt *gt) { struct xe_device *xe = gt_to_xe(gt); @@ -373,18 +407,22 @@ static void program_pat_mcr(struct xe_gt *gt, const struct xe_pat_table_entry ta for (int i = 0; i < n_entries; i++) { struct xe_reg_mcr reg_mcr = XE_REG_MCR(_PAT_INDEX(i)); + u32 pat = wa_14026539277_fixup_pat_value(gt, table[i].value); - xe_gt_mcr_multicast_write(gt, reg_mcr, table[i].value); + xe_gt_mcr_multicast_write(gt, reg_mcr, pat); } if (xe->pat.pat_ats) - xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_ATS), xe->pat.pat_ats->value); + xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_ATS), + wa_14026539277_fixup_pat_value(gt, xe->pat.pat_ats->value)); if (pta_entry) - xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_PTA), pta_entry->value); + xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_PTA), + wa_14026539277_fixup_pat_value(gt, pta_entry->value)); if (tr_pta_entry) - xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_TR_PTA), tr_pta_entry->value); + xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_TR_PTA), + wa_14026539277_fixup_pat_value(gt, tr_pta_entry->value)); } static int xelp_dump(struct xe_gt *gt, struct drm_printer *p) @@ -534,13 +572,16 @@ static int xe2_dump(struct xe_gt *gt, struct drm_printer *p) drm_printf(p, "PAT table: (* = reserved entry)\n"); for (i = 0; i < xe->pat.n_entries; i++) { + bool rsvd = !xe->pat.table[i].valid || + xe_pat_wa_14026539277_reserved(xe, i); + if (xe_gt_is_media_type(gt)) pat = xe_mmio_read32(>->mmio, XE_REG(_PAT_INDEX(i))); else pat = xe_gt_mcr_unicast_read_any(gt, XE_REG_MCR(_PAT_INDEX(i))); xe_pat_index_label(label, sizeof(label), i); - xe->pat.ops->entry_dump(p, label, pat, !xe->pat.table[i].valid); + xe->pat.ops->entry_dump(p, label, pat, rsvd); } /* @@ -747,9 +788,14 @@ int xe_pat_dump_sw_config(struct xe_gt *gt, struct drm_printer *p) for (u32 i = 0; i < xe->pat.n_entries; i++) { u32 pat = xe->pat.table[i].value; + pat = wa_14026539277_fixup_pat_value(gt, pat); + if (GRAPHICS_VER(xe) >= 20) { + bool rsvd = !xe->pat.table[i].valid || + xe_pat_wa_14026539277_reserved(xe, i); + xe_pat_index_label(label, sizeof(label), i); - xe->pat.ops->entry_dump(p, label, pat, !xe->pat.table[i].valid); + xe->pat.ops->entry_dump(p, label, pat, rsvd); } else if (xe->info.platform == XE_METEORLAKE) { xelpg_pat_entry_dump(p, i, pat); } else if (xe->info.platform == XE_PVC) { @@ -764,6 +810,8 @@ int xe_pat_dump_sw_config(struct xe_gt *gt, struct drm_printer *p) if (pta_entry) { u32 pat = pta_entry->value; + pat = wa_14026539277_fixup_pat_value(gt, pat); + drm_printf(p, "Page Table Access:\n"); xe->pat.ops->entry_dump(p, "PTA_MODE", pat, false); } @@ -771,6 +819,8 @@ int xe_pat_dump_sw_config(struct xe_gt *gt, struct drm_printer *p) if (tr_pta_entry) { u32 pat = tr_pta_entry->value; + pat = wa_14026539277_fixup_pat_value(gt, pat); + drm_printf(p, "TRTT Page Table Access:\n"); xe->pat.ops->entry_dump(p, "TR_PTA_MODE", pat, false); } @@ -778,6 +828,8 @@ int xe_pat_dump_sw_config(struct xe_gt *gt, struct drm_printer *p) if (xe->pat.pat_ats) { u32 pat = xe->pat.pat_ats->value; + pat = wa_14026539277_fixup_pat_value(gt, pat); + drm_printf(p, "PCIe ATS/PASID:\n"); xe->pat.ops->entry_dump(p, "PAT_ATS ", pat, false); } diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c index 19b3d0be7928..92a1d5098aac 100644 --- a/drivers/gpu/drm/xe/xe_vm.c +++ b/drivers/gpu/drm/xe/xe_vm.c @@ -3829,6 +3829,11 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe, struct xe_vm *vm, goto free_bind_ops; } + if (XE_IOCTL_DBG(xe, xe_pat_wa_14026539277_reserved(xe, pat_index))) { + err = -EINVAL; + goto free_bind_ops; + } + if (XE_IOCTL_DBG(xe, op > DRM_XE_VM_BIND_OP_PREFETCH) || XE_IOCTL_DBG(xe, flags & ~SUPPORTED_FLAGS) || XE_IOCTL_DBG(xe, obj && (is_null || is_cpu_addr_mirror)) || diff --git a/drivers/gpu/drm/xe/xe_vm_madvise.c b/drivers/gpu/drm/xe/xe_vm_madvise.c index 0474768a38aa..265273294756 100644 --- a/drivers/gpu/drm/xe/xe_vm_madvise.c +++ b/drivers/gpu/drm/xe/xe_vm_madvise.c @@ -500,6 +500,9 @@ static bool check_pat_args_are_sane(struct xe_device *xe, u16 coh_mode = xe_pat_index_get_coh_mode(xe, pat_index); int i; + if (XE_IOCTL_DBG(xe, xe_pat_wa_14026539277_reserved(xe, pat_index))) + return false; + /* * Using coh_none with CPU cached buffers is not allowed on iGPU. * On iGPU the GPU shares the LLC with the CPU, so with coh_none diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules index dd69ad07f7a9..46290d039fa8 100644 --- a/drivers/gpu/drm/xe/xe_wa_oob.rules +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules @@ -71,4 +71,5 @@ GRAPHICS_VERSION(3511) 16029897822 MEDIA_VERSION(3500) GRAPHICS_VERSION(3510) +14026539277 GRAPHICS_VERSION(3510), GRAPHICS_STEP(A0, B0) 14027054324 GRAPHICS_VERSION(3511) -- 2.55.0 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH v3 3/3] drm/xe: Add up-to-date implementation for Wa_14026539277 2026-08-21 21:36 ` [PATCH v3 3/3] drm/xe: Add up-to-date implementation for Wa_14026539277 Gustavo Sousa @ 2026-08-21 21:42 ` Gustavo Sousa 2026-08-24 6:59 ` Hazubski, Filip 2026-08-21 21:52 ` sashiko-bot 1 sibling, 1 reply; 11+ messages in thread From: Gustavo Sousa @ 2026-08-21 21:42 UTC (permalink / raw) To: José Roberto de Souza, Filip Hazubski; +Cc: intel-xe, Matthew Auld Gustavo Sousa <gustavo.sousa@intel.com> writes: > Wa_14026539277 is a temporary workaround that targets only A* > steppings of graphics version 35.10 and requires that we avoid using > 2-way coherency for device-cacheable memory accesses. For > driver-internal usage, we convert those configurations to be > device-uncached and 1-way-coherent; on the UAPI side, we reject > VM_BIND/MADVISE calls that are 2-way-coherent and leave it up to > userspace to select the alternative option that is most appropriate to > their usage. > > v2: > - Add missing bits to convert the PAT value to device-uncacheable in > wa_14026539277_fixup_pat_value(). (Sashiko) > - Also validate the PAT index in the DRM_XE_VM_MADVISE > ioctl. (Sashiko) > - Match against the graphics IP instead of the platform. > v3: > - Handle any 2-way-coherent PAT index irrespective of L3 cache > policy, because L3 UC can be promoted to cached by MOCS. (Matt) > > Cc: José Roberto de Souza <jose.souza@intel.com> > Cc: Filip Hazubski <filip.hazubski@intel.com> José and Filip, I would like to request new acks for this patch, because now it rejects any 2-way-coherent PAT index, not only those that are device-cacheable. -- Gustavo Sousa > Reviewed-by: Matthew Auld <matthew.auld@intel.com> > Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com> > --- > drivers/gpu/drm/xe/xe_pat.h | 10 ++++++ > drivers/gpu/drm/xe/xe_device.c | 16 ++++++---- > drivers/gpu/drm/xe/xe_pat.c | 64 ++++++++++++++++++++++++++++++++++---- > drivers/gpu/drm/xe/xe_vm.c | 5 +++ > drivers/gpu/drm/xe/xe_vm_madvise.c | 3 ++ > drivers/gpu/drm/xe/xe_wa_oob.rules | 1 + > 6 files changed, 87 insertions(+), 12 deletions(-) > > diff --git a/drivers/gpu/drm/xe/xe_pat.h b/drivers/gpu/drm/xe/xe_pat.h > index 7060f66e1d63..10374022f1d2 100644 > --- a/drivers/gpu/drm/xe/xe_pat.h > +++ b/drivers/gpu/drm/xe/xe_pat.h > @@ -82,6 +82,16 @@ bool xe_pat_index_get_comp_en(struct xe_device *xe, u16 pat_index); > */ > u16 xe_pat_index_get_l3_policy(struct xe_device *xe, u16 pat_index); > > +/** > + * xe_pat_wa_14026539277_reserved - Is this PAT index reserved from > + * use due to Wa_14026539277? > + * @xe: xe device > + * @pat_index: The pat_index to query > + * > + * Return: a boolean indicating whether the PAT index is reserved or not. > + */ > +bool xe_pat_wa_14026539277_reserved(struct xe_device *xe, u16 pat_index); > + > #define xe_cache_pat_idx(xe, cache_mode) ({ \ > const struct xe_device *__xedev = (xe); \ > enum xe_cache_level __mode = (cache_mode); \ > diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c > index ccf7ef3cf3e7..516da74b542f 100644 > --- a/drivers/gpu/drm/xe/xe_device.c > +++ b/drivers/gpu/drm/xe/xe_device.c > @@ -847,14 +847,18 @@ static void override_has_cached_pt(struct xe_device *xe) > struct xe_gt *gt; > u8 id; > > - /* > - * Wa_16029380221: The affected GT will always use non-coherent > - * access to page tables, so we must do uncached writes from the > - * CPU. > - */ > - for_each_gt(gt, xe, id) > + for_each_gt(gt, xe, id) { > + /* > + * Wa_16029380221: The affected GT will always use > + * non-coherent access to page tables, so we must do > + * uncached writes from the CPU. > + */ > if (XE_GT_WA(gt, 16029380221)) > xe->info.has_cached_pt = false; > + > + if (XE_GT_WA(gt, 14026539277)) > + xe->info.has_cached_pt = false; > + } > } > > static int probe_has_flat_ccs(struct xe_device *xe) > diff --git a/drivers/gpu/drm/xe/xe_pat.c b/drivers/gpu/drm/xe/xe_pat.c > index a5fe1beec652..66378128377c 100644 > --- a/drivers/gpu/drm/xe/xe_pat.c > +++ b/drivers/gpu/drm/xe/xe_pat.c > @@ -313,6 +313,40 @@ u16 xe_pat_index_get_l3_policy(struct xe_device *xe, u16 pat_index) > return REG_FIELD_GET(XE2_L3_POLICY, xe->pat.table[pat_index].value); > } > > +bool xe_pat_wa_14026539277_reserved(struct xe_device *xe, u16 pat_index) > +{ > + struct xe_gt *gt; > + u8 id; > + bool has_wa = false; > + > + for_each_gt(gt, xe, id) { > + if (XE_GT_WA(gt, 14026539277)) { > + has_wa = true; > + break; > + } > + } > + > + /* > + * Disallow 2-way coherency for any L3 cache policy because > + * XE_L3_POLICY_UC could still be promoted to a cached policy > + * by MOCS indices. > + */ > + return has_wa && xe_pat_index_get_coh_mode(xe, pat_index) == XE_COH_2WAY; > +} > + > +static u32 wa_14026539277_fixup_pat_value(struct xe_gt *gt, u32 value) > +{ > + if (XE_GT_WA(gt, 14026539277)) { > + if (REG_FIELD_GET(XE2_COH_MODE, value) == XE_COH_2WAY) { > + value &= ~(XE2_L3_POLICY | XE2_COH_MODE); > + value |= REG_FIELD_PREP(XE2_L3_POLICY, XE_L3_POLICY_UC) | > + REG_FIELD_PREP(XE2_COH_MODE, XE_COH_1WAY); > + } > + } > + > + return value; > +} > + > static const struct xe_pat_table_entry *gt_pta_entry(struct xe_gt *gt) > { > struct xe_device *xe = gt_to_xe(gt); > @@ -373,18 +407,22 @@ static void program_pat_mcr(struct xe_gt *gt, const struct xe_pat_table_entry ta > > for (int i = 0; i < n_entries; i++) { > struct xe_reg_mcr reg_mcr = XE_REG_MCR(_PAT_INDEX(i)); > + u32 pat = wa_14026539277_fixup_pat_value(gt, table[i].value); > > - xe_gt_mcr_multicast_write(gt, reg_mcr, table[i].value); > + xe_gt_mcr_multicast_write(gt, reg_mcr, pat); > } > > if (xe->pat.pat_ats) > - xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_ATS), xe->pat.pat_ats->value); > + xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_ATS), > + wa_14026539277_fixup_pat_value(gt, xe->pat.pat_ats->value)); > > if (pta_entry) > - xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_PTA), pta_entry->value); > + xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_PTA), > + wa_14026539277_fixup_pat_value(gt, pta_entry->value)); > > if (tr_pta_entry) > - xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_TR_PTA), tr_pta_entry->value); > + xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_TR_PTA), > + wa_14026539277_fixup_pat_value(gt, tr_pta_entry->value)); > } > > static int xelp_dump(struct xe_gt *gt, struct drm_printer *p) > @@ -534,13 +572,16 @@ static int xe2_dump(struct xe_gt *gt, struct drm_printer *p) > drm_printf(p, "PAT table: (* = reserved entry)\n"); > > for (i = 0; i < xe->pat.n_entries; i++) { > + bool rsvd = !xe->pat.table[i].valid || > + xe_pat_wa_14026539277_reserved(xe, i); > + > if (xe_gt_is_media_type(gt)) > pat = xe_mmio_read32(>->mmio, XE_REG(_PAT_INDEX(i))); > else > pat = xe_gt_mcr_unicast_read_any(gt, XE_REG_MCR(_PAT_INDEX(i))); > > xe_pat_index_label(label, sizeof(label), i); > - xe->pat.ops->entry_dump(p, label, pat, !xe->pat.table[i].valid); > + xe->pat.ops->entry_dump(p, label, pat, rsvd); > } > > /* > @@ -747,9 +788,14 @@ int xe_pat_dump_sw_config(struct xe_gt *gt, struct drm_printer *p) > for (u32 i = 0; i < xe->pat.n_entries; i++) { > u32 pat = xe->pat.table[i].value; > > + pat = wa_14026539277_fixup_pat_value(gt, pat); > + > if (GRAPHICS_VER(xe) >= 20) { > + bool rsvd = !xe->pat.table[i].valid || > + xe_pat_wa_14026539277_reserved(xe, i); > + > xe_pat_index_label(label, sizeof(label), i); > - xe->pat.ops->entry_dump(p, label, pat, !xe->pat.table[i].valid); > + xe->pat.ops->entry_dump(p, label, pat, rsvd); > } else if (xe->info.platform == XE_METEORLAKE) { > xelpg_pat_entry_dump(p, i, pat); > } else if (xe->info.platform == XE_PVC) { > @@ -764,6 +810,8 @@ int xe_pat_dump_sw_config(struct xe_gt *gt, struct drm_printer *p) > if (pta_entry) { > u32 pat = pta_entry->value; > > + pat = wa_14026539277_fixup_pat_value(gt, pat); > + > drm_printf(p, "Page Table Access:\n"); > xe->pat.ops->entry_dump(p, "PTA_MODE", pat, false); > } > @@ -771,6 +819,8 @@ int xe_pat_dump_sw_config(struct xe_gt *gt, struct drm_printer *p) > if (tr_pta_entry) { > u32 pat = tr_pta_entry->value; > > + pat = wa_14026539277_fixup_pat_value(gt, pat); > + > drm_printf(p, "TRTT Page Table Access:\n"); > xe->pat.ops->entry_dump(p, "TR_PTA_MODE", pat, false); > } > @@ -778,6 +828,8 @@ int xe_pat_dump_sw_config(struct xe_gt *gt, struct drm_printer *p) > if (xe->pat.pat_ats) { > u32 pat = xe->pat.pat_ats->value; > > + pat = wa_14026539277_fixup_pat_value(gt, pat); > + > drm_printf(p, "PCIe ATS/PASID:\n"); > xe->pat.ops->entry_dump(p, "PAT_ATS ", pat, false); > } > diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c > index 19b3d0be7928..92a1d5098aac 100644 > --- a/drivers/gpu/drm/xe/xe_vm.c > +++ b/drivers/gpu/drm/xe/xe_vm.c > @@ -3829,6 +3829,11 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe, struct xe_vm *vm, > goto free_bind_ops; > } > > + if (XE_IOCTL_DBG(xe, xe_pat_wa_14026539277_reserved(xe, pat_index))) { > + err = -EINVAL; > + goto free_bind_ops; > + } > + > if (XE_IOCTL_DBG(xe, op > DRM_XE_VM_BIND_OP_PREFETCH) || > XE_IOCTL_DBG(xe, flags & ~SUPPORTED_FLAGS) || > XE_IOCTL_DBG(xe, obj && (is_null || is_cpu_addr_mirror)) || > diff --git a/drivers/gpu/drm/xe/xe_vm_madvise.c b/drivers/gpu/drm/xe/xe_vm_madvise.c > index 0474768a38aa..265273294756 100644 > --- a/drivers/gpu/drm/xe/xe_vm_madvise.c > +++ b/drivers/gpu/drm/xe/xe_vm_madvise.c > @@ -500,6 +500,9 @@ static bool check_pat_args_are_sane(struct xe_device *xe, > u16 coh_mode = xe_pat_index_get_coh_mode(xe, pat_index); > int i; > > + if (XE_IOCTL_DBG(xe, xe_pat_wa_14026539277_reserved(xe, pat_index))) > + return false; > + > /* > * Using coh_none with CPU cached buffers is not allowed on iGPU. > * On iGPU the GPU shares the LLC with the CPU, so with coh_none > diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules > index dd69ad07f7a9..46290d039fa8 100644 > --- a/drivers/gpu/drm/xe/xe_wa_oob.rules > +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules > @@ -71,4 +71,5 @@ > GRAPHICS_VERSION(3511) > 16029897822 MEDIA_VERSION(3500) > GRAPHICS_VERSION(3510) > +14026539277 GRAPHICS_VERSION(3510), GRAPHICS_STEP(A0, B0) > 14027054324 GRAPHICS_VERSION(3511) > > -- > 2.55.0 ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v3 3/3] drm/xe: Add up-to-date implementation for Wa_14026539277 2026-08-21 21:42 ` Gustavo Sousa @ 2026-08-24 6:59 ` Hazubski, Filip 0 siblings, 0 replies; 11+ messages in thread From: Hazubski, Filip @ 2026-08-24 6:59 UTC (permalink / raw) To: Sousa, Gustavo, Souza, Jose Cc: intel-xe@lists.freedesktop.org, Auld, Matthew [-- Attachment #1: Type: text/plain, Size: 13115 bytes --] Ack from Compute side. Filip ________________________________ From: Sousa, Gustavo <gustavo.sousa@intel.com> Sent: Friday, August 21, 2026 11:42 PM To: Souza, Jose <jose.souza@intel.com>; Hazubski, Filip <filip.hazubski@intel.com> Cc: intel-xe@lists.freedesktop.org <intel-xe@lists.freedesktop.org>; Auld, Matthew <matthew.auld@intel.com> Subject: Re: [PATCH v3 3/3] drm/xe: Add up-to-date implementation for Wa_14026539277 Gustavo Sousa <gustavo.sousa@intel.com> writes: > Wa_14026539277 is a temporary workaround that targets only A* > steppings of graphics version 35.10 and requires that we avoid using > 2-way coherency for device-cacheable memory accesses. For > driver-internal usage, we convert those configurations to be > device-uncached and 1-way-coherent; on the UAPI side, we reject > VM_BIND/MADVISE calls that are 2-way-coherent and leave it up to > userspace to select the alternative option that is most appropriate to > their usage. > > v2: > - Add missing bits to convert the PAT value to device-uncacheable in > wa_14026539277_fixup_pat_value(). (Sashiko) > - Also validate the PAT index in the DRM_XE_VM_MADVISE > ioctl. (Sashiko) > - Match against the graphics IP instead of the platform. > v3: > - Handle any 2-way-coherent PAT index irrespective of L3 cache > policy, because L3 UC can be promoted to cached by MOCS. (Matt) > > Cc: José Roberto de Souza <jose.souza@intel.com> > Cc: Filip Hazubski <filip.hazubski@intel.com> José and Filip, I would like to request new acks for this patch, because now it rejects any 2-way-coherent PAT index, not only those that are device-cacheable. -- Gustavo Sousa > Reviewed-by: Matthew Auld <matthew.auld@intel.com> > Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com> > --- > drivers/gpu/drm/xe/xe_pat.h | 10 ++++++ > drivers/gpu/drm/xe/xe_device.c | 16 ++++++---- > drivers/gpu/drm/xe/xe_pat.c | 64 ++++++++++++++++++++++++++++++++++---- > drivers/gpu/drm/xe/xe_vm.c | 5 +++ > drivers/gpu/drm/xe/xe_vm_madvise.c | 3 ++ > drivers/gpu/drm/xe/xe_wa_oob.rules | 1 + > 6 files changed, 87 insertions(+), 12 deletions(-) > > diff --git a/drivers/gpu/drm/xe/xe_pat.h b/drivers/gpu/drm/xe/xe_pat.h > index 7060f66e1d63..10374022f1d2 100644 > --- a/drivers/gpu/drm/xe/xe_pat.h > +++ b/drivers/gpu/drm/xe/xe_pat.h > @@ -82,6 +82,16 @@ bool xe_pat_index_get_comp_en(struct xe_device *xe, u16 pat_index); > */ > u16 xe_pat_index_get_l3_policy(struct xe_device *xe, u16 pat_index); > > +/** > + * xe_pat_wa_14026539277_reserved - Is this PAT index reserved from > + * use due to Wa_14026539277? > + * @xe: xe device > + * @pat_index: The pat_index to query > + * > + * Return: a boolean indicating whether the PAT index is reserved or not. > + */ > +bool xe_pat_wa_14026539277_reserved(struct xe_device *xe, u16 pat_index); > + > #define xe_cache_pat_idx(xe, cache_mode) ({ \ > const struct xe_device *__xedev = (xe); \ > enum xe_cache_level __mode = (cache_mode); \ > diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c > index ccf7ef3cf3e7..516da74b542f 100644 > --- a/drivers/gpu/drm/xe/xe_device.c > +++ b/drivers/gpu/drm/xe/xe_device.c > @@ -847,14 +847,18 @@ static void override_has_cached_pt(struct xe_device *xe) > struct xe_gt *gt; > u8 id; > > - /* > - * Wa_16029380221: The affected GT will always use non-coherent > - * access to page tables, so we must do uncached writes from the > - * CPU. > - */ > - for_each_gt(gt, xe, id) > + for_each_gt(gt, xe, id) { > + /* > + * Wa_16029380221: The affected GT will always use > + * non-coherent access to page tables, so we must do > + * uncached writes from the CPU. > + */ > if (XE_GT_WA(gt, 16029380221)) > xe->info.has_cached_pt = false; > + > + if (XE_GT_WA(gt, 14026539277)) > + xe->info.has_cached_pt = false; > + } > } > > static int probe_has_flat_ccs(struct xe_device *xe) > diff --git a/drivers/gpu/drm/xe/xe_pat.c b/drivers/gpu/drm/xe/xe_pat.c > index a5fe1beec652..66378128377c 100644 > --- a/drivers/gpu/drm/xe/xe_pat.c > +++ b/drivers/gpu/drm/xe/xe_pat.c > @@ -313,6 +313,40 @@ u16 xe_pat_index_get_l3_policy(struct xe_device *xe, u16 pat_index) > return REG_FIELD_GET(XE2_L3_POLICY, xe->pat.table[pat_index].value); > } > > +bool xe_pat_wa_14026539277_reserved(struct xe_device *xe, u16 pat_index) > +{ > + struct xe_gt *gt; > + u8 id; > + bool has_wa = false; > + > + for_each_gt(gt, xe, id) { > + if (XE_GT_WA(gt, 14026539277)) { > + has_wa = true; > + break; > + } > + } > + > + /* > + * Disallow 2-way coherency for any L3 cache policy because > + * XE_L3_POLICY_UC could still be promoted to a cached policy > + * by MOCS indices. > + */ > + return has_wa && xe_pat_index_get_coh_mode(xe, pat_index) == XE_COH_2WAY; > +} > + > +static u32 wa_14026539277_fixup_pat_value(struct xe_gt *gt, u32 value) > +{ > + if (XE_GT_WA(gt, 14026539277)) { > + if (REG_FIELD_GET(XE2_COH_MODE, value) == XE_COH_2WAY) { > + value &= ~(XE2_L3_POLICY | XE2_COH_MODE); > + value |= REG_FIELD_PREP(XE2_L3_POLICY, XE_L3_POLICY_UC) | > + REG_FIELD_PREP(XE2_COH_MODE, XE_COH_1WAY); > + } > + } > + > + return value; > +} > + > static const struct xe_pat_table_entry *gt_pta_entry(struct xe_gt *gt) > { > struct xe_device *xe = gt_to_xe(gt); > @@ -373,18 +407,22 @@ static void program_pat_mcr(struct xe_gt *gt, const struct xe_pat_table_entry ta > > for (int i = 0; i < n_entries; i++) { > struct xe_reg_mcr reg_mcr = XE_REG_MCR(_PAT_INDEX(i)); > + u32 pat = wa_14026539277_fixup_pat_value(gt, table[i].value); > > - xe_gt_mcr_multicast_write(gt, reg_mcr, table[i].value); > + xe_gt_mcr_multicast_write(gt, reg_mcr, pat); > } > > if (xe->pat.pat_ats) > - xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_ATS), xe->pat.pat_ats->value); > + xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_ATS), > + wa_14026539277_fixup_pat_value(gt, xe->pat.pat_ats->value)); > > if (pta_entry) > - xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_PTA), pta_entry->value); > + xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_PTA), > + wa_14026539277_fixup_pat_value(gt, pta_entry->value)); > > if (tr_pta_entry) > - xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_TR_PTA), tr_pta_entry->value); > + xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_TR_PTA), > + wa_14026539277_fixup_pat_value(gt, tr_pta_entry->value)); > } > > static int xelp_dump(struct xe_gt *gt, struct drm_printer *p) > @@ -534,13 +572,16 @@ static int xe2_dump(struct xe_gt *gt, struct drm_printer *p) > drm_printf(p, "PAT table: (* = reserved entry)\n"); > > for (i = 0; i < xe->pat.n_entries; i++) { > + bool rsvd = !xe->pat.table[i].valid || > + xe_pat_wa_14026539277_reserved(xe, i); > + > if (xe_gt_is_media_type(gt)) > pat = xe_mmio_read32(>->mmio, XE_REG(_PAT_INDEX(i))); > else > pat = xe_gt_mcr_unicast_read_any(gt, XE_REG_MCR(_PAT_INDEX(i))); > > xe_pat_index_label(label, sizeof(label), i); > - xe->pat.ops->entry_dump(p, label, pat, !xe->pat.table[i].valid); > + xe->pat.ops->entry_dump(p, label, pat, rsvd); > } > > /* > @@ -747,9 +788,14 @@ int xe_pat_dump_sw_config(struct xe_gt *gt, struct drm_printer *p) > for (u32 i = 0; i < xe->pat.n_entries; i++) { > u32 pat = xe->pat.table[i].value; > > + pat = wa_14026539277_fixup_pat_value(gt, pat); > + > if (GRAPHICS_VER(xe) >= 20) { > + bool rsvd = !xe->pat.table[i].valid || > + xe_pat_wa_14026539277_reserved(xe, i); > + > xe_pat_index_label(label, sizeof(label), i); > - xe->pat.ops->entry_dump(p, label, pat, !xe->pat.table[i].valid); > + xe->pat.ops->entry_dump(p, label, pat, rsvd); > } else if (xe->info.platform == XE_METEORLAKE) { > xelpg_pat_entry_dump(p, i, pat); > } else if (xe->info.platform == XE_PVC) { > @@ -764,6 +810,8 @@ int xe_pat_dump_sw_config(struct xe_gt *gt, struct drm_printer *p) > if (pta_entry) { > u32 pat = pta_entry->value; > > + pat = wa_14026539277_fixup_pat_value(gt, pat); > + > drm_printf(p, "Page Table Access:\n"); > xe->pat.ops->entry_dump(p, "PTA_MODE", pat, false); > } > @@ -771,6 +819,8 @@ int xe_pat_dump_sw_config(struct xe_gt *gt, struct drm_printer *p) > if (tr_pta_entry) { > u32 pat = tr_pta_entry->value; > > + pat = wa_14026539277_fixup_pat_value(gt, pat); > + > drm_printf(p, "TRTT Page Table Access:\n"); > xe->pat.ops->entry_dump(p, "TR_PTA_MODE", pat, false); > } > @@ -778,6 +828,8 @@ int xe_pat_dump_sw_config(struct xe_gt *gt, struct drm_printer *p) > if (xe->pat.pat_ats) { > u32 pat = xe->pat.pat_ats->value; > > + pat = wa_14026539277_fixup_pat_value(gt, pat); > + > drm_printf(p, "PCIe ATS/PASID:\n"); > xe->pat.ops->entry_dump(p, "PAT_ATS ", pat, false); > } > diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c > index 19b3d0be7928..92a1d5098aac 100644 > --- a/drivers/gpu/drm/xe/xe_vm.c > +++ b/drivers/gpu/drm/xe/xe_vm.c > @@ -3829,6 +3829,11 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe, struct xe_vm *vm, > goto free_bind_ops; > } > > + if (XE_IOCTL_DBG(xe, xe_pat_wa_14026539277_reserved(xe, pat_index))) { > + err = -EINVAL; > + goto free_bind_ops; > + } > + > if (XE_IOCTL_DBG(xe, op > DRM_XE_VM_BIND_OP_PREFETCH) || > XE_IOCTL_DBG(xe, flags & ~SUPPORTED_FLAGS) || > XE_IOCTL_DBG(xe, obj && (is_null || is_cpu_addr_mirror)) || > diff --git a/drivers/gpu/drm/xe/xe_vm_madvise.c b/drivers/gpu/drm/xe/xe_vm_madvise.c > index 0474768a38aa..265273294756 100644 > --- a/drivers/gpu/drm/xe/xe_vm_madvise.c > +++ b/drivers/gpu/drm/xe/xe_vm_madvise.c > @@ -500,6 +500,9 @@ static bool check_pat_args_are_sane(struct xe_device *xe, > u16 coh_mode = xe_pat_index_get_coh_mode(xe, pat_index); > int i; > > + if (XE_IOCTL_DBG(xe, xe_pat_wa_14026539277_reserved(xe, pat_index))) > + return false; > + > /* > * Using coh_none with CPU cached buffers is not allowed on iGPU. > * On iGPU the GPU shares the LLC with the CPU, so with coh_none > diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules > index dd69ad07f7a9..46290d039fa8 100644 > --- a/drivers/gpu/drm/xe/xe_wa_oob.rules > +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules > @@ -71,4 +71,5 @@ > GRAPHICS_VERSION(3511) > 16029897822 MEDIA_VERSION(3500) > GRAPHICS_VERSION(3510) > +14026539277 GRAPHICS_VERSION(3510), GRAPHICS_STEP(A0, B0) > 14027054324 GRAPHICS_VERSION(3511) > > -- > 2.55.0 --------------------------------------------------------------------- Intel Technology Poland sp. z o.o. ul. Slowackiego 173 | 80-298 Gdansk | Sad Rejonowy Gdansk Polnoc | VII Wydzial Gospodarczy Krajowego Rejestru Sadowego - KRS 101882 | NIP 957-07-52-316 | Kapital zakladowy 200.000 PLN. Spolka oswiadcza, ze posiada status duzego przedsiebiorcy w rozumieniu ustawy z dnia 8 marca 2013 r. o przeciwdzialaniu nadmiernym opoznieniom w transakcjach handlowych. Ta wiadomosc wraz z zalacznikami jest przeznaczona dla okreslonego adresata i moze zawierac informacje poufne. W razie przypadkowego otrzymania tej wiadomosci, prosimy o powiadomienie nadawcy oraz trwale jej usuniecie; jakiekolwiek przegladanie lub rozpowszechnianie jest zabronione. This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). If you are not the intended recipient, please contact the sender and delete all copies; any review or distribution by others is strictly prohibited. [-- Attachment #2: Type: text/html, Size: 25953 bytes --] ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v3 3/3] drm/xe: Add up-to-date implementation for Wa_14026539277 2026-08-21 21:36 ` [PATCH v3 3/3] drm/xe: Add up-to-date implementation for Wa_14026539277 Gustavo Sousa 2026-08-21 21:42 ` Gustavo Sousa @ 2026-08-21 21:52 ` sashiko-bot 1 sibling, 0 replies; 11+ messages in thread From: sashiko-bot @ 2026-08-21 21:52 UTC (permalink / raw) To: Gustavo Sousa; +Cc: intel-xe Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: Pre-existing issues: - [High] Spectre v1 vulnerability due to missing use of mitigated array index in `xe_vm_madvise_ioctl`. -- --- Patch [3]: [PATCH v3 3/3] drm/xe: Add up-to-date implementation for Wa_14026539277 --- commit a64f477e6e9a2ceb517c012bf3dbfd5ac3afdd27 Author: Gustavo Sousa <gustavo.sousa@intel.com> Subject: drm/xe: Add up-to-date implementation for Wa_14026539277 This commit updates the implementation for Wa_14026539277. It converts device-cacheable accesses to device-uncached and 1-way-coherent for driver-internal usage, and rejects 2-way-coherent VM_BIND/MADVISE calls on the UAPI side. [ ... ] > diff --git a/drivers/gpu/drm/xe/xe_vm_madvise.c b/drivers/gpu/drm/xe/xe_vm_madvise.c > index 0474768a38aaa..265273294756c 100644 > --- a/drivers/gpu/drm/xe/xe_vm_madvise.c > +++ b/drivers/gpu/drm/xe/xe_vm_madvise.c > @@ -500,6 +500,9 @@ static bool check_pat_args_are_sane(struct xe_device *xe, > u16 coh_mode = xe_pat_index_get_coh_mode(xe, pat_index); > int i; > > + if (XE_IOCTL_DBG(xe, xe_pat_wa_14026539277_reserved(xe, pat_index))) > + return false; > + [Severity: High] This is a pre-existing issue, but does this addition exacerbate a Spectre v1 vulnerability by adding another speculative out-of-bounds access? In xe_vm_madvise_ioctl(), array_index_nospec() is used to mitigate the index, but its result is discarded and the raw unmitigated args->pat_index.val is passed to check_pat_args_are_sane(): drivers/gpu/drm/xe/xe_vm_madvise.c:xe_vm_madvise_ioctl() { ... pat_index = array_index_nospec(args->pat_index.val, xe->pat.n_entries); coh_mode = xe_pat_index_get_coh_mode(xe, pat_index); ... if (args->type == DRM_XE_MEM_RANGE_ATTR_PAT) { if (!check_pat_args_are_sane(xe, &madvise_range, args->pat_index.val)) { ... } This means check_pat_args_are_sane() receives the unmitigated index. It then passes it to xe_pat_index_get_coh_mode() and now to xe_pat_wa_14026539277_reserved(), both of which will access the xe->pat.table array. Since the ioctl is accessible to userspace, an attacker could provide a maliciously crafted args->pat_index.val exceeding xe->pat.n_entries and trigger speculative out-of-bounds array reads. Should the caller be updated to pass the mitigated pat_index? > /* > * Using coh_none with CPU cached buffers is not allowed on iGPU. > * On iGPU the GPU shares the LLC with the CPU, so with coh_none -- Sashiko AI review · https://sashiko.dev/#/patchset/20260821-wa_14026539277-v3-0-1f98c2af12f6@intel.com?part=3 ^ permalink raw reply [flat|nested] 11+ messages in thread
* ✗ CI.checkpatch: warning for drm/xe: Update Wa_14026539277 2026-08-21 21:36 [PATCH v3 0/3] drm/xe: Update Wa_14026539277 Gustavo Sousa ` (2 preceding siblings ...) 2026-08-21 21:36 ` [PATCH v3 3/3] drm/xe: Add up-to-date implementation for Wa_14026539277 Gustavo Sousa @ 2026-08-21 21:43 ` Patchwork 2026-08-21 21:44 ` ✓ CI.KUnit: success " Patchwork ` (2 subsequent siblings) 6 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2026-08-21 21:43 UTC (permalink / raw) To: Gustavo Sousa; +Cc: intel-xe == Series Details == Series: drm/xe: Update Wa_14026539277 URL : https://patchwork.freedesktop.org/series/172611/ State : warning == Summary == + KERNEL=/kernel + git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt Cloning into 'mt'... warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/ + git -C mt rev-list -n1 origin/master 061140b9bc586ae7f40abc1249c97e1cc72d1b9d + cd /kernel + git config --global --add safe.directory /kernel + git log -n1 commit 34e373c10b4bed0798def42346f617db75ed7457 Author: Gustavo Sousa <gustavo.sousa@intel.com> Date: Fri Aug 21 18:36:49 2026 -0300 drm/xe: Add up-to-date implementation for Wa_14026539277 Wa_14026539277 is a temporary workaround that targets only A* steppings of graphics version 35.10 and requires that we avoid using 2-way coherency for device-cacheable memory accesses. For driver-internal usage, we convert those configurations to be device-uncached and 1-way-coherent; on the UAPI side, we reject VM_BIND/MADVISE calls that are 2-way-coherent and leave it up to userspace to select the alternative option that is most appropriate to their usage. v2: - Add missing bits to convert the PAT value to device-uncacheable in wa_14026539277_fixup_pat_value(). (Sashiko) - Also validate the PAT index in the DRM_XE_VM_MADVISE ioctl. (Sashiko) - Match against the graphics IP instead of the platform. v3: - Handle any 2-way-coherent PAT index irrespective of L3 cache policy, because L3 UC can be promoted to cached by MOCS. (Matt) Cc: José Roberto de Souza <jose.souza@intel.com> Cc: Filip Hazubski <filip.hazubski@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com> + /mt/dim checkpatch 58d59a40e2a041d3c159fab8bf5d5dc19d28da6c drm-intel d6af86deff52 drm/xe: Extract override_has_cached_pt() 5a247e796589 Revert "drm/xe/nvlp: Implement Wa_14026539277" 34e373c10b4b drm/xe: Add up-to-date implementation for Wa_14026539277 -:120: WARNING:LONG_LINE: line length of 102 exceeds 100 columns #120: FILE: drivers/gpu/drm/xe/xe_pat.c:417: + wa_14026539277_fixup_pat_value(gt, xe->pat.pat_ats->value)); total: 0 errors, 1 warnings, 0 checks, 187 lines checked ^ permalink raw reply [flat|nested] 11+ messages in thread
* ✓ CI.KUnit: success for drm/xe: Update Wa_14026539277 2026-08-21 21:36 [PATCH v3 0/3] drm/xe: Update Wa_14026539277 Gustavo Sousa ` (3 preceding siblings ...) 2026-08-21 21:43 ` ✗ CI.checkpatch: warning for drm/xe: Update Wa_14026539277 Patchwork @ 2026-08-21 21:44 ` Patchwork 2026-08-21 22:42 ` ✓ Xe.CI.BAT: " Patchwork 2026-08-21 23:52 ` ✗ Xe.CI.FULL: failure " Patchwork 6 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2026-08-21 21:44 UTC (permalink / raw) To: Gustavo Sousa; +Cc: intel-xe == Series Details == Series: drm/xe: Update Wa_14026539277 URL : https://patchwork.freedesktop.org/series/172611/ State : success == Summary == + trap cleanup EXIT + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig [21:43:19] Configuring KUnit Kernel ... Generating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [21:43:24] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [21:43:56] Starting KUnit Kernel (1/1)... [21:43:56] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [21:43:56] ================== guc_buf (11 subtests) =================== [21:43:56] [PASSED] test_smallest [21:43:56] [PASSED] test_largest [21:43:56] [PASSED] test_granular [21:43:56] [PASSED] test_unique [21:43:56] [PASSED] test_overlap [21:43:56] [PASSED] test_reusable [21:43:56] [PASSED] test_too_big [21:43:56] [PASSED] test_flush [21:43:56] [PASSED] test_lookup [21:43:56] [PASSED] test_data [21:43:56] [PASSED] test_class [21:43:56] ===================== [PASSED] guc_buf ===================== [21:43:56] =================== guc_dbm (7 subtests) =================== [21:43:56] [PASSED] test_empty [21:43:56] [PASSED] test_default [21:43:56] ======================== test_size ======================== [21:43:56] [PASSED] 4 [21:43:56] [PASSED] 8 [21:43:56] [PASSED] 32 [21:43:56] [PASSED] 256 [21:43:56] ==================== [PASSED] test_size ==================== [21:43:56] ======================= test_reuse ======================== [21:43:56] [PASSED] 4 [21:43:56] [PASSED] 8 [21:43:56] [PASSED] 32 [21:43:56] [PASSED] 256 [21:43:56] =================== [PASSED] test_reuse ==================== [21:43:56] =================== test_range_overlap ==================== [21:43:56] [PASSED] 4 [21:43:56] [PASSED] 8 [21:43:56] [PASSED] 32 [21:43:56] [PASSED] 256 [21:43:56] =============== [PASSED] test_range_overlap ================ [21:43:56] =================== test_range_compact ==================== [21:43:56] [PASSED] 4 [21:43:56] [PASSED] 8 [21:43:56] [PASSED] 32 [21:43:56] [PASSED] 256 [21:43:56] =============== [PASSED] test_range_compact ================ [21:43:56] ==================== test_range_spare ===================== [21:43:56] [PASSED] 4 [21:43:56] [PASSED] 8 [21:43:56] [PASSED] 32 [21:43:56] [PASSED] 256 [21:43:56] ================ [PASSED] test_range_spare ================= [21:43:56] ===================== [PASSED] guc_dbm ===================== [21:43:56] =================== guc_idm (6 subtests) =================== [21:43:56] [PASSED] bad_init [21:43:56] [PASSED] no_init [21:43:56] [PASSED] init_fini [21:43:56] [PASSED] check_used [21:43:56] [PASSED] check_quota [21:43:56] [PASSED] check_all [21:43:56] ===================== [PASSED] guc_idm ===================== [21:43:56] =============== guc_klv_helpers (9 subtests) =============== [21:43:56] [PASSED] test_count [21:43:56] [PASSED] test_encode_u32 [21:43:56] [PASSED] test_encode_u64 [21:43:56] [PASSED] test_encode_string [21:43:56] [PASSED] test_encode_object_raw [21:43:56] [PASSED] test_encode_object_klv [21:43:56] [PASSED] test_encode_object_nested [21:43:56] [PASSED] test_encode_object_basic [21:43:56] [PASSED] test_print [21:43:56] ================= [PASSED] guc_klv_helpers ================= [21:43:56] =================== xe_log (4 subtests) ==================== [21:43:56] [PASSED] demo_cper [21:43:56] [PASSED] demo_dmesg [21:43:56] ======================= test_dmesg ======================== [21:43:56] [PASSED] test_fatal [21:43:56] [PASSED] test_fatal_tile [21:43:56] [PASSED] test_fatal_gt [21:43:56] [PASSED] test_fatal_comp [21:43:56] [PASSED] test_fatal_comp_tile [21:43:56] [PASSED] test_fatal_comp_gt [21:43:56] [PASSED] test_fatal_all [21:43:56] [PASSED] test_recoverable [21:43:56] [PASSED] test_recoverable_tile [21:43:56] [PASSED] test_recoverable_gt [21:43:56] [PASSED] test_recoverable_comp [21:43:56] [PASSED] test_recoverable_comp_tile [21:43:56] [PASSED] test_recoverable_comp_gt [21:43:56] [PASSED] test_recoverable_all [21:43:56] [PASSED] test_info [21:43:56] [PASSED] test_info_tile [21:43:56] [PASSED] test_info_gt [21:43:56] [PASSED] test_info_err [21:43:56] [PASSED] test_info_comp [21:43:56] [PASSED] test_info_comp_tile [21:43:56] [PASSED] test_info_comp_gt [21:43:56] [PASSED] test_info_all [21:43:56] [PASSED] test_hw_fatal [21:43:56] [PASSED] test_hw_recoverable [21:43:56] [PASSED] test_hw_corrected [21:43:56] [PASSED] test_hw_informational [21:43:56] =================== [PASSED] test_dmesg ==================== [21:43:56] ====================== test_invalid ======================= [21:43:56] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG) [21:43:56] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG) [21:43:56] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG) [21:43:56] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG) [21:43:56] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG) [21:43:56] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG) [21:43:56] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG) [21:43:56] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG) [21:43:56] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG) [21:43:56] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG) [21:43:56] ================== [SKIPPED] test_invalid ================== [21:43:56] ===================== [PASSED] xe_log ====================== [21:43:56] ================== no_relay (3 subtests) =================== [21:43:56] [PASSED] xe_drops_guc2pf_if_not_ready [21:43:56] [PASSED] xe_drops_guc2vf_if_not_ready [21:43:56] [PASSED] xe_rejects_send_if_not_ready [21:43:56] ==================== [PASSED] no_relay ===================== [21:43:56] ================== pf_relay (14 subtests) ================== [21:43:56] [PASSED] pf_rejects_guc2pf_too_short [21:43:56] [PASSED] pf_rejects_guc2pf_too_long [21:43:56] [PASSED] pf_rejects_guc2pf_no_payload [21:43:56] [PASSED] pf_fails_no_payload [21:43:56] [PASSED] pf_fails_bad_origin [21:43:56] [PASSED] pf_fails_bad_type [21:43:56] [PASSED] pf_txn_reports_error [21:43:56] [PASSED] pf_txn_sends_pf2guc [21:43:56] [PASSED] pf_sends_pf2guc [21:43:56] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV) [21:43:56] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV) [21:43:56] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV) [21:43:56] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV) [21:43:56] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV) [21:43:56] ==================== [PASSED] pf_relay ===================== [21:43:56] ================== vf_relay (3 subtests) =================== [21:43:56] [PASSED] vf_rejects_guc2vf_too_short [21:43:56] [PASSED] vf_rejects_guc2vf_too_long [21:43:56] [PASSED] vf_rejects_guc2vf_no_payload [21:43:56] ==================== [PASSED] vf_relay ===================== [21:43:56] ================ pf_gt_config (9 subtests) ================= [21:43:56] [PASSED] fair_contexts_1vf [21:43:56] [PASSED] fair_doorbells_1vf [21:43:56] [PASSED] fair_ggtt_1vf [21:43:56] ====================== fair_vram_1vf ====================== [21:43:56] [PASSED] 3.50 GiB [21:43:56] [PASSED] 11.5 GiB [21:43:56] [PASSED] 15.5 GiB [21:43:56] [PASSED] 31.5 GiB [21:43:56] [PASSED] 63.5 GiB [21:43:56] [PASSED] 1.91 GiB [21:43:56] ================== [PASSED] fair_vram_1vf ================== [21:43:56] ================ fair_vram_1vf_admin_only ================= [21:43:56] [PASSED] 3.50 GiB [21:43:56] [PASSED] 11.5 GiB [21:43:56] [PASSED] 15.5 GiB [21:43:56] [PASSED] 31.5 GiB [21:43:56] [PASSED] 63.5 GiB [21:43:56] [PASSED] 1.91 GiB [21:43:56] ============ [PASSED] fair_vram_1vf_admin_only ============= [21:43:56] ====================== fair_contexts ====================== [21:43:56] [PASSED] 1 VF [21:43:56] [PASSED] 2 VFs [21:43:56] [PASSED] 3 VFs [21:43:56] [PASSED] 4 VFs [21:43:56] [PASSED] 5 VFs [21:43:56] [PASSED] 6 VFs [21:43:56] [PASSED] 7 VFs [21:43:56] [PASSED] 8 VFs [21:43:56] [PASSED] 9 VFs [21:43:56] [PASSED] 10 VFs [21:43:56] [PASSED] 11 VFs [21:43:56] [PASSED] 12 VFs [21:43:56] [PASSED] 13 VFs [21:43:56] [PASSED] 14 VFs [21:43:56] [PASSED] 15 VFs [21:43:56] [PASSED] 16 VFs [21:43:56] [PASSED] 17 VFs [21:43:56] [PASSED] 18 VFs [21:43:56] [PASSED] 19 VFs [21:43:56] [PASSED] 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57 VFs [21:43:56] [PASSED] 58 VFs [21:43:56] [PASSED] 59 VFs [21:43:56] [PASSED] 60 VFs [21:43:56] [PASSED] 61 VFs [21:43:56] [PASSED] 62 VFs [21:43:56] [PASSED] 63 VFs [21:43:56] ================== [PASSED] fair_contexts ================== [21:43:56] ===================== fair_doorbells ====================== [21:43:56] [PASSED] 1 VF [21:43:56] [PASSED] 2 VFs [21:43:56] [PASSED] 3 VFs [21:43:56] [PASSED] 4 VFs [21:43:56] [PASSED] 5 VFs [21:43:56] [PASSED] 6 VFs [21:43:56] [PASSED] 7 VFs [21:43:56] [PASSED] 8 VFs [21:43:56] [PASSED] 9 VFs [21:43:56] [PASSED] 10 VFs [21:43:56] [PASSED] 11 VFs [21:43:56] [PASSED] 12 VFs [21:43:56] [PASSED] 13 VFs [21:43:56] [PASSED] 14 VFs [21:43:56] [PASSED] 15 VFs [21:43:56] [PASSED] 16 VFs [21:43:56] [PASSED] 17 VFs [21:43:56] [PASSED] 18 VFs [21:43:56] [PASSED] 19 VFs [21:43:56] [PASSED] 20 VFs [21:43:56] [PASSED] 21 VFs [21:43:56] [PASSED] 22 VFs [21:43:56] [PASSED] 23 VFs [21:43:56] [PASSED] 24 VFs [21:43:56] [PASSED] 25 VFs [21:43:56] [PASSED] 26 VFs [21:43:56] [PASSED] 27 VFs [21:43:56] [PASSED] 28 VFs [21:43:56] [PASSED] 29 VFs [21:43:56] [PASSED] 30 VFs [21:43:56] [PASSED] 31 VFs [21:43:56] [PASSED] 32 VFs [21:43:56] [PASSED] 33 VFs [21:43:56] [PASSED] 34 VFs [21:43:56] [PASSED] 35 VFs [21:43:56] [PASSED] 36 VFs [21:43:56] [PASSED] 37 VFs [21:43:56] [PASSED] 38 VFs [21:43:56] [PASSED] 39 VFs [21:43:56] [PASSED] 40 VFs [21:43:56] [PASSED] 41 VFs [21:43:56] [PASSED] 42 VFs [21:43:56] [PASSED] 43 VFs [21:43:56] [PASSED] 44 VFs [21:43:56] [PASSED] 45 VFs [21:43:56] [PASSED] 46 VFs [21:43:56] [PASSED] 47 VFs [21:43:56] [PASSED] 48 VFs [21:43:56] [PASSED] 49 VFs [21:43:56] [PASSED] 50 VFs [21:43:56] [PASSED] 51 VFs [21:43:56] [PASSED] 52 VFs [21:43:56] [PASSED] 53 VFs [21:43:56] [PASSED] 54 VFs [21:43:56] [PASSED] 55 VFs [21:43:56] [PASSED] 56 VFs [21:43:56] [PASSED] 57 VFs [21:43:56] [PASSED] 58 VFs [21:43:56] [PASSED] 59 VFs [21:43:56] [PASSED] 60 VFs [21:43:56] [PASSED] 61 VFs [21:43:56] [PASSED] 62 VFs [21:43:56] [PASSED] 63 VFs [21:43:56] ================= [PASSED] fair_doorbells ================== [21:43:56] ======================== fair_ggtt ======================== [21:43:56] [PASSED] 1 VF [21:43:56] [PASSED] 2 VFs [21:43:56] [PASSED] 3 VFs [21:43:56] [PASSED] 4 VFs [21:43:56] [PASSED] 5 VFs [21:43:56] [PASSED] 6 VFs [21:43:56] [PASSED] 7 VFs [21:43:56] [PASSED] 8 VFs [21:43:56] [PASSED] 9 VFs [21:43:56] [PASSED] 10 VFs [21:43:56] [PASSED] 11 VFs [21:43:56] [PASSED] 12 VFs [21:43:56] [PASSED] 13 VFs [21:43:56] [PASSED] 14 VFs [21:43:56] [PASSED] 15 VFs [21:43:56] [PASSED] 16 VFs [21:43:56] [PASSED] 17 VFs [21:43:56] [PASSED] 18 VFs [21:43:56] [PASSED] 19 VFs [21:43:56] [PASSED] 20 VFs [21:43:56] [PASSED] 21 VFs [21:43:56] [PASSED] 22 VFs [21:43:56] [PASSED] 23 VFs [21:43:56] [PASSED] 24 VFs [21:43:56] [PASSED] 25 VFs [21:43:56] [PASSED] 26 VFs [21:43:56] [PASSED] 27 VFs [21:43:56] [PASSED] 28 VFs [21:43:56] [PASSED] 29 VFs [21:43:56] [PASSED] 30 VFs [21:43:56] [PASSED] 31 VFs [21:43:56] [PASSED] 32 VFs [21:43:56] [PASSED] 33 VFs [21:43:56] [PASSED] 34 VFs [21:43:56] [PASSED] 35 VFs [21:43:56] [PASSED] 36 VFs [21:43:56] [PASSED] 37 VFs [21:43:56] [PASSED] 38 VFs [21:43:56] [PASSED] 39 VFs [21:43:56] [PASSED] 40 VFs [21:43:56] [PASSED] 41 VFs [21:43:56] [PASSED] 42 VFs [21:43:56] [PASSED] 43 VFs [21:43:56] [PASSED] 44 VFs [21:43:56] [PASSED] 45 VFs [21:43:56] [PASSED] 46 VFs [21:43:56] [PASSED] 47 VFs [21:43:56] [PASSED] 48 VFs [21:43:56] [PASSED] 49 VFs [21:43:56] [PASSED] 50 VFs [21:43:56] [PASSED] 51 VFs [21:43:56] [PASSED] 52 VFs [21:43:56] [PASSED] 53 VFs [21:43:56] [PASSED] 54 VFs [21:43:56] [PASSED] 55 VFs [21:43:56] [PASSED] 56 VFs [21:43:56] [PASSED] 57 VFs [21:43:56] [PASSED] 58 VFs [21:43:56] [PASSED] 59 VFs [21:43:56] [PASSED] 60 VFs [21:43:56] [PASSED] 61 VFs [21:43:56] [PASSED] 62 VFs [21:43:56] [PASSED] 63 VFs [21:43:56] ==================== [PASSED] fair_ggtt ==================== [21:43:56] ======================== fair_vram ======================== [21:43:56] [PASSED] 1 VF [21:43:56] [PASSED] 2 VFs [21:43:56] [PASSED] 3 VFs [21:43:56] [PASSED] 4 VFs [21:43:56] [PASSED] 5 VFs [21:43:56] [PASSED] 6 VFs [21:43:56] [PASSED] 7 VFs [21:43:56] [PASSED] 8 VFs [21:43:56] [PASSED] 9 VFs [21:43:56] [PASSED] 10 VFs [21:43:56] [PASSED] 11 VFs [21:43:56] [PASSED] 12 VFs [21:43:56] [PASSED] 13 VFs [21:43:56] [PASSED] 14 VFs [21:43:56] [PASSED] 15 VFs [21:43:56] [PASSED] 16 VFs [21:43:56] [PASSED] 17 VFs [21:43:56] [PASSED] 18 VFs [21:43:56] [PASSED] 19 VFs [21:43:56] [PASSED] 20 VFs [21:43:56] [PASSED] 21 VFs [21:43:56] [PASSED] 22 VFs [21:43:56] [PASSED] 23 VFs [21:43:56] [PASSED] 24 VFs [21:43:56] [PASSED] 25 VFs [21:43:56] [PASSED] 26 VFs [21:43:56] [PASSED] 27 VFs [21:43:56] [PASSED] 28 VFs [21:43:56] [PASSED] 29 VFs [21:43:56] [PASSED] 30 VFs [21:43:56] [PASSED] 31 VFs [21:43:56] [PASSED] 32 VFs [21:43:56] [PASSED] 33 VFs [21:43:56] [PASSED] 34 VFs [21:43:56] [PASSED] 35 VFs [21:43:56] [PASSED] 36 VFs [21:43:56] [PASSED] 37 VFs [21:43:56] [PASSED] 38 VFs [21:43:56] [PASSED] 39 VFs [21:43:56] [PASSED] 40 VFs [21:43:56] [PASSED] 41 VFs [21:43:56] [PASSED] 42 VFs [21:43:56] [PASSED] 43 VFs [21:43:56] [PASSED] 44 VFs [21:43:56] [PASSED] 45 VFs [21:43:56] [PASSED] 46 VFs [21:43:56] [PASSED] 47 VFs [21:43:56] [PASSED] 48 VFs [21:43:56] [PASSED] 49 VFs [21:43:56] [PASSED] 50 VFs [21:43:56] [PASSED] 51 VFs [21:43:56] [PASSED] 52 VFs [21:43:56] [PASSED] 53 VFs [21:43:56] [PASSED] 54 VFs [21:43:56] [PASSED] 55 VFs [21:43:56] [PASSED] 56 VFs [21:43:56] [PASSED] 57 VFs [21:43:56] [PASSED] 58 VFs [21:43:56] [PASSED] 59 VFs [21:43:56] [PASSED] 60 VFs [21:43:56] [PASSED] 61 VFs [21:43:56] [PASSED] 62 VFs [21:43:56] [PASSED] 63 VFs [21:43:56] ==================== [PASSED] fair_vram ==================== [21:43:56] ================== [PASSED] pf_gt_config =================== [21:43:56] ===================== lmtt (1 subtest) ===================== [21:43:56] ======================== test_ops ========================= [21:43:56] [PASSED] 2-level [21:43:56] [PASSED] multi-level [21:43:56] ==================== [PASSED] test_ops ===================== [21:43:56] ====================== [PASSED] lmtt ======================= [21:43:56] ================= sriov_packet (1 subtest) ================= [21:43:56] [PASSED] test_descriptor_init [21:43:56] ================== [PASSED] sriov_packet =================== [21:43:56] ================= pf_service (11 subtests) ================= [21:43:56] [PASSED] pf_negotiate_any [21:43:56] [PASSED] pf_negotiate_base_match [21:43:56] [PASSED] pf_negotiate_base_newer [21:43:56] [PASSED] pf_negotiate_base_next [21:43:56] [SKIPPED] pf_negotiate_base_older (no older minor) [21:43:56] [PASSED] pf_negotiate_base_prev [21:43:56] [PASSED] pf_negotiate_latest_match [21:43:56] [PASSED] pf_negotiate_latest_newer [21:43:56] [PASSED] pf_negotiate_latest_next [21:43:56] [SKIPPED] pf_negotiate_latest_older (no older minor) [21:43:56] [SKIPPED] pf_negotiate_latest_prev (no prev major) [21:43:56] =================== [PASSED] pf_service ==================== [21:43:56] ================= xe_guc_g2g (2 subtests) ================== [21:43:56] ============== xe_live_guc_g2g_kunit_default ============== [21:43:56] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ========== [21:43:56] ============== xe_live_guc_g2g_kunit_allmem =============== [21:43:56] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ========== [21:43:56] =================== [SKIPPED] xe_guc_g2g =================== [21:43:56] =================== xe_mocs (2 subtests) =================== [21:43:56] ================ xe_live_mocs_kernel_kunit ================ [21:43:56] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============ [21:43:56] ================ xe_live_mocs_reset_kunit ================= [21:43:56] ============ [SKIPPED] xe_live_mocs_reset_kunit ============ [21:43:56] ==================== [SKIPPED] xe_mocs ===================== [21:43:56] ================= xe_migrate (2 subtests) ================== [21:43:56] ================= xe_migrate_sanity_kunit ================= [21:43:56] ============ [SKIPPED] xe_migrate_sanity_kunit ============= [21:43:56] ================== xe_validate_ccs_kunit ================== [21:43:56] ============= [SKIPPED] xe_validate_ccs_kunit ============== [21:43:56] =================== [SKIPPED] xe_migrate =================== [21:43:56] ================== xe_dma_buf (1 subtest) ================== [21:43:56] ==================== xe_dma_buf_kunit ===================== [21:43:56] ================ [SKIPPED] xe_dma_buf_kunit ================ [21:43:56] =================== [SKIPPED] xe_dma_buf =================== [21:43:56] ================= xe_bo_shrink (1 subtest) ================= [21:43:56] =================== xe_bo_shrink_kunit ==================== [21:43:56] =============== [SKIPPED] xe_bo_shrink_kunit =============== [21:43:56] ================== [SKIPPED] xe_bo_shrink ================== [21:43:56] ==================== xe_bo (2 subtests) ==================== [21:43:56] ================== xe_ccs_migrate_kunit =================== [21:43:56] ============== [SKIPPED] xe_ccs_migrate_kunit ============== [21:43:56] ==================== xe_bo_evict_kunit ==================== [21:43:56] =============== [SKIPPED] xe_bo_evict_kunit ================ [21:43:56] ===================== [SKIPPED] xe_bo ====================== [21:43:56] =================== xe_any (9 subtests) ==================== [21:43:56] [PASSED] test_to_xe [21:43:56] [PASSED] test_to_dev [21:43:56] [PASSED] test_to_pdev [21:43:56] [PASSED] test_to_drm [21:43:56] [PASSED] test_if_pdev [21:43:56] [PASSED] test_if_xe [21:43:56] [PASSED] test_if_tile [21:43:56] [PASSED] test_if_gt [21:43:56] [PASSED] test_to_id [21:43:56] ===================== [PASSED] xe_any ====================== [21:43:56] ==================== args (13 subtests) ==================== [21:43:56] [PASSED] count_args_test [21:43:56] [PASSED] call_args_example [21:43:56] [PASSED] call_args_test [21:43:56] [PASSED] drop_first_arg_example [21:43:56] [PASSED] drop_first_arg_test [21:43:56] [PASSED] first_arg_example [21:43:56] [PASSED] first_arg_test [21:43:56] [PASSED] last_arg_example [21:43:56] [PASSED] last_arg_test [21:43:56] [PASSED] pick_arg_example [21:43:56] [PASSED] if_args_example [21:43:56] [PASSED] if_args_test [21:43:56] [PASSED] sep_comma_example [21:43:56] ====================== [PASSED] args ======================= [21:43:56] =================== xe_pci (3 subtests) ==================== [21:43:56] ==================== check_graphics_ip ==================== [21:43:56] [PASSED] 12.00 Xe_LP [21:43:56] [PASSED] 12.10 Xe_LP+ [21:43:56] [PASSED] 12.55 Xe_HPG [21:43:56] [PASSED] 12.60 Xe_HPC [21:43:56] [PASSED] 12.70 Xe_LPG [21:43:56] [PASSED] 12.71 Xe_LPG [21:43:56] [PASSED] 12.74 Xe_LPG+ [21:43:56] [PASSED] 20.01 Xe2_HPG [21:43:56] [PASSED] 20.02 Xe2_HPG [21:43:56] [PASSED] 20.04 Xe2_LPG [21:43:56] [PASSED] 30.00 Xe3_LPG [21:43:56] [PASSED] 30.01 Xe3_LPG [21:43:56] [PASSED] 30.03 Xe3_LPG [21:43:56] [PASSED] 30.04 Xe3_LPG [21:43:56] [PASSED] 30.05 Xe3_LPG [21:43:56] [PASSED] 35.10 Xe3p_LPG [21:43:56] [PASSED] 35.11 Xe3p_XPC [21:43:56] ================ [PASSED] check_graphics_ip ================ [21:43:56] ===================== check_media_ip ====================== [21:43:56] [PASSED] 12.00 Xe_M [21:43:56] [PASSED] 12.55 Xe_HPM [21:43:56] [PASSED] 13.00 Xe_LPM+ [21:43:56] [PASSED] 13.01 Xe2_HPM [21:43:56] [PASSED] 20.00 Xe2_LPM [21:43:56] [PASSED] 30.00 Xe3_LPM [21:43:56] [PASSED] 30.02 Xe3_LPM [21:43:56] [PASSED] 35.00 Xe3p_LPM [21:43:56] [PASSED] 35.03 Xe3p_HPM [21:43:56] ================= [PASSED] check_media_ip ================== [21:43:56] =================== check_platform_desc =================== [21:43:56] [PASSED] 0x9A60 (TIGERLAKE) [21:43:56] [PASSED] 0x9A68 (TIGERLAKE) [21:43:56] [PASSED] 0x9A70 (TIGERLAKE) [21:43:56] [PASSED] 0x9A40 (TIGERLAKE) [21:43:56] [PASSED] 0x9A49 (TIGERLAKE) [21:43:56] [PASSED] 0x9A59 (TIGERLAKE) [21:43:56] [PASSED] 0x9A78 (TIGERLAKE) [21:43:56] [PASSED] 0x9AC0 (TIGERLAKE) [21:43:56] [PASSED] 0x9AC9 (TIGERLAKE) [21:43:56] [PASSED] 0x9AD9 (TIGERLAKE) [21:43:56] [PASSED] 0x9AF8 (TIGERLAKE) [21:43:56] [PASSED] 0x4C80 (ROCKETLAKE) [21:43:56] [PASSED] 0x4C8A (ROCKETLAKE) [21:43:56] [PASSED] 0x4C8B (ROCKETLAKE) [21:43:56] [PASSED] 0x4C8C (ROCKETLAKE) [21:43:56] [PASSED] 0x4C90 (ROCKETLAKE) [21:43:56] [PASSED] 0x4C9A (ROCKETLAKE) [21:43:56] [PASSED] 0x4680 (ALDERLAKE_S) [21:43:56] [PASSED] 0x4682 (ALDERLAKE_S) [21:43:56] [PASSED] 0x4688 (ALDERLAKE_S) [21:43:56] [PASSED] 0x468A (ALDERLAKE_S) [21:43:56] [PASSED] 0x468B (ALDERLAKE_S) [21:43:56] [PASSED] 0x4690 (ALDERLAKE_S) [21:43:56] [PASSED] 0x4692 (ALDERLAKE_S) [21:43:56] [PASSED] 0x4693 (ALDERLAKE_S) [21:43:56] [PASSED] 0x46A0 (ALDERLAKE_P) [21:43:56] [PASSED] 0x46A1 (ALDERLAKE_P) [21:43:56] [PASSED] 0x46A2 (ALDERLAKE_P) [21:43:56] [PASSED] 0x46A3 (ALDERLAKE_P) [21:43:56] [PASSED] 0x46A6 (ALDERLAKE_P) [21:43:56] [PASSED] 0x46A8 (ALDERLAKE_P) [21:43:56] [PASSED] 0x46AA (ALDERLAKE_P) [21:43:56] [PASSED] 0x462A (ALDERLAKE_P) [21:43:56] [PASSED] 0x4626 (ALDERLAKE_P) [21:43:56] [PASSED] 0x4628 (ALDERLAKE_P) [21:43:56] [PASSED] 0x46B0 (ALDERLAKE_P) [21:43:56] [PASSED] 0x46B1 (ALDERLAKE_P) [21:43:56] [PASSED] 0x46B2 (ALDERLAKE_P) [21:43:56] [PASSED] 0x46B3 (ALDERLAKE_P) [21:43:56] [PASSED] 0x46C0 (ALDERLAKE_P) [21:43:56] [PASSED] 0x46C1 (ALDERLAKE_P) [21:43:56] [PASSED] 0x46C2 (ALDERLAKE_P) [21:43:56] [PASSED] 0x46C3 (ALDERLAKE_P) [21:43:56] [PASSED] 0x46D0 (ALDERLAKE_N) [21:43:56] [PASSED] 0x46D1 (ALDERLAKE_N) [21:43:56] [PASSED] 0x46D2 (ALDERLAKE_N) [21:43:56] [PASSED] 0x46D3 (ALDERLAKE_N) [21:43:56] [PASSED] 0x46D4 (ALDERLAKE_N) [21:43:56] [PASSED] 0xA721 (ALDERLAKE_P) [21:43:56] [PASSED] 0xA7A1 (ALDERLAKE_P) [21:43:56] [PASSED] 0xA7A9 (ALDERLAKE_P) [21:43:56] [PASSED] 0xA7AC (ALDERLAKE_P) [21:43:56] [PASSED] 0xA7AD (ALDERLAKE_P) [21:43:56] [PASSED] 0xA720 (ALDERLAKE_P) [21:43:56] [PASSED] 0xA7A0 (ALDERLAKE_P) [21:43:56] [PASSED] 0xA7A8 (ALDERLAKE_P) [21:43:56] [PASSED] 0xA7AA (ALDERLAKE_P) [21:43:56] [PASSED] 0xA7AB (ALDERLAKE_P) [21:43:56] [PASSED] 0xA780 (ALDERLAKE_S) [21:43:56] [PASSED] 0xA781 (ALDERLAKE_S) [21:43:56] [PASSED] 0xA782 (ALDERLAKE_S) [21:43:56] [PASSED] 0xA783 (ALDERLAKE_S) [21:43:56] [PASSED] 0xA788 (ALDERLAKE_S) [21:43:56] [PASSED] 0xA789 (ALDERLAKE_S) [21:43:56] [PASSED] 0xA78A (ALDERLAKE_S) [21:43:56] [PASSED] 0xA78B (ALDERLAKE_S) [21:43:56] [PASSED] 0x4905 (DG1) [21:43:56] [PASSED] 0x4906 (DG1) [21:43:56] [PASSED] 0x4907 (DG1) [21:43:56] [PASSED] 0x4908 (DG1) [21:43:56] [PASSED] 0x4909 (DG1) [21:43:56] [PASSED] 0x56C0 (DG2) [21:43:56] [PASSED] 0x56C2 (DG2) [21:43:56] [PASSED] 0x56C1 (DG2) [21:43:56] [PASSED] 0x7D51 (METEORLAKE) [21:43:56] [PASSED] 0x7DD1 (METEORLAKE) [21:43:56] [PASSED] 0x7D41 (METEORLAKE) [21:43:56] [PASSED] 0x7D67 (METEORLAKE) [21:43:56] [PASSED] 0xB640 (METEORLAKE) [21:43:56] [PASSED] 0x56A0 (DG2) [21:43:56] [PASSED] 0x56A1 (DG2) [21:43:56] [PASSED] 0x56A2 (DG2) [21:43:56] [PASSED] 0x56BE (DG2) [21:43:56] [PASSED] 0x56BF (DG2) [21:43:56] [PASSED] 0x5690 (DG2) [21:43:56] [PASSED] 0x5691 (DG2) [21:43:56] [PASSED] 0x5692 (DG2) [21:43:56] [PASSED] 0x56A5 (DG2) [21:43:56] [PASSED] 0x56A6 (DG2) [21:43:56] [PASSED] 0x56B0 (DG2) [21:43:56] [PASSED] 0x56B1 (DG2) [21:43:56] [PASSED] 0x56BA (DG2) [21:43:56] [PASSED] 0x56BB (DG2) [21:43:56] [PASSED] 0x56BC (DG2) [21:43:56] [PASSED] 0x56BD (DG2) [21:43:56] [PASSED] 0x5693 (DG2) [21:43:56] [PASSED] 0x5694 (DG2) [21:43:56] [PASSED] 0x5695 (DG2) [21:43:56] [PASSED] 0x56A3 (DG2) [21:43:56] [PASSED] 0x56A4 (DG2) [21:43:56] [PASSED] 0x56B2 (DG2) [21:43:56] [PASSED] 0x56B3 (DG2) [21:43:56] [PASSED] 0x5696 (DG2) [21:43:56] [PASSED] 0x5697 (DG2) [21:43:56] [PASSED] 0xB69 (PVC) [21:43:56] [PASSED] 0xB6E (PVC) [21:43:56] [PASSED] 0xBD4 (PVC) [21:43:56] [PASSED] 0xBD5 (PVC) [21:43:56] [PASSED] 0xBD6 (PVC) [21:43:56] [PASSED] 0xBD7 (PVC) [21:43:56] [PASSED] 0xBD8 (PVC) [21:43:56] [PASSED] 0xBD9 (PVC) [21:43:56] [PASSED] 0xBDA (PVC) [21:43:56] [PASSED] 0xBDB (PVC) [21:43:56] [PASSED] 0xBE0 (PVC) [21:43:56] [PASSED] 0xBE1 (PVC) [21:43:56] [PASSED] 0xBE5 (PVC) [21:43:56] [PASSED] 0x7D40 (METEORLAKE) [21:43:56] [PASSED] 0x7D45 (METEORLAKE) [21:43:56] [PASSED] 0x7D55 (METEORLAKE) [21:43:56] [PASSED] 0x7D60 (METEORLAKE) [21:43:56] [PASSED] 0x7DD5 (METEORLAKE) [21:43:56] [PASSED] 0x6420 (LUNARLAKE) [21:43:56] [PASSED] 0x64A0 (LUNARLAKE) [21:43:56] [PASSED] 0x64B0 (LUNARLAKE) [21:43:56] [PASSED] 0xE202 (BATTLEMAGE) [21:43:56] [PASSED] 0xE209 (BATTLEMAGE) [21:43:56] [PASSED] 0xE20B (BATTLEMAGE) [21:43:56] [PASSED] 0xE20C (BATTLEMAGE) [21:43:56] [PASSED] 0xE20D (BATTLEMAGE) [21:43:56] [PASSED] 0xE210 (BATTLEMAGE) [21:43:56] [PASSED] 0xE211 (BATTLEMAGE) [21:43:56] [PASSED] 0xE212 (BATTLEMAGE) [21:43:56] [PASSED] 0xE216 (BATTLEMAGE) [21:43:56] [PASSED] 0xE220 (BATTLEMAGE) [21:43:56] [PASSED] 0xE221 (BATTLEMAGE) [21:43:56] [PASSED] 0xE222 (BATTLEMAGE) [21:43:56] [PASSED] 0xE223 (BATTLEMAGE) [21:43:56] [PASSED] 0xB080 (PANTHERLAKE) [21:43:56] [PASSED] 0xB081 (PANTHERLAKE) [21:43:56] [PASSED] 0xB082 (PANTHERLAKE) [21:43:56] [PASSED] 0xB083 (PANTHERLAKE) [21:43:56] [PASSED] 0xB084 (PANTHERLAKE) [21:43:56] [PASSED] 0xB085 (PANTHERLAKE) [21:43:56] [PASSED] 0xB086 (PANTHERLAKE) [21:43:56] [PASSED] 0xB087 (PANTHERLAKE) [21:43:56] [PASSED] 0xB08F (PANTHERLAKE) [21:43:56] [PASSED] 0xB090 (PANTHERLAKE) [21:43:56] [PASSED] 0xB0A0 (PANTHERLAKE) [21:43:56] [PASSED] 0xB0B0 (PANTHERLAKE) [21:43:56] [PASSED] 0xFD80 (PANTHERLAKE) [21:43:56] [PASSED] 0xFD81 (PANTHERLAKE) [21:43:56] [PASSED] 0xD740 (NOVALAKE_S) [21:43:56] [PASSED] 0xD741 (NOVALAKE_S) [21:43:56] [PASSED] 0xD742 (NOVALAKE_S) [21:43:56] [PASSED] 0xD743 (NOVALAKE_S) [21:43:56] [PASSED] 0xD745 (NOVALAKE_S) [21:43:56] [PASSED] 0xD74A (NOVALAKE_S) [21:43:56] [PASSED] 0xD74B (NOVALAKE_S) [21:43:56] [PASSED] 0x674C (CRESCENTISLAND) [21:43:56] [PASSED] 0x674D (CRESCENTISLAND) [21:43:56] [PASSED] 0x674E (CRESCENTISLAND) [21:43:56] [PASSED] 0x674F (CRESCENTISLAND) [21:43:56] [PASSED] 0x6750 (CRESCENTISLAND) [21:43:56] [PASSED] 0xD750 (NOVALAKE_P) [21:43:56] [PASSED] 0xD751 (NOVALAKE_P) [21:43:56] [PASSED] 0xD752 (NOVALAKE_P) [21:43:56] [PASSED] 0xD753 (NOVALAKE_P) [21:43:56] [PASSED] 0xD754 (NOVALAKE_P) [21:43:56] [PASSED] 0xD755 (NOVALAKE_P) [21:43:56] [PASSED] 0xD756 (NOVALAKE_P) [21:43:56] [PASSED] 0xD757 (NOVALAKE_P) [21:43:56] [PASSED] 0xD75F (NOVALAKE_P) [21:43:56] =============== [PASSED] check_platform_desc =============== [21:43:56] ===================== [PASSED] xe_pci ====================== [21:43:56] ============= xe_rtp_tables_test (5 subtests) ============== [21:43:56] ================== xe_rtp_table_gt_test =================== [21:43:56] [PASSED] gt_was/14011060649 [21:43:56] [PASSED] gt_was/14011059788 [21:43:56] [PASSED] gt_was/14015795083 [21:43:56] [PASSED] gt_was/16021867713 [21:43:56] [PASSED] gt_was/14019449301 [21:43:56] [PASSED] gt_was/16028005424 [21:43:56] [PASSED] gt_was/14026578760 [21:43:56] [PASSED] gt_was/1409420604 [21:43:56] [PASSED] gt_was/1408615072 [21:43:56] [PASSED] gt_was/22010523718 [21:43:56] [PASSED] gt_was/14011006942 [21:43:56] [PASSED] gt_was/14014830051 [21:43:56] [PASSED] gt_was/18018781329 [21:43:56] [PASSED] gt_was/1509235366 [21:43:56] [PASSED] gt_was/18018781329 [21:43:56] [PASSED] gt_was/16016694945 [21:43:56] [PASSED] gt_was/14018575942 [21:43:56] [PASSED] gt_was/22016670082 [21:43:56] [PASSED] gt_was/22016670082 [21:43:56] [PASSED] gt_was/14017421178 [21:43:56] [PASSED] gt_was/16025250150 [21:43:56] [PASSED] gt_was/14021871409 [21:43:56] [PASSED] gt_was/16021865536 [21:43:56] [PASSED] gt_was/14021486841 [21:43:56] [PASSED] gt_was/14025160223 [21:43:56] [PASSED] gt_was/14026144927, 16029437861, 14026127056 [21:43:56] [PASSED] gt_was/14025635424 [21:43:56] [PASSED] gt_was/16028005424 [21:43:56] ============== [PASSED] xe_rtp_table_gt_test =============== [21:43:56] ================== xe_rtp_table_gt_test =================== [21:43:56] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable [21:43:56] [PASSED] gt_tunings/Tuning: 32B Access Enable [21:43:56] [PASSED] gt_tunings/Tuning: L3 cache [21:43:56] [PASSED] gt_tunings/Tuning: L3 cache - media [21:43:56] [PASSED] gt_tunings/Tuning: Compression Overfetch [21:43:56] [PASSED] gt_tunings/Tuning: Compression Overfetch - media [21:43:56] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 [21:43:56] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media [21:43:56] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only [21:43:56] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media [21:43:56] [PASSED] gt_tunings/Tuning: Stateless compression control [21:43:56] [PASSED] gt_tunings/Tuning: Stateless compression control - media [21:43:56] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache [21:43:56] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media [21:43:56] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB [21:43:56] ============== [PASSED] xe_rtp_table_gt_test =============== [21:43:56] ================== xe_rtp_table_oob_test ================== [21:43:56] [PASSED] oob_was/1607983814 [21:43:56] [PASSED] oob_was/16010904313 [21:43:56] [PASSED] oob_was/18022495364 [21:43:56] [PASSED] oob_was/22012773006 [21:43:56] [PASSED] oob_was/14014475959 [21:43:56] [PASSED] oob_was/22011391025 [21:43:56] [PASSED] oob_was/22012727170 [21:43:56] [PASSED] oob_was/22012727685 [21:43:56] [PASSED] oob_was/22016596838 [21:43:56] [PASSED] oob_was/18020744125 [21:43:56] [PASSED] oob_was/1409600907 [21:43:56] [PASSED] oob_was/22014953428 [21:43:56] [PASSED] oob_was/16017236439 [21:43:56] [PASSED] oob_was/14019821291 [21:43:56] [PASSED] oob_was/14015076503 [21:43:56] [PASSED] oob_was/14018913170 [21:43:56] [PASSED] oob_was/14018094691 [21:43:56] [PASSED] oob_was/18024947630 [21:43:56] [PASSED] oob_was/16022287689 [21:43:56] [PASSED] oob_was/13011645652 [21:43:56] [PASSED] oob_was/14022293748 [21:43:56] [PASSED] oob_was/22019794406 [21:43:56] [PASSED] oob_was/22019338487 [21:43:56] [PASSED] oob_was/16023588340 [21:43:56] [PASSED] oob_was/14019789679 [21:43:56] [PASSED] oob_was/14022866841 [21:43:56] [PASSED] oob_was/16021333562 [21:43:56] [PASSED] oob_was/14016712196 [21:43:56] [PASSED] oob_was/14015568240 [21:43:56] [PASSED] oob_was/18013179988 [21:43:56] [PASSED] oob_was/1508761755 [21:43:56] [PASSED] oob_was/16023105232 [21:43:56] [PASSED] oob_was/16026508708 [21:43:56] [PASSED] oob_was/14020001231 [21:43:56] [PASSED] oob_was/16023683509 [21:43:56] [PASSED] oob_was/14025515070 [21:43:56] [PASSED] oob_was/15015404425_disable [21:43:56] [PASSED] oob_was/16026007364 [21:43:56] [PASSED] oob_was/14020316580 [21:43:56] [PASSED] oob_was/14025883347 [21:43:56] [PASSED] oob_was/16029380221 [21:43:56] [PASSED] oob_was/22022079272 [21:43:56] [PASSED] oob_was/16029897822 [21:43:56] [PASSED] oob_was/14026539277 [21:43:56] [PASSED] oob_was/14027054324 [21:43:56] ============== [PASSED] xe_rtp_table_oob_test ============== [21:43:56] ================ xe_rtp_table_dev_oob_test ================ [21:43:56] [PASSED] device_oob_was/22010954014 [21:43:56] [PASSED] device_oob_was/15015404425 [21:43:56] [PASSED] device_oob_was/22019338487_display [21:43:56] [PASSED] device_oob_was/14022085890 [21:43:56] [PASSED] device_oob_was/14026633728 [21:43:56] [PASSED] device_oob_was/14026746987 [21:43:56] [PASSED] device_oob_was/14026779378 [21:43:56] ============ [PASSED] xe_rtp_table_dev_oob_test ============ [21:43:56] ========== xe_rtp_table_missing_upper_bound_test ========== [21:43:56] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865 [21:43:56] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037 [21:43:56] [PASSED] register_whitelist/1806527549 [21:43:56] [PASSED] register_whitelist/allow_read_ctx_timestamp [21:43:56] [PASSED] register_whitelist/allow_read_queue_timestamp [21:43:56] [PASSED] register_whitelist/16014440446 [21:43:56] [PASSED] register_whitelist/16017236439 [21:43:56] [PASSED] register_whitelist/16020183090 [21:43:56] [PASSED] register_whitelist/14024997852 [21:43:56] [PASSED] register_whitelist/14024997852 [21:43:56] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ====== [21:43:56] =============== [PASSED] xe_rtp_tables_test ================ [21:43:56] =================== xe_rtp (3 subtests) ==================== [21:43:56] =================== xe_rtp_rules_tests ==================== [21:43:56] [PASSED] no [21:43:56] [PASSED] yes [21:43:56] [PASSED] no-and-no [21:43:56] [PASSED] no-and-yes [21:43:56] [PASSED] yes-and-no [21:43:56] [PASSED] yes-and-yes [21:43:56] [PASSED] no-or-no [21:43:56] [PASSED] no-or-yes [21:43:56] [PASSED] yes-or-no [21:43:56] [PASSED] yes-or-yes [21:43:56] [PASSED] no-yes-or-yes-no [21:43:56] [PASSED] no-yes-or-yes-yes [21:43:56] [PASSED] yes-yes-or-no-yes [21:43:56] [PASSED] yes-yes-or-yes-yes [21:43:56] [PASSED] no-no-or-yes-or-no [21:43:56] [PASSED] or [21:43:56] [PASSED] or-yes [21:43:56] [PASSED] or-no [21:43:56] [PASSED] yes-or [21:43:56] [PASSED] no-or [21:43:56] [PASSED] no-or-or-yes [21:43:56] [PASSED] yes-or-or-no [21:43:56] [PASSED] no-or-or-no [21:43:56] [PASSED] missing-context-engine-class [21:43:56] [PASSED] missing-context-engine-class-or-yes [21:43:56] [PASSED] missing-context-engine-class-or-or-yes [21:43:56] =============== [PASSED] xe_rtp_rules_tests ================ [21:43:56] =============== xe_rtp_process_to_sr_tests ================ [21:43:56] [PASSED] coalesce-same-reg [21:43:56] [PASSED] coalesce-same-reg-literal-and-func [21:43:56] [PASSED] no-match-no-add [21:43:56] [PASSED] two-regs-two-entries [21:43:56] [PASSED] clr-one-set-other [21:43:56] [PASSED] set-field [21:43:56] [PASSED] conflict-duplicate [21:43:56] [PASSED] conflict-not-disjoint [21:43:56] [PASSED] conflict-not-disjoint-literal-and-func [21:43:56] [PASSED] conflict-reg-type [21:43:56] [PASSED] bad-mcr-reg-forced-to-regular [21:43:56] [PASSED] bad-regular-reg-forced-to-mcr [21:43:56] =========== [PASSED] xe_rtp_process_to_sr_tests ============ [21:43:56] ================== xe_rtp_process_tests =================== [21:43:56] [PASSED] active1 [21:43:56] [PASSED] active2 [21:43:56] [PASSED] active-inactive [21:43:56] [PASSED] inactive-active [21:43:56] [PASSED] inactive-active-inactive [21:43:56] [PASSED] inactive-inactive-inactive [21:43:56] ============== [PASSED] xe_rtp_process_tests =============== [21:43:56] ===================== [PASSED] xe_rtp ====================== [21:43:56] ==================== xe_wa (1 subtest) ===================== [21:43:56] ======================== xe_wa_gt ========================= [21:43:56] [PASSED] TIGERLAKE B0 [21:43:56] [PASSED] DG1 A0 [21:43:56] [PASSED] DG1 B0 [21:43:56] [PASSED] ALDERLAKE_S A0 [21:43:56] [PASSED] ALDERLAKE_S B0 [21:43:56] [PASSED] ALDERLAKE_S C0 [21:43:56] [PASSED] ALDERLAKE_S D0 [21:43:56] [PASSED] ALDERLAKE_P A0 [21:43:56] [PASSED] ALDERLAKE_P B0 [21:43:56] [PASSED] ALDERLAKE_P C0 [21:43:56] [PASSED] ALDERLAKE_S RPLS D0 [21:43:56] [PASSED] ALDERLAKE_P RPLU E0 [21:43:56] [PASSED] DG2 G10 C0 [21:43:56] [PASSED] DG2 G11 B1 [21:43:56] [PASSED] DG2 G12 A1 [21:43:56] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0 [21:43:56] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0 [21:43:56] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0 [21:43:56] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0 [21:43:56] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0 [21:43:56] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1 [21:43:56] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0 [21:43:56] ==================== [PASSED] xe_wa_gt ===================== [21:43:56] ====================== [PASSED] xe_wa ====================== [21:43:56] ============================================================ [21:43:56] Testing complete. Ran 789 tests: passed: 761, skipped: 28 [21:43:56] Elapsed time: 36.982s total, 4.404s configuring, 31.863s building, 0.674s running + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig [21:43:57] Configuring KUnit Kernel ... Regenerating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [21:43:58] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [21:44:23] Starting KUnit Kernel (1/1)... [21:44:23] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [21:44:23] ============ drm_test_pick_cmdline (2 subtests) ============ [21:44:23] [PASSED] drm_test_pick_cmdline_res_1920_1080_60 [21:44:23] =============== drm_test_pick_cmdline_named =============== [21:44:23] [PASSED] NTSC [21:44:23] [PASSED] NTSC-J [21:44:23] [PASSED] PAL [21:44:23] [PASSED] PAL-M [21:44:23] =========== [PASSED] drm_test_pick_cmdline_named =========== [21:44:23] ============== [PASSED] drm_test_pick_cmdline ============== [21:44:23] == drm_test_atomic_get_connector_for_encoder (1 subtest) === [21:44:23] [PASSED] drm_test_drm_atomic_get_connector_for_encoder [21:44:23] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ==== [21:44:23] =========== drm_validate_clone_mode (2 subtests) =========== [21:44:23] ============== drm_test_check_in_clone_mode =============== [21:44:23] [PASSED] in_clone_mode [21:44:23] [PASSED] not_in_clone_mode [21:44:23] ========== [PASSED] drm_test_check_in_clone_mode =========== [21:44:23] =============== drm_test_check_valid_clones =============== [21:44:23] [PASSED] not_in_clone_mode [21:44:23] [PASSED] valid_clone [21:44:23] [PASSED] invalid_clone [21:44:23] =========== [PASSED] drm_test_check_valid_clones =========== [21:44:23] ============= [PASSED] drm_validate_clone_mode ============= [21:44:23] ============= drm_validate_modeset (1 subtest) ============= [21:44:23] [PASSED] drm_test_check_connector_changed_modeset [21:44:23] ============== [PASSED] drm_validate_modeset =============== [21:44:23] ====== drm_test_bridge_get_current_state (1 subtest) ======= [21:44:23] [PASSED] drm_test_drm_bridge_get_current_state_atomic [21:44:23] ======== [PASSED] drm_test_bridge_get_current_state ======== [21:44:23] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ====== [21:44:23] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic [21:44:23] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled [21:44:23] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts [21:44:23] ======== [PASSED] drm_test_bridge_helper_reset_crtc ======== [21:44:23] ============== drm_bridge_alloc (2 subtests) =============== [21:44:23] [PASSED] drm_test_drm_bridge_alloc_basic [21:44:23] [PASSED] drm_test_drm_bridge_alloc_get_put [21:44:23] ================ [PASSED] drm_bridge_alloc ================= [21:44:23] ============= drm_bridge_bus_fmt (5 subtests) ============== [21:44:23] [PASSED] drm_test_bridge_rgb_yuv_rgb [21:44:23] [PASSED] drm_test_bridge_must_convert_to_yuv444 [21:44:23] [PASSED] drm_test_bridge_hdmi_auto_rgb [21:44:23] [PASSED] drm_test_bridge_auto_first [21:44:23] [PASSED] drm_test_bridge_rgb_yuv_no_path [21:44:23] =============== [PASSED] drm_bridge_bus_fmt ================ [21:44:23] ============= drm_cmdline_parser (40 subtests) ============= [21:44:23] [PASSED] drm_test_cmdline_force_d_only [21:44:23] [PASSED] drm_test_cmdline_force_D_only_dvi [21:44:23] [PASSED] drm_test_cmdline_force_D_only_hdmi [21:44:23] [PASSED] drm_test_cmdline_force_D_only_not_digital [21:44:23] [PASSED] drm_test_cmdline_force_e_only [21:44:23] [PASSED] drm_test_cmdline_res [21:44:23] [PASSED] drm_test_cmdline_res_vesa [21:44:23] [PASSED] drm_test_cmdline_res_vesa_rblank [21:44:23] [PASSED] drm_test_cmdline_res_rblank [21:44:23] [PASSED] drm_test_cmdline_res_bpp [21:44:23] [PASSED] drm_test_cmdline_res_refresh [21:44:23] [PASSED] drm_test_cmdline_res_bpp_refresh [21:44:23] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced [21:44:23] [PASSED] drm_test_cmdline_res_bpp_refresh_margins [21:44:23] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off [21:44:23] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on [21:44:23] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog [21:44:23] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital [21:44:23] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on [21:44:23] [PASSED] drm_test_cmdline_res_margins_force_on [21:44:23] [PASSED] drm_test_cmdline_res_vesa_margins [21:44:23] [PASSED] drm_test_cmdline_name [21:44:23] [PASSED] drm_test_cmdline_name_bpp [21:44:23] [PASSED] drm_test_cmdline_name_option [21:44:23] [PASSED] drm_test_cmdline_name_bpp_option [21:44:23] [PASSED] drm_test_cmdline_rotate_0 [21:44:23] [PASSED] drm_test_cmdline_rotate_90 [21:44:23] [PASSED] drm_test_cmdline_rotate_180 [21:44:23] [PASSED] drm_test_cmdline_rotate_270 [21:44:23] [PASSED] drm_test_cmdline_hmirror [21:44:23] [PASSED] drm_test_cmdline_vmirror [21:44:23] [PASSED] drm_test_cmdline_margin_options [21:44:23] [PASSED] drm_test_cmdline_multiple_options [21:44:23] [PASSED] drm_test_cmdline_bpp_extra_and_option [21:44:23] [PASSED] drm_test_cmdline_extra_and_option [21:44:23] [PASSED] drm_test_cmdline_freestanding_options [21:44:23] [PASSED] drm_test_cmdline_freestanding_force_e_and_options [21:44:23] [PASSED] drm_test_cmdline_panel_orientation [21:44:23] ================ drm_test_cmdline_invalid ================= [21:44:23] [PASSED] margin_only [21:44:23] [PASSED] interlace_only [21:44:23] [PASSED] res_missing_x [21:44:23] [PASSED] res_missing_y [21:44:23] [PASSED] res_bad_y [21:44:23] [PASSED] res_missing_y_bpp [21:44:23] [PASSED] res_bad_bpp [21:44:23] [PASSED] res_bad_refresh [21:44:23] [PASSED] res_bpp_refresh_force_on_off [21:44:23] [PASSED] res_invalid_mode [21:44:23] [PASSED] res_bpp_wrong_place_mode [21:44:23] [PASSED] name_bpp_refresh [21:44:23] [PASSED] name_refresh [21:44:23] [PASSED] name_refresh_wrong_mode [21:44:23] [PASSED] name_refresh_invalid_mode [21:44:23] [PASSED] rotate_multiple [21:44:23] [PASSED] rotate_invalid_val [21:44:23] [PASSED] rotate_truncated [21:44:23] [PASSED] invalid_option [21:44:23] [PASSED] invalid_tv_option [21:44:23] [PASSED] truncated_tv_option [21:44:23] ============ [PASSED] drm_test_cmdline_invalid ============= [21:44:23] =============== drm_test_cmdline_tv_options =============== [21:44:23] [PASSED] NTSC [21:44:23] [PASSED] NTSC_443 [21:44:23] [PASSED] NTSC_J [21:44:23] [PASSED] PAL [21:44:23] [PASSED] PAL_M [21:44:23] [PASSED] PAL_N [21:44:23] [PASSED] SECAM [21:44:23] [PASSED] MONO_525 [21:44:23] [PASSED] MONO_625 [21:44:23] =========== [PASSED] drm_test_cmdline_tv_options =========== [21:44:23] =============== [PASSED] drm_cmdline_parser ================ [21:44:23] ========== drmm_connector_hdmi_init (20 subtests) ========== [21:44:23] [PASSED] drm_test_connector_hdmi_init_valid [21:44:23] [PASSED] drm_test_connector_hdmi_init_bpc_8 [21:44:23] [PASSED] drm_test_connector_hdmi_init_bpc_10 [21:44:23] [PASSED] drm_test_connector_hdmi_init_bpc_12 [21:44:23] [PASSED] drm_test_connector_hdmi_init_bpc_invalid [21:44:23] [PASSED] drm_test_connector_hdmi_init_bpc_null [21:44:23] [PASSED] drm_test_connector_hdmi_init_formats_empty [21:44:23] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb [21:44:23] === drm_test_connector_hdmi_init_formats_yuv420_allowed === [21:44:23] [PASSED] supported_formats=0x9 yuv420_allowed=1 [21:44:23] [PASSED] supported_formats=0x9 yuv420_allowed=0 [21:44:23] [PASSED] supported_formats=0x5 yuv420_allowed=1 [21:44:23] [PASSED] supported_formats=0x5 yuv420_allowed=0 [21:44:23] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed === [21:44:23] [PASSED] drm_test_connector_hdmi_init_null_ddc [21:44:23] [PASSED] drm_test_connector_hdmi_init_null_product [21:44:23] [PASSED] drm_test_connector_hdmi_init_null_vendor [21:44:23] [PASSED] drm_test_connector_hdmi_init_product_length_exact [21:44:23] [PASSED] drm_test_connector_hdmi_init_product_length_too_long [21:44:23] [PASSED] drm_test_connector_hdmi_init_product_valid [21:44:23] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact [21:44:23] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long [21:44:23] [PASSED] drm_test_connector_hdmi_init_vendor_valid [21:44:23] ========= drm_test_connector_hdmi_init_type_valid ========= [21:44:23] [PASSED] HDMI-A [21:44:23] [PASSED] HDMI-B [21:44:23] ===== [PASSED] drm_test_connector_hdmi_init_type_valid ===== [21:44:23] ======== drm_test_connector_hdmi_init_type_invalid ======== [21:44:23] [PASSED] Unknown [21:44:23] [PASSED] VGA [21:44:23] [PASSED] DVI-I [21:44:23] [PASSED] DVI-D [21:44:23] [PASSED] DVI-A [21:44:23] [PASSED] Composite [21:44:23] [PASSED] SVIDEO [21:44:23] [PASSED] LVDS [21:44:23] [PASSED] Component [21:44:23] [PASSED] DIN [21:44:23] [PASSED] DP [21:44:23] [PASSED] TV [21:44:23] [PASSED] eDP [21:44:23] [PASSED] Virtual [21:44:23] [PASSED] DSI [21:44:23] [PASSED] DPI [21:44:23] [PASSED] Writeback [21:44:23] [PASSED] SPI [21:44:23] [PASSED] USB [21:44:23] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ==== [21:44:23] ============ [PASSED] drmm_connector_hdmi_init ============= [21:44:23] ============= drmm_connector_init (3 subtests) ============= [21:44:23] [PASSED] drm_test_drmm_connector_init [21:44:23] [PASSED] drm_test_drmm_connector_init_null_ddc [21:44:23] ========= drm_test_drmm_connector_init_type_valid ========= [21:44:23] [PASSED] Unknown [21:44:23] [PASSED] VGA [21:44:23] [PASSED] DVI-I [21:44:23] [PASSED] DVI-D [21:44:23] [PASSED] DVI-A [21:44:23] [PASSED] Composite [21:44:23] [PASSED] SVIDEO [21:44:23] [PASSED] LVDS [21:44:23] [PASSED] Component [21:44:23] [PASSED] DIN [21:44:23] [PASSED] DP [21:44:23] [PASSED] HDMI-A [21:44:23] [PASSED] HDMI-B [21:44:23] [PASSED] TV [21:44:23] [PASSED] eDP [21:44:23] [PASSED] Virtual [21:44:23] [PASSED] DSI [21:44:23] [PASSED] DPI [21:44:23] [PASSED] Writeback [21:44:23] [PASSED] SPI [21:44:23] [PASSED] USB [21:44:23] ===== [PASSED] drm_test_drmm_connector_init_type_valid ===== [21:44:23] =============== [PASSED] drmm_connector_init =============== [21:44:23] ========= drm_connector_dynamic_init (6 subtests) ========== [21:44:23] [PASSED] drm_test_drm_connector_dynamic_init [21:44:23] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc [21:44:23] [PASSED] drm_test_drm_connector_dynamic_init_not_added [21:44:23] [PASSED] drm_test_drm_connector_dynamic_init_properties [21:44:23] ===== drm_test_drm_connector_dynamic_init_type_valid ====== [21:44:23] [PASSED] Unknown [21:44:23] [PASSED] VGA [21:44:23] [PASSED] DVI-I [21:44:23] [PASSED] DVI-D [21:44:23] [PASSED] DVI-A [21:44:23] [PASSED] Composite [21:44:23] [PASSED] SVIDEO [21:44:23] [PASSED] LVDS [21:44:23] [PASSED] Component [21:44:23] [PASSED] DIN [21:44:23] [PASSED] DP [21:44:23] [PASSED] HDMI-A [21:44:23] [PASSED] HDMI-B [21:44:23] [PASSED] TV [21:44:23] [PASSED] eDP [21:44:23] [PASSED] Virtual [21:44:23] [PASSED] DSI [21:44:23] [PASSED] DPI [21:44:23] [PASSED] Writeback [21:44:23] [PASSED] SPI [21:44:23] [PASSED] USB [21:44:23] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid == [21:44:23] ======== drm_test_drm_connector_dynamic_init_name ========= [21:44:23] [PASSED] Unknown [21:44:23] [PASSED] VGA [21:44:23] [PASSED] DVI-I [21:44:23] [PASSED] DVI-D [21:44:23] [PASSED] DVI-A [21:44:23] [PASSED] Composite [21:44:23] [PASSED] SVIDEO [21:44:23] [PASSED] LVDS [21:44:23] [PASSED] Component [21:44:23] [PASSED] DIN [21:44:23] [PASSED] DP [21:44:23] [PASSED] HDMI-A [21:44:23] [PASSED] HDMI-B [21:44:23] [PASSED] TV [21:44:23] [PASSED] eDP [21:44:23] [PASSED] Virtual [21:44:23] [PASSED] DSI [21:44:23] [PASSED] DPI [21:44:23] [PASSED] Writeback [21:44:23] [PASSED] SPI [21:44:23] [PASSED] USB [21:44:23] ==== [PASSED] drm_test_drm_connector_dynamic_init_name ===== [21:44:23] =========== [PASSED] drm_connector_dynamic_init ============ [21:44:23] ==== drm_connector_dynamic_register_early (4 subtests) ===== [21:44:23] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list [21:44:23] [PASSED] drm_test_drm_connector_dynamic_register_early_defer [21:44:23] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init [21:44:23] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object [21:44:23] ====== [PASSED] drm_connector_dynamic_register_early ======= [21:44:23] ======= drm_connector_dynamic_register (7 subtests) ======== [21:44:23] [PASSED] drm_test_drm_connector_dynamic_register_on_list [21:44:23] [PASSED] drm_test_drm_connector_dynamic_register_no_defer [21:44:23] [PASSED] drm_test_drm_connector_dynamic_register_no_init [21:44:23] [PASSED] drm_test_drm_connector_dynamic_register_mode_object [21:44:23] [PASSED] drm_test_drm_connector_dynamic_register_sysfs [21:44:23] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name [21:44:23] [PASSED] drm_test_drm_connector_dynamic_register_debugfs [21:44:23] ========= [PASSED] drm_connector_dynamic_register ========== [21:44:23] = drm_connector_attach_broadcast_rgb_property (2 subtests) = [21:44:23] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property [21:44:23] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector [21:44:23] === [PASSED] drm_connector_attach_broadcast_rgb_property === [21:44:23] ========== drm_get_tv_mode_from_name (2 subtests) ========== [21:44:23] ========== drm_test_get_tv_mode_from_name_valid =========== [21:44:23] [PASSED] NTSC [21:44:23] [PASSED] NTSC-443 [21:44:23] [PASSED] NTSC-J [21:44:23] [PASSED] PAL [21:44:23] [PASSED] PAL-M [21:44:23] [PASSED] PAL-N [21:44:23] [PASSED] SECAM [21:44:23] [PASSED] Mono [21:44:23] ====== [PASSED] drm_test_get_tv_mode_from_name_valid ======= [21:44:23] [PASSED] drm_test_get_tv_mode_from_name_truncated [21:44:23] ============ [PASSED] drm_get_tv_mode_from_name ============ [21:44:23] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) = [21:44:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb [21:44:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc [21:44:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1 [21:44:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc [21:44:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1 [21:44:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double [21:44:23] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid = [21:44:23] [PASSED] VIC 96 [21:44:23] [PASSED] VIC 97 [21:44:23] [PASSED] VIC 101 [21:44:23] [PASSED] VIC 102 [21:44:23] [PASSED] VIC 106 [21:44:23] [PASSED] VIC 107 [21:44:23] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid === [21:44:23] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc [21:44:23] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc [21:44:23] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc [21:44:23] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc [21:44:23] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc [21:44:23] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ==== [21:44:23] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) == [21:44:23] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ==== [21:44:23] [PASSED] Automatic [21:44:23] [PASSED] Full [21:44:23] [PASSED] Limited 16:235 [21:44:23] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name === [21:44:23] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid [21:44:23] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ==== [21:44:23] == drm_hdmi_connector_get_output_format_name (2 subtests) == [21:44:23] === drm_test_drm_hdmi_connector_get_output_format_name ==== [21:44:23] [PASSED] RGB [21:44:23] [PASSED] YUV 4:2:0 [21:44:23] [PASSED] YUV 4:2:2 [21:44:23] [PASSED] YUV 4:4:4 [21:44:23] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name === [21:44:23] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid [21:44:23] ==== [PASSED] drm_hdmi_connector_get_output_format_name ==== [21:44:23] ============= drm_damage_helper (21 subtests) ============== [21:44:23] [PASSED] drm_test_damage_iter_no_damage [21:44:23] [PASSED] drm_test_damage_iter_no_damage_fractional_src [21:44:23] [PASSED] drm_test_damage_iter_no_damage_src_moved [21:44:23] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved [21:44:23] [PASSED] drm_test_damage_iter_no_damage_not_visible [21:44:23] [PASSED] drm_test_damage_iter_no_damage_no_crtc [21:44:23] [PASSED] drm_test_damage_iter_no_damage_no_fb [21:44:23] [PASSED] drm_test_damage_iter_simple_damage [21:44:23] [PASSED] drm_test_damage_iter_single_damage [21:44:23] [PASSED] drm_test_damage_iter_single_damage_intersect_src [21:44:23] [PASSED] drm_test_damage_iter_single_damage_outside_src [21:44:23] [PASSED] drm_test_damage_iter_single_damage_fractional_src [21:44:23] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src [21:44:23] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src [21:44:23] [PASSED] drm_test_damage_iter_single_damage_src_moved [21:44:23] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved [21:44:23] [PASSED] drm_test_damage_iter_damage [21:44:23] [PASSED] drm_test_damage_iter_damage_one_intersect [21:44:23] [PASSED] drm_test_damage_iter_damage_one_outside [21:44:23] [PASSED] drm_test_damage_iter_damage_src_moved [21:44:23] [PASSED] drm_test_damage_iter_damage_not_visible [21:44:23] ================ [PASSED] drm_damage_helper ================ [21:44:23] ============== drm_dp_mst_helper (3 subtests) ============== [21:44:23] ============== drm_test_dp_mst_calc_pbn_mode ============== [21:44:23] [PASSED] Clock 154000 BPP 30 DSC disabled [21:44:23] [PASSED] Clock 234000 BPP 30 DSC disabled [21:44:23] [PASSED] Clock 297000 BPP 24 DSC disabled [21:44:23] [PASSED] Clock 332880 BPP 24 DSC enabled [21:44:23] [PASSED] Clock 324540 BPP 24 DSC enabled [21:44:23] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ========== [21:44:23] ============== drm_test_dp_mst_calc_pbn_div =============== [21:44:23] [PASSED] Link rate 2000000 lane count 4 [21:44:23] [PASSED] Link rate 2000000 lane count 2 [21:44:23] [PASSED] Link rate 2000000 lane count 1 [21:44:23] [PASSED] Link rate 1350000 lane count 4 [21:44:23] [PASSED] Link rate 1350000 lane count 2 [21:44:23] [PASSED] Link rate 1350000 lane count 1 [21:44:23] [PASSED] Link rate 1000000 lane count 4 [21:44:23] [PASSED] Link rate 1000000 lane count 2 [21:44:23] [PASSED] Link rate 1000000 lane count 1 [21:44:23] [PASSED] Link rate 810000 lane count 4 [21:44:23] [PASSED] Link rate 810000 lane count 2 [21:44:23] [PASSED] Link rate 810000 lane count 1 [21:44:23] [PASSED] Link rate 540000 lane count 4 [21:44:23] [PASSED] Link rate 540000 lane count 2 [21:44:23] [PASSED] Link rate 540000 lane count 1 [21:44:23] [PASSED] Link rate 270000 lane count 4 [21:44:23] [PASSED] Link rate 270000 lane count 2 [21:44:23] [PASSED] Link rate 270000 lane count 1 [21:44:23] [PASSED] Link rate 162000 lane count 4 [21:44:23] [PASSED] Link rate 162000 lane count 2 [21:44:23] [PASSED] Link rate 162000 lane count 1 [21:44:23] ========== [PASSED] drm_test_dp_mst_calc_pbn_div =========== [21:44:23] ========= drm_test_dp_mst_sideband_msg_req_decode ========= [21:44:23] [PASSED] DP_ENUM_PATH_RESOURCES with port number [21:44:23] [PASSED] DP_POWER_UP_PHY with port number [21:44:23] [PASSED] DP_POWER_DOWN_PHY with port number [21:44:23] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks [21:44:23] [PASSED] DP_ALLOCATE_PAYLOAD with port number [21:44:23] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI [21:44:23] [PASSED] DP_ALLOCATE_PAYLOAD with PBN [21:44:23] [PASSED] DP_QUERY_PAYLOAD with port number [21:44:23] [PASSED] DP_QUERY_PAYLOAD with VCPI [21:44:23] [PASSED] DP_REMOTE_DPCD_READ with port number [21:44:23] [PASSED] DP_REMOTE_DPCD_READ with DPCD address [21:44:23] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes [21:44:23] [PASSED] DP_REMOTE_DPCD_WRITE with port number [21:44:23] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address [21:44:23] [PASSED] DP_REMOTE_DPCD_WRITE with data array [21:44:23] [PASSED] DP_REMOTE_I2C_READ with port number [21:44:23] [PASSED] DP_REMOTE_I2C_READ with I2C device ID [21:44:23] [PASSED] DP_REMOTE_I2C_READ with transactions array [21:44:23] [PASSED] DP_REMOTE_I2C_WRITE with port number [21:44:23] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID [21:44:23] [PASSED] DP_REMOTE_I2C_WRITE with data array [21:44:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID [21:44:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID [21:44:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event [21:44:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event [21:44:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior [21:44:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior [21:44:23] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode ===== [21:44:23] ================ [PASSED] drm_dp_mst_helper ================ [21:44:23] ================== drm_exec (7 subtests) =================== [21:44:23] [PASSED] sanitycheck [21:44:23] [PASSED] test_lock [21:44:23] [PASSED] test_lock_unlock [21:44:23] [PASSED] test_duplicates [21:44:23] [PASSED] test_prepare [21:44:23] [PASSED] test_prepare_array [21:44:23] [PASSED] test_multiple_loops [21:44:23] ==================== [PASSED] drm_exec ===================== [21:44:23] =========== drm_format_helper_test (17 subtests) =========== [21:44:23] ============== drm_test_fb_xrgb8888_to_gray8 ============== [21:44:23] [PASSED] single_pixel_source_buffer [21:44:23] [PASSED] single_pixel_clip_rectangle [21:44:23] [PASSED] well_known_colors [21:44:23] [PASSED] destination_pitch [21:44:23] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ========== [21:44:23] ============= drm_test_fb_xrgb8888_to_rgb332 ============== [21:44:23] [PASSED] single_pixel_source_buffer [21:44:23] [PASSED] single_pixel_clip_rectangle [21:44:23] [PASSED] well_known_colors [21:44:23] [PASSED] destination_pitch [21:44:23] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ========== [21:44:23] ============= drm_test_fb_xrgb8888_to_rgb565 ============== [21:44:23] [PASSED] single_pixel_source_buffer [21:44:23] [PASSED] single_pixel_clip_rectangle [21:44:23] [PASSED] well_known_colors [21:44:23] [PASSED] destination_pitch [21:44:23] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ========== [21:44:23] ============ drm_test_fb_xrgb8888_to_xrgb1555 ============= [21:44:23] [PASSED] single_pixel_source_buffer [21:44:23] [PASSED] single_pixel_clip_rectangle [21:44:23] [PASSED] well_known_colors [21:44:23] [PASSED] destination_pitch [21:44:23] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 ========= [21:44:23] ============ drm_test_fb_xrgb8888_to_argb1555 ============= [21:44:23] [PASSED] single_pixel_source_buffer [21:44:23] [PASSED] single_pixel_clip_rectangle [21:44:23] [PASSED] well_known_colors [21:44:23] [PASSED] destination_pitch [21:44:23] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 ========= [21:44:23] ============ drm_test_fb_xrgb8888_to_rgba5551 ============= [21:44:23] [PASSED] single_pixel_source_buffer [21:44:23] [PASSED] single_pixel_clip_rectangle [21:44:23] [PASSED] well_known_colors [21:44:23] [PASSED] destination_pitch [21:44:23] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 ========= [21:44:23] ============= drm_test_fb_xrgb8888_to_rgb888 ============== [21:44:23] [PASSED] single_pixel_source_buffer [21:44:23] [PASSED] single_pixel_clip_rectangle [21:44:23] [PASSED] well_known_colors [21:44:23] [PASSED] destination_pitch [21:44:23] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ========== [21:44:23] ============= drm_test_fb_xrgb8888_to_bgr888 ============== [21:44:23] [PASSED] single_pixel_source_buffer [21:44:23] [PASSED] single_pixel_clip_rectangle [21:44:23] [PASSED] well_known_colors [21:44:23] [PASSED] destination_pitch [21:44:23] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ========== [21:44:23] ============ drm_test_fb_xrgb8888_to_argb8888 ============= [21:44:23] [PASSED] single_pixel_source_buffer [21:44:23] [PASSED] single_pixel_clip_rectangle [21:44:23] [PASSED] well_known_colors [21:44:23] [PASSED] destination_pitch [21:44:23] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 ========= [21:44:23] =========== drm_test_fb_xrgb8888_to_xrgb2101010 =========== [21:44:23] [PASSED] single_pixel_source_buffer [21:44:23] [PASSED] single_pixel_clip_rectangle [21:44:23] [PASSED] well_known_colors [21:44:23] [PASSED] destination_pitch [21:44:23] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 ======= [21:44:23] =========== drm_test_fb_xrgb8888_to_argb2101010 =========== [21:44:23] [PASSED] single_pixel_source_buffer [21:44:23] [PASSED] single_pixel_clip_rectangle [21:44:23] [PASSED] well_known_colors [21:44:23] [PASSED] destination_pitch [21:44:23] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 ======= [21:44:23] ============== drm_test_fb_xrgb8888_to_mono =============== [21:44:23] [PASSED] single_pixel_source_buffer [21:44:23] [PASSED] single_pixel_clip_rectangle [21:44:23] [PASSED] well_known_colors [21:44:23] [PASSED] destination_pitch [21:44:23] ========== [PASSED] drm_test_fb_xrgb8888_to_mono =========== [21:44:23] ==================== drm_test_fb_swab ===================== [21:44:23] [PASSED] single_pixel_source_buffer [21:44:23] [PASSED] single_pixel_clip_rectangle [21:44:23] [PASSED] well_known_colors [21:44:23] [PASSED] destination_pitch [21:44:23] ================ [PASSED] drm_test_fb_swab ================= [21:44:23] ============ drm_test_fb_xrgb8888_to_xbgr8888 ============= [21:44:23] [PASSED] single_pixel_source_buffer [21:44:23] [PASSED] single_pixel_clip_rectangle [21:44:23] [PASSED] well_known_colors [21:44:23] [PASSED] destination_pitch [21:44:23] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 ========= [21:44:23] ============ drm_test_fb_xrgb8888_to_abgr8888 ============= [21:44:23] [PASSED] single_pixel_source_buffer [21:44:23] [PASSED] single_pixel_clip_rectangle [21:44:23] [PASSED] well_known_colors [21:44:23] [PASSED] destination_pitch [21:44:23] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 ========= [21:44:23] ================= drm_test_fb_clip_offset ================= [21:44:23] [PASSED] pass through [21:44:23] [PASSED] horizontal offset [21:44:23] [PASSED] vertical offset [21:44:23] [PASSED] horizontal and vertical offset [21:44:23] [PASSED] horizontal offset (custom pitch) [21:44:23] [PASSED] vertical offset (custom pitch) [21:44:23] [PASSED] horizontal and vertical offset (custom pitch) [21:44:23] ============= [PASSED] drm_test_fb_clip_offset ============= [21:44:23] =================== drm_test_fb_memcpy ==================== [21:44:23] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258) [21:44:23] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258) [21:44:23] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559) [21:44:23] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258) [21:44:23] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258) [21:44:23] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559) [21:44:23] [PASSED] well_known_colors: XB24 little-endian (0x34324258) [21:44:23] [PASSED] well_known_colors: XRA8 little-endian (0x38415258) [21:44:23] [PASSED] well_known_colors: YU24 little-endian (0x34325559) [21:44:23] [PASSED] destination_pitch: XB24 little-endian (0x34324258) [21:44:23] [PASSED] destination_pitch: XRA8 little-endian (0x38415258) [21:44:23] [PASSED] destination_pitch: YU24 little-endian (0x34325559) [21:44:23] =============== [PASSED] drm_test_fb_memcpy ================ [21:44:23] ============= [PASSED] drm_format_helper_test ============== [21:44:23] ================= drm_format (18 subtests) ================= [21:44:23] [PASSED] drm_test_format_block_width_invalid [21:44:23] [PASSED] drm_test_format_block_width_one_plane [21:44:23] [PASSED] drm_test_format_block_width_two_plane [21:44:23] [PASSED] drm_test_format_block_width_three_plane [21:44:23] [PASSED] drm_test_format_block_width_tiled [21:44:23] [PASSED] drm_test_format_block_height_invalid [21:44:23] [PASSED] drm_test_format_block_height_one_plane [21:44:23] [PASSED] drm_test_format_block_height_two_plane [21:44:23] [PASSED] drm_test_format_block_height_three_plane [21:44:23] [PASSED] drm_test_format_block_height_tiled [21:44:23] [PASSED] drm_test_format_min_pitch_invalid [21:44:23] [PASSED] drm_test_format_min_pitch_one_plane_8bpp [21:44:23] [PASSED] drm_test_format_min_pitch_one_plane_16bpp [21:44:23] [PASSED] drm_test_format_min_pitch_one_plane_24bpp [21:44:23] [PASSED] drm_test_format_min_pitch_one_plane_32bpp [21:44:23] [PASSED] drm_test_format_min_pitch_two_plane [21:44:23] [PASSED] drm_test_format_min_pitch_three_plane_8bpp [21:44:23] [PASSED] drm_test_format_min_pitch_tiled [21:44:23] =================== [PASSED] drm_format ==================== [21:44:23] ============== drm_framebuffer (10 subtests) =============== [21:44:23] ========== drm_test_framebuffer_check_src_coords ========== [21:44:23] [PASSED] Success: source fits into fb [21:44:23] [PASSED] Fail: overflowing fb with x-axis coordinate [21:44:23] [PASSED] Fail: overflowing fb with y-axis coordinate [21:44:23] [PASSED] Fail: overflowing fb with source width [21:44:23] [PASSED] Fail: overflowing fb with source height [21:44:23] ====== [PASSED] drm_test_framebuffer_check_src_coords ====== [21:44:23] [PASSED] drm_test_framebuffer_cleanup [21:44:23] =============== drm_test_framebuffer_create =============== [21:44:23] [PASSED] ABGR8888 normal sizes [21:44:23] [PASSED] ABGR8888 max sizes [21:44:23] [PASSED] ABGR8888 pitch greater than min required [21:44:23] [PASSED] ABGR8888 pitch less than min required [21:44:23] [PASSED] ABGR8888 Invalid width [21:44:23] [PASSED] ABGR8888 Invalid buffer handle [21:44:23] [PASSED] No pixel format [21:44:23] [PASSED] ABGR8888 Width 0 [21:44:23] [PASSED] ABGR8888 Height 0 [21:44:23] [PASSED] ABGR8888 Out of bound height * pitch combination [21:44:23] [PASSED] ABGR8888 Large buffer offset [21:44:23] [PASSED] ABGR8888 Buffer offset for inexistent plane [21:44:23] [PASSED] ABGR8888 Invalid flag [21:44:23] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers [21:44:23] [PASSED] ABGR8888 Valid buffer modifier [21:44:23] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE) [21:44:23] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS [21:44:23] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS [21:44:23] [PASSED] NV12 Normal sizes [21:44:23] [PASSED] NV12 Max sizes [21:44:23] [PASSED] NV12 Invalid pitch [21:44:23] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag [21:44:23] [PASSED] NV12 different modifier per-plane [21:44:23] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE [21:44:23] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS [21:44:23] [PASSED] NV12 Modifier for inexistent plane [21:44:23] [PASSED] NV12 Handle for inexistent plane [21:44:23] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS [21:44:23] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier [21:44:23] [PASSED] YVU420 Normal sizes [21:44:23] [PASSED] YVU420 Max sizes [21:44:23] [PASSED] YVU420 Invalid pitch [21:44:23] [PASSED] YVU420 Different pitches [21:44:23] [PASSED] YVU420 Different buffer offsets/pitches [21:44:23] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS [21:44:23] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS [21:44:23] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS [21:44:23] [PASSED] YVU420 Valid modifier [21:44:23] [PASSED] YVU420 Different modifiers per plane [21:44:23] [PASSED] YVU420 Modifier for inexistent plane [21:44:23] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR) [21:44:23] [PASSED] X0L2 Normal sizes [21:44:23] [PASSED] X0L2 Max sizes [21:44:23] [PASSED] X0L2 Invalid pitch [21:44:23] [PASSED] X0L2 Pitch greater than minimum required [21:44:23] [PASSED] X0L2 Handle for inexistent plane [21:44:23] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set [21:44:23] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set [21:44:23] [PASSED] X0L2 Valid modifier [21:44:23] [PASSED] X0L2 Modifier for inexistent plane [21:44:23] =========== [PASSED] drm_test_framebuffer_create =========== [21:44:23] [PASSED] drm_test_framebuffer_free [21:44:23] [PASSED] drm_test_framebuffer_init [21:44:23] [PASSED] drm_test_framebuffer_init_bad_format [21:44:23] [PASSED] drm_test_framebuffer_init_dev_mismatch [21:44:23] [PASSED] drm_test_framebuffer_lookup [21:44:23] [PASSED] drm_test_framebuffer_lookup_inexistent [21:44:23] [PASSED] drm_test_framebuffer_modifiers_not_supported [21:44:23] ================= [PASSED] drm_framebuffer ================= [21:44:23] ================ drm_gem_shmem (8 subtests) ================ [21:44:23] [PASSED] drm_gem_shmem_test_obj_create [21:44:23] [PASSED] drm_gem_shmem_test_obj_create_private [21:44:23] [PASSED] drm_gem_shmem_test_pin_pages [21:44:23] [PASSED] drm_gem_shmem_test_vmap [21:44:23] [PASSED] drm_gem_shmem_test_get_sg_table [21:44:23] [PASSED] drm_gem_shmem_test_get_pages_sgt [21:44:23] [PASSED] drm_gem_shmem_test_madvise [21:44:23] [PASSED] drm_gem_shmem_test_purge [21:44:23] ================== [PASSED] drm_gem_shmem ================== [21:44:23] === drm_atomic_helper_connector_hdmi_check (29 subtests) === [21:44:23] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode [21:44:23] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1 [21:44:23] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode [21:44:23] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1 [21:44:23] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode [21:44:23] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1 [21:44:23] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 ======= [21:44:23] [PASSED] Automatic [21:44:23] [PASSED] Full [21:44:23] [PASSED] Limited 16:235 [21:44:23] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 === [21:44:23] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed [21:44:23] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed [21:44:23] [PASSED] drm_test_check_disable_connector [21:44:23] [PASSED] drm_test_check_hdmi_funcs_reject_rate [21:44:23] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb [21:44:23] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420 [21:44:23] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422 [21:44:23] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420 [21:44:23] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420 [21:44:23] [PASSED] drm_test_check_output_bpc_crtc_mode_changed [21:44:23] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed [21:44:23] [PASSED] drm_test_check_output_bpc_dvi [21:44:23] [PASSED] drm_test_check_output_bpc_format_vic_1 [21:44:23] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only [21:44:23] [PASSED] drm_test_check_output_bpc_format_display_rgb_only [21:44:23] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only [21:44:23] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only [21:44:23] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc [21:44:23] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc [21:44:23] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc [21:44:23] ============ drm_test_check_hdmi_color_format ============= [21:44:23] [PASSED] AUTO -> RGB [21:44:23] [PASSED] YCBCR422 -> YUV422 [21:44:23] [PASSED] YCBCR420 -> YUV420 [21:44:23] [PASSED] YCBCR444 -> YUV444 [21:44:23] [PASSED] RGB -> RGB [21:44:23] ======== [PASSED] drm_test_check_hdmi_color_format ========= [21:44:23] ======== drm_test_check_hdmi_color_format_420_only ======== [21:44:23] [PASSED] RGB should fail [21:44:23] [PASSED] YUV444 should fail [21:44:23] [PASSED] YUV422 should fail [21:44:23] [PASSED] YUV420 should work [21:44:23] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ==== [21:44:23] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ====== [21:44:23] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ==== [21:44:23] [PASSED] drm_test_check_broadcast_rgb_value [21:44:23] [PASSED] drm_test_check_bpc_8_value [21:44:23] [PASSED] drm_test_check_bpc_10_value [21:44:23] [PASSED] drm_test_check_bpc_12_value [21:44:23] [PASSED] drm_test_check_format_value [21:44:23] [PASSED] drm_test_check_tmds_char_value [21:44:23] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ====== [21:44:23] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) = [21:44:23] [PASSED] drm_test_check_mode_valid [21:44:23] [PASSED] drm_test_check_mode_valid_reject [21:44:23] [PASSED] drm_test_check_mode_valid_reject_rate [21:44:23] [PASSED] drm_test_check_mode_valid_reject_max_clock [21:44:23] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock [21:44:23] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector [21:44:23] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb [21:44:23] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid === [21:44:23] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) = [21:44:23] [PASSED] drm_test_check_infoframes [21:44:23] [PASSED] drm_test_check_reject_avi_infoframe [21:44:23] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8 [21:44:23] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10 [21:44:23] [PASSED] drm_test_check_reject_audio_infoframe [21:44:23] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes === [21:44:23] ================= drm_managed (2 subtests) ================= [21:44:23] [PASSED] drm_test_managed_release_action [21:44:23] [PASSED] drm_test_managed_run_action [21:44:23] =================== [PASSED] drm_managed =================== [21:44:23] =================== drm_mm (6 subtests) ==================== [21:44:23] [PASSED] drm_test_mm_init [21:44:23] [PASSED] drm_test_mm_debug [21:44:23] [PASSED] drm_test_mm_align32 [21:44:23] [PASSED] drm_test_mm_align64 [21:44:23] [PASSED] drm_test_mm_lowest [21:44:23] [PASSED] drm_test_mm_highest [21:44:23] ===================== [PASSED] drm_mm ====================== [21:44:23] ============= drm_modes_analog_tv (5 subtests) ============= [21:44:23] [PASSED] drm_test_modes_analog_tv_mono_576i [21:44:23] [PASSED] drm_test_modes_analog_tv_ntsc_480i [21:44:23] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined [21:44:23] [PASSED] drm_test_modes_analog_tv_pal_576i [21:44:23] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined [21:44:23] =============== [PASSED] drm_modes_analog_tv =============== [21:44:23] ============== drm_plane_helper (2 subtests) =============== [21:44:23] =============== drm_test_check_plane_state ================ [21:44:23] [PASSED] clipping_simple [21:44:23] [PASSED] clipping_rotate_reflect [21:44:23] [PASSED] positioning_simple [21:44:23] [PASSED] upscaling [21:44:23] [PASSED] downscaling [21:44:23] [PASSED] rounding1 [21:44:23] [PASSED] rounding2 [21:44:23] [PASSED] rounding3 [21:44:23] [PASSED] rounding4 [21:44:23] =========== [PASSED] drm_test_check_plane_state ============ [21:44:23] =========== drm_test_check_invalid_plane_state ============ [21:44:23] [PASSED] positioning_invalid [21:44:23] [PASSED] upscaling_invalid [21:44:23] [PASSED] downscaling_invalid [21:44:23] ======= [PASSED] drm_test_check_invalid_plane_state ======== [21:44:23] ================ [PASSED] drm_plane_helper ================= [21:44:23] ====== drm_connector_helper_tv_get_modes (1 subtest) ======= [21:44:23] ====== drm_test_connector_helper_tv_get_modes_check ======= [21:44:23] [PASSED] None [21:44:23] [PASSED] PAL [21:44:23] [PASSED] NTSC [21:44:23] [PASSED] Both, NTSC Default [21:44:23] [PASSED] Both, PAL Default [21:44:23] [PASSED] Both, NTSC Default, with PAL on command-line [21:44:23] [PASSED] Both, PAL Default, with NTSC on command-line [21:44:23] == [PASSED] drm_test_connector_helper_tv_get_modes_check === [21:44:23] ======== [PASSED] drm_connector_helper_tv_get_modes ======== [21:44:23] ================== drm_rect (9 subtests) =================== [21:44:23] [PASSED] drm_test_rect_clip_scaled_div_by_zero [21:44:23] [PASSED] drm_test_rect_clip_scaled_not_clipped [21:44:23] [PASSED] drm_test_rect_clip_scaled_clipped [21:44:23] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned [21:44:23] ================= drm_test_rect_intersect ================= [21:44:23] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0 [21:44:23] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1 [21:44:23] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0 [21:44:23] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1 [21:44:23] [PASSED] right x left: 2x1+0+0 x 3x1+1+0 [21:44:23] [PASSED] left x right: 3x1+1+0 x 2x1+0+0 [21:44:23] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1 [21:44:23] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0 [21:44:23] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1 [21:44:23] [PASSED] touching side: 1x1+0+0 x 1x1+1+0 [21:44:23] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0 [21:44:23] [PASSED] inside another: 2x2+0+0 x 1x1+1+1 [21:44:23] [PASSED] far away: 1x1+0+0 x 1x1+3+6 [21:44:23] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10 [21:44:23] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10 [21:44:23] ============= [PASSED] drm_test_rect_intersect ============= [21:44:23] ================ drm_test_rect_calc_hscale ================ [21:44:23] [PASSED] normal use [21:44:23] [PASSED] out of max range [21:44:23] [PASSED] out of min range [21:44:23] [PASSED] zero dst [21:44:23] [PASSED] negative src [21:44:23] [PASSED] negative dst [21:44:23] ============ [PASSED] drm_test_rect_calc_hscale ============ [21:44:23] ================ drm_test_rect_calc_vscale ================ [21:44:23] [PASSED] normal use [21:44:23] [PASSED] out of max range [21:44:23] [PASSED] out of min range [21:44:23] [PASSED] zero dst [21:44:23] [PASSED] negative src [21:44:23] [PASSED] negative dst [21:44:23] ============ [PASSED] drm_test_rect_calc_vscale ============ [21:44:23] ================== drm_test_rect_rotate =================== [21:44:23] [PASSED] reflect-x [21:44:23] [PASSED] reflect-y [21:44:23] [PASSED] rotate-0 [21:44:23] [PASSED] rotate-90 [21:44:23] [PASSED] rotate-180 [21:44:23] [PASSED] rotate-270 [21:44:23] ============== [PASSED] drm_test_rect_rotate =============== [21:44:23] ================ drm_test_rect_rotate_inv ================= [21:44:23] [PASSED] reflect-x [21:44:23] [PASSED] reflect-y [21:44:23] [PASSED] rotate-0 [21:44:23] [PASSED] rotate-90 [21:44:23] [PASSED] rotate-180 [21:44:23] [PASSED] rotate-270 [21:44:23] ============ [PASSED] drm_test_rect_rotate_inv ============= [21:44:23] ==================== [PASSED] drm_rect ===================== [21:44:23] ============ drm_sysfb_modeset_test (1 subtest) ============ [21:44:23] ============ drm_test_sysfb_build_fourcc_list ============= [21:44:23] [PASSED] no native formats [21:44:23] [PASSED] XRGB8888 as native format [21:44:23] [PASSED] remove duplicates [21:44:23] [PASSED] convert alpha formats [21:44:23] [PASSED] random formats [21:44:23] ======== [PASSED] drm_test_sysfb_build_fourcc_list ========= [21:44:23] ============= [PASSED] drm_sysfb_modeset_test ============== [21:44:23] ================== drm_fixp (2 subtests) =================== [21:44:23] [PASSED] drm_test_int2fixp [21:44:23] [PASSED] drm_test_sm2fixp [21:44:23] ==================== [PASSED] drm_fixp ===================== [21:44:23] ============================================================ [21:44:23] Testing complete. Ran 637 tests: passed: 637 [21:44:23] Elapsed time: 26.638s total, 1.804s configuring, 24.664s building, 0.152s running + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig [21:44:23] Configuring KUnit Kernel ... Regenerating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [21:44:25] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [21:44:35] Starting KUnit Kernel (1/1)... [21:44:35] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [21:44:35] ================= ttm_device (5 subtests) ================== [21:44:35] [PASSED] ttm_device_init_basic [21:44:35] [PASSED] ttm_device_init_multiple [21:44:35] [PASSED] ttm_device_fini_basic [21:44:35] [PASSED] ttm_device_init_no_vma_man [21:44:35] ================== ttm_device_init_pools ================== [21:44:35] [PASSED] No DMA allocations, no DMA32 required [21:44:35] [PASSED] DMA allocations, DMA32 required [21:44:35] [PASSED] No DMA allocations, DMA32 required [21:44:35] [PASSED] DMA allocations, no DMA32 required [21:44:35] ============== [PASSED] ttm_device_init_pools ============== [21:44:35] =================== [PASSED] ttm_device ==================== [21:44:35] ================== ttm_pool (8 subtests) =================== [21:44:35] ================== ttm_pool_alloc_basic =================== [21:44:35] [PASSED] One page [21:44:35] [PASSED] More than one page [21:44:35] [PASSED] Above the allocation limit [21:44:35] [PASSED] One page, with coherent DMA mappings enabled [21:44:35] [PASSED] Above the allocation limit, with coherent DMA mappings enabled [21:44:35] ============== [PASSED] ttm_pool_alloc_basic =============== [21:44:35] ============== ttm_pool_alloc_basic_dma_addr ============== [21:44:35] [PASSED] One page [21:44:35] [PASSED] More than one page [21:44:35] [PASSED] Above the allocation limit [21:44:35] [PASSED] One page, with coherent DMA mappings enabled [21:44:35] [PASSED] Above the allocation limit, with coherent DMA mappings enabled [21:44:35] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ========== [21:44:35] [PASSED] ttm_pool_alloc_order_caching_match [21:44:35] [PASSED] ttm_pool_alloc_caching_mismatch [21:44:35] [PASSED] ttm_pool_alloc_order_mismatch [21:44:35] [PASSED] ttm_pool_free_dma_alloc [21:44:35] [PASSED] ttm_pool_free_no_dma_alloc [21:44:35] [PASSED] ttm_pool_fini_basic [21:44:35] ==================== [PASSED] ttm_pool ===================== [21:44:35] ================ ttm_resource (8 subtests) ================= [21:44:35] ================= ttm_resource_init_basic ================= [21:44:35] [PASSED] Init resource in TTM_PL_SYSTEM [21:44:35] [PASSED] Init resource in TTM_PL_VRAM [21:44:35] [PASSED] Init resource in a private placement [21:44:35] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags [21:44:35] ============= [PASSED] ttm_resource_init_basic ============= [21:44:35] [PASSED] ttm_resource_init_pinned [21:44:35] [PASSED] ttm_resource_fini_basic [21:44:35] [PASSED] ttm_resource_manager_init_basic [21:44:35] [PASSED] ttm_resource_manager_usage_basic [21:44:35] [PASSED] ttm_resource_manager_set_used_basic [21:44:35] [PASSED] ttm_sys_man_alloc_basic [21:44:35] [PASSED] ttm_sys_man_free_basic [21:44:35] ================== [PASSED] ttm_resource =================== [21:44:35] =================== ttm_tt (15 subtests) =================== [21:44:35] ==================== ttm_tt_init_basic ==================== [21:44:35] [PASSED] Page-aligned size [21:44:35] [PASSED] Extra pages requested [21:44:35] ================ [PASSED] ttm_tt_init_basic ================ [21:44:35] [PASSED] ttm_tt_init_misaligned [21:44:35] [PASSED] ttm_tt_fini_basic [21:44:35] [PASSED] ttm_tt_fini_sg [21:44:35] [PASSED] ttm_tt_fini_shmem [21:44:35] [PASSED] ttm_tt_create_basic [21:44:35] [PASSED] ttm_tt_create_invalid_bo_type [21:44:35] [PASSED] ttm_tt_create_ttm_exists [21:44:35] [PASSED] ttm_tt_create_failed [21:44:35] [PASSED] ttm_tt_destroy_basic [21:44:35] [PASSED] ttm_tt_populate_null_ttm [21:44:35] [PASSED] ttm_tt_populate_populated_ttm [21:44:35] [PASSED] ttm_tt_unpopulate_basic [21:44:35] [PASSED] ttm_tt_unpopulate_empty_ttm [21:44:35] [PASSED] ttm_tt_swapin_basic [21:44:35] ===================== [PASSED] ttm_tt ====================== [21:44:35] =================== ttm_bo (14 subtests) =================== [21:44:35] =========== ttm_bo_reserve_optimistic_no_ticket =========== [21:44:35] [PASSED] Cannot be interrupted and sleeps [21:44:35] [PASSED] Cannot be interrupted, locks straight away [21:44:35] [PASSED] Can be interrupted, sleeps [21:44:35] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket ======= [21:44:35] [PASSED] ttm_bo_reserve_locked_no_sleep [21:44:35] [PASSED] ttm_bo_reserve_no_wait_ticket [21:44:35] [PASSED] ttm_bo_reserve_double_resv [21:44:35] [PASSED] ttm_bo_reserve_interrupted [21:44:35] [PASSED] ttm_bo_reserve_deadlock [21:44:35] [PASSED] ttm_bo_unreserve_basic [21:44:35] [PASSED] ttm_bo_unreserve_pinned [21:44:35] [PASSED] ttm_bo_unreserve_bulk [21:44:35] [PASSED] ttm_bo_fini_basic [21:44:35] [PASSED] ttm_bo_fini_shared_resv [21:44:35] [PASSED] ttm_bo_pin_basic [21:44:35] [PASSED] ttm_bo_pin_unpin_resource [21:44:35] [PASSED] ttm_bo_multiple_pin_one_unpin [21:44:35] ===================== [PASSED] ttm_bo ====================== [21:44:35] ============== ttm_bo_validate (22 subtests) =============== [21:44:35] ============== ttm_bo_init_reserved_sys_man =============== [21:44:35] [PASSED] Buffer object for userspace [21:44:35] [PASSED] Kernel buffer object [21:44:35] [PASSED] Shared buffer object [21:44:35] ========== [PASSED] ttm_bo_init_reserved_sys_man =========== [21:44:35] ============== ttm_bo_init_reserved_mock_man ============== [21:44:35] [PASSED] Buffer object for userspace [21:44:35] [PASSED] Kernel buffer object [21:44:35] [PASSED] Shared buffer object [21:44:35] ========== [PASSED] ttm_bo_init_reserved_mock_man ========== [21:44:35] [PASSED] ttm_bo_init_reserved_resv [21:44:35] ================== ttm_bo_validate_basic ================== [21:44:35] [PASSED] Buffer object for userspace [21:44:35] [PASSED] Kernel buffer object [21:44:35] [PASSED] Shared buffer object [21:44:35] ============== [PASSED] ttm_bo_validate_basic ============== [21:44:35] [PASSED] ttm_bo_validate_invalid_placement [21:44:35] ============= ttm_bo_validate_same_placement ============== [21:44:35] [PASSED] System manager [21:44:35] [PASSED] VRAM manager [21:44:35] ========= [PASSED] ttm_bo_validate_same_placement ========== [21:44:35] [PASSED] ttm_bo_validate_failed_alloc [21:44:35] [PASSED] ttm_bo_validate_pinned [21:44:35] [PASSED] ttm_bo_validate_busy_placement [21:44:35] ================ ttm_bo_validate_multihop ================= [21:44:35] [PASSED] Buffer object for userspace [21:44:35] [PASSED] Kernel buffer object [21:44:35] [PASSED] Shared buffer object [21:44:35] ============ [PASSED] ttm_bo_validate_multihop ============= [21:44:35] ========== ttm_bo_validate_no_placement_signaled ========== [21:44:35] [PASSED] Buffer object in system domain, no page vector [21:44:35] [PASSED] Buffer object in system domain with an existing page vector [21:44:35] ====== [PASSED] ttm_bo_validate_no_placement_signaled ====== [21:44:35] ======== ttm_bo_validate_no_placement_not_signaled ======== [21:44:35] [PASSED] Buffer object for userspace [21:44:35] [PASSED] Kernel buffer object [21:44:35] [PASSED] Shared buffer object [21:44:35] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ==== [21:44:35] [PASSED] ttm_bo_validate_move_fence_signaled [21:44:35] ========= ttm_bo_validate_move_fence_not_signaled ========= [21:44:35] [PASSED] Waits for GPU [21:44:35] [PASSED] Tries to lock straight away [21:44:35] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled ===== [21:44:35] [PASSED] ttm_bo_validate_swapout [21:44:35] [PASSED] ttm_bo_validate_happy_evict [21:44:35] [PASSED] ttm_bo_validate_all_pinned_evict [21:44:35] [PASSED] ttm_bo_validate_allowed_only_evict [21:44:35] [PASSED] ttm_bo_validate_deleted_evict [21:44:35] [PASSED] ttm_bo_validate_busy_domain_evict [21:44:35] [PASSED] ttm_bo_validate_evict_gutting [21:44:35] [PASSED] ttm_bo_validate_recrusive_evict [21:44:35] ================= [PASSED] ttm_bo_validate ================= [21:44:35] ============================================================ [21:44:35] Testing complete. Ran 102 tests: passed: 102 [21:44:35] Elapsed time: 12.064s total, 1.800s configuring, 10.048s building, 0.185s running + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig [21:44:36] Configuring KUnit Kernel ... Regenerating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [21:44:37] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [21:44:46] Starting KUnit Kernel (1/1)... [21:44:46] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [21:44:46] =============== dma-buf-fence (12 subtests) ================ [21:44:46] [PASSED] test_sanitycheck [21:44:46] [PASSED] test_signaling [21:44:46] [PASSED] test_add_callback [21:44:46] [PASSED] test_late_add_callback [21:44:46] [PASSED] test_rm_callback [21:44:46] [PASSED] test_late_rm_callback [21:44:46] [PASSED] test_status [21:44:46] [PASSED] test_error [21:44:46] [PASSED] test_wait [21:44:46] [PASSED] test_wait_timeout [21:44:46] [PASSED] test_stub [21:44:46] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs) [21:44:46] ================== [PASSED] dma-buf-fence ================== [21:44:46] ============ dma-buf-fence-chain (11 subtests) ============= [21:44:46] [PASSED] test_sanitycheck [21:44:46] [PASSED] test_find_seqno [21:44:46] [PASSED] test_find_signaled [21:44:46] [PASSED] test_find_out_of_order [21:44:51] [PASSED] test_find_gap [21:44:51] [PASSED] test_find_race [21:44:51] [PASSED] test_signal_forward [21:44:51] [PASSED] test_signal_backward [21:44:51] [PASSED] test_wait_forward [21:44:51] [PASSED] test_wait_backward [21:44:51] [PASSED] test_wait_random [21:44:51] =============== [PASSED] dma-buf-fence-chain =============== [21:44:51] ============ dma-buf-fence-unwrap (10 subtests) ============ [21:44:51] [PASSED] test_sanitycheck [21:44:51] [PASSED] test_unwrap_array [21:44:51] [PASSED] test_unwrap_chain [21:44:51] [PASSED] test_unwrap_chain_array [21:44:51] [PASSED] test_unwrap_merge [21:44:51] [PASSED] test_unwrap_merge_duplicate [21:44:51] [PASSED] test_unwrap_merge_seqno [21:44:51] [PASSED] test_unwrap_merge_order [21:44:51] [PASSED] test_unwrap_merge_complex [21:44:51] [PASSED] test_unwrap_merge_complex_seqno [21:44:51] ============== [PASSED] dma-buf-fence-unwrap =============== [21:44:51] ================ dma-buf-resv (5 subtests) ================= [21:44:51] [PASSED] test_sanitycheck [21:44:51] ===================== test_signaling ====================== [21:44:51] [PASSED] kernel [21:44:51] [PASSED] write [21:44:51] [PASSED] read [21:44:51] [PASSED] bookkeep [21:44:51] ================= [PASSED] test_signaling ================== [21:44:51] ====================== test_for_each ====================== [21:44:51] [PASSED] kernel [21:44:51] [PASSED] write [21:44:51] [PASSED] read [21:44:51] [PASSED] bookkeep [21:44:51] ================== [PASSED] test_for_each ================== [21:44:51] ================= test_for_each_unlocked ================== [21:44:51] [PASSED] kernel [21:44:51] [PASSED] write [21:44:51] [PASSED] read [21:44:51] [PASSED] bookkeep [21:44:51] ============= [PASSED] test_for_each_unlocked ============== [21:44:51] ===================== test_get_fences ===================== [21:44:51] [PASSED] kernel [21:44:51] [PASSED] write [21:44:51] [PASSED] read [21:44:51] [PASSED] bookkeep [21:44:51] ================= [PASSED] test_get_fences ================= [21:44:51] ================== [PASSED] dma-buf-resv =================== [21:44:51] ============================================================ [21:44:51] Testing complete. Ran 50 tests: passed: 49, skipped: 1 [21:44:51] Elapsed time: 15.742s total, 1.827s configuring, 8.593s building, 5.279s running + cleanup ++ stat -c %u:%g /kernel + chown -R 1003:1003 /kernel ^ permalink raw reply [flat|nested] 11+ messages in thread
* ✓ Xe.CI.BAT: success for drm/xe: Update Wa_14026539277 2026-08-21 21:36 [PATCH v3 0/3] drm/xe: Update Wa_14026539277 Gustavo Sousa ` (4 preceding siblings ...) 2026-08-21 21:44 ` ✓ CI.KUnit: success " Patchwork @ 2026-08-21 22:42 ` Patchwork 2026-08-21 23:52 ` ✗ Xe.CI.FULL: failure " Patchwork 6 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2026-08-21 22:42 UTC (permalink / raw) To: Gustavo Sousa; +Cc: intel-xe [-- Attachment #1: Type: text/plain, Size: 943 bytes --] == Series Details == Series: drm/xe: Update Wa_14026539277 URL : https://patchwork.freedesktop.org/series/172611/ State : success == Summary == CI Bug Log - changes from xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c_BAT -> xe-pw-172611v1_BAT ==================================================== Summary ------- **SUCCESS** No regressions found. Participating hosts (13 -> 13) ------------------------------ No changes in participating hosts Changes ------- No changes found Build changes ------------- * Linux: xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c -> xe-pw-172611v1 IGT_9070: 80b6e4c9b9cb853c63a9bcaa4784e0306d1f7fca @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c: 58d59a40e2a041d3c159fab8bf5d5dc19d28da6c xe-pw-172611v1: 172611v1 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/index.html [-- Attachment #2: Type: text/html, Size: 1491 bytes --] ^ permalink raw reply [flat|nested] 11+ messages in thread
* ✗ Xe.CI.FULL: failure for drm/xe: Update Wa_14026539277 2026-08-21 21:36 [PATCH v3 0/3] drm/xe: Update Wa_14026539277 Gustavo Sousa ` (5 preceding siblings ...) 2026-08-21 22:42 ` ✓ Xe.CI.BAT: " Patchwork @ 2026-08-21 23:52 ` Patchwork 6 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2026-08-21 23:52 UTC (permalink / raw) To: Gustavo Sousa; +Cc: intel-xe [-- Attachment #1: Type: text/plain, Size: 34443 bytes --] == Series Details == Series: drm/xe: Update Wa_14026539277 URL : https://patchwork.freedesktop.org/series/172611/ State : failure == Summary == CI Bug Log - changes from xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c_FULL -> xe-pw-172611v1_FULL ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with xe-pw-172611v1_FULL absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in xe-pw-172611v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (2 -> 2) ------------------------------ No changes in participating hosts Possible new issues ------------------- Here are the unknown changes that may have been introduced in xe-pw-172611v1_FULL: ### IGT changes ### #### Possible regressions #### * igt@xe_pmu@all-fn-engine-activity-load@engine-drm_xe_engine_class_compute0: - shard-bmg: [PASS][1] -> [FAIL][2] +1 other test fail [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-bmg-3/igt@xe_pmu@all-fn-engine-activity-load@engine-drm_xe_engine_class_compute0.html [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-7/igt@xe_pmu@all-fn-engine-activity-load@engine-drm_xe_engine_class_compute0.html Known issues ------------ Here are the changes found in xe-pw-172611v1_FULL that come from known issues: ### IGT changes ### #### Issues hit #### * igt@kms_async_flips@alternate-sync-async-flip@pipe-a-dp-2: - shard-bmg: [PASS][3] -> [FAIL][4] ([Intel XE#6078]) [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-bmg-3/igt@kms_async_flips@alternate-sync-async-flip@pipe-a-dp-2.html [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-7/igt@kms_async_flips@alternate-sync-async-flip@pipe-a-dp-2.html * igt@kms_big_fb@x-tiled-32bpp-rotate-90: - shard-bmg: NOTRUN -> [SKIP][5] ([Intel XE#2327]) +1 other test skip [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-3/igt@kms_big_fb@x-tiled-32bpp-rotate-90.html * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip: - shard-bmg: NOTRUN -> [SKIP][6] ([Intel XE#1124]) +6 other tests skip [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-5/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip.html * igt@kms_bw@connected-linear-tiling-4-displays-target-1920x1080p: - shard-bmg: NOTRUN -> [SKIP][7] ([Intel XE#7679]) [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-3/igt@kms_bw@connected-linear-tiling-4-displays-target-1920x1080p.html * igt@kms_bw@linear-tiling-1-displays-target-2560x1440p: - shard-bmg: NOTRUN -> [SKIP][8] ([Intel XE#367]) +1 other test skip [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-4/igt@kms_bw@linear-tiling-1-displays-target-2560x1440p.html * igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc: - shard-bmg: NOTRUN -> [SKIP][9] ([Intel XE#2887]) +11 other tests skip [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-5/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc.html * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-dp-2: - shard-bmg: NOTRUN -> [SKIP][10] ([Intel XE#2652]) +17 other tests skip [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-3/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-dp-2.html * igt@kms_cdclk@plane-scaling: - shard-bmg: NOTRUN -> [SKIP][11] ([Intel XE#2724] / [Intel XE#7449]) [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-5/igt@kms_cdclk@plane-scaling.html * igt@kms_chamelium_color@gamma: - shard-bmg: NOTRUN -> [SKIP][12] ([Intel XE#2325] / [Intel XE#7358]) [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-3/igt@kms_chamelium_color@gamma.html * igt@kms_chamelium_edid@dp-edid-change-during-hibernate: - shard-bmg: NOTRUN -> [SKIP][13] ([Intel XE#2252]) +3 other tests skip [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-3/igt@kms_chamelium_edid@dp-edid-change-during-hibernate.html * igt@kms_chamelium_sharpness_filter@filter-basic: - shard-bmg: NOTRUN -> [SKIP][14] ([Intel XE#6507]) [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-3/igt@kms_chamelium_sharpness_filter@filter-basic.html * igt@kms_content_protection@content-type-change: - shard-bmg: NOTRUN -> [SKIP][15] ([Intel XE#7642]) +1 other test skip [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-5/igt@kms_content_protection@content-type-change.html * igt@kms_content_protection@lic-type-0@pipe-a-dp-2: - shard-bmg: NOTRUN -> [FAIL][16] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) +1 other test fail [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-3/igt@kms_content_protection@lic-type-0@pipe-a-dp-2.html * igt@kms_content_protection@uevent: - shard-bmg: NOTRUN -> [FAIL][17] ([Intel XE#6707] / [Intel XE#7439]) +1 other test fail [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-4/igt@kms_content_protection@uevent.html * igt@kms_cursor_crc@cursor-random-32x32: - shard-bmg: NOTRUN -> [SKIP][18] ([Intel XE#2320]) +4 other tests skip [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-3/igt@kms_cursor_crc@cursor-random-32x32.html * igt@kms_cursor_crc@cursor-sliding-512x512: - shard-bmg: NOTRUN -> [SKIP][19] ([Intel XE#2321] / [Intel XE#7355]) +1 other test skip [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-5/igt@kms_cursor_crc@cursor-sliding-512x512.html * igt@kms_dsc@dsc-fractional-bpp-with-bpc: - shard-bmg: NOTRUN -> [SKIP][20] ([Intel XE#8265]) +3 other tests skip [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-5/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html * igt@kms_flip@plain-flip-ts-check-interruptible@a-hdmi-a3: - shard-bmg: NOTRUN -> [FAIL][21] ([Intel XE#3098]) +1 other test fail [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-3/igt@kms_flip@plain-flip-ts-check-interruptible@a-hdmi-a3.html * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling: - shard-bmg: NOTRUN -> [SKIP][22] ([Intel XE#7178] / [Intel XE#7349]) [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-3/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling: - shard-bmg: NOTRUN -> [SKIP][23] ([Intel XE#7178] / [Intel XE#7351]) +1 other test skip [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-3/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling.html * igt@kms_frontbuffer_tracking@drrs-abgr161616f-draw-render: - shard-bmg: NOTRUN -> [SKIP][24] ([Intel XE#7061] / [Intel XE#7356]) +6 other tests skip [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-abgr161616f-draw-render.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render: - shard-bmg: NOTRUN -> [SKIP][25] ([Intel XE#4141]) +9 other tests skip [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbc-tiling-y: - shard-bmg: NOTRUN -> [SKIP][26] ([Intel XE#2352] / [Intel XE#7399]) [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-tiling-y.html * igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-primscrn-pri-shrfb-draw-mmap-wc: - shard-bmg: NOTRUN -> [SKIP][27] ([Intel XE#2311]) +47 other tests skip [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-primscrn-pri-shrfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@fbcpsrhdr-abgr161616f-draw-render: - shard-bmg: NOTRUN -> [SKIP][28] ([Intel XE#7061]) +2 other tests skip [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcpsrhdr-abgr161616f-draw-render.html * igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen: - shard-bmg: NOTRUN -> [SKIP][29] ([Intel XE#2313]) +42 other tests skip [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-9/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen.html * igt@kms_hdr@invalid-hdr: - shard-bmg: NOTRUN -> [SKIP][30] ([Intel XE#1503]) [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-3/igt@kms_hdr@invalid-hdr.html * igt@kms_joiner@basic-max-non-joiner: - shard-bmg: NOTRUN -> [SKIP][31] ([Intel XE#4298] / [Intel XE#5873]) [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-3/igt@kms_joiner@basic-max-non-joiner.html * igt@kms_joiner@invalid-modeset-force-ultra-joiner: - shard-bmg: NOTRUN -> [SKIP][32] ([Intel XE#6911] / [Intel XE#7466]) [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-9/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html * igt@kms_panel_fitting@legacy: - shard-bmg: NOTRUN -> [SKIP][33] ([Intel XE#2486]) [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-3/igt@kms_panel_fitting@legacy.html * igt@kms_plane@pixel-format-x-tiled-modifier@pipe-b-plane-5: - shard-bmg: NOTRUN -> [SKIP][34] ([Intel XE#8303]) +1 other test skip [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-3/igt@kms_plane@pixel-format-x-tiled-modifier@pipe-b-plane-5.html * igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier-source-clamping: - shard-bmg: NOTRUN -> [SKIP][35] ([Intel XE#7283]) +4 other tests skip [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-9/igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier-source-clamping.html * igt@kms_plane_lowres@tiling-y: - shard-bmg: NOTRUN -> [SKIP][36] ([Intel XE#2393]) [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-5/igt@kms_plane_lowres@tiling-y.html * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-b: - shard-bmg: NOTRUN -> [SKIP][37] ([Intel XE#2763] / [Intel XE#6886]) +9 other tests skip [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-4/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-b.html * igt@kms_pm_backlight@fade-with-suspend: - shard-bmg: NOTRUN -> [SKIP][38] ([Intel XE#7376] / [Intel XE#7760] / [Intel XE#870]) [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-3/igt@kms_pm_backlight@fade-with-suspend.html * igt@kms_pm_dc@dc3co-vpb-framegap: - shard-bmg: NOTRUN -> [SKIP][39] ([Intel XE#8395] / [Intel XE#8396]) +1 other test skip [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-5/igt@kms_pm_dc@dc3co-vpb-framegap.html * igt@kms_pm_dc@dc3co-vpb-framegap@psr2-xrgb8888: - shard-bmg: NOTRUN -> [SKIP][40] ([Intel XE#8396]) +1 other test skip [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-5/igt@kms_pm_dc@dc3co-vpb-framegap@psr2-xrgb8888.html * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf: - shard-bmg: NOTRUN -> [SKIP][41] ([Intel XE#1489]) +4 other tests skip [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-5/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf.html * igt@kms_psr2_su@page_flip-p010: - shard-bmg: NOTRUN -> [SKIP][42] ([Intel XE#2387] / [Intel XE#7429]) +1 other test skip [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-3/igt@kms_psr2_su@page_flip-p010.html * igt@kms_psr@fbc-psr2-cursor-plane-move: - shard-bmg: NOTRUN -> [SKIP][43] ([Intel XE#2234] / [Intel XE#2850]) +8 other tests skip [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-3/igt@kms_psr@fbc-psr2-cursor-plane-move.html * igt@kms_psr@psr2-primary-render: - shard-bmg: NOTRUN -> [SKIP][44] ([Intel XE#2234]) [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-5/igt@kms_psr@psr2-primary-render.html * igt@kms_rotation_crc@primary-y-tiled-reflect-x-0: - shard-bmg: NOTRUN -> [SKIP][45] ([Intel XE#2330] / [Intel XE#5813]) +1 other test skip [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-5/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html * igt@kms_rotation_crc@sprite-rotation-90: - shard-bmg: NOTRUN -> [SKIP][46] ([Intel XE#3904] / [Intel XE#7342]) [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-3/igt@kms_rotation_crc@sprite-rotation-90.html * igt@kms_sharpness_filter@filter-suspend: - shard-bmg: NOTRUN -> [SKIP][47] ([Intel XE#6503]) +3 other tests skip [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-5/igt@kms_sharpness_filter@filter-suspend.html * igt@kms_vrr@seamless-rr-switch-virtual: - shard-bmg: NOTRUN -> [SKIP][48] ([Intel XE#1499]) +1 other test skip [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-4/igt@kms_vrr@seamless-rr-switch-virtual.html * igt@sriov_basic@pf-unbind-with-vfs-enabled-numvfs-all: - shard-bmg: NOTRUN -> [ABORT][49] ([Intel XE#8868]) [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-4/igt@sriov_basic@pf-unbind-with-vfs-enabled-numvfs-all.html * igt@xe_evict@evict-mixed-many-threads-small: - shard-bmg: NOTRUN -> [INCOMPLETE][50] ([Intel XE#6321] / [Intel XE#8355]) [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-4/igt@xe_evict@evict-mixed-many-threads-small.html * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race: - shard-bmg: NOTRUN -> [SKIP][51] ([Intel XE#2322] / [Intel XE#7372]) +6 other tests skip [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-3/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race.html * igt@xe_exec_fault_mode@twice-multi-queue-imm: - shard-bmg: NOTRUN -> [SKIP][52] ([Intel XE#8374]) +9 other tests skip [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-5/igt@xe_exec_fault_mode@twice-multi-queue-imm.html * igt@xe_exec_multi_queue@one-queue-preempt-mode-close-fd-smem: - shard-bmg: NOTRUN -> [SKIP][53] ([Intel XE#8364]) +23 other tests skip [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-5/igt@xe_exec_multi_queue@one-queue-preempt-mode-close-fd-smem.html * igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-userptr-rebind: - shard-bmg: NOTRUN -> [SKIP][54] ([Intel XE#8378]) +7 other tests skip [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-9/igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-userptr-rebind.html * igt@xe_module_load@load: - shard-bmg: ([PASS][55], [PASS][56], [PASS][57], [PASS][58], [PASS][59], [PASS][60], [PASS][61], [PASS][62], [PASS][63], [PASS][64], [PASS][65], [PASS][66], [PASS][67], [PASS][68], [PASS][69], [PASS][70], [PASS][71], [PASS][72], [PASS][73], [PASS][74], [PASS][75], [PASS][76], [PASS][77], [PASS][78], [PASS][79]) -> ([SKIP][80], [PASS][81], [PASS][82], [PASS][83], [PASS][84], [PASS][85], [PASS][86], [PASS][87], [PASS][88], [PASS][89], [PASS][90], [PASS][91], [PASS][92], [PASS][93], [PASS][94], [PASS][95], [PASS][96], [PASS][97], [PASS][98], [PASS][99], [PASS][100], [PASS][101], [PASS][102], [PASS][103], [PASS][104], [PASS][105]) ([Intel XE#2457] / [Intel XE#7405]) [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-bmg-5/igt@xe_module_load@load.html [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-bmg-10/igt@xe_module_load@load.html [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-bmg-4/igt@xe_module_load@load.html [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-bmg-1/igt@xe_module_load@load.html [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-bmg-9/igt@xe_module_load@load.html [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-bmg-4/igt@xe_module_load@load.html [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-bmg-7/igt@xe_module_load@load.html [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-bmg-1/igt@xe_module_load@load.html [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-bmg-7/igt@xe_module_load@load.html [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-bmg-1/igt@xe_module_load@load.html [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-bmg-10/igt@xe_module_load@load.html [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-bmg-3/igt@xe_module_load@load.html [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-bmg-3/igt@xe_module_load@load.html [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-bmg-6/igt@xe_module_load@load.html [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-bmg-8/igt@xe_module_load@load.html [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-bmg-6/igt@xe_module_load@load.html [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-bmg-8/igt@xe_module_load@load.html [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-bmg-8/igt@xe_module_load@load.html [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-bmg-9/igt@xe_module_load@load.html [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-bmg-2/igt@xe_module_load@load.html [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-bmg-10/igt@xe_module_load@load.html [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-bmg-2/igt@xe_module_load@load.html [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-bmg-5/igt@xe_module_load@load.html [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-bmg-5/igt@xe_module_load@load.html [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-bmg-3/igt@xe_module_load@load.html [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-4/igt@xe_module_load@load.html [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-6/igt@xe_module_load@load.html [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-6/igt@xe_module_load@load.html [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-6/igt@xe_module_load@load.html [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-7/igt@xe_module_load@load.html [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-7/igt@xe_module_load@load.html [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-7/igt@xe_module_load@load.html [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-9/igt@xe_module_load@load.html [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-5/igt@xe_module_load@load.html [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-5/igt@xe_module_load@load.html [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-5/igt@xe_module_load@load.html [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-4/igt@xe_module_load@load.html [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-9/igt@xe_module_load@load.html [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-9/igt@xe_module_load@load.html [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-1/igt@xe_module_load@load.html [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-1/igt@xe_module_load@load.html [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-1/igt@xe_module_load@load.html [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-10/igt@xe_module_load@load.html [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-8/igt@xe_module_load@load.html [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-4/igt@xe_module_load@load.html [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-2/igt@xe_module_load@load.html [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-2/igt@xe_module_load@load.html [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-10/igt@xe_module_load@load.html [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-3/igt@xe_module_load@load.html [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-3/igt@xe_module_load@load.html [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-3/igt@xe_module_load@load.html * igt@xe_multigpu_svm@mgpu-concurrent-access-basic: - shard-bmg: NOTRUN -> [SKIP][106] ([Intel XE#6964]) +1 other test skip [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-3/igt@xe_multigpu_svm@mgpu-concurrent-access-basic.html * igt@xe_page_reclaim@boundary-split: - shard-bmg: NOTRUN -> [SKIP][107] ([Intel XE#7793]) +2 other tests skip [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-4/igt@xe_page_reclaim@boundary-split.html * igt@xe_pm@s2idle-d3cold-basic-exec: - shard-bmg: NOTRUN -> [SKIP][108] ([Intel XE#2284] / [Intel XE#7370]) +4 other tests skip [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-4/igt@xe_pm@s2idle-d3cold-basic-exec.html * igt@xe_prefetch_fault@prefetch-fault-svm: - shard-bmg: NOTRUN -> [SKIP][109] ([Intel XE#7599]) [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-5/igt@xe_prefetch_fault@prefetch-fault-svm.html * igt@xe_pxp@pxp-stale-bo-exec-post-suspend: - shard-bmg: NOTRUN -> [SKIP][110] ([Intel XE#4733] / [Intel XE#7417]) +1 other test skip [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-3/igt@xe_pxp@pxp-stale-bo-exec-post-suspend.html #### Possible fixes #### * igt@device_reset@unbind-reset-rebind: - shard-bmg: [ABORT][111] ([Intel XE#8007]) -> [PASS][112] +2 other tests pass [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-bmg-10/igt@device_reset@unbind-reset-rebind.html [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-3/igt@device_reset@unbind-reset-rebind.html * igt@kms_async_flips@alternate-sync-async-flip@pipe-c-dp-2: - shard-bmg: [FAIL][113] ([Intel XE#6078]) -> [PASS][114] [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-bmg-3/igt@kms_async_flips@alternate-sync-async-flip@pipe-c-dp-2.html [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-7/igt@kms_async_flips@alternate-sync-async-flip@pipe-c-dp-2.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1: - shard-lnl: [FAIL][115] ([Intel XE#301]) -> [PASS][116] +1 other test pass [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-lnl-6/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html * igt@xe_evict@evict-beng-mixed-many-threads-small: - shard-bmg: [INCOMPLETE][117] ([Intel XE#6321] / [Intel XE#8355]) -> [PASS][118] [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-bmg-6/igt@xe_evict@evict-beng-mixed-many-threads-small.html [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-5/igt@xe_evict@evict-beng-mixed-many-threads-small.html * igt@xe_exec_system_allocator@threads-shared-vm-many-stride-mmap-huge-nomemset: - shard-bmg: [FAIL][119] ([Intel XE#8058] / [Intel XE#8528]) -> [PASS][120] [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-bmg-5/igt@xe_exec_system_allocator@threads-shared-vm-many-stride-mmap-huge-nomemset.html [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-1/igt@xe_exec_system_allocator@threads-shared-vm-many-stride-mmap-huge-nomemset.html #### Warnings #### * igt@kms_hdr@brightness-with-hdr: - shard-bmg: [SKIP][121] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][122] ([Intel XE#3544]) [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-bmg-6/igt@kms_hdr@brightness-with-hdr.html [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-5/igt@kms_hdr@brightness-with-hdr.html * igt@xe_fault_injection@exec-queue-create-fail-xe_pxp_exec_queue_add: - shard-bmg: [ABORT][123] ([Intel XE#8007]) -> [SKIP][124] ([Intel XE#6281] / [Intel XE#7426]) [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c/shard-bmg-9/igt@xe_fault_injection@exec-queue-create-fail-xe_pxp_exec_queue_add.html [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/shard-bmg-5/igt@xe_fault_injection@exec-queue-create-fail-xe_pxp_exec_queue_add.html [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124 [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178 [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489 [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499 [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503 [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234 [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252 [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284 [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311 [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313 [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320 [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321 [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322 [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325 [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327 [Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330 [Intel XE#2352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2352 [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387 [Intel XE#2393]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2393 [Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457 [Intel XE#2486]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2486 [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652 [Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724 [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763 [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850 [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887 [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301 [Intel XE#3098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3098 [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304 [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374 [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544 [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367 [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904 [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141 [Intel XE#4298]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4298 [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733 [Intel XE#5813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5813 [Intel XE#5873]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5873 [Intel XE#6078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6078 [Intel XE#6281]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6281 [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321 [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503 [Intel XE#6507]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6507 [Intel XE#6707]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6707 [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886 [Intel XE#6911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6911 [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964 [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061 [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178 [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283 [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342 [Intel XE#7349]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7349 [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351 [Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355 [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356 [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358 [Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370 [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372 [Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374 [Intel XE#7376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7376 [Intel XE#7399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7399 [Intel XE#7405]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7405 [Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417 [Intel XE#7426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7426 [Intel XE#7429]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7429 [Intel XE#7439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7439 [Intel XE#7449]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7449 [Intel XE#7466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7466 [Intel XE#7599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7599 [Intel XE#7642]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7642 [Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679 [Intel XE#7760]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7760 [Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793 [Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007 [Intel XE#8058]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8058 [Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265 [Intel XE#8303]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8303 [Intel XE#8355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8355 [Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364 [Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374 [Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378 [Intel XE#8395]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8395 [Intel XE#8396]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8396 [Intel XE#8528]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8528 [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870 [Intel XE#8868]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8868 Build changes ------------- * Linux: xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c -> xe-pw-172611v1 IGT_9070: 80b6e4c9b9cb853c63a9bcaa4784e0306d1f7fca @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git xe-5631-58d59a40e2a041d3c159fab8bf5d5dc19d28da6c: 58d59a40e2a041d3c159fab8bf5d5dc19d28da6c xe-pw-172611v1: 172611v1 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172611v1/index.html [-- Attachment #2: Type: text/html, Size: 37279 bytes --] ^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2026-08-24 7:45 UTC | newest] Thread overview: 11+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-08-21 21:36 [PATCH v3 0/3] drm/xe: Update Wa_14026539277 Gustavo Sousa 2026-08-21 21:36 ` [PATCH v3 1/3] drm/xe: Extract override_has_cached_pt() Gustavo Sousa 2026-08-21 21:36 ` [PATCH v3 2/3] Revert "drm/xe/nvlp: Implement Wa_14026539277" Gustavo Sousa 2026-08-21 21:36 ` [PATCH v3 3/3] drm/xe: Add up-to-date implementation for Wa_14026539277 Gustavo Sousa 2026-08-21 21:42 ` Gustavo Sousa 2026-08-24 6:59 ` Hazubski, Filip 2026-08-21 21:52 ` sashiko-bot 2026-08-21 21:43 ` ✗ CI.checkpatch: warning for drm/xe: Update Wa_14026539277 Patchwork 2026-08-21 21:44 ` ✓ CI.KUnit: success " Patchwork 2026-08-21 22:42 ` ✓ Xe.CI.BAT: " Patchwork 2026-08-21 23:52 ` ✗ Xe.CI.FULL: failure " Patchwork
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