[PATCH] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms

[PATCH] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms

[tilak.tirumalesh.tangudu]

From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>

Avoid IDLEDLY timer programming lessthan 5 micro secs.
Apply wa_14025941587 to Graphics Versions 20.01 to 35.11
and Media Versions 13.01 to 35.03

v2: Use xe_rtp_match_not_sriov_vf, move to local variable
    Remove warn and other knits            - Matt R

v3: Add verbose comment - Tejas

v4: Restore IDLE_DLY register on engine reset.
    Add it to GUC save-restore list. -Vivek

v5: Extend WA to Media Versions 13.01 to 35.03 - Vinay

Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
---
 drivers/gpu/drm/xe/xe_guc_ads.c    |  2 +-
 drivers/gpu/drm/xe/xe_hw_engine.c  | 26 +++++++++++++++++++++++---
 drivers/gpu/drm/xe/xe_wa_oob.rules |  2 ++
 3 files changed, 26 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c
index c98454545a85..2080e0e650eb 100644
--- a/drivers/gpu/drm/xe/xe_guc_ads.c
+++ b/drivers/gpu/drm/xe/xe_guc_ads.c
@@ -768,7 +768,7 @@ static unsigned int guc_mmio_regset_write(struct xe_guc_ads *ads,
 		}
 	}
 
-	if (XE_GT_WA(hwe->gt, 16023105232))
+	if (XE_GT_WA(hwe->gt, 16023105232) || XE_GT_WA(hwe->gt, 14025941587))
 		guc_mmio_regset_write_one(ads, regset_map,
 					  RING_IDLEDLY(hwe->mmio_base),
 					  count++);
diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
index 8c66ff6f3d3c..dd8eec098bdf 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine.c
+++ b/drivers/gpu/drm/xe/xe_hw_engine.c
@@ -584,8 +584,12 @@ static void adjust_idledly(struct xe_hw_engine *hwe)
 	u32 idledly_units_ps = 8 * gt->info.timestamp_base;
 	u32 maxcnt_units_ns = 640;
 	bool inhibit_switch = 0;
+	bool wa_applied = false;
+
+	if ((!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) ||
+	    XE_GT_WA(gt, 14025941587)) {
+		u32 mincnt_idledly_ns = 5000;
 
-	if (!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) {
 		idledly = xe_mmio_read32(&gt->mmio, RING_IDLEDLY(hwe->mmio_base));
 		maxcnt = xe_mmio_read32(&gt->mmio, RING_PWRCTX_MAXCNT(hwe->mmio_base));
 
@@ -595,8 +599,24 @@ static void adjust_idledly(struct xe_hw_engine *hwe)
 		maxcnt = REG_FIELD_GET(IDLE_WAIT_TIME, maxcnt);
 		maxcnt *= maxcnt_units_ns;
 
-		if (xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) {
-			idledly = DIV_ROUND_CLOSEST(((maxcnt - 1) * 1000),
+		/* Wa_14025941587: applied prior to Wa_16023105232,
+		 * as the latter has higher priority, although conflict
+		 * is not expected.
+		 */
+		if (XE_GT_WA(gt, 14025941587) &&
+		    idledly < mincnt_idledly_ns) {
+			idledly = mincnt_idledly_ns;
+			wa_applied = true;
+		}
+
+		if (XE_GT_WA(gt, 16023105232) &&
+		    (xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch))) {
+			idledly = (maxcnt - 1);
+			wa_applied = true;
+		}
+
+		if (wa_applied) {
+			idledly = DIV_ROUND_CLOSEST((idledly * 1000),
 						    idledly_units_ps);
 			xe_mmio_write32(&gt->mmio, RING_IDLEDLY(hwe->mmio_base), idledly);
 		}
diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
index f8a185103b80..5d5041168fa8 100644
--- a/drivers/gpu/drm/xe/xe_wa_oob.rules
+++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
@@ -65,3 +65,5 @@
 
 14025883347	MEDIA_VERSION_RANGE(1301, 3503)
 		GRAPHICS_VERSION_RANGE(2004, 3005)
+14025941587    GRAPHICS_VERSION_RANGE(2001, 3511), FUNC(xe_rtp_match_not_sriov_vf)
+	       MEDIA_VERSION_RANGE(1301, 3503), FUNC(xe_rtp_match_not_sriov_vf)
-- 
2.46.0

Re: [PATCH] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms

[Vivekanandan, Balasubramani]

On 02.06.2026 10:02, tilak.tirumalesh.tangudu@intel.com wrote:
> From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
> 
> Avoid IDLEDLY timer programming lessthan 5 micro secs.
> Apply wa_14025941587 to Graphics Versions 20.01 to 35.11
> and Media Versions 13.01 to 35.03
> 
> v2: Use xe_rtp_match_not_sriov_vf, move to local variable
>     Remove warn and other knits            - Matt R
> 
> v3: Add verbose comment - Tejas
> 
> v4: Restore IDLE_DLY register on engine reset.
>     Add it to GUC save-restore list. -Vivek
> 
> v5: Extend WA to Media Versions 13.01 to 35.03 - Vinay
> 
> Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_guc_ads.c    |  2 +-
>  drivers/gpu/drm/xe/xe_hw_engine.c  | 26 +++++++++++++++++++++++---
>  drivers/gpu/drm/xe/xe_wa_oob.rules |  2 ++
>  3 files changed, 26 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c
> index c98454545a85..2080e0e650eb 100644
> --- a/drivers/gpu/drm/xe/xe_guc_ads.c
> +++ b/drivers/gpu/drm/xe/xe_guc_ads.c
> @@ -768,7 +768,7 @@ static unsigned int guc_mmio_regset_write(struct xe_guc_ads *ads,
>  		}
>  	}
>  
> -	if (XE_GT_WA(hwe->gt, 16023105232))
> +	if (XE_GT_WA(hwe->gt, 16023105232) || XE_GT_WA(hwe->gt, 14025941587))
>  		guc_mmio_regset_write_one(ads, regset_map,
>  					  RING_IDLEDLY(hwe->mmio_base),
>  					  count++);
> diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
> index 8c66ff6f3d3c..dd8eec098bdf 100644
> --- a/drivers/gpu/drm/xe/xe_hw_engine.c
> +++ b/drivers/gpu/drm/xe/xe_hw_engine.c
> @@ -584,8 +584,12 @@ static void adjust_idledly(struct xe_hw_engine *hwe)
>  	u32 idledly_units_ps = 8 * gt->info.timestamp_base;
>  	u32 maxcnt_units_ns = 640;
>  	bool inhibit_switch = 0;
> +	bool wa_applied = false;
> +
> +	if ((!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) ||
> +	    XE_GT_WA(gt, 14025941587)) {
> +		u32 mincnt_idledly_ns = 5000;
>  
> -	if (!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) {
>  		idledly = xe_mmio_read32(&gt->mmio, RING_IDLEDLY(hwe->mmio_base));
>  		maxcnt = xe_mmio_read32(&gt->mmio, RING_PWRCTX_MAXCNT(hwe->mmio_base));
>  
> @@ -595,8 +599,24 @@ static void adjust_idledly(struct xe_hw_engine *hwe)
>  		maxcnt = REG_FIELD_GET(IDLE_WAIT_TIME, maxcnt);
>  		maxcnt *= maxcnt_units_ns;
>  
> -		if (xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) {
> -			idledly = DIV_ROUND_CLOSEST(((maxcnt - 1) * 1000),
> +		/* Wa_14025941587: applied prior to Wa_16023105232,
> +		 * as the latter has higher priority, although conflict
> +		 * is not expected.
> +		 */
> +		if (XE_GT_WA(gt, 14025941587) &&
> +		    idledly < mincnt_idledly_ns) {
> +			idledly = mincnt_idledly_ns;
> +			wa_applied = true;

If there would be a platform for which 14025941587 applies but not
16023105232, then the above condition would silently clear the
inhibit_switch (bit 31 of IDLEDLY register) though 14025941587 doesn't
explicitly asks for clearing it.
But idle delay timeout won't apply when inhibit_switch bit is set.
The WARN statement below for WA 16023105232, is helping to alert us when
we are clearing inhibit_switch bit though the WA is not asking for it
explicitly.

Therefore I would suggest we add a similar WARN statement checking for
idledly value and inhibit_switch even for 14025941587.

> +		}
> +
> +		if (XE_GT_WA(gt, 16023105232) &&
> +		    (xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch))) {
> +			idledly = (maxcnt - 1);
> +			wa_applied = true;

Regards,
Bala

> +		}
> +
> +		if (wa_applied) {
> +			idledly = DIV_ROUND_CLOSEST((idledly * 1000),
>  						    idledly_units_ps);
>  			xe_mmio_write32(&gt->mmio, RING_IDLEDLY(hwe->mmio_base), idledly);
>  		}
> diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
> index f8a185103b80..5d5041168fa8 100644
> --- a/drivers/gpu/drm/xe/xe_wa_oob.rules
> +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
> @@ -65,3 +65,5 @@
>  
>  14025883347	MEDIA_VERSION_RANGE(1301, 3503)
>  		GRAPHICS_VERSION_RANGE(2004, 3005)
> +14025941587    GRAPHICS_VERSION_RANGE(2001, 3511), FUNC(xe_rtp_match_not_sriov_vf)
> +	       MEDIA_VERSION_RANGE(1301, 3503), FUNC(xe_rtp_match_not_sriov_vf)
> -- 
> 2.46.0
> 

RE: [PATCH] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms

[Tangudu, Tilak Tirumalesh]

-----Original Message-----
From: Vivekanandan, Balasubramani <balasubramani.vivekanandan@intel.com> 
Sent: 03 June 2026 13:27
To: Tangudu, Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>; Roper, Matthew D <matthew.d.roper@intel.com>; Belgaumkar, Vinay <vinay.belgaumkar@intel.com>; Upadhyay, Tejas <tejas.upadhyay@intel.com>; intel-xe@lists.freedesktop.org
Subject: Re: [PATCH] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms

On 02.06.2026 10:02, tilak.tirumalesh.tangudu@intel.com wrote:
> From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
> 
> Avoid IDLEDLY timer programming lessthan 5 micro secs.
> Apply wa_14025941587 to Graphics Versions 20.01 to 35.11 and Media 
> Versions 13.01 to 35.03
> 
> v2: Use xe_rtp_match_not_sriov_vf, move to local variable
>     Remove warn and other knits            - Matt R
> 
> v3: Add verbose comment - Tejas
> 
> v4: Restore IDLE_DLY register on engine reset.
>     Add it to GUC save-restore list. -Vivek
> 
> v5: Extend WA to Media Versions 13.01 to 35.03 - Vinay
> 
> Signed-off-by: Tangudu Tilak Tirumalesh 
> <tilak.tirumalesh.tangudu@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_guc_ads.c    |  2 +-
>  drivers/gpu/drm/xe/xe_hw_engine.c  | 26 +++++++++++++++++++++++---  
> drivers/gpu/drm/xe/xe_wa_oob.rules |  2 ++
>  3 files changed, 26 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c 
> b/drivers/gpu/drm/xe/xe_guc_ads.c index c98454545a85..2080e0e650eb 
> 100644
> --- a/drivers/gpu/drm/xe/xe_guc_ads.c
> +++ b/drivers/gpu/drm/xe/xe_guc_ads.c
> @@ -768,7 +768,7 @@ static unsigned int guc_mmio_regset_write(struct xe_guc_ads *ads,
>  		}
>  	}
>  
> -	if (XE_GT_WA(hwe->gt, 16023105232))
> +	if (XE_GT_WA(hwe->gt, 16023105232) || XE_GT_WA(hwe->gt, 
> +14025941587))
>  		guc_mmio_regset_write_one(ads, regset_map,
>  					  RING_IDLEDLY(hwe->mmio_base),
>  					  count++);
> diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c 
> b/drivers/gpu/drm/xe/xe_hw_engine.c
> index 8c66ff6f3d3c..dd8eec098bdf 100644
> --- a/drivers/gpu/drm/xe/xe_hw_engine.c
> +++ b/drivers/gpu/drm/xe/xe_hw_engine.c
> @@ -584,8 +584,12 @@ static void adjust_idledly(struct xe_hw_engine *hwe)
>  	u32 idledly_units_ps = 8 * gt->info.timestamp_base;
>  	u32 maxcnt_units_ns = 640;
>  	bool inhibit_switch = 0;
> +	bool wa_applied = false;
> +
> +	if ((!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) ||
> +	    XE_GT_WA(gt, 14025941587)) {
> +		u32 mincnt_idledly_ns = 5000;
>  
> -	if (!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) {
>  		idledly = xe_mmio_read32(&gt->mmio, RING_IDLEDLY(hwe->mmio_base));
>  		maxcnt = xe_mmio_read32(&gt->mmio, 
> RING_PWRCTX_MAXCNT(hwe->mmio_base));
>  
> @@ -595,8 +599,24 @@ static void adjust_idledly(struct xe_hw_engine *hwe)
>  		maxcnt = REG_FIELD_GET(IDLE_WAIT_TIME, maxcnt);
>  		maxcnt *= maxcnt_units_ns;
>  
> -		if (xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) {
> -			idledly = DIV_ROUND_CLOSEST(((maxcnt - 1) * 1000),
> +		/* Wa_14025941587: applied prior to Wa_16023105232,
> +		 * as the latter has higher priority, although conflict
> +		 * is not expected.
> +		 */
> +		if (XE_GT_WA(gt, 14025941587) &&
> +		    idledly < mincnt_idledly_ns) {
> +			idledly = mincnt_idledly_ns;
> +			wa_applied = true;

>If there would be a platform for which 14025941587 applies but not 16023105232, then the >above condition would silently clear the inhibit_switch (bit 31 of IDLEDLY register) though >14025941587 doesn't explicitly asks for clearing it.
>But idle delay timeout won't apply when inhibit_switch bit is set.
>The WARN statement below for WA 16023105232, is helping to alert us when we are clearing >inhibit_switch bit though the WA is not asking for it explicitly.

>Therefore I would suggest we add a similar WARN statement checking for idledly value and >inhibit_switch even for 14025941587.
Thanks for the review on this, warn on inhibit_switch override is sufficient right?
warn on Idledly value condition is not needed right ? as we intend to override as part of WA.
> +		}
> +
> +		if (XE_GT_WA(gt, 16023105232) &&
> +		    (xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch))) {
> +			idledly = (maxcnt - 1);
> +			wa_applied = true;

Regards,
Bala

> +		}
> +
> +		if (wa_applied) {
> +			idledly = DIV_ROUND_CLOSEST((idledly * 1000),
>  						    idledly_units_ps);
>  			xe_mmio_write32(&gt->mmio, RING_IDLEDLY(hwe->mmio_base), idledly);
>  		}
> diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules 
> b/drivers/gpu/drm/xe/xe_wa_oob.rules
> index f8a185103b80..5d5041168fa8 100644
> --- a/drivers/gpu/drm/xe/xe_wa_oob.rules
> +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
> @@ -65,3 +65,5 @@
>  
>  14025883347	MEDIA_VERSION_RANGE(1301, 3503)
>  		GRAPHICS_VERSION_RANGE(2004, 3005)
> +14025941587    GRAPHICS_VERSION_RANGE(2001, 3511), FUNC(xe_rtp_match_not_sriov_vf)
> +	       MEDIA_VERSION_RANGE(1301, 3503), 
> +FUNC(xe_rtp_match_not_sriov_vf)
> --
> 2.46.0
> 

Re: [PATCH] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms

[Vivekanandan, Balasubramani]

On 03.06.2026 13:54, Tangudu, Tilak Tirumalesh wrote:
> 
> 
> -----Original Message-----
> From: Vivekanandan, Balasubramani <balasubramani.vivekanandan@intel.com> 
> Sent: 03 June 2026 13:27
> To: Tangudu, Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>; Roper, Matthew D <matthew.d.roper@intel.com>; Belgaumkar, Vinay <vinay.belgaumkar@intel.com>; Upadhyay, Tejas <tejas.upadhyay@intel.com>; intel-xe@lists.freedesktop.org
> Subject: Re: [PATCH] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms
> 
> On 02.06.2026 10:02, tilak.tirumalesh.tangudu@intel.com wrote:
> > From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
> > 
> > Avoid IDLEDLY timer programming lessthan 5 micro secs.
> > Apply wa_14025941587 to Graphics Versions 20.01 to 35.11 and Media 
> > Versions 13.01 to 35.03
> > 
> > v2: Use xe_rtp_match_not_sriov_vf, move to local variable
> >     Remove warn and other knits            - Matt R
> > 
> > v3: Add verbose comment - Tejas
> > 
> > v4: Restore IDLE_DLY register on engine reset.
> >     Add it to GUC save-restore list. -Vivek
> > 
> > v5: Extend WA to Media Versions 13.01 to 35.03 - Vinay
> > 
> > Signed-off-by: Tangudu Tilak Tirumalesh 
> > <tilak.tirumalesh.tangudu@intel.com>
> > ---
> >  drivers/gpu/drm/xe/xe_guc_ads.c    |  2 +-
> >  drivers/gpu/drm/xe/xe_hw_engine.c  | 26 +++++++++++++++++++++++---  
> > drivers/gpu/drm/xe/xe_wa_oob.rules |  2 ++
> >  3 files changed, 26 insertions(+), 4 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c 
> > b/drivers/gpu/drm/xe/xe_guc_ads.c index c98454545a85..2080e0e650eb 
> > 100644
> > --- a/drivers/gpu/drm/xe/xe_guc_ads.c
> > +++ b/drivers/gpu/drm/xe/xe_guc_ads.c
> > @@ -768,7 +768,7 @@ static unsigned int guc_mmio_regset_write(struct xe_guc_ads *ads,
> >  		}
> >  	}
> >  
> > -	if (XE_GT_WA(hwe->gt, 16023105232))
> > +	if (XE_GT_WA(hwe->gt, 16023105232) || XE_GT_WA(hwe->gt, 
> > +14025941587))
> >  		guc_mmio_regset_write_one(ads, regset_map,
> >  					  RING_IDLEDLY(hwe->mmio_base),
> >  					  count++);
> > diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c 
> > b/drivers/gpu/drm/xe/xe_hw_engine.c
> > index 8c66ff6f3d3c..dd8eec098bdf 100644
> > --- a/drivers/gpu/drm/xe/xe_hw_engine.c
> > +++ b/drivers/gpu/drm/xe/xe_hw_engine.c
> > @@ -584,8 +584,12 @@ static void adjust_idledly(struct xe_hw_engine *hwe)
> >  	u32 idledly_units_ps = 8 * gt->info.timestamp_base;
> >  	u32 maxcnt_units_ns = 640;
> >  	bool inhibit_switch = 0;
> > +	bool wa_applied = false;
> > +
> > +	if ((!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) ||
> > +	    XE_GT_WA(gt, 14025941587)) {
> > +		u32 mincnt_idledly_ns = 5000;
> >  
> > -	if (!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) {
> >  		idledly = xe_mmio_read32(&gt->mmio, RING_IDLEDLY(hwe->mmio_base));
> >  		maxcnt = xe_mmio_read32(&gt->mmio, 
> > RING_PWRCTX_MAXCNT(hwe->mmio_base));
> >  
> > @@ -595,8 +599,24 @@ static void adjust_idledly(struct xe_hw_engine *hwe)
> >  		maxcnt = REG_FIELD_GET(IDLE_WAIT_TIME, maxcnt);
> >  		maxcnt *= maxcnt_units_ns;
> >  
> > -		if (xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) {
> > -			idledly = DIV_ROUND_CLOSEST(((maxcnt - 1) * 1000),
> > +		/* Wa_14025941587: applied prior to Wa_16023105232,
> > +		 * as the latter has higher priority, although conflict
> > +		 * is not expected.
> > +		 */
> > +		if (XE_GT_WA(gt, 14025941587) &&
> > +		    idledly < mincnt_idledly_ns) {
> > +			idledly = mincnt_idledly_ns;
> > +			wa_applied = true;
> 
> >If there would be a platform for which 14025941587 applies but not 16023105232, then the >above condition would silently clear the inhibit_switch (bit 31 of IDLEDLY register) though >14025941587 doesn't explicitly asks for clearing it.
> >But idle delay timeout won't apply when inhibit_switch bit is set.
> >The WARN statement below for WA 16023105232, is helping to alert us when we are clearing >inhibit_switch bit though the WA is not asking for it explicitly.
> 
> >Therefore I would suggest we add a similar WARN statement checking for idledly value and >inhibit_switch even for 14025941587.
> Thanks for the review on this, warn on inhibit_switch override is sufficient right?
> warn on Idledly value condition is not needed right ? as we intend to override as part of WA.

Yes, checking only for inhibit_switch is enough in the WARN.

Regards,
Bala

> > +		}
> > +
> > +		if (XE_GT_WA(gt, 16023105232) &&
> > +		    (xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch))) {
> > +			idledly = (maxcnt - 1);
> > +			wa_applied = true;
> 
> Regards,
> Bala
> 
> > +		}
> > +
> > +		if (wa_applied) {
> > +			idledly = DIV_ROUND_CLOSEST((idledly * 1000),
> >  						    idledly_units_ps);
> >  			xe_mmio_write32(&gt->mmio, RING_IDLEDLY(hwe->mmio_base), idledly);
> >  		}
> > diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules 
> > b/drivers/gpu/drm/xe/xe_wa_oob.rules
> > index f8a185103b80..5d5041168fa8 100644
> > --- a/drivers/gpu/drm/xe/xe_wa_oob.rules
> > +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
> > @@ -65,3 +65,5 @@
> >  
> >  14025883347	MEDIA_VERSION_RANGE(1301, 3503)
> >  		GRAPHICS_VERSION_RANGE(2004, 3005)
> > +14025941587    GRAPHICS_VERSION_RANGE(2001, 3511), FUNC(xe_rtp_match_not_sriov_vf)
> > +	       MEDIA_VERSION_RANGE(1301, 3503), 
> > +FUNC(xe_rtp_match_not_sriov_vf)
> > --
> > 2.46.0
> > 

[PATCH] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms

[tilak.tirumalesh.tangudu]

From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>

Avoid IDLEDLY timer programming lessthan 5 micro secs.
Apply wa_14025941587 to Graphics Versions 20.01 to 35.11
and Media Versions 13.01 to 35.03

v2: Use xe_rtp_match_not_sriov_vf, move to local variable
    Remove warn and other knits            - Matt R

v3: Add verbose comment - Tejas

v4: Restore IDLE_DLY register on engine reset.
    Add it to GUC save-restore list. -Vivek

v5: Extend WA to Media Versions 13.01 to 35.03 - Vinay
v6: Avoid clearing inhibit switch - Bala
    Refactor code accordingly by adding idle_reg_val.

Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
---
 drivers/gpu/drm/xe/xe_guc_ads.c    |  2 +-
 drivers/gpu/drm/xe/xe_hw_engine.c  | 49 ++++++++++++++++++++++++------
 drivers/gpu/drm/xe/xe_wa_oob.rules |  2 ++
 3 files changed, 42 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c
index c98454545a85..2080e0e650eb 100644
--- a/drivers/gpu/drm/xe/xe_guc_ads.c
+++ b/drivers/gpu/drm/xe/xe_guc_ads.c
@@ -768,7 +768,7 @@ static unsigned int guc_mmio_regset_write(struct xe_guc_ads *ads,
 		}
 	}
 
-	if (XE_GT_WA(hwe->gt, 16023105232))
+	if (XE_GT_WA(hwe->gt, 16023105232) || XE_GT_WA(hwe->gt, 14025941587))
 		guc_mmio_regset_write_one(ads, regset_map,
 					  RING_IDLEDLY(hwe->mmio_base),
 					  count++);
diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
index 98265293f2dc..03e977f4eb24 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine.c
+++ b/drivers/gpu/drm/xe/xe_hw_engine.c
@@ -578,25 +578,54 @@ static void hw_engine_init_early(struct xe_gt *gt, struct xe_hw_engine *hwe,
 static void adjust_idledly(struct xe_hw_engine *hwe)
 {
 	struct xe_gt *gt = hwe->gt;
-	u32 idledly, maxcnt;
+	u32 idledly, idledly_reg_val, maxcnt;
 	u32 idledly_units_ps = 8 * gt->info.timestamp_base;
 	u32 maxcnt_units_ns = 640;
-	bool inhibit_switch = 0;
+	bool inhibit_switch = false;
+	bool wa_applied = false;
 
-	if (!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) {
-		idledly = xe_mmio_read32(&gt->mmio, RING_IDLEDLY(hwe->mmio_base));
+	if ((!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) ||
+	    XE_GT_WA(gt, 14025941587)) {
+		u32 mincnt_idledly_ns = 5000;
+
+		idledly_reg_val = xe_mmio_read32(&gt->mmio, RING_IDLEDLY(hwe->mmio_base));
 		maxcnt = xe_mmio_read32(&gt->mmio, RING_PWRCTX_MAXCNT(hwe->mmio_base));
 
-		inhibit_switch = idledly & INHIBIT_SWITCH_UNTIL_PREEMPTED;
-		idledly = REG_FIELD_GET(IDLE_DELAY, idledly);
+		inhibit_switch = idledly_reg_val & INHIBIT_SWITCH_UNTIL_PREEMPTED;
+		idledly = REG_FIELD_GET(IDLE_DELAY, idledly_reg_val);
 		idledly = DIV_ROUND_CLOSEST(idledly * idledly_units_ps, 1000);
 		maxcnt = REG_FIELD_GET(IDLE_WAIT_TIME, maxcnt);
 		maxcnt *= maxcnt_units_ns;
 
-		if (xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) {
-			idledly = DIV_ROUND_CLOSEST(((maxcnt - 1) * 1000),
-						    idledly_units_ps);
-			xe_mmio_write32(&gt->mmio, RING_IDLEDLY(hwe->mmio_base), idledly);
+		/* Wa_14025941587: applied prior to Wa_16023105232,
+		 * as the latter has higher priority, although conflict
+		 * is not expected.
+		 */
+		if (XE_GT_WA(gt, 14025941587) &&
+		    idledly < mincnt_idledly_ns) {
+			idledly = mincnt_idledly_ns;
+			wa_applied = true;
+		}
+
+		if (XE_GT_WA(gt, 16023105232) &&
+		    xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) {
+			idledly = (maxcnt - 1);
+			wa_applied = true;
+			/* inhibit_switch override to keep
+			 * semantics of Wa_16023105232
+			 */
+			if (inhibit_switch)
+				idledly_reg_val &= ~INHIBIT_SWITCH_UNTIL_PREEMPTED;
+		}
+
+		if (wa_applied) {
+			idledly_reg_val &= ~IDLE_DELAY;
+			idledly_reg_val |= REG_FIELD_PREP(IDLE_DELAY,
+						 DIV_ROUND_CLOSEST(idledly * 1000,
+								   idledly_units_ps));
+			xe_mmio_write32(&gt->mmio,
+					RING_IDLEDLY(hwe->mmio_base),
+					idledly_reg_val);
 		}
 	}
 }
diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
index f8a185103b80..5d5041168fa8 100644
--- a/drivers/gpu/drm/xe/xe_wa_oob.rules
+++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
@@ -65,3 +65,5 @@
 
 14025883347	MEDIA_VERSION_RANGE(1301, 3503)
 		GRAPHICS_VERSION_RANGE(2004, 3005)
+14025941587    GRAPHICS_VERSION_RANGE(2001, 3511), FUNC(xe_rtp_match_not_sriov_vf)
+	       MEDIA_VERSION_RANGE(1301, 3503), FUNC(xe_rtp_match_not_sriov_vf)
-- 
2.46.0

Re: [PATCH] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms

[Vivekanandan, Balasubramani]

On 04.06.2026 00:17, tilak.tirumalesh.tangudu@intel.com wrote:
> From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
> 
> Avoid IDLEDLY timer programming lessthan 5 micro secs.
> Apply wa_14025941587 to Graphics Versions 20.01 to 35.11
> and Media Versions 13.01 to 35.03
> 
> v2: Use xe_rtp_match_not_sriov_vf, move to local variable
>     Remove warn and other knits            - Matt R
> 
> v3: Add verbose comment - Tejas
> 
> v4: Restore IDLE_DLY register on engine reset.
>     Add it to GUC save-restore list. -Vivek
> 
> v5: Extend WA to Media Versions 13.01 to 35.03 - Vinay
> v6: Avoid clearing inhibit switch - Bala
>     Refactor code accordingly by adding idle_reg_val.
> 
> Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_guc_ads.c    |  2 +-
>  drivers/gpu/drm/xe/xe_hw_engine.c  | 49 ++++++++++++++++++++++++------
>  drivers/gpu/drm/xe/xe_wa_oob.rules |  2 ++
>  3 files changed, 42 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c
> index c98454545a85..2080e0e650eb 100644
> --- a/drivers/gpu/drm/xe/xe_guc_ads.c
> +++ b/drivers/gpu/drm/xe/xe_guc_ads.c
> @@ -768,7 +768,7 @@ static unsigned int guc_mmio_regset_write(struct xe_guc_ads *ads,
>  		}
>  	}
>  
> -	if (XE_GT_WA(hwe->gt, 16023105232))
> +	if (XE_GT_WA(hwe->gt, 16023105232) || XE_GT_WA(hwe->gt, 14025941587))
>  		guc_mmio_regset_write_one(ads, regset_map,
>  					  RING_IDLEDLY(hwe->mmio_base),
>  					  count++);
> diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
> index 98265293f2dc..03e977f4eb24 100644
> --- a/drivers/gpu/drm/xe/xe_hw_engine.c
> +++ b/drivers/gpu/drm/xe/xe_hw_engine.c
> @@ -578,25 +578,54 @@ static void hw_engine_init_early(struct xe_gt *gt, struct xe_hw_engine *hwe,
>  static void adjust_idledly(struct xe_hw_engine *hwe)
>  {
>  	struct xe_gt *gt = hwe->gt;
> -	u32 idledly, maxcnt;
> +	u32 idledly, idledly_reg_val, maxcnt;
>  	u32 idledly_units_ps = 8 * gt->info.timestamp_base;
>  	u32 maxcnt_units_ns = 640;
> -	bool inhibit_switch = 0;
> +	bool inhibit_switch = false;
> +	bool wa_applied = false;
>  
> -	if (!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) {
> -		idledly = xe_mmio_read32(&gt->mmio, RING_IDLEDLY(hwe->mmio_base));
> +	if ((!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) ||
> +	    XE_GT_WA(gt, 14025941587)) {
> +		u32 mincnt_idledly_ns = 5000;
> +
> +		idledly_reg_val = xe_mmio_read32(&gt->mmio, RING_IDLEDLY(hwe->mmio_base));
>  		maxcnt = xe_mmio_read32(&gt->mmio, RING_PWRCTX_MAXCNT(hwe->mmio_base));
>  
> -		inhibit_switch = idledly & INHIBIT_SWITCH_UNTIL_PREEMPTED;
> -		idledly = REG_FIELD_GET(IDLE_DELAY, idledly);
> +		inhibit_switch = idledly_reg_val & INHIBIT_SWITCH_UNTIL_PREEMPTED;
> +		idledly = REG_FIELD_GET(IDLE_DELAY, idledly_reg_val);
>  		idledly = DIV_ROUND_CLOSEST(idledly * idledly_units_ps, 1000);
>  		maxcnt = REG_FIELD_GET(IDLE_WAIT_TIME, maxcnt);
>  		maxcnt *= maxcnt_units_ns;
>  
> -		if (xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) {
> -			idledly = DIV_ROUND_CLOSEST(((maxcnt - 1) * 1000),
> -						    idledly_units_ps);
> -			xe_mmio_write32(&gt->mmio, RING_IDLEDLY(hwe->mmio_base), idledly);
> +		/* Wa_14025941587: applied prior to Wa_16023105232,
> +		 * as the latter has higher priority, although conflict
> +		 * is not expected.
> +		 */
> +		if (XE_GT_WA(gt, 14025941587) &&
> +		    idledly < mincnt_idledly_ns) {
> +			idledly = mincnt_idledly_ns;
> +			wa_applied = true;
> +		}
> +
> +		if (XE_GT_WA(gt, 16023105232) &&
> +		    xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) {
> +			idledly = (maxcnt - 1);
We would enter this condition even when inhibit_switch = 1, so we should
have another condition before updating idledly.


> +			wa_applied = true;
> +			/* inhibit_switch override to keep
> +			 * semantics of Wa_16023105232
> +			 */

----------------------------------------------------------------------------------------
> +			if (inhibit_switch)
> +				idledly_reg_val &= ~INHIBIT_SWITCH_UNTIL_PREEMPTED;
> +		}
> +
> +		if (wa_applied) {
> +			idledly_reg_val &= ~IDLE_DELAY;
> +			idledly_reg_val |= REG_FIELD_PREP(IDLE_DELAY,
> +						 DIV_ROUND_CLOSEST(idledly * 1000,
> +								   idledly_units_ps));
----------------------------------------------------------------------------------------

The above changes would work, but it could be simplified as below. I
leave it to your preference.

			inhibit_switch = 0;
		}

		if (wa_applied)
			idledly_reg_val = REG_FIELD_PREP(IDLE_DELAY,
							 DIV_ROUND_CLOSEST(idledly * 1000,
							 idledly_units_ps)) | inhibit_switch;


With that.

Reviewed-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>

Regards,
Bala

> +			xe_mmio_write32(&gt->mmio,
> +					RING_IDLEDLY(hwe->mmio_base),
> +					idledly_reg_val);
>  		}
>  	}
>  }
> diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
> index f8a185103b80..5d5041168fa8 100644
> --- a/drivers/gpu/drm/xe/xe_wa_oob.rules
> +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
> @@ -65,3 +65,5 @@
>  
>  14025883347	MEDIA_VERSION_RANGE(1301, 3503)
>  		GRAPHICS_VERSION_RANGE(2004, 3005)
> +14025941587    GRAPHICS_VERSION_RANGE(2001, 3511), FUNC(xe_rtp_match_not_sriov_vf)
> +	       MEDIA_VERSION_RANGE(1301, 3503), FUNC(xe_rtp_match_not_sriov_vf)
> -- 
> 2.46.0
> 

RE: [PATCH] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms

[Tangudu, Tilak Tirumalesh]

-----Original Message-----
From: Vivekanandan, Balasubramani <balasubramani.vivekanandan@intel.com> 
Sent: 05 June 2026 16:44
To: Tangudu, Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>; Roper, Matthew D <matthew.d.roper@intel.com>; Belgaumkar, Vinay <vinay.belgaumkar@intel.com>; Upadhyay, Tejas <tejas.upadhyay@intel.com>; intel-xe@lists.freedesktop.org
Subject: Re: [PATCH] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms

On 04.06.2026 00:17, tilak.tirumalesh.tangudu@intel.com wrote:
> From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
> 
> Avoid IDLEDLY timer programming lessthan 5 micro secs.
> Apply wa_14025941587 to Graphics Versions 20.01 to 35.11 and Media 
> Versions 13.01 to 35.03
> 
> v2: Use xe_rtp_match_not_sriov_vf, move to local variable
>     Remove warn and other knits            - Matt R
> 
> v3: Add verbose comment - Tejas
> 
> v4: Restore IDLE_DLY register on engine reset.
>     Add it to GUC save-restore list. -Vivek
> 
> v5: Extend WA to Media Versions 13.01 to 35.03 - Vinay
> v6: Avoid clearing inhibit switch - Bala
>     Refactor code accordingly by adding idle_reg_val.
> 
> Signed-off-by: Tangudu Tilak Tirumalesh 
> <tilak.tirumalesh.tangudu@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_guc_ads.c    |  2 +-
>  drivers/gpu/drm/xe/xe_hw_engine.c  | 49 
> ++++++++++++++++++++++++------  drivers/gpu/drm/xe/xe_wa_oob.rules |  
> 2 ++
>  3 files changed, 42 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c 
> b/drivers/gpu/drm/xe/xe_guc_ads.c index c98454545a85..2080e0e650eb 
> 100644
> --- a/drivers/gpu/drm/xe/xe_guc_ads.c
> +++ b/drivers/gpu/drm/xe/xe_guc_ads.c
> @@ -768,7 +768,7 @@ static unsigned int guc_mmio_regset_write(struct xe_guc_ads *ads,
>  		}
>  	}
>  
> -	if (XE_GT_WA(hwe->gt, 16023105232))
> +	if (XE_GT_WA(hwe->gt, 16023105232) || XE_GT_WA(hwe->gt, 
> +14025941587))
>  		guc_mmio_regset_write_one(ads, regset_map,
>  					  RING_IDLEDLY(hwe->mmio_base),
>  					  count++);
> diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c 
> b/drivers/gpu/drm/xe/xe_hw_engine.c
> index 98265293f2dc..03e977f4eb24 100644
> --- a/drivers/gpu/drm/xe/xe_hw_engine.c
> +++ b/drivers/gpu/drm/xe/xe_hw_engine.c
> @@ -578,25 +578,54 @@ static void hw_engine_init_early(struct xe_gt 
> *gt, struct xe_hw_engine *hwe,  static void adjust_idledly(struct 
> xe_hw_engine *hwe)  {
>  	struct xe_gt *gt = hwe->gt;
> -	u32 idledly, maxcnt;
> +	u32 idledly, idledly_reg_val, maxcnt;
>  	u32 idledly_units_ps = 8 * gt->info.timestamp_base;
>  	u32 maxcnt_units_ns = 640;
> -	bool inhibit_switch = 0;
> +	bool inhibit_switch = false;
> +	bool wa_applied = false;
>  
> -	if (!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) {
> -		idledly = xe_mmio_read32(&gt->mmio, RING_IDLEDLY(hwe->mmio_base));
> +	if ((!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) ||
> +	    XE_GT_WA(gt, 14025941587)) {
> +		u32 mincnt_idledly_ns = 5000;
> +
> +		idledly_reg_val = xe_mmio_read32(&gt->mmio, 
> +RING_IDLEDLY(hwe->mmio_base));
>  		maxcnt = xe_mmio_read32(&gt->mmio, 
> RING_PWRCTX_MAXCNT(hwe->mmio_base));
>  
> -		inhibit_switch = idledly & INHIBIT_SWITCH_UNTIL_PREEMPTED;
> -		idledly = REG_FIELD_GET(IDLE_DELAY, idledly);
> +		inhibit_switch = idledly_reg_val & INHIBIT_SWITCH_UNTIL_PREEMPTED;
> +		idledly = REG_FIELD_GET(IDLE_DELAY, idledly_reg_val);
>  		idledly = DIV_ROUND_CLOSEST(idledly * idledly_units_ps, 1000);
>  		maxcnt = REG_FIELD_GET(IDLE_WAIT_TIME, maxcnt);
>  		maxcnt *= maxcnt_units_ns;
>  
> -		if (xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) {
> -			idledly = DIV_ROUND_CLOSEST(((maxcnt - 1) * 1000),
> -						    idledly_units_ps);
> -			xe_mmio_write32(&gt->mmio, RING_IDLEDLY(hwe->mmio_base), idledly);
> +		/* Wa_14025941587: applied prior to Wa_16023105232,
> +		 * as the latter has higher priority, although conflict
> +		 * is not expected.
> +		 */
> +		if (XE_GT_WA(gt, 14025941587) &&
> +		    idledly < mincnt_idledly_ns) {
> +			idledly = mincnt_idledly_ns;
> +			wa_applied = true;
> +		}
> +
> +		if (XE_GT_WA(gt, 16023105232) &&
> +		    xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) {
> +			idledly = (maxcnt - 1);
>>We would enter this condition even when inhibit_switch = 1, so we should have another >>condition before updating idledly.
I have left previous WA 16023105232 semantics undisturbed.

> +			wa_applied = true;
> +			/* inhibit_switch override to keep
> +			 * semantics of Wa_16023105232
> +			 */

----------------------------------------------------------------------------------------
> +			if (inhibit_switch)
> +				idledly_reg_val &= ~INHIBIT_SWITCH_UNTIL_PREEMPTED;
> +		}
> +
> +		if (wa_applied) {
> +			idledly_reg_val &= ~IDLE_DELAY;
> +			idledly_reg_val |= REG_FIELD_PREP(IDLE_DELAY,
> +						 DIV_ROUND_CLOSEST(idledly * 1000,
> +								   idledly_units_ps));
----------------------------------------------------------------------------------------

>The above changes would work, but it could be simplified as below. I leave it to your >preference.

>			inhibit_switch = 0;
>		}

	>	if (wa_applied)
	>		idledly_reg_val = REG_FIELD_PREP(IDLE_DELAY,
	>						 DIV_ROUND_CLOSEST(idledly * 1000,
	>						 idledly_units_ps)) | inhibit_switch;

inhibit_switch do not reflect INHIBIT_SWITCH_UNTIL_PREEMPTED, it has only result
>With that.

>Reviewed-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>

Thanks for this 
Tilak

>Regards,
>Bala

> +			xe_mmio_write32(&gt->mmio,
> +					RING_IDLEDLY(hwe->mmio_base),
> +					idledly_reg_val);
>  		}
>  	}
>  }
> diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules 
> b/drivers/gpu/drm/xe/xe_wa_oob.rules
> index f8a185103b80..5d5041168fa8 100644
> --- a/drivers/gpu/drm/xe/xe_wa_oob.rules
> +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
> @@ -65,3 +65,5 @@
>  
>  14025883347	MEDIA_VERSION_RANGE(1301, 3503)
>  		GRAPHICS_VERSION_RANGE(2004, 3005)
> +14025941587    GRAPHICS_VERSION_RANGE(2001, 3511), FUNC(xe_rtp_match_not_sriov_vf)
> +	       MEDIA_VERSION_RANGE(1301, 3503), 
> +FUNC(xe_rtp_match_not_sriov_vf)
> --
> 2.46.0
> 

[PATCH] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms

[tilak.tirumalesh.tangudu]

From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>

Avoid IDLEDLY timer programming lessthan 5 micro secs.
Apply wa_14025941587 to Graphics Versions 20.01 to 35.11
and Media Versions 13.01 to 35.03

v2: Use xe_rtp_match_not_sriov_vf, move to local variable
    Remove warn and other knits            - Matt R

v3: Add verbose comment - Tejas

v4: Restore IDLE_DLY register on engine reset.
    Add it to GUC save-restore list. -Vivek

v5: Extend WA to Media Versions 13.01 to 35.03 - Vinay
v6: Avoid clearing inhibit switch - Bala
    Refactor code accordingly by adding idle_reg_val.

Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
Reviewed-by:  Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
---
 drivers/gpu/drm/xe/xe_guc_ads.c    |  2 +-
 drivers/gpu/drm/xe/xe_hw_engine.c  | 49 ++++++++++++++++++++++++------
 drivers/gpu/drm/xe/xe_wa_oob.rules |  2 ++
 3 files changed, 42 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c
index c98454545a85..2080e0e650eb 100644
--- a/drivers/gpu/drm/xe/xe_guc_ads.c
+++ b/drivers/gpu/drm/xe/xe_guc_ads.c
@@ -768,7 +768,7 @@ static unsigned int guc_mmio_regset_write(struct xe_guc_ads *ads,
 		}
 	}
 
-	if (XE_GT_WA(hwe->gt, 16023105232))
+	if (XE_GT_WA(hwe->gt, 16023105232) || XE_GT_WA(hwe->gt, 14025941587))
 		guc_mmio_regset_write_one(ads, regset_map,
 					  RING_IDLEDLY(hwe->mmio_base),
 					  count++);
diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
index 98265293f2dc..03e977f4eb24 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine.c
+++ b/drivers/gpu/drm/xe/xe_hw_engine.c
@@ -578,25 +578,54 @@ static void hw_engine_init_early(struct xe_gt *gt, struct xe_hw_engine *hwe,
 static void adjust_idledly(struct xe_hw_engine *hwe)
 {
 	struct xe_gt *gt = hwe->gt;
-	u32 idledly, maxcnt;
+	u32 idledly, idledly_reg_val, maxcnt;
 	u32 idledly_units_ps = 8 * gt->info.timestamp_base;
 	u32 maxcnt_units_ns = 640;
-	bool inhibit_switch = 0;
+	bool inhibit_switch = false;
+	bool wa_applied = false;
 
-	if (!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) {
-		idledly = xe_mmio_read32(&gt->mmio, RING_IDLEDLY(hwe->mmio_base));
+	if ((!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) ||
+	    XE_GT_WA(gt, 14025941587)) {
+		u32 mincnt_idledly_ns = 5000;
+
+		idledly_reg_val = xe_mmio_read32(&gt->mmio, RING_IDLEDLY(hwe->mmio_base));
 		maxcnt = xe_mmio_read32(&gt->mmio, RING_PWRCTX_MAXCNT(hwe->mmio_base));
 
-		inhibit_switch = idledly & INHIBIT_SWITCH_UNTIL_PREEMPTED;
-		idledly = REG_FIELD_GET(IDLE_DELAY, idledly);
+		inhibit_switch = idledly_reg_val & INHIBIT_SWITCH_UNTIL_PREEMPTED;
+		idledly = REG_FIELD_GET(IDLE_DELAY, idledly_reg_val);
 		idledly = DIV_ROUND_CLOSEST(idledly * idledly_units_ps, 1000);
 		maxcnt = REG_FIELD_GET(IDLE_WAIT_TIME, maxcnt);
 		maxcnt *= maxcnt_units_ns;
 
-		if (xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) {
-			idledly = DIV_ROUND_CLOSEST(((maxcnt - 1) * 1000),
-						    idledly_units_ps);
-			xe_mmio_write32(&gt->mmio, RING_IDLEDLY(hwe->mmio_base), idledly);
+		/* Wa_14025941587: applied prior to Wa_16023105232,
+		 * as the latter has higher priority, although conflict
+		 * is not expected.
+		 */
+		if (XE_GT_WA(gt, 14025941587) &&
+		    idledly < mincnt_idledly_ns) {
+			idledly = mincnt_idledly_ns;
+			wa_applied = true;
+		}
+
+		if (XE_GT_WA(gt, 16023105232) &&
+		    xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) {
+			idledly = (maxcnt - 1);
+			wa_applied = true;
+			/* inhibit_switch override to keep
+			 * semantics of Wa_16023105232
+			 */
+			if (inhibit_switch)
+				idledly_reg_val &= ~INHIBIT_SWITCH_UNTIL_PREEMPTED;
+		}
+
+		if (wa_applied) {
+			idledly_reg_val &= ~IDLE_DELAY;
+			idledly_reg_val |= REG_FIELD_PREP(IDLE_DELAY,
+						 DIV_ROUND_CLOSEST(idledly * 1000,
+								   idledly_units_ps));
+			xe_mmio_write32(&gt->mmio,
+					RING_IDLEDLY(hwe->mmio_base),
+					idledly_reg_val);
 		}
 	}
 }
diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
index f8a185103b80..5d5041168fa8 100644
--- a/drivers/gpu/drm/xe/xe_wa_oob.rules
+++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
@@ -65,3 +65,5 @@
 
 14025883347	MEDIA_VERSION_RANGE(1301, 3503)
 		GRAPHICS_VERSION_RANGE(2004, 3005)
+14025941587    GRAPHICS_VERSION_RANGE(2001, 3511), FUNC(xe_rtp_match_not_sriov_vf)
+	       MEDIA_VERSION_RANGE(1301, 3503), FUNC(xe_rtp_match_not_sriov_vf)
-- 
2.46.0

[PATCH] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms

[tilak.tirumalesh.tangudu]

From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>

Avoid IDLEDLY timer programming lessthan 5 micro secs.
Apply wa_14025941587 to Graphics Versions 20.01 to 35.11
and Media Versions 13.01 to 35.03

v2: Use xe_rtp_match_not_sriov_vf, move to local variable
    Remove warn and other knits            - Matt R

v3: Add verbose comment - Tejas

v4: Restore IDLE_DLY register on engine reset.
    Add it to GUC save-restore list. -Vivek

v5: Extend WA to Media Versions 13.01 to 35.03 - Vinay
v6: Avoid clearing inhibit switch - Bala
    Refactor code accordingly by adding idle_reg_val.

Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
Reviewed-by:  Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
---
 drivers/gpu/drm/xe/xe_guc_ads.c    |  2 +-
 drivers/gpu/drm/xe/xe_hw_engine.c  | 52 ++++++++++++++++++++++++------
 drivers/gpu/drm/xe/xe_wa_oob.rules |  2 ++
 3 files changed, 45 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c
index c98454545a85..2080e0e650eb 100644
--- a/drivers/gpu/drm/xe/xe_guc_ads.c
+++ b/drivers/gpu/drm/xe/xe_guc_ads.c
@@ -768,7 +768,7 @@ static unsigned int guc_mmio_regset_write(struct xe_guc_ads *ads,
 		}
 	}
 
-	if (XE_GT_WA(hwe->gt, 16023105232))
+	if (XE_GT_WA(hwe->gt, 16023105232) || XE_GT_WA(hwe->gt, 14025941587))
 		guc_mmio_regset_write_one(ads, regset_map,
 					  RING_IDLEDLY(hwe->mmio_base),
 					  count++);
diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
index 98265293f2dc..ba3fd79a4ecf 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine.c
+++ b/drivers/gpu/drm/xe/xe_hw_engine.c
@@ -578,25 +578,57 @@ static void hw_engine_init_early(struct xe_gt *gt, struct xe_hw_engine *hwe,
 static void adjust_idledly(struct xe_hw_engine *hwe)
 {
 	struct xe_gt *gt = hwe->gt;
-	u32 idledly, maxcnt;
+	u32 idledly, idledly_reg_val, maxcnt;
 	u32 idledly_units_ps = 8 * gt->info.timestamp_base;
 	u32 maxcnt_units_ns = 640;
-	bool inhibit_switch = 0;
+	bool inhibit_switch = false;
+	bool wa_applied = false;
 
-	if (!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) {
-		idledly = xe_mmio_read32(&gt->mmio, RING_IDLEDLY(hwe->mmio_base));
+	if ((!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) ||
+	    XE_GT_WA(gt, 14025941587)) {
+		u32 mincnt_idledly_ns = 5000;
+
+		idledly_reg_val = xe_mmio_read32(&gt->mmio, RING_IDLEDLY(hwe->mmio_base));
 		maxcnt = xe_mmio_read32(&gt->mmio, RING_PWRCTX_MAXCNT(hwe->mmio_base));
 
-		inhibit_switch = idledly & INHIBIT_SWITCH_UNTIL_PREEMPTED;
-		idledly = REG_FIELD_GET(IDLE_DELAY, idledly);
+		inhibit_switch = idledly_reg_val & INHIBIT_SWITCH_UNTIL_PREEMPTED;
+		idledly = REG_FIELD_GET(IDLE_DELAY, idledly_reg_val);
 		idledly = DIV_ROUND_CLOSEST(idledly * idledly_units_ps, 1000);
 		maxcnt = REG_FIELD_GET(IDLE_WAIT_TIME, maxcnt);
 		maxcnt *= maxcnt_units_ns;
 
-		if (xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) {
-			idledly = DIV_ROUND_CLOSEST(((maxcnt - 1) * 1000),
-						    idledly_units_ps);
-			xe_mmio_write32(&gt->mmio, RING_IDLEDLY(hwe->mmio_base), idledly);
+		/* Wa_14025941587: applied prior to Wa_16023105232,
+		 * as the latter has higher priority, although conflict
+		 * is not expected.
+		 */
+		if (XE_GT_WA(gt, 14025941587) &&
+		    idledly < mincnt_idledly_ns) {
+			idledly = mincnt_idledly_ns;
+			wa_applied = true;
+		}
+
+		if (XE_GT_WA(gt, 16023105232) &&
+		    xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) {
+			idledly = (maxcnt - 1);
+			wa_applied = true;
+			/* inhibit_switch override to keep
+			 * semantics of Wa_16023105232
+			 */
+			if (inhibit_switch)
+				idledly_reg_val &= ~INHIBIT_SWITCH_UNTIL_PREEMPTED;
+		}
+
+		if (wa_applied) {
+			idledly_reg_val &= ~IDLE_DELAY;
+			idledly_reg_val |= REG_FIELD_PREP(IDLE_DELAY,
+						 DIV_ROUND_CLOSEST(idledly * 1000,
+								   idledly_units_ps));
+			xe_gt_dbg(gt, "idledly %s: set %u max=%u inh=%u ts=%u\n",
+				  hwe->name, idledly, maxcnt,
+				  !!inhibit_switch, gt->info.timestamp_base);
+			xe_mmio_write32(&gt->mmio,
+					RING_IDLEDLY(hwe->mmio_base),
+					idledly_reg_val);
 		}
 	}
 }
diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
index 9027365f0043..d41b9b8f31c4 100644
--- a/drivers/gpu/drm/xe/xe_wa_oob.rules
+++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
@@ -66,3 +66,5 @@
 14025883347	MEDIA_VERSION_RANGE(1301, 3503)
 		GRAPHICS_VERSION_RANGE(2004, 3005)
 16029380221	MEDIA_VERSION(3500)
+14025941587    GRAPHICS_VERSION_RANGE(2001, 3511), FUNC(xe_rtp_match_not_sriov_vf)
+	       MEDIA_VERSION_RANGE(1301, 3503), FUNC(xe_rtp_match_not_sriov_vf)
-- 
2.46.0

[PATCH] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms

[tilak.tirumalesh.tangudu]

From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>

Avoid IDLEDLY timer programming lessthan 5 micro secs.
Apply wa_14025941587 to Graphics Versions 20.01 to 35.11
and Media Versions 13.01 to 35.03

v2: Use xe_rtp_match_not_sriov_vf, move to local variable
    Remove warn and other knits            - Matt R

v3: Add verbose comment - Tejas

v4: Restore IDLE_DLY register on engine reset.
    Add it to GUC save-restore list. -Vivek

v5: Extend WA to Media Versions 13.01 to 35.03 - Vinay
v6: Avoid clearing inhibit switch - Bala
    Refactor code accordingly by adding idle_reg_val.

Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
Reviewed-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
---
 drivers/gpu/drm/xe/xe_guc_ads.c    |  2 +-
 drivers/gpu/drm/xe/xe_hw_engine.c  | 52 ++++++++++++++++++++++++------
 drivers/gpu/drm/xe/xe_wa_oob.rules |  2 ++
 3 files changed, 45 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c
index ff8eee3831aa..58a3f6293ce4 100644
--- a/drivers/gpu/drm/xe/xe_guc_ads.c
+++ b/drivers/gpu/drm/xe/xe_guc_ads.c
@@ -864,7 +864,7 @@ static unsigned int guc_mmio_regset_write(struct xe_guc_ads *ads,
 		}
 	}
 
-	if (XE_GT_WA(hwe->gt, 16023105232))
+	if (XE_GT_WA(hwe->gt, 16023105232) || XE_GT_WA(hwe->gt, 14025941587))
 		guc_mmio_regset_write_one(ads, regset_map,
 					  RING_IDLEDLY(hwe->mmio_base),
 					  count++);
diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
index 010499766fce..5a87f26d7dd4 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine.c
+++ b/drivers/gpu/drm/xe/xe_hw_engine.c
@@ -588,25 +588,57 @@ static void hw_engine_init_early(struct xe_gt *gt, struct xe_hw_engine *hwe,
 static void adjust_idledly(struct xe_hw_engine *hwe)
 {
 	struct xe_gt *gt = hwe->gt;
-	u32 idledly, maxcnt;
+	u32 idledly, idledly_reg_val, maxcnt;
 	u32 idledly_units_ps = 8 * gt->info.timestamp_base;
 	u32 maxcnt_units_ns = 640;
-	bool inhibit_switch = 0;
+	bool inhibit_switch = false;
+	bool wa_applied = false;
 
-	if (!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) {
-		idledly = xe_mmio_read32(&gt->mmio, RING_IDLEDLY(hwe->mmio_base));
+	if ((!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) ||
+	    XE_GT_WA(gt, 14025941587)) {
+		u32 mincnt_idledly_ns = 5000;
+
+		idledly_reg_val = xe_mmio_read32(&gt->mmio, RING_IDLEDLY(hwe->mmio_base));
 		maxcnt = xe_mmio_read32(&gt->mmio, RING_PWRCTX_MAXCNT(hwe->mmio_base));
 
-		inhibit_switch = idledly & INHIBIT_SWITCH_UNTIL_PREEMPTED;
-		idledly = REG_FIELD_GET(IDLE_DELAY, idledly);
+		inhibit_switch = idledly_reg_val & INHIBIT_SWITCH_UNTIL_PREEMPTED;
+		idledly = REG_FIELD_GET(IDLE_DELAY, idledly_reg_val);
 		idledly = DIV_ROUND_CLOSEST(idledly * idledly_units_ps, 1000);
 		maxcnt = REG_FIELD_GET(IDLE_WAIT_TIME, maxcnt);
 		maxcnt *= maxcnt_units_ns;
 
-		if (xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) {
-			idledly = DIV_ROUND_CLOSEST(((maxcnt - 1) * 1000),
-						    idledly_units_ps);
-			xe_mmio_write32(&gt->mmio, RING_IDLEDLY(hwe->mmio_base), idledly);
+		/* Wa_14025941587: applied prior to Wa_16023105232,
+		 * as the latter has higher priority, although conflict
+		 * is not expected.
+		 */
+		if (XE_GT_WA(gt, 14025941587) &&
+		    idledly < mincnt_idledly_ns) {
+			idledly = mincnt_idledly_ns;
+			wa_applied = true;
+		}
+
+		if (XE_GT_WA(gt, 16023105232) &&
+		    xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) {
+			idledly = (maxcnt - 1);
+			wa_applied = true;
+			/* inhibit_switch override to keep
+			 * semantics of Wa_16023105232
+			 */
+			if (inhibit_switch)
+				idledly_reg_val &= ~INHIBIT_SWITCH_UNTIL_PREEMPTED;
+		}
+
+		if (wa_applied) {
+			idledly_reg_val &= ~IDLE_DELAY;
+			idledly_reg_val |= REG_FIELD_PREP(IDLE_DELAY,
+						 DIV_ROUND_CLOSEST(idledly * 1000,
+								   idledly_units_ps));
+			xe_gt_dbg(gt, "idledly %s: set %u max=%u inh=%u ts=%u\n",
+				  hwe->name, idledly, maxcnt,
+				  !!inhibit_switch, gt->info.timestamp_base);
+			xe_mmio_write32(&gt->mmio,
+					RING_IDLEDLY(hwe->mmio_base),
+					idledly_reg_val);
 		}
 	}
 }
diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
index dd69ad07f7a9..27af7f2eb095 100644
--- a/drivers/gpu/drm/xe/xe_wa_oob.rules
+++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
@@ -72,3 +72,5 @@
 16029897822	MEDIA_VERSION(3500)
 		GRAPHICS_VERSION(3510)
 14027054324	GRAPHICS_VERSION(3511)
+14025941587    GRAPHICS_VERSION_RANGE(2001, 3511), FUNC(xe_rtp_match_not_sriov_vf)
+	       MEDIA_VERSION_RANGE(1301, 3503), FUNC(xe_rtp_match_not_sriov_vf)
-- 
2.46.0

Re: [PATCH] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:

Pre-existing issues:
- [High] Potential division by zero in DIV_ROUND_CLOSEST if the GT crystal clock frequency is invalid or unrecognized.
- [High] 32-bit integer overflow during nanosecond unit conversions for `idledly` causes incorrect delay calculations and erroneous hardware timer programming.
- [High] Integer underflow when maxcnt is zero leads to a massive delay calculation that subsequently overflows.
--

commit 36b72781bea702adafa74030ffeb7bc9ba2efaf8
Author: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>

    drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms
    
    Avoid IDLEDLY timer programming lessthan 5 micro secs.
    Apply wa_14025941587 to Graphics Versions 20.01 to 35.11
    and Media Versions 13.01 to 35.03

> diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
> index 010499766fce2..5a87f26d7dd4a 100644
> --- a/drivers/gpu/drm/xe/xe_hw_engine.c
> +++ b/drivers/gpu/drm/xe/xe_hw_engine.c
> @@ -588,25 +588,57 @@ static void hw_engine_init_early(struct xe_gt *gt, struct xe_hw_engine *hwe,
>  static void adjust_idledly(struct xe_hw_engine *hwe)
>  {
[ ... ]
> -		inhibit_switch = idledly & INHIBIT_SWITCH_UNTIL_PREEMPTED;
> -		idledly = REG_FIELD_GET(IDLE_DELAY, idledly);
> +		inhibit_switch = idledly_reg_val & INHIBIT_SWITCH_UNTIL_PREEMPTED;
> +		idledly = REG_FIELD_GET(IDLE_DELAY, idledly_reg_val);
>  		idledly = DIV_ROUND_CLOSEST(idledly * idledly_units_ps, 1000);

[Severity: High]
This is a pre-existing issue, but does this multiplication overflow 32 bits?

With idledly capable of being up to 21-bits and idledly_units_ps typically
around 666,664, the multiplication can reach ~1.4 trillion, which
overflows the 32-bit limit before DIV_ROUND_CLOSEST is evaluated. This wrap
around could cause an incorrect delay calculation.

>  		maxcnt = REG_FIELD_GET(IDLE_WAIT_TIME, maxcnt);
>  		maxcnt *= maxcnt_units_ns;
[ ... ]
> +		if (XE_GT_WA(gt, 16023105232) &&
> +		    xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) {
> +			idledly = (maxcnt - 1);

[Severity: High]
This is a pre-existing issue, but does this subtraction underflow if maxcnt
evaluates to 0?

If the hardware initializes with 0 in the IDLE_WAIT_TIME field, maxcnt will
be 0. Because idledly is unsigned, idledly >= maxcnt will be true, causing
idledly to underflow to U32_MAX.

> +			wa_applied = true;
> +			/* inhibit_switch override to keep
> +			 * semantics of Wa_16023105232
> +			 */
> +			if (inhibit_switch)
> +				idledly_reg_val &= ~INHIBIT_SWITCH_UNTIL_PREEMPTED;
> +		}
> +
> +		if (wa_applied) {
> +			idledly_reg_val &= ~IDLE_DELAY;
> +			idledly_reg_val |= REG_FIELD_PREP(IDLE_DELAY,
> +						 DIV_ROUND_CLOSEST(idledly * 1000,
> +								   idledly_units_ps));

[Severity: High]
This is a pre-existing issue, but does this code suffer from a division by
zero panic?

If the hardware register RPM_CONFIG0 contains an unrecognized crystal clock
frequency, xe_gt_clock_init() sets gt->info.timestamp_base to 0. This makes
idledly_units_ps evaluate to 0, which triggers a panic here.

Also, does the idledly * 1000 multiplication overflow the 32-bit limit?

If maxcnt was 0 and idledly underflowed to U32_MAX earlier, this
multiplication reaches ~4.29 trillion, causing another silent overflow
before the division and programming an incorrect delay into the hardware.

> +			xe_gt_dbg(gt, "idledly %s: set %u max=%u inh=%u ts=%u\n",
> +				  hwe->name, idledly, maxcnt,
> +				  !!inhibit_switch, gt->info.timestamp_base);
> +			xe_mmio_write32(&gt->mmio,
> +					RING_IDLEDLY(hwe->mmio_base),
> +					idledly_reg_val);
>  		}
>  	}
>  }

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260908083656.51704-1-tilak.tirumalesh.tangudu@intel.com?part=1

[PATCH] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms

[tilak.tirumalesh.tangudu]

From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>

Avoid IDLEDLY timer programming lessthan 5 micro secs.
Apply wa_14025941587 to Graphics Versions 20.01 to 35.11
and Media Versions 13.01 to 35.03

v2: Use xe_rtp_match_not_sriov_vf, move to local variable
    Remove warn and other knits            - Matt R

v3: Add verbose comment - Tejas

v4: Restore IDLE_DLY register on engine reset.
    Add it to GUC save-restore list. -Vivek

v5: Extend WA to Media Versions 13.01 to 35.03 - Vinay
v6: Avoid clearing inhibit switch - Bala
    Refactor code accordingly by adding idle_reg_val.

Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
Reviewed-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
---
 drivers/gpu/drm/xe/xe_guc_ads.c    |  2 +-
 drivers/gpu/drm/xe/xe_hw_engine.c  | 52 ++++++++++++++++++++++++------
 drivers/gpu/drm/xe/xe_wa_oob.rules |  2 ++
 3 files changed, 45 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c
index ff8eee3831aa..58a3f6293ce4 100644
--- a/drivers/gpu/drm/xe/xe_guc_ads.c
+++ b/drivers/gpu/drm/xe/xe_guc_ads.c
@@ -864,7 +864,7 @@ static unsigned int guc_mmio_regset_write(struct xe_guc_ads *ads,
 		}
 	}
 
-	if (XE_GT_WA(hwe->gt, 16023105232))
+	if (XE_GT_WA(hwe->gt, 16023105232) || XE_GT_WA(hwe->gt, 14025941587))
 		guc_mmio_regset_write_one(ads, regset_map,
 					  RING_IDLEDLY(hwe->mmio_base),
 					  count++);
diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
index 010499766fce..5a87f26d7dd4 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine.c
+++ b/drivers/gpu/drm/xe/xe_hw_engine.c
@@ -588,25 +588,57 @@ static void hw_engine_init_early(struct xe_gt *gt, struct xe_hw_engine *hwe,
 static void adjust_idledly(struct xe_hw_engine *hwe)
 {
 	struct xe_gt *gt = hwe->gt;
-	u32 idledly, maxcnt;
+	u32 idledly, idledly_reg_val, maxcnt;
 	u32 idledly_units_ps = 8 * gt->info.timestamp_base;
 	u32 maxcnt_units_ns = 640;
-	bool inhibit_switch = 0;
+	bool inhibit_switch = false;
+	bool wa_applied = false;
 
-	if (!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) {
-		idledly = xe_mmio_read32(&gt->mmio, RING_IDLEDLY(hwe->mmio_base));
+	if ((!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) ||
+	    XE_GT_WA(gt, 14025941587)) {
+		u32 mincnt_idledly_ns = 5000;
+
+		idledly_reg_val = xe_mmio_read32(&gt->mmio, RING_IDLEDLY(hwe->mmio_base));
 		maxcnt = xe_mmio_read32(&gt->mmio, RING_PWRCTX_MAXCNT(hwe->mmio_base));
 
-		inhibit_switch = idledly & INHIBIT_SWITCH_UNTIL_PREEMPTED;
-		idledly = REG_FIELD_GET(IDLE_DELAY, idledly);
+		inhibit_switch = idledly_reg_val & INHIBIT_SWITCH_UNTIL_PREEMPTED;
+		idledly = REG_FIELD_GET(IDLE_DELAY, idledly_reg_val);
 		idledly = DIV_ROUND_CLOSEST(idledly * idledly_units_ps, 1000);
 		maxcnt = REG_FIELD_GET(IDLE_WAIT_TIME, maxcnt);
 		maxcnt *= maxcnt_units_ns;
 
-		if (xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) {
-			idledly = DIV_ROUND_CLOSEST(((maxcnt - 1) * 1000),
-						    idledly_units_ps);
-			xe_mmio_write32(&gt->mmio, RING_IDLEDLY(hwe->mmio_base), idledly);
+		/* Wa_14025941587: applied prior to Wa_16023105232,
+		 * as the latter has higher priority, although conflict
+		 * is not expected.
+		 */
+		if (XE_GT_WA(gt, 14025941587) &&
+		    idledly < mincnt_idledly_ns) {
+			idledly = mincnt_idledly_ns;
+			wa_applied = true;
+		}
+
+		if (XE_GT_WA(gt, 16023105232) &&
+		    xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) {
+			idledly = (maxcnt - 1);
+			wa_applied = true;
+			/* inhibit_switch override to keep
+			 * semantics of Wa_16023105232
+			 */
+			if (inhibit_switch)
+				idledly_reg_val &= ~INHIBIT_SWITCH_UNTIL_PREEMPTED;
+		}
+
+		if (wa_applied) {
+			idledly_reg_val &= ~IDLE_DELAY;
+			idledly_reg_val |= REG_FIELD_PREP(IDLE_DELAY,
+						 DIV_ROUND_CLOSEST(idledly * 1000,
+								   idledly_units_ps));
+			xe_gt_dbg(gt, "idledly %s: set %u max=%u inh=%u ts=%u\n",
+				  hwe->name, idledly, maxcnt,
+				  !!inhibit_switch, gt->info.timestamp_base);
+			xe_mmio_write32(&gt->mmio,
+					RING_IDLEDLY(hwe->mmio_base),
+					idledly_reg_val);
 		}
 	}
 }
diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
index dd69ad07f7a9..27af7f2eb095 100644
--- a/drivers/gpu/drm/xe/xe_wa_oob.rules
+++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
@@ -72,3 +72,5 @@
 16029897822	MEDIA_VERSION(3500)
 		GRAPHICS_VERSION(3510)
 14027054324	GRAPHICS_VERSION(3511)
+14025941587    GRAPHICS_VERSION_RANGE(2001, 3511), FUNC(xe_rtp_match_not_sriov_vf)
+	       MEDIA_VERSION_RANGE(1301, 3503), FUNC(xe_rtp_match_not_sriov_vf)
-- 
2.46.0

Re: [PATCH] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:

New issues:
- [High] 32-bit integer overflow in `adjust_idledly` time conversions corrupts valid hardware configurations.

Pre-existing issues:
- [High] Division by zero in `adjust_idledly` causes kernel panic on unrecognized crystal clock frequencies.
--

commit 26320e76aeba5d2445adb7b8fbd5db0002118926
Author: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>

drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms

This patch applies wa_14025941587 to Graphic and Media versions to avoid
programming the IDLEDLY timer to less than 5 microseconds. It refactors
adjust_idledly() to support both the new and existing workarounds.

> diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
> index 010499766fce2..5a87f26d7dd4a 100644
> --- a/drivers/gpu/drm/xe/xe_hw_engine.c
> +++ b/drivers/gpu/drm/xe/xe_hw_engine.c
[ ... ]
> @@ -588,25 +588,57 @@ static void hw_engine_init_early(struct xe_gt *gt, struct xe_hw_engine *hwe,
>  static void adjust_idledly(struct xe_hw_engine *hwe)
>  {
>  	struct xe_gt *gt = hwe->gt;
> -	u32 idledly, maxcnt;
> +	u32 idledly, idledly_reg_val, maxcnt;
>  	u32 idledly_units_ps = 8 * gt->info.timestamp_base;
>  	u32 maxcnt_units_ns = 640;
> -	bool inhibit_switch = 0;
> +	bool inhibit_switch = false;
> +	bool wa_applied = false;
>  
> -	if (!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) {
> -		idledly = xe_mmio_read32(&gt->mmio, RING_IDLEDLY(hwe->mmio_base));
> +	if ((!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) ||
> +	    XE_GT_WA(gt, 14025941587)) {
> +		u32 mincnt_idledly_ns = 5000;
> +
> +		idledly_reg_val = xe_mmio_read32(&gt->mmio, RING_IDLEDLY(hwe->mmio_base));
>  		maxcnt = xe_mmio_read32(&gt->mmio, RING_PWRCTX_MAXCNT(hwe->mmio_base));
>  
> -		inhibit_switch = idledly & INHIBIT_SWITCH_UNTIL_PREEMPTED;
> -		idledly = REG_FIELD_GET(IDLE_DELAY, idledly);
> +		inhibit_switch = idledly_reg_val & INHIBIT_SWITCH_UNTIL_PREEMPTED;
> +		idledly = REG_FIELD_GET(IDLE_DELAY, idledly_reg_val);
>  		idledly = DIV_ROUND_CLOSEST(idledly * idledly_units_ps, 1000);

[Severity: High]
Does this multiplication overflow for delays > 4.29ms? Both idledly and
idledly_units_ps are 32-bit u32 variables, so the multiplication is done in
32-bit math. With idledly_units_ps typically around 666,664, any valid
register delay > 6442 (4.29ms) will overflow U32_MAX, resulting in a falsely
small value. Should this be cast to u64 and use DIV_ROUND_CLOSEST_ULL()
instead?

>  		maxcnt = REG_FIELD_GET(IDLE_WAIT_TIME, maxcnt);
>  		maxcnt *= maxcnt_units_ns;
>  
> -		if (xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) {
> -			idledly = DIV_ROUND_CLOSEST(((maxcnt - 1) * 1000),
> -						    idledly_units_ps);
> -			xe_mmio_write32(&gt->mmio, RING_IDLEDLY(hwe->mmio_base), idledly);
> +		/* Wa_14025941587: applied prior to Wa_16023105232,
> +		 * as the latter has higher priority, although conflict
> +		 * is not expected.
> +		 */
> +		if (XE_GT_WA(gt, 14025941587) &&
> +		    idledly < mincnt_idledly_ns) {
> +			idledly = mincnt_idledly_ns;
> +			wa_applied = true;
> +		}

[Severity: High]
If the earlier 32-bit multiplication overflows and produces a falsely small
wrapped value for idledly, will this workaround erroneously clamp a valid
large delay to a tiny 5us value, corrupting the hardware state?

[ ... ]
> +		if (wa_applied) {
> +			idledly_reg_val &= ~IDLE_DELAY;
> +			idledly_reg_val |= REG_FIELD_PREP(IDLE_DELAY,
> +						 DIV_ROUND_CLOSEST(idledly * 1000,
> +								   idledly_units_ps));

[Severity: High]
Can this write-back calculation also overflow 32-bit math if the intended
delay is large, writing corrupted garbage back to the register?

[Severity: High]
This is a pre-existing issue, but if idledly_units_ps is 0, will this cause
an unconditional kernel panic?

If read_crystal_clock() encounters an unrecognized clock frequency, it logs
a warning and sets *timestamp_base = 0, causing idledly_units_ps to be 0.
Because the idledly calculation above will also be 0, the check
idledly < mincnt_idledly_ns is now guaranteed to be true, setting
wa_applied = true.

When DIV_ROUND_CLOSEST performs division by the second argument
(idledly_units_ps), it seems it will trigger an immediate division by zero
exception. Should we check for zero before dividing?

> +			xe_gt_dbg(gt, "idledly %s: set %u max=%u inh=%u ts=%u\n",
> +				  hwe->name, idledly, maxcnt,
> +				  !!inhibit_switch, gt->info.timestamp_base);
> +			xe_mmio_write32(&gt->mmio,
> +					RING_IDLEDLY(hwe->mmio_base),
> +					idledly_reg_val);
>  		}
>  	}
>  }

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260908165225.61456-1-tilak.tirumalesh.tangudu@intel.com?part=1

✓ CI.KUnit: success for drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms (rev7)

[Patchwork]

== Series Details ==

Series: drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms (rev7)
URL   : https://patchwork.freedesktop.org/series/167706/
State : success

== Summary ==

+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[17:36:40] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[17:36:44] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[17:37:05] Starting KUnit Kernel (1/1)...
[17:37:05] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[17:37:05] ============= refcount_interrupt (4 subtests) ==============
[17:37:05] [PASSED] test_single_irq_change
[17:37:05] [PASSED] test_nested_irq_change
[17:37:05] [PASSED] test_multiple_irq_change
[17:37:05] [PASSED] test_irq_save
[17:37:05] =============== [PASSED] refcount_interrupt ================
[17:37:05] ================= gpu_buddy (14 subtests) ==================
[17:37:05] [PASSED] gpu_test_buddy_alloc_limit
[17:37:05] [PASSED] gpu_test_buddy_alloc_optimistic
[17:37:05] [PASSED] gpu_test_buddy_alloc_pessimistic
[17:37:05] [PASSED] gpu_test_buddy_alloc_pathological
[17:37:05] [PASSED] gpu_test_buddy_alloc_contiguous
[17:37:05] [PASSED] gpu_test_buddy_alloc_clear
[17:37:05] [PASSED] gpu_test_buddy_alloc_range
[17:37:05] [PASSED] gpu_test_buddy_alloc_range_bias
[17:37:06] [PASSED] gpu_test_buddy_fragmentation_performance
[17:37:06] [PASSED] gpu_test_buddy_dirty_tracker_performance
[17:37:06] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[17:37:06] [PASSED] gpu_test_buddy_offset_aligned_allocation
[17:37:06] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[17:37:06] [PASSED] gpu_test_buddy_addr_to_block
[17:37:06] ==================== [PASSED] gpu_buddy ====================
[17:37:06] ============================================================
[17:37:06] Testing complete. Ran 18 tests: passed: 18
[17:37:07] Elapsed time: 26.724s total, 4.416s configuring, 20.391s building, 1.871s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[17:37:07] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[17:37:08] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[17:37:42] Starting KUnit Kernel (1/1)...
[17:37:42] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[17:37:42] ============= refcount_interrupt (4 subtests) ==============
[17:37:42] [PASSED] test_single_irq_change
[17:37:42] [PASSED] test_nested_irq_change
[17:37:42] [PASSED] test_multiple_irq_change
[17:37:42] [PASSED] test_irq_save
[17:37:42] =============== [PASSED] refcount_interrupt ================
[17:37:42] ================== guc_buf (11 subtests) ===================
[17:37:42] [PASSED] test_smallest
[17:37:42] [PASSED] test_largest
[17:37:42] [PASSED] test_granular
[17:37:42] [PASSED] test_unique
[17:37:42] [PASSED] test_overlap
[17:37:42] [PASSED] test_reusable
[17:37:42] [PASSED] test_too_big
[17:37:42] [PASSED] test_flush
[17:37:42] [PASSED] test_lookup
[17:37:42] [PASSED] test_data
[17:37:42] [PASSED] test_class
[17:37:42] ===================== [PASSED] guc_buf =====================
[17:37:42] =================== guc_dbm (7 subtests) ===================
[17:37:42] [PASSED] test_empty
[17:37:42] [PASSED] test_default
[17:37:42] ======================== test_size  ========================
[17:37:42] [PASSED] 4
[17:37:42] [PASSED] 8
[17:37:42] [PASSED] 32
[17:37:42] [PASSED] 256
[17:37:42] ==================== [PASSED] test_size ====================
[17:37:42] ======================= test_reuse  ========================
[17:37:42] [PASSED] 4
[17:37:42] [PASSED] 8
[17:37:42] [PASSED] 32
[17:37:42] [PASSED] 256
[17:37:42] =================== [PASSED] test_reuse ====================
[17:37:42] =================== test_range_overlap  ====================
[17:37:42] [PASSED] 4
[17:37:42] [PASSED] 8
[17:37:42] [PASSED] 32
[17:37:42] [PASSED] 256
[17:37:42] =============== [PASSED] test_range_overlap ================
[17:37:42] =================== test_range_compact  ====================
[17:37:42] [PASSED] 4
[17:37:42] [PASSED] 8
[17:37:42] [PASSED] 32
[17:37:42] [PASSED] 256
[17:37:42] =============== [PASSED] test_range_compact ================
[17:37:42] ==================== test_range_spare  =====================
[17:37:42] [PASSED] 4
[17:37:42] [PASSED] 8
[17:37:42] [PASSED] 32
[17:37:42] [PASSED] 256
[17:37:42] ================ [PASSED] test_range_spare =================
[17:37:42] ===================== [PASSED] guc_dbm =====================
[17:37:42] =================== guc_idm (6 subtests) ===================
[17:37:42] [PASSED] bad_init
[17:37:42] [PASSED] no_init
[17:37:42] [PASSED] init_fini
[17:37:42] [PASSED] check_used
[17:37:42] [PASSED] check_quota
[17:37:42] [PASSED] check_all
[17:37:42] ===================== [PASSED] guc_idm =====================
[17:37:42] =============== guc_klv_helpers (9 subtests) ===============
[17:37:42] [PASSED] test_count
[17:37:42] [PASSED] test_encode_u32
[17:37:42] [PASSED] test_encode_u64
[17:37:42] [PASSED] test_encode_string
[17:37:42] [PASSED] test_encode_object_raw
[17:37:42] [PASSED] test_encode_object_klv
[17:37:42] [PASSED] test_encode_object_nested
[17:37:42] [PASSED] test_encode_object_basic
[17:37:42] [PASSED] test_print
[17:37:42] ================= [PASSED] guc_klv_helpers =================
[17:37:42] =================== xe_log (4 subtests) ====================
[17:37:42] [PASSED] demo_cper
[17:37:42] [PASSED] demo_dmesg
[17:37:42] ======================= test_dmesg  ========================
[17:37:42] [PASSED] test_fatal
[17:37:42] [PASSED] test_fatal_tile
[17:37:42] [PASSED] test_fatal_gt
[17:37:42] [PASSED] test_fatal_comp
[17:37:42] [PASSED] test_fatal_comp_tile
[17:37:42] [PASSED] test_fatal_comp_gt
[17:37:42] [PASSED] test_fatal_all
[17:37:42] [PASSED] test_recoverable
[17:37:42] [PASSED] test_recoverable_tile
[17:37:42] [PASSED] test_recoverable_gt
[17:37:42] [PASSED] test_recoverable_comp
[17:37:42] [PASSED] test_recoverable_comp_tile
[17:37:42] [PASSED] test_recoverable_comp_gt
[17:37:42] [PASSED] test_recoverable_all
[17:37:42] [PASSED] test_info
[17:37:42] [PASSED] test_info_tile
[17:37:42] [PASSED] test_info_gt
[17:37:42] [PASSED] test_info_err
[17:37:42] [PASSED] test_info_comp
[17:37:42] [PASSED] test_info_comp_tile
[17:37:42] [PASSED] test_info_comp_gt
[17:37:42] [PASSED] test_info_all
[17:37:42] [PASSED] test_hw_fatal
[17:37:42] [PASSED] test_hw_recoverable
[17:37:42] [PASSED] test_hw_corrected
[17:37:42] [PASSED] test_hw_informational
[17:37:42] =================== [PASSED] test_dmesg ====================
[17:37:42] ====================== test_invalid  =======================
[17:37:42] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[17:37:42] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[17:37:42] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[17:37:42] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[17:37:42] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[17:37:42] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[17:37:42] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[17:37:42] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[17:37:42] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[17:37:42] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[17:37:42] ================== [SKIPPED] test_invalid ==================
[17:37:42] ===================== [PASSED] xe_log ======================
[17:37:42] ================== no_relay (3 subtests) ===================
[17:37:42] [PASSED] xe_drops_guc2pf_if_not_ready
[17:37:42] [PASSED] xe_drops_guc2vf_if_not_ready
[17:37:42] [PASSED] xe_rejects_send_if_not_ready
[17:37:42] ==================== [PASSED] no_relay =====================
[17:37:42] ================== pf_relay (14 subtests) ==================
[17:37:42] [PASSED] pf_rejects_guc2pf_too_short
[17:37:42] [PASSED] pf_rejects_guc2pf_too_long
[17:37:42] [PASSED] pf_rejects_guc2pf_no_payload
[17:37:42] [PASSED] pf_fails_no_payload
[17:37:42] [PASSED] pf_fails_bad_origin
[17:37:42] [PASSED] pf_fails_bad_type
[17:37:42] [PASSED] pf_txn_reports_error
[17:37:42] [PASSED] pf_txn_sends_pf2guc
[17:37:42] [PASSED] pf_sends_pf2guc
[17:37:42] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[17:37:42] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[17:37:42] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[17:37:42] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[17:37:42] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[17:37:42] ==================== [PASSED] pf_relay =====================
[17:37:42] ================== vf_relay (3 subtests) ===================
[17:37:42] [PASSED] vf_rejects_guc2vf_too_short
[17:37:42] [PASSED] vf_rejects_guc2vf_too_long
[17:37:42] [PASSED] vf_rejects_guc2vf_no_payload
[17:37:42] ==================== [PASSED] vf_relay =====================
[17:37:42] ================ pf_gt_config (9 subtests) =================
[17:37:42] [PASSED] fair_contexts_1vf
[17:37:42] [PASSED] fair_doorbells_1vf
[17:37:42] [PASSED] fair_ggtt_1vf
[17:37:42] ====================== fair_vram_1vf  ======================
[17:37:42] [PASSED] 3.50 GiB
[17:37:42] [PASSED] 11.5 GiB
[17:37:42] [PASSED] 15.5 GiB
[17:37:42] [PASSED] 31.5 GiB
[17:37:42] [PASSED] 63.5 GiB
[17:37:42] [PASSED] 1.91 GiB
[17:37:42] ================== [PASSED] fair_vram_1vf ==================
[17:37:42] ================ fair_vram_1vf_admin_only  =================
[17:37:42] [PASSED] 3.50 GiB
[17:37:42] [PASSED] 11.5 GiB
[17:37:42] [PASSED] 15.5 GiB
[17:37:42] [PASSED] 31.5 GiB
[17:37:42] [PASSED] 63.5 GiB
[17:37:42] [PASSED] 1.91 GiB
[17:37:42] ============ [PASSED] fair_vram_1vf_admin_only =============
[17:37:42] ====================== fair_contexts  ======================
[17:37:42] [PASSED] 1 VF
[17:37:42] [PASSED] 2 VFs
[17:37:42] [PASSED] 3 VFs
[17:37:42] [PASSED] 4 VFs
[17:37:42] [PASSED] 5 VFs
[17:37:42] [PASSED] 6 VFs
[17:37:42] [PASSED] 7 VFs
[17:37:42] [PASSED] 8 VFs
[17:37:42] [PASSED] 9 VFs
[17:37:42] [PASSED] 10 VFs
[17:37:42] [PASSED] 11 VFs
[17:37:42] [PASSED] 12 VFs
[17:37:42] [PASSED] 13 VFs
[17:37:42] [PASSED] 14 VFs
[17:37:42] [PASSED] 15 VFs
[17:37:42] [PASSED] 16 VFs
[17:37:42] [PASSED] 17 VFs
[17:37:42] [PASSED] 18 VFs
[17:37:42] [PASSED] 19 VFs
[17:37:42] [PASSED] 20 VFs
[17:37:42] [PASSED] 21 VFs
[17:37:42] [PASSED] 22 VFs
[17:37:42] [PASSED] 23 VFs
[17:37:42] [PASSED] 24 VFs
[17:37:42] [PASSED] 25 VFs
[17:37:42] [PASSED] 26 VFs
[17:37:42] [PASSED] 27 VFs
[17:37:42] [PASSED] 28 VFs
[17:37:42] [PASSED] 29 VFs
[17:37:43] [PASSED] 30 VFs
[17:37:43] [PASSED] 31 VFs
[17:37:43] [PASSED] 32 VFs
[17:37:43] [PASSED] 33 VFs
[17:37:43] [PASSED] 34 VFs
[17:37:43] [PASSED] 35 VFs
[17:37:43] [PASSED] 36 VFs
[17:37:43] [PASSED] 37 VFs
[17:37:43] [PASSED] 38 VFs
[17:37:43] [PASSED] 39 VFs
[17:37:43] [PASSED] 40 VFs
[17:37:43] [PASSED] 41 VFs
[17:37:43] [PASSED] 42 VFs
[17:37:43] [PASSED] 43 VFs
[17:37:43] [PASSED] 44 VFs
[17:37:43] [PASSED] 45 VFs
[17:37:43] [PASSED] 46 VFs
[17:37:43] [PASSED] 47 VFs
[17:37:43] [PASSED] 48 VFs
[17:37:43] [PASSED] 49 VFs
[17:37:43] [PASSED] 50 VFs
[17:37:43] [PASSED] 51 VFs
[17:37:43] [PASSED] 52 VFs
[17:37:43] [PASSED] 53 VFs
[17:37:43] [PASSED] 54 VFs
[17:37:43] [PASSED] 55 VFs
[17:37:43] [PASSED] 56 VFs
[17:37:43] [PASSED] 57 VFs
[17:37:43] [PASSED] 58 VFs
[17:37:43] [PASSED] 59 VFs
[17:37:43] [PASSED] 60 VFs
[17:37:43] [PASSED] 61 VFs
[17:37:43] [PASSED] 62 VFs
[17:37:43] [PASSED] 63 VFs
[17:37:43] ================== [PASSED] fair_contexts ==================
[17:37:43] ===================== fair_doorbells  ======================
[17:37:43] [PASSED] 1 VF
[17:37:43] [PASSED] 2 VFs
[17:37:43] [PASSED] 3 VFs
[17:37:43] [PASSED] 4 VFs
[17:37:43] [PASSED] 5 VFs
[17:37:43] [PASSED] 6 VFs
[17:37:43] [PASSED] 7 VFs
[17:37:43] [PASSED] 8 VFs
[17:37:43] [PASSED] 9 VFs
[17:37:43] [PASSED] 10 VFs
[17:37:43] [PASSED] 11 VFs
[17:37:43] [PASSED] 12 VFs
[17:37:43] [PASSED] 13 VFs
[17:37:43] [PASSED] 14 VFs
[17:37:43] [PASSED] 15 VFs
[17:37:43] [PASSED] 16 VFs
[17:37:43] [PASSED] 17 VFs
[17:37:43] [PASSED] 18 VFs
[17:37:43] [PASSED] 19 VFs
[17:37:43] [PASSED] 20 VFs
[17:37:43] [PASSED] 21 VFs
[17:37:43] [PASSED] 22 VFs
[17:37:43] [PASSED] 23 VFs
[17:37:43] [PASSED] 24 VFs
[17:37:43] [PASSED] 25 VFs
[17:37:43] [PASSED] 26 VFs
[17:37:43] [PASSED] 27 VFs
[17:37:43] [PASSED] 28 VFs
[17:37:43] [PASSED] 29 VFs
[17:37:43] [PASSED] 30 VFs
[17:37:43] [PASSED] 31 VFs
[17:37:43] [PASSED] 32 VFs
[17:37:43] [PASSED] 33 VFs
[17:37:43] [PASSED] 34 VFs
[17:37:43] [PASSED] 35 VFs
[17:37:43] [PASSED] 36 VFs
[17:37:43] [PASSED] 37 VFs
[17:37:43] [PASSED] 38 VFs
[17:37:43] [PASSED] 39 VFs
[17:37:43] [PASSED] 40 VFs
[17:37:43] [PASSED] 41 VFs
[17:37:43] [PASSED] 42 VFs
[17:37:43] [PASSED] 43 VFs
[17:37:43] [PASSED] 44 VFs
[17:37:43] [PASSED] 45 VFs
[17:37:43] [PASSED] 46 VFs
[17:37:43] [PASSED] 47 VFs
[17:37:43] [PASSED] 48 VFs
[17:37:43] [PASSED] 49 VFs
[17:37:43] [PASSED] 50 VFs
[17:37:43] [PASSED] 51 VFs
[17:37:43] [PASSED] 52 VFs
[17:37:43] [PASSED] 53 VFs
[17:37:43] [PASSED] 54 VFs
[17:37:43] [PASSED] 55 VFs
[17:37:43] [PASSED] 56 VFs
[17:37:43] [PASSED] 57 VFs
[17:37:43] [PASSED] 58 VFs
[17:37:43] [PASSED] 59 VFs
[17:37:43] [PASSED] 60 VFs
[17:37:43] [PASSED] 61 VFs
[17:37:43] [PASSED] 62 VFs
[17:37:43] [PASSED] 63 VFs
[17:37:43] ================= [PASSED] fair_doorbells ==================
[17:37:43] ======================== fair_ggtt  ========================
[17:37:43] [PASSED] 1 VF
[17:37:43] [PASSED] 2 VFs
[17:37:43] [PASSED] 3 VFs
[17:37:43] [PASSED] 4 VFs
[17:37:43] [PASSED] 5 VFs
[17:37:43] [PASSED] 6 VFs
[17:37:43] [PASSED] 7 VFs
[17:37:43] [PASSED] 8 VFs
[17:37:43] [PASSED] 9 VFs
[17:37:43] [PASSED] 10 VFs
[17:37:43] [PASSED] 11 VFs
[17:37:43] [PASSED] 12 VFs
[17:37:43] [PASSED] 13 VFs
[17:37:43] [PASSED] 14 VFs
[17:37:43] [PASSED] 15 VFs
[17:37:43] [PASSED] 16 VFs
[17:37:43] [PASSED] 17 VFs
[17:37:43] [PASSED] 18 VFs
[17:37:43] [PASSED] 19 VFs
[17:37:43] [PASSED] 20 VFs
[17:37:43] [PASSED] 21 VFs
[17:37:43] [PASSED] 22 VFs
[17:37:43] [PASSED] 23 VFs
[17:37:43] [PASSED] 24 VFs
[17:37:43] [PASSED] 25 VFs
[17:37:43] [PASSED] 26 VFs
[17:37:43] [PASSED] 27 VFs
[17:37:43] [PASSED] 28 VFs
[17:37:43] [PASSED] 29 VFs
[17:37:43] [PASSED] 30 VFs
[17:37:43] [PASSED] 31 VFs
[17:37:43] [PASSED] 32 VFs
[17:37:43] [PASSED] 33 VFs
[17:37:43] [PASSED] 34 VFs
[17:37:43] [PASSED] 35 VFs
[17:37:43] [PASSED] 36 VFs
[17:37:43] [PASSED] 37 VFs
[17:37:43] [PASSED] 38 VFs
[17:37:43] [PASSED] 39 VFs
[17:37:43] [PASSED] 40 VFs
[17:37:43] [PASSED] 41 VFs
[17:37:43] [PASSED] 42 VFs
[17:37:43] [PASSED] 43 VFs
[17:37:43] [PASSED] 44 VFs
[17:37:43] [PASSED] 45 VFs
[17:37:43] [PASSED] 46 VFs
[17:37:43] [PASSED] 47 VFs
[17:37:43] [PASSED] 48 VFs
[17:37:43] [PASSED] 49 VFs
[17:37:43] [PASSED] 50 VFs
[17:37:43] [PASSED] 51 VFs
[17:37:43] [PASSED] 52 VFs
[17:37:43] [PASSED] 53 VFs
[17:37:43] [PASSED] 54 VFs
[17:37:43] [PASSED] 55 VFs
[17:37:43] [PASSED] 56 VFs
[17:37:43] [PASSED] 57 VFs
[17:37:43] [PASSED] 58 VFs
[17:37:43] [PASSED] 59 VFs
[17:37:43] [PASSED] 60 VFs
[17:37:43] [PASSED] 61 VFs
[17:37:43] [PASSED] 62 VFs
[17:37:43] [PASSED] 63 VFs
[17:37:43] ==================== [PASSED] fair_ggtt ====================
[17:37:43] ======================== fair_vram  ========================
[17:37:43] [PASSED] 1 VF
[17:37:43] [PASSED] 2 VFs
[17:37:43] [PASSED] 3 VFs
[17:37:43] [PASSED] 4 VFs
[17:37:43] [PASSED] 5 VFs
[17:37:43] [PASSED] 6 VFs
[17:37:43] [PASSED] 7 VFs
[17:37:43] [PASSED] 8 VFs
[17:37:43] [PASSED] 9 VFs
[17:37:43] [PASSED] 10 VFs
[17:37:43] [PASSED] 11 VFs
[17:37:43] [PASSED] 12 VFs
[17:37:43] [PASSED] 13 VFs
[17:37:43] [PASSED] 14 VFs
[17:37:43] [PASSED] 15 VFs
[17:37:43] [PASSED] 16 VFs
[17:37:43] [PASSED] 17 VFs
[17:37:43] [PASSED] 18 VFs
[17:37:43] [PASSED] 19 VFs
[17:37:43] [PASSED] 20 VFs
[17:37:43] [PASSED] 21 VFs
[17:37:43] [PASSED] 22 VFs
[17:37:43] [PASSED] 23 VFs
[17:37:43] [PASSED] 24 VFs
[17:37:43] [PASSED] 25 VFs
[17:37:43] [PASSED] 26 VFs
[17:37:43] [PASSED] 27 VFs
[17:37:43] [PASSED] 28 VFs
[17:37:43] [PASSED] 29 VFs
[17:37:43] [PASSED] 30 VFs
[17:37:43] [PASSED] 31 VFs
[17:37:43] [PASSED] 32 VFs
[17:37:43] [PASSED] 33 VFs
[17:37:43] [PASSED] 34 VFs
[17:37:43] [PASSED] 35 VFs
[17:37:43] [PASSED] 36 VFs
[17:37:43] [PASSED] 37 VFs
[17:37:43] [PASSED] 38 VFs
[17:37:43] [PASSED] 39 VFs
[17:37:43] [PASSED] 40 VFs
[17:37:43] [PASSED] 41 VFs
[17:37:43] [PASSED] 42 VFs
[17:37:43] [PASSED] 43 VFs
[17:37:43] [PASSED] 44 VFs
[17:37:43] [PASSED] 45 VFs
[17:37:43] [PASSED] 46 VFs
[17:37:43] [PASSED] 47 VFs
[17:37:43] [PASSED] 48 VFs
[17:37:43] [PASSED] 49 VFs
[17:37:43] [PASSED] 50 VFs
[17:37:43] [PASSED] 51 VFs
[17:37:43] [PASSED] 52 VFs
[17:37:43] [PASSED] 53 VFs
[17:37:43] [PASSED] 54 VFs
[17:37:43] [PASSED] 55 VFs
[17:37:43] [PASSED] 56 VFs
[17:37:43] [PASSED] 57 VFs
[17:37:43] [PASSED] 58 VFs
[17:37:43] [PASSED] 59 VFs
[17:37:43] [PASSED] 60 VFs
[17:37:43] [PASSED] 61 VFs
[17:37:43] [PASSED] 62 VFs
[17:37:43] [PASSED] 63 VFs
[17:37:43] ==================== [PASSED] fair_vram ====================
[17:37:43] ================== [PASSED] pf_gt_config ===================
[17:37:43] ===================== lmtt (1 subtest) =====================
[17:37:43] ======================== test_ops  =========================
[17:37:43] [PASSED] 2-level
[17:37:43] [PASSED] multi-level
[17:37:43] ==================== [PASSED] test_ops =====================
[17:37:43] ====================== [PASSED] lmtt =======================
[17:37:43] ================= sriov_packet (1 subtest) =================
[17:37:43] [PASSED] test_descriptor_init
[17:37:43] ================== [PASSED] sriov_packet ===================
[17:37:43] ================= pf_service (11 subtests) =================
[17:37:43] [PASSED] pf_negotiate_any
[17:37:43] [PASSED] pf_negotiate_base_match
[17:37:43] [PASSED] pf_negotiate_base_newer
[17:37:43] [PASSED] pf_negotiate_base_next
[17:37:43] [SKIPPED] pf_negotiate_base_older (no older minor)
[17:37:43] [PASSED] pf_negotiate_base_prev
[17:37:43] [PASSED] pf_negotiate_latest_match
[17:37:43] [PASSED] pf_negotiate_latest_newer
[17:37:43] [PASSED] pf_negotiate_latest_next
[17:37:43] [SKIPPED] pf_negotiate_latest_older (no older minor)
[17:37:43] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[17:37:43] =================== [PASSED] pf_service ====================
[17:37:43] ================= xe_guc_g2g (2 subtests) ==================
[17:37:43] ============== xe_live_guc_g2g_kunit_default  ==============
[17:37:43] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[17:37:43] ============== xe_live_guc_g2g_kunit_allmem  ===============
[17:37:43] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[17:37:43] =================== [SKIPPED] xe_guc_g2g ===================
[17:37:43] =================== xe_mocs (2 subtests) ===================
[17:37:43] ================ xe_live_mocs_kernel_kunit  ================
[17:37:43] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[17:37:43] ================ xe_live_mocs_reset_kunit  =================
[17:37:43] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[17:37:43] ==================== [SKIPPED] xe_mocs =====================
[17:37:43] ================= xe_migrate (2 subtests) ==================
[17:37:43] ================= xe_migrate_sanity_kunit  =================
[17:37:43] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[17:37:43] ================== xe_validate_ccs_kunit  ==================
[17:37:43] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[17:37:43] =================== [SKIPPED] xe_migrate ===================
[17:37:43] ================== xe_dma_buf (1 subtest) ==================
[17:37:43] ==================== xe_dma_buf_kunit  =====================
[17:37:43] ================ [SKIPPED] xe_dma_buf_kunit ================
[17:37:43] =================== [SKIPPED] xe_dma_buf ===================
[17:37:43] ================= xe_bo_shrink (1 subtest) =================
[17:37:43] =================== xe_bo_shrink_kunit  ====================
[17:37:43] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[17:37:43] ================== [SKIPPED] xe_bo_shrink ==================
[17:37:43] ==================== xe_bo (2 subtests) ====================
[17:37:43] ================== xe_ccs_migrate_kunit  ===================
[17:37:43] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[17:37:43] ==================== xe_bo_evict_kunit  ====================
[17:37:43] =============== [SKIPPED] xe_bo_evict_kunit ================
[17:37:43] ===================== [SKIPPED] xe_bo ======================
[17:37:43] =================== xe_any (9 subtests) ====================
[17:37:43] [PASSED] test_to_xe
[17:37:43] [PASSED] test_to_dev
[17:37:43] [PASSED] test_to_pdev
[17:37:43] [PASSED] test_to_drm
[17:37:43] [PASSED] test_if_pdev
[17:37:43] [PASSED] test_if_xe
[17:37:43] [PASSED] test_if_tile
[17:37:43] [PASSED] test_if_gt
[17:37:43] [PASSED] test_to_id
[17:37:43] ===================== [PASSED] xe_any ======================
[17:37:43] ==================== args (13 subtests) ====================
[17:37:43] [PASSED] count_args_test
[17:37:43] [PASSED] call_args_example
[17:37:43] [PASSED] call_args_test
[17:37:43] [PASSED] drop_first_arg_example
[17:37:43] [PASSED] drop_first_arg_test
[17:37:43] [PASSED] first_arg_example
[17:37:43] [PASSED] first_arg_test
[17:37:43] [PASSED] last_arg_example
[17:37:43] [PASSED] last_arg_test
[17:37:43] [PASSED] pick_arg_example
[17:37:43] [PASSED] if_args_example
[17:37:43] [PASSED] if_args_test
[17:37:43] [PASSED] sep_comma_example
[17:37:43] ====================== [PASSED] args =======================
[17:37:43] =================== xe_pci (3 subtests) ====================
[17:37:43] ==================== check_graphics_ip  ====================
[17:37:43] [PASSED] 12.00 Xe_LP
[17:37:43] [PASSED] 12.10 Xe_LP+
[17:37:43] [PASSED] 12.55 Xe_HPG
[17:37:43] [PASSED] 12.60 Xe_HPC
[17:37:43] [PASSED] 12.70 Xe_LPG
[17:37:43] [PASSED] 12.71 Xe_LPG
[17:37:43] [PASSED] 12.74 Xe_LPG+
[17:37:43] [PASSED] 20.01 Xe2_HPG
[17:37:43] [PASSED] 20.02 Xe2_HPG
[17:37:43] [PASSED] 20.04 Xe2_LPG
[17:37:43] [PASSED] 30.00 Xe3_LPG
[17:37:43] [PASSED] 30.01 Xe3_LPG
[17:37:43] [PASSED] 30.03 Xe3_LPG
[17:37:43] [PASSED] 30.04 Xe3_LPG
[17:37:43] [PASSED] 30.05 Xe3_LPG
[17:37:43] [PASSED] 35.10 Xe3p_LPG
[17:37:43] [PASSED] 35.11 Xe3p_XPC
[17:37:43] ================ [PASSED] check_graphics_ip ================
[17:37:43] ===================== check_media_ip  ======================
[17:37:43] [PASSED] 12.00 Xe_M
[17:37:43] [PASSED] 12.55 Xe_HPM
[17:37:43] [PASSED] 13.00 Xe_LPM+
[17:37:43] [PASSED] 13.01 Xe2_HPM
[17:37:43] [PASSED] 20.00 Xe2_LPM
[17:37:43] [PASSED] 30.00 Xe3_LPM
[17:37:43] [PASSED] 30.02 Xe3_LPM
[17:37:43] [PASSED] 35.00 Xe3p_LPM
[17:37:43] [PASSED] 35.03 Xe3p_HPM
[17:37:43] ================= [PASSED] check_media_ip ==================
[17:37:43] =================== check_platform_desc  ===================
[17:37:43] [PASSED] 0x9A60 (TIGERLAKE)
[17:37:43] [PASSED] 0x9A68 (TIGERLAKE)
[17:37:43] [PASSED] 0x9A70 (TIGERLAKE)
[17:37:43] [PASSED] 0x9A40 (TIGERLAKE)
[17:37:43] [PASSED] 0x9A49 (TIGERLAKE)
[17:37:43] [PASSED] 0x9A59 (TIGERLAKE)
[17:37:43] [PASSED] 0x9A78 (TIGERLAKE)
[17:37:43] [PASSED] 0x9AC0 (TIGERLAKE)
[17:37:43] [PASSED] 0x9AC9 (TIGERLAKE)
[17:37:43] [PASSED] 0x9AD9 (TIGERLAKE)
[17:37:43] [PASSED] 0x9AF8 (TIGERLAKE)
[17:37:43] [PASSED] 0x4C80 (ROCKETLAKE)
[17:37:43] [PASSED] 0x4C8A (ROCKETLAKE)
[17:37:43] [PASSED] 0x4C8B (ROCKETLAKE)
[17:37:43] [PASSED] 0x4C8C (ROCKETLAKE)
[17:37:43] [PASSED] 0x4C90 (ROCKETLAKE)
[17:37:43] [PASSED] 0x4C9A (ROCKETLAKE)
[17:37:43] [PASSED] 0x4680 (ALDERLAKE_S)
[17:37:43] [PASSED] 0x4682 (ALDERLAKE_S)
[17:37:43] [PASSED] 0x4688 (ALDERLAKE_S)
[17:37:43] [PASSED] 0x468A (ALDERLAKE_S)
[17:37:43] [PASSED] 0x468B (ALDERLAKE_S)
[17:37:43] [PASSED] 0x4690 (ALDERLAKE_S)
[17:37:43] [PASSED] 0x4692 (ALDERLAKE_S)
[17:37:43] [PASSED] 0x4693 (ALDERLAKE_S)
[17:37:43] [PASSED] 0x46A0 (ALDERLAKE_P)
[17:37:43] [PASSED] 0x46A1 (ALDERLAKE_P)
[17:37:43] [PASSED] 0x46A2 (ALDERLAKE_P)
[17:37:43] [PASSED] 0x46A3 (ALDERLAKE_P)
[17:37:43] [PASSED] 0x46A6 (ALDERLAKE_P)
[17:37:43] [PASSED] 0x46A8 (ALDERLAKE_P)
[17:37:43] [PASSED] 0x46AA (ALDERLAKE_P)
[17:37:43] [PASSED] 0x462A (ALDERLAKE_P)
[17:37:43] [PASSED] 0x4626 (ALDERLAKE_P)
[17:37:43] [PASSED] 0x4628 (ALDERLAKE_P)
[17:37:43] [PASSED] 0x46B0 (ALDERLAKE_P)
[17:37:43] [PASSED] 0x46B1 (ALDERLAKE_P)
[17:37:43] [PASSED] 0x46B2 (ALDERLAKE_P)
[17:37:43] [PASSED] 0x46B3 (ALDERLAKE_P)
[17:37:43] [PASSED] 0x46C0 (ALDERLAKE_P)
[17:37:43] [PASSED] 0x46C1 (ALDERLAKE_P)
[17:37:43] [PASSED] 0x46C2 (ALDERLAKE_P)
[17:37:43] [PASSED] 0x46C3 (ALDERLAKE_P)
[17:37:43] [PASSED] 0x46D0 (ALDERLAKE_N)
[17:37:43] [PASSED] 0x46D1 (ALDERLAKE_N)
[17:37:43] [PASSED] 0x46D2 (ALDERLAKE_N)
[17:37:43] [PASSED] 0x46D3 (ALDERLAKE_N)
[17:37:43] [PASSED] 0x46D4 (ALDERLAKE_N)
[17:37:43] [PASSED] 0xA721 (ALDERLAKE_P)
[17:37:43] [PASSED] 0xA7A1 (ALDERLAKE_P)
[17:37:43] [PASSED] 0xA7A9 (ALDERLAKE_P)
[17:37:43] [PASSED] 0xA7AC (ALDERLAKE_P)
[17:37:43] [PASSED] 0xA7AD (ALDERLAKE_P)
[17:37:43] [PASSED] 0xA720 (ALDERLAKE_P)
[17:37:43] [PASSED] 0xA7A0 (ALDERLAKE_P)
[17:37:43] [PASSED] 0xA7A8 (ALDERLAKE_P)
[17:37:43] [PASSED] 0xA7AA (ALDERLAKE_P)
[17:37:43] [PASSED] 0xA7AB (ALDERLAKE_P)
[17:37:43] [PASSED] 0xA780 (ALDERLAKE_S)
[17:37:43] [PASSED] 0xA781 (ALDERLAKE_S)
[17:37:43] [PASSED] 0xA782 (ALDERLAKE_S)
[17:37:43] [PASSED] 0xA783 (ALDERLAKE_S)
[17:37:43] [PASSED] 0xA788 (ALDERLAKE_S)
[17:37:43] [PASSED] 0xA789 (ALDERLAKE_S)
[17:37:43] [PASSED] 0xA78A (ALDERLAKE_S)
[17:37:43] [PASSED] 0xA78B (ALDERLAKE_S)
[17:37:43] [PASSED] 0x4905 (DG1)
[17:37:43] [PASSED] 0x4906 (DG1)
[17:37:43] [PASSED] 0x4907 (DG1)
[17:37:43] [PASSED] 0x4908 (DG1)
[17:37:43] [PASSED] 0x4909 (DG1)
[17:37:43] [PASSED] 0x56C0 (DG2)
[17:37:43] [PASSED] 0x56C2 (DG2)
[17:37:43] [PASSED] 0x56C1 (DG2)
[17:37:43] [PASSED] 0x7D51 (METEORLAKE)
[17:37:43] [PASSED] 0x7DD1 (METEORLAKE)
[17:37:43] [PASSED] 0x7D41 (METEORLAKE)
[17:37:43] [PASSED] 0x7D67 (METEORLAKE)
[17:37:43] [PASSED] 0xB640 (METEORLAKE)
[17:37:43] [PASSED] 0x56A0 (DG2)
[17:37:43] [PASSED] 0x56A1 (DG2)
[17:37:43] [PASSED] 0x56A2 (DG2)
[17:37:43] [PASSED] 0x56BE (DG2)
[17:37:43] [PASSED] 0x56BF (DG2)
[17:37:43] [PASSED] 0x5690 (DG2)
[17:37:43] [PASSED] 0x5691 (DG2)
[17:37:43] [PASSED] 0x5692 (DG2)
[17:37:43] [PASSED] 0x56A5 (DG2)
[17:37:43] [PASSED] 0x56A6 (DG2)
[17:37:43] [PASSED] 0x56B0 (DG2)
[17:37:43] [PASSED] 0x56B1 (DG2)
[17:37:43] [PASSED] 0x56BA (DG2)
[17:37:43] [PASSED] 0x56BB (DG2)
[17:37:43] [PASSED] 0x56BC (DG2)
[17:37:43] [PASSED] 0x56BD (DG2)
[17:37:43] [PASSED] 0x5693 (DG2)
[17:37:43] [PASSED] 0x5694 (DG2)
[17:37:43] [PASSED] 0x5695 (DG2)
[17:37:43] [PASSED] 0x56A3 (DG2)
[17:37:43] [PASSED] 0x56A4 (DG2)
[17:37:43] [PASSED] 0x56B2 (DG2)
[17:37:43] [PASSED] 0x56B3 (DG2)
[17:37:43] [PASSED] 0x5696 (DG2)
[17:37:43] [PASSED] 0x5697 (DG2)
[17:37:43] [PASSED] 0xB69 (PVC)
[17:37:43] [PASSED] 0xB6E (PVC)
[17:37:43] [PASSED] 0xBD4 (PVC)
[17:37:43] [PASSED] 0xBD5 (PVC)
[17:37:43] [PASSED] 0xBD6 (PVC)
[17:37:43] [PASSED] 0xBD7 (PVC)
[17:37:43] [PASSED] 0xBD8 (PVC)
[17:37:43] [PASSED] 0xBD9 (PVC)
[17:37:43] [PASSED] 0xBDA (PVC)
[17:37:43] [PASSED] 0xBDB (PVC)
[17:37:43] [PASSED] 0xBE0 (PVC)
[17:37:43] [PASSED] 0xBE1 (PVC)
[17:37:43] [PASSED] 0xBE5 (PVC)
[17:37:43] [PASSED] 0x7D40 (METEORLAKE)
[17:37:43] [PASSED] 0x7D45 (METEORLAKE)
[17:37:43] [PASSED] 0x7D55 (METEORLAKE)
[17:37:43] [PASSED] 0x7D60 (METEORLAKE)
[17:37:43] [PASSED] 0x7DD5 (METEORLAKE)
[17:37:43] [PASSED] 0x6420 (LUNARLAKE)
[17:37:43] [PASSED] 0x64A0 (LUNARLAKE)
[17:37:43] [PASSED] 0x64B0 (LUNARLAKE)
[17:37:43] [PASSED] 0xE202 (BATTLEMAGE)
[17:37:43] [PASSED] 0xE209 (BATTLEMAGE)
[17:37:43] [PASSED] 0xE20B (BATTLEMAGE)
[17:37:43] [PASSED] 0xE20C (BATTLEMAGE)
[17:37:43] [PASSED] 0xE20D (BATTLEMAGE)
[17:37:43] [PASSED] 0xE210 (BATTLEMAGE)
[17:37:43] [PASSED] 0xE211 (BATTLEMAGE)
[17:37:43] [PASSED] 0xE212 (BATTLEMAGE)
[17:37:43] [PASSED] 0xE216 (BATTLEMAGE)
[17:37:43] [PASSED] 0xE220 (BATTLEMAGE)
[17:37:43] [PASSED] 0xE221 (BATTLEMAGE)
[17:37:43] [PASSED] 0xE222 (BATTLEMAGE)
[17:37:43] [PASSED] 0xE223 (BATTLEMAGE)
[17:37:43] [PASSED] 0xB080 (PANTHERLAKE)
[17:37:43] [PASSED] 0xB081 (PANTHERLAKE)
[17:37:43] [PASSED] 0xB082 (PANTHERLAKE)
[17:37:43] [PASSED] 0xB083 (PANTHERLAKE)
[17:37:43] [PASSED] 0xB084 (PANTHERLAKE)
[17:37:43] [PASSED] 0xB085 (PANTHERLAKE)
[17:37:43] [PASSED] 0xB086 (PANTHERLAKE)
[17:37:43] [PASSED] 0xB087 (PANTHERLAKE)
[17:37:43] [PASSED] 0xB08F (PANTHERLAKE)
[17:37:43] [PASSED] 0xB090 (PANTHERLAKE)
[17:37:43] [PASSED] 0xB0A0 (PANTHERLAKE)
[17:37:43] [PASSED] 0xB0B0 (PANTHERLAKE)
[17:37:43] [PASSED] 0xFD80 (PANTHERLAKE)
[17:37:43] [PASSED] 0xFD81 (PANTHERLAKE)
[17:37:43] [PASSED] 0xD740 (NOVALAKE_S)
[17:37:43] [PASSED] 0xD741 (NOVALAKE_S)
[17:37:43] [PASSED] 0xD742 (NOVALAKE_S)
[17:37:43] [PASSED] 0xD743 (NOVALAKE_S)
[17:37:43] [PASSED] 0xD745 (NOVALAKE_S)
[17:37:43] [PASSED] 0xD74A (NOVALAKE_S)
[17:37:43] [PASSED] 0xD74B (NOVALAKE_S)
[17:37:43] [PASSED] 0x674C (CRESCENTISLAND)
[17:37:43] [PASSED] 0x674D (CRESCENTISLAND)
[17:37:43] [PASSED] 0x674E (CRESCENTISLAND)
[17:37:43] [PASSED] 0x674F (CRESCENTISLAND)
[17:37:43] [PASSED] 0x6750 (CRESCENTISLAND)
[17:37:43] [PASSED] 0xD750 (NOVALAKE_P)
[17:37:43] [PASSED] 0xD751 (NOVALAKE_P)
[17:37:43] [PASSED] 0xD752 (NOVALAKE_P)
[17:37:43] [PASSED] 0xD753 (NOVALAKE_P)
[17:37:43] [PASSED] 0xD754 (NOVALAKE_P)
[17:37:43] [PASSED] 0xD755 (NOVALAKE_P)
[17:37:43] [PASSED] 0xD756 (NOVALAKE_P)
[17:37:43] [PASSED] 0xD757 (NOVALAKE_P)
[17:37:43] [PASSED] 0xD75F (NOVALAKE_P)
[17:37:43] =============== [PASSED] check_platform_desc ===============
[17:37:43] ===================== [PASSED] xe_pci ======================
[17:37:43] ============= xe_rtp_tables_test (5 subtests) ==============
[17:37:43] ================== xe_rtp_table_gt_test  ===================
[17:37:43] [PASSED] gt_was/14011060649
[17:37:43] [PASSED] gt_was/14011059788
[17:37:43] [PASSED] gt_was/14015795083
[17:37:43] [PASSED] gt_was/16021867713
[17:37:43] [PASSED] gt_was/14019449301
[17:37:43] [PASSED] gt_was/16028005424
[17:37:43] [PASSED] gt_was/14026578760
[17:37:43] [PASSED] gt_was/1409420604
[17:37:43] [PASSED] gt_was/1408615072
[17:37:43] [PASSED] gt_was/22010523718
[17:37:43] [PASSED] gt_was/14011006942
[17:37:43] [PASSED] gt_was/14014830051
[17:37:43] [PASSED] gt_was/18018781329
[17:37:43] [PASSED] gt_was/1509235366
[17:37:43] [PASSED] gt_was/18018781329
[17:37:43] [PASSED] gt_was/16016694945
[17:37:43] [PASSED] gt_was/14018575942
[17:37:43] [PASSED] gt_was/22016670082
[17:37:43] [PASSED] gt_was/22016670082
[17:37:43] [PASSED] gt_was/14017421178
[17:37:43] [PASSED] gt_was/16025250150
[17:37:43] [PASSED] gt_was/14021871409
[17:37:43] [PASSED] gt_was/16021865536
[17:37:43] [PASSED] gt_was/14021486841
[17:37:43] [PASSED] gt_was/14025160223
[17:37:43] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[17:37:43] [PASSED] gt_was/14025635424
[17:37:43] [PASSED] gt_was/16028005424
[17:37:43] ============== [PASSED] xe_rtp_table_gt_test ===============
[17:37:43] ================== xe_rtp_table_gt_test  ===================
[17:37:43] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[17:37:43] [PASSED] gt_tunings/Tuning: 32B Access Enable
[17:37:43] [PASSED] gt_tunings/Tuning: L3 cache
[17:37:43] [PASSED] gt_tunings/Tuning: L3 cache - media
[17:37:43] [PASSED] gt_tunings/Tuning: Compression Overfetch
[17:37:43] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[17:37:43] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[17:37:43] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[17:37:43] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[17:37:43] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[17:37:43] [PASSED] gt_tunings/Tuning: Stateless compression control
[17:37:43] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[17:37:43] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[17:37:43] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[17:37:43] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[17:37:43] ============== [PASSED] xe_rtp_table_gt_test ===============
[17:37:43] ================== xe_rtp_table_oob_test  ==================
[17:37:43] [PASSED] oob_was/1607983814
[17:37:43] [PASSED] oob_was/16010904313
[17:37:43] [PASSED] oob_was/18022495364
[17:37:43] [PASSED] oob_was/22012773006
[17:37:43] [PASSED] oob_was/14014475959
[17:37:43] [PASSED] oob_was/22011391025
[17:37:43] [PASSED] oob_was/22012727170
[17:37:43] [PASSED] oob_was/22012727685
[17:37:43] [PASSED] oob_was/22016596838
[17:37:43] [PASSED] oob_was/18020744125
[17:37:43] [PASSED] oob_was/1409600907
[17:37:43] [PASSED] oob_was/22014953428
[17:37:43] [PASSED] oob_was/16017236439
[17:37:43] [PASSED] oob_was/14019821291
[17:37:43] [PASSED] oob_was/14015076503
[17:37:43] [PASSED] oob_was/14018913170
[17:37:43] [PASSED] oob_was/14018094691
[17:37:43] [PASSED] oob_was/18024947630
[17:37:43] [PASSED] oob_was/16022287689
[17:37:43] [PASSED] oob_was/13011645652
[17:37:43] [PASSED] oob_was/14022293748
[17:37:43] [PASSED] oob_was/22019794406
[17:37:43] [PASSED] oob_was/22019338487
[17:37:43] [PASSED] oob_was/16023588340
[17:37:43] [PASSED] oob_was/14019789679
[17:37:43] [PASSED] oob_was/14022866841
[17:37:43] [PASSED] oob_was/16021333562
[17:37:43] [PASSED] oob_was/14016712196
[17:37:43] [PASSED] oob_was/14015568240
[17:37:43] [PASSED] oob_was/18013179988
[17:37:43] [PASSED] oob_was/1508761755
[17:37:43] [PASSED] oob_was/16023105232
[17:37:43] [PASSED] oob_was/16026508708
[17:37:43] [PASSED] oob_was/14020001231
[17:37:43] [PASSED] oob_was/16023683509
[17:37:43] [PASSED] oob_was/14025515070
[17:37:43] [PASSED] oob_was/15015404425_disable
[17:37:43] [PASSED] oob_was/16026007364
[17:37:43] [PASSED] oob_was/14020316580
[17:37:43] [PASSED] oob_was/14025883347
[17:37:43] [PASSED] oob_was/16029380221
[17:37:43] [PASSED] oob_was/22022079272
[17:37:43] [PASSED] oob_was/16029897822
[17:37:43] [PASSED] oob_was/14027054324
[17:37:43] [PASSED] oob_was/14025941587
[17:37:43] ============== [PASSED] xe_rtp_table_oob_test ==============
[17:37:43] ================ xe_rtp_table_dev_oob_test  ================
[17:37:43] [PASSED] device_oob_was/22010954014
[17:37:43] [PASSED] device_oob_was/15015404425
[17:37:43] [PASSED] device_oob_was/22019338487_display
[17:37:43] [PASSED] device_oob_was/14022085890
[17:37:43] [PASSED] device_oob_was/14026539277
[17:37:43] [PASSED] device_oob_was/14026633728
[17:37:43] [PASSED] device_oob_was/14026746987
[17:37:43] [PASSED] device_oob_was/14026779378
[17:37:43] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[17:37:43] ========== xe_rtp_table_missing_upper_bound_test  ==========
[17:37:43] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[17:37:43] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[17:37:43] [PASSED] register_whitelist/1806527549
[17:37:43] [PASSED] register_whitelist/allow_read_ctx_timestamp
[17:37:43] [PASSED] register_whitelist/allow_read_queue_timestamp
[17:37:43] [PASSED] register_whitelist/16014440446
[17:37:43] [PASSED] register_whitelist/16017236439
[17:37:43] [PASSED] register_whitelist/16020183090
[17:37:43] [PASSED] register_whitelist/14024997852
[17:37:43] [PASSED] register_whitelist/14024997852
[17:37:43] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[17:37:43] =============== [PASSED] xe_rtp_tables_test ================
[17:37:43] =================== xe_rtp (3 subtests) ====================
[17:37:43] =================== xe_rtp_rules_tests  ====================
[17:37:43] [PASSED] no
[17:37:43] [PASSED] yes
[17:37:43] [PASSED] no-and-no
[17:37:43] [PASSED] no-and-yes
[17:37:43] [PASSED] yes-and-no
[17:37:43] [PASSED] yes-and-yes
[17:37:43] [PASSED] no-or-no
[17:37:43] [PASSED] no-or-yes
[17:37:43] [PASSED] yes-or-no
[17:37:43] [PASSED] yes-or-yes
[17:37:43] [PASSED] no-yes-or-yes-no
[17:37:43] [PASSED] no-yes-or-yes-yes
[17:37:43] [PASSED] yes-yes-or-no-yes
[17:37:43] [PASSED] yes-yes-or-yes-yes
[17:37:43] [PASSED] no-no-or-yes-or-no
[17:37:43] [PASSED] or
[17:37:43] [PASSED] or-yes
[17:37:43] [PASSED] or-no
[17:37:43] [PASSED] yes-or
[17:37:43] [PASSED] no-or
[17:37:43] [PASSED] no-or-or-yes
[17:37:43] [PASSED] yes-or-or-no
[17:37:43] [PASSED] no-or-or-no
[17:37:43] [PASSED] missing-context-engine-class
[17:37:43] [PASSED] missing-context-engine-class-or-yes
[17:37:43] [PASSED] missing-context-engine-class-or-or-yes
[17:37:43] =============== [PASSED] xe_rtp_rules_tests ================
[17:37:43] =============== xe_rtp_process_to_sr_tests  ================
[17:37:43] [PASSED] coalesce-same-reg
[17:37:43] [PASSED] coalesce-same-reg-literal-and-func
[17:37:43] [PASSED] no-match-no-add
[17:37:43] [PASSED] two-regs-two-entries
[17:37:43] [PASSED] clr-one-set-other
[17:37:43] [PASSED] set-field
[17:37:43] [PASSED] conflict-duplicate
[17:37:43] [PASSED] conflict-not-disjoint
[17:37:43] [PASSED] conflict-not-disjoint-literal-and-func
[17:37:43] [PASSED] conflict-reg-type
[17:37:43] [PASSED] bad-mcr-reg-forced-to-regular
[17:37:43] [PASSED] bad-regular-reg-forced-to-mcr
[17:37:43] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[17:37:43] ================== xe_rtp_process_tests  ===================
[17:37:43] [PASSED] active1
[17:37:43] [PASSED] active2
[17:37:43] [PASSED] active-inactive
[17:37:43] [PASSED] inactive-active
[17:37:43] [PASSED] inactive-active-inactive
[17:37:43] [PASSED] inactive-inactive-inactive
[17:37:43] ============== [PASSED] xe_rtp_process_tests ===============
[17:37:43] ===================== [PASSED] xe_rtp ======================
[17:37:43] ==================== xe_wa (1 subtest) =====================
[17:37:43] ======================== xe_wa_gt  =========================
[17:37:43] [PASSED] TIGERLAKE B0
[17:37:43] [PASSED] DG1 A0
[17:37:43] [PASSED] DG1 B0
[17:37:43] [PASSED] ALDERLAKE_S A0
[17:37:43] [PASSED] ALDERLAKE_S B0
[17:37:43] [PASSED] ALDERLAKE_S C0
[17:37:43] [PASSED] ALDERLAKE_S D0
[17:37:43] [PASSED] ALDERLAKE_P A0
[17:37:43] [PASSED] ALDERLAKE_P B0
[17:37:43] [PASSED] ALDERLAKE_P C0
[17:37:43] [PASSED] ALDERLAKE_S RPLS D0
[17:37:43] [PASSED] ALDERLAKE_P RPLU E0
[17:37:43] [PASSED] DG2 G10 C0
[17:37:43] [PASSED] DG2 G11 B1
[17:37:43] [PASSED] DG2 G12 A1
[17:37:43] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[17:37:43] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[17:37:43] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[17:37:43] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[17:37:43] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[17:37:43] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[17:37:43] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[17:37:43] ==================== [PASSED] xe_wa_gt =====================
[17:37:43] ====================== [PASSED] xe_wa ======================
[17:37:43] ============================================================
[17:37:43] Testing complete. Ran 794 tests: passed: 766, skipped: 28
[17:37:43] Elapsed time: 36.211s total, 1.805s configuring, 33.640s building, 0.717s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[17:37:43] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[17:37:45] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[17:38:10] Starting KUnit Kernel (1/1)...
[17:38:10] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[17:38:10] ============= refcount_interrupt (4 subtests) ==============
[17:38:10] [PASSED] test_single_irq_change
[17:38:10] [PASSED] test_nested_irq_change
[17:38:10] [PASSED] test_multiple_irq_change
[17:38:10] [PASSED] test_irq_save
[17:38:10] =============== [PASSED] refcount_interrupt ================
[17:38:10] ============ drm_test_pick_cmdline (2 subtests) ============
[17:38:10] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[17:38:10] =============== drm_test_pick_cmdline_named  ===============
[17:38:10] [PASSED] NTSC
[17:38:10] [PASSED] NTSC-J
[17:38:10] [PASSED] PAL
[17:38:10] [PASSED] PAL-M
[17:38:10] =========== [PASSED] drm_test_pick_cmdline_named ===========
[17:38:10] ============== [PASSED] drm_test_pick_cmdline ==============
[17:38:10] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[17:38:10] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[17:38:10] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[17:38:10] =========== drm_validate_clone_mode (2 subtests) ===========
[17:38:10] ============== drm_test_check_in_clone_mode  ===============
[17:38:10] [PASSED] in_clone_mode
[17:38:10] [PASSED] not_in_clone_mode
[17:38:10] ========== [PASSED] drm_test_check_in_clone_mode ===========
[17:38:10] =============== drm_test_check_valid_clones  ===============
[17:38:10] [PASSED] not_in_clone_mode
[17:38:10] [PASSED] valid_clone
[17:38:10] [PASSED] invalid_clone
[17:38:10] =========== [PASSED] drm_test_check_valid_clones ===========
[17:38:10] ============= [PASSED] drm_validate_clone_mode =============
[17:38:10] ============= drm_validate_modeset (1 subtest) =============
[17:38:10] [PASSED] drm_test_check_connector_changed_modeset
[17:38:10] ============== [PASSED] drm_validate_modeset ===============
[17:38:10] ====== drm_test_bridge_get_current_state (1 subtest) =======
[17:38:10] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[17:38:10] ======== [PASSED] drm_test_bridge_get_current_state ========
[17:38:10] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[17:38:10] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[17:38:10] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[17:38:10] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[17:38:10] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[17:38:10] ============== drm_bridge_alloc (2 subtests) ===============
[17:38:10] [PASSED] drm_test_drm_bridge_alloc_basic
[17:38:10] [PASSED] drm_test_drm_bridge_alloc_get_put
[17:38:10] ================ [PASSED] drm_bridge_alloc =================
[17:38:10] ============= drm_bridge_bus_fmt (5 subtests) ==============
[17:38:10] [PASSED] drm_test_bridge_rgb_yuv_rgb
[17:38:10] [PASSED] drm_test_bridge_must_convert_to_yuv444
[17:38:10] [PASSED] drm_test_bridge_hdmi_auto_rgb
[17:38:10] [PASSED] drm_test_bridge_auto_first
[17:38:10] [PASSED] drm_test_bridge_rgb_yuv_no_path
[17:38:10] =============== [PASSED] drm_bridge_bus_fmt ================
[17:38:10] ============= drm_cmdline_parser (40 subtests) =============
[17:38:10] [PASSED] drm_test_cmdline_force_d_only
[17:38:10] [PASSED] drm_test_cmdline_force_D_only_dvi
[17:38:10] [PASSED] drm_test_cmdline_force_D_only_hdmi
[17:38:10] [PASSED] drm_test_cmdline_force_D_only_not_digital
[17:38:10] [PASSED] drm_test_cmdline_force_e_only
[17:38:10] [PASSED] drm_test_cmdline_res
[17:38:10] [PASSED] drm_test_cmdline_res_vesa
[17:38:10] [PASSED] drm_test_cmdline_res_vesa_rblank
[17:38:10] [PASSED] drm_test_cmdline_res_rblank
[17:38:10] [PASSED] drm_test_cmdline_res_bpp
[17:38:10] [PASSED] drm_test_cmdline_res_refresh
[17:38:10] [PASSED] drm_test_cmdline_res_bpp_refresh
[17:38:10] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[17:38:10] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[17:38:10] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[17:38:10] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[17:38:10] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[17:38:10] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[17:38:10] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[17:38:10] [PASSED] drm_test_cmdline_res_margins_force_on
[17:38:10] [PASSED] drm_test_cmdline_res_vesa_margins
[17:38:10] [PASSED] drm_test_cmdline_name
[17:38:10] [PASSED] drm_test_cmdline_name_bpp
[17:38:10] [PASSED] drm_test_cmdline_name_option
[17:38:10] [PASSED] drm_test_cmdline_name_bpp_option
[17:38:10] [PASSED] drm_test_cmdline_rotate_0
[17:38:10] [PASSED] drm_test_cmdline_rotate_90
[17:38:10] [PASSED] drm_test_cmdline_rotate_180
[17:38:10] [PASSED] drm_test_cmdline_rotate_270
[17:38:10] [PASSED] drm_test_cmdline_hmirror
[17:38:10] [PASSED] drm_test_cmdline_vmirror
[17:38:10] [PASSED] drm_test_cmdline_margin_options
[17:38:10] [PASSED] drm_test_cmdline_multiple_options
[17:38:10] [PASSED] drm_test_cmdline_bpp_extra_and_option
[17:38:10] [PASSED] drm_test_cmdline_extra_and_option
[17:38:10] [PASSED] drm_test_cmdline_freestanding_options
[17:38:10] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[17:38:10] [PASSED] drm_test_cmdline_panel_orientation
[17:38:10] ================ drm_test_cmdline_invalid  =================
[17:38:10] [PASSED] margin_only
[17:38:10] [PASSED] interlace_only
[17:38:10] [PASSED] res_missing_x
[17:38:10] [PASSED] res_missing_y
[17:38:10] [PASSED] res_bad_y
[17:38:10] [PASSED] res_missing_y_bpp
[17:38:10] [PASSED] res_bad_bpp
[17:38:10] [PASSED] res_bad_refresh
[17:38:10] [PASSED] res_bpp_refresh_force_on_off
[17:38:10] [PASSED] res_invalid_mode
[17:38:10] [PASSED] res_bpp_wrong_place_mode
[17:38:10] [PASSED] name_bpp_refresh
[17:38:10] [PASSED] name_refresh
[17:38:10] [PASSED] name_refresh_wrong_mode
[17:38:10] [PASSED] name_refresh_invalid_mode
[17:38:10] [PASSED] rotate_multiple
[17:38:10] [PASSED] rotate_invalid_val
[17:38:10] [PASSED] rotate_truncated
[17:38:10] [PASSED] invalid_option
[17:38:10] [PASSED] invalid_tv_option
[17:38:10] [PASSED] truncated_tv_option
[17:38:10] ============ [PASSED] drm_test_cmdline_invalid =============
[17:38:10] =============== drm_test_cmdline_tv_options  ===============
[17:38:10] [PASSED] NTSC
[17:38:10] [PASSED] NTSC_443
[17:38:10] [PASSED] NTSC_J
[17:38:10] [PASSED] PAL
[17:38:10] [PASSED] PAL_M
[17:38:10] [PASSED] PAL_N
[17:38:10] [PASSED] SECAM
[17:38:10] [PASSED] MONO_525
[17:38:10] [PASSED] MONO_625
[17:38:10] =========== [PASSED] drm_test_cmdline_tv_options ===========
[17:38:10] =============== [PASSED] drm_cmdline_parser ================
[17:38:10] ========== drmm_connector_hdmi_init (20 subtests) ==========
[17:38:10] [PASSED] drm_test_connector_hdmi_init_valid
[17:38:10] [PASSED] drm_test_connector_hdmi_init_bpc_8
[17:38:10] [PASSED] drm_test_connector_hdmi_init_bpc_10
[17:38:10] [PASSED] drm_test_connector_hdmi_init_bpc_12
[17:38:10] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[17:38:10] [PASSED] drm_test_connector_hdmi_init_bpc_null
[17:38:10] [PASSED] drm_test_connector_hdmi_init_formats_empty
[17:38:10] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[17:38:10] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[17:38:10] [PASSED] supported_formats=0x9 yuv420_allowed=1
[17:38:10] [PASSED] supported_formats=0x9 yuv420_allowed=0
[17:38:10] [PASSED] supported_formats=0x5 yuv420_allowed=1
[17:38:10] [PASSED] supported_formats=0x5 yuv420_allowed=0
[17:38:10] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[17:38:10] [PASSED] drm_test_connector_hdmi_init_null_ddc
[17:38:10] [PASSED] drm_test_connector_hdmi_init_null_product
[17:38:10] [PASSED] drm_test_connector_hdmi_init_null_vendor
[17:38:10] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[17:38:10] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[17:38:10] [PASSED] drm_test_connector_hdmi_init_product_valid
[17:38:10] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[17:38:10] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[17:38:10] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[17:38:10] ========= drm_test_connector_hdmi_init_type_valid  =========
[17:38:10] [PASSED] HDMI-A
[17:38:10] [PASSED] HDMI-B
[17:38:10] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[17:38:10] ======== drm_test_connector_hdmi_init_type_invalid  ========
[17:38:10] [PASSED] Unknown
[17:38:10] [PASSED] VGA
[17:38:10] [PASSED] DVI-I
[17:38:10] [PASSED] DVI-D
[17:38:10] [PASSED] DVI-A
[17:38:10] [PASSED] Composite
[17:38:10] [PASSED] SVIDEO
[17:38:10] [PASSED] LVDS
[17:38:10] [PASSED] Component
[17:38:10] [PASSED] DIN
[17:38:10] [PASSED] DP
[17:38:10] [PASSED] TV
[17:38:10] [PASSED] eDP
[17:38:10] [PASSED] Virtual
[17:38:10] [PASSED] DSI
[17:38:10] [PASSED] DPI
[17:38:10] [PASSED] Writeback
[17:38:10] [PASSED] SPI
[17:38:10] [PASSED] USB
[17:38:10] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[17:38:10] ============ [PASSED] drmm_connector_hdmi_init =============
[17:38:10] ============= drmm_connector_init (3 subtests) =============
[17:38:10] [PASSED] drm_test_drmm_connector_init
[17:38:10] [PASSED] drm_test_drmm_connector_init_null_ddc
[17:38:10] ========= drm_test_drmm_connector_init_type_valid  =========
[17:38:10] [PASSED] Unknown
[17:38:10] [PASSED] VGA
[17:38:10] [PASSED] DVI-I
[17:38:10] [PASSED] DVI-D
[17:38:10] [PASSED] DVI-A
[17:38:10] [PASSED] Composite
[17:38:10] [PASSED] SVIDEO
[17:38:10] [PASSED] LVDS
[17:38:10] [PASSED] Component
[17:38:10] [PASSED] DIN
[17:38:10] [PASSED] DP
[17:38:10] [PASSED] HDMI-A
[17:38:10] [PASSED] HDMI-B
[17:38:10] [PASSED] TV
[17:38:10] [PASSED] eDP
[17:38:10] [PASSED] Virtual
[17:38:10] [PASSED] DSI
[17:38:10] [PASSED] DPI
[17:38:10] [PASSED] Writeback
[17:38:10] [PASSED] SPI
[17:38:10] [PASSED] USB
[17:38:10] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[17:38:10] =============== [PASSED] drmm_connector_init ===============
[17:38:10] ========= drm_connector_dynamic_init (6 subtests) ==========
[17:38:10] [PASSED] drm_test_drm_connector_dynamic_init
[17:38:10] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[17:38:10] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[17:38:10] [PASSED] drm_test_drm_connector_dynamic_init_properties
[17:38:10] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[17:38:10] [PASSED] Unknown
[17:38:10] [PASSED] VGA
[17:38:10] [PASSED] DVI-I
[17:38:10] [PASSED] DVI-D
[17:38:10] [PASSED] DVI-A
[17:38:10] [PASSED] Composite
[17:38:10] [PASSED] SVIDEO
[17:38:10] [PASSED] LVDS
[17:38:10] [PASSED] Component
[17:38:10] [PASSED] DIN
[17:38:10] [PASSED] DP
[17:38:10] [PASSED] HDMI-A
[17:38:10] [PASSED] HDMI-B
[17:38:10] [PASSED] TV
[17:38:10] [PASSED] eDP
[17:38:10] [PASSED] Virtual
[17:38:10] [PASSED] DSI
[17:38:10] [PASSED] DPI
[17:38:10] [PASSED] Writeback
[17:38:10] [PASSED] SPI
[17:38:10] [PASSED] USB
[17:38:10] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[17:38:10] ======== drm_test_drm_connector_dynamic_init_name  =========
[17:38:10] [PASSED] Unknown
[17:38:10] [PASSED] VGA
[17:38:10] [PASSED] DVI-I
[17:38:10] [PASSED] DVI-D
[17:38:10] [PASSED] DVI-A
[17:38:10] [PASSED] Composite
[17:38:10] [PASSED] SVIDEO
[17:38:10] [PASSED] LVDS
[17:38:10] [PASSED] Component
[17:38:10] [PASSED] DIN
[17:38:10] [PASSED] DP
[17:38:10] [PASSED] HDMI-A
[17:38:10] [PASSED] HDMI-B
[17:38:10] [PASSED] TV
[17:38:10] [PASSED] eDP
[17:38:10] [PASSED] Virtual
[17:38:10] [PASSED] DSI
[17:38:10] [PASSED] DPI
[17:38:10] [PASSED] Writeback
[17:38:10] [PASSED] SPI
[17:38:10] [PASSED] USB
[17:38:10] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[17:38:10] =========== [PASSED] drm_connector_dynamic_init ============
[17:38:10] ==== drm_connector_dynamic_register_early (4 subtests) =====
[17:38:10] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[17:38:10] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[17:38:10] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[17:38:10] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[17:38:10] ====== [PASSED] drm_connector_dynamic_register_early =======
[17:38:10] ======= drm_connector_dynamic_register (7 subtests) ========
[17:38:10] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[17:38:10] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[17:38:10] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[17:38:10] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[17:38:10] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[17:38:10] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[17:38:10] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[17:38:10] ========= [PASSED] drm_connector_dynamic_register ==========
[17:38:10] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[17:38:10] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[17:38:10] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[17:38:10] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[17:38:10] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[17:38:10] ========== drm_test_get_tv_mode_from_name_valid  ===========
[17:38:10] [PASSED] NTSC
[17:38:10] [PASSED] NTSC-443
[17:38:10] [PASSED] NTSC-J
[17:38:10] [PASSED] PAL
[17:38:10] [PASSED] PAL-M
[17:38:10] [PASSED] PAL-N
[17:38:10] [PASSED] SECAM
[17:38:10] [PASSED] Mono
[17:38:10] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[17:38:10] [PASSED] drm_test_get_tv_mode_from_name_truncated
[17:38:10] ============ [PASSED] drm_get_tv_mode_from_name ============
[17:38:10] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[17:38:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[17:38:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[17:38:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[17:38:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[17:38:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[17:38:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[17:38:10] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[17:38:10] [PASSED] VIC 96
[17:38:10] [PASSED] VIC 97
[17:38:10] [PASSED] VIC 101
[17:38:10] [PASSED] VIC 102
[17:38:10] [PASSED] VIC 106
[17:38:10] [PASSED] VIC 107
[17:38:10] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[17:38:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[17:38:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[17:38:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[17:38:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[17:38:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[17:38:10] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[17:38:10] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[17:38:10] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[17:38:10] [PASSED] Automatic
[17:38:10] [PASSED] Full
[17:38:10] [PASSED] Limited 16:235
[17:38:10] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[17:38:10] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[17:38:10] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[17:38:10] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[17:38:10] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[17:38:10] [PASSED] RGB
[17:38:10] [PASSED] YUV 4:2:0
[17:38:10] [PASSED] YUV 4:2:2
[17:38:10] [PASSED] YUV 4:4:4
[17:38:10] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[17:38:10] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[17:38:10] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[17:38:10] ============= drm_damage_helper (21 subtests) ==============
[17:38:10] [PASSED] drm_test_damage_iter_no_damage
[17:38:10] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[17:38:10] [PASSED] drm_test_damage_iter_no_damage_src_moved
[17:38:10] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[17:38:10] [PASSED] drm_test_damage_iter_no_damage_not_visible
[17:38:10] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[17:38:10] [PASSED] drm_test_damage_iter_no_damage_no_fb
[17:38:10] [PASSED] drm_test_damage_iter_simple_damage
[17:38:10] [PASSED] drm_test_damage_iter_single_damage
[17:38:10] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[17:38:10] [PASSED] drm_test_damage_iter_single_damage_outside_src
[17:38:10] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[17:38:10] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[17:38:10] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[17:38:10] [PASSED] drm_test_damage_iter_single_damage_src_moved
[17:38:10] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[17:38:10] [PASSED] drm_test_damage_iter_damage
[17:38:10] [PASSED] drm_test_damage_iter_damage_one_intersect
[17:38:10] [PASSED] drm_test_damage_iter_damage_one_outside
[17:38:10] [PASSED] drm_test_damage_iter_damage_src_moved
[17:38:10] [PASSED] drm_test_damage_iter_damage_not_visible
[17:38:10] ================ [PASSED] drm_damage_helper ================
[17:38:10] ============== drm_dp_mst_helper (3 subtests) ==============
[17:38:10] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[17:38:10] [PASSED] Clock 154000 BPP 30 DSC disabled
[17:38:10] [PASSED] Clock 234000 BPP 30 DSC disabled
[17:38:10] [PASSED] Clock 297000 BPP 24 DSC disabled
[17:38:10] [PASSED] Clock 332880 BPP 24 DSC enabled
[17:38:10] [PASSED] Clock 324540 BPP 24 DSC enabled
[17:38:10] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[17:38:10] ============== drm_test_dp_mst_calc_pbn_div  ===============
[17:38:10] [PASSED] Link rate 2000000 lane count 4
[17:38:10] [PASSED] Link rate 2000000 lane count 2
[17:38:10] [PASSED] Link rate 2000000 lane count 1
[17:38:10] [PASSED] Link rate 1350000 lane count 4
[17:38:10] [PASSED] Link rate 1350000 lane count 2
[17:38:10] [PASSED] Link rate 1350000 lane count 1
[17:38:10] [PASSED] Link rate 1000000 lane count 4
[17:38:10] [PASSED] Link rate 1000000 lane count 2
[17:38:10] [PASSED] Link rate 1000000 lane count 1
[17:38:10] [PASSED] Link rate 810000 lane count 4
[17:38:10] [PASSED] Link rate 810000 lane count 2
[17:38:10] [PASSED] Link rate 810000 lane count 1
[17:38:10] [PASSED] Link rate 540000 lane count 4
[17:38:10] [PASSED] Link rate 540000 lane count 2
[17:38:10] [PASSED] Link rate 540000 lane count 1
[17:38:10] [PASSED] Link rate 270000 lane count 4
[17:38:10] [PASSED] Link rate 270000 lane count 2
[17:38:10] [PASSED] Link rate 270000 lane count 1
[17:38:10] [PASSED] Link rate 162000 lane count 4
[17:38:10] [PASSED] Link rate 162000 lane count 2
[17:38:10] [PASSED] Link rate 162000 lane count 1
[17:38:10] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[17:38:10] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[17:38:10] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[17:38:10] [PASSED] DP_POWER_UP_PHY with port number
[17:38:10] [PASSED] DP_POWER_DOWN_PHY with port number
[17:38:10] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[17:38:10] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[17:38:10] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[17:38:10] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[17:38:10] [PASSED] DP_QUERY_PAYLOAD with port number
[17:38:10] [PASSED] DP_QUERY_PAYLOAD with VCPI
[17:38:10] [PASSED] DP_REMOTE_DPCD_READ with port number
[17:38:10] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[17:38:10] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[17:38:10] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[17:38:10] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[17:38:10] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[17:38:10] [PASSED] DP_REMOTE_I2C_READ with port number
[17:38:10] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[17:38:10] [PASSED] DP_REMOTE_I2C_READ with transactions array
[17:38:10] [PASSED] DP_REMOTE_I2C_WRITE with port number
[17:38:10] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[17:38:10] [PASSED] DP_REMOTE_I2C_WRITE with data array
[17:38:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[17:38:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[17:38:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[17:38:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[17:38:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[17:38:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[17:38:10] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[17:38:10] ================ [PASSED] drm_dp_mst_helper ================
[17:38:10] ================== drm_exec (7 subtests) ===================
[17:38:10] [PASSED] sanitycheck
[17:38:10] [PASSED] test_lock
[17:38:10] [PASSED] test_lock_unlock
[17:38:10] [PASSED] test_duplicates
[17:38:10] [PASSED] test_prepare
[17:38:10] [PASSED] test_prepare_array
[17:38:10] [PASSED] test_multiple_loops
[17:38:10] ==================== [PASSED] drm_exec =====================
[17:38:10] =========== drm_format_helper_test (17 subtests) ===========
[17:38:10] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[17:38:10] [PASSED] single_pixel_source_buffer
[17:38:10] [PASSED] single_pixel_clip_rectangle
[17:38:10] [PASSED] well_known_colors
[17:38:10] [PASSED] destination_pitch
[17:38:10] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[17:38:10] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[17:38:10] [PASSED] single_pixel_source_buffer
[17:38:10] [PASSED] single_pixel_clip_rectangle
[17:38:10] [PASSED] well_known_colors
[17:38:10] [PASSED] destination_pitch
[17:38:10] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[17:38:10] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[17:38:10] [PASSED] single_pixel_source_buffer
[17:38:10] [PASSED] single_pixel_clip_rectangle
[17:38:10] [PASSED] well_known_colors
[17:38:10] [PASSED] destination_pitch
[17:38:10] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[17:38:10] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[17:38:10] [PASSED] single_pixel_source_buffer
[17:38:10] [PASSED] single_pixel_clip_rectangle
[17:38:10] [PASSED] well_known_colors
[17:38:10] [PASSED] destination_pitch
[17:38:10] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[17:38:10] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[17:38:10] [PASSED] single_pixel_source_buffer
[17:38:10] [PASSED] single_pixel_clip_rectangle
[17:38:10] [PASSED] well_known_colors
[17:38:10] [PASSED] destination_pitch
[17:38:10] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[17:38:10] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[17:38:10] [PASSED] single_pixel_source_buffer
[17:38:10] [PASSED] single_pixel_clip_rectangle
[17:38:10] [PASSED] well_known_colors
[17:38:10] [PASSED] destination_pitch
[17:38:10] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[17:38:10] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[17:38:10] [PASSED] single_pixel_source_buffer
[17:38:10] [PASSED] single_pixel_clip_rectangle
[17:38:10] [PASSED] well_known_colors
[17:38:10] [PASSED] destination_pitch
[17:38:10] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[17:38:10] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[17:38:10] [PASSED] single_pixel_source_buffer
[17:38:10] [PASSED] single_pixel_clip_rectangle
[17:38:10] [PASSED] well_known_colors
[17:38:10] [PASSED] destination_pitch
[17:38:10] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[17:38:10] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[17:38:10] [PASSED] single_pixel_source_buffer
[17:38:10] [PASSED] single_pixel_clip_rectangle
[17:38:10] [PASSED] well_known_colors
[17:38:10] [PASSED] destination_pitch
[17:38:10] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[17:38:10] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[17:38:10] [PASSED] single_pixel_source_buffer
[17:38:10] [PASSED] single_pixel_clip_rectangle
[17:38:10] [PASSED] well_known_colors
[17:38:10] [PASSED] destination_pitch
[17:38:10] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[17:38:10] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[17:38:10] [PASSED] single_pixel_source_buffer
[17:38:10] [PASSED] single_pixel_clip_rectangle
[17:38:10] [PASSED] well_known_colors
[17:38:10] [PASSED] destination_pitch
[17:38:10] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[17:38:10] ============== drm_test_fb_xrgb8888_to_mono  ===============
[17:38:10] [PASSED] single_pixel_source_buffer
[17:38:10] [PASSED] single_pixel_clip_rectangle
[17:38:10] [PASSED] well_known_colors
[17:38:10] [PASSED] destination_pitch
[17:38:10] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[17:38:10] ==================== drm_test_fb_swab  =====================
[17:38:10] [PASSED] single_pixel_source_buffer
[17:38:10] [PASSED] single_pixel_clip_rectangle
[17:38:10] [PASSED] well_known_colors
[17:38:10] [PASSED] destination_pitch
[17:38:10] ================ [PASSED] drm_test_fb_swab =================
[17:38:10] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[17:38:10] [PASSED] single_pixel_source_buffer
[17:38:10] [PASSED] single_pixel_clip_rectangle
[17:38:10] [PASSED] well_known_colors
[17:38:10] [PASSED] destination_pitch
[17:38:10] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[17:38:10] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[17:38:10] [PASSED] single_pixel_source_buffer
[17:38:10] [PASSED] single_pixel_clip_rectangle
[17:38:10] [PASSED] well_known_colors
[17:38:10] [PASSED] destination_pitch
[17:38:10] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[17:38:10] ================= drm_test_fb_clip_offset  =================
[17:38:10] [PASSED] pass through
[17:38:10] [PASSED] horizontal offset
[17:38:10] [PASSED] vertical offset
[17:38:10] [PASSED] horizontal and vertical offset
[17:38:10] [PASSED] horizontal offset (custom pitch)
[17:38:10] [PASSED] vertical offset (custom pitch)
[17:38:10] [PASSED] horizontal and vertical offset (custom pitch)
[17:38:10] ============= [PASSED] drm_test_fb_clip_offset =============
[17:38:10] =================== drm_test_fb_memcpy  ====================
[17:38:10] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[17:38:10] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[17:38:10] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[17:38:10] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[17:38:10] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[17:38:10] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[17:38:10] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[17:38:10] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[17:38:10] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[17:38:10] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[17:38:10] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[17:38:10] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[17:38:10] =============== [PASSED] drm_test_fb_memcpy ================
[17:38:10] ============= [PASSED] drm_format_helper_test ==============
[17:38:10] ================= drm_format (18 subtests) =================
[17:38:10] [PASSED] drm_test_format_block_width_invalid
[17:38:10] [PASSED] drm_test_format_block_width_one_plane
[17:38:10] [PASSED] drm_test_format_block_width_two_plane
[17:38:10] [PASSED] drm_test_format_block_width_three_plane
[17:38:10] [PASSED] drm_test_format_block_width_tiled
[17:38:10] [PASSED] drm_test_format_block_height_invalid
[17:38:10] [PASSED] drm_test_format_block_height_one_plane
[17:38:10] [PASSED] drm_test_format_block_height_two_plane
[17:38:10] [PASSED] drm_test_format_block_height_three_plane
[17:38:10] [PASSED] drm_test_format_block_height_tiled
[17:38:10] [PASSED] drm_test_format_min_pitch_invalid
[17:38:10] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[17:38:10] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[17:38:10] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[17:38:10] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[17:38:10] [PASSED] drm_test_format_min_pitch_two_plane
[17:38:10] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[17:38:10] [PASSED] drm_test_format_min_pitch_tiled
[17:38:10] =================== [PASSED] drm_format ====================
[17:38:10] ============== drm_framebuffer (10 subtests) ===============
[17:38:10] ========== drm_test_framebuffer_check_src_coords  ==========
[17:38:10] [PASSED] Success: source fits into fb
[17:38:10] [PASSED] Fail: overflowing fb with x-axis coordinate
[17:38:10] [PASSED] Fail: overflowing fb with y-axis coordinate
[17:38:10] [PASSED] Fail: overflowing fb with source width
[17:38:10] [PASSED] Fail: overflowing fb with source height
[17:38:10] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[17:38:10] [PASSED] drm_test_framebuffer_cleanup
[17:38:10] =============== drm_test_framebuffer_create  ===============
[17:38:10] [PASSED] ABGR8888 normal sizes
[17:38:10] [PASSED] ABGR8888 max sizes
[17:38:10] [PASSED] ABGR8888 pitch greater than min required
[17:38:10] [PASSED] ABGR8888 pitch less than min required
[17:38:10] [PASSED] ABGR8888 Invalid width
[17:38:10] [PASSED] ABGR8888 Invalid buffer handle
[17:38:10] [PASSED] No pixel format
[17:38:10] [PASSED] ABGR8888 Width 0
[17:38:10] [PASSED] ABGR8888 Height 0
[17:38:10] [PASSED] ABGR8888 Out of bound height * pitch combination
[17:38:10] [PASSED] ABGR8888 Large buffer offset
[17:38:10] [PASSED] ABGR8888 Buffer offset for inexistent plane
[17:38:10] [PASSED] ABGR8888 Invalid flag
[17:38:10] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[17:38:10] [PASSED] ABGR8888 Valid buffer modifier
[17:38:10] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[17:38:10] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[17:38:10] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[17:38:10] [PASSED] NV12 Normal sizes
[17:38:10] [PASSED] NV12 Max sizes
[17:38:10] [PASSED] NV12 Invalid pitch
[17:38:10] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[17:38:10] [PASSED] NV12 different  modifier per-plane
[17:38:10] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[17:38:10] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[17:38:10] [PASSED] NV12 Modifier for inexistent plane
[17:38:10] [PASSED] NV12 Handle for inexistent plane
[17:38:10] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[17:38:10] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[17:38:10] [PASSED] YVU420 Normal sizes
[17:38:10] [PASSED] YVU420 Max sizes
[17:38:10] [PASSED] YVU420 Invalid pitch
[17:38:10] [PASSED] YVU420 Different pitches
[17:38:10] [PASSED] YVU420 Different buffer offsets/pitches
[17:38:10] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[17:38:10] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[17:38:10] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[17:38:10] [PASSED] YVU420 Valid modifier
[17:38:10] [PASSED] YVU420 Different modifiers per plane
[17:38:10] [PASSED] YVU420 Modifier for inexistent plane
[17:38:10] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[17:38:10] [PASSED] X0L2 Normal sizes
[17:38:10] [PASSED] X0L2 Max sizes
[17:38:10] [PASSED] X0L2 Invalid pitch
[17:38:10] [PASSED] X0L2 Pitch greater than minimum required
[17:38:10] [PASSED] X0L2 Handle for inexistent plane
[17:38:10] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[17:38:10] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[17:38:10] [PASSED] X0L2 Valid modifier
[17:38:10] [PASSED] X0L2 Modifier for inexistent plane
[17:38:10] =========== [PASSED] drm_test_framebuffer_create ===========
[17:38:10] [PASSED] drm_test_framebuffer_free
[17:38:10] [PASSED] drm_test_framebuffer_init
[17:38:10] [PASSED] drm_test_framebuffer_init_bad_format
[17:38:10] [PASSED] drm_test_framebuffer_init_dev_mismatch
[17:38:10] [PASSED] drm_test_framebuffer_lookup
[17:38:10] [PASSED] drm_test_framebuffer_lookup_inexistent
[17:38:10] [PASSED] drm_test_framebuffer_modifiers_not_supported
[17:38:10] ================= [PASSED] drm_framebuffer =================
[17:38:10] ================ drm_gem_shmem (8 subtests) ================
[17:38:10] [PASSED] drm_gem_shmem_test_obj_create
[17:38:10] [PASSED] drm_gem_shmem_test_obj_create_private
[17:38:10] [PASSED] drm_gem_shmem_test_pin_pages
[17:38:10] [PASSED] drm_gem_shmem_test_vmap
[17:38:10] [PASSED] drm_gem_shmem_test_get_sg_table
[17:38:10] [PASSED] drm_gem_shmem_test_get_pages_sgt
[17:38:10] [PASSED] drm_gem_shmem_test_madvise
[17:38:10] [PASSED] drm_gem_shmem_test_purge
[17:38:10] ================== [PASSED] drm_gem_shmem ==================
[17:38:10] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[17:38:10] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[17:38:10] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[17:38:10] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[17:38:10] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[17:38:10] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[17:38:10] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[17:38:10] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[17:38:10] [PASSED] Automatic
[17:38:10] [PASSED] Full
[17:38:10] [PASSED] Limited 16:235
[17:38:10] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[17:38:10] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[17:38:10] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[17:38:10] [PASSED] drm_test_check_disable_connector
[17:38:10] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[17:38:10] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[17:38:10] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[17:38:10] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[17:38:10] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[17:38:10] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[17:38:10] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[17:38:10] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[17:38:10] [PASSED] drm_test_check_output_bpc_dvi
[17:38:10] [PASSED] drm_test_check_output_bpc_format_vic_1
[17:38:10] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[17:38:10] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[17:38:10] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[17:38:10] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[17:38:10] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[17:38:10] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[17:38:10] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[17:38:10] ============ drm_test_check_hdmi_color_format  =============
[17:38:10] [PASSED] AUTO -> RGB
[17:38:10] [PASSED] YCBCR422 -> YUV422
[17:38:10] [PASSED] YCBCR420 -> YUV420
[17:38:10] [PASSED] YCBCR444 -> YUV444
[17:38:10] [PASSED] RGB -> RGB
[17:38:10] ======== [PASSED] drm_test_check_hdmi_color_format =========
[17:38:10] ======== drm_test_check_hdmi_color_format_420_only  ========
[17:38:10] [PASSED] RGB should fail
[17:38:10] [PASSED] YUV444 should fail
[17:38:10] [PASSED] YUV422 should fail
[17:38:10] [PASSED] YUV420 should work
[17:38:10] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[17:38:10] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[17:38:10] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[17:38:10] [PASSED] drm_test_check_broadcast_rgb_value
[17:38:10] [PASSED] drm_test_check_bpc_8_value
[17:38:10] [PASSED] drm_test_check_bpc_10_value
[17:38:10] [PASSED] drm_test_check_bpc_12_value
[17:38:10] [PASSED] drm_test_check_format_value
[17:38:10] [PASSED] drm_test_check_tmds_char_value
[17:38:10] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[17:38:10] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[17:38:10] [PASSED] drm_test_check_mode_valid
[17:38:10] [PASSED] drm_test_check_mode_valid_reject
[17:38:10] [PASSED] drm_test_check_mode_valid_reject_rate
[17:38:10] [PASSED] drm_test_check_mode_valid_reject_max_clock
[17:38:10] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[17:38:10] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[17:38:10] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[17:38:10] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[17:38:10] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[17:38:10] [PASSED] drm_test_check_infoframes
[17:38:10] [PASSED] drm_test_check_reject_avi_infoframe
[17:38:10] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[17:38:10] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[17:38:10] [PASSED] drm_test_check_reject_audio_infoframe
[17:38:10] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[17:38:10] ================= drm_managed (2 subtests) =================
[17:38:10] [PASSED] drm_test_managed_release_action
[17:38:10] [PASSED] drm_test_managed_run_action
[17:38:10] =================== [PASSED] drm_managed ===================
[17:38:10] =================== drm_mm (6 subtests) ====================
[17:38:10] [PASSED] drm_test_mm_init
[17:38:10] [PASSED] drm_test_mm_debug
[17:38:10] [PASSED] drm_test_mm_align32
[17:38:10] [PASSED] drm_test_mm_align64
[17:38:10] [PASSED] drm_test_mm_lowest
[17:38:10] [PASSED] drm_test_mm_highest
[17:38:10] ===================== [PASSED] drm_mm ======================
[17:38:10] ============= drm_modes_analog_tv (5 subtests) =============
[17:38:10] [PASSED] drm_test_modes_analog_tv_mono_576i
[17:38:10] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[17:38:10] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[17:38:10] [PASSED] drm_test_modes_analog_tv_pal_576i
[17:38:10] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[17:38:10] =============== [PASSED] drm_modes_analog_tv ===============
[17:38:10] ============== drm_plane_helper (2 subtests) ===============
[17:38:10] =============== drm_test_check_plane_state  ================
[17:38:10] [PASSED] clipping_simple
[17:38:10] [PASSED] clipping_rotate_reflect
[17:38:10] [PASSED] positioning_simple
[17:38:10] [PASSED] upscaling
[17:38:10] [PASSED] downscaling
[17:38:10] [PASSED] rounding1
[17:38:10] [PASSED] rounding2
[17:38:10] [PASSED] rounding3
[17:38:10] [PASSED] rounding4
[17:38:10] =========== [PASSED] drm_test_check_plane_state ============
[17:38:10] =========== drm_test_check_invalid_plane_state  ============
[17:38:10] [PASSED] positioning_invalid
[17:38:10] [PASSED] upscaling_invalid
[17:38:10] [PASSED] downscaling_invalid
[17:38:10] ======= [PASSED] drm_test_check_invalid_plane_state ========
[17:38:10] ================ [PASSED] drm_plane_helper =================
[17:38:10] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[17:38:10] ====== drm_test_connector_helper_tv_get_modes_check  =======
[17:38:10] [PASSED] None
[17:38:10] [PASSED] PAL
[17:38:10] [PASSED] NTSC
[17:38:10] [PASSED] Both, NTSC Default
[17:38:10] [PASSED] Both, PAL Default
[17:38:10] [PASSED] Both, NTSC Default, with PAL on command-line
[17:38:10] [PASSED] Both, PAL Default, with NTSC on command-line
[17:38:10] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[17:38:10] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[17:38:10] ================== drm_rect (9 subtests) ===================
[17:38:10] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[17:38:10] [PASSED] drm_test_rect_clip_scaled_not_clipped
[17:38:10] [PASSED] drm_test_rect_clip_scaled_clipped
[17:38:10] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[17:38:10] ================= drm_test_rect_intersect  =================
[17:38:10] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[17:38:10] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[17:38:10] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[17:38:10] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[17:38:10] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[17:38:10] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[17:38:10] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[17:38:10] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[17:38:10] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[17:38:10] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[17:38:10] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[17:38:10] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[17:38:10] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[17:38:10] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[17:38:10] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[17:38:10] ============= [PASSED] drm_test_rect_intersect =============
[17:38:10] ================ drm_test_rect_calc_hscale  ================
[17:38:10] [PASSED] normal use
[17:38:10] [PASSED] out of max range
[17:38:10] [PASSED] out of min range
[17:38:10] [PASSED] zero dst
[17:38:10] [PASSED] negative src
[17:38:10] [PASSED] negative dst
[17:38:10] ============ [PASSED] drm_test_rect_calc_hscale ============
[17:38:10] ================ drm_test_rect_calc_vscale  ================
[17:38:10] [PASSED] normal use
[17:38:10] [PASSED] out of max range
[17:38:10] [PASSED] out of min range
[17:38:10] [PASSED] zero dst
[17:38:10] [PASSED] negative src
[17:38:10] [PASSED] negative dst
[17:38:10] ============ [PASSED] drm_test_rect_calc_vscale ============
[17:38:10] ================== drm_test_rect_rotate  ===================
[17:38:10] [PASSED] reflect-x
[17:38:10] [PASSED] reflect-y
[17:38:10] [PASSED] rotate-0
[17:38:10] [PASSED] rotate-90
[17:38:10] [PASSED] rotate-180
[17:38:10] [PASSED] rotate-270
[17:38:10] ============== [PASSED] drm_test_rect_rotate ===============
[17:38:10] ================ drm_test_rect_rotate_inv  =================
[17:38:10] [PASSED] reflect-x
[17:38:10] [PASSED] reflect-y
[17:38:10] [PASSED] rotate-0
[17:38:10] [PASSED] rotate-90
[17:38:10] [PASSED] rotate-180
[17:38:10] [PASSED] rotate-270
[17:38:10] ============ [PASSED] drm_test_rect_rotate_inv =============
[17:38:10] ==================== [PASSED] drm_rect =====================
[17:38:10] ============ drm_sysfb_modeset_test (1 subtest) ============
[17:38:10] ============ drm_test_sysfb_build_fourcc_list  =============
[17:38:10] [PASSED] no native formats
[17:38:10] [PASSED] XRGB8888 as native format
[17:38:10] [PASSED] remove duplicates
[17:38:10] [PASSED] convert alpha formats
[17:38:10] [PASSED] random formats
[17:38:10] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[17:38:10] ============= [PASSED] drm_sysfb_modeset_test ==============
[17:38:10] ================== drm_fixp (2 subtests) ===================
[17:38:10] [PASSED] drm_test_int2fixp
[17:38:10] [PASSED] drm_test_sm2fixp
[17:38:10] ==================== [PASSED] drm_fixp =====================
[17:38:10] ============================================================
[17:38:10] Testing complete. Ran 641 tests: passed: 641
[17:38:10] Elapsed time: 26.918s total, 1.822s configuring, 24.932s building, 0.143s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[17:38:10] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[17:38:12] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[17:38:22] Starting KUnit Kernel (1/1)...
[17:38:22] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[17:38:22] ============= refcount_interrupt (4 subtests) ==============
[17:38:22] [PASSED] test_single_irq_change
[17:38:22] [PASSED] test_nested_irq_change
[17:38:22] [PASSED] test_multiple_irq_change
[17:38:22] [PASSED] test_irq_save
[17:38:22] =============== [PASSED] refcount_interrupt ================
[17:38:22] ================= ttm_device (5 subtests) ==================
[17:38:22] [PASSED] ttm_device_init_basic
[17:38:22] [PASSED] ttm_device_init_multiple
[17:38:22] [PASSED] ttm_device_fini_basic
[17:38:22] [PASSED] ttm_device_init_no_vma_man
[17:38:22] ================== ttm_device_init_pools  ==================
[17:38:22] [PASSED] No DMA allocations, no DMA32 required
[17:38:22] [PASSED] DMA allocations, DMA32 required
[17:38:22] [PASSED] No DMA allocations, DMA32 required
[17:38:22] [PASSED] DMA allocations, no DMA32 required
[17:38:22] ============== [PASSED] ttm_device_init_pools ==============
[17:38:22] =================== [PASSED] ttm_device ====================
[17:38:22] ================== ttm_pool (8 subtests) ===================
[17:38:22] ================== ttm_pool_alloc_basic  ===================
[17:38:22] [PASSED] One page
[17:38:22] [PASSED] More than one page
[17:38:22] [PASSED] Above the allocation limit
[17:38:22] [PASSED] One page, with coherent DMA mappings enabled
[17:38:22] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[17:38:22] ============== [PASSED] ttm_pool_alloc_basic ===============
[17:38:22] ============== ttm_pool_alloc_basic_dma_addr  ==============
[17:38:22] [PASSED] One page
[17:38:22] [PASSED] More than one page
[17:38:22] [PASSED] Above the allocation limit
[17:38:22] [PASSED] One page, with coherent DMA mappings enabled
[17:38:22] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[17:38:22] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[17:38:22] [PASSED] ttm_pool_alloc_order_caching_match
[17:38:22] [PASSED] ttm_pool_alloc_caching_mismatch
[17:38:22] [PASSED] ttm_pool_alloc_order_mismatch
[17:38:22] [PASSED] ttm_pool_free_dma_alloc
[17:38:22] [PASSED] ttm_pool_free_no_dma_alloc
[17:38:22] [PASSED] ttm_pool_fini_basic
[17:38:22] ==================== [PASSED] ttm_pool =====================
[17:38:22] ================ ttm_resource (8 subtests) =================
[17:38:22] ================= ttm_resource_init_basic  =================
[17:38:22] [PASSED] Init resource in TTM_PL_SYSTEM
[17:38:22] [PASSED] Init resource in TTM_PL_VRAM
[17:38:22] [PASSED] Init resource in a private placement
[17:38:22] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[17:38:22] ============= [PASSED] ttm_resource_init_basic =============
[17:38:22] [PASSED] ttm_resource_init_pinned
[17:38:22] [PASSED] ttm_resource_fini_basic
[17:38:22] [PASSED] ttm_resource_manager_init_basic
[17:38:22] [PASSED] ttm_resource_manager_usage_basic
[17:38:22] [PASSED] ttm_resource_manager_set_used_basic
[17:38:22] [PASSED] ttm_sys_man_alloc_basic
[17:38:22] [PASSED] ttm_sys_man_free_basic
[17:38:22] ================== [PASSED] ttm_resource ===================
[17:38:22] =================== ttm_tt (15 subtests) ===================
[17:38:22] ==================== ttm_tt_init_basic  ====================
[17:38:22] [PASSED] Page-aligned size
[17:38:22] [PASSED] Extra pages requested
[17:38:22] ================ [PASSED] ttm_tt_init_basic ================
[17:38:22] [PASSED] ttm_tt_init_misaligned
[17:38:22] [PASSED] ttm_tt_fini_basic
[17:38:22] [PASSED] ttm_tt_fini_sg
[17:38:22] [PASSED] ttm_tt_fini_shmem
[17:38:22] [PASSED] ttm_tt_create_basic
[17:38:22] [PASSED] ttm_tt_create_invalid_bo_type
[17:38:22] [PASSED] ttm_tt_create_ttm_exists
[17:38:22] [PASSED] ttm_tt_create_failed
[17:38:22] [PASSED] ttm_tt_destroy_basic
[17:38:22] [PASSED] ttm_tt_populate_null_ttm
[17:38:22] [PASSED] ttm_tt_populate_populated_ttm
[17:38:22] [PASSED] ttm_tt_unpopulate_basic
[17:38:22] [PASSED] ttm_tt_unpopulate_empty_ttm
[17:38:22] [PASSED] ttm_tt_swapin_basic
[17:38:22] ===================== [PASSED] ttm_tt ======================
[17:38:22] =================== ttm_bo (14 subtests) ===================
[17:38:22] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[17:38:22] [PASSED] Cannot be interrupted and sleeps
[17:38:22] [PASSED] Cannot be interrupted, locks straight away
[17:38:22] [PASSED] Can be interrupted, sleeps
[17:38:22] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[17:38:22] [PASSED] ttm_bo_reserve_locked_no_sleep
[17:38:22] [PASSED] ttm_bo_reserve_no_wait_ticket
[17:38:22] [PASSED] ttm_bo_reserve_double_resv
[17:38:22] [PASSED] ttm_bo_reserve_interrupted
[17:38:22] [PASSED] ttm_bo_reserve_deadlock
[17:38:22] [PASSED] ttm_bo_unreserve_basic
[17:38:22] [PASSED] ttm_bo_unreserve_pinned
[17:38:22] [PASSED] ttm_bo_unreserve_bulk
[17:38:22] [PASSED] ttm_bo_fini_basic
[17:38:22] [PASSED] ttm_bo_fini_shared_resv
[17:38:22] [PASSED] ttm_bo_pin_basic
[17:38:22] [PASSED] ttm_bo_pin_unpin_resource
[17:38:22] [PASSED] ttm_bo_multiple_pin_one_unpin
[17:38:22] ===================== [PASSED] ttm_bo ======================
[17:38:22] ============== ttm_bo_validate (22 subtests) ===============
[17:38:22] ============== ttm_bo_init_reserved_sys_man  ===============
[17:38:22] [PASSED] Buffer object for userspace
[17:38:22] [PASSED] Kernel buffer object
[17:38:22] [PASSED] Shared buffer object
[17:38:22] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[17:38:22] ============== ttm_bo_init_reserved_mock_man  ==============
[17:38:22] [PASSED] Buffer object for userspace
[17:38:22] [PASSED] Kernel buffer object
[17:38:22] [PASSED] Shared buffer object
[17:38:22] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[17:38:22] [PASSED] ttm_bo_init_reserved_resv
[17:38:22] ================== ttm_bo_validate_basic  ==================
[17:38:22] [PASSED] Buffer object for userspace
[17:38:22] [PASSED] Kernel buffer object
[17:38:22] [PASSED] Shared buffer object
[17:38:22] ============== [PASSED] ttm_bo_validate_basic ==============
[17:38:22] [PASSED] ttm_bo_validate_invalid_placement
[17:38:22] ============= ttm_bo_validate_same_placement  ==============
[17:38:22] [PASSED] System manager
[17:38:22] [PASSED] VRAM manager
[17:38:22] ========= [PASSED] ttm_bo_validate_same_placement ==========
[17:38:22] [PASSED] ttm_bo_validate_failed_alloc
[17:38:22] [PASSED] ttm_bo_validate_pinned
[17:38:22] [PASSED] ttm_bo_validate_busy_placement
[17:38:22] ================ ttm_bo_validate_multihop  =================
[17:38:22] [PASSED] Buffer object for userspace
[17:38:22] [PASSED] Kernel buffer object
[17:38:22] [PASSED] Shared buffer object
[17:38:22] ============ [PASSED] ttm_bo_validate_multihop =============
[17:38:22] ========== ttm_bo_validate_no_placement_signaled  ==========
[17:38:22] [PASSED] Buffer object in system domain, no page vector
[17:38:22] [PASSED] Buffer object in system domain with an existing page vector
[17:38:22] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[17:38:22] ======== ttm_bo_validate_no_placement_not_signaled  ========
[17:38:22] [PASSED] Buffer object for userspace
[17:38:22] [PASSED] Kernel buffer object
[17:38:22] [PASSED] Shared buffer object
[17:38:22] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[17:38:22] [PASSED] ttm_bo_validate_move_fence_signaled
[17:38:22] ========= ttm_bo_validate_move_fence_not_signaled  =========
[17:38:22] [PASSED] Waits for GPU
[17:38:22] [PASSED] Tries to lock straight away
[17:38:22] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[17:38:22] [PASSED] ttm_bo_validate_swapout
[17:38:22] [PASSED] ttm_bo_validate_happy_evict
[17:38:22] [PASSED] ttm_bo_validate_all_pinned_evict
[17:38:22] [PASSED] ttm_bo_validate_allowed_only_evict
[17:38:22] [PASSED] ttm_bo_validate_deleted_evict
[17:38:22] [PASSED] ttm_bo_validate_busy_domain_evict
[17:38:22] [PASSED] ttm_bo_validate_evict_gutting
[17:38:22] [PASSED] ttm_bo_validate_recrusive_evict
[17:38:22] ================= [PASSED] ttm_bo_validate =================
[17:38:22] ============================================================
[17:38:22] Testing complete. Ran 106 tests: passed: 106
[17:38:22] Elapsed time: 11.814s total, 1.695s configuring, 9.904s building, 0.182s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[17:38:22] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[17:38:24] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[17:38:32] Starting KUnit Kernel (1/1)...
[17:38:32] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[17:38:32] ============= refcount_interrupt (4 subtests) ==============
[17:38:32] [PASSED] test_single_irq_change
[17:38:32] [PASSED] test_nested_irq_change
[17:38:32] [PASSED] test_multiple_irq_change
[17:38:32] [PASSED] test_irq_save
[17:38:32] =============== [PASSED] refcount_interrupt ================
[17:38:32] =============== dma-buf-fence (12 subtests) ================
[17:38:32] [PASSED] test_sanitycheck
[17:38:32] [PASSED] test_signaling
[17:38:32] [PASSED] test_add_callback
[17:38:32] [PASSED] test_late_add_callback
[17:38:32] [PASSED] test_rm_callback
[17:38:32] [PASSED] test_late_rm_callback
[17:38:32] [PASSED] test_status
[17:38:32] [PASSED] test_error
[17:38:33] [PASSED] test_wait
[17:38:33] [PASSED] test_wait_timeout
[17:38:33] [PASSED] test_stub
[17:38:33] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[17:38:33] ================== [PASSED] dma-buf-fence ==================
[17:38:33] ============ dma-buf-fence-chain (11 subtests) =============
[17:38:33] [PASSED] test_sanitycheck
[17:38:33] [PASSED] test_find_seqno
[17:38:33] [PASSED] test_find_signaled
[17:38:33] [PASSED] test_find_out_of_order
[17:38:38] [PASSED] test_find_gap
[17:38:38] [PASSED] test_find_race
[17:38:38] [PASSED] test_signal_forward
[17:38:38] [PASSED] test_signal_backward
[17:38:38] [PASSED] test_wait_forward
[17:38:38] [PASSED] test_wait_backward
[17:38:38] [PASSED] test_wait_random
[17:38:38] =============== [PASSED] dma-buf-fence-chain ===============
[17:38:38] ============ dma-buf-fence-unwrap (10 subtests) ============
[17:38:38] [PASSED] test_sanitycheck
[17:38:38] [PASSED] test_unwrap_array
[17:38:38] [PASSED] test_unwrap_chain
[17:38:38] [PASSED] test_unwrap_chain_array
[17:38:38] [PASSED] test_unwrap_merge
[17:38:38] [PASSED] test_unwrap_merge_duplicate
[17:38:38] [PASSED] test_unwrap_merge_seqno
[17:38:38] [PASSED] test_unwrap_merge_order
[17:38:38] [PASSED] test_unwrap_merge_complex
[17:38:38] [PASSED] test_unwrap_merge_complex_seqno
[17:38:38] ============== [PASSED] dma-buf-fence-unwrap ===============
[17:38:38] ================ dma-buf-resv (5 subtests) =================
[17:38:38] [PASSED] test_sanitycheck
[17:38:38] ===================== test_signaling  ======================
[17:38:38] [PASSED] kernel
[17:38:38] [PASSED] write
[17:38:38] [PASSED] read
[17:38:38] [PASSED] bookkeep
[17:38:38] ================= [PASSED] test_signaling ==================
[17:38:38] ====================== test_for_each  ======================
[17:38:38] [PASSED] kernel
[17:38:38] [PASSED] write
[17:38:38] [PASSED] read
[17:38:38] [PASSED] bookkeep
[17:38:38] ================== [PASSED] test_for_each ==================
[17:38:38] ================= test_for_each_unlocked  ==================
[17:38:38] [PASSED] kernel
[17:38:38] [PASSED] write
[17:38:38] [PASSED] read
[17:38:38] [PASSED] bookkeep
[17:38:38] ============= [PASSED] test_for_each_unlocked ==============
[17:38:38] ===================== test_get_fences  =====================
[17:38:38] [PASSED] kernel
[17:38:38] [PASSED] write
[17:38:38] [PASSED] read
[17:38:38] [PASSED] bookkeep
[17:38:38] ================= [PASSED] test_get_fences =================
[17:38:38] ================== [PASSED] dma-buf-resv ===================
[17:38:38] ============================================================
[17:38:38] Testing complete. Ran 54 tests: passed: 53, skipped: 1
[17:38:38] Elapsed time: 15.745s total, 1.795s configuring, 8.628s building, 5.284s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms (rev7)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 1960 bytes --]

== Series Details ==

Series: drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms (rev7)
URL   : https://patchwork.freedesktop.org/series/167706/
State : success

== Summary ==

CI Bug Log - changes from xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d_BAT -> xe-pw-167706v7_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (14 -> 14)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-167706v7_BAT that come from known issues:

### IGT changes ###

#### Possible fixes ####

  * igt@core_hotunplug@unbind-rebind:
    - bat-bmg-2:          [ABORT][1] ([Intel XE#8007]) -> [PASS][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/bat-bmg-2/igt@core_hotunplug@unbind-rebind.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/bat-bmg-2/igt@core_hotunplug@unbind-rebind.html

  * igt@xe_waitfence@reltime:
    - bat-wcl-1:          [FAIL][3] ([Intel XE#9115]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/bat-wcl-1/igt@xe_waitfence@reltime.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/bat-wcl-1/igt@xe_waitfence@reltime.html

  
  [Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
  [Intel XE#9115]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9115


Build changes
-------------

  * Linux: xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d -> xe-pw-167706v7

  IGT_9086: a89061ecccede222b8da2f310f3bf71ed908c365 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d: 5cb17454a3e04fcc1133d87451c9c582c297e92d
  xe-pw-167706v7: 167706v7

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/index.html

[-- Attachment #2: Type: text/html, Size: 2559 bytes --]

✓ Xe.CI.FULL: success for drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms (rev7)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 62702 bytes --]

== Series Details ==

Series: drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms (rev7)
URL   : https://patchwork.freedesktop.org/series/167706/
State : success

== Summary ==

CI Bug Log - changes from xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d_FULL -> xe-pw-167706v7_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-167706v7_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_async_flips@alternate-sync-async-flip:
    - shard-bmg:          [PASS][1] -> [FAIL][2] ([Intel XE#3718] / [Intel XE#6078])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-bmg-7/igt@kms_async_flips@alternate-sync-async-flip.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-bmg-9/igt@kms_async_flips@alternate-sync-async-flip.html

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-a-dp-2:
    - shard-bmg:          [PASS][3] -> [FAIL][4] ([Intel XE#6078])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-bmg-7/igt@kms_async_flips@alternate-sync-async-flip@pipe-a-dp-2.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-bmg-9/igt@kms_async_flips@alternate-sync-async-flip@pipe-a-dp-2.html

  * igt@kms_big_fb@yf-tiled-32bpp-rotate-0:
    - shard-bmg:          NOTRUN -> [SKIP][5] ([Intel XE#1124])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-bmg-9/igt@kms_big_fb@yf-tiled-32bpp-rotate-0.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-d-dp-2:
    - shard-bmg:          [PASS][6] -> [INCOMPLETE][7] ([Intel XE#7084] / [Intel XE#8150])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-bmg-10/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-d-dp-2.html
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-bmg-2/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-d-dp-2.html

  * igt@kms_chamelium_hpd@dp-hpd-for-each-pipe:
    - shard-bmg:          NOTRUN -> [SKIP][8] ([Intel XE#2252])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-bmg-9/igt@kms_chamelium_hpd@dp-hpd-for-each-pipe.html

  * igt@kms_color@ctm-signed:
    - shard-lnl:          [PASS][9] -> [SKIP][10] ([Intel XE#3297])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-3/igt@kms_color@ctm-signed.html
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_color@ctm-signed.html

  * igt@kms_content_protection@atomic:
    - shard-bmg:          NOTRUN -> [FAIL][11] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) +1 other test fail
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-bmg-9/igt@kms_content_protection@atomic.html

  * igt@kms_cursor_crc@cursor-rapid-movement-32x10:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#2320])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-bmg-9/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html

  * igt@kms_cursor_legacy@short-flip-before-cursor-atomic-transitions-varying-size:
    - shard-lnl:          [PASS][13] -> [SKIP][14] ([Intel XE#9125]) +21 other tests skip
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-3/igt@kms_cursor_legacy@short-flip-before-cursor-atomic-transitions-varying-size.html
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_cursor_legacy@short-flip-before-cursor-atomic-transitions-varying-size.html

  * igt@kms_dp_aux_dev@basic:
    - shard-lnl:          [PASS][15] -> [SKIP][16] ([Intel XE#3009])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-3/igt@kms_dp_aux_dev@basic.html
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_dp_aux_dev@basic.html

  * igt@kms_dsc@dsc-fractional-bpp-ultrajoiner:
    - shard-bmg:          NOTRUN -> [SKIP][17] ([Intel XE#8265])
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-bmg-9/igt@kms_dsc@dsc-fractional-bpp-ultrajoiner.html

  * igt@kms_feature_discovery@dsc:
    - shard-bmg:          NOTRUN -> [SKIP][18] ([Intel XE#8586])
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-bmg-9/igt@kms_feature_discovery@dsc.html

  * igt@kms_flip@2x-plain-flip-fb-recreate-interruptible:
    - shard-bmg:          [PASS][19] -> [FAIL][20] ([Intel XE#3098] / [Intel XE#3149]) +1 other test fail
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-bmg-2/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-bmg-4/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html

  * igt@kms_flip@basic-flip-vs-modeset:
    - shard-lnl:          [PASS][21] -> [SKIP][22] ([Intel XE#2482]) +1 other test skip
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-3/igt@kms_flip@basic-flip-vs-modeset.html
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_flip@basic-flip-vs-modeset.html

  * igt@kms_flip@flip-vs-dpms-on-nop:
    - shard-lnl:          [PASS][23] -> [SKIP][24] ([Intel XE#9132])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-3/igt@kms_flip@flip-vs-dpms-on-nop.html
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_flip@flip-vs-dpms-on-nop.html

  * igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling@pipe-a-default-mode:
    - shard-lnl:          NOTRUN -> [SKIP][25] ([Intel XE#1397] / [Intel XE#7385] / [Intel XE#9144])
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-2/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling@pipe-a-default-mode.html

  * igt@kms_frontbuffer_tracking@drrshdr-2p-primscrn-cur-indfb-onoff:
    - shard-bmg:          NOTRUN -> [SKIP][26] ([Intel XE#2311]) +3 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-bmg-9/igt@kms_frontbuffer_tracking@drrshdr-2p-primscrn-cur-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-render:
    - shard-lnl:          [PASS][27] -> [SKIP][28] ([Intel XE#2548] / [Intel XE#7779]) +6 other tests skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-render.html
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-fullscreen:
    - shard-bmg:          NOTRUN -> [SKIP][29] ([Intel XE#4141])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-bmg-9/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-wc:
    - shard-lnl:          [PASS][30] -> [SKIP][31] ([Intel XE#7779])
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-7/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-wc.html
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-pri-shrfb-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][32] ([Intel XE#2313]) +5 other tests skip
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-bmg-9/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-pri-shrfb-draw-render.html

  * igt@kms_hdr@invalid-hdr:
    - shard-bmg:          [PASS][33] -> [SKIP][34] ([Intel XE#1503])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-bmg-6/igt@kms_hdr@invalid-hdr.html
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-bmg-1/igt@kms_hdr@invalid-hdr.html

  * igt@kms_invalid_mode@uint-max-clock:
    - shard-lnl:          [PASS][35] -> [SKIP][36] ([Intel XE#2568]) +1 other test skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-3/igt@kms_invalid_mode@uint-max-clock.html
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_invalid_mode@uint-max-clock.html

  * igt@kms_plane_scaling@invalid-parameters:
    - shard-lnl:          [PASS][37] -> [SKIP][38] ([Intel XE#7687] / [Intel XE#9125])
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-3/igt@kms_plane_scaling@invalid-parameters.html
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_plane_scaling@invalid-parameters.html

  * igt@kms_pm_dc@dc3co-framedrop-check@pr-xrgb8888:
    - shard-bmg:          NOTRUN -> [SKIP][39] ([Intel XE#8395] / [Intel XE#8396]) +1 other test skip
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-bmg-9/igt@kms_pm_dc@dc3co-framedrop-check@pr-xrgb8888.html

  * igt@kms_pm_dc@dc3co-framedrop-check@psr2-xrgb8888:
    - shard-bmg:          NOTRUN -> [SKIP][40] ([Intel XE#8396]) +1 other test skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-bmg-9/igt@kms_pm_dc@dc3co-framedrop-check@psr2-xrgb8888.html

  * igt@kms_pm_dc@dc5-dpms-suspend-resume:
    - shard-lnl:          [PASS][41] -> [FAIL][42] ([Intel XE#8399])
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-7/igt@kms_pm_dc@dc5-dpms-suspend-resume.html
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_pm_dc@dc5-dpms-suspend-resume.html

  * igt@kms_pm_rpm@dpms-lpsp:
    - shard-lnl:          [PASS][43] -> [SKIP][44] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#7383] / [Intel XE#836])
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-3/igt@kms_pm_rpm@dpms-lpsp.html
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_pm_rpm@dpms-lpsp.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf@pipe-a-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][45] ([Intel XE#4608]) +1 other test skip
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-8/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf@pipe-a-edp-1.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-primary-update-sf-dmg-area@pipe-b-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][46] ([Intel XE#4608] / [Intel XE#7304]) +1 other test skip
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-2/igt@kms_psr2_sf@fbc-psr2-overlay-primary-update-sf-dmg-area@pipe-b-edp-1.html

  * igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area:
    - shard-bmg:          NOTRUN -> [SKIP][47] ([Intel XE#1489])
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-bmg-9/igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area.html

  * igt@kms_psr2_sf@psr2-plane-move-sf-dmg-area:
    - shard-lnl:          [PASS][48] -> [SKIP][49] ([Intel XE#1489]) +1 other test skip
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-7/igt@kms_psr2_sf@psr2-plane-move-sf-dmg-area.html
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_psr2_sf@psr2-plane-move-sf-dmg-area.html

  * igt@kms_psr@fbc-pr-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][50] ([Intel XE#2234] / [Intel XE#2850]) +1 other test skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-bmg-9/igt@kms_psr@fbc-pr-suspend.html

  * igt@kms_psr@fbc-psr2-suspend@edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][51] ([Intel XE#1406] / [Intel XE#4609] / [Intel XE#7345])
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-2/igt@kms_psr@fbc-psr2-suspend@edp-1.html

  * igt@kms_psr@psr2-suspend:
    - shard-lnl:          [PASS][52] -> [SKIP][53] ([Intel XE#2850] / [Intel XE#929])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-3/igt@kms_psr@psr2-suspend.html
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_psr@psr2-suspend.html

  * igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
    - shard-lnl:          [PASS][54] -> [SKIP][55] ([Intel XE#7795])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-3/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html

  * igt@kms_sharpness_filter@filter-strength:
    - shard-bmg:          NOTRUN -> [SKIP][56] ([Intel XE#6503])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-bmg-9/igt@kms_sharpness_filter@filter-strength.html

  * igt@xe_evict@evict-mixed-many-threads-small:
    - shard-bmg:          [PASS][57] -> [INCOMPLETE][58] ([Intel XE#6321] / [Intel XE#8355])
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-bmg-8/igt@xe_evict@evict-mixed-many-threads-small.html
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-bmg-2/igt@xe_evict@evict-mixed-many-threads-small.html

  * igt@xe_exec_fault_mode@twice-multi-queue-userptr-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][59] ([Intel XE#8374]) +1 other test skip
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-bmg-9/igt@xe_exec_fault_mode@twice-multi-queue-userptr-prefetch.html

  * igt@xe_exec_multi_queue@max-queues-userptr-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][60] ([Intel XE#8364]) +4 other tests skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-bmg-9/igt@xe_exec_multi_queue@max-queues-userptr-invalidate.html

  * igt@xe_fault_injection@inject-fault-probe-function-xe_guc_relay_init:
    - shard-bmg:          [PASS][61] -> [ABORT][62] ([Intel XE#8007]) +2 other tests abort
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-bmg-7/igt@xe_fault_injection@inject-fault-probe-function-xe_guc_relay_init.html
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-bmg-10/igt@xe_fault_injection@inject-fault-probe-function-xe_guc_relay_init.html

  * igt@xe_pxp@pxp-stale-bo-exec-post-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][63] ([Intel XE#4733] / [Intel XE#7417])
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-bmg-9/igt@xe_pxp@pxp-stale-bo-exec-post-suspend.html

  
#### Possible fixes ####

  * igt@fbdev@eof:
    - shard-lnl:          [SKIP][64] ([Intel XE#2134]) -> [PASS][65]
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@fbdev@eof.html
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-2/igt@fbdev@eof.html

  * igt@kms_big_fb@x-tiled-addfb-size-overflow:
    - shard-lnl:          [SKIP][66] ([Intel XE#9125]) -> [PASS][67] +23 other tests pass
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_big_fb@x-tiled-addfb-size-overflow.html
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-2/igt@kms_big_fb@x-tiled-addfb-size-overflow.html

  * igt@kms_color@legacy-gamma-reset:
    - shard-lnl:          [SKIP][68] ([Intel XE#3297]) -> [PASS][69]
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_color@legacy-gamma-reset.html
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-2/igt@kms_color@legacy-gamma-reset.html

  * igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4:
    - shard-lnl:          [SKIP][70] ([Intel XE#7006]) -> [PASS][71]
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4.html
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-8/igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4.html

  * igt@kms_fbcon_fbt@fbc:
    - shard-lnl:          [SKIP][72] ([Intel XE#9127]) -> [PASS][73]
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_fbcon_fbt@fbc.html
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-8/igt@kms_fbcon_fbt@fbc.html

  * igt@kms_feature_discovery@display-1x:
    - shard-lnl:          [SKIP][74] ([Intel XE#702]) -> [PASS][75]
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_feature_discovery@display-1x.html
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-8/igt@kms_feature_discovery@display-1x.html

  * igt@kms_feature_discovery@psr2:
    - shard-lnl:          [SKIP][76] ([Intel XE#1135] / [Intel XE#6128]) -> [PASS][77]
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_feature_discovery@psr2.html
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-2/igt@kms_feature_discovery@psr2.html

  * igt@kms_flip@flip-vs-blocking-wf-vblank:
    - shard-bmg:          [FAIL][78] ([Intel XE#3098]) -> [PASS][79] +1 other test pass
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-bmg-1/igt@kms_flip@flip-vs-blocking-wf-vblank.html
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-bmg-7/igt@kms_flip@flip-vs-blocking-wf-vblank.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-lnl:          [FAIL][80] ([Intel XE#301]) -> [PASS][81] +1 other test pass
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@plain-flip-fb-recreate:
    - shard-lnl:          [SKIP][82] ([Intel XE#2482]) -> [PASS][83] +1 other test pass
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_flip@plain-flip-fb-recreate.html
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-8/igt@kms_flip@plain-flip-fb-recreate.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-move:
    - shard-lnl:          [SKIP][84] ([Intel XE#2548] / [Intel XE#7779]) -> [PASS][85] +5 other tests pass
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-move.html
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-move.html

  * igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-render:
    - shard-lnl:          [SKIP][86] ([Intel XE#7779]) -> [PASS][87]
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-render.html
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-2/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-render.html

  * igt@kms_invalid_mode@bad-hsync-end:
    - shard-lnl:          [SKIP][88] ([Intel XE#2568]) -> [PASS][89]
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_invalid_mode@bad-hsync-end.html
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-2/igt@kms_invalid_mode@bad-hsync-end.html

  * igt@kms_plane@plane-position-hole:
    - shard-lnl:          [SKIP][90] ([Intel XE#9128]) -> [PASS][91] +1 other test pass
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_plane@plane-position-hole.html
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-8/igt@kms_plane@plane-position-hole.html

  * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-pixel-formats:
    - shard-lnl:          [SKIP][92] ([Intel XE#2763] / [Intel XE#6886] / [Intel XE#7687] / [Intel XE#9125]) -> [PASS][93] +1 other test pass
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-pixel-formats.html
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-8/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-pixel-formats.html

  * igt@kms_pm_backlight@basic-brightness:
    - shard-lnl:          [SKIP][94] ([Intel XE#870]) -> [PASS][95]
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_pm_backlight@basic-brightness.html
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-8/igt@kms_pm_backlight@basic-brightness.html

  * igt@kms_pm_dc@dc6-psr:
    - shard-lnl:          [SKIP][96] ([Intel XE#7794]) -> [PASS][97]
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_pm_dc@dc6-psr.html
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-8/igt@kms_pm_dc@dc6-psr.html

  * igt@kms_pm_rpm@legacy-planes:
    - shard-lnl:          [SKIP][98] ([Intel XE#4886]) -> [PASS][99]
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_pm_rpm@legacy-planes.html
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-2/igt@kms_pm_rpm@legacy-planes.html

  * igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-sf:
    - shard-lnl:          [SKIP][100] ([Intel XE#1489]) -> [PASS][101] +1 other test pass
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-sf.html
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-8/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-sf.html

  * igt@kms_psr@fbc-psr-cursor-plane-onoff:
    - shard-lnl:          [SKIP][102] ([Intel XE#2850] / [Intel XE#929]) -> [PASS][103] +2 other tests pass
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_psr@fbc-psr-cursor-plane-onoff.html
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-2/igt@kms_psr@fbc-psr-cursor-plane-onoff.html

  * igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
    - shard-lnl:          [SKIP][104] ([Intel XE#7795]) -> [PASS][105]
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-2/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html

  
#### Warnings ####

  * igt@kms_atomic_transition@plane-all-modeset-transition:
    - shard-lnl:          [SKIP][106] ([Intel XE#3279]) -> [SKIP][107] ([Intel XE#9125])
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-3/igt@kms_atomic_transition@plane-all-modeset-transition.html
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_atomic_transition@plane-all-modeset-transition.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-lnl:          [SKIP][108] ([Intel XE#1407]) -> [SKIP][109] ([Intel XE#9125]) +1 other test skip
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-3/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-180-hflip:
    - shard-lnl:          [SKIP][110] ([Intel XE#7059] / [Intel XE#7085]) -> [SKIP][111] ([Intel XE#9125])
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-3/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-180-hflip.html
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-180-hflip.html

  * igt@kms_big_fb@x-tiled-64bpp-rotate-90:
    - shard-lnl:          [SKIP][112] ([Intel XE#9125]) -> [SKIP][113] ([Intel XE#1407]) +3 other tests skip
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_big_fb@x-tiled-64bpp-rotate-90.html
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-8/igt@kms_big_fb@x-tiled-64bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-32bpp-rotate-0:
    - shard-lnl:          [SKIP][114] ([Intel XE#1124]) -> [SKIP][115] ([Intel XE#9125]) +4 other tests skip
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-7/igt@kms_big_fb@y-tiled-32bpp-rotate-0.html
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_big_fb@y-tiled-32bpp-rotate-0.html

  * igt@kms_big_fb@y-tiled-addfb-size-overflow:
    - shard-lnl:          [SKIP][116] ([Intel XE#9125]) -> [SKIP][117] ([Intel XE#1428] / [Intel XE#7387])
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_big_fb@y-tiled-addfb-size-overflow.html
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-2/igt@kms_big_fb@y-tiled-addfb-size-overflow.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
    - shard-lnl:          [SKIP][118] ([Intel XE#9125]) -> [SKIP][119] ([Intel XE#1124]) +3 other tests skip
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-2/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html

  * igt@kms_bw@connected-linear-tiling-4-displays-target-2160x1440p:
    - shard-lnl:          [SKIP][120] ([Intel XE#9125]) -> [SKIP][121] ([Intel XE#8365])
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_bw@connected-linear-tiling-4-displays-target-2160x1440p.html
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-8/igt@kms_bw@connected-linear-tiling-4-displays-target-2160x1440p.html

  * igt@kms_bw@linear-tiling-4-displays-target-2160x1440p:
    - shard-lnl:          [SKIP][122] ([Intel XE#8365]) -> [SKIP][123] ([Intel XE#9125])
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-3/igt@kms_bw@linear-tiling-4-displays-target-2160x1440p.html
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_bw@linear-tiling-4-displays-target-2160x1440p.html

  * igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-mc-ccs:
    - shard-lnl:          [SKIP][124] ([Intel XE#2887]) -> [SKIP][125] ([Intel XE#9125]) +3 other tests skip
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-3/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-mc-ccs.html
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-mc-ccs.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs:
    - shard-lnl:          [SKIP][126] ([Intel XE#2669] / [Intel XE#7389]) -> [SKIP][127] ([Intel XE#9125])
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-7/igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs.html
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs:
    - shard-lnl:          [SKIP][128] ([Intel XE#9125]) -> [SKIP][129] ([Intel XE#2887]) +8 other tests skip
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs.html
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-2/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-mc-ccs:
    - shard-lnl:          [SKIP][130] ([Intel XE#3432]) -> [SKIP][131] ([Intel XE#9125]) +1 other test skip
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-3/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-mc-ccs.html
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-mc-ccs.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs:
    - shard-lnl:          [SKIP][132] ([Intel XE#9125]) -> [SKIP][133] ([Intel XE#3432])
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs.html
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-8/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs.html

  * igt@kms_cdclk@mode-transition:
    - shard-lnl:          [SKIP][134] ([Intel XE#4417] / [Intel XE#5447]) -> [SKIP][135] ([Intel XE#9125])
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-3/igt@kms_cdclk@mode-transition.html
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_cdclk@mode-transition.html

  * igt@kms_content_protection@dp-mst-lic-type-0:
    - shard-lnl:          [SKIP][136] ([Intel XE#9125]) -> [SKIP][137] ([Intel XE#307] / [Intel XE#6974])
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_content_protection@dp-mst-lic-type-0.html
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-8/igt@kms_content_protection@dp-mst-lic-type-0.html

  * igt@kms_content_protection@dp-mst-type-0-suspend-resume:
    - shard-lnl:          [SKIP][138] ([Intel XE#9125]) -> [SKIP][139] ([Intel XE#6974])
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_content_protection@dp-mst-type-0-suspend-resume.html
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-2/igt@kms_content_protection@dp-mst-type-0-suspend-resume.html

  * igt@kms_content_protection@dp-mst-type-1:
    - shard-lnl:          [SKIP][140] ([Intel XE#307] / [Intel XE#6974]) -> [SKIP][141] ([Intel XE#9125])
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-3/igt@kms_content_protection@dp-mst-type-1.html
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_content_protection@dp-mst-type-1.html

  * igt@kms_content_protection@uevent:
    - shard-lnl:          [SKIP][142] ([Intel XE#7642]) -> [SKIP][143] ([Intel XE#9125])
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-7/igt@kms_content_protection@uevent.html
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_content_protection@uevent.html

  * igt@kms_cursor_crc@cursor-offscreen-128x42:
    - shard-lnl:          [SKIP][144] ([Intel XE#9125]) -> [SKIP][145] ([Intel XE#1424]) +1 other test skip
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_cursor_crc@cursor-offscreen-128x42.html
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-8/igt@kms_cursor_crc@cursor-offscreen-128x42.html

  * igt@kms_cursor_crc@cursor-random-512x170:
    - shard-lnl:          [SKIP][146] ([Intel XE#2321] / [Intel XE#7355]) -> [SKIP][147] ([Intel XE#9125])
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-7/igt@kms_cursor_crc@cursor-random-512x170.html
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_cursor_crc@cursor-random-512x170.html

  * igt@kms_cursor_crc@cursor-rapid-movement-64x21:
    - shard-lnl:          [SKIP][148] ([Intel XE#1424]) -> [SKIP][149] ([Intel XE#9125]) +1 other test skip
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-3/igt@kms_cursor_crc@cursor-rapid-movement-64x21.html
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_cursor_crc@cursor-rapid-movement-64x21.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic:
    - shard-lnl:          [SKIP][150] ([Intel XE#9125]) -> [SKIP][151] ([Intel XE#309] / [Intel XE#7343])
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic.html
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-2/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
    - shard-lnl:          [SKIP][152] ([Intel XE#309] / [Intel XE#7343] / [Intel XE#7935]) -> [SKIP][153] ([Intel XE#309] / [Intel XE#7343])
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-8/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-4/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
    - shard-lnl:          [SKIP][154] ([Intel XE#9125]) -> [SKIP][155] ([Intel XE#323] / [Intel XE#6035])
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-2/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html

  * igt@kms_dsc@dsc-fractional-bpp-bigjoiner:
    - shard-lnl:          [SKIP][156] ([Intel XE#8265]) -> [SKIP][157] ([Intel XE#9125])
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-3/igt@kms_dsc@dsc-fractional-bpp-bigjoiner.html
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_dsc@dsc-fractional-bpp-bigjoiner.html

  * igt@kms_dsc@dsc-with-output-formats-with-bpc:
    - shard-lnl:          [SKIP][158] ([Intel XE#9125]) -> [SKIP][159] ([Intel XE#8265]) +1 other test skip
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_dsc@dsc-with-output-formats-with-bpc.html
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-2/igt@kms_dsc@dsc-with-output-formats-with-bpc.html

  * igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-downscaling:
    - shard-lnl:          [SKIP][160] ([Intel XE#1397] / [Intel XE#1745] / [Intel XE#7385] / [Intel XE#9144]) -> [SKIP][161] ([Intel XE#1745] / [Intel XE#9144])
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-3/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-downscaling.html
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling:
    - shard-lnl:          [SKIP][162] ([Intel XE#1745] / [Intel XE#9144]) -> [SKIP][163] ([Intel XE#1397] / [Intel XE#1745] / [Intel XE#7385] / [Intel XE#9144])
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling.html
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-2/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling.html

  * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-draw-render:
    - shard-lnl:          [SKIP][164] ([Intel XE#2548] / [Intel XE#7779]) -> [SKIP][165] ([Intel XE#6312] / [Intel XE#651]) +6 other tests skip
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-draw-render.html
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-8/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@drrs-abgr161616f-draw-mmap-wc:
    - shard-lnl:          [SKIP][166] ([Intel XE#7061] / [Intel XE#7356]) -> [SKIP][167] ([Intel XE#7779]) +2 other tests skip
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-3/igt@kms_frontbuffer_tracking@drrs-abgr161616f-draw-mmap-wc.html
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_frontbuffer_tracking@drrs-abgr161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@drrs-argb161616f-draw-mmap-wc:
    - shard-lnl:          [SKIP][168] ([Intel XE#7779]) -> [SKIP][169] ([Intel XE#7061] / [Intel XE#7356]) +1 other test skip
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_frontbuffer_tracking@drrs-argb161616f-draw-mmap-wc.html
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-2/igt@kms_frontbuffer_tracking@drrs-argb161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@drrshdr-2p-primscrn-pri-indfb-draw-mmap-wc:
    - shard-lnl:          [SKIP][170] ([Intel XE#7779]) -> [SKIP][171] ([Intel XE#7905]) +24 other tests skip
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_frontbuffer_tracking@drrshdr-2p-primscrn-pri-indfb-draw-mmap-wc.html
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-2/igt@kms_frontbuffer_tracking@drrshdr-2p-primscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@drrshdr-shrfb-scaledprimary:
    - shard-lnl:          [SKIP][172] ([Intel XE#7779]) -> [SKIP][173] ([Intel XE#6312]) +6 other tests skip
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_frontbuffer_tracking@drrshdr-shrfb-scaledprimary.html
   [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-2/igt@kms_frontbuffer_tracking@drrshdr-shrfb-scaledprimary.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-rte:
    - shard-lnl:          [SKIP][174] ([Intel XE#6312] / [Intel XE#651]) -> [SKIP][175] ([Intel XE#2548] / [Intel XE#7779]) +7 other tests skip
   [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-3/igt@kms_frontbuffer_tracking@fbcdrrs-1p-rte.html
   [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_frontbuffer_tracking@fbcdrrs-1p-rte.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-spr-indfb-draw-blt:
    - shard-lnl:          [SKIP][176] ([Intel XE#6312]) -> [SKIP][177] ([Intel XE#7779]) +6 other tests skip
   [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-3/igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-spr-indfb-draw-blt.html
   [177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-scndscrn-cur-indfb-draw-render:
    - shard-lnl:          [SKIP][178] ([Intel XE#7905]) -> [SKIP][179] ([Intel XE#7779]) +21 other tests skip
   [178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-3/igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-scndscrn-cur-indfb-draw-render.html
   [179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-scndscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-cur-indfb-draw-blt:
    - shard-lnl:          [SKIP][180] ([Intel XE#7865]) -> [SKIP][181] ([Intel XE#7779]) +8 other tests skip
   [180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-7/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-cur-indfb-draw-blt.html
   [181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbchdr-argb161616f-draw-render:
    - shard-lnl:          [SKIP][182] ([Intel XE#7779]) -> [SKIP][183] ([Intel XE#7061])
   [182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_frontbuffer_tracking@fbchdr-argb161616f-draw-render.html
   [183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-8/igt@kms_frontbuffer_tracking@fbchdr-argb161616f-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-mmap-wc:
    - shard-lnl:          [SKIP][184] ([Intel XE#2548] / [Intel XE#7779]) -> [SKIP][185] ([Intel XE#656] / [Intel XE#7905]) +18 other tests skip
   [184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-mmap-wc.html
   [185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-lnl:          [SKIP][186] ([Intel XE#7779]) -> [SKIP][187] ([Intel XE#7865]) +15 other tests skip
   [186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-cur-indfb-draw-mmap-wc.html
   [187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-8/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-argb161616f-draw-render:
    - shard-lnl:          [SKIP][188] ([Intel XE#7061]) -> [SKIP][189] ([Intel XE#7779]) +3 other tests skip
   [188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-7/igt@kms_frontbuffer_tracking@fbcpsrhdr-argb161616f-draw-render.html
   [189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_frontbuffer_tracking@fbcpsrhdr-argb161616f-draw-render.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc:
    - shard-lnl:          [SKIP][190] ([Intel XE#656] / [Intel XE#7905]) -> [SKIP][191] ([Intel XE#2548] / [Intel XE#7779]) +15 other tests skip
   [190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-7/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc.html
   [191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][192] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][193] ([Intel XE#3544])
   [192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-bmg-7/igt@kms_hdr@brightness-with-hdr.html
   [193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-bmg-9/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_hdr@static-swap:
    - shard-lnl:          [SKIP][194] ([Intel XE#9125]) -> [SKIP][195] ([Intel XE#1503])
   [194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_hdr@static-swap.html
   [195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-8/igt@kms_hdr@static-swap.html

  * igt@kms_plane_lowres@tiling-x:
    - shard-lnl:          [SKIP][196] ([Intel XE#599] / [Intel XE#7382]) -> [SKIP][197] ([Intel XE#9125])
   [196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-7/igt@kms_plane_lowres@tiling-x.html
   [197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_plane_lowres@tiling-x.html

  * igt@kms_plane_lowres@tiling-y:
    - shard-lnl:          [SKIP][198] ([Intel XE#9125]) -> [SKIP][199] ([Intel XE#599])
   [198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_plane_lowres@tiling-y.html
   [199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-8/igt@kms_plane_lowres@tiling-y.html

  * igt@kms_plane_multiple@2x-tiling-x:
    - shard-lnl:          [SKIP][200] ([Intel XE#9125]) -> [SKIP][201] ([Intel XE#4596] / [Intel XE#5854])
   [200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_plane_multiple@2x-tiling-x.html
   [201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-8/igt@kms_plane_multiple@2x-tiling-x.html

  * igt@kms_plane_multiple@tiling-yf:
    - shard-lnl:          [SKIP][202] ([Intel XE#9125]) -> [SKIP][203] ([Intel XE#5020] / [Intel XE#7348])
   [202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_plane_multiple@tiling-yf.html
   [203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-2/igt@kms_plane_multiple@tiling-yf.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling@pipe-c:
    - shard-lnl:          [SKIP][204] ([Intel XE#2763] / [Intel XE#6886] / [Intel XE#7687] / [Intel XE#9125]) -> [SKIP][205] ([Intel XE#2763] / [Intel XE#6886]) +1 other test skip
   [204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling@pipe-c.html
   [205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-2/igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling@pipe-c.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75:
    - shard-lnl:          [SKIP][206] ([Intel XE#2763] / [Intel XE#6886]) -> [SKIP][207] ([Intel XE#2763] / [Intel XE#6886] / [Intel XE#7687] / [Intel XE#9125]) +3 other tests skip
   [206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-3/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75.html
   [207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf:
    - shard-lnl:          [SKIP][208] ([Intel XE#2893] / [Intel XE#4608] / [Intel XE#7304]) -> [SKIP][209] ([Intel XE#1489]) +1 other test skip
   [208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-3/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf.html
   [209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf:
    - shard-lnl:          [SKIP][210] ([Intel XE#1489]) -> [SKIP][211] ([Intel XE#2893] / [Intel XE#4608] / [Intel XE#7304]) +1 other test skip
   [210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf.html
   [211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-8/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf.html

  * igt@kms_psr@fbc-psr2-cursor-plane-move:
    - shard-lnl:          [SKIP][212] ([Intel XE#1406] / [Intel XE#7345]) -> [SKIP][213] ([Intel XE#2850] / [Intel XE#929]) +1 other test skip
   [212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-3/igt@kms_psr@fbc-psr2-cursor-plane-move.html
   [213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_psr@fbc-psr2-cursor-plane-move.html

  * igt@kms_psr@fbc-psr2-suspend:
    - shard-lnl:          [SKIP][214] ([Intel XE#2850] / [Intel XE#929]) -> [SKIP][215] ([Intel XE#1406] / [Intel XE#7345])
   [214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_psr@fbc-psr2-suspend.html
   [215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-2/igt@kms_psr@fbc-psr2-suspend.html

  * igt@kms_psr@pr-primary-blt:
    - shard-lnl:          [SKIP][216] ([Intel XE#1406]) -> [SKIP][217] ([Intel XE#2850] / [Intel XE#929]) +1 other test skip
   [216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-7/igt@kms_psr@pr-primary-blt.html
   [217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_psr@pr-primary-blt.html

  * igt@kms_psr@pr-sprite-plane-move:
    - shard-lnl:          [SKIP][218] ([Intel XE#2850] / [Intel XE#929]) -> [SKIP][219] ([Intel XE#1406]) +1 other test skip
   [218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_psr@pr-sprite-plane-move.html
   [219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-8/igt@kms_psr@pr-sprite-plane-move.html

  * igt@kms_rotation_crc@bad-tiling:
    - shard-lnl:          [SKIP][220] ([Intel XE#9125]) -> [SKIP][221] ([Intel XE#3414] / [Intel XE#3904] / [Intel XE#7342]) +2 other tests skip
   [220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-6/igt@kms_rotation_crc@bad-tiling.html
   [221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-2/igt@kms_rotation_crc@bad-tiling.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
    - shard-lnl:          [SKIP][222] ([Intel XE#3414] / [Intel XE#3904] / [Intel XE#7342]) -> [SKIP][223] ([Intel XE#9125])
   [222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-lnl-3/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
   [223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-lnl-6/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-bmg:          [SKIP][224] ([Intel XE#2426] / [Intel XE#5848]) -> [SKIP][225] ([Intel XE#2509] / [Intel XE#7437])
   [224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-bmg-8/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-bmg-3/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@xe_exec_reset@gt-reset-fault-injection:
    - shard-bmg:          [DMESG-WARN][226] ([Intel XE#9130]) -> [ABORT][227] ([Intel XE#9131] / [Intel XE#9145])
   [226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d/shard-bmg-6/igt@xe_exec_reset@gt-reset-fault-injection.html
   [227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/shard-bmg-1/igt@xe_exec_reset@gt-reset-fault-injection.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1135]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1135
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1397
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
  [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
  [Intel XE#1428]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1428
  [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
  [Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2482
  [Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
  [Intel XE#2548]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2548
  [Intel XE#2568]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2568
  [Intel XE#2669]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2669
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
  [Intel XE#3009]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3009
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#3098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3098
  [Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
  [Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
  [Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323
  [Intel XE#3279]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3279
  [Intel XE#3297]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3297
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4417
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608
  [Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#4886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4886
  [Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
  [Intel XE#5447]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5447
  [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
  [Intel XE#5854]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5854
  [Intel XE#599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/599
  [Intel XE#6035]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6035
  [Intel XE#6078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6078
  [Intel XE#6128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6128
  [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
  [Intel XE#7006]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7006
  [Intel XE#702]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/702
  [Intel XE#7059]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7059
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7084]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7084
  [Intel XE#7085]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7085
  [Intel XE#7304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7304
  [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
  [Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
  [Intel XE#7345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7345
  [Intel XE#7348]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7348
  [Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
  [Intel XE#7382]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7382
  [Intel XE#7383]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7383
  [Intel XE#7385]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7385
  [Intel XE#7387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7387
  [Intel XE#7389]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7389
  [Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
  [Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
  [Intel XE#7642]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7642
  [Intel XE#7687]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7687
  [Intel XE#7779]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7779
  [Intel XE#7794]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7794
  [Intel XE#7795]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7795
  [Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865
  [Intel XE#7905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7905
  [Intel XE#7935]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7935
  [Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
  [Intel XE#8150]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8150
  [Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
  [Intel XE#8355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8355
  [Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
  [Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
  [Intel XE#8365]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8365
  [Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
  [Intel XE#8395]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8395
  [Intel XE#8396]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8396
  [Intel XE#8399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8399
  [Intel XE#8586]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8586
  [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
  [Intel XE#9125]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9125
  [Intel XE#9127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9127
  [Intel XE#9128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9128
  [Intel XE#9130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9130
  [Intel XE#9131]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9131
  [Intel XE#9132]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9132
  [Intel XE#9144]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9144
  [Intel XE#9145]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9145
  [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929


Build changes
-------------

  * Linux: xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d -> xe-pw-167706v7

  IGT_9086: a89061ecccede222b8da2f310f3bf71ed908c365 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-5709-5cb17454a3e04fcc1133d87451c9c582c297e92d: 5cb17454a3e04fcc1133d87451c9c582c297e92d
  xe-pw-167706v7: 167706v7

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167706v7/index.html

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