From: "Jouni Högander" <jouni.hogander@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: "Jouni Högander" <jouni.hogander@intel.com>, stable@vger.kernel.org
Subject: [PATCH 1/8] drm/i915/psr: Clear selective fetch area when duplicating plane state
Date: Tue, 29 Sep 2026 12:44:27 +0300 [thread overview]
Message-ID: <20260929094434.77129-2-jouni.hogander@intel.com> (raw)
In-Reply-To: <20260929094434.77129-1-jouni.hogander@intel.com>
We are currently not clearing selective fetch area when duplicating plane
state. This is causing problem when plane is re-used for another
purpose. Fix this by clearing selective fetch area when duplicating plane
state.
Now as the state is cleared we need to ensure we have consistent selective
fetch area in plane state on full update. Earlier this was relying on
selective fetch area being copied from old state on state duplicate. Now
this isn't true anymore as we are clearing it. Tackle this by setting full
plane area as selective fetch area for each plane on full update. Rename
the label as skip_su_area_calc as the loop setting the plane selective
fetch area is not skipped anymore.
Move also psr2_sel_fetch_pipe_state_supported check after psr2_su_area
initialization. The loop is run on full update as well now and it needs
initialized psr2_su_area. Clip_area_update is only touching rect height and
x1/x2 are left untouched.
Don't set the area at all for planes not intersecting with the selective
update area. It is already zero sized after plane state duplicate.
Fixes: efab47658a6c ("drm/i915/display/psr: Calculate selective fetch plane registers")
Cc: <stable@vger.kernel.org> # v5.12+
Assisted-by: GitHub-Copilot:claude-opus-5
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_plane.c | 1 +
drivers/gpu/drm/i915/display/intel_psr.c | 24 ++++++++++------------
2 files changed, 12 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_plane.c b/drivers/gpu/drm/i915/display/intel_plane.c
index 25ca049009efb..f908eabe604bb 100644
--- a/drivers/gpu/drm/i915/display/intel_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_plane.c
@@ -140,6 +140,7 @@ intel_plane_duplicate_state(struct drm_plane *plane)
intel_state->dpt_vma = NULL;
intel_state->fence_id = -1;
intel_state->damage = DRM_RECT_INIT(0, 0, 0, 0);
+ intel_state->psr2_sel_fetch_area = DRM_RECT_INIT(0, 0, 0, 0);
/* add reference to fb */
if (intel_state->hw.fb)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index f1d48b69a18fa..f620c44ee4008 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2920,16 +2920,16 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
if (!crtc_state->enable_psr2_sel_fetch)
return 0;
- if (!psr2_sel_fetch_pipe_state_supported(crtc_state)) {
- full_update = true;
- goto skip_sel_fetch_set_loop;
- }
-
crtc_state->psr2_su_area.x1 = 0;
crtc_state->psr2_su_area.y1 = -1;
crtc_state->psr2_su_area.x2 = drm_rect_width(&display_area);
crtc_state->psr2_su_area.y2 = -1;
+ if (!psr2_sel_fetch_pipe_state_supported(crtc_state)) {
+ full_update = true;
+ goto skip_su_area_calc;
+ }
+
/*
* Calculate minimal selective fetch area of each plane and calculate
* the pipe damaged area.
@@ -3013,7 +3013,7 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
}
if (full_update)
- goto skip_sel_fetch_set_loop;
+ goto skip_su_area_calc;
intel_psr_apply_su_area_workarounds(crtc_state);
@@ -3049,6 +3049,11 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
break;
} while (su_area_changed);
+skip_su_area_calc:
+ if (full_update)
+ clip_area_update(&crtc_state->psr2_su_area, &display_area,
+ &display_area);
+
/*
* Now that we have the pipe damaged area check if it intersect with
* every plane, if it does set the plane selective fetch area.
@@ -3065,8 +3070,6 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
inter = crtc_state->psr2_su_area;
sel_fetch_area = &new_plane_state->psr2_sel_fetch_area;
if (!drm_rect_intersect(&inter, &new_plane_state->uapi.dst)) {
- sel_fetch_area->y1 = -1;
- sel_fetch_area->y2 = -1;
/*
* if plane sel fetch was previously enabled ->
* disable it
@@ -3106,11 +3109,6 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
}
}
-skip_sel_fetch_set_loop:
- if (full_update)
- clip_area_update(&crtc_state->psr2_su_area, &display_area,
- &display_area);
-
psr2_man_trk_ctl_calc(crtc_state, full_update);
crtc_state->pipe_srcsz_early_tpt =
psr2_pipe_srcsz_early_tpt_calc(crtc_state, full_update);
--
2.43.0
next prev parent reply other threads:[~2026-09-29 9:44 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-29 9:44 [PATCH 0/8] Selective fetch calculation fixes Jouni Högander
2026-09-29 9:44 ` Jouni Högander [this message]
2026-09-29 9:44 ` [PATCH 2/8] drm/i915/display: Add enabled pipe planes into state for selective fetch Jouni Högander
2026-09-29 9:44 ` [PATCH 3/8] drm/i915/psr: Disable linked plane sel fetch as well Jouni Högander
2026-09-29 9:44 ` [PATCH 4/8] drm/i915/psr: Fix SFF and CFF CTL register bit definitions Jouni Högander
2026-09-29 9:44 ` [PATCH 5/8] drm/i915/psr: Skip sel fetch support check for invisible planes Jouni Högander
2026-09-29 9:44 ` [PATCH 6/8] drm/i915/psr: Don't write 0 size area into plane sel fetch area registers Jouni Högander
2026-09-29 9:44 ` [PATCH 7/8] drm/i915/psr: Remove drm_info_once on failed selective fetch area Jouni Högander
2026-09-29 9:44 ` [PATCH 8/8] drm/i915/psr: Don't clip plane state destination rectangle Jouni Högander
2026-09-29 9:53 ` ✓ CI.KUnit: success for Selective fetch calculation fixes Patchwork
2026-09-29 10:39 ` ✓ Xe.CI.BAT: " Patchwork
2026-09-29 12:11 ` ✗ Xe.CI.FULL: failure " Patchwork
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