From: "Jouni Högander" <jouni.hogander@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: "Jouni Högander" <jouni.hogander@intel.com>, stable@vger.kernel.org
Subject: [PATCH 4/8] drm/i915/psr: Fix SFF and CFF CTL register bit definitions
Date: Tue, 29 Sep 2026 12:44:30 +0300 [thread overview]
Message-ID: <20260929094434.77129-5-jouni.hogander@intel.com> (raw)
In-Reply-To: <20260929094434.77129-1-jouni.hogander@intel.com>
Single full frame bit in SFF_CTL and continuous full frame bit in CFF_CTL
are bit 0. Fix the definitions accordingly.
Fixes: 3b5bf853e309 ("drm/i915/psr: Add register definitions for SFF_CTL and CFF_CTL registers")
Cc: <stable@vger.kernel.org> # v6.15+
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_psr_regs.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h b/drivers/gpu/drm/i915/display/intel_psr_regs.h
index bb577e7e3bbda..a57bc111290d1 100644
--- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
@@ -254,12 +254,12 @@
#define _LNL_SFF_CTL_A 0x60918
#define _LNL_SFF_CTL_B 0x61918
#define LNL_SFF_CTL(tran) _MMIO_TRANS(tran, _LNL_SFF_CTL_A, _LNL_SFF_CTL_B)
-#define LNL_SFF_CTL_SF_SINGLE_FULL_FRAME REG_BIT(1)
+#define LNL_SFF_CTL_SF_SINGLE_FULL_FRAME REG_BIT(0)
#define _LNL_CFF_CTL_A 0x6091c
#define _LNL_CFF_CTL_B 0x6191c
#define LNL_CFF_CTL(tran) _MMIO_TRANS(tran, _LNL_CFF_CTL_A, _LNL_CFF_CTL_B)
-#define LNL_CFF_CTL_SF_CONTINUOUS_FULL_FRAME REG_BIT(1)
+#define LNL_CFF_CTL_SF_CONTINUOUS_FULL_FRAME REG_BIT(0)
/* PSR2 Early transport */
#define _PIPE_SRCSZ_ERLY_TPT_A 0x70074
--
2.43.0
next prev parent reply other threads:[~2026-09-29 9:45 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-29 9:44 [PATCH 0/8] Selective fetch calculation fixes Jouni Högander
2026-09-29 9:44 ` [PATCH 1/8] drm/i915/psr: Clear selective fetch area when duplicating plane state Jouni Högander
2026-09-29 9:44 ` [PATCH 2/8] drm/i915/display: Add enabled pipe planes into state for selective fetch Jouni Högander
2026-09-29 9:44 ` [PATCH 3/8] drm/i915/psr: Disable linked plane sel fetch as well Jouni Högander
2026-09-29 9:44 ` Jouni Högander [this message]
2026-09-29 9:44 ` [PATCH 5/8] drm/i915/psr: Skip sel fetch support check for invisible planes Jouni Högander
2026-09-29 9:44 ` [PATCH 6/8] drm/i915/psr: Don't write 0 size area into plane sel fetch area registers Jouni Högander
2026-09-29 9:44 ` [PATCH 7/8] drm/i915/psr: Remove drm_info_once on failed selective fetch area Jouni Högander
2026-09-29 9:44 ` [PATCH 8/8] drm/i915/psr: Don't clip plane state destination rectangle Jouni Högander
2026-09-29 9:53 ` ✓ CI.KUnit: success for Selective fetch calculation fixes Patchwork
2026-09-29 10:39 ` ✓ Xe.CI.BAT: " Patchwork
2026-09-29 12:11 ` ✗ Xe.CI.FULL: failure " Patchwork
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