[PATCH 05/11] drm/xe: Stop assuming the root tile has a primary GT

[Stuart Summers <stuart.summers@intel.com>]

A handful of device level consumers reach for xe_root_mmio_gt() to get at
state that merely happens to be hung off a GT - the GuC firmware version,
GT stats counters and the default OA unit - and dereference it without a
NULL check.  None of them touch MMIO, so none of them actually need the
primary GT; they just need some GT.

Add xe_device_any_gt(), which falls back to the root tile's media GT, and
use it in those places.  For OA, walk the GTs instead so the default unit
is the first one that exists, which keeps it OA unit 0 as the uapi
promises.

Signed-off-by: Stuart Summers <stuart.summers@intel.com>
---
 drivers/gpu/drm/xe/xe_device.h    | 16 ++++++++++++++++
 drivers/gpu/drm/xe/xe_oa.c        | 24 ++++++++++++++++++++++--
 drivers/gpu/drm/xe/xe_pagefault.c |  4 ++--
 drivers/gpu/drm/xe/xe_query.c     |  3 ++-
 drivers/gpu/drm/xe/xe_vm.c        |  2 +-
 5 files changed, 43 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
index 6df60edcb8f8..3d0282822f17 100644
--- a/drivers/gpu/drm/xe/xe_device.h
+++ b/drivers/gpu/drm/xe/xe_device.h
@@ -109,6 +109,22 @@ static inline struct xe_gt *xe_root_mmio_gt(struct xe_device *xe)
 	return xe_device_get_root_tile(xe)->primary_gt;
 }
 
+/*
+ * Provide a GT structure for device level state that happens to be hung off a
+ * GT but is not specific to one, such as GuC firmware versions or OA units.
+ * Unlike xe_root_mmio_gt(), this never returns NULL: the root tile always has
+ * at least one GT, even when the graphics IP is absent.  It must not be used
+ * for MMIO, since the media GT needs GSI offset translation.
+ *
+ * Returns the primary GT of the root tile, or its media GT if there is none.
+ */
+static inline struct xe_gt *xe_device_any_gt(struct xe_device *xe)
+{
+	struct xe_tile *tile = xe_device_get_root_tile(xe);
+
+	return tile->primary_gt ?: tile->media_gt;
+}
+
 static inline struct xe_mmio *xe_root_tile_mmio(struct xe_device *xe)
 {
 	return &xe->tiles[0].mmio;
diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
index 838802482ada..05beb156c941 100644
--- a/drivers/gpu/drm/xe/xe_oa.c
+++ b/drivers/gpu/drm/xe/xe_oa.c
@@ -2041,6 +2041,23 @@ static int xe_oa_assign_hwe(struct xe_oa *oa, struct xe_oa_open_param *param)
 	return ret;
 }
 
+/*
+ * OA unit IDs are handed out in GT iteration order, so the first unit of the
+ * first GT that has one is OA unit 0. The primary GT may be absent, in which
+ * case unit 0 lives on the media GT.
+ */
+static struct xe_oa_unit *xe_oa_first_unit(struct xe_device *xe)
+{
+	struct xe_gt *gt;
+	u8 id;
+
+	for_each_gt(gt, xe, id)
+		if (gt->oa.num_oa_units)
+			return &gt->oa.oa_unit[0];
+
+	return NULL;
+}
+
 /**
  * xe_oa_stream_open_ioctl - Opens an OA stream
  * @dev: @drm_device
@@ -2073,8 +2090,11 @@ int xe_oa_stream_open_ioctl(struct drm_device *dev, u64 data, struct drm_file *f
 		return ret;
 
 	/* If not provided, OA unit defaults to OA unit 0 as per uapi */
-	if (!param.oa_unit)
-		param.oa_unit = &xe_root_mmio_gt(oa->xe)->oa.oa_unit[0];
+	if (!param.oa_unit) {
+		param.oa_unit = xe_oa_first_unit(oa->xe);
+		if (XE_IOCTL_DBG(xe, !param.oa_unit))
+			return -ENODEV;
+	}
 
 	if (param.exec_queue_id > 0) {
 		/* An exec_queue is only needed for OAR/OAC functionality on OAG */
diff --git a/drivers/gpu/drm/xe/xe_pagefault.c b/drivers/gpu/drm/xe/xe_pagefault.c
index 98cce0f12b12..e1058d52abd9 100644
--- a/drivers/gpu/drm/xe/xe_pagefault.c
+++ b/drivers/gpu/drm/xe/xe_pagefault.c
@@ -547,7 +547,7 @@ static bool xe_pagefault_queue_pop(struct xe_pagefault_queue *pf_queue,
 			continue;
 
 		if (cache_start != XE_PAGEFAULT_CACHE_START_INVALID) {
-			xe_gt_stats_incr(xe_root_mmio_gt(xe),
+			xe_gt_stats_incr(xe_device_any_gt(xe),
 					 XE_GT_STATS_ID_PARALLEL_PAGEFAULT_COUNT,
 					 1);
 			break;
@@ -759,7 +759,7 @@ static void xe_pagefault_queue_work(struct work_struct *w)
 	}
 #undef USM_QUEUE_MAX_RUNTIME_MS
 
-	xe_gt_stats_incr(xe_root_mmio_gt(xe), XE_GT_STATS_ID_PAGEFAULT_US,
+	xe_gt_stats_incr(xe_device_any_gt(xe), XE_GT_STATS_ID_PAGEFAULT_US,
 			 xe_gt_stats_ktime_us_delta(start));
 }
 
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index dc975f595368..01433ae09130 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -592,7 +592,8 @@ query_uc_fw_version(struct xe_device *xe, struct drm_xe_device_query *query)
 
 	switch (resp.uc_type) {
 	case XE_QUERY_UC_TYPE_GUC_SUBMISSION: {
-		struct xe_guc *guc = &xe->tiles[0].primary_gt->uc.guc;
+		struct xe_gt *gt = xe_device_any_gt(xe);
+		struct xe_guc *guc = &gt->uc.guc;
 
 		version = &guc->fw.versions.found[XE_UC_FW_VER_COMPATIBILITY];
 		break;
diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index a26f6b20a22e..cd9f7589c4c2 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -1706,7 +1706,7 @@ static void xe_vm_init_prove_locking(struct xe_device *xe, struct xe_vm *vm)
 	fs_reclaim_release(GFP_KERNEL);
 
 	down_read(&vm->exec_queues.lock);
-	might_lock(&xe_root_mmio_gt(xe)->uc.guc.ct.lock);
+	might_lock(&xe_device_any_gt(xe)->uc.guc.ct.lock);
 	up_read(&vm->exec_queues.lock);
 }
 
-- 
2.43.0