[PATCH 00/12] Fix MCR inconsistencies in RTP tables

[PATCH 00/12] Fix MCR inconsistencies in RTP tables

[Gustavo Sousa]

The Xe driver uses struct xe_reg as base type to represent a register
definition, and defines struct xe_reg_mcr as a sort of subtype to
represent multicast replicated (MCR) registers.  It uses this subtyping
to "force" the use of the correct MCR-based API for MMIO operations on
MCR registers.

In regular driver code, usage of those MCR registers usually need some
reasoning about whether the access will need to be steered or a
multicast; and the correct MCR API will be selected.

For RTP tables, on the other hand, that's not the case.  The developer
when defining an action the developer can either select a regular or a
MCR register and the register save/restore logic will make the selection
between regular vs MCR MMIO access depending on the register instance
defined in the RTP action.

That allows some mistakes to go unnoticed: a non-MCR register instance
could be used for an RTP action against a platform where such a register
is actually MCR; and vice-versa.

This series fixes those mistakes and then goes on to update our KUnit
testing to prevent them from happening again.  It is organized as
follows:

* drm/xe: Define CACHE_MODE_1 as MCR register
* drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN1
* drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN4

    These patches fix the existing mistakes found in our RTP tables,
    which were found by running the Xe Kunit test xe_wa with the patches
    that follow.

drm/xe/kunit: Add xe_kunit_is_live_test()
drm/xe/kunit: Abort test if MMIO operation is attempted
drm/xe/kunit: Allow intercepting MMIO operations

    These patches add a framework that allows Xe Kunit tests to intercept
    MMIO operations or aborts the tests otherwise.  This was
    implemented to allow including hw_engines in we_wa_test.c, since
    FUNC(xe_rtp_cfeg_wmtp_disabled), used by one of the RTP entries,
    uses a MMIO read.

    Further workaround/tuning conditions that do MMIO reads could be
    added in the future, so this allows xe_wa_test.c to intercept them
    without intrusive changes to the code when that happens.

    Note that the implementation is generic enough to allow usage in
    other tests when necessary.

drm/xe: Extract xe_hw_engine_setup_reg_lrc()
drm/xe: Extract xe_hw_engines_setup_runtime_mask()
drm/xe/kunit: Use KUNIT_EXPECT_EQ() in xe_wa_gt()
drm/xe/kunit: Include hw_engines in xe_wa test

    These patches include hw_engines in xe_wa_test.c for greater
    coverage.  The first three patches of this seires, which fix
    existing inconsistent MCR usage, are for entries in RTP tables for
    hw_engines.

drm/xe/mcr: Extract reg_in_steering_type_ranges()
drm/xe/reg_sr: Do sanity check for MCR vs non-MCR

    These final patches add a sanity check in register save/restore
    logic to prevent the mistakes from happening again.

Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
Gustavo Sousa (12):
      drm/xe: Define CACHE_MODE_1 as MCR register
      drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN1
      drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN4
      drm/xe/kunit: Add xe_kunit_is_live_test()
      drm/xe/kunit: Abort test if MMIO operation is attempted
      drm/xe/kunit: Allow intercepting MMIO operations
      drm/xe: Extract xe_hw_engine_setup_reg_lrc()
      drm/xe: Extract xe_hw_engines_setup_runtime_mask()
      drm/xe/kunit: Use KUNIT_EXPECT_EQ() in xe_wa_gt()
      drm/xe/kunit: Include hw_engines in xe_wa test
      drm/xe/mcr: Extract reg_in_steering_type_ranges()
      drm/xe/reg_sr: Do sanity check for MCR vs non-MCR

 drivers/gpu/drm/xe/regs/xe_gt_regs.h         |   4 +-
 drivers/gpu/drm/xe/tests/Makefile            |   2 +
 drivers/gpu/drm/xe/tests/xe_kunit_helpers.c  |  25 ++++++
 drivers/gpu/drm/xe/tests/xe_kunit_helpers.h  |   4 +
 drivers/gpu/drm/xe/tests/xe_kunit_mmio.c     |  86 ++++++++++++++++++++
 drivers/gpu/drm/xe/tests/xe_kunit_mmio.h     |  46 +++++++++++
 drivers/gpu/drm/xe/tests/xe_mmio_intercept.c | 116 +++++++++++++++++++++++++++
 drivers/gpu/drm/xe/tests/xe_mmio_intercept.h |  26 ++++++
 drivers/gpu/drm/xe/tests/xe_rtp_test.c       |  71 ++++++++++++++--
 drivers/gpu/drm/xe/tests/xe_wa_test.c        |  63 ++++++++++++++-
 drivers/gpu/drm/xe/xe_gt.c                   |   7 +-
 drivers/gpu/drm/xe/xe_gt_mcr.c               |  64 ++++++++++-----
 drivers/gpu/drm/xe/xe_gt_mcr.h               |   1 +
 drivers/gpu/drm/xe/xe_hw_engine.c            |  24 ++++--
 drivers/gpu/drm/xe/xe_hw_engine.h            |   3 +-
 drivers/gpu/drm/xe/xe_mmio.c                 |  13 +++
 drivers/gpu/drm/xe/xe_reg_sr.c               |  36 +++++++++
 drivers/gpu/drm/xe/xe_wa.c                   |   8 +-
 18 files changed, 555 insertions(+), 44 deletions(-)
---
base-commit: 0f3aa82816dce3da347333a317ea112d16e5d237
change-id: 20260112-rtp-mcr-check-f976cb1adf94

Best regards,
--  
Gustavo Sousa <gustavo.sousa@intel.com>

[PATCH 01/12] drm/xe: Define CACHE_MODE_1 as MCR register

[Gustavo Sousa]

CACHE_MODE_1 is a MCR register for all platforms that currently use it
in the Xe driver.  Use XE_REG_MCR() when defining it.

Fixes: 8cd7e9759766 ("drm/xe: Add missing DG2 lrc workarounds")
Fixes: ff063430caa8 ("drm/xe/mtl: Add some initial MTL workarounds")
Bspec: 66534, 67788
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/xe/regs/xe_gt_regs.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
index 24fc64fc832e..bc984dde2773 100644
--- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
@@ -141,7 +141,7 @@
 
 #define XEHPG_INSTDONE_GEOM_SVGUNIT		XE_REG_MCR(0x666c)
 
-#define CACHE_MODE_1				XE_REG(0x7004, XE_REG_OPTION_MASKED)
+#define CACHE_MODE_1				XE_REG_MCR(0x7004, XE_REG_OPTION_MASKED)
 #define   MSAA_OPTIMIZATION_REDUC_DISABLE	REG_BIT(11)
 
 #define COMMON_SLICE_CHICKEN1			XE_REG(0x7010, XE_REG_OPTION_MASKED)

-- 
2.52.0

[PATCH 02/12] drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN1

[Gustavo Sousa]

The register COMMON_SLICE_CHICKEN1 is a MCR register on Xe2.
Let's make sure to define a MCR version of it and use it for the
relevant IP versions.

Use XEHP_ as prefix for the register name, since it is MCR as of Xe_HP.

Fixes: a5d221924e13 ("drm/xe/xe2_hpg: Add set of workarounds")
Fixes: 9f18b55b6d3f ("drm/xe/xe2: Add workaround 18033852989")
Bspec: 66534, 71185
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/xe/regs/xe_gt_regs.h | 1 +
 drivers/gpu/drm/xe/xe_wa.c           | 4 ++--
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
index bc984dde2773..d4a1bb1edc9c 100644
--- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
@@ -145,6 +145,7 @@
 #define   MSAA_OPTIMIZATION_REDUC_DISABLE	REG_BIT(11)
 
 #define COMMON_SLICE_CHICKEN1			XE_REG(0x7010, XE_REG_OPTION_MASKED)
+#define XEHP_COMMON_SLICE_CHICKEN1		XE_REG_MCR(0x7010, XE_REG_OPTION_MASKED)
 #define   DISABLE_BOTTOM_CLIP_RECTANGLE_TEST	REG_BIT(14)
 
 #define HIZ_CHICKEN					XE_REG(0x7018, XE_REG_OPTION_MASKED)
diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
index a991ee2b8781..a91db59a3d0a 100644
--- a/drivers/gpu/drm/xe/xe_wa.c
+++ b/drivers/gpu/drm/xe/xe_wa.c
@@ -794,7 +794,7 @@ static const struct xe_rtp_entry_sr lrc_was[] = {
 	},
 	{ XE_RTP_NAME("18033852989"),
 	  XE_RTP_RULES(GRAPHICS_VERSION(2004), ENGINE_CLASS(RENDER)),
-	  XE_RTP_ACTIONS(SET(COMMON_SLICE_CHICKEN1, DISABLE_BOTTOM_CLIP_RECTANGLE_TEST))
+	  XE_RTP_ACTIONS(SET(XEHP_COMMON_SLICE_CHICKEN1, DISABLE_BOTTOM_CLIP_RECTANGLE_TEST))
 	},
 	{ XE_RTP_NAME("14021567978"),
 	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, XE_RTP_END_VERSION_UNDEFINED),
@@ -852,7 +852,7 @@ static const struct xe_rtp_entry_sr lrc_was[] = {
 	},
 	{ XE_RTP_NAME("18033852989"),
 	  XE_RTP_RULES(GRAPHICS_VERSION(2001), ENGINE_CLASS(RENDER)),
-	  XE_RTP_ACTIONS(SET(COMMON_SLICE_CHICKEN1, DISABLE_BOTTOM_CLIP_RECTANGLE_TEST))
+	  XE_RTP_ACTIONS(SET(XEHP_COMMON_SLICE_CHICKEN1, DISABLE_BOTTOM_CLIP_RECTANGLE_TEST))
 	},
 
 	/* Xe3_LPG */

-- 
2.52.0

[PATCH 03/12] drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN4

[Gustavo Sousa]

The register COMMON_SLICE_CHICKEN4 is a MCR register on both Xe2 and
Xe3. Let's make sure to define a MCR version of it and use it for the
relevant IP versions.

Use XEHP_ as prefix for the register name, since it is MCR as of Xe_HP.

Fixes: 8d6f16f1f082 ("drm/xe: Extend Wa_22021007897 to Xe3 platforms")
Fixes: e5c13e2c505b ("drm/xe/xe2hpg: Add Wa_22021007897")
Bspec: 66534, 71185, 74417
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/xe/regs/xe_gt_regs.h | 1 +
 drivers/gpu/drm/xe/xe_wa.c           | 4 ++--
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
index d4a1bb1edc9c..f129210e8e48 100644
--- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
@@ -168,6 +168,7 @@
 #define XEHPG_SC_INSTDONE_EXTRA2		XE_REG_MCR(0x7108)
 
 #define COMMON_SLICE_CHICKEN4			XE_REG(0x7300, XE_REG_OPTION_MASKED)
+#define XEHP_COMMON_SLICE_CHICKEN4		XE_REG_MCR(0x7300, XE_REG_OPTION_MASKED)
 #define   SBE_PUSH_CONSTANT_BEHIND_FIX_ENABLE	REG_BIT(12)
 #define   DISABLE_TDC_LOAD_BALANCING_CALC	REG_BIT(6)
 
diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
index a91db59a3d0a..58c37250479f 100644
--- a/drivers/gpu/drm/xe/xe_wa.c
+++ b/drivers/gpu/drm/xe/xe_wa.c
@@ -848,7 +848,7 @@ static const struct xe_rtp_entry_sr lrc_was[] = {
 	},
 	{ XE_RTP_NAME("22021007897"),
 	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2002), ENGINE_CLASS(RENDER)),
-	  XE_RTP_ACTIONS(SET(COMMON_SLICE_CHICKEN4, SBE_PUSH_CONSTANT_BEHIND_FIX_ENABLE))
+	  XE_RTP_ACTIONS(SET(XEHP_COMMON_SLICE_CHICKEN4, SBE_PUSH_CONSTANT_BEHIND_FIX_ENABLE))
 	},
 	{ XE_RTP_NAME("18033852989"),
 	  XE_RTP_RULES(GRAPHICS_VERSION(2001), ENGINE_CLASS(RENDER)),
@@ -868,7 +868,7 @@ static const struct xe_rtp_entry_sr lrc_was[] = {
 	},
 	{ XE_RTP_NAME("22021007897"),
 	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3005), ENGINE_CLASS(RENDER)),
-	  XE_RTP_ACTIONS(SET(COMMON_SLICE_CHICKEN4, SBE_PUSH_CONSTANT_BEHIND_FIX_ENABLE))
+	  XE_RTP_ACTIONS(SET(XEHP_COMMON_SLICE_CHICKEN4, SBE_PUSH_CONSTANT_BEHIND_FIX_ENABLE))
 	},
 	{ XE_RTP_NAME("14024681466"),
 	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3005), ENGINE_CLASS(RENDER)),

-- 
2.52.0

[PATCH 04/12] drm/xe/kunit: Add xe_kunit_is_live_test()

[Gustavo Sousa]

In upcoming changes we will need to differentiate between regular and
live KUnit tests.  Add the function xe_kunit_is_live_test() for that
purpose.

Note that this is implemented in a rather hackish way, by leveraging
KUnit's static stubbing functionality.  A better approach would be to
store a boolean somewhere in test->priv that would tell if a test is a
live one, however that's not quite feasible today given the inconsistent
usage of test->priv (there is not a single uniform type of data assigned
to it across existing test).

Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/xe/tests/xe_kunit_helpers.c | 25 +++++++++++++++++++++++++
 drivers/gpu/drm/xe/tests/xe_kunit_helpers.h |  4 ++++
 2 files changed, 29 insertions(+)

diff --git a/drivers/gpu/drm/xe/tests/xe_kunit_helpers.c b/drivers/gpu/drm/xe/tests/xe_kunit_helpers.c
index bc5156966ce9..369b26b3a32c 100644
--- a/drivers/gpu/drm/xe/tests/xe_kunit_helpers.c
+++ b/drivers/gpu/drm/xe/tests/xe_kunit_helpers.c
@@ -16,6 +16,18 @@
 #include "xe_device_types.h"
 #include "xe_pm.h"
 
+/**
+ * xe_kunit_is_live_test - Return true if @test is a live test.
+ * @test: the &kunit test
+ *
+ * Return: True for a live test and false otherwise.
+ */
+bool xe_kunit_is_live_test(struct kunit *test)
+{
+	KUNIT_STATIC_STUB_REDIRECT(xe_kunit_is_live_test, test);
+	return false;
+}
+
 /**
  * xe_kunit_helper_alloc_xe_device - Allocate a &xe_device for a KUnit test.
  * @test: the &kunit where this &xe_device will be used
@@ -93,6 +105,11 @@ EXPORT_SYMBOL_IF_KUNIT(xe_kunit_helper_xe_device_test_init);
 
 KUNIT_DEFINE_ACTION_WRAPPER(put_xe_pm_runtime, xe_pm_runtime_put, struct xe_device *);
 
+static bool xe_kunit_is_live_test_indeed(struct kunit *test)
+{
+	return true;
+}
+
 /**
  * xe_kunit_helper_xe_device_live_test_init - Prepare a &xe_device for
  *                                            use in a live KUnit test.
@@ -116,6 +133,14 @@ int xe_kunit_helper_xe_device_live_test_init(struct kunit *test)
 {
 	struct xe_device *xe = xe_device_const_cast(test->param_value);
 
+	/*
+	 * FIXME: This is a hack and a better solution is to have the "priv"
+	 * member of tests have a boolean to tell if a test is a live one.
+	 * Unfortunately that can't be done today because "priv" does not point
+	 * to a single unified type across existing tests.
+	 */
+	kunit_activate_static_stub(test, xe_kunit_is_live_test, xe_kunit_is_live_test_indeed);
+
 	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, xe);
 	kunit_info(test, "running on %s device\n", xe->info.platform_name);
 
diff --git a/drivers/gpu/drm/xe/tests/xe_kunit_helpers.h b/drivers/gpu/drm/xe/tests/xe_kunit_helpers.h
index 83665f7b1254..4b846cfb1f40 100644
--- a/drivers/gpu/drm/xe/tests/xe_kunit_helpers.h
+++ b/drivers/gpu/drm/xe/tests/xe_kunit_helpers.h
@@ -6,10 +6,14 @@
 #ifndef _XE_KUNIT_HELPERS_H_
 #define _XE_KUNIT_HELPERS_H_
 
+#include <linux/types.h>
+
 struct device;
 struct kunit;
 struct xe_device;
 
+bool xe_kunit_is_live_test(struct kunit *test);
+
 struct xe_device *xe_kunit_helper_alloc_xe_device(struct kunit *test,
 						  struct device *dev);
 int xe_kunit_helper_xe_device_test_init(struct kunit *test);

-- 
2.52.0

[PATCH 05/12] drm/xe/kunit: Abort test if MMIO operation is attempted

[Gustavo Sousa]

Regular Xe KUnit tests (i.e. not the live ones) are usually run in
User-Mode Linux and do not have access to the real hardware and, as
such, should not attempt to do MMIO operations. If some test ends up
exercising a path that contains MMIO operations, the test should be
rewritten in a way that the MMIO is skipped or simulated (e.g. via a
static stub).

Let's make sure to abort the test if MMIO is attempted on non-live
tests.  Before aborting, use drm_WARN() to cause a stack trace to be
logged as a debug aid to the developer.

Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/xe/tests/Makefile        |  1 +
 drivers/gpu/drm/xe/tests/xe_kunit_mmio.c | 35 ++++++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/tests/xe_kunit_mmio.h | 27 ++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_mmio.c             |  9 ++++++++
 4 files changed, 72 insertions(+)

diff --git a/drivers/gpu/drm/xe/tests/Makefile b/drivers/gpu/drm/xe/tests/Makefile
index 0e3408f4952c..8f3a594449c8 100644
--- a/drivers/gpu/drm/xe/tests/Makefile
+++ b/drivers/gpu/drm/xe/tests/Makefile
@@ -8,6 +8,7 @@ xe_live_test-y = xe_live_test_mod.o
 obj-$(CONFIG_DRM_XE_KUNIT_TEST) += xe_test.o
 xe_test-y = xe_test_mod.o \
 	xe_args_test.o \
+	xe_kunit_mmio.o \
 	xe_pci_test.o \
 	xe_rtp_test.o \
 	xe_wa_test.o
diff --git a/drivers/gpu/drm/xe/tests/xe_kunit_mmio.c b/drivers/gpu/drm/xe/tests/xe_kunit_mmio.c
new file mode 100644
index 000000000000..debf8bd3f9dd
--- /dev/null
+++ b/drivers/gpu/drm/xe/tests/xe_kunit_mmio.c
@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: GPL-2.0 AND MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#include <kunit/test.h>
+#include <kunit/test-bug.h>
+
+#include <drm/drm_print.h>
+
+#include "tests/xe_kunit_helpers.h"
+#include "tests/xe_kunit_mmio.h"
+#include "xe_device_types.h"
+
+/**
+ * xe_kunit_mmio_abort_if_not_live_test - Abort test execution if not in a live test.
+ * @mmio: MMIO target
+ * @reg: Register on which an MMIO operation is about to be performed
+ *
+ * This function must be called from xe_mmio functions that perform MMIO
+ * operations on the hardware.  If the current process is a kunit test and it is
+ * not a live test, it will cause a warn and abort the test; otherwise it does
+ * nothing.
+ */
+void xe_kunit_mmio_abort_if_not_live_test(struct xe_mmio *mmio, struct xe_reg reg)
+{
+	struct xe_device *xe = tile_to_xe(mmio->tile);
+	struct kunit *test = kunit_get_current_test();
+
+	if (!test || xe_kunit_is_live_test(test))
+		return;
+
+	drm_WARN(&xe->drm, true, "MMIO function called on reg 0x%x\n", reg.addr);
+	KUNIT_FAIL_AND_ABORT(test, "MMIO function called on reg 0x%x\n", reg.addr);
+}
diff --git a/drivers/gpu/drm/xe/tests/xe_kunit_mmio.h b/drivers/gpu/drm/xe/tests/xe_kunit_mmio.h
new file mode 100644
index 000000000000..d46ac2b82969
--- /dev/null
+++ b/drivers/gpu/drm/xe/tests/xe_kunit_mmio.h
@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: GPL-2.0 AND MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_KUNIT_MMIO_H_
+#define _XE_KUNIT_MMIO_H_
+
+#include <linux/types.h>
+
+#include "regs/xe_reg_defs.h"
+
+struct xe_mmio;
+
+#if IS_ENABLED(CONFIG_DRM_XE_KUNIT_TEST)
+
+void xe_kunit_mmio_abort_if_not_live_test(struct xe_mmio *mmio, struct xe_reg reg);
+
+#else
+
+static void xe_kunit_mmio_abort_if_not_live_test(struct xe_mmio *mmio, struct xe_reg reg)
+{
+}
+
+#endif
+
+#endif
diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c
index bcb6674b7dac..0f9a1d5453df 100644
--- a/drivers/gpu/drm/xe/xe_mmio.c
+++ b/drivers/gpu/drm/xe/xe_mmio.c
@@ -14,6 +14,7 @@
 #include <drm/drm_print.h>
 
 #include "regs/xe_bars.h"
+#include "tests/xe_kunit_mmio.h"
 #include "xe_device.h"
 #include "xe_gt_sriov_vf.h"
 #include "xe_sriov.h"
@@ -146,6 +147,8 @@ u8 xe_mmio_read8(struct xe_mmio *mmio, struct xe_reg reg)
 	u32 addr = xe_mmio_adjusted_addr(mmio, reg.addr);
 	u8 val;
 
+	xe_kunit_mmio_abort_if_not_live_test(mmio, reg);
+
 	mmio_flush_pending_writes(mmio);
 
 	val = readb(mmio->regs + addr);
@@ -159,6 +162,8 @@ u16 xe_mmio_read16(struct xe_mmio *mmio, struct xe_reg reg)
 	u32 addr = xe_mmio_adjusted_addr(mmio, reg.addr);
 	u16 val;
 
+	xe_kunit_mmio_abort_if_not_live_test(mmio, reg);
+
 	mmio_flush_pending_writes(mmio);
 
 	val = readw(mmio->regs + addr);
@@ -171,6 +176,8 @@ void xe_mmio_write32(struct xe_mmio *mmio, struct xe_reg reg, u32 val)
 {
 	u32 addr = xe_mmio_adjusted_addr(mmio, reg.addr);
 
+	xe_kunit_mmio_abort_if_not_live_test(mmio, reg);
+
 	trace_xe_reg_rw(mmio, true, addr, val, sizeof(val));
 
 	if (!reg.vf && IS_SRIOV_VF(mmio->tile->xe))
@@ -185,6 +192,8 @@ u32 xe_mmio_read32(struct xe_mmio *mmio, struct xe_reg reg)
 	u32 addr = xe_mmio_adjusted_addr(mmio, reg.addr);
 	u32 val;
 
+	xe_kunit_mmio_abort_if_not_live_test(mmio, reg);
+
 	mmio_flush_pending_writes(mmio);
 
 	if (!reg.vf && IS_SRIOV_VF(mmio->tile->xe))

-- 
2.52.0

[PATCH 06/12] drm/xe/kunit: Allow intercepting MMIO operations

[Gustavo Sousa]

While we do not want regular Xe KUnit tests to try to perform MMIO
operations, for reasonably simple cases, it would be nice to allow the
test to intercept and simulate MMIO operations.  That would be less
intrusive than injecting more static stubs into the driver code or
having to refactor it to accommodate for a test.

Thus, let's add the infrastructure to allow that.  Let's implement that
today with the help of KUnit's static stubbing.  In the future, when/if
we get all tests to have a common type for test->priv, we could change
the framework to use that instead.

Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/xe/tests/Makefile            |   1 +
 drivers/gpu/drm/xe/tests/xe_kunit_mmio.c     |  77 +++++++++++++++---
 drivers/gpu/drm/xe/tests/xe_kunit_mmio.h     |  23 +++++-
 drivers/gpu/drm/xe/tests/xe_mmio_intercept.c | 116 +++++++++++++++++++++++++++
 drivers/gpu/drm/xe/tests/xe_mmio_intercept.h |  26 ++++++
 drivers/gpu/drm/xe/xe_mmio.c                 |  12 ++-
 6 files changed, 236 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/xe/tests/Makefile b/drivers/gpu/drm/xe/tests/Makefile
index 8f3a594449c8..690e1e12232c 100644
--- a/drivers/gpu/drm/xe/tests/Makefile
+++ b/drivers/gpu/drm/xe/tests/Makefile
@@ -8,6 +8,7 @@ xe_live_test-y = xe_live_test_mod.o
 obj-$(CONFIG_DRM_XE_KUNIT_TEST) += xe_test.o
 xe_test-y = xe_test_mod.o \
 	xe_args_test.o \
+	xe_mmio_intercept.o \
 	xe_kunit_mmio.o \
 	xe_pci_test.o \
 	xe_rtp_test.o \
diff --git a/drivers/gpu/drm/xe/tests/xe_kunit_mmio.c b/drivers/gpu/drm/xe/tests/xe_kunit_mmio.c
index debf8bd3f9dd..ad58970e3ee7 100644
--- a/drivers/gpu/drm/xe/tests/xe_kunit_mmio.c
+++ b/drivers/gpu/drm/xe/tests/xe_kunit_mmio.c
@@ -10,26 +10,77 @@
 
 #include "tests/xe_kunit_helpers.h"
 #include "tests/xe_kunit_mmio.h"
+#include "tests/xe_mmio_intercept.h"
 #include "xe_device_types.h"
 
-/**
- * xe_kunit_mmio_abort_if_not_live_test - Abort test execution if not in a live test.
- * @mmio: MMIO target
- * @reg: Register on which an MMIO operation is about to be performed
- *
- * This function must be called from xe_mmio functions that perform MMIO
- * operations on the hardware.  If the current process is a kunit test and it is
- * not a live test, it will cause a warn and abort the test; otherwise it does
- * nothing.
- */
-void xe_kunit_mmio_abort_if_not_live_test(struct xe_mmio *mmio, struct xe_reg reg)
+static void abort_if_not_live_test(struct kunit *test,
+				   struct xe_mmio *mmio, struct xe_reg reg)
 {
 	struct xe_device *xe = tile_to_xe(mmio->tile);
-	struct kunit *test = kunit_get_current_test();
 
-	if (!test || xe_kunit_is_live_test(test))
+	if (xe_kunit_is_live_test(test))
 		return;
 
 	drm_WARN(&xe->drm, true, "MMIO function called on reg 0x%x\n", reg.addr);
 	KUNIT_FAIL_AND_ABORT(test, "MMIO function called on reg 0x%x\n", reg.addr);
 }
+
+bool xe_kunit_mmio_read8(struct xe_mmio *mmio, struct xe_reg reg, u8 *val)
+{
+	struct kunit *test = kunit_get_current_test();
+
+	if (!test)
+		return false;
+
+	if (xe_mmio_intercept_read8(test, mmio, reg, val))
+		return true;
+
+	abort_if_not_live_test(test, mmio, reg);
+
+	return false;
+}
+
+bool xe_kunit_mmio_read16(struct xe_mmio *mmio, struct xe_reg reg, u16 *val)
+{
+	struct kunit *test = kunit_get_current_test();
+
+	if (!test)
+		return false;
+
+	if (xe_mmio_intercept_read16(test, mmio, reg, val))
+		return true;
+
+	abort_if_not_live_test(test, mmio, reg);
+
+	return false;
+}
+
+bool xe_kunit_mmio_read32(struct xe_mmio *mmio, struct xe_reg reg, u32 *val)
+{
+	struct kunit *test = kunit_get_current_test();
+
+	if (!test)
+		return false;
+
+	if (xe_mmio_intercept_read32(test, mmio, reg, val))
+		return true;
+
+	abort_if_not_live_test(test, mmio, reg);
+
+	return false;
+}
+
+bool xe_kunit_mmio_write32(struct xe_mmio *mmio, struct xe_reg reg, u32 val)
+{
+	struct kunit *test = kunit_get_current_test();
+
+	if (!test)
+		return false;
+
+	if (xe_mmio_intercept_write32(test, mmio, reg, val))
+		return true;
+
+	abort_if_not_live_test(test, mmio, reg);
+
+	return false;
+}
diff --git a/drivers/gpu/drm/xe/tests/xe_kunit_mmio.h b/drivers/gpu/drm/xe/tests/xe_kunit_mmio.h
index d46ac2b82969..9cb792a0a156 100644
--- a/drivers/gpu/drm/xe/tests/xe_kunit_mmio.h
+++ b/drivers/gpu/drm/xe/tests/xe_kunit_mmio.h
@@ -14,12 +14,31 @@ struct xe_mmio;
 
 #if IS_ENABLED(CONFIG_DRM_XE_KUNIT_TEST)
 
-void xe_kunit_mmio_abort_if_not_live_test(struct xe_mmio *mmio, struct xe_reg reg);
+bool xe_kunit_mmio_read8(struct xe_mmio *mmio, struct xe_reg reg, u8 *val);
+bool xe_kunit_mmio_read16(struct xe_mmio *mmio, struct xe_reg reg, u16 *val);
+bool xe_kunit_mmio_read32(struct xe_mmio *mmio, struct xe_reg reg, u32 *val);
+bool xe_kunit_mmio_write32(struct xe_mmio *mmio, struct xe_reg reg, u32 val);
 
 #else
 
-static void xe_kunit_mmio_abort_if_not_live_test(struct xe_mmio *mmio, struct xe_reg reg)
+static inline bool xe_kunit_mmio_read8(struct xe_mmio *mmio, struct xe_reg reg, u8 *val)
 {
+	return false;
+}
+
+static inline bool xe_kunit_mmio_read16(struct xe_mmio *mmio, struct xe_reg reg, u16 *val)
+{
+	return false;
+}
+
+static inline bool xe_kunit_mmio_read32(struct xe_mmio *mmio, struct xe_reg reg, u32 *val)
+{
+	return false;
+}
+
+static inline bool xe_kunit_mmio_write32(struct xe_mmio *mmio, struct xe_reg reg, u32 val)
+{
+	return false;
 }
 
 #endif
diff --git a/drivers/gpu/drm/xe/tests/xe_mmio_intercept.c b/drivers/gpu/drm/xe/tests/xe_mmio_intercept.c
new file mode 100644
index 000000000000..b081fb109dc1
--- /dev/null
+++ b/drivers/gpu/drm/xe/tests/xe_mmio_intercept.c
@@ -0,0 +1,116 @@
+// SPDX-License-Identifier: GPL-2.0 AND MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#include <kunit/static_stub.h>
+
+#include "tests/xe_mmio_intercept.h"
+
+/*
+ * DOC: Intercepting Xe MMIO in KUnit tests
+ *
+ * This provides a framework to allow Xe KUnit tests to intercept MMIO
+ * operations from the Xe driver.  This is especially useful for non-live tests,
+ * which are usually run on User-Mode Linux and don't have access to the real
+ * hardware.
+ *
+ * This was implemented with the help of KUnit's static stub API.  In order to
+ * be able to intercept an MMIO operation, the test needs to implement one or
+ * more "replacement functions" with the same signature of the respective
+ * ``xe_mmio_intercept_*()`` functions and activate the static stub to replace
+ * them.
+ *
+ * If the replacement function successfully "intercepts" an MMIO operation (e.g.
+ * matches a register of interest and handles the operation), then it must
+ * return true to indicate that, otherwise it must return false.
+ *
+ * When false is returned and the test is not a live one, then a warn with a
+ * stack trace is generated (as a debug aid) and the test is aborted.  The
+ * rationale behind that behavior is that usually non-live tests are run in
+ * virtual machines (like User-Mode Linux) and, as such, attempting a real MMIO
+ * operation would likely fail.
+ *
+ * When a read operation gets intercepted, then ``*val`` must be updated with
+ * the value that the original MMIO function must return as a result of the
+ * read.
+ *
+ * Example:
+ *
+ * .. code-block:: c
+ *
+ *	static bool my_test_mmio_intercept_read32(struct kunit *test,
+ *						  struct xe_mmio *mmio,
+ *						  struct xe_reg reg,
+ *						  u32 *val)
+ *	{
+ *		if (reg.raw == SOME_REGISTER.raw) {
+ *			// Get value from somewhere (e.g. some member in
+ *			// test->priv) or use a constant value.
+ *			*val = ...;
+ *
+ *			return true;
+ *		}
+ *
+ *		return false;
+ *	}
+ *
+ *	static bool my_test_mmio_intercept_write32(struct kunit *test,
+ *						   struct xe_mmio *mmio,
+ *						   struct xe_reg reg,
+ *						   u32 val)
+ *	{
+ *		if (reg.raw == SOME_REGISTER.raw) {
+ *			// Do something with val (e.g. store it somewhere in
+ *			// test->priv) or simply ignore it.
+ *			...
+ *
+ *			return true;
+ *		}
+ *
+ *		return false;
+ *	}
+ *
+ *	static int my_test_init(struct kunit *test)
+ *	{
+ *		...
+ *
+ *		kunit_activate_static_stub(test,
+ *					   xe_mmio_intercept_read32,
+ *					   my_test_mmio_intercept_read32);
+ *
+ *		...
+ *	}
+ */
+
+bool xe_mmio_intercept_read8(struct kunit *test, struct xe_mmio *mmio,
+			     struct xe_reg reg, u8 *val)
+{
+	KUNIT_STATIC_STUB_REDIRECT(xe_mmio_intercept_read8, test, mmio, reg, val);
+
+	return false;
+}
+
+bool xe_mmio_intercept_read16(struct kunit *test, struct xe_mmio *mmio,
+			      struct xe_reg reg, u16 *val)
+{
+	KUNIT_STATIC_STUB_REDIRECT(xe_mmio_intercept_read16, test, mmio, reg, val);
+
+	return false;
+}
+
+bool xe_mmio_intercept_read32(struct kunit *test, struct xe_mmio *mmio,
+			      struct xe_reg reg, u32 *val)
+{
+	KUNIT_STATIC_STUB_REDIRECT(xe_mmio_intercept_read32, test, mmio, reg, val);
+
+	return false;
+}
+
+bool xe_mmio_intercept_write32(struct kunit *test, struct xe_mmio *mmio,
+			       struct xe_reg reg, u32 val)
+{
+	KUNIT_STATIC_STUB_REDIRECT(xe_mmio_intercept_write32, test, mmio, reg, val);
+
+	return false;
+}
diff --git a/drivers/gpu/drm/xe/tests/xe_mmio_intercept.h b/drivers/gpu/drm/xe/tests/xe_mmio_intercept.h
new file mode 100644
index 000000000000..c68d01c04c35
--- /dev/null
+++ b/drivers/gpu/drm/xe/tests/xe_mmio_intercept.h
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0 AND MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_MMIO_INTERCEPT_H_
+#define _XE_MMIO_INTERCEPT_H_
+
+#include <linux/types.h>
+
+#include "regs/xe_reg_defs.h"
+
+struct kunit;
+
+struct xe_mmio;
+
+bool xe_mmio_intercept_read8(struct kunit *test, struct xe_mmio *mmio,
+			     struct xe_reg reg, u8 *val);
+bool xe_mmio_intercept_read16(struct kunit *test, struct xe_mmio *mmio,
+			      struct xe_reg reg, u16 *val);
+bool xe_mmio_intercept_read32(struct kunit *test, struct xe_mmio *mmio,
+			      struct xe_reg reg, u32 *val);
+bool xe_mmio_intercept_write32(struct kunit *test, struct xe_mmio *mmio,
+			       struct xe_reg reg, u32 val);
+
+#endif
diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c
index 0f9a1d5453df..20cd06728984 100644
--- a/drivers/gpu/drm/xe/xe_mmio.c
+++ b/drivers/gpu/drm/xe/xe_mmio.c
@@ -147,7 +147,8 @@ u8 xe_mmio_read8(struct xe_mmio *mmio, struct xe_reg reg)
 	u32 addr = xe_mmio_adjusted_addr(mmio, reg.addr);
 	u8 val;
 
-	xe_kunit_mmio_abort_if_not_live_test(mmio, reg);
+	if (xe_kunit_mmio_read8(mmio, reg, &val))
+		return val;
 
 	mmio_flush_pending_writes(mmio);
 
@@ -162,7 +163,8 @@ u16 xe_mmio_read16(struct xe_mmio *mmio, struct xe_reg reg)
 	u32 addr = xe_mmio_adjusted_addr(mmio, reg.addr);
 	u16 val;
 
-	xe_kunit_mmio_abort_if_not_live_test(mmio, reg);
+	if (xe_kunit_mmio_read16(mmio, reg, &val))
+		return val;
 
 	mmio_flush_pending_writes(mmio);
 
@@ -176,7 +178,8 @@ void xe_mmio_write32(struct xe_mmio *mmio, struct xe_reg reg, u32 val)
 {
 	u32 addr = xe_mmio_adjusted_addr(mmio, reg.addr);
 
-	xe_kunit_mmio_abort_if_not_live_test(mmio, reg);
+	if (xe_kunit_mmio_write32(mmio, reg, val))
+		return;
 
 	trace_xe_reg_rw(mmio, true, addr, val, sizeof(val));
 
@@ -192,7 +195,8 @@ u32 xe_mmio_read32(struct xe_mmio *mmio, struct xe_reg reg)
 	u32 addr = xe_mmio_adjusted_addr(mmio, reg.addr);
 	u32 val;
 
-	xe_kunit_mmio_abort_if_not_live_test(mmio, reg);
+	if (xe_kunit_mmio_read32(mmio, reg, &val))
+		return val;
 
 	mmio_flush_pending_writes(mmio);
 

-- 
2.52.0

[PATCH 07/12] drm/xe: Extract xe_hw_engine_setup_reg_lrc()

[Gustavo Sousa]

The steps for processing RTP rules that build up an engine's reg_lrc
arguably belongs to xe_hw_engine.c and should be encapsulated into a
function.  Furthermore, we will want to use that function and avoid
calling xe_gt_record_default_lrcs() in upcoming changes to xe_wa_test.c.

Move that logic to a new function called xe_hw_engine_setup_reg_lrc().

Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/xe/xe_gt.c        |  5 +----
 drivers/gpu/drm/xe/xe_hw_engine.c | 15 +++++++++++++--
 drivers/gpu/drm/xe/xe_hw_engine.h |  2 +-
 3 files changed, 15 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index 9d090d0f2438..68cd26286956 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -348,10 +348,7 @@ int xe_gt_record_default_lrcs(struct xe_gt *gt)
 		if (gt->default_lrc[hwe->class])
 			continue;
 
-		xe_reg_sr_init(&hwe->reg_lrc, hwe->name, xe);
-		xe_wa_process_lrc(hwe);
-		xe_hw_engine_setup_default_lrc_state(hwe);
-		xe_tuning_process_lrc(hwe);
+		xe_hw_engine_setup_reg_lrc(hwe);
 
 		default_lrc = drmm_kzalloc(&xe->drm,
 					   xe_gt_lrc_size(gt, hwe->class),
diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
index 4d3ee5226e3a..8d239291bc7b 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine.c
+++ b/drivers/gpu/drm/xe/xe_hw_engine.c
@@ -374,8 +374,8 @@ static bool xe_rtp_cfeg_wmtp_disabled(const struct xe_device *xe,
 	return xe_mmio_read32(&hwe->gt->mmio, XEHP_FUSE4) & CFEG_WMTP_DISABLE;
 }
 
-void
-xe_hw_engine_setup_default_lrc_state(struct xe_hw_engine *hwe)
+static void
+hw_engine_setup_default_lrc_state(struct xe_hw_engine *hwe)
 {
 	struct xe_gt *gt = hwe->gt;
 	const u8 mocs_write_idx = gt->mocs.uc_index;
@@ -411,6 +411,17 @@ xe_hw_engine_setup_default_lrc_state(struct xe_hw_engine *hwe)
 	xe_rtp_process_to_sr(&ctx, lrc_setup, ARRAY_SIZE(lrc_setup), &hwe->reg_lrc);
 }
 
+void xe_hw_engine_setup_reg_lrc(struct xe_hw_engine *hwe)
+{
+	struct xe_gt *gt = hwe->gt;
+	struct xe_device *xe = gt_to_xe(gt);
+
+	xe_reg_sr_init(&hwe->reg_lrc, hwe->name, xe);
+	xe_wa_process_lrc(hwe);
+	hw_engine_setup_default_lrc_state(hwe);
+	xe_tuning_process_lrc(hwe);
+}
+
 static void
 hw_engine_setup_default_state(struct xe_hw_engine *hwe)
 {
diff --git a/drivers/gpu/drm/xe/xe_hw_engine.h b/drivers/gpu/drm/xe/xe_hw_engine.h
index 6b5f9fa2a594..7e897620db65 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine.h
+++ b/drivers/gpu/drm/xe/xe_hw_engine.h
@@ -59,7 +59,7 @@ struct xe_hw_engine_snapshot *
 xe_hw_engine_snapshot_capture(struct xe_hw_engine *hwe, struct xe_exec_queue *q);
 void xe_hw_engine_snapshot_free(struct xe_hw_engine_snapshot *snapshot);
 void xe_hw_engine_print(struct xe_hw_engine *hwe, struct drm_printer *p);
-void xe_hw_engine_setup_default_lrc_state(struct xe_hw_engine *hwe);
+void xe_hw_engine_setup_reg_lrc(struct xe_hw_engine *hwe);
 
 bool xe_hw_engine_is_reserved(struct xe_hw_engine *hwe);
 

-- 
2.52.0

[PATCH 08/12] drm/xe: Extract xe_hw_engines_setup_runtime_mask()

[Gustavo Sousa]

The function xe_hw_engines_init_early() does several runtime checks to
adjust engine_mask and only after that does the hw_engine_init_early()
calls to do the early initialization.

In an upcoming change to xe_wa_test.c, we will want to be able to call
that function without those runtime checks.  So, let's extract them into
a new function called xe_hw_engines_setup_runtime_mask() and have the
current caller of xe_hw_engines_init_early() to call it first.

Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/xe/xe_gt.c        | 2 ++
 drivers/gpu/drm/xe/xe_hw_engine.c | 9 ++++++---
 drivers/gpu/drm/xe/xe_hw_engine.h | 1 +
 3 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index 68cd26286956..f7f0c048a00a 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -507,6 +507,8 @@ static int gt_init_with_gt_forcewake(struct xe_gt *gt)
 	/* Rerun MCR init as we now have hw engine list */
 	xe_gt_mcr_init(gt);
 
+	xe_hw_engines_setup_runtime_mask(gt);
+
 	err = xe_hw_engines_init_early(gt);
 	if (err) {
 		dump_pat_on_error(gt);
diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
index 8d239291bc7b..c2de6e5d9249 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine.c
+++ b/drivers/gpu/drm/xe/xe_hw_engine.c
@@ -868,15 +868,18 @@ static void check_sw_disable(struct xe_gt *gt)
 	}
 }
 
-int xe_hw_engines_init_early(struct xe_gt *gt)
+void xe_hw_engines_setup_runtime_mask(struct xe_gt *gt)
 {
-	int i;
-
 	read_media_fuses(gt);
 	read_copy_fuses(gt);
 	read_compute_fuses(gt);
 	check_gsc_availability(gt);
 	check_sw_disable(gt);
+}
+
+int xe_hw_engines_init_early(struct xe_gt *gt)
+{
+	int i;
 
 	BUILD_BUG_ON(XE_HW_ENGINE_PREEMPT_TIMEOUT < XE_HW_ENGINE_PREEMPT_TIMEOUT_MIN);
 	BUILD_BUG_ON(XE_HW_ENGINE_PREEMPT_TIMEOUT > XE_HW_ENGINE_PREEMPT_TIMEOUT_MAX);
diff --git a/drivers/gpu/drm/xe/xe_hw_engine.h b/drivers/gpu/drm/xe/xe_hw_engine.h
index 7e897620db65..6729ebf0462c 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine.h
+++ b/drivers/gpu/drm/xe/xe_hw_engine.h
@@ -49,6 +49,7 @@ struct xe_exec_queue;
 #define XE_HW_ENGINE_PREEMPT_TIMEOUT_MAX (10 * 1000 * 1000)
 #endif
 
+void xe_hw_engines_setup_runtime_mask(struct xe_gt *gt);
 int xe_hw_engines_init_early(struct xe_gt *gt);
 int xe_hw_engines_init(struct xe_gt *gt);
 void xe_hw_engine_handle_irq(struct xe_hw_engine *hwe, u16 intr_vec);

-- 
2.52.0

[PATCH 09/12] drm/xe/kunit: Use KUNIT_EXPECT_EQ() in xe_wa_gt()

[Gustavo Sousa]

Use KUNIT_EXPECT_EQ() in xe_wa_gt() as reg_sr errors in one GT do not
impact the next GT in the test.

Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/xe/tests/xe_wa_test.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/tests/xe_wa_test.c b/drivers/gpu/drm/xe/tests/xe_wa_test.c
index 49d191043dfa..2bf6fab015cd 100644
--- a/drivers/gpu/drm/xe/tests/xe_wa_test.c
+++ b/drivers/gpu/drm/xe/tests/xe_wa_test.c
@@ -55,7 +55,7 @@ static void xe_wa_gt(struct kunit *test)
 		xe_wa_process_gt(gt);
 		xe_tuning_process_gt(gt);
 
-		KUNIT_ASSERT_EQ(test, gt->reg_sr.errors, 0);
+		KUNIT_EXPECT_EQ(test, gt->reg_sr.errors, 0);
 	}
 }
 

-- 
2.52.0

[PATCH 10/12] drm/xe/kunit: Include hw_engines in xe_wa test

[Gustavo Sousa]

For better coverage, include RTP to register save/store processing for
hw_engines as another xe_wa test case.

Note that, since one of the RTP rules involve calling
xe_rtp_cfeg_wmtp_disabled(), we need to intercept a MMIO read to
XEHP_FUSE4 to allow the test to run without crashing.

Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/xe/tests/xe_wa_test.c | 50 ++++++++++++++++++++++++++++++++++-
 1 file changed, 49 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/tests/xe_wa_test.c b/drivers/gpu/drm/xe/tests/xe_wa_test.c
index 2bf6fab015cd..3311f05a6fc2 100644
--- a/drivers/gpu/drm/xe/tests/xe_wa_test.c
+++ b/drivers/gpu/drm/xe/tests/xe_wa_test.c
@@ -6,15 +6,34 @@
 #include <drm/drm_drv.h>
 #include <drm/drm_kunit_helpers.h>
 
+#include <kunit/static_stub.h>
 #include <kunit/test.h>
 
+#include "regs/xe_gt_regs.h"
+#include "tests/xe_mmio_intercept.h"
 #include "xe_device.h"
+#include "xe_gt.h"
+#include "xe_hw_engine.h"
 #include "xe_kunit_helpers.h"
 #include "xe_pci_test.h"
 #include "xe_reg_sr.h"
 #include "xe_tuning.h"
 #include "xe_wa.h"
 
+static bool xe_wa_mmio_intercept_read32(struct kunit *test,
+					struct xe_mmio *mmio,
+					struct xe_reg reg,
+					u32 *val)
+{
+	/* For XE_RTP_RULES(...FUNC(xe_rtp_cfeg_wmtp_disabled)...). */
+	if (reg.raw == XEHP_FUSE4.raw) {
+		*val = CFEG_WMTP_DISABLE;
+		return true;
+	}
+
+	return false;
+}
+
 static int xe_wa_test_init(struct kunit *test)
 {
 	const struct xe_pci_fake_data *param = test->param_value;
@@ -33,10 +52,13 @@ static int xe_wa_test_init(struct kunit *test)
 	ret = xe_pci_fake_device_init(xe);
 	KUNIT_ASSERT_EQ(test, ret, 0);
 
+	kunit_activate_static_stub(test,
+				   xe_mmio_intercept_read32,
+				   xe_wa_mmio_intercept_read32);
+
 	if (!param->graphics_verx100)
 		xe->info.step = param->step;
 
-	/* TODO: init hw engines for engine/LRC WAs */
 	xe->drm.dev = dev;
 	test->priv = xe;
 
@@ -59,8 +81,34 @@ static void xe_wa_gt(struct kunit *test)
 	}
 }
 
+static void xe_wa_hw_engines(struct kunit *test)
+{
+	struct xe_device *xe = test->priv;
+	struct xe_gt *gt;
+	int id;
+
+	for_each_gt(gt, xe, id) {
+		struct xe_hw_engine *hwe;
+		int hwe_id;
+
+		/*
+		 * The early initialization also causes RTP processing to build
+		 * up each engine's reg_sr.
+		 */
+		xe_hw_engines_init_early(gt);
+		for_each_hw_engine(hwe, gt, hwe_id)
+			KUNIT_EXPECT_EQ(test, hwe->reg_sr.errors, 0);
+
+		for_each_hw_engine(hwe, gt, hwe_id) {
+			xe_hw_engine_setup_reg_lrc(hwe);
+			KUNIT_EXPECT_EQ(test, hwe->reg_lrc.errors, 0);
+		}
+	}
+}
+
 static struct kunit_case xe_wa_tests[] = {
 	KUNIT_CASE_PARAM(xe_wa_gt, xe_pci_fake_data_gen_params),
+	KUNIT_CASE_PARAM(xe_wa_hw_engines, xe_pci_fake_data_gen_params),
 	{}
 };
 

-- 
2.52.0

[PATCH 11/12] drm/xe/mcr: Extract reg_in_steering_type_ranges()

[Gustavo Sousa]

The logic to check if a register falls within one of the ranges for a
steering type is already duplicated in
xe_gt_mcr_get_nonterminated_steering().  We will also want to use that
same logic in another upcoming function.  Let's factor out that logic
and put it into a function named reg_in_steering_type_ranges().

Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/xe/xe_gt_mcr.c | 43 +++++++++++++++++++++++-------------------
 1 file changed, 24 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_gt_mcr.c b/drivers/gpu/drm/xe/xe_gt_mcr.c
index 7c1fe9ac120d..e7eb3c6da234 100644
--- a/drivers/gpu/drm/xe/xe_gt_mcr.c
+++ b/drivers/gpu/drm/xe/xe_gt_mcr.c
@@ -609,6 +609,20 @@ void xe_gt_mcr_set_implicit_defaults(struct xe_gt *gt)
 	}
 }
 
+static bool reg_in_steering_type_ranges(struct xe_gt *gt,
+					struct xe_reg reg,
+					int type)
+{
+	if (!gt->steering[type].ranges)
+		return false;
+
+	for (int i = 0; gt->steering[type].ranges[i].end > 0; i++)
+		if (xe_mmio_in_range(&gt->mmio, &gt->steering[type].ranges[i], reg))
+			return true;
+
+	return false;
+}
+
 /*
  * xe_gt_mcr_get_nonterminated_steering - find group/instance values that
  *    will steer a register to a non-terminated instance
@@ -630,30 +644,21 @@ bool xe_gt_mcr_get_nonterminated_steering(struct xe_gt *gt,
 					  u8 *group, u8 *instance)
 {
 	const struct xe_reg reg = to_xe_reg(reg_mcr);
-	const struct xe_mmio_range *implicit_ranges;
 
 	for (int type = 0; type < IMPLICIT_STEERING; type++) {
-		if (!gt->steering[type].ranges)
-			continue;
-
-		for (int i = 0; gt->steering[type].ranges[i].end > 0; i++) {
-			if (xe_mmio_in_range(&gt->mmio, &gt->steering[type].ranges[i], reg)) {
-				drm_WARN(&gt_to_xe(gt)->drm, !gt->steering[type].initialized,
-					 "Uninitialized usage of MCR register %s/%#x\n",
-					 xe_steering_types[type].name, reg.addr);
-
-				*group = gt->steering[type].group_target;
-				*instance = gt->steering[type].instance_target;
-				return true;
-			}
+		if (reg_in_steering_type_ranges(gt, reg, type)) {
+			drm_WARN(&gt_to_xe(gt)->drm, !gt->steering[type].initialized,
+				 "Uninitialized usage of MCR register %s/%#x\n",
+				 xe_steering_types[type].name, reg.addr);
+
+			*group = gt->steering[type].group_target;
+			*instance = gt->steering[type].instance_target;
+			return true;
 		}
 	}
 
-	implicit_ranges = gt->steering[IMPLICIT_STEERING].ranges;
-	if (implicit_ranges)
-		for (int i = 0; implicit_ranges[i].end > 0; i++)
-			if (xe_mmio_in_range(&gt->mmio, &implicit_ranges[i], reg))
-				return false;
+	if (reg_in_steering_type_ranges(gt, reg, IMPLICIT_STEERING))
+		return false;
 
 	/*
 	 * Not found in a steering table and not a register with implicit

-- 
2.52.0

[PATCH 12/12] drm/xe/reg_sr: Do sanity check for MCR vs non-MCR

[Gustavo Sousa]

The type struct xe_reg_mcr exists to ensure that the correct API is used
when handling MCR registers.  However, for in the register save/restore
functionality, the RTP processing always cast the register to a struct
xe_reg and then apply_one_mmio() selects the MMIO API based on the "mcr"
field of the register instance.

This allows the developer to commit mistakes like passing a MCR register
for an RTP action for a platform where the respective register is not
MCR; and vice-versa.

To capture such scenarios, do a sanity check in xe_reg_sr_add() and
raise warnings if inconsistencies are detected.

Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/xe/tests/xe_rtp_test.c | 71 ++++++++++++++++++++++++++++++----
 drivers/gpu/drm/xe/tests/xe_wa_test.c  | 11 +++++-
 drivers/gpu/drm/xe/xe_gt_mcr.c         | 21 ++++++++++
 drivers/gpu/drm/xe/xe_gt_mcr.h         |  1 +
 drivers/gpu/drm/xe/xe_reg_sr.c         | 36 +++++++++++++++++
 5 files changed, 132 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/xe/tests/xe_rtp_test.c b/drivers/gpu/drm/xe/tests/xe_rtp_test.c
index d2255a59e58f..80bd83f56d04 100644
--- a/drivers/gpu/drm/xe/tests/xe_rtp_test.c
+++ b/drivers/gpu/drm/xe/tests/xe_rtp_test.c
@@ -9,24 +9,30 @@
 #include <drm/drm_drv.h>
 #include <drm/drm_kunit_helpers.h>
 
+#include <kunit/static_stub.h>
 #include <kunit/test.h>
 
 #include "regs/xe_gt_regs.h"
 #include "regs/xe_reg_defs.h"
 #include "xe_device.h"
 #include "xe_device_types.h"
+#include "xe_gt_mcr.h"
 #include "xe_kunit_helpers.h"
 #include "xe_pci_test.h"
 #include "xe_reg_sr.h"
 #include "xe_rtp.h"
 
-#define REGULAR_REG1	XE_REG(1)
-#define REGULAR_REG2	XE_REG(2)
-#define REGULAR_REG3	XE_REG(3)
-#define MCR_REG1	XE_REG_MCR(1)
-#define MCR_REG2	XE_REG_MCR(2)
-#define MCR_REG3	XE_REG_MCR(3)
-#define MASKED_REG1	XE_REG(1, XE_REG_OPTION_MASKED)
+#define REGULAR_REG1		XE_REG(1)
+#define REGULAR_REG2		XE_REG(2)
+#define REGULAR_REG3		XE_REG(3)
+#define REGULAR_REG4		XE_REG(4)
+#define BAD_REGULAR_REG5	XE_REG(5)
+#define MCR_REG1		XE_REG_MCR(1)
+#define MCR_REG2		XE_REG_MCR(2)
+#define MCR_REG3		XE_REG_MCR(3)
+#define BAD_MCR_REG4		XE_REG_MCR(4)
+#define MCR_REG5		XE_REG_MCR(5)
+#define MASKED_REG1		XE_REG(1, XE_REG_OPTION_MASKED)
 
 #undef XE_REG_MCR
 #define XE_REG_MCR(...)     XE_REG(__VA_ARGS__, .mcr = 1)
@@ -48,6 +54,23 @@ struct rtp_test_case {
 	const struct xe_rtp_entry *entries;
 };
 
+static bool fake_xe_gt_mcr_check_reg(struct xe_gt *gt, struct xe_reg reg)
+{
+	/*
+	 * All supported platforms in this imaginary setup will always have REG4
+	 * as a non-MCR register and REG5 as MCR, meaning that BAD_MCR_REG4 and
+	 * BAD_REGULAR_REG5 represent programming errors to be captured by our
+	 * tests.
+	 */
+	if (reg.raw == BAD_REGULAR_REG5.raw)
+		return true;
+
+	if (reg.raw == BAD_MCR_REG4.raw)
+		return false;
+
+	return reg.mcr;
+}
+
 static bool match_yes(const struct xe_device *xe, const struct xe_gt *gt,
 		      const struct xe_hw_engine *hwe)
 {
@@ -304,6 +327,38 @@ static const struct rtp_to_sr_test_case rtp_to_sr_cases[] = {
 			{}
 		},
 	},
+	{
+		.name = "bad-mcr-reg-forced-to-regular",
+		.expected_reg = REGULAR_REG4,
+		.expected_set_bits = REG_BIT(0),
+		.expected_clr_bits = REG_BIT(0),
+		.expected_active = BIT(0),
+		.expected_count_sr_entries = 1,
+		.expected_sr_errors = 1,
+		.entries = (const struct xe_rtp_entry_sr[]) {
+			{ XE_RTP_NAME("bad-mcr-regular-reg"),
+			  XE_RTP_RULES(FUNC(match_yes)),
+			  XE_RTP_ACTIONS(SET(BAD_MCR_REG4, REG_BIT(0)))
+			},
+			{}
+		},
+	},
+	{
+		.name = "bad-regular-reg-forced-to-mcr",
+		.expected_reg = MCR_REG5,
+		.expected_set_bits = REG_BIT(0),
+		.expected_clr_bits = REG_BIT(0),
+		.expected_active = BIT(0),
+		.expected_count_sr_entries = 1,
+		.expected_sr_errors = 1,
+		.entries = (const struct xe_rtp_entry_sr[]) {
+			{ XE_RTP_NAME("bad-regular-reg"),
+			  XE_RTP_RULES(FUNC(match_yes)),
+			  XE_RTP_ACTIONS(SET(BAD_REGULAR_REG5, REG_BIT(0)))
+			},
+			{}
+		},
+	},
 };
 
 static void xe_rtp_process_to_sr_tests(struct kunit *test)
@@ -522,6 +577,8 @@ static int xe_rtp_test_init(struct kunit *test)
 	xe->drm.dev = dev;
 	test->priv = xe;
 
+	kunit_activate_static_stub(test, xe_gt_mcr_check_reg, fake_xe_gt_mcr_check_reg);
+
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/xe/tests/xe_wa_test.c b/drivers/gpu/drm/xe/tests/xe_wa_test.c
index 3311f05a6fc2..326278488cdb 100644
--- a/drivers/gpu/drm/xe/tests/xe_wa_test.c
+++ b/drivers/gpu/drm/xe/tests/xe_wa_test.c
@@ -13,6 +13,7 @@
 #include "tests/xe_mmio_intercept.h"
 #include "xe_device.h"
 #include "xe_gt.h"
+#include "xe_gt_mcr.h"
 #include "xe_hw_engine.h"
 #include "xe_kunit_helpers.h"
 #include "xe_pci_test.h"
@@ -38,8 +39,10 @@ static int xe_wa_test_init(struct kunit *test)
 {
 	const struct xe_pci_fake_data *param = test->param_value;
 	struct xe_pci_fake_data data = *param;
-	struct xe_device *xe;
 	struct device *dev;
+	struct xe_device *xe;
+	struct xe_gt *gt;
+	int id;
 	int ret;
 
 	dev = drm_kunit_helper_alloc_device(test);
@@ -52,6 +55,12 @@ static int xe_wa_test_init(struct kunit *test)
 	ret = xe_pci_fake_device_init(xe);
 	KUNIT_ASSERT_EQ(test, ret, 0);
 
+	/* Needed for sanitize_mcr(). */
+	for_each_gt(gt, xe, id) {
+		xe_gt_mcr_init_early(gt);
+		xe_gt_mmio_init(gt);
+	}
+
 	kunit_activate_static_stub(test,
 				   xe_mmio_intercept_read32,
 				   xe_wa_mmio_intercept_read32);
diff --git a/drivers/gpu/drm/xe/xe_gt_mcr.c b/drivers/gpu/drm/xe/xe_gt_mcr.c
index e7eb3c6da234..c6d9766b6cc6 100644
--- a/drivers/gpu/drm/xe/xe_gt_mcr.c
+++ b/drivers/gpu/drm/xe/xe_gt_mcr.c
@@ -3,6 +3,8 @@
  * Copyright © 2022 Intel Corporation
  */
 
+#include <kunit/static_stub.h>
+
 #include "xe_gt_mcr.h"
 
 #include "regs/xe_gt_regs.h"
@@ -623,6 +625,25 @@ static bool reg_in_steering_type_ranges(struct xe_gt *gt,
 	return false;
 }
 
+/*
+ * xe_gt_mcr_check_reg - check if a register is recognized by this GT as MCR
+ * @gt: GT structure
+ * @reg: The register to check
+ *
+ * Returns true if the register offset falls within one of the MMIO ranges
+ * classified as MCR for the GT.
+ */
+bool xe_gt_mcr_check_reg(struct xe_gt *gt, struct xe_reg reg)
+{
+	KUNIT_STATIC_STUB_REDIRECT(xe_gt_mcr_check_reg, gt, reg);
+
+	for (int type = 0; type <= IMPLICIT_STEERING; type++)
+		if (reg_in_steering_type_ranges(gt, reg, type))
+			return true;
+
+	return false;
+}
+
 /*
  * xe_gt_mcr_get_nonterminated_steering - find group/instance values that
  *    will steer a register to a non-terminated instance
diff --git a/drivers/gpu/drm/xe/xe_gt_mcr.h b/drivers/gpu/drm/xe/xe_gt_mcr.h
index 283a1c9770e2..d6b50b52b1d5 100644
--- a/drivers/gpu/drm/xe/xe_gt_mcr.h
+++ b/drivers/gpu/drm/xe/xe_gt_mcr.h
@@ -26,6 +26,7 @@ void xe_gt_mcr_unicast_write(struct xe_gt *gt, struct xe_reg_mcr mcr_reg,
 void xe_gt_mcr_multicast_write(struct xe_gt *gt, struct xe_reg_mcr mcr_reg,
 			       u32 value);
 
+bool xe_gt_mcr_check_reg(struct xe_gt *gt, struct xe_reg reg);
 bool xe_gt_mcr_get_nonterminated_steering(struct xe_gt *gt,
 					  struct xe_reg_mcr reg_mcr,
 					  u8 *group, u8 *instance);
diff --git a/drivers/gpu/drm/xe/xe_reg_sr.c b/drivers/gpu/drm/xe/xe_reg_sr.c
index d3e13ea33123..89d35301defa 100644
--- a/drivers/gpu/drm/xe/xe_reg_sr.c
+++ b/drivers/gpu/drm/xe/xe_reg_sr.c
@@ -68,14 +68,49 @@ static void reg_sr_inc_error(struct xe_reg_sr *sr)
 #endif
 }
 
+static struct xe_reg sanitize_mcr(struct xe_reg_sr *sr,
+				  const struct xe_reg_sr_entry *e,
+				  struct xe_gt *gt)
+{
+	struct xe_reg reg = e->reg;
+	bool is_mcr;
+
+	/*
+	 * We need the gt structure to check MCR ranges.
+	 */
+	if (!gt)
+		return reg;
+
+	is_mcr = xe_gt_mcr_check_reg(gt, reg);
+
+	if (is_mcr && !reg.mcr) {
+		reg.mcr = 1;
+		xe_gt_warn(gt, "xe_reg_sr_entry using non-MCR register for address 0x%x, forcing MCR\n",
+			   reg.addr);
+		reg_sr_inc_error(sr);
+	}
+
+	if (!is_mcr && reg.mcr) {
+		reg.mcr = 0;
+		xe_gt_warn(gt, "xe_reg_sr_entry using MCR register for address 0x%x, forcing non-MCR\n",
+			   reg.addr);
+		reg_sr_inc_error(sr);
+	}
+
+	return reg;
+}
+
 int xe_reg_sr_add(struct xe_reg_sr *sr,
 		  const struct xe_reg_sr_entry *e,
 		  struct xe_gt *gt)
 {
 	unsigned long idx = e->reg.addr;
 	struct xe_reg_sr_entry *pentry = xa_load(&sr->xa, idx);
+	struct xe_reg reg;
 	int ret;
 
+	reg = sanitize_mcr(sr, e, gt);
+
 	if (pentry) {
 		if (!compatible_entries(pentry, e)) {
 			ret = -EINVAL;
@@ -96,6 +131,7 @@ int xe_reg_sr_add(struct xe_reg_sr *sr,
 	}
 
 	*pentry = *e;
+	pentry->reg = reg;
 	ret = xa_err(xa_store(&sr->xa, idx, pentry, GFP_KERNEL));
 	if (ret)
 		goto fail;

-- 
2.52.0

Re: [PATCH 04/12] drm/xe/kunit: Add xe_kunit_is_live_test()

[Michal Wajdeczko]

On 1/16/2026 11:12 PM, Gustavo Sousa wrote:
> In upcoming changes we will need to differentiate between regular and
> live KUnit tests.  Add the function xe_kunit_is_live_test() for that
> purpose.

since you are adding this function to xe_kunit_helper.h maybe it should be named as

	xe_kunit_helper_is_live_test(test)

to follow other function names in this file?

> 
> Note that this is implemented in a rather hackish way, by leveraging
> KUnit's static stubbing functionality.  A better approach would be to
> store a boolean somewhere in test->priv that would tell if a test is a
> live one, however that's not quite feasible today given the inconsistent
> usage of test->priv (there is not a single uniform type of data assigned
> to it across existing test).

all live tests code should finally have access to the xe_device so alternate option would be to add some flag(s) there

	struct xe_device {
	...
	#if IS_ENABLED(CONFIG_DRM_XE_KUNIT_TEST)
		struct {
			bool live_testing_in_progress;
		} kunit;
	#endif

but IMO solution with static stub is fine

> 
> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
> ---
>  drivers/gpu/drm/xe/tests/xe_kunit_helpers.c | 25 +++++++++++++++++++++++++
>  drivers/gpu/drm/xe/tests/xe_kunit_helpers.h |  4 ++++
>  2 files changed, 29 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/tests/xe_kunit_helpers.c b/drivers/gpu/drm/xe/tests/xe_kunit_helpers.c
> index bc5156966ce9..369b26b3a32c 100644
> --- a/drivers/gpu/drm/xe/tests/xe_kunit_helpers.c
> +++ b/drivers/gpu/drm/xe/tests/xe_kunit_helpers.c
> @@ -16,6 +16,18 @@
>  #include "xe_device_types.h"
>  #include "xe_pm.h"
>  
> +/**
> + * xe_kunit_is_live_test - Return true if @test is a live test.
> + * @test: the &kunit test
> + *
> + * Return: True for a live test and false otherwise.
> + */
> +bool xe_kunit_is_live_test(struct kunit *test)
> +{
> +	KUNIT_STATIC_STUB_REDIRECT(xe_kunit_is_live_test, test);
> +	return false;
> +}
> +
>  /**
>   * xe_kunit_helper_alloc_xe_device - Allocate a &xe_device for a KUnit test.
>   * @test: the &kunit where this &xe_device will be used
> @@ -93,6 +105,11 @@ EXPORT_SYMBOL_IF_KUNIT(xe_kunit_helper_xe_device_test_init);
>  
>  KUNIT_DEFINE_ACTION_WRAPPER(put_xe_pm_runtime, xe_pm_runtime_put, struct xe_device *);
>  
> +static bool xe_kunit_is_live_test_indeed(struct kunit *test)
> +{
> +	return true;
> +}
> +
>  /**
>   * xe_kunit_helper_xe_device_live_test_init - Prepare a &xe_device for
>   *                                            use in a live KUnit test.
> @@ -116,6 +133,14 @@ int xe_kunit_helper_xe_device_live_test_init(struct kunit *test)
>  {
>  	struct xe_device *xe = xe_device_const_cast(test->param_value);
>  
> +	/*
> +	 * FIXME: This is a hack and a better solution is to have the "priv"
> +	 * member of tests have a boolean to tell if a test is a live one.
> +	 * Unfortunately that can't be done today because "priv" does not point
> +	 * to a single unified type across existing tests.

note that we use priv to pass xe, and likely if any other live init hook will replace it,
priv will still point to either tile or gt or similar object, from which we should be able to reach xe again

> +	 */
> +	kunit_activate_static_stub(test, xe_kunit_is_live_test, xe_kunit_is_live_test_indeed);
> +
>  	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, xe);
>  	kunit_info(test, "running on %s device\n", xe->info.platform_name);
>  
> diff --git a/drivers/gpu/drm/xe/tests/xe_kunit_helpers.h b/drivers/gpu/drm/xe/tests/xe_kunit_helpers.h
> index 83665f7b1254..4b846cfb1f40 100644
> --- a/drivers/gpu/drm/xe/tests/xe_kunit_helpers.h
> +++ b/drivers/gpu/drm/xe/tests/xe_kunit_helpers.h
> @@ -6,10 +6,14 @@
>  #ifndef _XE_KUNIT_HELPERS_H_
>  #define _XE_KUNIT_HELPERS_H_
>  
> +#include <linux/types.h>
> +
>  struct device;
>  struct kunit;
>  struct xe_device;
>  
> +bool xe_kunit_is_live_test(struct kunit *test);
> +
>  struct xe_device *xe_kunit_helper_alloc_xe_device(struct kunit *test,
>  						  struct device *dev);
>  int xe_kunit_helper_xe_device_test_init(struct kunit *test);
> 

✗ CI.checkpatch: warning for Fix MCR inconsistencies in RTP tables

[Patchwork]

== Series Details ==

Series: Fix MCR inconsistencies in RTP tables
URL   : https://patchwork.freedesktop.org/series/160223/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
ee83616c430ce70bd254bd2774d143a5733c8666
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 86c91aa9da5c9c898586b54a74de10847edfd89f
Author: Gustavo Sousa <gustavo.sousa@intel.com>
Date:   Fri Jan 16 19:12:20 2026 -0300

    drm/xe/reg_sr: Do sanity check for MCR vs non-MCR
    
    The type struct xe_reg_mcr exists to ensure that the correct API is used
    when handling MCR registers.  However, for in the register save/restore
    functionality, the RTP processing always cast the register to a struct
    xe_reg and then apply_one_mmio() selects the MMIO API based on the "mcr"
    field of the register instance.
    
    This allows the developer to commit mistakes like passing a MCR register
    for an RTP action for a platform where the respective register is not
    MCR; and vice-versa.
    
    To capture such scenarios, do a sanity check in xe_reg_sr_add() and
    raise warnings if inconsistencies are detected.
    
    Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
+ /mt/dim checkpatch 0f3aa82816dce3da347333a317ea112d16e5d237 drm-intel
bfb25d30a24e drm/xe: Define CACHE_MODE_1 as MCR register
673ed5a01ed4 drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN1
1241bff4d010 drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN4
87917ffc18c0 drm/xe/kunit: Add xe_kunit_is_live_test()
5c26fecd3c4e drm/xe/kunit: Abort test if MMIO operation is attempted
-:32: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#32: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 108 lines checked
19f20fd9f766 drm/xe/kunit: Allow intercepting MMIO operations
-:165: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#165: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 308 lines checked
06dfac910deb drm/xe: Extract xe_hw_engine_setup_reg_lrc()
1869343aa59e drm/xe: Extract xe_hw_engines_setup_runtime_mask()
22d9a9b45672 drm/xe/kunit: Use KUNIT_EXPECT_EQ() in xe_wa_gt()
946a4b44b5d1 drm/xe/kunit: Include hw_engines in xe_wa test
17266dbb5bd1 drm/xe/mcr: Extract reg_in_steering_type_ranges()
86c91aa9da5c drm/xe/reg_sr: Do sanity check for MCR vs non-MCR

Re: [PATCH 05/12] drm/xe/kunit: Abort test if MMIO operation is attempted

[Michal Wajdeczko]

On 1/16/2026 11:12 PM, Gustavo Sousa wrote:
> Regular Xe KUnit tests (i.e. not the live ones) are usually run in
> User-Mode Linux and do not have access to the real hardware and, as
> such, should not attempt to do MMIO operations. If some test ends up
> exercising a path that contains MMIO operations, the test should be
> rewritten in a way that the MMIO is skipped or simulated (e.g. via a
> static stub).
> 
> Let's make sure to abort the test if MMIO is attempted on non-live
> tests.  Before aborting, use drm_WARN() to cause a stack trace to be
> logged as a debug aid to the developer.

maybe cleaner solution would be first to add to all xe_mmio functions:

	KUNIT_STATIC_STUB_REDIRECT

and then (in separate patch) activate "abort" stubs in xe_pci_fake_device_init,
similar to what we do with read_gmdid & xe_info_probe_tile_count

if any test would like to intercept some mmio read/writes it will just provide and activate its own stub
and such usage will be no different than any other use of stubs

this will allow to drop patch 6 which introduces (IMO unnecessary) another layer
(where test should stub another test function instead of the real function)

> 
> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
> ---
>  drivers/gpu/drm/xe/tests/Makefile        |  1 +
>  drivers/gpu/drm/xe/tests/xe_kunit_mmio.c | 35 ++++++++++++++++++++++++++++++++
>  drivers/gpu/drm/xe/tests/xe_kunit_mmio.h | 27 ++++++++++++++++++++++++
>  drivers/gpu/drm/xe/xe_mmio.c             |  9 ++++++++
>  4 files changed, 72 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/tests/Makefile b/drivers/gpu/drm/xe/tests/Makefile
> index 0e3408f4952c..8f3a594449c8 100644
> --- a/drivers/gpu/drm/xe/tests/Makefile
> +++ b/drivers/gpu/drm/xe/tests/Makefile
> @@ -8,6 +8,7 @@ xe_live_test-y = xe_live_test_mod.o
>  obj-$(CONFIG_DRM_XE_KUNIT_TEST) += xe_test.o
>  xe_test-y = xe_test_mod.o \
>  	xe_args_test.o \
> +	xe_kunit_mmio.o \
>  	xe_pci_test.o \
>  	xe_rtp_test.o \
>  	xe_wa_test.o
> diff --git a/drivers/gpu/drm/xe/tests/xe_kunit_mmio.c b/drivers/gpu/drm/xe/tests/xe_kunit_mmio.c
> new file mode 100644
> index 000000000000..debf8bd3f9dd
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/tests/xe_kunit_mmio.c
> @@ -0,0 +1,35 @@
> +// SPDX-License-Identifier: GPL-2.0 AND MIT
> +/*
> + * Copyright © 2026 Intel Corporation
> + */
> +
> +#include <kunit/test.h>
> +#include <kunit/test-bug.h>
> +
> +#include <drm/drm_print.h>
> +
> +#include "tests/xe_kunit_helpers.h"
> +#include "tests/xe_kunit_mmio.h"
> +#include "xe_device_types.h"
> +
> +/**
> + * xe_kunit_mmio_abort_if_not_live_test - Abort test execution if not in a live test.
> + * @mmio: MMIO target
> + * @reg: Register on which an MMIO operation is about to be performed
> + *
> + * This function must be called from xe_mmio functions that perform MMIO
> + * operations on the hardware.  If the current process is a kunit test and it is
> + * not a live test, it will cause a warn and abort the test; otherwise it does
> + * nothing.
> + */
> +void xe_kunit_mmio_abort_if_not_live_test(struct xe_mmio *mmio, struct xe_reg reg)
> +{
> +	struct xe_device *xe = tile_to_xe(mmio->tile);
> +	struct kunit *test = kunit_get_current_test();
> +
> +	if (!test || xe_kunit_is_live_test(test))
> +		return;
> +
> +	drm_WARN(&xe->drm, true, "MMIO function called on reg 0x%x\n", reg.addr);
> +	KUNIT_FAIL_AND_ABORT(test, "MMIO function called on reg 0x%x\n", reg.addr);
> +}
> diff --git a/drivers/gpu/drm/xe/tests/xe_kunit_mmio.h b/drivers/gpu/drm/xe/tests/xe_kunit_mmio.h
> new file mode 100644
> index 000000000000..d46ac2b82969
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/tests/xe_kunit_mmio.h
> @@ -0,0 +1,27 @@
> +/* SPDX-License-Identifier: GPL-2.0 AND MIT */
> +/*
> + * Copyright © 2026 Intel Corporation
> + */
> +
> +#ifndef _XE_KUNIT_MMIO_H_
> +#define _XE_KUNIT_MMIO_H_
> +
> +#include <linux/types.h>
> +
> +#include "regs/xe_reg_defs.h"
> +
> +struct xe_mmio;
> +
> +#if IS_ENABLED(CONFIG_DRM_XE_KUNIT_TEST)
> +
> +void xe_kunit_mmio_abort_if_not_live_test(struct xe_mmio *mmio, struct xe_reg reg);
> +
> +#else
> +
> +static void xe_kunit_mmio_abort_if_not_live_test(struct xe_mmio *mmio, struct xe_reg reg)
> +{
> +}
> +
> +#endif
> +
> +#endif
> diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c
> index bcb6674b7dac..0f9a1d5453df 100644
> --- a/drivers/gpu/drm/xe/xe_mmio.c
> +++ b/drivers/gpu/drm/xe/xe_mmio.c
> @@ -14,6 +14,7 @@
>  #include <drm/drm_print.h>
>  
>  #include "regs/xe_bars.h"
> +#include "tests/xe_kunit_mmio.h"
>  #include "xe_device.h"
>  #include "xe_gt_sriov_vf.h"
>  #include "xe_sriov.h"
> @@ -146,6 +147,8 @@ u8 xe_mmio_read8(struct xe_mmio *mmio, struct xe_reg reg)
>  	u32 addr = xe_mmio_adjusted_addr(mmio, reg.addr);
>  	u8 val;
>  
> +	xe_kunit_mmio_abort_if_not_live_test(mmio, reg);
> +
>  	mmio_flush_pending_writes(mmio);
>  
>  	val = readb(mmio->regs + addr);
> @@ -159,6 +162,8 @@ u16 xe_mmio_read16(struct xe_mmio *mmio, struct xe_reg reg)
>  	u32 addr = xe_mmio_adjusted_addr(mmio, reg.addr);
>  	u16 val;
>  
> +	xe_kunit_mmio_abort_if_not_live_test(mmio, reg);
> +
>  	mmio_flush_pending_writes(mmio);
>  
>  	val = readw(mmio->regs + addr);
> @@ -171,6 +176,8 @@ void xe_mmio_write32(struct xe_mmio *mmio, struct xe_reg reg, u32 val)
>  {
>  	u32 addr = xe_mmio_adjusted_addr(mmio, reg.addr);
>  
> +	xe_kunit_mmio_abort_if_not_live_test(mmio, reg);
> +
>  	trace_xe_reg_rw(mmio, true, addr, val, sizeof(val));
>  
>  	if (!reg.vf && IS_SRIOV_VF(mmio->tile->xe))
> @@ -185,6 +192,8 @@ u32 xe_mmio_read32(struct xe_mmio *mmio, struct xe_reg reg)
>  	u32 addr = xe_mmio_adjusted_addr(mmio, reg.addr);
>  	u32 val;
>  
> +	xe_kunit_mmio_abort_if_not_live_test(mmio, reg);
> +
>  	mmio_flush_pending_writes(mmio);
>  
>  	if (!reg.vf && IS_SRIOV_VF(mmio->tile->xe))
> 

✓ CI.KUnit: success for Fix MCR inconsistencies in RTP tables

[Patchwork]

== Series Details ==

Series: Fix MCR inconsistencies in RTP tables
URL   : https://patchwork.freedesktop.org/series/160223/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[23:15:21] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[23:15:25] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[23:15:57] Starting KUnit Kernel (1/1)...
[23:15:57] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[23:15:57] ================== guc_buf (11 subtests) ===================
[23:15:57] [PASSED] test_smallest
[23:15:57] [PASSED] test_largest
[23:15:57] [PASSED] test_granular
[23:15:57] [PASSED] test_unique
[23:15:57] [PASSED] test_overlap
[23:15:57] [PASSED] test_reusable
[23:15:57] [PASSED] test_too_big
[23:15:57] [PASSED] test_flush
[23:15:57] [PASSED] test_lookup
[23:15:57] [PASSED] test_data
[23:15:57] [PASSED] test_class
[23:15:57] ===================== [PASSED] guc_buf =====================
[23:15:57] =================== guc_dbm (7 subtests) ===================
[23:15:57] [PASSED] test_empty
[23:15:57] [PASSED] test_default
[23:15:57] ======================== test_size  ========================
[23:15:57] [PASSED] 4
[23:15:57] [PASSED] 8
[23:15:57] [PASSED] 32
[23:15:57] [PASSED] 256
[23:15:57] ==================== [PASSED] test_size ====================
[23:15:57] ======================= test_reuse  ========================
[23:15:57] [PASSED] 4
[23:15:57] [PASSED] 8
[23:15:57] [PASSED] 32
[23:15:57] [PASSED] 256
[23:15:57] =================== [PASSED] test_reuse ====================
[23:15:57] =================== test_range_overlap  ====================
[23:15:57] [PASSED] 4
[23:15:57] [PASSED] 8
[23:15:57] [PASSED] 32
[23:15:57] [PASSED] 256
[23:15:57] =============== [PASSED] test_range_overlap ================
[23:15:57] =================== test_range_compact  ====================
[23:15:57] [PASSED] 4
[23:15:57] [PASSED] 8
[23:15:57] [PASSED] 32
[23:15:57] [PASSED] 256
[23:15:57] =============== [PASSED] test_range_compact ================
[23:15:57] ==================== test_range_spare  =====================
[23:15:57] [PASSED] 4
[23:15:57] [PASSED] 8
[23:15:57] [PASSED] 32
[23:15:57] [PASSED] 256
[23:15:57] ================ [PASSED] test_range_spare =================
[23:15:57] ===================== [PASSED] guc_dbm =====================
[23:15:57] =================== guc_idm (6 subtests) ===================
[23:15:57] [PASSED] bad_init
[23:15:57] [PASSED] no_init
[23:15:57] [PASSED] init_fini
[23:15:57] [PASSED] check_used
[23:15:57] [PASSED] check_quota
[23:15:57] [PASSED] check_all
[23:15:57] ===================== [PASSED] guc_idm =====================
[23:15:57] ================== no_relay (3 subtests) ===================
[23:15:57] [PASSED] xe_drops_guc2pf_if_not_ready
[23:15:57] [PASSED] xe_drops_guc2vf_if_not_ready
[23:15:57] [PASSED] xe_rejects_send_if_not_ready
[23:15:57] ==================== [PASSED] no_relay =====================
[23:15:57] ================== pf_relay (14 subtests) ==================
[23:15:57] [PASSED] pf_rejects_guc2pf_too_short
[23:15:57] [PASSED] pf_rejects_guc2pf_too_long
[23:15:57] [PASSED] pf_rejects_guc2pf_no_payload
[23:15:57] [PASSED] pf_fails_no_payload
[23:15:57] [PASSED] pf_fails_bad_origin
[23:15:57] [PASSED] pf_fails_bad_type
[23:15:57] [PASSED] pf_txn_reports_error
[23:15:57] [PASSED] pf_txn_sends_pf2guc
[23:15:57] [PASSED] pf_sends_pf2guc
[23:15:57] [SKIPPED] pf_loopback_nop
[23:15:57] [SKIPPED] pf_loopback_echo
[23:15:57] [SKIPPED] pf_loopback_fail
[23:15:57] [SKIPPED] pf_loopback_busy
[23:15:57] [SKIPPED] pf_loopback_retry
[23:15:57] ==================== [PASSED] pf_relay =====================
[23:15:57] ================== vf_relay (3 subtests) ===================
[23:15:57] [PASSED] vf_rejects_guc2vf_too_short
[23:15:57] [PASSED] vf_rejects_guc2vf_too_long
[23:15:57] [PASSED] vf_rejects_guc2vf_no_payload
[23:15:57] ==================== [PASSED] vf_relay =====================
[23:15:57] ================ pf_gt_config (6 subtests) =================
[23:15:57] [PASSED] fair_contexts_1vf
[23:15:57] [PASSED] fair_doorbells_1vf
[23:15:57] [PASSED] fair_ggtt_1vf
[23:15:57] ====================== fair_contexts  ======================
[23:15:57] [PASSED] 1 VF
[23:15:57] [PASSED] 2 VFs
[23:15:57] [PASSED] 3 VFs
[23:15:57] [PASSED] 4 VFs
[23:15:57] [PASSED] 5 VFs
[23:15:57] [PASSED] 6 VFs
[23:15:57] [PASSED] 7 VFs
[23:15:57] [PASSED] 8 VFs
[23:15:57] [PASSED] 9 VFs
[23:15:57] [PASSED] 10 VFs
[23:15:57] [PASSED] 11 VFs
[23:15:57] [PASSED] 12 VFs
[23:15:57] [PASSED] 13 VFs
[23:15:57] [PASSED] 14 VFs
[23:15:57] [PASSED] 15 VFs
[23:15:57] [PASSED] 16 VFs
[23:15:57] [PASSED] 17 VFs
[23:15:57] [PASSED] 18 VFs
[23:15:57] [PASSED] 19 VFs
[23:15:57] [PASSED] 20 VFs
[23:15:57] [PASSED] 21 VFs
[23:15:57] [PASSED] 22 VFs
[23:15:57] [PASSED] 23 VFs
[23:15:57] [PASSED] 24 VFs
[23:15:57] [PASSED] 25 VFs
[23:15:57] [PASSED] 26 VFs
[23:15:57] [PASSED] 27 VFs
[23:15:57] [PASSED] 28 VFs
[23:15:57] [PASSED] 29 VFs
[23:15:57] [PASSED] 30 VFs
[23:15:57] [PASSED] 31 VFs
[23:15:57] [PASSED] 32 VFs
[23:15:57] [PASSED] 33 VFs
[23:15:57] [PASSED] 34 VFs
[23:15:57] [PASSED] 35 VFs
[23:15:57] [PASSED] 36 VFs
[23:15:57] [PASSED] 37 VFs
[23:15:57] [PASSED] 38 VFs
[23:15:57] [PASSED] 39 VFs
[23:15:57] [PASSED] 40 VFs
[23:15:57] [PASSED] 41 VFs
[23:15:57] [PASSED] 42 VFs
[23:15:57] [PASSED] 43 VFs
[23:15:57] [PASSED] 44 VFs
[23:15:57] [PASSED] 45 VFs
[23:15:57] [PASSED] 46 VFs
[23:15:57] [PASSED] 47 VFs
[23:15:57] [PASSED] 48 VFs
[23:15:57] [PASSED] 49 VFs
[23:15:57] [PASSED] 50 VFs
[23:15:57] [PASSED] 51 VFs
[23:15:57] [PASSED] 52 VFs
[23:15:57] [PASSED] 53 VFs
[23:15:57] [PASSED] 54 VFs
[23:15:57] [PASSED] 55 VFs
[23:15:57] [PASSED] 56 VFs
[23:15:57] [PASSED] 57 VFs
[23:15:57] [PASSED] 58 VFs
[23:15:57] [PASSED] 59 VFs
[23:15:57] [PASSED] 60 VFs
[23:15:57] [PASSED] 61 VFs
[23:15:57] [PASSED] 62 VFs
[23:15:57] [PASSED] 63 VFs
[23:15:57] ================== [PASSED] fair_contexts ==================
[23:15:57] ===================== fair_doorbells  ======================
[23:15:57] [PASSED] 1 VF
[23:15:57] [PASSED] 2 VFs
[23:15:57] [PASSED] 3 VFs
[23:15:57] [PASSED] 4 VFs
[23:15:57] [PASSED] 5 VFs
[23:15:57] [PASSED] 6 VFs
[23:15:57] [PASSED] 7 VFs
[23:15:57] [PASSED] 8 VFs
[23:15:57] [PASSED] 9 VFs
[23:15:57] [PASSED] 10 VFs
[23:15:57] [PASSED] 11 VFs
[23:15:57] [PASSED] 12 VFs
[23:15:57] [PASSED] 13 VFs
[23:15:57] [PASSED] 14 VFs
[23:15:57] [PASSED] 15 VFs
[23:15:57] [PASSED] 16 VFs
[23:15:57] [PASSED] 17 VFs
[23:15:57] [PASSED] 18 VFs
[23:15:57] [PASSED] 19 VFs
[23:15:57] [PASSED] 20 VFs
[23:15:57] [PASSED] 21 VFs
[23:15:57] [PASSED] 22 VFs
[23:15:57] [PASSED] 23 VFs
[23:15:57] [PASSED] 24 VFs
[23:15:57] [PASSED] 25 VFs
[23:15:57] [PASSED] 26 VFs
[23:15:57] [PASSED] 27 VFs
[23:15:57] [PASSED] 28 VFs
[23:15:57] [PASSED] 29 VFs
[23:15:57] [PASSED] 30 VFs
[23:15:57] [PASSED] 31 VFs
[23:15:57] [PASSED] 32 VFs
[23:15:57] [PASSED] 33 VFs
[23:15:57] [PASSED] 34 VFs
[23:15:57] [PASSED] 35 VFs
[23:15:57] [PASSED] 36 VFs
[23:15:57] [PASSED] 37 VFs
[23:15:57] [PASSED] 38 VFs
[23:15:57] [PASSED] 39 VFs
[23:15:57] [PASSED] 40 VFs
[23:15:57] [PASSED] 41 VFs
[23:15:57] [PASSED] 42 VFs
[23:15:57] [PASSED] 43 VFs
[23:15:57] [PASSED] 44 VFs
[23:15:57] [PASSED] 45 VFs
[23:15:57] [PASSED] 46 VFs
[23:15:57] [PASSED] 47 VFs
[23:15:57] [PASSED] 48 VFs
[23:15:57] [PASSED] 49 VFs
[23:15:57] [PASSED] 50 VFs
[23:15:57] [PASSED] 51 VFs
[23:15:57] [PASSED] 52 VFs
[23:15:57] [PASSED] 53 VFs
[23:15:57] [PASSED] 54 VFs
[23:15:57] [PASSED] 55 VFs
[23:15:57] [PASSED] 56 VFs
[23:15:57] [PASSED] 57 VFs
[23:15:57] [PASSED] 58 VFs
[23:15:57] [PASSED] 59 VFs
[23:15:57] [PASSED] 60 VFs
[23:15:57] [PASSED] 61 VFs
[23:15:57] [PASSED] 62 VFs
[23:15:57] [PASSED] 63 VFs
[23:15:57] ================= [PASSED] fair_doorbells ==================
[23:15:57] ======================== fair_ggtt  ========================
[23:15:57] [PASSED] 1 VF
[23:15:57] [PASSED] 2 VFs
[23:15:57] [PASSED] 3 VFs
[23:15:57] [PASSED] 4 VFs
[23:15:57] [PASSED] 5 VFs
[23:15:57] [PASSED] 6 VFs
[23:15:57] [PASSED] 7 VFs
[23:15:57] [PASSED] 8 VFs
[23:15:57] [PASSED] 9 VFs
[23:15:57] [PASSED] 10 VFs
[23:15:57] [PASSED] 11 VFs
[23:15:57] [PASSED] 12 VFs
[23:15:57] [PASSED] 13 VFs
[23:15:57] [PASSED] 14 VFs
[23:15:57] [PASSED] 15 VFs
[23:15:57] [PASSED] 16 VFs
[23:15:57] [PASSED] 17 VFs
[23:15:57] [PASSED] 18 VFs
[23:15:57] [PASSED] 19 VFs
[23:15:57] [PASSED] 20 VFs
[23:15:57] [PASSED] 21 VFs
[23:15:57] [PASSED] 22 VFs
[23:15:57] [PASSED] 23 VFs
[23:15:57] [PASSED] 24 VFs
[23:15:57] [PASSED] 25 VFs
[23:15:57] [PASSED] 26 VFs
[23:15:57] [PASSED] 27 VFs
[23:15:57] [PASSED] 28 VFs
[23:15:57] [PASSED] 29 VFs
[23:15:57] [PASSED] 30 VFs
[23:15:57] [PASSED] 31 VFs
[23:15:57] [PASSED] 32 VFs
[23:15:57] [PASSED] 33 VFs
[23:15:57] [PASSED] 34 VFs
[23:15:57] [PASSED] 35 VFs
[23:15:57] [PASSED] 36 VFs
[23:15:57] [PASSED] 37 VFs
[23:15:57] [PASSED] 38 VFs
[23:15:57] [PASSED] 39 VFs
[23:15:57] [PASSED] 40 VFs
[23:15:57] [PASSED] 41 VFs
[23:15:57] [PASSED] 42 VFs
[23:15:57] [PASSED] 43 VFs
[23:15:57] [PASSED] 44 VFs
[23:15:57] [PASSED] 45 VFs
[23:15:57] [PASSED] 46 VFs
[23:15:57] [PASSED] 47 VFs
[23:15:57] [PASSED] 48 VFs
[23:15:57] [PASSED] 49 VFs
[23:15:57] [PASSED] 50 VFs
[23:15:57] [PASSED] 51 VFs
[23:15:57] [PASSED] 52 VFs
[23:15:57] [PASSED] 53 VFs
[23:15:57] [PASSED] 54 VFs
[23:15:57] [PASSED] 55 VFs
[23:15:57] [PASSED] 56 VFs
[23:15:57] [PASSED] 57 VFs
[23:15:57] [PASSED] 58 VFs
[23:15:57] [PASSED] 59 VFs
[23:15:57] [PASSED] 60 VFs
[23:15:57] [PASSED] 61 VFs
[23:15:57] [PASSED] 62 VFs
[23:15:57] [PASSED] 63 VFs
[23:15:57] ==================== [PASSED] fair_ggtt ====================
[23:15:57] ================== [PASSED] pf_gt_config ===================
[23:15:57] ===================== lmtt (1 subtest) =====================
[23:15:57] ======================== test_ops  =========================
[23:15:57] [PASSED] 2-level
[23:15:57] [PASSED] multi-level
[23:15:57] ==================== [PASSED] test_ops =====================
[23:15:57] ====================== [PASSED] lmtt =======================
[23:15:57] ================= pf_service (11 subtests) =================
[23:15:57] [PASSED] pf_negotiate_any
[23:15:57] [PASSED] pf_negotiate_base_match
[23:15:57] [PASSED] pf_negotiate_base_newer
[23:15:57] [PASSED] pf_negotiate_base_next
[23:15:57] [SKIPPED] pf_negotiate_base_older
[23:15:57] [PASSED] pf_negotiate_base_prev
[23:15:57] [PASSED] pf_negotiate_latest_match
[23:15:57] [PASSED] pf_negotiate_latest_newer
[23:15:57] [PASSED] pf_negotiate_latest_next
[23:15:57] [SKIPPED] pf_negotiate_latest_older
[23:15:57] [SKIPPED] pf_negotiate_latest_prev
[23:15:57] =================== [PASSED] pf_service ====================
[23:15:57] ================= xe_guc_g2g (2 subtests) ==================
[23:15:57] ============== xe_live_guc_g2g_kunit_default  ==============
[23:15:57] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[23:15:57] ============== xe_live_guc_g2g_kunit_allmem  ===============
[23:15:57] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[23:15:57] =================== [SKIPPED] xe_guc_g2g ===================
[23:15:57] =================== xe_mocs (2 subtests) ===================
[23:15:57] ================ xe_live_mocs_kernel_kunit  ================
[23:15:57] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[23:15:57] ================ xe_live_mocs_reset_kunit  =================
[23:15:57] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[23:15:57] ==================== [SKIPPED] xe_mocs =====================
[23:15:57] ================= xe_migrate (2 subtests) ==================
[23:15:57] ================= xe_migrate_sanity_kunit  =================
[23:15:57] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[23:15:57] ================== xe_validate_ccs_kunit  ==================
[23:15:57] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[23:15:57] =================== [SKIPPED] xe_migrate ===================
[23:15:57] ================== xe_dma_buf (1 subtest) ==================
[23:15:57] ==================== xe_dma_buf_kunit  =====================
[23:15:57] ================ [SKIPPED] xe_dma_buf_kunit ================
[23:15:57] =================== [SKIPPED] xe_dma_buf ===================
[23:15:57] ================= xe_bo_shrink (1 subtest) =================
[23:15:57] =================== xe_bo_shrink_kunit  ====================
[23:15:57] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[23:15:57] ================== [SKIPPED] xe_bo_shrink ==================
[23:15:57] ==================== xe_bo (2 subtests) ====================
[23:15:57] ================== xe_ccs_migrate_kunit  ===================
[23:15:57] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[23:15:57] ==================== xe_bo_evict_kunit  ====================
[23:15:57] =============== [SKIPPED] xe_bo_evict_kunit ================
[23:15:57] ===================== [SKIPPED] xe_bo ======================
[23:15:57] ==================== args (13 subtests) ====================
[23:15:57] [PASSED] count_args_test
[23:15:57] [PASSED] call_args_example
[23:15:57] [PASSED] call_args_test
[23:15:57] [PASSED] drop_first_arg_example
[23:15:57] [PASSED] drop_first_arg_test
[23:15:57] [PASSED] first_arg_example
[23:15:57] [PASSED] first_arg_test
[23:15:57] [PASSED] last_arg_example
[23:15:57] [PASSED] last_arg_test
[23:15:57] [PASSED] pick_arg_example
[23:15:57] [PASSED] if_args_example
[23:15:57] [PASSED] if_args_test
[23:15:57] [PASSED] sep_comma_example
[23:15:57] ====================== [PASSED] args =======================
[23:15:57] =================== xe_pci (3 subtests) ====================
[23:15:57] ==================== check_graphics_ip  ====================
[23:15:57] [PASSED] 12.00 Xe_LP
[23:15:57] [PASSED] 12.10 Xe_LP+
[23:15:57] [PASSED] 12.55 Xe_HPG
[23:15:57] [PASSED] 12.60 Xe_HPC
[23:15:57] [PASSED] 12.70 Xe_LPG
[23:15:57] [PASSED] 12.71 Xe_LPG
[23:15:57] [PASSED] 12.74 Xe_LPG+
[23:15:57] [PASSED] 20.01 Xe2_HPG
[23:15:57] [PASSED] 20.02 Xe2_HPG
[23:15:57] [PASSED] 20.04 Xe2_LPG
[23:15:57] [PASSED] 30.00 Xe3_LPG
[23:15:57] [PASSED] 30.01 Xe3_LPG
[23:15:57] [PASSED] 30.03 Xe3_LPG
[23:15:57] [PASSED] 30.04 Xe3_LPG
[23:15:57] [PASSED] 30.05 Xe3_LPG
[23:15:57] [PASSED] 35.11 Xe3p_XPC
[23:15:57] ================ [PASSED] check_graphics_ip ================
[23:15:57] ===================== check_media_ip  ======================
[23:15:57] [PASSED] 12.00 Xe_M
[23:15:57] [PASSED] 12.55 Xe_HPM
[23:15:57] [PASSED] 13.00 Xe_LPM+
[23:15:57] [PASSED] 13.01 Xe2_HPM
[23:15:57] [PASSED] 20.00 Xe2_LPM
[23:15:57] [PASSED] 30.00 Xe3_LPM
[23:15:57] [PASSED] 30.02 Xe3_LPM
[23:15:57] [PASSED] 35.00 Xe3p_LPM
[23:15:57] [PASSED] 35.03 Xe3p_HPM
[23:15:57] ================= [PASSED] check_media_ip ==================
[23:15:57] =================== check_platform_desc  ===================
[23:15:57] [PASSED] 0x9A60 (TIGERLAKE)
[23:15:57] [PASSED] 0x9A68 (TIGERLAKE)
[23:15:57] [PASSED] 0x9A70 (TIGERLAKE)
[23:15:57] [PASSED] 0x9A40 (TIGERLAKE)
[23:15:57] [PASSED] 0x9A49 (TIGERLAKE)
[23:15:57] [PASSED] 0x9A59 (TIGERLAKE)
[23:15:57] [PASSED] 0x9A78 (TIGERLAKE)
[23:15:57] [PASSED] 0x9AC0 (TIGERLAKE)
[23:15:57] [PASSED] 0x9AC9 (TIGERLAKE)
[23:15:57] [PASSED] 0x9AD9 (TIGERLAKE)
[23:15:57] [PASSED] 0x9AF8 (TIGERLAKE)
[23:15:57] [PASSED] 0x4C80 (ROCKETLAKE)
[23:15:57] [PASSED] 0x4C8A (ROCKETLAKE)
[23:15:57] [PASSED] 0x4C8B (ROCKETLAKE)
[23:15:57] [PASSED] 0x4C8C (ROCKETLAKE)
[23:15:57] [PASSED] 0x4C90 (ROCKETLAKE)
[23:15:57] [PASSED] 0x4C9A (ROCKETLAKE)
[23:15:57] [PASSED] 0x4680 (ALDERLAKE_S)
[23:15:57] [PASSED] 0x4682 (ALDERLAKE_S)
[23:15:57] [PASSED] 0x4688 (ALDERLAKE_S)
[23:15:57] [PASSED] 0x468A (ALDERLAKE_S)
[23:15:57] [PASSED] 0x468B (ALDERLAKE_S)
[23:15:57] [PASSED] 0x4690 (ALDERLAKE_S)
[23:15:57] [PASSED] 0x4692 (ALDERLAKE_S)
[23:15:57] [PASSED] 0x4693 (ALDERLAKE_S)
[23:15:57] [PASSED] 0x46A0 (ALDERLAKE_P)
[23:15:57] [PASSED] 0x46A1 (ALDERLAKE_P)
[23:15:57] [PASSED] 0x46A2 (ALDERLAKE_P)
[23:15:57] [PASSED] 0x46A3 (ALDERLAKE_P)
[23:15:57] [PASSED] 0x46A6 (ALDERLAKE_P)
[23:15:57] [PASSED] 0x46A8 (ALDERLAKE_P)
[23:15:57] [PASSED] 0x46AA (ALDERLAKE_P)
[23:15:57] [PASSED] 0x462A (ALDERLAKE_P)
[23:15:57] [PASSED] 0x4626 (ALDERLAKE_P)
[23:15:57] [PASSED] 0x4628 (ALDERLAKE_P)
[23:15:57] [PASSED] 0x46B0 (ALDERLAKE_P)
[23:15:57] [PASSED] 0x46B1 (ALDERLAKE_P)
[23:15:57] [PASSED] 0x46B2 (ALDERLAKE_P)
[23:15:57] [PASSED] 0x46B3 (ALDERLAKE_P)
[23:15:57] [PASSED] 0x46C0 (ALDERLAKE_P)
[23:15:57] [PASSED] 0x46C1 (ALDERLAKE_P)
[23:15:57] [PASSED] 0x46C2 (ALDERLAKE_P)
[23:15:57] [PASSED] 0x46C3 (ALDERLAKE_P)
[23:15:57] [PASSED] 0x46D0 (ALDERLAKE_N)
[23:15:57] [PASSED] 0x46D1 (ALDERLAKE_N)
[23:15:57] [PASSED] 0x46D2 (ALDERLAKE_N)
[23:15:57] [PASSED] 0x46D3 (ALDERLAKE_N)
[23:15:57] [PASSED] 0x46D4 (ALDERLAKE_N)
[23:15:57] [PASSED] 0xA721 (ALDERLAKE_P)
[23:15:57] [PASSED] 0xA7A1 (ALDERLAKE_P)
[23:15:57] [PASSED] 0xA7A9 (ALDERLAKE_P)
[23:15:57] [PASSED] 0xA7AC (ALDERLAKE_P)
[23:15:57] [PASSED] 0xA7AD (ALDERLAKE_P)
[23:15:57] [PASSED] 0xA720 (ALDERLAKE_P)
[23:15:57] [PASSED] 0xA7A0 (ALDERLAKE_P)
[23:15:57] [PASSED] 0xA7A8 (ALDERLAKE_P)
[23:15:57] [PASSED] 0xA7AA (ALDERLAKE_P)
[23:15:57] [PASSED] 0xA7AB (ALDERLAKE_P)
[23:15:57] [PASSED] 0xA780 (ALDERLAKE_S)
[23:15:57] [PASSED] 0xA781 (ALDERLAKE_S)
[23:15:57] [PASSED] 0xA782 (ALDERLAKE_S)
[23:15:57] [PASSED] 0xA783 (ALDERLAKE_S)
[23:15:57] [PASSED] 0xA788 (ALDERLAKE_S)
[23:15:57] [PASSED] 0xA789 (ALDERLAKE_S)
[23:15:57] [PASSED] 0xA78A (ALDERLAKE_S)
[23:15:57] [PASSED] 0xA78B (ALDERLAKE_S)
[23:15:57] [PASSED] 0x4905 (DG1)
[23:15:57] [PASSED] 0x4906 (DG1)
[23:15:57] [PASSED] 0x4907 (DG1)
[23:15:57] [PASSED] 0x4908 (DG1)
[23:15:57] [PASSED] 0x4909 (DG1)
[23:15:57] [PASSED] 0x56C0 (DG2)
[23:15:57] [PASSED] 0x56C2 (DG2)
[23:15:57] [PASSED] 0x56C1 (DG2)
[23:15:57] [PASSED] 0x7D51 (METEORLAKE)
[23:15:57] [PASSED] 0x7DD1 (METEORLAKE)
[23:15:57] [PASSED] 0x7D41 (METEORLAKE)
[23:15:57] [PASSED] 0x7D67 (METEORLAKE)
[23:15:57] [PASSED] 0xB640 (METEORLAKE)
[23:15:57] [PASSED] 0x56A0 (DG2)
[23:15:57] [PASSED] 0x56A1 (DG2)
[23:15:57] [PASSED] 0x56A2 (DG2)
[23:15:57] [PASSED] 0x56BE (DG2)
[23:15:57] [PASSED] 0x56BF (DG2)
[23:15:57] [PASSED] 0x5690 (DG2)
[23:15:57] [PASSED] 0x5691 (DG2)
[23:15:57] [PASSED] 0x5692 (DG2)
[23:15:57] [PASSED] 0x56A5 (DG2)
[23:15:57] [PASSED] 0x56A6 (DG2)
[23:15:57] [PASSED] 0x56B0 (DG2)
[23:15:57] [PASSED] 0x56B1 (DG2)
[23:15:57] [PASSED] 0x56BA (DG2)
[23:15:57] [PASSED] 0x56BB (DG2)
[23:15:57] [PASSED] 0x56BC (DG2)
[23:15:57] [PASSED] 0x56BD (DG2)
[23:15:57] [PASSED] 0x5693 (DG2)
[23:15:57] [PASSED] 0x5694 (DG2)
[23:15:57] [PASSED] 0x5695 (DG2)
[23:15:57] [PASSED] 0x56A3 (DG2)
[23:15:57] [PASSED] 0x56A4 (DG2)
[23:15:57] [PASSED] 0x56B2 (DG2)
[23:15:57] [PASSED] 0x56B3 (DG2)
[23:15:57] [PASSED] 0x5696 (DG2)
[23:15:57] [PASSED] 0x5697 (DG2)
[23:15:57] [PASSED] 0xB69 (PVC)
[23:15:57] [PASSED] 0xB6E (PVC)
[23:15:57] [PASSED] 0xBD4 (PVC)
[23:15:57] [PASSED] 0xBD5 (PVC)
[23:15:57] [PASSED] 0xBD6 (PVC)
[23:15:57] [PASSED] 0xBD7 (PVC)
[23:15:57] [PASSED] 0xBD8 (PVC)
[23:15:57] [PASSED] 0xBD9 (PVC)
[23:15:57] [PASSED] 0xBDA (PVC)
[23:15:57] [PASSED] 0xBDB (PVC)
[23:15:57] [PASSED] 0xBE0 (PVC)
[23:15:57] [PASSED] 0xBE1 (PVC)
[23:15:57] [PASSED] 0xBE5 (PVC)
[23:15:57] [PASSED] 0x7D40 (METEORLAKE)
[23:15:57] [PASSED] 0x7D45 (METEORLAKE)
[23:15:57] [PASSED] 0x7D55 (METEORLAKE)
[23:15:57] [PASSED] 0x7D60 (METEORLAKE)
[23:15:57] [PASSED] 0x7DD5 (METEORLAKE)
[23:15:57] [PASSED] 0x6420 (LUNARLAKE)
[23:15:57] [PASSED] 0x64A0 (LUNARLAKE)
[23:15:57] [PASSED] 0x64B0 (LUNARLAKE)
[23:15:57] [PASSED] 0xE202 (BATTLEMAGE)
[23:15:57] [PASSED] 0xE209 (BATTLEMAGE)
[23:15:57] [PASSED] 0xE20B (BATTLEMAGE)
[23:15:57] [PASSED] 0xE20C (BATTLEMAGE)
[23:15:57] [PASSED] 0xE20D (BATTLEMAGE)
[23:15:57] [PASSED] 0xE210 (BATTLEMAGE)
[23:15:57] [PASSED] 0xE211 (BATTLEMAGE)
[23:15:57] [PASSED] 0xE212 (BATTLEMAGE)
[23:15:57] [PASSED] 0xE216 (BATTLEMAGE)
[23:15:57] [PASSED] 0xE220 (BATTLEMAGE)
[23:15:57] [PASSED] 0xE221 (BATTLEMAGE)
[23:15:57] [PASSED] 0xE222 (BATTLEMAGE)
[23:15:57] [PASSED] 0xE223 (BATTLEMAGE)
[23:15:57] [PASSED] 0xB080 (PANTHERLAKE)
[23:15:57] [PASSED] 0xB081 (PANTHERLAKE)
[23:15:57] [PASSED] 0xB082 (PANTHERLAKE)
[23:15:57] [PASSED] 0xB083 (PANTHERLAKE)
[23:15:57] [PASSED] 0xB084 (PANTHERLAKE)
[23:15:57] [PASSED] 0xB085 (PANTHERLAKE)
[23:15:57] [PASSED] 0xB086 (PANTHERLAKE)
[23:15:57] [PASSED] 0xB087 (PANTHERLAKE)
[23:15:57] [PASSED] 0xB08F (PANTHERLAKE)
[23:15:57] [PASSED] 0xB090 (PANTHERLAKE)
[23:15:57] [PASSED] 0xB0A0 (PANTHERLAKE)
[23:15:57] [PASSED] 0xB0B0 (PANTHERLAKE)
[23:15:57] [PASSED] 0xFD80 (PANTHERLAKE)
[23:15:57] [PASSED] 0xFD81 (PANTHERLAKE)
[23:15:57] [PASSED] 0xD740 (NOVALAKE_S)
[23:15:57] [PASSED] 0xD741 (NOVALAKE_S)
[23:15:57] [PASSED] 0xD742 (NOVALAKE_S)
[23:15:57] [PASSED] 0xD743 (NOVALAKE_S)
[23:15:57] [PASSED] 0xD744 (NOVALAKE_S)
[23:15:57] [PASSED] 0xD745 (NOVALAKE_S)
[23:15:57] [PASSED] 0x674C (CRESCENTISLAND)
[23:15:57] =============== [PASSED] check_platform_desc ===============
[23:15:57] ===================== [PASSED] xe_pci ======================
[23:15:57] =================== xe_rtp (2 subtests) ====================
[23:15:57] =============== xe_rtp_process_to_sr_tests  ================
[23:15:57] [PASSED] coalesce-same-reg
[23:15:57] [PASSED] no-match-no-add
[23:15:57] [PASSED] match-or
[23:15:57] [PASSED] match-or-xfail
[23:15:57] [PASSED] no-match-no-add-multiple-rules
[23:15:57] [PASSED] two-regs-two-entries
[23:15:57] [PASSED] clr-one-set-other
[23:15:57] [PASSED] set-field
[23:15:57] [PASSED] conflict-duplicate
[23:15:57] [PASSED] conflict-not-disjoint
[23:15:57] [PASSED] conflict-reg-type
[23:15:57] [PASSED] bad-mcr-reg-forced-to-regular
[23:15:57] [PASSED] bad-regular-reg-forced-to-mcr
[23:15:57] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[23:15:57] ================== xe_rtp_process_tests  ===================
[23:15:57] [PASSED] active1
[23:15:57] [PASSED] active2
[23:15:57] [PASSED] active-inactive
[23:15:57] [PASSED] inactive-active
[23:15:57] [PASSED] inactive-1st_or_active-inactive
[23:15:57] [PASSED] inactive-2nd_or_active-inactive
[23:15:57] [PASSED] inactive-last_or_active-inactive
[23:15:57] [PASSED] inactive-no_or_active-inactive
[23:15:57] ============== [PASSED] xe_rtp_process_tests ===============
[23:15:57] ===================== [PASSED] xe_rtp ======================
[23:15:57] ==================== xe_wa (2 subtests) ====================
[23:15:57] ======================== xe_wa_gt  =========================
[23:15:57] [PASSED] TIGERLAKE B0
[23:15:57] [PASSED] DG1 A0
[23:15:57] [PASSED] DG1 B0
[23:15:57] [PASSED] ALDERLAKE_S A0
[23:15:57] [PASSED] ALDERLAKE_S B0
[23:15:57] [PASSED] ALDERLAKE_S C0
[23:15:57] [PASSED] ALDERLAKE_S D0
[23:15:57] [PASSED] ALDERLAKE_P A0
[23:15:57] [PASSED] ALDERLAKE_P B0
[23:15:57] [PASSED] ALDERLAKE_P C0
[23:15:57] [PASSED] ALDERLAKE_S RPLS D0
[23:15:57] [PASSED] ALDERLAKE_P RPLU E0
[23:15:57] [PASSED] DG2 G10 C0
[23:15:57] [PASSED] DG2 G11 B1
[23:15:57] [PASSED] DG2 G12 A1
[23:15:57] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[23:15:57] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[23:15:57] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[23:15:57] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[23:15:57] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[23:15:57] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[23:15:57] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[23:15:57] ==================== [PASSED] xe_wa_gt =====================
[23:15:57] ==================== xe_wa_hw_engines  =====================
[23:15:57] [PASSED] TIGERLAKE B0
[23:15:57] [PASSED] DG1 A0
[23:15:57] [PASSED] DG1 B0
[23:15:57] [PASSED] ALDERLAKE_S A0
[23:15:57] [PASSED] ALDERLAKE_S B0
[23:15:57] [PASSED] ALDERLAKE_S C0
[23:15:57] [PASSED] ALDERLAKE_S D0
[23:15:57] [PASSED] ALDERLAKE_P A0
[23:15:57] [PASSED] ALDERLAKE_P B0
[23:15:57] [PASSED] ALDERLAKE_P C0
[23:15:57] [PASSED] ALDERLAKE_S RPLS D0
[23:15:57] [PASSED] ALDERLAKE_P RPLU E0
[23:15:57] [PASSED] DG2 G10 C0
[23:15:57] [PASSED] DG2 G11 B1
[23:15:57] [PASSED] DG2 G12 A1
[23:15:57] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[23:15:57] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[23:15:57] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[23:15:57] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
stty: 'standard input': Inappropriate ioctl for device
[23:15:57] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[23:15:57] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[23:15:57] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[23:15:57] ================ [PASSED] xe_wa_hw_engines =================
[23:15:57] ====================== [PASSED] xe_wa ======================
[23:15:57] ============================================================
[23:15:57] Testing complete. Ran 536 tests: passed: 518, skipped: 18
[23:15:57] Elapsed time: 36.560s total, 4.246s configuring, 31.748s building, 0.532s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[23:15:57] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[23:15:59] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[23:16:25] Starting KUnit Kernel (1/1)...
[23:16:25] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[23:16:25] ============ drm_test_pick_cmdline (2 subtests) ============
[23:16:25] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[23:16:25] =============== drm_test_pick_cmdline_named  ===============
[23:16:25] [PASSED] NTSC
[23:16:25] [PASSED] NTSC-J
[23:16:25] [PASSED] PAL
[23:16:25] [PASSED] PAL-M
[23:16:25] =========== [PASSED] drm_test_pick_cmdline_named ===========
[23:16:25] ============== [PASSED] drm_test_pick_cmdline ==============
[23:16:25] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[23:16:25] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[23:16:25] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[23:16:25] =========== drm_validate_clone_mode (2 subtests) ===========
[23:16:25] ============== drm_test_check_in_clone_mode  ===============
[23:16:25] [PASSED] in_clone_mode
[23:16:25] [PASSED] not_in_clone_mode
[23:16:25] ========== [PASSED] drm_test_check_in_clone_mode ===========
[23:16:25] =============== drm_test_check_valid_clones  ===============
[23:16:25] [PASSED] not_in_clone_mode
[23:16:25] [PASSED] valid_clone
[23:16:25] [PASSED] invalid_clone
[23:16:25] =========== [PASSED] drm_test_check_valid_clones ===========
[23:16:25] ============= [PASSED] drm_validate_clone_mode =============
[23:16:25] ============= drm_validate_modeset (1 subtest) =============
[23:16:25] [PASSED] drm_test_check_connector_changed_modeset
[23:16:25] ============== [PASSED] drm_validate_modeset ===============
[23:16:25] ====== drm_test_bridge_get_current_state (2 subtests) ======
[23:16:25] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[23:16:25] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[23:16:25] ======== [PASSED] drm_test_bridge_get_current_state ========
[23:16:25] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[23:16:25] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[23:16:25] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[23:16:25] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[23:16:25] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[23:16:25] ============== drm_bridge_alloc (2 subtests) ===============
[23:16:25] [PASSED] drm_test_drm_bridge_alloc_basic
[23:16:25] [PASSED] drm_test_drm_bridge_alloc_get_put
[23:16:25] ================ [PASSED] drm_bridge_alloc =================
[23:16:25] ================== drm_buddy (8 subtests) ==================
[23:16:25] [PASSED] drm_test_buddy_alloc_limit
[23:16:25] [PASSED] drm_test_buddy_alloc_optimistic
[23:16:25] [PASSED] drm_test_buddy_alloc_pessimistic
[23:16:25] [PASSED] drm_test_buddy_alloc_pathological
[23:16:25] [PASSED] drm_test_buddy_alloc_contiguous
[23:16:25] [PASSED] drm_test_buddy_alloc_clear
[23:16:25] [PASSED] drm_test_buddy_alloc_range_bias
[23:16:25] [PASSED] drm_test_buddy_fragmentation_performance
[23:16:25] ==================== [PASSED] drm_buddy ====================
[23:16:25] ============= drm_cmdline_parser (40 subtests) =============
[23:16:25] [PASSED] drm_test_cmdline_force_d_only
[23:16:25] [PASSED] drm_test_cmdline_force_D_only_dvi
[23:16:25] [PASSED] drm_test_cmdline_force_D_only_hdmi
[23:16:25] [PASSED] drm_test_cmdline_force_D_only_not_digital
[23:16:25] [PASSED] drm_test_cmdline_force_e_only
[23:16:25] [PASSED] drm_test_cmdline_res
[23:16:25] [PASSED] drm_test_cmdline_res_vesa
[23:16:25] [PASSED] drm_test_cmdline_res_vesa_rblank
[23:16:25] [PASSED] drm_test_cmdline_res_rblank
[23:16:25] [PASSED] drm_test_cmdline_res_bpp
[23:16:25] [PASSED] drm_test_cmdline_res_refresh
[23:16:25] [PASSED] drm_test_cmdline_res_bpp_refresh
[23:16:25] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[23:16:25] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[23:16:25] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[23:16:25] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[23:16:25] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[23:16:25] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[23:16:25] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[23:16:25] [PASSED] drm_test_cmdline_res_margins_force_on
[23:16:25] [PASSED] drm_test_cmdline_res_vesa_margins
[23:16:25] [PASSED] drm_test_cmdline_name
[23:16:25] [PASSED] drm_test_cmdline_name_bpp
[23:16:25] [PASSED] drm_test_cmdline_name_option
[23:16:25] [PASSED] drm_test_cmdline_name_bpp_option
[23:16:25] [PASSED] drm_test_cmdline_rotate_0
[23:16:25] [PASSED] drm_test_cmdline_rotate_90
[23:16:25] [PASSED] drm_test_cmdline_rotate_180
[23:16:25] [PASSED] drm_test_cmdline_rotate_270
[23:16:25] [PASSED] drm_test_cmdline_hmirror
[23:16:25] [PASSED] drm_test_cmdline_vmirror
[23:16:25] [PASSED] drm_test_cmdline_margin_options
[23:16:25] [PASSED] drm_test_cmdline_multiple_options
[23:16:25] [PASSED] drm_test_cmdline_bpp_extra_and_option
[23:16:25] [PASSED] drm_test_cmdline_extra_and_option
[23:16:25] [PASSED] drm_test_cmdline_freestanding_options
[23:16:25] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[23:16:25] [PASSED] drm_test_cmdline_panel_orientation
[23:16:25] ================ drm_test_cmdline_invalid  =================
[23:16:25] [PASSED] margin_only
[23:16:25] [PASSED] interlace_only
[23:16:25] [PASSED] res_missing_x
[23:16:25] [PASSED] res_missing_y
[23:16:25] [PASSED] res_bad_y
[23:16:25] [PASSED] res_missing_y_bpp
[23:16:25] [PASSED] res_bad_bpp
[23:16:25] [PASSED] res_bad_refresh
[23:16:25] [PASSED] res_bpp_refresh_force_on_off
[23:16:25] [PASSED] res_invalid_mode
[23:16:25] [PASSED] res_bpp_wrong_place_mode
[23:16:25] [PASSED] name_bpp_refresh
[23:16:25] [PASSED] name_refresh
[23:16:25] [PASSED] name_refresh_wrong_mode
[23:16:25] [PASSED] name_refresh_invalid_mode
[23:16:25] [PASSED] rotate_multiple
[23:16:25] [PASSED] rotate_invalid_val
[23:16:25] [PASSED] rotate_truncated
[23:16:25] [PASSED] invalid_option
[23:16:25] [PASSED] invalid_tv_option
[23:16:25] [PASSED] truncated_tv_option
[23:16:25] ============ [PASSED] drm_test_cmdline_invalid =============
[23:16:25] =============== drm_test_cmdline_tv_options  ===============
[23:16:25] [PASSED] NTSC
[23:16:25] [PASSED] NTSC_443
[23:16:25] [PASSED] NTSC_J
[23:16:25] [PASSED] PAL
[23:16:25] [PASSED] PAL_M
[23:16:25] [PASSED] PAL_N
[23:16:25] [PASSED] SECAM
[23:16:25] [PASSED] MONO_525
[23:16:25] [PASSED] MONO_625
[23:16:25] =========== [PASSED] drm_test_cmdline_tv_options ===========
[23:16:25] =============== [PASSED] drm_cmdline_parser ================
[23:16:25] ========== drmm_connector_hdmi_init (20 subtests) ==========
[23:16:25] [PASSED] drm_test_connector_hdmi_init_valid
[23:16:25] [PASSED] drm_test_connector_hdmi_init_bpc_8
[23:16:25] [PASSED] drm_test_connector_hdmi_init_bpc_10
[23:16:25] [PASSED] drm_test_connector_hdmi_init_bpc_12
[23:16:25] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[23:16:25] [PASSED] drm_test_connector_hdmi_init_bpc_null
[23:16:25] [PASSED] drm_test_connector_hdmi_init_formats_empty
[23:16:25] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[23:16:25] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[23:16:25] [PASSED] supported_formats=0x9 yuv420_allowed=1
[23:16:25] [PASSED] supported_formats=0x9 yuv420_allowed=0
[23:16:25] [PASSED] supported_formats=0x3 yuv420_allowed=1
[23:16:25] [PASSED] supported_formats=0x3 yuv420_allowed=0
[23:16:25] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[23:16:25] [PASSED] drm_test_connector_hdmi_init_null_ddc
[23:16:25] [PASSED] drm_test_connector_hdmi_init_null_product
[23:16:25] [PASSED] drm_test_connector_hdmi_init_null_vendor
[23:16:25] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[23:16:25] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[23:16:25] [PASSED] drm_test_connector_hdmi_init_product_valid
[23:16:25] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[23:16:25] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[23:16:25] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[23:16:25] ========= drm_test_connector_hdmi_init_type_valid  =========
[23:16:25] [PASSED] HDMI-A
[23:16:25] [PASSED] HDMI-B
[23:16:25] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[23:16:25] ======== drm_test_connector_hdmi_init_type_invalid  ========
[23:16:25] [PASSED] Unknown
[23:16:25] [PASSED] VGA
[23:16:25] [PASSED] DVI-I
[23:16:25] [PASSED] DVI-D
[23:16:25] [PASSED] DVI-A
[23:16:25] [PASSED] Composite
[23:16:25] [PASSED] SVIDEO
[23:16:25] [PASSED] LVDS
[23:16:25] [PASSED] Component
[23:16:25] [PASSED] DIN
[23:16:25] [PASSED] DP
[23:16:25] [PASSED] TV
[23:16:25] [PASSED] eDP
[23:16:25] [PASSED] Virtual
[23:16:25] [PASSED] DSI
[23:16:25] [PASSED] DPI
[23:16:25] [PASSED] Writeback
[23:16:25] [PASSED] SPI
[23:16:25] [PASSED] USB
[23:16:25] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[23:16:25] ============ [PASSED] drmm_connector_hdmi_init =============
[23:16:25] ============= drmm_connector_init (3 subtests) =============
[23:16:25] [PASSED] drm_test_drmm_connector_init
[23:16:25] [PASSED] drm_test_drmm_connector_init_null_ddc
[23:16:25] ========= drm_test_drmm_connector_init_type_valid  =========
[23:16:25] [PASSED] Unknown
[23:16:25] [PASSED] VGA
[23:16:25] [PASSED] DVI-I
[23:16:25] [PASSED] DVI-D
[23:16:25] [PASSED] DVI-A
[23:16:25] [PASSED] Composite
[23:16:25] [PASSED] SVIDEO
[23:16:25] [PASSED] LVDS
[23:16:25] [PASSED] Component
[23:16:25] [PASSED] DIN
[23:16:25] [PASSED] DP
[23:16:25] [PASSED] HDMI-A
[23:16:25] [PASSED] HDMI-B
[23:16:25] [PASSED] TV
[23:16:25] [PASSED] eDP
[23:16:25] [PASSED] Virtual
[23:16:25] [PASSED] DSI
[23:16:25] [PASSED] DPI
[23:16:25] [PASSED] Writeback
[23:16:25] [PASSED] SPI
[23:16:25] [PASSED] USB
[23:16:25] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[23:16:25] =============== [PASSED] drmm_connector_init ===============
[23:16:25] ========= drm_connector_dynamic_init (6 subtests) ==========
[23:16:25] [PASSED] drm_test_drm_connector_dynamic_init
[23:16:25] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[23:16:25] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[23:16:25] [PASSED] drm_test_drm_connector_dynamic_init_properties
[23:16:25] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[23:16:25] [PASSED] Unknown
[23:16:25] [PASSED] VGA
[23:16:25] [PASSED] DVI-I
[23:16:25] [PASSED] DVI-D
[23:16:25] [PASSED] DVI-A
[23:16:25] [PASSED] Composite
[23:16:25] [PASSED] SVIDEO
[23:16:25] [PASSED] LVDS
[23:16:25] [PASSED] Component
[23:16:25] [PASSED] DIN
[23:16:25] [PASSED] DP
[23:16:25] [PASSED] HDMI-A
[23:16:25] [PASSED] HDMI-B
[23:16:25] [PASSED] TV
[23:16:25] [PASSED] eDP
[23:16:25] [PASSED] Virtual
[23:16:25] [PASSED] DSI
[23:16:25] [PASSED] DPI
[23:16:25] [PASSED] Writeback
[23:16:25] [PASSED] SPI
[23:16:25] [PASSED] USB
[23:16:25] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[23:16:25] ======== drm_test_drm_connector_dynamic_init_name  =========
[23:16:25] [PASSED] Unknown
[23:16:25] [PASSED] VGA
[23:16:25] [PASSED] DVI-I
[23:16:25] [PASSED] DVI-D
[23:16:25] [PASSED] DVI-A
[23:16:25] [PASSED] Composite
[23:16:25] [PASSED] SVIDEO
[23:16:25] [PASSED] LVDS
[23:16:25] [PASSED] Component
[23:16:25] [PASSED] DIN
[23:16:25] [PASSED] DP
[23:16:25] [PASSED] HDMI-A
[23:16:25] [PASSED] HDMI-B
[23:16:25] [PASSED] TV
[23:16:25] [PASSED] eDP
[23:16:25] [PASSED] Virtual
[23:16:25] [PASSED] DSI
[23:16:25] [PASSED] DPI
[23:16:25] [PASSED] Writeback
[23:16:25] [PASSED] SPI
[23:16:25] [PASSED] USB
[23:16:25] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[23:16:25] =========== [PASSED] drm_connector_dynamic_init ============
[23:16:25] ==== drm_connector_dynamic_register_early (4 subtests) =====
[23:16:25] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[23:16:25] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[23:16:25] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[23:16:25] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[23:16:25] ====== [PASSED] drm_connector_dynamic_register_early =======
[23:16:25] ======= drm_connector_dynamic_register (7 subtests) ========
[23:16:25] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[23:16:25] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[23:16:25] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[23:16:25] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[23:16:25] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[23:16:25] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[23:16:25] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[23:16:25] ========= [PASSED] drm_connector_dynamic_register ==========
[23:16:25] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[23:16:25] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[23:16:25] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[23:16:25] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[23:16:25] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[23:16:25] ========== drm_test_get_tv_mode_from_name_valid  ===========
[23:16:25] [PASSED] NTSC
[23:16:25] [PASSED] NTSC-443
[23:16:25] [PASSED] NTSC-J
[23:16:25] [PASSED] PAL
[23:16:25] [PASSED] PAL-M
[23:16:25] [PASSED] PAL-N
[23:16:25] [PASSED] SECAM
[23:16:25] [PASSED] Mono
[23:16:25] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[23:16:25] [PASSED] drm_test_get_tv_mode_from_name_truncated
[23:16:25] ============ [PASSED] drm_get_tv_mode_from_name ============
[23:16:25] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[23:16:25] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[23:16:25] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[23:16:25] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[23:16:25] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[23:16:25] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[23:16:25] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[23:16:25] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[23:16:25] [PASSED] VIC 96
[23:16:25] [PASSED] VIC 97
[23:16:25] [PASSED] VIC 101
[23:16:25] [PASSED] VIC 102
[23:16:25] [PASSED] VIC 106
[23:16:25] [PASSED] VIC 107
[23:16:25] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[23:16:25] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[23:16:25] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[23:16:25] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[23:16:25] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[23:16:25] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[23:16:25] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[23:16:25] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[23:16:25] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[23:16:25] [PASSED] Automatic
[23:16:25] [PASSED] Full
[23:16:25] [PASSED] Limited 16:235
[23:16:25] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[23:16:25] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[23:16:25] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[23:16:25] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[23:16:25] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[23:16:25] [PASSED] RGB
[23:16:25] [PASSED] YUV 4:2:0
[23:16:25] [PASSED] YUV 4:2:2
[23:16:25] [PASSED] YUV 4:4:4
[23:16:25] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[23:16:25] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[23:16:25] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[23:16:25] ============= drm_damage_helper (21 subtests) ==============
[23:16:25] [PASSED] drm_test_damage_iter_no_damage
[23:16:25] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[23:16:25] [PASSED] drm_test_damage_iter_no_damage_src_moved
[23:16:25] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[23:16:25] [PASSED] drm_test_damage_iter_no_damage_not_visible
[23:16:25] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[23:16:25] [PASSED] drm_test_damage_iter_no_damage_no_fb
[23:16:25] [PASSED] drm_test_damage_iter_simple_damage
[23:16:25] [PASSED] drm_test_damage_iter_single_damage
[23:16:25] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[23:16:25] [PASSED] drm_test_damage_iter_single_damage_outside_src
[23:16:25] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[23:16:25] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[23:16:25] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[23:16:25] [PASSED] drm_test_damage_iter_single_damage_src_moved
[23:16:25] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[23:16:25] [PASSED] drm_test_damage_iter_damage
[23:16:25] [PASSED] drm_test_damage_iter_damage_one_intersect
[23:16:25] [PASSED] drm_test_damage_iter_damage_one_outside
[23:16:25] [PASSED] drm_test_damage_iter_damage_src_moved
[23:16:25] [PASSED] drm_test_damage_iter_damage_not_visible
[23:16:25] ================ [PASSED] drm_damage_helper ================
[23:16:25] ============== drm_dp_mst_helper (3 subtests) ==============
[23:16:25] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[23:16:25] [PASSED] Clock 154000 BPP 30 DSC disabled
[23:16:25] [PASSED] Clock 234000 BPP 30 DSC disabled
[23:16:25] [PASSED] Clock 297000 BPP 24 DSC disabled
[23:16:25] [PASSED] Clock 332880 BPP 24 DSC enabled
[23:16:25] [PASSED] Clock 324540 BPP 24 DSC enabled
[23:16:25] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[23:16:25] ============== drm_test_dp_mst_calc_pbn_div  ===============
[23:16:25] [PASSED] Link rate 2000000 lane count 4
[23:16:25] [PASSED] Link rate 2000000 lane count 2
[23:16:25] [PASSED] Link rate 2000000 lane count 1
[23:16:25] [PASSED] Link rate 1350000 lane count 4
[23:16:25] [PASSED] Link rate 1350000 lane count 2
[23:16:25] [PASSED] Link rate 1350000 lane count 1
[23:16:25] [PASSED] Link rate 1000000 lane count 4
[23:16:25] [PASSED] Link rate 1000000 lane count 2
[23:16:25] [PASSED] Link rate 1000000 lane count 1
[23:16:25] [PASSED] Link rate 810000 lane count 4
[23:16:25] [PASSED] Link rate 810000 lane count 2
[23:16:25] [PASSED] Link rate 810000 lane count 1
[23:16:25] [PASSED] Link rate 540000 lane count 4
[23:16:25] [PASSED] Link rate 540000 lane count 2
[23:16:25] [PASSED] Link rate 540000 lane count 1
[23:16:25] [PASSED] Link rate 270000 lane count 4
[23:16:25] [PASSED] Link rate 270000 lane count 2
[23:16:25] [PASSED] Link rate 270000 lane count 1
[23:16:25] [PASSED] Link rate 162000 lane count 4
[23:16:25] [PASSED] Link rate 162000 lane count 2
[23:16:25] [PASSED] Link rate 162000 lane count 1
[23:16:25] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[23:16:25] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[23:16:25] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[23:16:25] [PASSED] DP_POWER_UP_PHY with port number
[23:16:25] [PASSED] DP_POWER_DOWN_PHY with port number
[23:16:25] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[23:16:25] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[23:16:25] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[23:16:25] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[23:16:25] [PASSED] DP_QUERY_PAYLOAD with port number
[23:16:25] [PASSED] DP_QUERY_PAYLOAD with VCPI
[23:16:25] [PASSED] DP_REMOTE_DPCD_READ with port number
[23:16:25] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[23:16:25] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[23:16:25] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[23:16:25] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[23:16:25] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[23:16:25] [PASSED] DP_REMOTE_I2C_READ with port number
[23:16:25] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[23:16:25] [PASSED] DP_REMOTE_I2C_READ with transactions array
[23:16:25] [PASSED] DP_REMOTE_I2C_WRITE with port number
[23:16:25] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[23:16:25] [PASSED] DP_REMOTE_I2C_WRITE with data array
[23:16:25] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[23:16:25] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[23:16:25] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[23:16:25] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[23:16:25] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[23:16:25] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[23:16:25] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[23:16:25] ================ [PASSED] drm_dp_mst_helper ================
[23:16:25] ================== drm_exec (7 subtests) ===================
[23:16:25] [PASSED] sanitycheck
[23:16:25] [PASSED] test_lock
[23:16:25] [PASSED] test_lock_unlock
[23:16:25] [PASSED] test_duplicates
[23:16:25] [PASSED] test_prepare
[23:16:25] [PASSED] test_prepare_array
[23:16:25] [PASSED] test_multiple_loops
[23:16:25] ==================== [PASSED] drm_exec =====================
[23:16:25] =========== drm_format_helper_test (17 subtests) ===========
[23:16:25] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[23:16:25] [PASSED] single_pixel_source_buffer
[23:16:25] [PASSED] single_pixel_clip_rectangle
[23:16:25] [PASSED] well_known_colors
[23:16:25] [PASSED] destination_pitch
[23:16:25] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[23:16:25] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[23:16:25] [PASSED] single_pixel_source_buffer
[23:16:25] [PASSED] single_pixel_clip_rectangle
[23:16:25] [PASSED] well_known_colors
[23:16:25] [PASSED] destination_pitch
[23:16:25] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[23:16:25] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[23:16:25] [PASSED] single_pixel_source_buffer
[23:16:25] [PASSED] single_pixel_clip_rectangle
[23:16:25] [PASSED] well_known_colors
[23:16:25] [PASSED] destination_pitch
[23:16:25] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[23:16:25] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[23:16:25] [PASSED] single_pixel_source_buffer
[23:16:25] [PASSED] single_pixel_clip_rectangle
[23:16:25] [PASSED] well_known_colors
[23:16:25] [PASSED] destination_pitch
[23:16:25] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[23:16:25] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[23:16:25] [PASSED] single_pixel_source_buffer
[23:16:25] [PASSED] single_pixel_clip_rectangle
[23:16:25] [PASSED] well_known_colors
[23:16:25] [PASSED] destination_pitch
[23:16:25] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[23:16:25] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[23:16:25] [PASSED] single_pixel_source_buffer
[23:16:25] [PASSED] single_pixel_clip_rectangle
[23:16:25] [PASSED] well_known_colors
[23:16:25] [PASSED] destination_pitch
[23:16:25] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[23:16:25] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[23:16:25] [PASSED] single_pixel_source_buffer
[23:16:25] [PASSED] single_pixel_clip_rectangle
[23:16:25] [PASSED] well_known_colors
[23:16:25] [PASSED] destination_pitch
[23:16:25] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[23:16:25] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[23:16:25] [PASSED] single_pixel_source_buffer
[23:16:25] [PASSED] single_pixel_clip_rectangle
[23:16:25] [PASSED] well_known_colors
[23:16:25] [PASSED] destination_pitch
[23:16:25] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[23:16:25] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[23:16:25] [PASSED] single_pixel_source_buffer
[23:16:25] [PASSED] single_pixel_clip_rectangle
[23:16:25] [PASSED] well_known_colors
[23:16:25] [PASSED] destination_pitch
[23:16:25] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[23:16:25] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[23:16:25] [PASSED] single_pixel_source_buffer
[23:16:25] [PASSED] single_pixel_clip_rectangle
[23:16:25] [PASSED] well_known_colors
[23:16:25] [PASSED] destination_pitch
[23:16:25] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[23:16:25] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[23:16:25] [PASSED] single_pixel_source_buffer
[23:16:25] [PASSED] single_pixel_clip_rectangle
[23:16:25] [PASSED] well_known_colors
[23:16:25] [PASSED] destination_pitch
[23:16:25] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[23:16:25] ============== drm_test_fb_xrgb8888_to_mono  ===============
[23:16:25] [PASSED] single_pixel_source_buffer
[23:16:25] [PASSED] single_pixel_clip_rectangle
[23:16:25] [PASSED] well_known_colors
[23:16:25] [PASSED] destination_pitch
[23:16:25] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[23:16:25] ==================== drm_test_fb_swab  =====================
[23:16:25] [PASSED] single_pixel_source_buffer
[23:16:25] [PASSED] single_pixel_clip_rectangle
[23:16:25] [PASSED] well_known_colors
[23:16:25] [PASSED] destination_pitch
[23:16:25] ================ [PASSED] drm_test_fb_swab =================
[23:16:25] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[23:16:25] [PASSED] single_pixel_source_buffer
[23:16:25] [PASSED] single_pixel_clip_rectangle
[23:16:25] [PASSED] well_known_colors
[23:16:25] [PASSED] destination_pitch
[23:16:25] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[23:16:25] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[23:16:25] [PASSED] single_pixel_source_buffer
[23:16:25] [PASSED] single_pixel_clip_rectangle
[23:16:25] [PASSED] well_known_colors
[23:16:25] [PASSED] destination_pitch
[23:16:25] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[23:16:25] ================= drm_test_fb_clip_offset  =================
[23:16:25] [PASSED] pass through
[23:16:25] [PASSED] horizontal offset
[23:16:25] [PASSED] vertical offset
[23:16:25] [PASSED] horizontal and vertical offset
[23:16:25] [PASSED] horizontal offset (custom pitch)
[23:16:25] [PASSED] vertical offset (custom pitch)
[23:16:25] [PASSED] horizontal and vertical offset (custom pitch)
[23:16:25] ============= [PASSED] drm_test_fb_clip_offset =============
[23:16:25] =================== drm_test_fb_memcpy  ====================
[23:16:25] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[23:16:25] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[23:16:25] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[23:16:25] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[23:16:25] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[23:16:25] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[23:16:25] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[23:16:25] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[23:16:25] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[23:16:25] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[23:16:25] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[23:16:25] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[23:16:25] =============== [PASSED] drm_test_fb_memcpy ================
[23:16:25] ============= [PASSED] drm_format_helper_test ==============
[23:16:25] ================= drm_format (18 subtests) =================
[23:16:25] [PASSED] drm_test_format_block_width_invalid
[23:16:25] [PASSED] drm_test_format_block_width_one_plane
[23:16:25] [PASSED] drm_test_format_block_width_two_plane
[23:16:25] [PASSED] drm_test_format_block_width_three_plane
[23:16:25] [PASSED] drm_test_format_block_width_tiled
[23:16:25] [PASSED] drm_test_format_block_height_invalid
[23:16:25] [PASSED] drm_test_format_block_height_one_plane
[23:16:25] [PASSED] drm_test_format_block_height_two_plane
[23:16:25] [PASSED] drm_test_format_block_height_three_plane
[23:16:25] [PASSED] drm_test_format_block_height_tiled
[23:16:25] [PASSED] drm_test_format_min_pitch_invalid
[23:16:25] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[23:16:25] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[23:16:25] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[23:16:25] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[23:16:25] [PASSED] drm_test_format_min_pitch_two_plane
[23:16:25] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[23:16:25] [PASSED] drm_test_format_min_pitch_tiled
[23:16:25] =================== [PASSED] drm_format ====================
[23:16:25] ============== drm_framebuffer (10 subtests) ===============
[23:16:25] ========== drm_test_framebuffer_check_src_coords  ==========
[23:16:25] [PASSED] Success: source fits into fb
[23:16:25] [PASSED] Fail: overflowing fb with x-axis coordinate
[23:16:25] [PASSED] Fail: overflowing fb with y-axis coordinate
[23:16:25] [PASSED] Fail: overflowing fb with source width
[23:16:25] [PASSED] Fail: overflowing fb with source height
[23:16:25] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[23:16:25] [PASSED] drm_test_framebuffer_cleanup
[23:16:25] =============== drm_test_framebuffer_create  ===============
[23:16:25] [PASSED] ABGR8888 normal sizes
[23:16:25] [PASSED] ABGR8888 max sizes
[23:16:25] [PASSED] ABGR8888 pitch greater than min required
[23:16:25] [PASSED] ABGR8888 pitch less than min required
[23:16:25] [PASSED] ABGR8888 Invalid width
[23:16:25] [PASSED] ABGR8888 Invalid buffer handle
[23:16:25] [PASSED] No pixel format
[23:16:25] [PASSED] ABGR8888 Width 0
[23:16:25] [PASSED] ABGR8888 Height 0
[23:16:25] [PASSED] ABGR8888 Out of bound height * pitch combination
[23:16:25] [PASSED] ABGR8888 Large buffer offset
[23:16:25] [PASSED] ABGR8888 Buffer offset for inexistent plane
[23:16:25] [PASSED] ABGR8888 Invalid flag
[23:16:25] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[23:16:25] [PASSED] ABGR8888 Valid buffer modifier
[23:16:25] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[23:16:25] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[23:16:25] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[23:16:25] [PASSED] NV12 Normal sizes
[23:16:25] [PASSED] NV12 Max sizes
[23:16:25] [PASSED] NV12 Invalid pitch
[23:16:25] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[23:16:25] [PASSED] NV12 different  modifier per-plane
[23:16:25] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[23:16:25] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[23:16:25] [PASSED] NV12 Modifier for inexistent plane
[23:16:25] [PASSED] NV12 Handle for inexistent plane
[23:16:25] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[23:16:25] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[23:16:25] [PASSED] YVU420 Normal sizes
[23:16:25] [PASSED] YVU420 Max sizes
[23:16:25] [PASSED] YVU420 Invalid pitch
[23:16:25] [PASSED] YVU420 Different pitches
[23:16:25] [PASSED] YVU420 Different buffer offsets/pitches
[23:16:25] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[23:16:25] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[23:16:25] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[23:16:25] [PASSED] YVU420 Valid modifier
[23:16:25] [PASSED] YVU420 Different modifiers per plane
[23:16:25] [PASSED] YVU420 Modifier for inexistent plane
[23:16:25] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[23:16:25] [PASSED] X0L2 Normal sizes
[23:16:25] [PASSED] X0L2 Max sizes
[23:16:25] [PASSED] X0L2 Invalid pitch
[23:16:25] [PASSED] X0L2 Pitch greater than minimum required
[23:16:25] [PASSED] X0L2 Handle for inexistent plane
[23:16:25] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[23:16:25] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[23:16:25] [PASSED] X0L2 Valid modifier
[23:16:25] [PASSED] X0L2 Modifier for inexistent plane
[23:16:25] =========== [PASSED] drm_test_framebuffer_create ===========
[23:16:25] [PASSED] drm_test_framebuffer_free
[23:16:25] [PASSED] drm_test_framebuffer_init
[23:16:25] [PASSED] drm_test_framebuffer_init_bad_format
[23:16:25] [PASSED] drm_test_framebuffer_init_dev_mismatch
[23:16:25] [PASSED] drm_test_framebuffer_lookup
[23:16:25] [PASSED] drm_test_framebuffer_lookup_inexistent
[23:16:25] [PASSED] drm_test_framebuffer_modifiers_not_supported
[23:16:25] ================= [PASSED] drm_framebuffer =================
[23:16:25] ================ drm_gem_shmem (8 subtests) ================
[23:16:25] [PASSED] drm_gem_shmem_test_obj_create
[23:16:25] [PASSED] drm_gem_shmem_test_obj_create_private
[23:16:25] [PASSED] drm_gem_shmem_test_pin_pages
[23:16:25] [PASSED] drm_gem_shmem_test_vmap
[23:16:25] [PASSED] drm_gem_shmem_test_get_sg_table
[23:16:25] [PASSED] drm_gem_shmem_test_get_pages_sgt
[23:16:25] [PASSED] drm_gem_shmem_test_madvise
[23:16:25] [PASSED] drm_gem_shmem_test_purge
[23:16:25] ================== [PASSED] drm_gem_shmem ==================
[23:16:25] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[23:16:25] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[23:16:25] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[23:16:25] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[23:16:25] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[23:16:25] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[23:16:25] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[23:16:25] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[23:16:25] [PASSED] Automatic
[23:16:25] [PASSED] Full
[23:16:25] [PASSED] Limited 16:235
[23:16:25] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[23:16:25] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[23:16:25] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[23:16:25] [PASSED] drm_test_check_disable_connector
[23:16:25] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[23:16:25] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[23:16:25] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[23:16:25] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[23:16:25] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[23:16:25] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[23:16:25] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[23:16:25] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[23:16:25] [PASSED] drm_test_check_output_bpc_dvi
[23:16:25] [PASSED] drm_test_check_output_bpc_format_vic_1
[23:16:25] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[23:16:25] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[23:16:25] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[23:16:25] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[23:16:25] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[23:16:25] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[23:16:25] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[23:16:25] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[23:16:25] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[23:16:25] [PASSED] drm_test_check_broadcast_rgb_value
[23:16:25] [PASSED] drm_test_check_bpc_8_value
[23:16:25] [PASSED] drm_test_check_bpc_10_value
[23:16:25] [PASSED] drm_test_check_bpc_12_value
[23:16:25] [PASSED] drm_test_check_format_value
[23:16:25] [PASSED] drm_test_check_tmds_char_value
[23:16:25] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[23:16:25] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[23:16:25] [PASSED] drm_test_check_mode_valid
[23:16:25] [PASSED] drm_test_check_mode_valid_reject
[23:16:25] [PASSED] drm_test_check_mode_valid_reject_rate
[23:16:25] [PASSED] drm_test_check_mode_valid_reject_max_clock
[23:16:25] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[23:16:25] ================= drm_managed (2 subtests) =================
[23:16:25] [PASSED] drm_test_managed_release_action
[23:16:25] [PASSED] drm_test_managed_run_action
[23:16:25] =================== [PASSED] drm_managed ===================
[23:16:25] =================== drm_mm (6 subtests) ====================
[23:16:25] [PASSED] drm_test_mm_init
[23:16:25] [PASSED] drm_test_mm_debug
[23:16:25] [PASSED] drm_test_mm_align32
[23:16:25] [PASSED] drm_test_mm_align64
[23:16:25] [PASSED] drm_test_mm_lowest
[23:16:25] [PASSED] drm_test_mm_highest
[23:16:25] ===================== [PASSED] drm_mm ======================
[23:16:25] ============= drm_modes_analog_tv (5 subtests) =============
[23:16:25] [PASSED] drm_test_modes_analog_tv_mono_576i
[23:16:25] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[23:16:25] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[23:16:25] [PASSED] drm_test_modes_analog_tv_pal_576i
[23:16:25] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[23:16:25] =============== [PASSED] drm_modes_analog_tv ===============
[23:16:25] ============== drm_plane_helper (2 subtests) ===============
[23:16:25] =============== drm_test_check_plane_state  ================
[23:16:25] [PASSED] clipping_simple
[23:16:25] [PASSED] clipping_rotate_reflect
[23:16:25] [PASSED] positioning_simple
[23:16:25] [PASSED] upscaling
[23:16:25] [PASSED] downscaling
[23:16:25] [PASSED] rounding1
[23:16:25] [PASSED] rounding2
[23:16:25] [PASSED] rounding3
[23:16:25] [PASSED] rounding4
[23:16:25] =========== [PASSED] drm_test_check_plane_state ============
[23:16:25] =========== drm_test_check_invalid_plane_state  ============
[23:16:25] [PASSED] positioning_invalid
[23:16:25] [PASSED] upscaling_invalid
[23:16:25] [PASSED] downscaling_invalid
[23:16:25] ======= [PASSED] drm_test_check_invalid_plane_state ========
[23:16:25] ================ [PASSED] drm_plane_helper =================
[23:16:25] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[23:16:25] ====== drm_test_connector_helper_tv_get_modes_check  =======
[23:16:25] [PASSED] None
[23:16:25] [PASSED] PAL
[23:16:25] [PASSED] NTSC
[23:16:25] [PASSED] Both, NTSC Default
[23:16:25] [PASSED] Both, PAL Default
[23:16:25] [PASSED] Both, NTSC Default, with PAL on command-line
[23:16:25] [PASSED] Both, PAL Default, with NTSC on command-line
[23:16:25] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[23:16:25] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[23:16:25] ================== drm_rect (9 subtests) ===================
[23:16:25] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[23:16:25] [PASSED] drm_test_rect_clip_scaled_not_clipped
[23:16:25] [PASSED] drm_test_rect_clip_scaled_clipped
[23:16:25] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[23:16:25] ================= drm_test_rect_intersect  =================
[23:16:25] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[23:16:25] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[23:16:25] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[23:16:25] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[23:16:25] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[23:16:25] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[23:16:25] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[23:16:25] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[23:16:25] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[23:16:25] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[23:16:25] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[23:16:25] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[23:16:25] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[23:16:25] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[23:16:25] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[23:16:25] ============= [PASSED] drm_test_rect_intersect =============
[23:16:25] ================ drm_test_rect_calc_hscale  ================
[23:16:25] [PASSED] normal use
[23:16:25] [PASSED] out of max range
[23:16:25] [PASSED] out of min range
[23:16:25] [PASSED] zero dst
[23:16:25] [PASSED] negative src
[23:16:25] [PASSED] negative dst
[23:16:25] ============ [PASSED] drm_test_rect_calc_hscale ============
[23:16:25] ================ drm_test_rect_calc_vscale  ================
[23:16:25] [PASSED] normal use
stty: 'standard input': Inappropriate ioctl for device
[23:16:25] [PASSED] out of max range
[23:16:25] [PASSED] out of min range
[23:16:25] [PASSED] zero dst
[23:16:25] [PASSED] negative src
[23:16:25] [PASSED] negative dst
[23:16:25] ============ [PASSED] drm_test_rect_calc_vscale ============
[23:16:25] ================== drm_test_rect_rotate  ===================
[23:16:25] [PASSED] reflect-x
[23:16:25] [PASSED] reflect-y
[23:16:25] [PASSED] rotate-0
[23:16:25] [PASSED] rotate-90
[23:16:25] [PASSED] rotate-180
[23:16:25] [PASSED] rotate-270
[23:16:25] ============== [PASSED] drm_test_rect_rotate ===============
[23:16:25] ================ drm_test_rect_rotate_inv  =================
[23:16:25] [PASSED] reflect-x
[23:16:25] [PASSED] reflect-y
[23:16:25] [PASSED] rotate-0
[23:16:25] [PASSED] rotate-90
[23:16:25] [PASSED] rotate-180
[23:16:25] [PASSED] rotate-270
[23:16:25] ============ [PASSED] drm_test_rect_rotate_inv =============
[23:16:25] ==================== [PASSED] drm_rect =====================
[23:16:25] ============ drm_sysfb_modeset_test (1 subtest) ============
[23:16:25] ============ drm_test_sysfb_build_fourcc_list  =============
[23:16:25] [PASSED] no native formats
[23:16:25] [PASSED] XRGB8888 as native format
[23:16:25] [PASSED] remove duplicates
[23:16:25] [PASSED] convert alpha formats
[23:16:25] [PASSED] random formats
[23:16:25] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[23:16:25] ============= [PASSED] drm_sysfb_modeset_test ==============
[23:16:25] ================== drm_fixp (2 subtests) ===================
[23:16:25] [PASSED] drm_test_int2fixp
[23:16:25] [PASSED] drm_test_sm2fixp
[23:16:25] ==================== [PASSED] drm_fixp =====================
[23:16:25] ============================================================
[23:16:25] Testing complete. Ran 624 tests: passed: 624
[23:16:25] Elapsed time: 27.653s total, 1.679s configuring, 25.551s building, 0.385s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[23:16:25] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[23:16:27] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[23:16:36] Starting KUnit Kernel (1/1)...
[23:16:36] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[23:16:36] ================= ttm_device (5 subtests) ==================
[23:16:36] [PASSED] ttm_device_init_basic
[23:16:36] [PASSED] ttm_device_init_multiple
[23:16:36] [PASSED] ttm_device_fini_basic
[23:16:36] [PASSED] ttm_device_init_no_vma_man
[23:16:36] ================== ttm_device_init_pools  ==================
[23:16:36] [PASSED] No DMA allocations, no DMA32 required
[23:16:36] [PASSED] DMA allocations, DMA32 required
[23:16:36] [PASSED] No DMA allocations, DMA32 required
[23:16:36] [PASSED] DMA allocations, no DMA32 required
[23:16:36] ============== [PASSED] ttm_device_init_pools ==============
[23:16:36] =================== [PASSED] ttm_device ====================
[23:16:36] ================== ttm_pool (8 subtests) ===================
[23:16:36] ================== ttm_pool_alloc_basic  ===================
[23:16:36] [PASSED] One page
[23:16:36] [PASSED] More than one page
[23:16:36] [PASSED] Above the allocation limit
[23:16:36] [PASSED] One page, with coherent DMA mappings enabled
[23:16:36] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[23:16:36] ============== [PASSED] ttm_pool_alloc_basic ===============
[23:16:36] ============== ttm_pool_alloc_basic_dma_addr  ==============
[23:16:36] [PASSED] One page
[23:16:36] [PASSED] More than one page
[23:16:36] [PASSED] Above the allocation limit
[23:16:36] [PASSED] One page, with coherent DMA mappings enabled
[23:16:36] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[23:16:36] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[23:16:36] [PASSED] ttm_pool_alloc_order_caching_match
[23:16:36] [PASSED] ttm_pool_alloc_caching_mismatch
[23:16:36] [PASSED] ttm_pool_alloc_order_mismatch
[23:16:36] [PASSED] ttm_pool_free_dma_alloc
[23:16:36] [PASSED] ttm_pool_free_no_dma_alloc
[23:16:36] [PASSED] ttm_pool_fini_basic
[23:16:36] ==================== [PASSED] ttm_pool =====================
[23:16:36] ================ ttm_resource (8 subtests) =================
[23:16:36] ================= ttm_resource_init_basic  =================
[23:16:36] [PASSED] Init resource in TTM_PL_SYSTEM
[23:16:36] [PASSED] Init resource in TTM_PL_VRAM
[23:16:36] [PASSED] Init resource in a private placement
[23:16:36] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[23:16:36] ============= [PASSED] ttm_resource_init_basic =============
[23:16:36] [PASSED] ttm_resource_init_pinned
[23:16:36] [PASSED] ttm_resource_fini_basic
[23:16:36] [PASSED] ttm_resource_manager_init_basic
[23:16:36] [PASSED] ttm_resource_manager_usage_basic
[23:16:36] [PASSED] ttm_resource_manager_set_used_basic
[23:16:36] [PASSED] ttm_sys_man_alloc_basic
[23:16:36] [PASSED] ttm_sys_man_free_basic
[23:16:36] ================== [PASSED] ttm_resource ===================
[23:16:36] =================== ttm_tt (15 subtests) ===================
[23:16:36] ==================== ttm_tt_init_basic  ====================
[23:16:36] [PASSED] Page-aligned size
[23:16:36] [PASSED] Extra pages requested
[23:16:36] ================ [PASSED] ttm_tt_init_basic ================
[23:16:36] [PASSED] ttm_tt_init_misaligned
[23:16:36] [PASSED] ttm_tt_fini_basic
[23:16:36] [PASSED] ttm_tt_fini_sg
[23:16:36] [PASSED] ttm_tt_fini_shmem
[23:16:36] [PASSED] ttm_tt_create_basic
[23:16:36] [PASSED] ttm_tt_create_invalid_bo_type
[23:16:36] [PASSED] ttm_tt_create_ttm_exists
[23:16:36] [PASSED] ttm_tt_create_failed
[23:16:36] [PASSED] ttm_tt_destroy_basic
[23:16:36] [PASSED] ttm_tt_populate_null_ttm
[23:16:36] [PASSED] ttm_tt_populate_populated_ttm
[23:16:36] [PASSED] ttm_tt_unpopulate_basic
[23:16:36] [PASSED] ttm_tt_unpopulate_empty_ttm
[23:16:36] [PASSED] ttm_tt_swapin_basic
[23:16:36] ===================== [PASSED] ttm_tt ======================
[23:16:36] =================== ttm_bo (14 subtests) ===================
[23:16:36] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[23:16:36] [PASSED] Cannot be interrupted and sleeps
[23:16:36] [PASSED] Cannot be interrupted, locks straight away
[23:16:36] [PASSED] Can be interrupted, sleeps
[23:16:36] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[23:16:36] [PASSED] ttm_bo_reserve_locked_no_sleep
[23:16:36] [PASSED] ttm_bo_reserve_no_wait_ticket
[23:16:36] [PASSED] ttm_bo_reserve_double_resv
[23:16:36] [PASSED] ttm_bo_reserve_interrupted
[23:16:36] [PASSED] ttm_bo_reserve_deadlock
[23:16:36] [PASSED] ttm_bo_unreserve_basic
[23:16:36] [PASSED] ttm_bo_unreserve_pinned
[23:16:36] [PASSED] ttm_bo_unreserve_bulk
[23:16:36] [PASSED] ttm_bo_fini_basic
[23:16:36] [PASSED] ttm_bo_fini_shared_resv
[23:16:36] [PASSED] ttm_bo_pin_basic
[23:16:36] [PASSED] ttm_bo_pin_unpin_resource
[23:16:36] [PASSED] ttm_bo_multiple_pin_one_unpin
[23:16:36] ===================== [PASSED] ttm_bo ======================
[23:16:36] ============== ttm_bo_validate (21 subtests) ===============
[23:16:36] ============== ttm_bo_init_reserved_sys_man  ===============
[23:16:36] [PASSED] Buffer object for userspace
[23:16:36] [PASSED] Kernel buffer object
[23:16:36] [PASSED] Shared buffer object
[23:16:36] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[23:16:36] ============== ttm_bo_init_reserved_mock_man  ==============
[23:16:36] [PASSED] Buffer object for userspace
[23:16:36] [PASSED] Kernel buffer object
[23:16:36] [PASSED] Shared buffer object
[23:16:36] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[23:16:36] [PASSED] ttm_bo_init_reserved_resv
[23:16:36] ================== ttm_bo_validate_basic  ==================
[23:16:36] [PASSED] Buffer object for userspace
[23:16:36] [PASSED] Kernel buffer object
[23:16:36] [PASSED] Shared buffer object
[23:16:36] ============== [PASSED] ttm_bo_validate_basic ==============
[23:16:36] [PASSED] ttm_bo_validate_invalid_placement
[23:16:36] ============= ttm_bo_validate_same_placement  ==============
[23:16:36] [PASSED] System manager
[23:16:36] [PASSED] VRAM manager
[23:16:36] ========= [PASSED] ttm_bo_validate_same_placement ==========
[23:16:36] [PASSED] ttm_bo_validate_failed_alloc
[23:16:36] [PASSED] ttm_bo_validate_pinned
[23:16:36] [PASSED] ttm_bo_validate_busy_placement
[23:16:36] ================ ttm_bo_validate_multihop  =================
[23:16:36] [PASSED] Buffer object for userspace
[23:16:36] [PASSED] Kernel buffer object
[23:16:36] [PASSED] Shared buffer object
[23:16:36] ============ [PASSED] ttm_bo_validate_multihop =============
[23:16:36] ========== ttm_bo_validate_no_placement_signaled  ==========
[23:16:36] [PASSED] Buffer object in system domain, no page vector
[23:16:36] [PASSED] Buffer object in system domain with an existing page vector
[23:16:36] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[23:16:36] ======== ttm_bo_validate_no_placement_not_signaled  ========
[23:16:36] [PASSED] Buffer object for userspace
[23:16:36] [PASSED] Kernel buffer object
[23:16:36] [PASSED] Shared buffer object
[23:16:36] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[23:16:36] [PASSED] ttm_bo_validate_move_fence_signaled
[23:16:37] ========= ttm_bo_validate_move_fence_not_signaled  =========
[23:16:37] [PASSED] Waits for GPU
[23:16:37] [PASSED] Tries to lock straight away
[23:16:37] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[23:16:37] [PASSED] ttm_bo_validate_happy_evict
[23:16:37] [PASSED] ttm_bo_validate_all_pinned_evict
[23:16:37] [PASSED] ttm_bo_validate_allowed_only_evict
[23:16:37] [PASSED] ttm_bo_validate_deleted_evict
[23:16:37] [PASSED] ttm_bo_validate_busy_domain_evict
[23:16:37] [PASSED] ttm_bo_validate_evict_gutting
[23:16:37] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[23:16:37] ================= [PASSED] ttm_bo_validate =================
[23:16:37] ============================================================
[23:16:37] Testing complete. Ran 101 tests: passed: 101
[23:16:37] Elapsed time: 11.496s total, 1.682s configuring, 9.549s building, 0.227s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

Re: [PATCH 09/12] drm/xe/kunit: Use KUNIT_EXPECT_EQ() in xe_wa_gt()

[Michal Wajdeczko]

On 1/16/2026 11:12 PM, Gustavo Sousa wrote:
> Use KUNIT_EXPECT_EQ() in xe_wa_gt() as reg_sr errors in one GT do not
> impact the next GT in the test.
> 
> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>

Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>

> ---
>  drivers/gpu/drm/xe/tests/xe_wa_test.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/xe/tests/xe_wa_test.c b/drivers/gpu/drm/xe/tests/xe_wa_test.c
> index 49d191043dfa..2bf6fab015cd 100644
> --- a/drivers/gpu/drm/xe/tests/xe_wa_test.c
> +++ b/drivers/gpu/drm/xe/tests/xe_wa_test.c
> @@ -55,7 +55,7 @@ static void xe_wa_gt(struct kunit *test)
>  		xe_wa_process_gt(gt);
>  		xe_tuning_process_gt(gt);
>  
> -		KUNIT_ASSERT_EQ(test, gt->reg_sr.errors, 0);
> +		KUNIT_EXPECT_EQ(test, gt->reg_sr.errors, 0);
>  	}
>  }
>  
> 

Re: [PATCH 01/12] drm/xe: Define CACHE_MODE_1 as MCR register

[Matt Roper]

On Fri, Jan 16, 2026 at 07:12:09PM -0300, Gustavo Sousa wrote:
> CACHE_MODE_1 is a MCR register for all platforms that currently use it
> in the Xe driver.  Use XE_REG_MCR() when defining it.
> 
> Fixes: 8cd7e9759766 ("drm/xe: Add missing DG2 lrc workarounds")
> Fixes: ff063430caa8 ("drm/xe/mtl: Add some initial MTL workarounds")
> Bspec: 66534, 67788
> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>

It looks like we're handling this incorrectly on i915 too, so we should
probably also send a patch over there to split out a separate definition
for the Xe_HP and later platforms.


Matt

> ---
>  drivers/gpu/drm/xe/regs/xe_gt_regs.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> index 24fc64fc832e..bc984dde2773 100644
> --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> @@ -141,7 +141,7 @@
>  
>  #define XEHPG_INSTDONE_GEOM_SVGUNIT		XE_REG_MCR(0x666c)
>  
> -#define CACHE_MODE_1				XE_REG(0x7004, XE_REG_OPTION_MASKED)
> +#define CACHE_MODE_1				XE_REG_MCR(0x7004, XE_REG_OPTION_MASKED)
>  #define   MSAA_OPTIMIZATION_REDUC_DISABLE	REG_BIT(11)
>  
>  #define COMMON_SLICE_CHICKEN1			XE_REG(0x7010, XE_REG_OPTION_MASKED)
> 
> -- 
> 2.52.0
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

Re: [PATCH 02/12] drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN1

[Matt Roper]

On Fri, Jan 16, 2026 at 07:12:10PM -0300, Gustavo Sousa wrote:
> The register COMMON_SLICE_CHICKEN1 is a MCR register on Xe2.
> Let's make sure to define a MCR version of it and use it for the
> relevant IP versions.
> 
> Use XEHP_ as prefix for the register name, since it is MCR as of Xe_HP.
> 
> Fixes: a5d221924e13 ("drm/xe/xe2_hpg: Add set of workarounds")
> Fixes: 9f18b55b6d3f ("drm/xe/xe2: Add workaround 18033852989")
> Bspec: 66534, 71185
> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>

> ---
>  drivers/gpu/drm/xe/regs/xe_gt_regs.h | 1 +
>  drivers/gpu/drm/xe/xe_wa.c           | 4 ++--
>  2 files changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> index bc984dde2773..d4a1bb1edc9c 100644
> --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> @@ -145,6 +145,7 @@
>  #define   MSAA_OPTIMIZATION_REDUC_DISABLE	REG_BIT(11)
>  
>  #define COMMON_SLICE_CHICKEN1			XE_REG(0x7010, XE_REG_OPTION_MASKED)
> +#define XEHP_COMMON_SLICE_CHICKEN1		XE_REG_MCR(0x7010, XE_REG_OPTION_MASKED)
>  #define   DISABLE_BOTTOM_CLIP_RECTANGLE_TEST	REG_BIT(14)
>  
>  #define HIZ_CHICKEN					XE_REG(0x7018, XE_REG_OPTION_MASKED)
> diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
> index a991ee2b8781..a91db59a3d0a 100644
> --- a/drivers/gpu/drm/xe/xe_wa.c
> +++ b/drivers/gpu/drm/xe/xe_wa.c
> @@ -794,7 +794,7 @@ static const struct xe_rtp_entry_sr lrc_was[] = {
>  	},
>  	{ XE_RTP_NAME("18033852989"),
>  	  XE_RTP_RULES(GRAPHICS_VERSION(2004), ENGINE_CLASS(RENDER)),
> -	  XE_RTP_ACTIONS(SET(COMMON_SLICE_CHICKEN1, DISABLE_BOTTOM_CLIP_RECTANGLE_TEST))
> +	  XE_RTP_ACTIONS(SET(XEHP_COMMON_SLICE_CHICKEN1, DISABLE_BOTTOM_CLIP_RECTANGLE_TEST))
>  	},
>  	{ XE_RTP_NAME("14021567978"),
>  	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, XE_RTP_END_VERSION_UNDEFINED),
> @@ -852,7 +852,7 @@ static const struct xe_rtp_entry_sr lrc_was[] = {
>  	},
>  	{ XE_RTP_NAME("18033852989"),
>  	  XE_RTP_RULES(GRAPHICS_VERSION(2001), ENGINE_CLASS(RENDER)),
> -	  XE_RTP_ACTIONS(SET(COMMON_SLICE_CHICKEN1, DISABLE_BOTTOM_CLIP_RECTANGLE_TEST))
> +	  XE_RTP_ACTIONS(SET(XEHP_COMMON_SLICE_CHICKEN1, DISABLE_BOTTOM_CLIP_RECTANGLE_TEST))
>  	},
>  
>  	/* Xe3_LPG */
> 
> -- 
> 2.52.0
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

Re: [PATCH 03/12] drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN4

[Matt Roper]

On Fri, Jan 16, 2026 at 07:12:11PM -0300, Gustavo Sousa wrote:
> The register COMMON_SLICE_CHICKEN4 is a MCR register on both Xe2 and
> Xe3. Let's make sure to define a MCR version of it and use it for the
> relevant IP versions.
> 
> Use XEHP_ as prefix for the register name, since it is MCR as of Xe_HP.
> 
> Fixes: 8d6f16f1f082 ("drm/xe: Extend Wa_22021007897 to Xe3 platforms")
> Fixes: e5c13e2c505b ("drm/xe/xe2hpg: Add Wa_22021007897")
> Bspec: 66534, 71185, 74417
> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>

> ---
>  drivers/gpu/drm/xe/regs/xe_gt_regs.h | 1 +
>  drivers/gpu/drm/xe/xe_wa.c           | 4 ++--
>  2 files changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> index d4a1bb1edc9c..f129210e8e48 100644
> --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> @@ -168,6 +168,7 @@
>  #define XEHPG_SC_INSTDONE_EXTRA2		XE_REG_MCR(0x7108)
>  
>  #define COMMON_SLICE_CHICKEN4			XE_REG(0x7300, XE_REG_OPTION_MASKED)
> +#define XEHP_COMMON_SLICE_CHICKEN4		XE_REG_MCR(0x7300, XE_REG_OPTION_MASKED)
>  #define   SBE_PUSH_CONSTANT_BEHIND_FIX_ENABLE	REG_BIT(12)
>  #define   DISABLE_TDC_LOAD_BALANCING_CALC	REG_BIT(6)
>  
> diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
> index a91db59a3d0a..58c37250479f 100644
> --- a/drivers/gpu/drm/xe/xe_wa.c
> +++ b/drivers/gpu/drm/xe/xe_wa.c
> @@ -848,7 +848,7 @@ static const struct xe_rtp_entry_sr lrc_was[] = {
>  	},
>  	{ XE_RTP_NAME("22021007897"),
>  	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2002), ENGINE_CLASS(RENDER)),
> -	  XE_RTP_ACTIONS(SET(COMMON_SLICE_CHICKEN4, SBE_PUSH_CONSTANT_BEHIND_FIX_ENABLE))
> +	  XE_RTP_ACTIONS(SET(XEHP_COMMON_SLICE_CHICKEN4, SBE_PUSH_CONSTANT_BEHIND_FIX_ENABLE))
>  	},
>  	{ XE_RTP_NAME("18033852989"),
>  	  XE_RTP_RULES(GRAPHICS_VERSION(2001), ENGINE_CLASS(RENDER)),
> @@ -868,7 +868,7 @@ static const struct xe_rtp_entry_sr lrc_was[] = {
>  	},
>  	{ XE_RTP_NAME("22021007897"),
>  	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3005), ENGINE_CLASS(RENDER)),
> -	  XE_RTP_ACTIONS(SET(COMMON_SLICE_CHICKEN4, SBE_PUSH_CONSTANT_BEHIND_FIX_ENABLE))
> +	  XE_RTP_ACTIONS(SET(XEHP_COMMON_SLICE_CHICKEN4, SBE_PUSH_CONSTANT_BEHIND_FIX_ENABLE))
>  	},
>  	{ XE_RTP_NAME("14024681466"),
>  	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3005), ENGINE_CLASS(RENDER)),
> 
> -- 
> 2.52.0
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

Re: [PATCH 07/12] drm/xe: Extract xe_hw_engine_setup_reg_lrc()

[Matt Roper]

On Fri, Jan 16, 2026 at 07:12:15PM -0300, Gustavo Sousa wrote:
> The steps for processing RTP rules that build up an engine's reg_lrc
> arguably belongs to xe_hw_engine.c and should be encapsulated into a
> function.  Furthermore, we will want to use that function and avoid
> calling xe_gt_record_default_lrcs() in upcoming changes to xe_wa_test.c.
> 
> Move that logic to a new function called xe_hw_engine_setup_reg_lrc().
> 
> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>

> ---
>  drivers/gpu/drm/xe/xe_gt.c        |  5 +----
>  drivers/gpu/drm/xe/xe_hw_engine.c | 15 +++++++++++++--
>  drivers/gpu/drm/xe/xe_hw_engine.h |  2 +-
>  3 files changed, 15 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
> index 9d090d0f2438..68cd26286956 100644
> --- a/drivers/gpu/drm/xe/xe_gt.c
> +++ b/drivers/gpu/drm/xe/xe_gt.c
> @@ -348,10 +348,7 @@ int xe_gt_record_default_lrcs(struct xe_gt *gt)
>  		if (gt->default_lrc[hwe->class])
>  			continue;
>  
> -		xe_reg_sr_init(&hwe->reg_lrc, hwe->name, xe);
> -		xe_wa_process_lrc(hwe);
> -		xe_hw_engine_setup_default_lrc_state(hwe);
> -		xe_tuning_process_lrc(hwe);
> +		xe_hw_engine_setup_reg_lrc(hwe);
>  
>  		default_lrc = drmm_kzalloc(&xe->drm,
>  					   xe_gt_lrc_size(gt, hwe->class),
> diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
> index 4d3ee5226e3a..8d239291bc7b 100644
> --- a/drivers/gpu/drm/xe/xe_hw_engine.c
> +++ b/drivers/gpu/drm/xe/xe_hw_engine.c
> @@ -374,8 +374,8 @@ static bool xe_rtp_cfeg_wmtp_disabled(const struct xe_device *xe,
>  	return xe_mmio_read32(&hwe->gt->mmio, XEHP_FUSE4) & CFEG_WMTP_DISABLE;
>  }
>  
> -void
> -xe_hw_engine_setup_default_lrc_state(struct xe_hw_engine *hwe)
> +static void
> +hw_engine_setup_default_lrc_state(struct xe_hw_engine *hwe)
>  {
>  	struct xe_gt *gt = hwe->gt;
>  	const u8 mocs_write_idx = gt->mocs.uc_index;
> @@ -411,6 +411,17 @@ xe_hw_engine_setup_default_lrc_state(struct xe_hw_engine *hwe)
>  	xe_rtp_process_to_sr(&ctx, lrc_setup, ARRAY_SIZE(lrc_setup), &hwe->reg_lrc);
>  }
>  
> +void xe_hw_engine_setup_reg_lrc(struct xe_hw_engine *hwe)
> +{
> +	struct xe_gt *gt = hwe->gt;
> +	struct xe_device *xe = gt_to_xe(gt);
> +
> +	xe_reg_sr_init(&hwe->reg_lrc, hwe->name, xe);
> +	xe_wa_process_lrc(hwe);
> +	hw_engine_setup_default_lrc_state(hwe);
> +	xe_tuning_process_lrc(hwe);
> +}
> +
>  static void
>  hw_engine_setup_default_state(struct xe_hw_engine *hwe)
>  {
> diff --git a/drivers/gpu/drm/xe/xe_hw_engine.h b/drivers/gpu/drm/xe/xe_hw_engine.h
> index 6b5f9fa2a594..7e897620db65 100644
> --- a/drivers/gpu/drm/xe/xe_hw_engine.h
> +++ b/drivers/gpu/drm/xe/xe_hw_engine.h
> @@ -59,7 +59,7 @@ struct xe_hw_engine_snapshot *
>  xe_hw_engine_snapshot_capture(struct xe_hw_engine *hwe, struct xe_exec_queue *q);
>  void xe_hw_engine_snapshot_free(struct xe_hw_engine_snapshot *snapshot);
>  void xe_hw_engine_print(struct xe_hw_engine *hwe, struct drm_printer *p);
> -void xe_hw_engine_setup_default_lrc_state(struct xe_hw_engine *hwe);
> +void xe_hw_engine_setup_reg_lrc(struct xe_hw_engine *hwe);
>  
>  bool xe_hw_engine_is_reserved(struct xe_hw_engine *hwe);
>  
> 
> -- 
> 2.52.0
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

Re: [PATCH 08/12] drm/xe: Extract xe_hw_engines_setup_runtime_mask()

[Matt Roper]

On Fri, Jan 16, 2026 at 07:12:16PM -0300, Gustavo Sousa wrote:
> The function xe_hw_engines_init_early() does several runtime checks to
> adjust engine_mask and only after that does the hw_engine_init_early()
> calls to do the early initialization.
> 
> In an upcoming change to xe_wa_test.c, we will want to be able to call
> that function without those runtime checks.  So, let's extract them into
> a new function called xe_hw_engines_setup_runtime_mask() and have the
> current caller of xe_hw_engines_init_early() to call it first.
> 
> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>

> ---
>  drivers/gpu/drm/xe/xe_gt.c        | 2 ++
>  drivers/gpu/drm/xe/xe_hw_engine.c | 9 ++++++---
>  drivers/gpu/drm/xe/xe_hw_engine.h | 1 +
>  3 files changed, 9 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
> index 68cd26286956..f7f0c048a00a 100644
> --- a/drivers/gpu/drm/xe/xe_gt.c
> +++ b/drivers/gpu/drm/xe/xe_gt.c
> @@ -507,6 +507,8 @@ static int gt_init_with_gt_forcewake(struct xe_gt *gt)
>  	/* Rerun MCR init as we now have hw engine list */
>  	xe_gt_mcr_init(gt);
>  
> +	xe_hw_engines_setup_runtime_mask(gt);
> +
>  	err = xe_hw_engines_init_early(gt);
>  	if (err) {
>  		dump_pat_on_error(gt);
> diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
> index 8d239291bc7b..c2de6e5d9249 100644
> --- a/drivers/gpu/drm/xe/xe_hw_engine.c
> +++ b/drivers/gpu/drm/xe/xe_hw_engine.c
> @@ -868,15 +868,18 @@ static void check_sw_disable(struct xe_gt *gt)
>  	}
>  }
>  
> -int xe_hw_engines_init_early(struct xe_gt *gt)
> +void xe_hw_engines_setup_runtime_mask(struct xe_gt *gt)
>  {
> -	int i;
> -
>  	read_media_fuses(gt);
>  	read_copy_fuses(gt);
>  	read_compute_fuses(gt);
>  	check_gsc_availability(gt);
>  	check_sw_disable(gt);
> +}
> +
> +int xe_hw_engines_init_early(struct xe_gt *gt)
> +{
> +	int i;
>  
>  	BUILD_BUG_ON(XE_HW_ENGINE_PREEMPT_TIMEOUT < XE_HW_ENGINE_PREEMPT_TIMEOUT_MIN);
>  	BUILD_BUG_ON(XE_HW_ENGINE_PREEMPT_TIMEOUT > XE_HW_ENGINE_PREEMPT_TIMEOUT_MAX);
> diff --git a/drivers/gpu/drm/xe/xe_hw_engine.h b/drivers/gpu/drm/xe/xe_hw_engine.h
> index 7e897620db65..6729ebf0462c 100644
> --- a/drivers/gpu/drm/xe/xe_hw_engine.h
> +++ b/drivers/gpu/drm/xe/xe_hw_engine.h
> @@ -49,6 +49,7 @@ struct xe_exec_queue;
>  #define XE_HW_ENGINE_PREEMPT_TIMEOUT_MAX (10 * 1000 * 1000)
>  #endif
>  
> +void xe_hw_engines_setup_runtime_mask(struct xe_gt *gt);
>  int xe_hw_engines_init_early(struct xe_gt *gt);
>  int xe_hw_engines_init(struct xe_gt *gt);
>  void xe_hw_engine_handle_irq(struct xe_hw_engine *hwe, u16 intr_vec);
> 
> -- 
> 2.52.0
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

Re: [PATCH 09/12] drm/xe/kunit: Use KUNIT_EXPECT_EQ() in xe_wa_gt()

[Matt Roper]

On Fri, Jan 16, 2026 at 07:12:17PM -0300, Gustavo Sousa wrote:
> Use KUNIT_EXPECT_EQ() in xe_wa_gt() as reg_sr errors in one GT do not
> impact the next GT in the test.
> 
> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>

> ---
>  drivers/gpu/drm/xe/tests/xe_wa_test.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/xe/tests/xe_wa_test.c b/drivers/gpu/drm/xe/tests/xe_wa_test.c
> index 49d191043dfa..2bf6fab015cd 100644
> --- a/drivers/gpu/drm/xe/tests/xe_wa_test.c
> +++ b/drivers/gpu/drm/xe/tests/xe_wa_test.c
> @@ -55,7 +55,7 @@ static void xe_wa_gt(struct kunit *test)
>  		xe_wa_process_gt(gt);
>  		xe_tuning_process_gt(gt);
>  
> -		KUNIT_ASSERT_EQ(test, gt->reg_sr.errors, 0);
> +		KUNIT_EXPECT_EQ(test, gt->reg_sr.errors, 0);
>  	}
>  }
>  
> 
> -- 
> 2.52.0
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

Re: [PATCH 10/12] drm/xe/kunit: Include hw_engines in xe_wa test

[Matt Roper]

On Fri, Jan 16, 2026 at 07:12:18PM -0300, Gustavo Sousa wrote:
> For better coverage, include RTP to register save/store processing for
> hw_engines as another xe_wa test case.
> 
> Note that, since one of the RTP rules involve calling
> xe_rtp_cfeg_wmtp_disabled(), we need to intercept a MMIO read to
> XEHP_FUSE4 to allow the test to run without crashing.
> 
> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>

The read interception approach may need to be changed if you take
Michal's suggestion on patches 5/6, but otherwise,

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>


> ---
>  drivers/gpu/drm/xe/tests/xe_wa_test.c | 50 ++++++++++++++++++++++++++++++++++-
>  1 file changed, 49 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/xe/tests/xe_wa_test.c b/drivers/gpu/drm/xe/tests/xe_wa_test.c
> index 2bf6fab015cd..3311f05a6fc2 100644
> --- a/drivers/gpu/drm/xe/tests/xe_wa_test.c
> +++ b/drivers/gpu/drm/xe/tests/xe_wa_test.c
> @@ -6,15 +6,34 @@
>  #include <drm/drm_drv.h>
>  #include <drm/drm_kunit_helpers.h>
>  
> +#include <kunit/static_stub.h>
>  #include <kunit/test.h>
>  
> +#include "regs/xe_gt_regs.h"
> +#include "tests/xe_mmio_intercept.h"
>  #include "xe_device.h"
> +#include "xe_gt.h"
> +#include "xe_hw_engine.h"
>  #include "xe_kunit_helpers.h"
>  #include "xe_pci_test.h"
>  #include "xe_reg_sr.h"
>  #include "xe_tuning.h"
>  #include "xe_wa.h"
>  
> +static bool xe_wa_mmio_intercept_read32(struct kunit *test,
> +					struct xe_mmio *mmio,
> +					struct xe_reg reg,
> +					u32 *val)
> +{
> +	/* For XE_RTP_RULES(...FUNC(xe_rtp_cfeg_wmtp_disabled)...). */
> +	if (reg.raw == XEHP_FUSE4.raw) {
> +		*val = CFEG_WMTP_DISABLE;
> +		return true;
> +	}
> +
> +	return false;
> +}
> +
>  static int xe_wa_test_init(struct kunit *test)
>  {
>  	const struct xe_pci_fake_data *param = test->param_value;
> @@ -33,10 +52,13 @@ static int xe_wa_test_init(struct kunit *test)
>  	ret = xe_pci_fake_device_init(xe);
>  	KUNIT_ASSERT_EQ(test, ret, 0);
>  
> +	kunit_activate_static_stub(test,
> +				   xe_mmio_intercept_read32,
> +				   xe_wa_mmio_intercept_read32);
> +
>  	if (!param->graphics_verx100)
>  		xe->info.step = param->step;
>  
> -	/* TODO: init hw engines for engine/LRC WAs */
>  	xe->drm.dev = dev;
>  	test->priv = xe;
>  
> @@ -59,8 +81,34 @@ static void xe_wa_gt(struct kunit *test)
>  	}
>  }
>  
> +static void xe_wa_hw_engines(struct kunit *test)
> +{
> +	struct xe_device *xe = test->priv;
> +	struct xe_gt *gt;
> +	int id;
> +
> +	for_each_gt(gt, xe, id) {
> +		struct xe_hw_engine *hwe;
> +		int hwe_id;
> +
> +		/*
> +		 * The early initialization also causes RTP processing to build
> +		 * up each engine's reg_sr.
> +		 */
> +		xe_hw_engines_init_early(gt);
> +		for_each_hw_engine(hwe, gt, hwe_id)
> +			KUNIT_EXPECT_EQ(test, hwe->reg_sr.errors, 0);
> +
> +		for_each_hw_engine(hwe, gt, hwe_id) {
> +			xe_hw_engine_setup_reg_lrc(hwe);
> +			KUNIT_EXPECT_EQ(test, hwe->reg_lrc.errors, 0);
> +		}
> +	}
> +}
> +
>  static struct kunit_case xe_wa_tests[] = {
>  	KUNIT_CASE_PARAM(xe_wa_gt, xe_pci_fake_data_gen_params),
> +	KUNIT_CASE_PARAM(xe_wa_hw_engines, xe_pci_fake_data_gen_params),
>  	{}
>  };
>  
> 
> -- 
> 2.52.0
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

Re: [PATCH 11/12] drm/xe/mcr: Extract reg_in_steering_type_ranges()

[Matt Roper]

On Fri, Jan 16, 2026 at 07:12:19PM -0300, Gustavo Sousa wrote:
> The logic to check if a register falls within one of the ranges for a
> steering type is already duplicated in
> xe_gt_mcr_get_nonterminated_steering().  We will also want to use that
> same logic in another upcoming function.  Let's factor out that logic
> and put it into a function named reg_in_steering_type_ranges().
> 
> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>

> ---
>  drivers/gpu/drm/xe/xe_gt_mcr.c | 43 +++++++++++++++++++++++-------------------
>  1 file changed, 24 insertions(+), 19 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_gt_mcr.c b/drivers/gpu/drm/xe/xe_gt_mcr.c
> index 7c1fe9ac120d..e7eb3c6da234 100644
> --- a/drivers/gpu/drm/xe/xe_gt_mcr.c
> +++ b/drivers/gpu/drm/xe/xe_gt_mcr.c
> @@ -609,6 +609,20 @@ void xe_gt_mcr_set_implicit_defaults(struct xe_gt *gt)
>  	}
>  }
>  
> +static bool reg_in_steering_type_ranges(struct xe_gt *gt,
> +					struct xe_reg reg,
> +					int type)
> +{
> +	if (!gt->steering[type].ranges)
> +		return false;
> +
> +	for (int i = 0; gt->steering[type].ranges[i].end > 0; i++)
> +		if (xe_mmio_in_range(&gt->mmio, &gt->steering[type].ranges[i], reg))
> +			return true;
> +
> +	return false;
> +}
> +
>  /*
>   * xe_gt_mcr_get_nonterminated_steering - find group/instance values that
>   *    will steer a register to a non-terminated instance
> @@ -630,30 +644,21 @@ bool xe_gt_mcr_get_nonterminated_steering(struct xe_gt *gt,
>  					  u8 *group, u8 *instance)
>  {
>  	const struct xe_reg reg = to_xe_reg(reg_mcr);
> -	const struct xe_mmio_range *implicit_ranges;
>  
>  	for (int type = 0; type < IMPLICIT_STEERING; type++) {
> -		if (!gt->steering[type].ranges)
> -			continue;
> -
> -		for (int i = 0; gt->steering[type].ranges[i].end > 0; i++) {
> -			if (xe_mmio_in_range(&gt->mmio, &gt->steering[type].ranges[i], reg)) {
> -				drm_WARN(&gt_to_xe(gt)->drm, !gt->steering[type].initialized,
> -					 "Uninitialized usage of MCR register %s/%#x\n",
> -					 xe_steering_types[type].name, reg.addr);
> -
> -				*group = gt->steering[type].group_target;
> -				*instance = gt->steering[type].instance_target;
> -				return true;
> -			}
> +		if (reg_in_steering_type_ranges(gt, reg, type)) {
> +			drm_WARN(&gt_to_xe(gt)->drm, !gt->steering[type].initialized,
> +				 "Uninitialized usage of MCR register %s/%#x\n",
> +				 xe_steering_types[type].name, reg.addr);
> +
> +			*group = gt->steering[type].group_target;
> +			*instance = gt->steering[type].instance_target;
> +			return true;
>  		}
>  	}
>  
> -	implicit_ranges = gt->steering[IMPLICIT_STEERING].ranges;
> -	if (implicit_ranges)
> -		for (int i = 0; implicit_ranges[i].end > 0; i++)
> -			if (xe_mmio_in_range(&gt->mmio, &implicit_ranges[i], reg))
> -				return false;
> +	if (reg_in_steering_type_ranges(gt, reg, IMPLICIT_STEERING))
> +		return false;
>  
>  	/*
>  	 * Not found in a steering table and not a register with implicit
> 
> -- 
> 2.52.0
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

Re: [PATCH 12/12] drm/xe/reg_sr: Do sanity check for MCR vs non-MCR

[Matt Roper]

On Fri, Jan 16, 2026 at 07:12:20PM -0300, Gustavo Sousa wrote:
> The type struct xe_reg_mcr exists to ensure that the correct API is used
> when handling MCR registers.  However, for in the register save/restore
> functionality, the RTP processing always cast the register to a struct
> xe_reg and then apply_one_mmio() selects the MMIO API based on the "mcr"
> field of the register instance.
> 
> This allows the developer to commit mistakes like passing a MCR register
> for an RTP action for a platform where the respective register is not
> MCR; and vice-versa.
> 
> To capture such scenarios, do a sanity check in xe_reg_sr_add() and
> raise warnings if inconsistencies are detected.
> 
> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
> ---
>  drivers/gpu/drm/xe/tests/xe_rtp_test.c | 71 ++++++++++++++++++++++++++++++----
>  drivers/gpu/drm/xe/tests/xe_wa_test.c  | 11 +++++-
>  drivers/gpu/drm/xe/xe_gt_mcr.c         | 21 ++++++++++
>  drivers/gpu/drm/xe/xe_gt_mcr.h         |  1 +
>  drivers/gpu/drm/xe/xe_reg_sr.c         | 36 +++++++++++++++++
>  5 files changed, 132 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/tests/xe_rtp_test.c b/drivers/gpu/drm/xe/tests/xe_rtp_test.c
> index d2255a59e58f..80bd83f56d04 100644
> --- a/drivers/gpu/drm/xe/tests/xe_rtp_test.c
> +++ b/drivers/gpu/drm/xe/tests/xe_rtp_test.c
> @@ -9,24 +9,30 @@
>  #include <drm/drm_drv.h>
>  #include <drm/drm_kunit_helpers.h>
>  
> +#include <kunit/static_stub.h>
>  #include <kunit/test.h>
>  
>  #include "regs/xe_gt_regs.h"
>  #include "regs/xe_reg_defs.h"
>  #include "xe_device.h"
>  #include "xe_device_types.h"
> +#include "xe_gt_mcr.h"
>  #include "xe_kunit_helpers.h"
>  #include "xe_pci_test.h"
>  #include "xe_reg_sr.h"
>  #include "xe_rtp.h"
>  
> -#define REGULAR_REG1	XE_REG(1)
> -#define REGULAR_REG2	XE_REG(2)
> -#define REGULAR_REG3	XE_REG(3)
> -#define MCR_REG1	XE_REG_MCR(1)
> -#define MCR_REG2	XE_REG_MCR(2)
> -#define MCR_REG3	XE_REG_MCR(3)
> -#define MASKED_REG1	XE_REG(1, XE_REG_OPTION_MASKED)
> +#define REGULAR_REG1		XE_REG(1)
> +#define REGULAR_REG2		XE_REG(2)
> +#define REGULAR_REG3		XE_REG(3)
> +#define REGULAR_REG4		XE_REG(4)
> +#define BAD_REGULAR_REG5	XE_REG(5)
> +#define MCR_REG1		XE_REG_MCR(1)
> +#define MCR_REG2		XE_REG_MCR(2)
> +#define MCR_REG3		XE_REG_MCR(3)
> +#define BAD_MCR_REG4		XE_REG_MCR(4)
> +#define MCR_REG5		XE_REG_MCR(5)
> +#define MASKED_REG1		XE_REG(1, XE_REG_OPTION_MASKED)
>  
>  #undef XE_REG_MCR
>  #define XE_REG_MCR(...)     XE_REG(__VA_ARGS__, .mcr = 1)
> @@ -48,6 +54,23 @@ struct rtp_test_case {
>  	const struct xe_rtp_entry *entries;
>  };
>  
> +static bool fake_xe_gt_mcr_check_reg(struct xe_gt *gt, struct xe_reg reg)
> +{
> +	/*
> +	 * All supported platforms in this imaginary setup will always have REG4
> +	 * as a non-MCR register and REG5 as MCR, meaning that BAD_MCR_REG4 and
> +	 * BAD_REGULAR_REG5 represent programming errors to be captured by our
> +	 * tests.
> +	 */
> +	if (reg.raw == BAD_REGULAR_REG5.raw)
> +		return true;
> +
> +	if (reg.raw == BAD_MCR_REG4.raw)
> +		return false;
> +
> +	return reg.mcr;
> +}
> +
>  static bool match_yes(const struct xe_device *xe, const struct xe_gt *gt,
>  		      const struct xe_hw_engine *hwe)
>  {
> @@ -304,6 +327,38 @@ static const struct rtp_to_sr_test_case rtp_to_sr_cases[] = {
>  			{}
>  		},
>  	},
> +	{
> +		.name = "bad-mcr-reg-forced-to-regular",
> +		.expected_reg = REGULAR_REG4,
> +		.expected_set_bits = REG_BIT(0),
> +		.expected_clr_bits = REG_BIT(0),
> +		.expected_active = BIT(0),
> +		.expected_count_sr_entries = 1,
> +		.expected_sr_errors = 1,
> +		.entries = (const struct xe_rtp_entry_sr[]) {
> +			{ XE_RTP_NAME("bad-mcr-regular-reg"),
> +			  XE_RTP_RULES(FUNC(match_yes)),
> +			  XE_RTP_ACTIONS(SET(BAD_MCR_REG4, REG_BIT(0)))
> +			},
> +			{}
> +		},
> +	},
> +	{
> +		.name = "bad-regular-reg-forced-to-mcr",
> +		.expected_reg = MCR_REG5,
> +		.expected_set_bits = REG_BIT(0),
> +		.expected_clr_bits = REG_BIT(0),
> +		.expected_active = BIT(0),
> +		.expected_count_sr_entries = 1,
> +		.expected_sr_errors = 1,
> +		.entries = (const struct xe_rtp_entry_sr[]) {
> +			{ XE_RTP_NAME("bad-regular-reg"),
> +			  XE_RTP_RULES(FUNC(match_yes)),
> +			  XE_RTP_ACTIONS(SET(BAD_REGULAR_REG5, REG_BIT(0)))
> +			},
> +			{}
> +		},
> +	},
>  };
>  
>  static void xe_rtp_process_to_sr_tests(struct kunit *test)
> @@ -522,6 +577,8 @@ static int xe_rtp_test_init(struct kunit *test)
>  	xe->drm.dev = dev;
>  	test->priv = xe;
>  
> +	kunit_activate_static_stub(test, xe_gt_mcr_check_reg, fake_xe_gt_mcr_check_reg);
> +
>  	return 0;
>  }
>  
> diff --git a/drivers/gpu/drm/xe/tests/xe_wa_test.c b/drivers/gpu/drm/xe/tests/xe_wa_test.c
> index 3311f05a6fc2..326278488cdb 100644
> --- a/drivers/gpu/drm/xe/tests/xe_wa_test.c
> +++ b/drivers/gpu/drm/xe/tests/xe_wa_test.c
> @@ -13,6 +13,7 @@
>  #include "tests/xe_mmio_intercept.h"
>  #include "xe_device.h"
>  #include "xe_gt.h"
> +#include "xe_gt_mcr.h"
>  #include "xe_hw_engine.h"
>  #include "xe_kunit_helpers.h"
>  #include "xe_pci_test.h"
> @@ -38,8 +39,10 @@ static int xe_wa_test_init(struct kunit *test)
>  {
>  	const struct xe_pci_fake_data *param = test->param_value;
>  	struct xe_pci_fake_data data = *param;
> -	struct xe_device *xe;
>  	struct device *dev;
> +	struct xe_device *xe;
> +	struct xe_gt *gt;
> +	int id;
>  	int ret;
>  
>  	dev = drm_kunit_helper_alloc_device(test);
> @@ -52,6 +55,12 @@ static int xe_wa_test_init(struct kunit *test)
>  	ret = xe_pci_fake_device_init(xe);
>  	KUNIT_ASSERT_EQ(test, ret, 0);
>  
> +	/* Needed for sanitize_mcr(). */
> +	for_each_gt(gt, xe, id) {
> +		xe_gt_mcr_init_early(gt);
> +		xe_gt_mmio_init(gt);
> +	}
> +
>  	kunit_activate_static_stub(test,
>  				   xe_mmio_intercept_read32,
>  				   xe_wa_mmio_intercept_read32);
> diff --git a/drivers/gpu/drm/xe/xe_gt_mcr.c b/drivers/gpu/drm/xe/xe_gt_mcr.c
> index e7eb3c6da234..c6d9766b6cc6 100644
> --- a/drivers/gpu/drm/xe/xe_gt_mcr.c
> +++ b/drivers/gpu/drm/xe/xe_gt_mcr.c
> @@ -3,6 +3,8 @@
>   * Copyright © 2022 Intel Corporation
>   */
>  
> +#include <kunit/static_stub.h>
> +
>  #include "xe_gt_mcr.h"
>  
>  #include "regs/xe_gt_regs.h"
> @@ -623,6 +625,25 @@ static bool reg_in_steering_type_ranges(struct xe_gt *gt,
>  	return false;
>  }
>  
> +/*
> + * xe_gt_mcr_check_reg - check if a register is recognized by this GT as MCR
> + * @gt: GT structure
> + * @reg: The register to check
> + *
> + * Returns true if the register offset falls within one of the MMIO ranges
> + * classified as MCR for the GT.
> + */
> +bool xe_gt_mcr_check_reg(struct xe_gt *gt, struct xe_reg reg)
> +{
> +	KUNIT_STATIC_STUB_REDIRECT(xe_gt_mcr_check_reg, gt, reg);
> +
> +	for (int type = 0; type <= IMPLICIT_STEERING; type++)
> +		if (reg_in_steering_type_ranges(gt, reg, type))
> +			return true;
> +
> +	return false;
> +}
> +
>  /*
>   * xe_gt_mcr_get_nonterminated_steering - find group/instance values that
>   *    will steer a register to a non-terminated instance
> diff --git a/drivers/gpu/drm/xe/xe_gt_mcr.h b/drivers/gpu/drm/xe/xe_gt_mcr.h
> index 283a1c9770e2..d6b50b52b1d5 100644
> --- a/drivers/gpu/drm/xe/xe_gt_mcr.h
> +++ b/drivers/gpu/drm/xe/xe_gt_mcr.h
> @@ -26,6 +26,7 @@ void xe_gt_mcr_unicast_write(struct xe_gt *gt, struct xe_reg_mcr mcr_reg,
>  void xe_gt_mcr_multicast_write(struct xe_gt *gt, struct xe_reg_mcr mcr_reg,
>  			       u32 value);
>  
> +bool xe_gt_mcr_check_reg(struct xe_gt *gt, struct xe_reg reg);
>  bool xe_gt_mcr_get_nonterminated_steering(struct xe_gt *gt,
>  					  struct xe_reg_mcr reg_mcr,
>  					  u8 *group, u8 *instance);
> diff --git a/drivers/gpu/drm/xe/xe_reg_sr.c b/drivers/gpu/drm/xe/xe_reg_sr.c
> index d3e13ea33123..89d35301defa 100644
> --- a/drivers/gpu/drm/xe/xe_reg_sr.c
> +++ b/drivers/gpu/drm/xe/xe_reg_sr.c
> @@ -68,14 +68,49 @@ static void reg_sr_inc_error(struct xe_reg_sr *sr)
>  #endif
>  }
>  
> +static struct xe_reg sanitize_mcr(struct xe_reg_sr *sr,
> +				  const struct xe_reg_sr_entry *e,
> +				  struct xe_gt *gt)
> +{
> +	struct xe_reg reg = e->reg;
> +	bool is_mcr;
> +
> +	/*
> +	 * We need the gt structure to check MCR ranges.
> +	 */
> +	if (!gt)
> +		return reg;
> +
> +	is_mcr = xe_gt_mcr_check_reg(gt, reg);
> +
> +	if (is_mcr && !reg.mcr) {
> +		reg.mcr = 1;
> +		xe_gt_warn(gt, "xe_reg_sr_entry using non-MCR register for address 0x%x, forcing MCR\n",
> +			   reg.addr);
> +		reg_sr_inc_error(sr);
> +	}
> +
> +	if (!is_mcr && reg.mcr) {
> +		reg.mcr = 0;
> +		xe_gt_warn(gt, "xe_reg_sr_entry using MCR register for address 0x%x, forcing non-MCR\n",
> +			   reg.addr);
> +		reg_sr_inc_error(sr);
> +	}

This sanity check (and fixup) is going to happen not only on the
non-live kunit test, but also on true device probes on hardware, right?
In this case, we might want to consider downgrading these messages to
notice level rather than warn.  The kunit results should let us know if
we have a problem here (even before we have real hardware CI setup), but
if a mistake somehow sneaks by, having warn (or error) level messages
printed in dmesg will cause CI to consider the entire device probe a
failure and will prevent any further testing from running on the
platform until it's fixed.  That seems unnecessarily harsh since a
mistake here shouldn't really impact most of the other CI results we
could be receiving.


Actually, related to the earlier patches in this series, I wonder if we
truly need to mock up register accesses for non-live kunits.  It seems
like we might still wind up with some FUNC() rules that incorrectly
disqualify RTP entries that we want to check.  I'm thinking of oddball
rules like xe_rtp_match_gt_has_discontiguous_dss_groups that either come
from previous parts of driver initialization, and/or have somewhat
non-obvious relationships to register values. It seems like for the
purposes of checking MCR vs non-MCR status, the _only_ thing that
matters is IP version:  IP version determines which MCR tables are used
on the platform and IP version is the only RTP rule that actually
matters to confirming that we're using proper register definitions.
E.g., for an RTP entry with rules:

   XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2004),
                GRAPHICS_STEP(B0, D0),
                FUNC(check_foo()),
                FUNC(check_bar()))
   XE_RTP_ACTIONS(SET(CHKNREG, SOMEBIT)),

we don't care what check_foo() and check_bar() are, or even what the
stepping is.  Only the IP version rule is necessary to determine whether
we should check CHKNREG's status against a specific IP version's MCR
table and for the purposes of the kunit we can treat all other rules as
'true' without trying to process them.

So maybe a simpler approach would be to have an alternative version of
xe_rtp_process_to_sr() intended for use in non-live kunit tests that
just ignores everything except the IP version rules and treats
everything else as an automatic 'true.'


Matt

> +
> +	return reg;
> +}
> +
>  int xe_reg_sr_add(struct xe_reg_sr *sr,
>  		  const struct xe_reg_sr_entry *e,
>  		  struct xe_gt *gt)
>  {
>  	unsigned long idx = e->reg.addr;
>  	struct xe_reg_sr_entry *pentry = xa_load(&sr->xa, idx);
> +	struct xe_reg reg;
>  	int ret;
>  
> +	reg = sanitize_mcr(sr, e, gt);
> +
>  	if (pentry) {
>  		if (!compatible_entries(pentry, e)) {
>  			ret = -EINVAL;
> @@ -96,6 +131,7 @@ int xe_reg_sr_add(struct xe_reg_sr *sr,
>  	}
>  
>  	*pentry = *e;
> +	pentry->reg = reg;
>  	ret = xa_err(xa_store(&sr->xa, idx, pentry, GFP_KERNEL));
>  	if (ret)
>  		goto fail;
> 
> -- 
> 2.52.0
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

Re: [PATCH 04/12] drm/xe/kunit: Add xe_kunit_is_live_test()

[Gustavo Sousa]

Michal Wajdeczko <michal.wajdeczko@intel.com> writes:

> On 1/16/2026 11:12 PM, Gustavo Sousa wrote:
>> In upcoming changes we will need to differentiate between regular and
>> live KUnit tests.  Add the function xe_kunit_is_live_test() for that
>> purpose.
>
> since you are adding this function to xe_kunit_helper.h maybe it should be named as
>
> 	xe_kunit_helper_is_live_test(test)
>
> to follow other function names in this file?

Yep, makes sense.  Let's do that.

I think in the future we could just rename the files to xe_kunit.[ch].

>
>> 
>> Note that this is implemented in a rather hackish way, by leveraging
>> KUnit's static stubbing functionality.  A better approach would be to
>> store a boolean somewhere in test->priv that would tell if a test is a
>> live one, however that's not quite feasible today given the inconsistent
>> usage of test->priv (there is not a single uniform type of data assigned
>> to it across existing test).
>
> all live tests code should finally have access to the xe_device so alternate option would be to add some flag(s) there
>
> 	struct xe_device {
> 	...
> 	#if IS_ENABLED(CONFIG_DRM_XE_KUNIT_TEST)
> 		struct {
> 			bool live_testing_in_progress;
> 		} kunit;
> 	#endif

I think I would prefer that we would have a common struct that is
attached to test->priv.

>
> but IMO solution with static stub is fine
>
>> 
>> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
>> ---
>>  drivers/gpu/drm/xe/tests/xe_kunit_helpers.c | 25 +++++++++++++++++++++++++
>>  drivers/gpu/drm/xe/tests/xe_kunit_helpers.h |  4 ++++
>>  2 files changed, 29 insertions(+)
>> 
>> diff --git a/drivers/gpu/drm/xe/tests/xe_kunit_helpers.c b/drivers/gpu/drm/xe/tests/xe_kunit_helpers.c
>> index bc5156966ce9..369b26b3a32c 100644
>> --- a/drivers/gpu/drm/xe/tests/xe_kunit_helpers.c
>> +++ b/drivers/gpu/drm/xe/tests/xe_kunit_helpers.c
>> @@ -16,6 +16,18 @@
>>  #include "xe_device_types.h"
>>  #include "xe_pm.h"
>>  
>> +/**
>> + * xe_kunit_is_live_test - Return true if @test is a live test.
>> + * @test: the &kunit test
>> + *
>> + * Return: True for a live test and false otherwise.
>> + */
>> +bool xe_kunit_is_live_test(struct kunit *test)
>> +{
>> +	KUNIT_STATIC_STUB_REDIRECT(xe_kunit_is_live_test, test);
>> +	return false;
>> +}
>> +
>>  /**
>>   * xe_kunit_helper_alloc_xe_device - Allocate a &xe_device for a KUnit test.
>>   * @test: the &kunit where this &xe_device will be used
>> @@ -93,6 +105,11 @@ EXPORT_SYMBOL_IF_KUNIT(xe_kunit_helper_xe_device_test_init);
>>  
>>  KUNIT_DEFINE_ACTION_WRAPPER(put_xe_pm_runtime, xe_pm_runtime_put, struct xe_device *);
>>  
>> +static bool xe_kunit_is_live_test_indeed(struct kunit *test)
>> +{
>> +	return true;
>> +}
>> +
>>  /**
>>   * xe_kunit_helper_xe_device_live_test_init - Prepare a &xe_device for
>>   *                                            use in a live KUnit test.
>> @@ -116,6 +133,14 @@ int xe_kunit_helper_xe_device_live_test_init(struct kunit *test)
>>  {
>>  	struct xe_device *xe = xe_device_const_cast(test->param_value);
>>  
>> +	/*
>> +	 * FIXME: This is a hack and a better solution is to have the "priv"
>> +	 * member of tests have a boolean to tell if a test is a live one.
>> +	 * Unfortunately that can't be done today because "priv" does not point
>> +	 * to a single unified type across existing tests.
>
> note that we use priv to pass xe, and likely if any other live init hook will replace it,
> priv will still point to either tile or gt or similar object, from which we should be able to reach xe again
>

Yep, but I would much rather have a common struct to contain common test
information and then a "data" member to point to test-specific data.
Today there is no easy way to predict what test->priv will contain and
it makes it harder to add common helpers (like the one I'm adding here)
that would work across different tests.

--
Gustavo Sousa

>> +	 */
>> +	kunit_activate_static_stub(test, xe_kunit_is_live_test, xe_kunit_is_live_test_indeed);
>> +
>>  	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, xe);
>>  	kunit_info(test, "running on %s device\n", xe->info.platform_name);
>>  
>> diff --git a/drivers/gpu/drm/xe/tests/xe_kunit_helpers.h b/drivers/gpu/drm/xe/tests/xe_kunit_helpers.h
>> index 83665f7b1254..4b846cfb1f40 100644
>> --- a/drivers/gpu/drm/xe/tests/xe_kunit_helpers.h
>> +++ b/drivers/gpu/drm/xe/tests/xe_kunit_helpers.h
>> @@ -6,10 +6,14 @@
>>  #ifndef _XE_KUNIT_HELPERS_H_
>>  #define _XE_KUNIT_HELPERS_H_
>>  
>> +#include <linux/types.h>
>> +
>>  struct device;
>>  struct kunit;
>>  struct xe_device;
>>  
>> +bool xe_kunit_is_live_test(struct kunit *test);
>> +
>>  struct xe_device *xe_kunit_helper_alloc_xe_device(struct kunit *test,
>>  						  struct device *dev);
>>  int xe_kunit_helper_xe_device_test_init(struct kunit *test);
>> 

Re: [PATCH 05/12] drm/xe/kunit: Abort test if MMIO operation is attempted

[Gustavo Sousa]

Michal Wajdeczko <michal.wajdeczko@intel.com> writes:

> On 1/16/2026 11:12 PM, Gustavo Sousa wrote:
>> Regular Xe KUnit tests (i.e. not the live ones) are usually run in
>> User-Mode Linux and do not have access to the real hardware and, as
>> such, should not attempt to do MMIO operations. If some test ends up
>> exercising a path that contains MMIO operations, the test should be
>> rewritten in a way that the MMIO is skipped or simulated (e.g. via a
>> static stub).
>> 
>> Let's make sure to abort the test if MMIO is attempted on non-live
>> tests.  Before aborting, use drm_WARN() to cause a stack trace to be
>> logged as a debug aid to the developer.
>
> maybe cleaner solution would be first to add to all xe_mmio functions:
>
> 	KUNIT_STATIC_STUB_REDIRECT
>
> and then (in separate patch) activate "abort" stubs in xe_pci_fake_device_init,
> similar to what we do with read_gmdid & xe_info_probe_tile_count
>
> if any test would like to intercept some mmio read/writes it will just provide and activate its own stub
> and such usage will be no different than any other use of stubs
>
> this will allow to drop patch 6 which introduces (IMO unnecessary) another layer
> (where test should stub another test function instead of the real function)

Thanks for the feedback!

After seeing Matt's feedback on patch #12, I think we will end up
dropping this MMIO intercepting stuff.

I wonder if there is value in keeping the "abort" part though, to ensure
that we don't accidentally try to read info from non-existing hardware.

If so, I guess I would just keep this patch, but modified so that we
don't need the separate xe_kunit_mmio.c file.  Also, that would be a
matter of a separate series as well, since it would be orthogonal to
this series.

Thoughts?

--
Gustavo Sousa

>
>> 
>> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
>> ---
>>  drivers/gpu/drm/xe/tests/Makefile        |  1 +
>>  drivers/gpu/drm/xe/tests/xe_kunit_mmio.c | 35 ++++++++++++++++++++++++++++++++
>>  drivers/gpu/drm/xe/tests/xe_kunit_mmio.h | 27 ++++++++++++++++++++++++
>>  drivers/gpu/drm/xe/xe_mmio.c             |  9 ++++++++
>>  4 files changed, 72 insertions(+)
>> 
>> diff --git a/drivers/gpu/drm/xe/tests/Makefile b/drivers/gpu/drm/xe/tests/Makefile
>> index 0e3408f4952c..8f3a594449c8 100644
>> --- a/drivers/gpu/drm/xe/tests/Makefile
>> +++ b/drivers/gpu/drm/xe/tests/Makefile
>> @@ -8,6 +8,7 @@ xe_live_test-y = xe_live_test_mod.o
>>  obj-$(CONFIG_DRM_XE_KUNIT_TEST) += xe_test.o
>>  xe_test-y = xe_test_mod.o \
>>  	xe_args_test.o \
>> +	xe_kunit_mmio.o \
>>  	xe_pci_test.o \
>>  	xe_rtp_test.o \
>>  	xe_wa_test.o
>> diff --git a/drivers/gpu/drm/xe/tests/xe_kunit_mmio.c b/drivers/gpu/drm/xe/tests/xe_kunit_mmio.c
>> new file mode 100644
>> index 000000000000..debf8bd3f9dd
>> --- /dev/null
>> +++ b/drivers/gpu/drm/xe/tests/xe_kunit_mmio.c
>> @@ -0,0 +1,35 @@
>> +// SPDX-License-Identifier: GPL-2.0 AND MIT
>> +/*
>> + * Copyright © 2026 Intel Corporation
>> + */
>> +
>> +#include <kunit/test.h>
>> +#include <kunit/test-bug.h>
>> +
>> +#include <drm/drm_print.h>
>> +
>> +#include "tests/xe_kunit_helpers.h"
>> +#include "tests/xe_kunit_mmio.h"
>> +#include "xe_device_types.h"
>> +
>> +/**
>> + * xe_kunit_mmio_abort_if_not_live_test - Abort test execution if not in a live test.
>> + * @mmio: MMIO target
>> + * @reg: Register on which an MMIO operation is about to be performed
>> + *
>> + * This function must be called from xe_mmio functions that perform MMIO
>> + * operations on the hardware.  If the current process is a kunit test and it is
>> + * not a live test, it will cause a warn and abort the test; otherwise it does
>> + * nothing.
>> + */
>> +void xe_kunit_mmio_abort_if_not_live_test(struct xe_mmio *mmio, struct xe_reg reg)
>> +{
>> +	struct xe_device *xe = tile_to_xe(mmio->tile);
>> +	struct kunit *test = kunit_get_current_test();
>> +
>> +	if (!test || xe_kunit_is_live_test(test))
>> +		return;
>> +
>> +	drm_WARN(&xe->drm, true, "MMIO function called on reg 0x%x\n", reg.addr);
>> +	KUNIT_FAIL_AND_ABORT(test, "MMIO function called on reg 0x%x\n", reg.addr);
>> +}
>> diff --git a/drivers/gpu/drm/xe/tests/xe_kunit_mmio.h b/drivers/gpu/drm/xe/tests/xe_kunit_mmio.h
>> new file mode 100644
>> index 000000000000..d46ac2b82969
>> --- /dev/null
>> +++ b/drivers/gpu/drm/xe/tests/xe_kunit_mmio.h
>> @@ -0,0 +1,27 @@
>> +/* SPDX-License-Identifier: GPL-2.0 AND MIT */
>> +/*
>> + * Copyright © 2026 Intel Corporation
>> + */
>> +
>> +#ifndef _XE_KUNIT_MMIO_H_
>> +#define _XE_KUNIT_MMIO_H_
>> +
>> +#include <linux/types.h>
>> +
>> +#include "regs/xe_reg_defs.h"
>> +
>> +struct xe_mmio;
>> +
>> +#if IS_ENABLED(CONFIG_DRM_XE_KUNIT_TEST)
>> +
>> +void xe_kunit_mmio_abort_if_not_live_test(struct xe_mmio *mmio, struct xe_reg reg);
>> +
>> +#else
>> +
>> +static void xe_kunit_mmio_abort_if_not_live_test(struct xe_mmio *mmio, struct xe_reg reg)
>> +{
>> +}
>> +
>> +#endif
>> +
>> +#endif
>> diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c
>> index bcb6674b7dac..0f9a1d5453df 100644
>> --- a/drivers/gpu/drm/xe/xe_mmio.c
>> +++ b/drivers/gpu/drm/xe/xe_mmio.c
>> @@ -14,6 +14,7 @@
>>  #include <drm/drm_print.h>
>>  
>>  #include "regs/xe_bars.h"
>> +#include "tests/xe_kunit_mmio.h"
>>  #include "xe_device.h"
>>  #include "xe_gt_sriov_vf.h"
>>  #include "xe_sriov.h"
>> @@ -146,6 +147,8 @@ u8 xe_mmio_read8(struct xe_mmio *mmio, struct xe_reg reg)
>>  	u32 addr = xe_mmio_adjusted_addr(mmio, reg.addr);
>>  	u8 val;
>>  
>> +	xe_kunit_mmio_abort_if_not_live_test(mmio, reg);
>> +
>>  	mmio_flush_pending_writes(mmio);
>>  
>>  	val = readb(mmio->regs + addr);
>> @@ -159,6 +162,8 @@ u16 xe_mmio_read16(struct xe_mmio *mmio, struct xe_reg reg)
>>  	u32 addr = xe_mmio_adjusted_addr(mmio, reg.addr);
>>  	u16 val;
>>  
>> +	xe_kunit_mmio_abort_if_not_live_test(mmio, reg);
>> +
>>  	mmio_flush_pending_writes(mmio);
>>  
>>  	val = readw(mmio->regs + addr);
>> @@ -171,6 +176,8 @@ void xe_mmio_write32(struct xe_mmio *mmio, struct xe_reg reg, u32 val)
>>  {
>>  	u32 addr = xe_mmio_adjusted_addr(mmio, reg.addr);
>>  
>> +	xe_kunit_mmio_abort_if_not_live_test(mmio, reg);
>> +
>>  	trace_xe_reg_rw(mmio, true, addr, val, sizeof(val));
>>  
>>  	if (!reg.vf && IS_SRIOV_VF(mmio->tile->xe))
>> @@ -185,6 +192,8 @@ u32 xe_mmio_read32(struct xe_mmio *mmio, struct xe_reg reg)
>>  	u32 addr = xe_mmio_adjusted_addr(mmio, reg.addr);
>>  	u32 val;
>>  
>> +	xe_kunit_mmio_abort_if_not_live_test(mmio, reg);
>> +
>>  	mmio_flush_pending_writes(mmio);
>>  
>>  	if (!reg.vf && IS_SRIOV_VF(mmio->tile->xe))
>> 

Re: [PATCH 12/12] drm/xe/reg_sr: Do sanity check for MCR vs non-MCR

[Gustavo Sousa]

Matt Roper <matthew.d.roper@intel.com> writes:

> On Fri, Jan 16, 2026 at 07:12:20PM -0300, Gustavo Sousa wrote:
>> The type struct xe_reg_mcr exists to ensure that the correct API is used
>> when handling MCR registers.  However, for in the register save/restore
>> functionality, the RTP processing always cast the register to a struct
>> xe_reg and then apply_one_mmio() selects the MMIO API based on the "mcr"
>> field of the register instance.
>> 
>> This allows the developer to commit mistakes like passing a MCR register
>> for an RTP action for a platform where the respective register is not
>> MCR; and vice-versa.
>> 
>> To capture such scenarios, do a sanity check in xe_reg_sr_add() and
>> raise warnings if inconsistencies are detected.
>> 
>> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
>> ---
>>  drivers/gpu/drm/xe/tests/xe_rtp_test.c | 71 ++++++++++++++++++++++++++++++----
>>  drivers/gpu/drm/xe/tests/xe_wa_test.c  | 11 +++++-
>>  drivers/gpu/drm/xe/xe_gt_mcr.c         | 21 ++++++++++
>>  drivers/gpu/drm/xe/xe_gt_mcr.h         |  1 +
>>  drivers/gpu/drm/xe/xe_reg_sr.c         | 36 +++++++++++++++++
>>  5 files changed, 132 insertions(+), 8 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/xe/tests/xe_rtp_test.c b/drivers/gpu/drm/xe/tests/xe_rtp_test.c
>> index d2255a59e58f..80bd83f56d04 100644
>> --- a/drivers/gpu/drm/xe/tests/xe_rtp_test.c
>> +++ b/drivers/gpu/drm/xe/tests/xe_rtp_test.c
>> @@ -9,24 +9,30 @@
>>  #include <drm/drm_drv.h>
>>  #include <drm/drm_kunit_helpers.h>
>>  
>> +#include <kunit/static_stub.h>
>>  #include <kunit/test.h>
>>  
>>  #include "regs/xe_gt_regs.h"
>>  #include "regs/xe_reg_defs.h"
>>  #include "xe_device.h"
>>  #include "xe_device_types.h"
>> +#include "xe_gt_mcr.h"
>>  #include "xe_kunit_helpers.h"
>>  #include "xe_pci_test.h"
>>  #include "xe_reg_sr.h"
>>  #include "xe_rtp.h"
>>  
>> -#define REGULAR_REG1	XE_REG(1)
>> -#define REGULAR_REG2	XE_REG(2)
>> -#define REGULAR_REG3	XE_REG(3)
>> -#define MCR_REG1	XE_REG_MCR(1)
>> -#define MCR_REG2	XE_REG_MCR(2)
>> -#define MCR_REG3	XE_REG_MCR(3)
>> -#define MASKED_REG1	XE_REG(1, XE_REG_OPTION_MASKED)
>> +#define REGULAR_REG1		XE_REG(1)
>> +#define REGULAR_REG2		XE_REG(2)
>> +#define REGULAR_REG3		XE_REG(3)
>> +#define REGULAR_REG4		XE_REG(4)
>> +#define BAD_REGULAR_REG5	XE_REG(5)
>> +#define MCR_REG1		XE_REG_MCR(1)
>> +#define MCR_REG2		XE_REG_MCR(2)
>> +#define MCR_REG3		XE_REG_MCR(3)
>> +#define BAD_MCR_REG4		XE_REG_MCR(4)
>> +#define MCR_REG5		XE_REG_MCR(5)
>> +#define MASKED_REG1		XE_REG(1, XE_REG_OPTION_MASKED)
>>  
>>  #undef XE_REG_MCR
>>  #define XE_REG_MCR(...)     XE_REG(__VA_ARGS__, .mcr = 1)
>> @@ -48,6 +54,23 @@ struct rtp_test_case {
>>  	const struct xe_rtp_entry *entries;
>>  };
>>  
>> +static bool fake_xe_gt_mcr_check_reg(struct xe_gt *gt, struct xe_reg reg)
>> +{
>> +	/*
>> +	 * All supported platforms in this imaginary setup will always have REG4
>> +	 * as a non-MCR register and REG5 as MCR, meaning that BAD_MCR_REG4 and
>> +	 * BAD_REGULAR_REG5 represent programming errors to be captured by our
>> +	 * tests.
>> +	 */
>> +	if (reg.raw == BAD_REGULAR_REG5.raw)
>> +		return true;
>> +
>> +	if (reg.raw == BAD_MCR_REG4.raw)
>> +		return false;
>> +
>> +	return reg.mcr;
>> +}
>> +
>>  static bool match_yes(const struct xe_device *xe, const struct xe_gt *gt,
>>  		      const struct xe_hw_engine *hwe)
>>  {
>> @@ -304,6 +327,38 @@ static const struct rtp_to_sr_test_case rtp_to_sr_cases[] = {
>>  			{}
>>  		},
>>  	},
>> +	{
>> +		.name = "bad-mcr-reg-forced-to-regular",
>> +		.expected_reg = REGULAR_REG4,
>> +		.expected_set_bits = REG_BIT(0),
>> +		.expected_clr_bits = REG_BIT(0),
>> +		.expected_active = BIT(0),
>> +		.expected_count_sr_entries = 1,
>> +		.expected_sr_errors = 1,
>> +		.entries = (const struct xe_rtp_entry_sr[]) {
>> +			{ XE_RTP_NAME("bad-mcr-regular-reg"),
>> +			  XE_RTP_RULES(FUNC(match_yes)),
>> +			  XE_RTP_ACTIONS(SET(BAD_MCR_REG4, REG_BIT(0)))
>> +			},
>> +			{}
>> +		},
>> +	},
>> +	{
>> +		.name = "bad-regular-reg-forced-to-mcr",
>> +		.expected_reg = MCR_REG5,
>> +		.expected_set_bits = REG_BIT(0),
>> +		.expected_clr_bits = REG_BIT(0),
>> +		.expected_active = BIT(0),
>> +		.expected_count_sr_entries = 1,
>> +		.expected_sr_errors = 1,
>> +		.entries = (const struct xe_rtp_entry_sr[]) {
>> +			{ XE_RTP_NAME("bad-regular-reg"),
>> +			  XE_RTP_RULES(FUNC(match_yes)),
>> +			  XE_RTP_ACTIONS(SET(BAD_REGULAR_REG5, REG_BIT(0)))
>> +			},
>> +			{}
>> +		},
>> +	},
>>  };
>>  
>>  static void xe_rtp_process_to_sr_tests(struct kunit *test)
>> @@ -522,6 +577,8 @@ static int xe_rtp_test_init(struct kunit *test)
>>  	xe->drm.dev = dev;
>>  	test->priv = xe;
>>  
>> +	kunit_activate_static_stub(test, xe_gt_mcr_check_reg, fake_xe_gt_mcr_check_reg);
>> +
>>  	return 0;
>>  }
>>  
>> diff --git a/drivers/gpu/drm/xe/tests/xe_wa_test.c b/drivers/gpu/drm/xe/tests/xe_wa_test.c
>> index 3311f05a6fc2..326278488cdb 100644
>> --- a/drivers/gpu/drm/xe/tests/xe_wa_test.c
>> +++ b/drivers/gpu/drm/xe/tests/xe_wa_test.c
>> @@ -13,6 +13,7 @@
>>  #include "tests/xe_mmio_intercept.h"
>>  #include "xe_device.h"
>>  #include "xe_gt.h"
>> +#include "xe_gt_mcr.h"
>>  #include "xe_hw_engine.h"
>>  #include "xe_kunit_helpers.h"
>>  #include "xe_pci_test.h"
>> @@ -38,8 +39,10 @@ static int xe_wa_test_init(struct kunit *test)
>>  {
>>  	const struct xe_pci_fake_data *param = test->param_value;
>>  	struct xe_pci_fake_data data = *param;
>> -	struct xe_device *xe;
>>  	struct device *dev;
>> +	struct xe_device *xe;
>> +	struct xe_gt *gt;
>> +	int id;
>>  	int ret;
>>  
>>  	dev = drm_kunit_helper_alloc_device(test);
>> @@ -52,6 +55,12 @@ static int xe_wa_test_init(struct kunit *test)
>>  	ret = xe_pci_fake_device_init(xe);
>>  	KUNIT_ASSERT_EQ(test, ret, 0);
>>  
>> +	/* Needed for sanitize_mcr(). */
>> +	for_each_gt(gt, xe, id) {
>> +		xe_gt_mcr_init_early(gt);
>> +		xe_gt_mmio_init(gt);
>> +	}
>> +
>>  	kunit_activate_static_stub(test,
>>  				   xe_mmio_intercept_read32,
>>  				   xe_wa_mmio_intercept_read32);
>> diff --git a/drivers/gpu/drm/xe/xe_gt_mcr.c b/drivers/gpu/drm/xe/xe_gt_mcr.c
>> index e7eb3c6da234..c6d9766b6cc6 100644
>> --- a/drivers/gpu/drm/xe/xe_gt_mcr.c
>> +++ b/drivers/gpu/drm/xe/xe_gt_mcr.c
>> @@ -3,6 +3,8 @@
>>   * Copyright © 2022 Intel Corporation
>>   */
>>  
>> +#include <kunit/static_stub.h>
>> +
>>  #include "xe_gt_mcr.h"
>>  
>>  #include "regs/xe_gt_regs.h"
>> @@ -623,6 +625,25 @@ static bool reg_in_steering_type_ranges(struct xe_gt *gt,
>>  	return false;
>>  }
>>  
>> +/*
>> + * xe_gt_mcr_check_reg - check if a register is recognized by this GT as MCR
>> + * @gt: GT structure
>> + * @reg: The register to check
>> + *
>> + * Returns true if the register offset falls within one of the MMIO ranges
>> + * classified as MCR for the GT.
>> + */
>> +bool xe_gt_mcr_check_reg(struct xe_gt *gt, struct xe_reg reg)
>> +{
>> +	KUNIT_STATIC_STUB_REDIRECT(xe_gt_mcr_check_reg, gt, reg);
>> +
>> +	for (int type = 0; type <= IMPLICIT_STEERING; type++)
>> +		if (reg_in_steering_type_ranges(gt, reg, type))
>> +			return true;
>> +
>> +	return false;
>> +}
>> +
>>  /*
>>   * xe_gt_mcr_get_nonterminated_steering - find group/instance values that
>>   *    will steer a register to a non-terminated instance
>> diff --git a/drivers/gpu/drm/xe/xe_gt_mcr.h b/drivers/gpu/drm/xe/xe_gt_mcr.h
>> index 283a1c9770e2..d6b50b52b1d5 100644
>> --- a/drivers/gpu/drm/xe/xe_gt_mcr.h
>> +++ b/drivers/gpu/drm/xe/xe_gt_mcr.h
>> @@ -26,6 +26,7 @@ void xe_gt_mcr_unicast_write(struct xe_gt *gt, struct xe_reg_mcr mcr_reg,
>>  void xe_gt_mcr_multicast_write(struct xe_gt *gt, struct xe_reg_mcr mcr_reg,
>>  			       u32 value);
>>  
>> +bool xe_gt_mcr_check_reg(struct xe_gt *gt, struct xe_reg reg);
>>  bool xe_gt_mcr_get_nonterminated_steering(struct xe_gt *gt,
>>  					  struct xe_reg_mcr reg_mcr,
>>  					  u8 *group, u8 *instance);
>> diff --git a/drivers/gpu/drm/xe/xe_reg_sr.c b/drivers/gpu/drm/xe/xe_reg_sr.c
>> index d3e13ea33123..89d35301defa 100644
>> --- a/drivers/gpu/drm/xe/xe_reg_sr.c
>> +++ b/drivers/gpu/drm/xe/xe_reg_sr.c
>> @@ -68,14 +68,49 @@ static void reg_sr_inc_error(struct xe_reg_sr *sr)
>>  #endif
>>  }
>>  
>> +static struct xe_reg sanitize_mcr(struct xe_reg_sr *sr,
>> +				  const struct xe_reg_sr_entry *e,
>> +				  struct xe_gt *gt)
>> +{
>> +	struct xe_reg reg = e->reg;
>> +	bool is_mcr;
>> +
>> +	/*
>> +	 * We need the gt structure to check MCR ranges.
>> +	 */
>> +	if (!gt)
>> +		return reg;
>> +
>> +	is_mcr = xe_gt_mcr_check_reg(gt, reg);
>> +
>> +	if (is_mcr && !reg.mcr) {
>> +		reg.mcr = 1;
>> +		xe_gt_warn(gt, "xe_reg_sr_entry using non-MCR register for address 0x%x, forcing MCR\n",
>> +			   reg.addr);
>> +		reg_sr_inc_error(sr);
>> +	}
>> +
>> +	if (!is_mcr && reg.mcr) {
>> +		reg.mcr = 0;
>> +		xe_gt_warn(gt, "xe_reg_sr_entry using MCR register for address 0x%x, forcing non-MCR\n",
>> +			   reg.addr);
>> +		reg_sr_inc_error(sr);
>> +	}
>
> This sanity check (and fixup) is going to happen not only on the
> non-live kunit test, but also on true device probes on hardware, right?
> In this case, we might want to consider downgrading these messages to
> notice level rather than warn.  The kunit results should let us know if
> we have a problem here (even before we have real hardware CI setup), but
> if a mistake somehow sneaks by, having warn (or error) level messages
> printed in dmesg will cause CI to consider the entire device probe a
> failure and will prevent any further testing from running on the
> platform until it's fixed.  That seems unnecessarily harsh since a
> mistake here shouldn't really impact most of the other CI results we
> could be receiving.

Yep. I agree. I'll downgrade it to notice level on the next iteration of
this patch.

>
>
> Actually, related to the earlier patches in this series, I wonder if we
> truly need to mock up register accesses for non-live kunits.  It seems
> like we might still wind up with some FUNC() rules that incorrectly
> disqualify RTP entries that we want to check.  I'm thinking of oddball
> rules like xe_rtp_match_gt_has_discontiguous_dss_groups that either come
> from previous parts of driver initialization, and/or have somewhat
> non-obvious relationships to register values. It seems like for the
> purposes of checking MCR vs non-MCR status, the _only_ thing that
> matters is IP version:  IP version determines which MCR tables are used
> on the platform and IP version is the only RTP rule that actually
> matters to confirming that we're using proper register definitions.
> E.g., for an RTP entry with rules:
>
>    XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2004),
>                 GRAPHICS_STEP(B0, D0),
>                 FUNC(check_foo()),
>                 FUNC(check_bar()))
>    XE_RTP_ACTIONS(SET(CHKNREG, SOMEBIT)),
>
> we don't care what check_foo() and check_bar() are, or even what the
> stepping is.  Only the IP version rule is necessary to determine whether
> we should check CHKNREG's status against a specific IP version's MCR
> table and for the purposes of the kunit we can treat all other rules as
> 'true' without trying to process them.
>
> So maybe a simpler approach would be to have an alternative version of
> xe_rtp_process_to_sr() intended for use in non-live kunit tests that
> just ignores everything except the IP version rules and treats
> everything else as an automatic 'true.'

Makes sense.  Let me play around with that idea and see if I can send a
new version of this series with that solution.

--
Gustavo Sousa

>
>
> Matt
>
>> +
>> +	return reg;
>> +}
>> +
>>  int xe_reg_sr_add(struct xe_reg_sr *sr,
>>  		  const struct xe_reg_sr_entry *e,
>>  		  struct xe_gt *gt)
>>  {
>>  	unsigned long idx = e->reg.addr;
>>  	struct xe_reg_sr_entry *pentry = xa_load(&sr->xa, idx);
>> +	struct xe_reg reg;
>>  	int ret;
>>  
>> +	reg = sanitize_mcr(sr, e, gt);
>> +
>>  	if (pentry) {
>>  		if (!compatible_entries(pentry, e)) {
>>  			ret = -EINVAL;
>> @@ -96,6 +131,7 @@ int xe_reg_sr_add(struct xe_reg_sr *sr,
>>  	}
>>  
>>  	*pentry = *e;
>> +	pentry->reg = reg;
>>  	ret = xa_err(xa_store(&sr->xa, idx, pentry, GFP_KERNEL));
>>  	if (ret)
>>  		goto fail;
>> 
>> -- 
>> 2.52.0
>> 
>
> -- 
> Matt Roper
> Graphics Software Engineer
> Linux GPU Platform Enablement
> Intel Corporation