Re: [PATCH 2/4] drm/i915/psr: Read Intel DPCD workaround register

["Hogander, Jouni" <jouni.hogander@intel.com>]

On Wed, 2026-05-06 at 06:39 +0000, Kandpal, Suraj wrote:
> > Subject: [PATCH 2/4] drm/i915/psr: Read Intel DPCD workaround
> > register
> > 
> > Read Intel DPCD workaround register and store it into
> > intel_connector-
> > > dp.psr_caps. Psr_caps was chosen as currently it contains only
> > > PSR
> 
> Nit: psr_caps
> 
> > workaround for PSR2 SDP on prior scanline implementation.
> > 
> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
> >  drivers/gpu/drm/i915/display/intel_psr.c           | 8 +++++++-
> >  2 files changed, 8 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> > b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index ee076106be85..ec00fcb46734 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -584,6 +584,7 @@ struct intel_connector {
> > 
> >  		struct {
> >  			u8 dpcd[EDP_PSR_RECEIVER_CAP_SIZE];
> > +			u8 intel_wa_dpcd;
> > 
> >  			bool support;
> >  			bool su_support;
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index b4ca5843d098..1f3f0d35d52a 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -44,6 +44,7 @@
> >  #include "intel_display_wa.h"
> >  #include "intel_dmc.h"
> >  #include "intel_dp.h"
> > +#include "intel_dpcd.h"
> >  #include "intel_dp_aux.h"
> >  #include "intel_dp_tunnel.h"
> >  #include "intel_dsb.h"
> > @@ -717,8 +718,13 @@ static void _psr_init_dpcd(struct intel_dp
> > *intel_dp,
> > struct intel_connector *co
> >  			    connector->dp.psr_caps.su_support ? ""
> > : "not ");
> >  	}
> > 
> > -	if (connector->dp.psr_caps.su_support)
> > +	if (connector->dp.psr_caps.su_support) {
> > +		ret = drm_dp_dpcd_read_byte(&intel_dp->aux,
> > INTEL_WA_REGISTER_CAPS,
> > +					    &connector-
> > > dp.psr_caps.intel_wa_dpcd);
> > +		if (ret < 0)
> > +			return;
> 
> Any particular reason for caching this I see that this can be easily
> read when required ? Maybe I missed something ?

I was thinking we don't want to read this on each compute_config. It is
anyways reading DPCD register from panel.

> Also we are returning early now, was this missed, do we require a
> fixes ? Also some explanation why this makes sense.

This is returning early if reading the INTEL_WA_REGISTER_CAPS fails.
That is supposed to be unexpected event so returning early due to that.
There is a fixes tag in next patch in the set.

BR,
Jouni Högander

> 
> Regards,
> Suraj Kandpal
> 
> >  		_psr_compute_su_granularity(intel_dp, connector);
> > +	}
> >  }
> > 
> >  void intel_psr_init_dpcd(struct intel_dp *intel_dp, struct
> > intel_connector
> > *connector)
> > --
> > 2.43.0
>