[PATCH 0/2] drm/i915/dmc: Update PIPEDMC interrupt mask

[PATCH 0/2] drm/i915/dmc: Update PIPEDMC interrupt mask

[Dibin Moolakadan Subrahmanian]

On display version 35+ the PIPEDMC_ATS_FAULT and
PIPEDMC_GTT_FAULT interrupt bits are no longer defined.
Update the interrupt mask accordingly and enable the
PIPEDMC_ERROR interrupt.

This series is a continuation of:
https://patchwork.freedesktop.org/series/162934/
The original patch has been into two patches as suggested by
Ville Syrjala

Dibin Moolakadan Subrahmanian (2):
  drm/i915/dmc: Remove invalid PIPEDMC interrupt bits
  drm/i915/dmc: Enable PIPEDMC_ERROR interrupt

 drivers/gpu/drm/i915/display/intel_dmc.c | 4 ++++
 1 file changed, 4 insertions(+)

-- 
2.43.0

[PATCH 1/2] drm/i915/dmc: Remove invalid PIPEDMC interrupt bits

[Dibin Moolakadan Subrahmanian]

On display version 35+ PIPEDMC_ATS_FAULT and
PIPEDMC_GTT_FAULT interrupt bits are no longer defined.

Update the interrupt mask to drop these.

Signed-off-by: Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dmc.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index c3b411259a0c..38b284a0db82 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -509,6 +509,9 @@ static void pipedmc_clock_gating_wa(struct intel_display *display, bool enable)
 
 static u32 pipedmc_interrupt_mask(struct intel_display *display)
 {
+	if (DISPLAY_VER(display) >= 35)
+		return PIPEDMC_FLIPQ_PROG_DONE;
+
 	/*
 	 * FIXME PIPEDMC_ERROR not enabled for now due to LNL pipe B
 	 * triggering it during the first DC state transition. Figure
-- 
2.43.0

RE: [PATCH 1/2] drm/i915/dmc: Remove invalid PIPEDMC interrupt bits

[Kandpal, Suraj]

> Subject: [PATCH 1/2] drm/i915/dmc: Remove invalid PIPEDMC interrupt bits
> 
> On display version 35+ PIPEDMC_ATS_FAULT and PIPEDMC_GTT_FAULT
> interrupt bits are no longer defined.
> 
> Update the interrupt mask to drop these.
> 

Add the Bspec link for register in commit message
so that reviewer can verify this if required in this case.

Bspec: 70296

Otherwise LGTM,
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>

> Signed-off-by: Dibin Moolakadan Subrahmanian
> <dibin.moolakadan.subrahmanian@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dmc.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c
> b/drivers/gpu/drm/i915/display/intel_dmc.c
> index c3b411259a0c..38b284a0db82 100644
> --- a/drivers/gpu/drm/i915/display/intel_dmc.c
> +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
> @@ -509,6 +509,9 @@ static void pipedmc_clock_gating_wa(struct
> intel_display *display, bool enable)
> 
>  static u32 pipedmc_interrupt_mask(struct intel_display *display)  {
> +	if (DISPLAY_VER(display) >= 35)
> +		return PIPEDMC_FLIPQ_PROG_DONE;
> +
>  	/*
>  	 * FIXME PIPEDMC_ERROR not enabled for now due to LNL pipe B
>  	 * triggering it during the first DC state transition. Figure
> --
> 2.43.0

Re: [PATCH 1/2] drm/i915/dmc: Remove invalid PIPEDMC interrupt bits

[Dibin Moolakadan Subrahmanian]

On 12-03-2026 08:40, Kandpal, Suraj wrote:
>> Subject: [PATCH 1/2] drm/i915/dmc: Remove invalid PIPEDMC interrupt bits
>>
>> On display version 35+ PIPEDMC_ATS_FAULT and PIPEDMC_GTT_FAULT
>> interrupt bits are no longer defined.
>>
>> Update the interrupt mask to drop these.
>>
> Add the Bspec link for register in commit message
> so that reviewer can verify this if required in this case.
>
> Bspec: 70296

I will add Bspec number.

Regards,
Dibin

> Otherwise LGTM,
> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
>
>> Signed-off-by: Dibin Moolakadan Subrahmanian
>> <dibin.moolakadan.subrahmanian@intel.com>
>> ---
>>   drivers/gpu/drm/i915/display/intel_dmc.c | 3 +++
>>   1 file changed, 3 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c
>> b/drivers/gpu/drm/i915/display/intel_dmc.c
>> index c3b411259a0c..38b284a0db82 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dmc.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
>> @@ -509,6 +509,9 @@ static void pipedmc_clock_gating_wa(struct
>> intel_display *display, bool enable)
>>
>>   static u32 pipedmc_interrupt_mask(struct intel_display *display)  {
>> +	if (DISPLAY_VER(display) >= 35)
>> +		return PIPEDMC_FLIPQ_PROG_DONE;
>> +
>>   	/*
>>   	 * FIXME PIPEDMC_ERROR not enabled for now due to LNL pipe B
>>   	 * triggering it during the first DC state transition. Figure
>> --
>> 2.43.0

[PATCH 2/2] drm/i915/dmc: Enable PIPEDMC_ERROR interrupt

[Dibin Moolakadan Subrahmanian]

Enable PIPEDMC_ERROR interrupt bit for display version 35+.

Signed-off-by: Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dmc.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index 38b284a0db82..e60f1f977070 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -510,7 +510,8 @@ static void pipedmc_clock_gating_wa(struct intel_display *display, bool enable)
 static u32 pipedmc_interrupt_mask(struct intel_display *display)
 {
 	if (DISPLAY_VER(display) >= 35)
-		return PIPEDMC_FLIPQ_PROG_DONE;
+		return PIPEDMC_FLIPQ_PROG_DONE |
+			PIPEDMC_ERROR;
 
 	/*
 	 * FIXME PIPEDMC_ERROR not enabled for now due to LNL pipe B
-- 
2.43.0

RE: [PATCH 2/2] drm/i915/dmc: Enable PIPEDMC_ERROR interrupt

[Kandpal, Suraj]

> Subject: [PATCH 2/2] drm/i915/dmc: Enable PIPEDMC_ERROR interrupt
> 
> Enable PIPEDMC_ERROR interrupt bit for display version 35+.
> 

Add same Bspec link here too

> Signed-off-by: Dibin Moolakadan Subrahmanian
> <dibin.moolakadan.subrahmanian@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dmc.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c
> b/drivers/gpu/drm/i915/display/intel_dmc.c
> index 38b284a0db82..e60f1f977070 100644
> --- a/drivers/gpu/drm/i915/display/intel_dmc.c
> +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
> @@ -510,7 +510,8 @@ static void pipedmc_clock_gating_wa(struct
> intel_display *display, bool enable)  static u32 pipedmc_interrupt_mask(struct
> intel_display *display)  {
>  	if (DISPLAY_VER(display) >= 35)
> -		return PIPEDMC_FLIPQ_PROG_DONE;
> +		return PIPEDMC_FLIPQ_PROG_DONE |
> +			PIPEDMC_ERROR;
> 

Mostly looks okay but here's my question:
I know LNL pipe B had an issue with PIPEDMC_ERROR being triggered on LNL pipe B,
As I can see from Ville's commit message, but is it still the case for PTL ?
Can we have that tested ?
If that works we can add the PIPEDMC_ERROR from PTL onwards.
Then here we can change code to create a mask and then return it finally like :

mask = PIPEDMC_FLIPQ_PROG_DONE

if display ver >= 30
mask |= PIPEDMC_ERROR

if display ver < 35
mask |= PIPEDMC_GTT_FAULT |
                PIPEDMC_ATS_FAULT;

Return mask;

Obviously that is if PIPEDMC_ERROR works on PTL properly.

Regards,
Suraj Kandpal

>  	/*
>  	 * FIXME PIPEDMC_ERROR not enabled for now due to LNL pipe B
> --
> 2.43.0

Re: [PATCH 2/2] drm/i915/dmc: Enable PIPEDMC_ERROR interrupt

[Dibin Moolakadan Subrahmanian]

On 12-03-2026 08:48, Kandpal, Suraj wrote:
>> Subject: [PATCH 2/2] drm/i915/dmc: Enable PIPEDMC_ERROR interrupt
>>
>> Enable PIPEDMC_ERROR interrupt bit for display version 35+.
>>
> Add same Bspec link here too
>
>> Signed-off-by: Dibin Moolakadan Subrahmanian
>> <dibin.moolakadan.subrahmanian@intel.com>
>> ---
>>   drivers/gpu/drm/i915/display/intel_dmc.c | 3 ++-
>>   1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c
>> b/drivers/gpu/drm/i915/display/intel_dmc.c
>> index 38b284a0db82..e60f1f977070 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dmc.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
>> @@ -510,7 +510,8 @@ static void pipedmc_clock_gating_wa(struct
>> intel_display *display, bool enable)  static u32 pipedmc_interrupt_mask(struct
>> intel_display *display)  {
>>   	if (DISPLAY_VER(display) >= 35)
>> -		return PIPEDMC_FLIPQ_PROG_DONE;
>> +		return PIPEDMC_FLIPQ_PROG_DONE |
>> +			PIPEDMC_ERROR;
>>
> Mostly looks okay but here's my question:
> I know LNL pipe B had an issue with PIPEDMC_ERROR being triggered on LNL pipe B,
> As I can see from Ville's commit message, but is it still the case for PTL ?
> Can we have that tested ?
> If that works we can add the PIPEDMC_ERROR from PTL onwards.
> Then here we can change code to create a mask and then return it finally like :
>
> mask = PIPEDMC_FLIPQ_PROG_DONE
>
> if display ver >= 30
> mask |= PIPEDMC_ERROR
>
> if display ver < 35
> mask |= PIPEDMC_GTT_FAULT |
>                  PIPEDMC_ATS_FAULT;
>
> Return mask;
>
> Obviously that is if PIPEDMC_ERROR works on PTL properly.

Thank you for spotting this, I think its better to add above  logic in new series
rather than combing with 35+ bit mask update.

Regards,
Dibin

>
> Regards,
> Suraj Kandpal
>
>>   	/*
>>   	 * FIXME PIPEDMC_ERROR not enabled for now due to LNL pipe B
>> --
>> 2.43.0

RE: [PATCH 2/2] drm/i915/dmc: Enable PIPEDMC_ERROR interrupt

[Kandpal, Suraj]

> On 12-03-2026 08:48, Kandpal, Suraj wrote:
> >> Subject: [PATCH 2/2] drm/i915/dmc: Enable PIPEDMC_ERROR interrupt
> >>
> >> Enable PIPEDMC_ERROR interrupt bit for display version 35+.
> >>
> > Add same Bspec link here too
> >
> >> Signed-off-by: Dibin Moolakadan Subrahmanian
> >> <dibin.moolakadan.subrahmanian@intel.com>
> >> ---
> >>   drivers/gpu/drm/i915/display/intel_dmc.c | 3 ++-
> >>   1 file changed, 2 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c
> >> b/drivers/gpu/drm/i915/display/intel_dmc.c
> >> index 38b284a0db82..e60f1f977070 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_dmc.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
> >> @@ -510,7 +510,8 @@ static void pipedmc_clock_gating_wa(struct
> >> intel_display *display, bool enable)  static u32
> >> pipedmc_interrupt_mask(struct intel_display *display)  {
> >>   	if (DISPLAY_VER(display) >= 35)
> >> -		return PIPEDMC_FLIPQ_PROG_DONE;
> >> +		return PIPEDMC_FLIPQ_PROG_DONE |
> >> +			PIPEDMC_ERROR;
> >>
> > Mostly looks okay but here's my question:
> > I know LNL pipe B had an issue with PIPEDMC_ERROR being triggered on
> > LNL pipe B, As I can see from Ville's commit message, but is it still the case for
> PTL ?
> > Can we have that tested ?
> > If that works we can add the PIPEDMC_ERROR from PTL onwards.
> > Then here we can change code to create a mask and then return it finally like
> :
> >
> > mask = PIPEDMC_FLIPQ_PROG_DONE
> >
> > if display ver >= 30
> > mask |= PIPEDMC_ERROR
> >
> > if display ver < 35
> > mask |= PIPEDMC_GTT_FAULT |
> >                  PIPEDMC_ATS_FAULT;
> >
> > Return mask;
> >
> > Obviously that is if PIPEDMC_ERROR works on PTL properly.
> 
> Thank you for spotting this, I think its better to add above  logic in new series
> rather than combing with 35+ bit mask update.
> 
> Regards,
> Dibin

If that is the case then I think its better to drop this patch altogether.
We have a justification of why we remove bits in first patch, that was a change in NVL H/w.
But this change was introduced in LNL.
Without a strong reasoning of why you are enabling this is in NVL and not in PTL (which I don’t see in this patch series)
I suggest you add this patch with as a part of the series where you have a use case for it. And if there too you only add it for NVL
You will need to add a comments as to why this is not enabled for PTL.

Regards,
Suraj Kandpal


> 
> >
> > Regards,
> > Suraj Kandpal
> >
> >>   	/*
> >>   	 * FIXME PIPEDMC_ERROR not enabled for now due to LNL pipe B
> >> --
> >> 2.43.0

Re: [PATCH 2/2] drm/i915/dmc: Enable PIPEDMC_ERROR interrupt

[Dibin Moolakadan Subrahmanian]

On 13-03-2026 08:56, Kandpal, Suraj wrote:
>> On 12-03-2026 08:48, Kandpal, Suraj wrote:
>>>> Subject: [PATCH 2/2] drm/i915/dmc: Enable PIPEDMC_ERROR interrupt
>>>>
>>>> Enable PIPEDMC_ERROR interrupt bit for display version 35+.
>>>>
>>> Add same Bspec link here too
>>>
>>>> Signed-off-by: Dibin Moolakadan Subrahmanian
>>>> <dibin.moolakadan.subrahmanian@intel.com>
>>>> ---
>>>>    drivers/gpu/drm/i915/display/intel_dmc.c | 3 ++-
>>>>    1 file changed, 2 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c
>>>> b/drivers/gpu/drm/i915/display/intel_dmc.c
>>>> index 38b284a0db82..e60f1f977070 100644
>>>> --- a/drivers/gpu/drm/i915/display/intel_dmc.c
>>>> +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
>>>> @@ -510,7 +510,8 @@ static void pipedmc_clock_gating_wa(struct
>>>> intel_display *display, bool enable)  static u32
>>>> pipedmc_interrupt_mask(struct intel_display *display)  {
>>>>    	if (DISPLAY_VER(display) >= 35)
>>>> -		return PIPEDMC_FLIPQ_PROG_DONE;
>>>> +		return PIPEDMC_FLIPQ_PROG_DONE |
>>>> +			PIPEDMC_ERROR;
>>>>
>>> Mostly looks okay but here's my question:
>>> I know LNL pipe B had an issue with PIPEDMC_ERROR being triggered on
>>> LNL pipe B, As I can see from Ville's commit message, but is it still the case for
>> PTL ?
>>> Can we have that tested ?
>>> If that works we can add the PIPEDMC_ERROR from PTL onwards.
>>> Then here we can change code to create a mask and then return it finally like
>> :
>>> mask = PIPEDMC_FLIPQ_PROG_DONE
>>>
>>> if display ver >= 30
>>> mask |= PIPEDMC_ERROR
>>>
>>> if display ver < 35
>>> mask |= PIPEDMC_GTT_FAULT |
>>>                   PIPEDMC_ATS_FAULT;
>>>
>>> Return mask;
>>>
>>> Obviously that is if PIPEDMC_ERROR works on PTL properly.
>> Thank you for spotting this, I think its better to add above  logic in new series
>> rather than combing with 35+ bit mask update.
>>
>> Regards,
>> Dibin
> If that is the case then I think its better to drop this patch altogether.
> We have a justification of why we remove bits in first patch, that was a change in NVL H/w.
> But this change was introduced in LNL.
> Without a strong reasoning of why you are enabling this is in NVL and not in PTL (which I don’t see in this patch series)
> I suggest you add this patch with as a part of the series where you have a use case for it. And if there too you only add it for NVL
> You will need to add a comments as to why this is not enabled for PTL.

This patch intent to fix the interrupt mask for 35+.
I dont see any reason to disable this bit as
1) error bit warning is already present in interrupt handler.
2) bit is defined in bsepc.
3) LNL it was mentioned disabled because pipeB triggering it during first DC state transition
which did not see in this case.

Regards,
Dibin

>
> Regards,
> Suraj Kandpal
>
>
>>> Regards,
>>> Suraj Kandpal
>>>
>>>>    	/*
>>>>    	 * FIXME PIPEDMC_ERROR not enabled for now due to LNL pipe B
>>>> --
>>>> 2.43.0

RE: [PATCH 2/2] drm/i915/dmc: Enable PIPEDMC_ERROR interrupt

[Kandpal, Suraj]

> -----Original Message-----
> From: Dibin Moolakadan Subrahmanian
> <dibin.moolakadan.subrahmanian@intel.com>
> Sent: Friday, March 13, 2026 9:55 AM
> To: Kandpal, Suraj <suraj.kandpal@intel.com>; intel-gfx@lists.freedesktop.org;
> intel-xe@lists.freedesktop.org
> Cc: ville.syrjala@linux.intel.com; Shankar, Uma <uma.shankar@intel.com>;
> Sharma, Swati2 <swati2.sharma@intel.com>
> Subject: Re: [PATCH 2/2] drm/i915/dmc: Enable PIPEDMC_ERROR interrupt
> 
> 
> On 13-03-2026 08:56, Kandpal, Suraj wrote:
> >> On 12-03-2026 08:48, Kandpal, Suraj wrote:
> >>>> Subject: [PATCH 2/2] drm/i915/dmc: Enable PIPEDMC_ERROR interrupt
> >>>>
> >>>> Enable PIPEDMC_ERROR interrupt bit for display version 35+.
> >>>>
> >>> Add same Bspec link here too
> >>>
> >>>> Signed-off-by: Dibin Moolakadan Subrahmanian
> >>>> <dibin.moolakadan.subrahmanian@intel.com>
> >>>> ---
> >>>>    drivers/gpu/drm/i915/display/intel_dmc.c | 3 ++-
> >>>>    1 file changed, 2 insertions(+), 1 deletion(-)
> >>>>
> >>>> diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c
> >>>> b/drivers/gpu/drm/i915/display/intel_dmc.c
> >>>> index 38b284a0db82..e60f1f977070 100644
> >>>> --- a/drivers/gpu/drm/i915/display/intel_dmc.c
> >>>> +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
> >>>> @@ -510,7 +510,8 @@ static void pipedmc_clock_gating_wa(struct
> >>>> intel_display *display, bool enable)  static u32
> >>>> pipedmc_interrupt_mask(struct intel_display *display)  {
> >>>>    	if (DISPLAY_VER(display) >= 35)
> >>>> -		return PIPEDMC_FLIPQ_PROG_DONE;
> >>>> +		return PIPEDMC_FLIPQ_PROG_DONE |
> >>>> +			PIPEDMC_ERROR;
> >>>>
> >>> Mostly looks okay but here's my question:
> >>> I know LNL pipe B had an issue with PIPEDMC_ERROR being triggered on
> >>> LNL pipe B, As I can see from Ville's commit message, but is it
> >>> still the case for
> >> PTL ?
> >>> Can we have that tested ?
> >>> If that works we can add the PIPEDMC_ERROR from PTL onwards.
> >>> Then here we can change code to create a mask and then return it
> >>> finally like
> >> :
> >>> mask = PIPEDMC_FLIPQ_PROG_DONE
> >>>
> >>> if display ver >= 30
> >>> mask |= PIPEDMC_ERROR
> >>>
> >>> if display ver < 35
> >>> mask |= PIPEDMC_GTT_FAULT |
> >>>                   PIPEDMC_ATS_FAULT;
> >>>
> >>> Return mask;
> >>>
> >>> Obviously that is if PIPEDMC_ERROR works on PTL properly.
> >> Thank you for spotting this, I think its better to add above  logic
> >> in new series rather than combing with 35+ bit mask update.
> >>
> >> Regards,
> >> Dibin
> > If that is the case then I think its better to drop this patch altogether.
> > We have a justification of why we remove bits in first patch, that was a change
> in NVL H/w.
> > But this change was introduced in LNL.
> > Without a strong reasoning of why you are enabling this is in NVL and
> > not in PTL (which I don’t see in this patch series) I suggest you add
> > this patch with as a part of the series where you have a use case for it. And if
> there too you only add it for NVL You will need to add a comments as to why
> this is not enabled for PTL.
> 
> This patch intent to fix the interrupt mask for 35+.
> I dont see any reason to disable this bit as
> 1) error bit warning is already present in interrupt handler.
> 2) bit is defined in bsepc.
> 3) LNL it was mentioned disabled because pipeB triggering it during first DC
> state transition which did not see in this case.

In that case the interrupt handler is made to report errors if this bit is unmasked for  >= LNL.
Now this bit is introduced in LNL timeframe for which the reason to not add it is mentioned in comment and documented.
Similarly if you want to skip PTL you will need this to be documented with the reason. Which means the FIXME comment needs to be modified
In the least. If this patch is to go through.
Also Ville can you shed some light, on what the H/w folks had to say regarding this and if they had mentioned any WA for LNL, and if this is fixed
In LNL+.

Regards,
Suraj Kandpal

> 
> Regards,
> Dibin
> 
> >
> > Regards,
> > Suraj Kandpal
> >
> >
> >>> Regards,
> >>> Suraj Kandpal
> >>>
> >>>>    	/*
> >>>>    	 * FIXME PIPEDMC_ERROR not enabled for now due to LNL pipe B
> >>>> --
> >>>> 2.43.0

Re: [PATCH 2/2] drm/i915/dmc: Enable PIPEDMC_ERROR interrupt

[Ville Syrjälä]

On Fri, Mar 13, 2026 at 05:04:46AM +0000, Kandpal, Suraj wrote:
> 
> 
> > -----Original Message-----
> > From: Dibin Moolakadan Subrahmanian
> > <dibin.moolakadan.subrahmanian@intel.com>
> > Sent: Friday, March 13, 2026 9:55 AM
> > To: Kandpal, Suraj <suraj.kandpal@intel.com>; intel-gfx@lists.freedesktop.org;
> > intel-xe@lists.freedesktop.org
> > Cc: ville.syrjala@linux.intel.com; Shankar, Uma <uma.shankar@intel.com>;
> > Sharma, Swati2 <swati2.sharma@intel.com>
> > Subject: Re: [PATCH 2/2] drm/i915/dmc: Enable PIPEDMC_ERROR interrupt
> > 
> > 
> > On 13-03-2026 08:56, Kandpal, Suraj wrote:
> > >> On 12-03-2026 08:48, Kandpal, Suraj wrote:
> > >>>> Subject: [PATCH 2/2] drm/i915/dmc: Enable PIPEDMC_ERROR interrupt
> > >>>>
> > >>>> Enable PIPEDMC_ERROR interrupt bit for display version 35+.
> > >>>>
> > >>> Add same Bspec link here too
> > >>>
> > >>>> Signed-off-by: Dibin Moolakadan Subrahmanian
> > >>>> <dibin.moolakadan.subrahmanian@intel.com>
> > >>>> ---
> > >>>>    drivers/gpu/drm/i915/display/intel_dmc.c | 3 ++-
> > >>>>    1 file changed, 2 insertions(+), 1 deletion(-)
> > >>>>
> > >>>> diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c
> > >>>> b/drivers/gpu/drm/i915/display/intel_dmc.c
> > >>>> index 38b284a0db82..e60f1f977070 100644
> > >>>> --- a/drivers/gpu/drm/i915/display/intel_dmc.c
> > >>>> +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
> > >>>> @@ -510,7 +510,8 @@ static void pipedmc_clock_gating_wa(struct
> > >>>> intel_display *display, bool enable)  static u32
> > >>>> pipedmc_interrupt_mask(struct intel_display *display)  {
> > >>>>    	if (DISPLAY_VER(display) >= 35)
> > >>>> -		return PIPEDMC_FLIPQ_PROG_DONE;
> > >>>> +		return PIPEDMC_FLIPQ_PROG_DONE |
> > >>>> +			PIPEDMC_ERROR;
> > >>>>
> > >>> Mostly looks okay but here's my question:
> > >>> I know LNL pipe B had an issue with PIPEDMC_ERROR being triggered on
> > >>> LNL pipe B, As I can see from Ville's commit message, but is it
> > >>> still the case for
> > >> PTL ?
> > >>> Can we have that tested ?
> > >>> If that works we can add the PIPEDMC_ERROR from PTL onwards.
> > >>> Then here we can change code to create a mask and then return it
> > >>> finally like
> > >> :
> > >>> mask = PIPEDMC_FLIPQ_PROG_DONE
> > >>>
> > >>> if display ver >= 30
> > >>> mask |= PIPEDMC_ERROR
> > >>>
> > >>> if display ver < 35
> > >>> mask |= PIPEDMC_GTT_FAULT |
> > >>>                   PIPEDMC_ATS_FAULT;
> > >>>
> > >>> Return mask;
> > >>>
> > >>> Obviously that is if PIPEDMC_ERROR works on PTL properly.
> > >> Thank you for spotting this, I think its better to add above  logic
> > >> in new series rather than combing with 35+ bit mask update.
> > >>
> > >> Regards,
> > >> Dibin
> > > If that is the case then I think its better to drop this patch altogether.
> > > We have a justification of why we remove bits in first patch, that was a change
> > in NVL H/w.
> > > But this change was introduced in LNL.
> > > Without a strong reasoning of why you are enabling this is in NVL and
> > > not in PTL (which I don’t see in this patch series) I suggest you add
> > > this patch with as a part of the series where you have a use case for it. And if
> > there too you only add it for NVL You will need to add a comments as to why
> > this is not enabled for PTL.
> > 
> > This patch intent to fix the interrupt mask for 35+.
> > I dont see any reason to disable this bit as
> > 1) error bit warning is already present in interrupt handler.
> > 2) bit is defined in bsepc.
> > 3) LNL it was mentioned disabled because pipeB triggering it during first DC
> > state transition which did not see in this case.
> 
> In that case the interrupt handler is made to report errors if this bit is unmasked for  >= LNL.
> Now this bit is introduced in LNL timeframe for which the reason to not add it is mentioned in comment and documented.
> Similarly if you want to skip PTL you will need this to be documented with the reason. Which means the FIXME comment needs to be modified
> In the least. If this patch is to go through.
> Also Ville can you shed some light, on what the H/w folks had to say regarding this and if they had mentioned any WA for LNL, and if this is fixed
> In LNL+.

I suspect it might be some kind of issue in the DMC firmware where
it's accessing unpowered registers. But it was never investigated
properly.

It would be good if someone could take that up and actually figure
out what's going on. The problem is figuring out what exactly is
the register that causes this. I don't think LNL has any kind of
RM_CAPTURE register/etc available for the DMC that would directly
tell us that :(

IIRC the Windows driver did seem to enable the error interrupt on
LNL, but either they just ignore all the reported errors, or somehow
the way they use the hardware/firmware doesn't trigger them.

-- 
Ville Syrjälä
Intel

RE: [PATCH 2/2] drm/i915/dmc: Enable PIPEDMC_ERROR interrupt

[Kandpal, Suraj]

> Subject: Re: [PATCH 2/2] drm/i915/dmc: Enable PIPEDMC_ERROR interrupt
> 
> On Fri, Mar 13, 2026 at 05:04:46AM +0000, Kandpal, Suraj wrote:
> >
> >
> > > -----Original Message-----
> > > From: Dibin Moolakadan Subrahmanian
> > > <dibin.moolakadan.subrahmanian@intel.com>
> > > Sent: Friday, March 13, 2026 9:55 AM
> > > To: Kandpal, Suraj <suraj.kandpal@intel.com>;
> > > intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
> > > Cc: ville.syrjala@linux.intel.com; Shankar, Uma
> > > <uma.shankar@intel.com>; Sharma, Swati2 <swati2.sharma@intel.com>
> > > Subject: Re: [PATCH 2/2] drm/i915/dmc: Enable PIPEDMC_ERROR
> > > interrupt
> > >
> > >
> > > On 13-03-2026 08:56, Kandpal, Suraj wrote:
> > > >> On 12-03-2026 08:48, Kandpal, Suraj wrote:
> > > >>>> Subject: [PATCH 2/2] drm/i915/dmc: Enable PIPEDMC_ERROR
> > > >>>> interrupt
> > > >>>>
> > > >>>> Enable PIPEDMC_ERROR interrupt bit for display version 35+.
> > > >>>>
> > > >>> Add same Bspec link here too
> > > >>>
> > > >>>> Signed-off-by: Dibin Moolakadan Subrahmanian
> > > >>>> <dibin.moolakadan.subrahmanian@intel.com>
> > > >>>> ---
> > > >>>>    drivers/gpu/drm/i915/display/intel_dmc.c | 3 ++-
> > > >>>>    1 file changed, 2 insertions(+), 1 deletion(-)
> > > >>>>
> > > >>>> diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c
> > > >>>> b/drivers/gpu/drm/i915/display/intel_dmc.c
> > > >>>> index 38b284a0db82..e60f1f977070 100644
> > > >>>> --- a/drivers/gpu/drm/i915/display/intel_dmc.c
> > > >>>> +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
> > > >>>> @@ -510,7 +510,8 @@ static void pipedmc_clock_gating_wa(struct
> > > >>>> intel_display *display, bool enable)  static u32
> > > >>>> pipedmc_interrupt_mask(struct intel_display *display)  {
> > > >>>>    	if (DISPLAY_VER(display) >= 35)
> > > >>>> -		return PIPEDMC_FLIPQ_PROG_DONE;
> > > >>>> +		return PIPEDMC_FLIPQ_PROG_DONE |
> > > >>>> +			PIPEDMC_ERROR;
> > > >>>>
> > > >>> Mostly looks okay but here's my question:
> > > >>> I know LNL pipe B had an issue with PIPEDMC_ERROR being
> > > >>> triggered on LNL pipe B, As I can see from Ville's commit
> > > >>> message, but is it still the case for
> > > >> PTL ?
> > > >>> Can we have that tested ?
> > > >>> If that works we can add the PIPEDMC_ERROR from PTL onwards.
> > > >>> Then here we can change code to create a mask and then return it
> > > >>> finally like
> > > >> :
> > > >>> mask = PIPEDMC_FLIPQ_PROG_DONE
> > > >>>
> > > >>> if display ver >= 30
> > > >>> mask |= PIPEDMC_ERROR
> > > >>>
> > > >>> if display ver < 35
> > > >>> mask |= PIPEDMC_GTT_FAULT |
> > > >>>                   PIPEDMC_ATS_FAULT;
> > > >>>
> > > >>> Return mask;
> > > >>>
> > > >>> Obviously that is if PIPEDMC_ERROR works on PTL properly.
> > > >> Thank you for spotting this, I think its better to add above
> > > >> logic in new series rather than combing with 35+ bit mask update.
> > > >>
> > > >> Regards,
> > > >> Dibin
> > > > If that is the case then I think its better to drop this patch altogether.
> > > > We have a justification of why we remove bits in first patch, that
> > > > was a change
> > > in NVL H/w.
> > > > But this change was introduced in LNL.
> > > > Without a strong reasoning of why you are enabling this is in NVL
> > > > and not in PTL (which I don’t see in this patch series) I suggest
> > > > you add this patch with as a part of the series where you have a
> > > > use case for it. And if
> > > there too you only add it for NVL You will need to add a comments as
> > > to why this is not enabled for PTL.
> > >
> > > This patch intent to fix the interrupt mask for 35+.
> > > I dont see any reason to disable this bit as
> > > 1) error bit warning is already present in interrupt handler.
> > > 2) bit is defined in bsepc.
> > > 3) LNL it was mentioned disabled because pipeB triggering it during
> > > first DC state transition which did not see in this case.
> >
> > In that case the interrupt handler is made to report errors if this bit is
> unmasked for  >= LNL.
> > Now this bit is introduced in LNL timeframe for which the reason to not add it
> is mentioned in comment and documented.
> > Similarly if you want to skip PTL you will need this to be documented
> > with the reason. Which means the FIXME comment needs to be modified In
> the least. If this patch is to go through.
> > Also Ville can you shed some light, on what the H/w folks had to say
> > regarding this and if they had mentioned any WA for LNL, and if this is fixed In
> LNL+.
> 
> I suspect it might be some kind of issue in the DMC firmware where it's
> accessing unpowered registers. But it was never investigated properly.
> 
> It would be good if someone could take that up and actually figure out what's
> going on. The problem is figuring out what exactly is the register that causes
> this. I don't think LNL has any kind of RM_CAPTURE register/etc available for
> the DMC that would directly tell us that :(
> 
> IIRC the Windows driver did seem to enable the error interrupt on LNL, but
> either they just ignore all the reported errors, or somehow the way they use
> the hardware/firmware doesn't trigger them.

Hmm would it be okay if we can move with enabling the bit for NVL+ since Dibin says we don’t see this issue
Anymore, while we add or TODO or FIXME in the comment to investigate this further for PTL and LNL

Regards,
Suraj Kandpal

> 
> --
> Ville Syrjälä
> Intel

Re: [PATCH 2/2] drm/i915/dmc: Enable PIPEDMC_ERROR interrupt

[Ville Syrjälä]

On Fri, Mar 13, 2026 at 10:08:47AM +0000, Kandpal, Suraj wrote:
> > Subject: Re: [PATCH 2/2] drm/i915/dmc: Enable PIPEDMC_ERROR interrupt
> > 
> > On Fri, Mar 13, 2026 at 05:04:46AM +0000, Kandpal, Suraj wrote:
> > >
> > >
> > > > -----Original Message-----
> > > > From: Dibin Moolakadan Subrahmanian
> > > > <dibin.moolakadan.subrahmanian@intel.com>
> > > > Sent: Friday, March 13, 2026 9:55 AM
> > > > To: Kandpal, Suraj <suraj.kandpal@intel.com>;
> > > > intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
> > > > Cc: ville.syrjala@linux.intel.com; Shankar, Uma
> > > > <uma.shankar@intel.com>; Sharma, Swati2 <swati2.sharma@intel.com>
> > > > Subject: Re: [PATCH 2/2] drm/i915/dmc: Enable PIPEDMC_ERROR
> > > > interrupt
> > > >
> > > >
> > > > On 13-03-2026 08:56, Kandpal, Suraj wrote:
> > > > >> On 12-03-2026 08:48, Kandpal, Suraj wrote:
> > > > >>>> Subject: [PATCH 2/2] drm/i915/dmc: Enable PIPEDMC_ERROR
> > > > >>>> interrupt
> > > > >>>>
> > > > >>>> Enable PIPEDMC_ERROR interrupt bit for display version 35+.
> > > > >>>>
> > > > >>> Add same Bspec link here too
> > > > >>>
> > > > >>>> Signed-off-by: Dibin Moolakadan Subrahmanian
> > > > >>>> <dibin.moolakadan.subrahmanian@intel.com>
> > > > >>>> ---
> > > > >>>>    drivers/gpu/drm/i915/display/intel_dmc.c | 3 ++-
> > > > >>>>    1 file changed, 2 insertions(+), 1 deletion(-)
> > > > >>>>
> > > > >>>> diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c
> > > > >>>> b/drivers/gpu/drm/i915/display/intel_dmc.c
> > > > >>>> index 38b284a0db82..e60f1f977070 100644
> > > > >>>> --- a/drivers/gpu/drm/i915/display/intel_dmc.c
> > > > >>>> +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
> > > > >>>> @@ -510,7 +510,8 @@ static void pipedmc_clock_gating_wa(struct
> > > > >>>> intel_display *display, bool enable)  static u32
> > > > >>>> pipedmc_interrupt_mask(struct intel_display *display)  {
> > > > >>>>    	if (DISPLAY_VER(display) >= 35)
> > > > >>>> -		return PIPEDMC_FLIPQ_PROG_DONE;
> > > > >>>> +		return PIPEDMC_FLIPQ_PROG_DONE |
> > > > >>>> +			PIPEDMC_ERROR;
> > > > >>>>
> > > > >>> Mostly looks okay but here's my question:
> > > > >>> I know LNL pipe B had an issue with PIPEDMC_ERROR being
> > > > >>> triggered on LNL pipe B, As I can see from Ville's commit
> > > > >>> message, but is it still the case for
> > > > >> PTL ?
> > > > >>> Can we have that tested ?
> > > > >>> If that works we can add the PIPEDMC_ERROR from PTL onwards.
> > > > >>> Then here we can change code to create a mask and then return it
> > > > >>> finally like
> > > > >> :
> > > > >>> mask = PIPEDMC_FLIPQ_PROG_DONE
> > > > >>>
> > > > >>> if display ver >= 30
> > > > >>> mask |= PIPEDMC_ERROR
> > > > >>>
> > > > >>> if display ver < 35
> > > > >>> mask |= PIPEDMC_GTT_FAULT |
> > > > >>>                   PIPEDMC_ATS_FAULT;
> > > > >>>
> > > > >>> Return mask;
> > > > >>>
> > > > >>> Obviously that is if PIPEDMC_ERROR works on PTL properly.
> > > > >> Thank you for spotting this, I think its better to add above
> > > > >> logic in new series rather than combing with 35+ bit mask update.
> > > > >>
> > > > >> Regards,
> > > > >> Dibin
> > > > > If that is the case then I think its better to drop this patch altogether.
> > > > > We have a justification of why we remove bits in first patch, that
> > > > > was a change
> > > > in NVL H/w.
> > > > > But this change was introduced in LNL.
> > > > > Without a strong reasoning of why you are enabling this is in NVL
> > > > > and not in PTL (which I don’t see in this patch series) I suggest
> > > > > you add this patch with as a part of the series where you have a
> > > > > use case for it. And if
> > > > there too you only add it for NVL You will need to add a comments as
> > > > to why this is not enabled for PTL.
> > > >
> > > > This patch intent to fix the interrupt mask for 35+.
> > > > I dont see any reason to disable this bit as
> > > > 1) error bit warning is already present in interrupt handler.
> > > > 2) bit is defined in bsepc.
> > > > 3) LNL it was mentioned disabled because pipeB triggering it during
> > > > first DC state transition which did not see in this case.
> > >
> > > In that case the interrupt handler is made to report errors if this bit is
> > unmasked for  >= LNL.
> > > Now this bit is introduced in LNL timeframe for which the reason to not add it
> > is mentioned in comment and documented.
> > > Similarly if you want to skip PTL you will need this to be documented
> > > with the reason. Which means the FIXME comment needs to be modified In
> > the least. If this patch is to go through.
> > > Also Ville can you shed some light, on what the H/w folks had to say
> > > regarding this and if they had mentioned any WA for LNL, and if this is fixed In
> > LNL+.
> > 
> > I suspect it might be some kind of issue in the DMC firmware where it's
> > accessing unpowered registers. But it was never investigated properly.
> > 
> > It would be good if someone could take that up and actually figure out what's
> > going on. The problem is figuring out what exactly is the register that causes
> > this. I don't think LNL has any kind of RM_CAPTURE register/etc available for
> > the DMC that would directly tell us that :(
> > 
> > IIRC the Windows driver did seem to enable the error interrupt on LNL, but
> > either they just ignore all the reported errors, or somehow the way they use
> > the hardware/firmware doesn't trigger them.
> 
> Hmm would it be okay if we can move with enabling the bit for NVL+ since Dibin says we don’t see this issue
> Anymore, while we add or TODO or FIXME in the comment to investigate this further for PTL and LNL

Yeah, I think the sooner we enable this on NVL the better. We want to
catch the issues early. For PTL someone should just send a patch to
enable it (separately from the NVL changes) and hopefully CI will tell
us whether it's still a problem there or not.

-- 
Ville Syrjälä
Intel

RE: [PATCH 2/2] drm/i915/dmc: Enable PIPEDMC_ERROR interrupt

[Kandpal, Suraj]

> > > > > >>>
> > > > > >>> if display ver < 35
> > > > > >>> mask |= PIPEDMC_GTT_FAULT |
> > > > > >>>                   PIPEDMC_ATS_FAULT;
> > > > > >>>
> > > > > >>> Return mask;
> > > > > >>>
> > > > > >>> Obviously that is if PIPEDMC_ERROR works on PTL properly.
> > > > > >> Thank you for spotting this, I think its better to add above
> > > > > >> logic in new series rather than combing with 35+ bit mask update.
> > > > > >>
> > > > > >> Regards,
> > > > > >> Dibin
> > > > > > If that is the case then I think its better to drop this patch altogether.
> > > > > > We have a justification of why we remove bits in first patch,
> > > > > > that was a change
> > > > > in NVL H/w.
> > > > > > But this change was introduced in LNL.
> > > > > > Without a strong reasoning of why you are enabling this is in
> > > > > > NVL and not in PTL (which I don’t see in this patch series) I
> > > > > > suggest you add this patch with as a part of the series where
> > > > > > you have a use case for it. And if
> > > > > there too you only add it for NVL You will need to add a
> > > > > comments as to why this is not enabled for PTL.
> > > > >
> > > > > This patch intent to fix the interrupt mask for 35+.
> > > > > I dont see any reason to disable this bit as
> > > > > 1) error bit warning is already present in interrupt handler.
> > > > > 2) bit is defined in bsepc.
> > > > > 3) LNL it was mentioned disabled because pipeB triggering it
> > > > > during first DC state transition which did not see in this case.
> > > >
> > > > In that case the interrupt handler is made to report errors if
> > > > this bit is
> > > unmasked for  >= LNL.
> > > > Now this bit is introduced in LNL timeframe for which the reason
> > > > to not add it
> > > is mentioned in comment and documented.
> > > > Similarly if you want to skip PTL you will need this to be
> > > > documented with the reason. Which means the FIXME comment needs to
> > > > be modified In
> > > the least. If this patch is to go through.
> > > > Also Ville can you shed some light, on what the H/w folks had to
> > > > say regarding this and if they had mentioned any WA for LNL, and
> > > > if this is fixed In
> > > LNL+.
> > >
> > > I suspect it might be some kind of issue in the DMC firmware where
> > > it's accessing unpowered registers. But it was never investigated properly.
> > >
> > > It would be good if someone could take that up and actually figure
> > > out what's going on. The problem is figuring out what exactly is the
> > > register that causes this. I don't think LNL has any kind of
> > > RM_CAPTURE register/etc available for the DMC that would directly
> > > tell us that :(
> > >
> > > IIRC the Windows driver did seem to enable the error interrupt on
> > > LNL, but either they just ignore all the reported errors, or somehow
> > > the way they use the hardware/firmware doesn't trigger them.
> >
> > Hmm would it be okay if we can move with enabling the bit for NVL+
> > since Dibin says we don’t see this issue Anymore, while we add or TODO
> > or FIXME in the comment to investigate this further for PTL and LNL
> 
> Yeah, I think the sooner we enable this on NVL the better. We want to catch the
> issues early. For PTL someone should just send a patch to enable it (separately
> from the NVL changes) and hopefully CI will tell us whether it's still a problem
> there or not.
> 

Dibin you can add a comment "TODO: Check for PTL if setting error bit still throws an issue and enable this bit for that gen too if it does not."
Where you add the error bit.
Ill take the AR and send separate patch series first for PTL then LNL. There have been some DMC firmware updates since then high chance this issue is not seen anymore.

Regards,
Suraj Kandpal
> --
> Ville Syrjälä
> Intel

Re: [PATCH 2/2] drm/i915/dmc: Enable PIPEDMC_ERROR interrupt

[Dibin Moolakadan Subrahmanian]

On 16-03-2026 08:19, Kandpal, Suraj wrote:
>>>>>>>>> if display ver < 35
>>>>>>>>> mask |= PIPEDMC_GTT_FAULT |
>>>>>>>>>                    PIPEDMC_ATS_FAULT;
>>>>>>>>>
>>>>>>>>> Return mask;
>>>>>>>>>
>>>>>>>>> Obviously that is if PIPEDMC_ERROR works on PTL properly.
>>>>>>>> Thank you for spotting this, I think its better to add above
>>>>>>>> logic in new series rather than combing with 35+ bit mask update.
>>>>>>>>
>>>>>>>> Regards,
>>>>>>>> Dibin
>>>>>>> If that is the case then I think its better to drop this patch altogether.
>>>>>>> We have a justification of why we remove bits in first patch,
>>>>>>> that was a change
>>>>>> in NVL H/w.
>>>>>>> But this change was introduced in LNL.
>>>>>>> Without a strong reasoning of why you are enabling this is in
>>>>>>> NVL and not in PTL (which I don’t see in this patch series) I
>>>>>>> suggest you add this patch with as a part of the series where
>>>>>>> you have a use case for it. And if
>>>>>> there too you only add it for NVL You will need to add a
>>>>>> comments as to why this is not enabled for PTL.
>>>>>>
>>>>>> This patch intent to fix the interrupt mask for 35+.
>>>>>> I dont see any reason to disable this bit as
>>>>>> 1) error bit warning is already present in interrupt handler.
>>>>>> 2) bit is defined in bsepc.
>>>>>> 3) LNL it was mentioned disabled because pipeB triggering it
>>>>>> during first DC state transition which did not see in this case.
>>>>> In that case the interrupt handler is made to report errors if
>>>>> this bit is
>>>> unmasked for  >= LNL.
>>>>> Now this bit is introduced in LNL timeframe for which the reason
>>>>> to not add it
>>>> is mentioned in comment and documented.
>>>>> Similarly if you want to skip PTL you will need this to be
>>>>> documented with the reason. Which means the FIXME comment needs to
>>>>> be modified In
>>>> the least. If this patch is to go through.
>>>>> Also Ville can you shed some light, on what the H/w folks had to
>>>>> say regarding this and if they had mentioned any WA for LNL, and
>>>>> if this is fixed In
>>>> LNL+.
>>>>
>>>> I suspect it might be some kind of issue in the DMC firmware where
>>>> it's accessing unpowered registers. But it was never investigated properly.
>>>>
>>>> It would be good if someone could take that up and actually figure
>>>> out what's going on. The problem is figuring out what exactly is the
>>>> register that causes this. I don't think LNL has any kind of
>>>> RM_CAPTURE register/etc available for the DMC that would directly
>>>> tell us that :(
>>>>
>>>> IIRC the Windows driver did seem to enable the error interrupt on
>>>> LNL, but either they just ignore all the reported errors, or somehow
>>>> the way they use the hardware/firmware doesn't trigger them.
>>> Hmm would it be okay if we can move with enabling the bit for NVL+
>>> since Dibin says we don’t see this issue Anymore, while we add or TODO
>>> or FIXME in the comment to investigate this further for PTL and LNL
>> Yeah, I think the sooner we enable this on NVL the better. We want to catch the
>> issues early. For PTL someone should just send a patch to enable it (separately
>> from the NVL changes) and hopefully CI will tell us whether it's still a problem
>> there or not.
>>
> Dibin you can add a comment "TODO: Check for PTL if setting error bit still throws an issue and enable this bit for that gen too if it does not."
> Where you add the error bit.
> Ill take the AR and send separate patch series first for PTL then LNL. There have been some DMC firmware updates since then high chance this issue is not seen anymore.

I will add TODO for PTL in v3.
The actual PTL enablement for ERROR_BIT will be submitted as separate patch.

> Regards,
> Suraj Kandpal
>> --
>> Ville Syrjälä
>> Intel

✓ CI.KUnit: success for drm/i915/dmc: Update PIPEDMC interrupt mask (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/dmc: Update PIPEDMC interrupt mask (rev2)
URL   : https://patchwork.freedesktop.org/series/162933/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[06:36:37] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[06:36:41] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[06:37:12] Starting KUnit Kernel (1/1)...
[06:37:12] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[06:37:12] ================== guc_buf (11 subtests) ===================
[06:37:12] [PASSED] test_smallest
[06:37:12] [PASSED] test_largest
[06:37:12] [PASSED] test_granular
[06:37:12] [PASSED] test_unique
[06:37:12] [PASSED] test_overlap
[06:37:12] [PASSED] test_reusable
[06:37:12] [PASSED] test_too_big
[06:37:12] [PASSED] test_flush
[06:37:12] [PASSED] test_lookup
[06:37:12] [PASSED] test_data
[06:37:12] [PASSED] test_class
[06:37:12] ===================== [PASSED] guc_buf =====================
[06:37:12] =================== guc_dbm (7 subtests) ===================
[06:37:12] [PASSED] test_empty
[06:37:12] [PASSED] test_default
[06:37:12] ======================== test_size  ========================
[06:37:12] [PASSED] 4
[06:37:12] [PASSED] 8
[06:37:12] [PASSED] 32
[06:37:12] [PASSED] 256
[06:37:12] ==================== [PASSED] test_size ====================
[06:37:12] ======================= test_reuse  ========================
[06:37:12] [PASSED] 4
[06:37:12] [PASSED] 8
[06:37:12] [PASSED] 32
[06:37:12] [PASSED] 256
[06:37:12] =================== [PASSED] test_reuse ====================
[06:37:12] =================== test_range_overlap  ====================
[06:37:12] [PASSED] 4
[06:37:12] [PASSED] 8
[06:37:12] [PASSED] 32
[06:37:12] [PASSED] 256
[06:37:12] =============== [PASSED] test_range_overlap ================
[06:37:12] =================== test_range_compact  ====================
[06:37:12] [PASSED] 4
[06:37:12] [PASSED] 8
[06:37:12] [PASSED] 32
[06:37:12] [PASSED] 256
[06:37:12] =============== [PASSED] test_range_compact ================
[06:37:12] ==================== test_range_spare  =====================
[06:37:12] [PASSED] 4
[06:37:12] [PASSED] 8
[06:37:12] [PASSED] 32
[06:37:12] [PASSED] 256
[06:37:12] ================ [PASSED] test_range_spare =================
[06:37:12] ===================== [PASSED] guc_dbm =====================
[06:37:12] =================== guc_idm (6 subtests) ===================
[06:37:12] [PASSED] bad_init
[06:37:12] [PASSED] no_init
[06:37:12] [PASSED] init_fini
[06:37:12] [PASSED] check_used
[06:37:12] [PASSED] check_quota
[06:37:12] [PASSED] check_all
[06:37:12] ===================== [PASSED] guc_idm =====================
[06:37:12] ================== no_relay (3 subtests) ===================
[06:37:12] [PASSED] xe_drops_guc2pf_if_not_ready
[06:37:12] [PASSED] xe_drops_guc2vf_if_not_ready
[06:37:12] [PASSED] xe_rejects_send_if_not_ready
[06:37:12] ==================== [PASSED] no_relay =====================
[06:37:12] ================== pf_relay (14 subtests) ==================
[06:37:12] [PASSED] pf_rejects_guc2pf_too_short
[06:37:12] [PASSED] pf_rejects_guc2pf_too_long
[06:37:12] [PASSED] pf_rejects_guc2pf_no_payload
[06:37:12] [PASSED] pf_fails_no_payload
[06:37:12] [PASSED] pf_fails_bad_origin
[06:37:12] [PASSED] pf_fails_bad_type
[06:37:12] [PASSED] pf_txn_reports_error
[06:37:12] [PASSED] pf_txn_sends_pf2guc
[06:37:12] [PASSED] pf_sends_pf2guc
[06:37:12] [SKIPPED] pf_loopback_nop
[06:37:12] [SKIPPED] pf_loopback_echo
[06:37:12] [SKIPPED] pf_loopback_fail
[06:37:12] [SKIPPED] pf_loopback_busy
[06:37:12] [SKIPPED] pf_loopback_retry
[06:37:12] ==================== [PASSED] pf_relay =====================
[06:37:12] ================== vf_relay (3 subtests) ===================
[06:37:12] [PASSED] vf_rejects_guc2vf_too_short
[06:37:12] [PASSED] vf_rejects_guc2vf_too_long
[06:37:12] [PASSED] vf_rejects_guc2vf_no_payload
[06:37:12] ==================== [PASSED] vf_relay =====================
[06:37:12] ================ pf_gt_config (9 subtests) =================
[06:37:12] [PASSED] fair_contexts_1vf
[06:37:12] [PASSED] fair_doorbells_1vf
[06:37:12] [PASSED] fair_ggtt_1vf
[06:37:12] ====================== fair_vram_1vf  ======================
[06:37:12] [PASSED] 3.50 GiB
[06:37:12] [PASSED] 11.5 GiB
[06:37:12] [PASSED] 15.5 GiB
[06:37:12] [PASSED] 31.5 GiB
[06:37:12] [PASSED] 63.5 GiB
[06:37:12] [PASSED] 1.91 GiB
[06:37:12] ================== [PASSED] fair_vram_1vf ==================
[06:37:12] ================ fair_vram_1vf_admin_only  =================
[06:37:12] [PASSED] 3.50 GiB
[06:37:12] [PASSED] 11.5 GiB
[06:37:12] [PASSED] 15.5 GiB
[06:37:12] [PASSED] 31.5 GiB
[06:37:12] [PASSED] 63.5 GiB
[06:37:12] [PASSED] 1.91 GiB
[06:37:12] ============ [PASSED] fair_vram_1vf_admin_only =============
[06:37:12] ====================== fair_contexts  ======================
[06:37:12] [PASSED] 1 VF
[06:37:12] [PASSED] 2 VFs
[06:37:12] [PASSED] 3 VFs
[06:37:12] [PASSED] 4 VFs
[06:37:12] [PASSED] 5 VFs
[06:37:12] [PASSED] 6 VFs
[06:37:12] [PASSED] 7 VFs
[06:37:12] [PASSED] 8 VFs
[06:37:12] [PASSED] 9 VFs
[06:37:12] [PASSED] 10 VFs
[06:37:12] [PASSED] 11 VFs
[06:37:12] [PASSED] 12 VFs
[06:37:12] [PASSED] 13 VFs
[06:37:12] [PASSED] 14 VFs
[06:37:12] [PASSED] 15 VFs
[06:37:12] [PASSED] 16 VFs
[06:37:12] [PASSED] 17 VFs
[06:37:12] [PASSED] 18 VFs
[06:37:12] [PASSED] 19 VFs
[06:37:12] [PASSED] 20 VFs
[06:37:12] [PASSED] 21 VFs
[06:37:12] [PASSED] 22 VFs
[06:37:12] [PASSED] 23 VFs
[06:37:12] [PASSED] 24 VFs
[06:37:12] [PASSED] 25 VFs
[06:37:12] [PASSED] 26 VFs
[06:37:12] [PASSED] 27 VFs
[06:37:12] [PASSED] 28 VFs
[06:37:12] [PASSED] 29 VFs
[06:37:12] [PASSED] 30 VFs
[06:37:12] [PASSED] 31 VFs
[06:37:12] [PASSED] 32 VFs
[06:37:12] [PASSED] 33 VFs
[06:37:12] [PASSED] 34 VFs
[06:37:12] [PASSED] 35 VFs
[06:37:12] [PASSED] 36 VFs
[06:37:12] [PASSED] 37 VFs
[06:37:12] [PASSED] 38 VFs
[06:37:12] [PASSED] 39 VFs
[06:37:12] [PASSED] 40 VFs
[06:37:12] [PASSED] 41 VFs
[06:37:12] [PASSED] 42 VFs
[06:37:12] [PASSED] 43 VFs
[06:37:12] [PASSED] 44 VFs
[06:37:12] [PASSED] 45 VFs
[06:37:12] [PASSED] 46 VFs
[06:37:12] [PASSED] 47 VFs
[06:37:12] [PASSED] 48 VFs
[06:37:12] [PASSED] 49 VFs
[06:37:12] [PASSED] 50 VFs
[06:37:12] [PASSED] 51 VFs
[06:37:12] [PASSED] 52 VFs
[06:37:12] [PASSED] 53 VFs
[06:37:12] [PASSED] 54 VFs
[06:37:12] [PASSED] 55 VFs
[06:37:12] [PASSED] 56 VFs
[06:37:12] [PASSED] 57 VFs
[06:37:12] [PASSED] 58 VFs
[06:37:12] [PASSED] 59 VFs
[06:37:12] [PASSED] 60 VFs
[06:37:12] [PASSED] 61 VFs
[06:37:12] [PASSED] 62 VFs
[06:37:12] [PASSED] 63 VFs
[06:37:12] ================== [PASSED] fair_contexts ==================
[06:37:12] ===================== fair_doorbells  ======================
[06:37:12] [PASSED] 1 VF
[06:37:12] [PASSED] 2 VFs
[06:37:12] [PASSED] 3 VFs
[06:37:12] [PASSED] 4 VFs
[06:37:12] [PASSED] 5 VFs
[06:37:12] [PASSED] 6 VFs
[06:37:12] [PASSED] 7 VFs
[06:37:12] [PASSED] 8 VFs
[06:37:12] [PASSED] 9 VFs
[06:37:12] [PASSED] 10 VFs
[06:37:12] [PASSED] 11 VFs
[06:37:12] [PASSED] 12 VFs
[06:37:12] [PASSED] 13 VFs
[06:37:12] [PASSED] 14 VFs
[06:37:12] [PASSED] 15 VFs
[06:37:12] [PASSED] 16 VFs
[06:37:12] [PASSED] 17 VFs
[06:37:12] [PASSED] 18 VFs
[06:37:12] [PASSED] 19 VFs
[06:37:12] [PASSED] 20 VFs
[06:37:12] [PASSED] 21 VFs
[06:37:12] [PASSED] 22 VFs
[06:37:12] [PASSED] 23 VFs
[06:37:12] [PASSED] 24 VFs
[06:37:12] [PASSED] 25 VFs
[06:37:12] [PASSED] 26 VFs
[06:37:12] [PASSED] 27 VFs
[06:37:12] [PASSED] 28 VFs
[06:37:12] [PASSED] 29 VFs
[06:37:12] [PASSED] 30 VFs
[06:37:12] [PASSED] 31 VFs
[06:37:12] [PASSED] 32 VFs
[06:37:12] [PASSED] 33 VFs
[06:37:12] [PASSED] 34 VFs
[06:37:12] [PASSED] 35 VFs
[06:37:12] [PASSED] 36 VFs
[06:37:12] [PASSED] 37 VFs
[06:37:12] [PASSED] 38 VFs
[06:37:12] [PASSED] 39 VFs
[06:37:12] [PASSED] 40 VFs
[06:37:12] [PASSED] 41 VFs
[06:37:12] [PASSED] 42 VFs
[06:37:12] [PASSED] 43 VFs
[06:37:12] [PASSED] 44 VFs
[06:37:12] [PASSED] 45 VFs
[06:37:12] [PASSED] 46 VFs
[06:37:12] [PASSED] 47 VFs
[06:37:12] [PASSED] 48 VFs
[06:37:12] [PASSED] 49 VFs
[06:37:12] [PASSED] 50 VFs
[06:37:12] [PASSED] 51 VFs
[06:37:12] [PASSED] 52 VFs
[06:37:12] [PASSED] 53 VFs
[06:37:12] [PASSED] 54 VFs
[06:37:12] [PASSED] 55 VFs
[06:37:12] [PASSED] 56 VFs
[06:37:12] [PASSED] 57 VFs
[06:37:12] [PASSED] 58 VFs
[06:37:12] [PASSED] 59 VFs
[06:37:12] [PASSED] 60 VFs
[06:37:12] [PASSED] 61 VFs
[06:37:12] [PASSED] 62 VFs
[06:37:12] [PASSED] 63 VFs
[06:37:12] ================= [PASSED] fair_doorbells ==================
[06:37:12] ======================== fair_ggtt  ========================
[06:37:12] [PASSED] 1 VF
[06:37:12] [PASSED] 2 VFs
[06:37:12] [PASSED] 3 VFs
[06:37:12] [PASSED] 4 VFs
[06:37:12] [PASSED] 5 VFs
[06:37:12] [PASSED] 6 VFs
[06:37:12] [PASSED] 7 VFs
[06:37:12] [PASSED] 8 VFs
[06:37:12] [PASSED] 9 VFs
[06:37:12] [PASSED] 10 VFs
[06:37:12] [PASSED] 11 VFs
[06:37:12] [PASSED] 12 VFs
[06:37:12] [PASSED] 13 VFs
[06:37:12] [PASSED] 14 VFs
[06:37:12] [PASSED] 15 VFs
[06:37:12] [PASSED] 16 VFs
[06:37:12] [PASSED] 17 VFs
[06:37:12] [PASSED] 18 VFs
[06:37:12] [PASSED] 19 VFs
[06:37:12] [PASSED] 20 VFs
[06:37:12] [PASSED] 21 VFs
[06:37:12] [PASSED] 22 VFs
[06:37:12] [PASSED] 23 VFs
[06:37:12] [PASSED] 24 VFs
[06:37:12] [PASSED] 25 VFs
[06:37:12] [PASSED] 26 VFs
[06:37:12] [PASSED] 27 VFs
[06:37:12] [PASSED] 28 VFs
[06:37:12] [PASSED] 29 VFs
[06:37:12] [PASSED] 30 VFs
[06:37:12] [PASSED] 31 VFs
[06:37:12] [PASSED] 32 VFs
[06:37:12] [PASSED] 33 VFs
[06:37:12] [PASSED] 34 VFs
[06:37:12] [PASSED] 35 VFs
[06:37:12] [PASSED] 36 VFs
[06:37:12] [PASSED] 37 VFs
[06:37:12] [PASSED] 38 VFs
[06:37:12] [PASSED] 39 VFs
[06:37:12] [PASSED] 40 VFs
[06:37:12] [PASSED] 41 VFs
[06:37:12] [PASSED] 42 VFs
[06:37:12] [PASSED] 43 VFs
[06:37:12] [PASSED] 44 VFs
[06:37:12] [PASSED] 45 VFs
[06:37:12] [PASSED] 46 VFs
[06:37:12] [PASSED] 47 VFs
[06:37:12] [PASSED] 48 VFs
[06:37:12] [PASSED] 49 VFs
[06:37:12] [PASSED] 50 VFs
[06:37:12] [PASSED] 51 VFs
[06:37:12] [PASSED] 52 VFs
[06:37:12] [PASSED] 53 VFs
[06:37:12] [PASSED] 54 VFs
[06:37:12] [PASSED] 55 VFs
[06:37:12] [PASSED] 56 VFs
[06:37:12] [PASSED] 57 VFs
[06:37:12] [PASSED] 58 VFs
[06:37:12] [PASSED] 59 VFs
[06:37:12] [PASSED] 60 VFs
[06:37:12] [PASSED] 61 VFs
[06:37:12] [PASSED] 62 VFs
[06:37:12] [PASSED] 63 VFs
[06:37:12] ==================== [PASSED] fair_ggtt ====================
[06:37:12] ======================== fair_vram  ========================
[06:37:12] [PASSED] 1 VF
[06:37:12] [PASSED] 2 VFs
[06:37:12] [PASSED] 3 VFs
[06:37:12] [PASSED] 4 VFs
[06:37:12] [PASSED] 5 VFs
[06:37:12] [PASSED] 6 VFs
[06:37:12] [PASSED] 7 VFs
[06:37:12] [PASSED] 8 VFs
[06:37:12] [PASSED] 9 VFs
[06:37:12] [PASSED] 10 VFs
[06:37:12] [PASSED] 11 VFs
[06:37:12] [PASSED] 12 VFs
[06:37:12] [PASSED] 13 VFs
[06:37:12] [PASSED] 14 VFs
[06:37:12] [PASSED] 15 VFs
[06:37:12] [PASSED] 16 VFs
[06:37:12] [PASSED] 17 VFs
[06:37:12] [PASSED] 18 VFs
[06:37:12] [PASSED] 19 VFs
[06:37:12] [PASSED] 20 VFs
[06:37:12] [PASSED] 21 VFs
[06:37:12] [PASSED] 22 VFs
[06:37:12] [PASSED] 23 VFs
[06:37:12] [PASSED] 24 VFs
[06:37:12] [PASSED] 25 VFs
[06:37:12] [PASSED] 26 VFs
[06:37:12] [PASSED] 27 VFs
[06:37:12] [PASSED] 28 VFs
[06:37:12] [PASSED] 29 VFs
[06:37:12] [PASSED] 30 VFs
[06:37:12] [PASSED] 31 VFs
[06:37:12] [PASSED] 32 VFs
[06:37:12] [PASSED] 33 VFs
[06:37:12] [PASSED] 34 VFs
[06:37:12] [PASSED] 35 VFs
[06:37:12] [PASSED] 36 VFs
[06:37:12] [PASSED] 37 VFs
[06:37:12] [PASSED] 38 VFs
[06:37:12] [PASSED] 39 VFs
[06:37:12] [PASSED] 40 VFs
[06:37:12] [PASSED] 41 VFs
[06:37:12] [PASSED] 42 VFs
[06:37:12] [PASSED] 43 VFs
[06:37:12] [PASSED] 44 VFs
[06:37:12] [PASSED] 45 VFs
[06:37:12] [PASSED] 46 VFs
[06:37:12] [PASSED] 47 VFs
[06:37:12] [PASSED] 48 VFs
[06:37:12] [PASSED] 49 VFs
[06:37:12] [PASSED] 50 VFs
[06:37:12] [PASSED] 51 VFs
[06:37:12] [PASSED] 52 VFs
[06:37:12] [PASSED] 53 VFs
[06:37:12] [PASSED] 54 VFs
[06:37:12] [PASSED] 55 VFs
[06:37:12] [PASSED] 56 VFs
[06:37:12] [PASSED] 57 VFs
[06:37:12] [PASSED] 58 VFs
[06:37:12] [PASSED] 59 VFs
[06:37:12] [PASSED] 60 VFs
[06:37:12] [PASSED] 61 VFs
[06:37:12] [PASSED] 62 VFs
[06:37:12] [PASSED] 63 VFs
[06:37:12] ==================== [PASSED] fair_vram ====================
[06:37:12] ================== [PASSED] pf_gt_config ===================
[06:37:12] ===================== lmtt (1 subtest) =====================
[06:37:12] ======================== test_ops  =========================
[06:37:12] [PASSED] 2-level
[06:37:12] [PASSED] multi-level
[06:37:12] ==================== [PASSED] test_ops =====================
[06:37:12] ====================== [PASSED] lmtt =======================
[06:37:12] ================= pf_service (11 subtests) =================
[06:37:12] [PASSED] pf_negotiate_any
[06:37:12] [PASSED] pf_negotiate_base_match
[06:37:12] [PASSED] pf_negotiate_base_newer
[06:37:12] [PASSED] pf_negotiate_base_next
[06:37:12] [SKIPPED] pf_negotiate_base_older
[06:37:12] [PASSED] pf_negotiate_base_prev
[06:37:12] [PASSED] pf_negotiate_latest_match
[06:37:12] [PASSED] pf_negotiate_latest_newer
[06:37:12] [PASSED] pf_negotiate_latest_next
[06:37:12] [SKIPPED] pf_negotiate_latest_older
[06:37:12] [SKIPPED] pf_negotiate_latest_prev
[06:37:12] =================== [PASSED] pf_service ====================
[06:37:12] ================= xe_guc_g2g (2 subtests) ==================
[06:37:12] ============== xe_live_guc_g2g_kunit_default  ==============
[06:37:12] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[06:37:12] ============== xe_live_guc_g2g_kunit_allmem  ===============
[06:37:12] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[06:37:12] =================== [SKIPPED] xe_guc_g2g ===================
[06:37:12] =================== xe_mocs (2 subtests) ===================
[06:37:12] ================ xe_live_mocs_kernel_kunit  ================
[06:37:12] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[06:37:12] ================ xe_live_mocs_reset_kunit  =================
[06:37:12] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[06:37:12] ==================== [SKIPPED] xe_mocs =====================
[06:37:12] ================= xe_migrate (2 subtests) ==================
[06:37:12] ================= xe_migrate_sanity_kunit  =================
[06:37:12] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[06:37:12] ================== xe_validate_ccs_kunit  ==================
[06:37:12] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[06:37:12] =================== [SKIPPED] xe_migrate ===================
[06:37:12] ================== xe_dma_buf (1 subtest) ==================
[06:37:12] ==================== xe_dma_buf_kunit  =====================
[06:37:12] ================ [SKIPPED] xe_dma_buf_kunit ================
[06:37:12] =================== [SKIPPED] xe_dma_buf ===================
[06:37:12] ================= xe_bo_shrink (1 subtest) =================
[06:37:12] =================== xe_bo_shrink_kunit  ====================
[06:37:12] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[06:37:12] ================== [SKIPPED] xe_bo_shrink ==================
[06:37:12] ==================== xe_bo (2 subtests) ====================
[06:37:12] ================== xe_ccs_migrate_kunit  ===================
[06:37:12] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[06:37:12] ==================== xe_bo_evict_kunit  ====================
[06:37:12] =============== [SKIPPED] xe_bo_evict_kunit ================
[06:37:12] ===================== [SKIPPED] xe_bo ======================
[06:37:12] ==================== args (13 subtests) ====================
[06:37:12] [PASSED] count_args_test
[06:37:12] [PASSED] call_args_example
[06:37:12] [PASSED] call_args_test
[06:37:12] [PASSED] drop_first_arg_example
[06:37:12] [PASSED] drop_first_arg_test
[06:37:12] [PASSED] first_arg_example
[06:37:12] [PASSED] first_arg_test
[06:37:12] [PASSED] last_arg_example
[06:37:12] [PASSED] last_arg_test
[06:37:12] [PASSED] pick_arg_example
[06:37:12] [PASSED] if_args_example
[06:37:12] [PASSED] if_args_test
[06:37:12] [PASSED] sep_comma_example
[06:37:12] ====================== [PASSED] args =======================
[06:37:12] =================== xe_pci (3 subtests) ====================
[06:37:12] ==================== check_graphics_ip  ====================
[06:37:12] [PASSED] 12.00 Xe_LP
[06:37:12] [PASSED] 12.10 Xe_LP+
[06:37:12] [PASSED] 12.55 Xe_HPG
[06:37:12] [PASSED] 12.60 Xe_HPC
[06:37:12] [PASSED] 12.70 Xe_LPG
[06:37:12] [PASSED] 12.71 Xe_LPG
[06:37:12] [PASSED] 12.74 Xe_LPG+
[06:37:12] [PASSED] 20.01 Xe2_HPG
[06:37:12] [PASSED] 20.02 Xe2_HPG
[06:37:12] [PASSED] 20.04 Xe2_LPG
[06:37:12] [PASSED] 30.00 Xe3_LPG
[06:37:12] [PASSED] 30.01 Xe3_LPG
[06:37:12] [PASSED] 30.03 Xe3_LPG
[06:37:12] [PASSED] 30.04 Xe3_LPG
[06:37:12] [PASSED] 30.05 Xe3_LPG
[06:37:12] [PASSED] 35.10 Xe3p_LPG
[06:37:12] [PASSED] 35.11 Xe3p_XPC
[06:37:12] ================ [PASSED] check_graphics_ip ================
[06:37:12] ===================== check_media_ip  ======================
[06:37:12] [PASSED] 12.00 Xe_M
[06:37:12] [PASSED] 12.55 Xe_HPM
[06:37:12] [PASSED] 13.00 Xe_LPM+
[06:37:12] [PASSED] 13.01 Xe2_HPM
[06:37:12] [PASSED] 20.00 Xe2_LPM
[06:37:12] [PASSED] 30.00 Xe3_LPM
[06:37:12] [PASSED] 30.02 Xe3_LPM
[06:37:12] [PASSED] 35.00 Xe3p_LPM
[06:37:12] [PASSED] 35.03 Xe3p_HPM
[06:37:12] ================= [PASSED] check_media_ip ==================
[06:37:12] =================== check_platform_desc  ===================
[06:37:12] [PASSED] 0x9A60 (TIGERLAKE)
[06:37:12] [PASSED] 0x9A68 (TIGERLAKE)
[06:37:12] [PASSED] 0x9A70 (TIGERLAKE)
[06:37:12] [PASSED] 0x9A40 (TIGERLAKE)
[06:37:12] [PASSED] 0x9A49 (TIGERLAKE)
[06:37:12] [PASSED] 0x9A59 (TIGERLAKE)
[06:37:12] [PASSED] 0x9A78 (TIGERLAKE)
[06:37:12] [PASSED] 0x9AC0 (TIGERLAKE)
[06:37:12] [PASSED] 0x9AC9 (TIGERLAKE)
[06:37:12] [PASSED] 0x9AD9 (TIGERLAKE)
[06:37:12] [PASSED] 0x9AF8 (TIGERLAKE)
[06:37:12] [PASSED] 0x4C80 (ROCKETLAKE)
[06:37:12] [PASSED] 0x4C8A (ROCKETLAKE)
[06:37:12] [PASSED] 0x4C8B (ROCKETLAKE)
[06:37:12] [PASSED] 0x4C8C (ROCKETLAKE)
[06:37:12] [PASSED] 0x4C90 (ROCKETLAKE)
[06:37:12] [PASSED] 0x4C9A (ROCKETLAKE)
[06:37:12] [PASSED] 0x4680 (ALDERLAKE_S)
[06:37:12] [PASSED] 0x4682 (ALDERLAKE_S)
[06:37:12] [PASSED] 0x4688 (ALDERLAKE_S)
[06:37:12] [PASSED] 0x468A (ALDERLAKE_S)
[06:37:12] [PASSED] 0x468B (ALDERLAKE_S)
[06:37:12] [PASSED] 0x4690 (ALDERLAKE_S)
[06:37:12] [PASSED] 0x4692 (ALDERLAKE_S)
[06:37:12] [PASSED] 0x4693 (ALDERLAKE_S)
[06:37:12] [PASSED] 0x46A0 (ALDERLAKE_P)
[06:37:12] [PASSED] 0x46A1 (ALDERLAKE_P)
[06:37:12] [PASSED] 0x46A2 (ALDERLAKE_P)
[06:37:12] [PASSED] 0x46A3 (ALDERLAKE_P)
[06:37:12] [PASSED] 0x46A6 (ALDERLAKE_P)
[06:37:12] [PASSED] 0x46A8 (ALDERLAKE_P)
[06:37:12] [PASSED] 0x46AA (ALDERLAKE_P)
[06:37:12] [PASSED] 0x462A (ALDERLAKE_P)
[06:37:12] [PASSED] 0x4626 (ALDERLAKE_P)
[06:37:12] [PASSED] 0x4628 (ALDERLAKE_P)
[06:37:12] [PASSED] 0x46B0 (ALDERLAKE_P)
[06:37:12] [PASSED] 0x46B1 (ALDERLAKE_P)
[06:37:12] [PASSED] 0x46B2 (ALDERLAKE_P)
[06:37:12] [PASSED] 0x46B3 (ALDERLAKE_P)
[06:37:12] [PASSED] 0x46C0 (ALDERLAKE_P)
[06:37:12] [PASSED] 0x46C1 (ALDERLAKE_P)
[06:37:12] [PASSED] 0x46C2 (ALDERLAKE_P)
[06:37:12] [PASSED] 0x46C3 (ALDERLAKE_P)
[06:37:12] [PASSED] 0x46D0 (ALDERLAKE_N)
[06:37:12] [PASSED] 0x46D1 (ALDERLAKE_N)
[06:37:12] [PASSED] 0x46D2 (ALDERLAKE_N)
[06:37:12] [PASSED] 0x46D3 (ALDERLAKE_N)
[06:37:12] [PASSED] 0x46D4 (ALDERLAKE_N)
[06:37:12] [PASSED] 0xA721 (ALDERLAKE_P)
[06:37:12] [PASSED] 0xA7A1 (ALDERLAKE_P)
[06:37:12] [PASSED] 0xA7A9 (ALDERLAKE_P)
[06:37:12] [PASSED] 0xA7AC (ALDERLAKE_P)
[06:37:12] [PASSED] 0xA7AD (ALDERLAKE_P)
[06:37:12] [PASSED] 0xA720 (ALDERLAKE_P)
[06:37:12] [PASSED] 0xA7A0 (ALDERLAKE_P)
[06:37:12] [PASSED] 0xA7A8 (ALDERLAKE_P)
[06:37:12] [PASSED] 0xA7AA (ALDERLAKE_P)
[06:37:12] [PASSED] 0xA7AB (ALDERLAKE_P)
[06:37:12] [PASSED] 0xA780 (ALDERLAKE_S)
[06:37:12] [PASSED] 0xA781 (ALDERLAKE_S)
[06:37:12] [PASSED] 0xA782 (ALDERLAKE_S)
[06:37:12] [PASSED] 0xA783 (ALDERLAKE_S)
[06:37:12] [PASSED] 0xA788 (ALDERLAKE_S)
[06:37:12] [PASSED] 0xA789 (ALDERLAKE_S)
[06:37:12] [PASSED] 0xA78A (ALDERLAKE_S)
[06:37:12] [PASSED] 0xA78B (ALDERLAKE_S)
[06:37:12] [PASSED] 0x4905 (DG1)
[06:37:12] [PASSED] 0x4906 (DG1)
[06:37:12] [PASSED] 0x4907 (DG1)
[06:37:12] [PASSED] 0x4908 (DG1)
[06:37:12] [PASSED] 0x4909 (DG1)
[06:37:12] [PASSED] 0x56C0 (DG2)
[06:37:12] [PASSED] 0x56C2 (DG2)
[06:37:12] [PASSED] 0x56C1 (DG2)
[06:37:12] [PASSED] 0x7D51 (METEORLAKE)
[06:37:12] [PASSED] 0x7DD1 (METEORLAKE)
[06:37:12] [PASSED] 0x7D41 (METEORLAKE)
[06:37:12] [PASSED] 0x7D67 (METEORLAKE)
[06:37:12] [PASSED] 0xB640 (METEORLAKE)
[06:37:12] [PASSED] 0x56A0 (DG2)
[06:37:12] [PASSED] 0x56A1 (DG2)
[06:37:12] [PASSED] 0x56A2 (DG2)
[06:37:12] [PASSED] 0x56BE (DG2)
[06:37:12] [PASSED] 0x56BF (DG2)
[06:37:12] [PASSED] 0x5690 (DG2)
[06:37:12] [PASSED] 0x5691 (DG2)
[06:37:12] [PASSED] 0x5692 (DG2)
[06:37:12] [PASSED] 0x56A5 (DG2)
[06:37:12] [PASSED] 0x56A6 (DG2)
[06:37:12] [PASSED] 0x56B0 (DG2)
[06:37:12] [PASSED] 0x56B1 (DG2)
[06:37:12] [PASSED] 0x56BA (DG2)
[06:37:12] [PASSED] 0x56BB (DG2)
[06:37:12] [PASSED] 0x56BC (DG2)
[06:37:12] [PASSED] 0x56BD (DG2)
[06:37:12] [PASSED] 0x5693 (DG2)
[06:37:12] [PASSED] 0x5694 (DG2)
[06:37:12] [PASSED] 0x5695 (DG2)
[06:37:12] [PASSED] 0x56A3 (DG2)
[06:37:12] [PASSED] 0x56A4 (DG2)
[06:37:12] [PASSED] 0x56B2 (DG2)
[06:37:12] [PASSED] 0x56B3 (DG2)
[06:37:12] [PASSED] 0x5696 (DG2)
[06:37:12] [PASSED] 0x5697 (DG2)
[06:37:12] [PASSED] 0xB69 (PVC)
[06:37:12] [PASSED] 0xB6E (PVC)
[06:37:12] [PASSED] 0xBD4 (PVC)
[06:37:12] [PASSED] 0xBD5 (PVC)
[06:37:12] [PASSED] 0xBD6 (PVC)
[06:37:12] [PASSED] 0xBD7 (PVC)
[06:37:12] [PASSED] 0xBD8 (PVC)
[06:37:12] [PASSED] 0xBD9 (PVC)
[06:37:12] [PASSED] 0xBDA (PVC)
[06:37:12] [PASSED] 0xBDB (PVC)
[06:37:12] [PASSED] 0xBE0 (PVC)
[06:37:12] [PASSED] 0xBE1 (PVC)
[06:37:12] [PASSED] 0xBE5 (PVC)
[06:37:12] [PASSED] 0x7D40 (METEORLAKE)
[06:37:12] [PASSED] 0x7D45 (METEORLAKE)
[06:37:12] [PASSED] 0x7D55 (METEORLAKE)
[06:37:12] [PASSED] 0x7D60 (METEORLAKE)
[06:37:12] [PASSED] 0x7DD5 (METEORLAKE)
[06:37:12] [PASSED] 0x6420 (LUNARLAKE)
[06:37:12] [PASSED] 0x64A0 (LUNARLAKE)
[06:37:12] [PASSED] 0x64B0 (LUNARLAKE)
[06:37:12] [PASSED] 0xE202 (BATTLEMAGE)
[06:37:12] [PASSED] 0xE209 (BATTLEMAGE)
[06:37:12] [PASSED] 0xE20B (BATTLEMAGE)
[06:37:12] [PASSED] 0xE20C (BATTLEMAGE)
[06:37:12] [PASSED] 0xE20D (BATTLEMAGE)
[06:37:12] [PASSED] 0xE210 (BATTLEMAGE)
[06:37:12] [PASSED] 0xE211 (BATTLEMAGE)
[06:37:12] [PASSED] 0xE212 (BATTLEMAGE)
[06:37:12] [PASSED] 0xE216 (BATTLEMAGE)
[06:37:12] [PASSED] 0xE220 (BATTLEMAGE)
[06:37:12] [PASSED] 0xE221 (BATTLEMAGE)
[06:37:12] [PASSED] 0xE222 (BATTLEMAGE)
[06:37:12] [PASSED] 0xE223 (BATTLEMAGE)
[06:37:12] [PASSED] 0xB080 (PANTHERLAKE)
[06:37:12] [PASSED] 0xB081 (PANTHERLAKE)
[06:37:12] [PASSED] 0xB082 (PANTHERLAKE)
[06:37:12] [PASSED] 0xB083 (PANTHERLAKE)
[06:37:12] [PASSED] 0xB084 (PANTHERLAKE)
[06:37:12] [PASSED] 0xB085 (PANTHERLAKE)
[06:37:12] [PASSED] 0xB086 (PANTHERLAKE)
[06:37:12] [PASSED] 0xB087 (PANTHERLAKE)
[06:37:12] [PASSED] 0xB08F (PANTHERLAKE)
[06:37:12] [PASSED] 0xB090 (PANTHERLAKE)
[06:37:12] [PASSED] 0xB0A0 (PANTHERLAKE)
[06:37:12] [PASSED] 0xB0B0 (PANTHERLAKE)
[06:37:12] [PASSED] 0xFD80 (PANTHERLAKE)
[06:37:12] [PASSED] 0xFD81 (PANTHERLAKE)
[06:37:12] [PASSED] 0xD740 (NOVALAKE_S)
[06:37:12] [PASSED] 0xD741 (NOVALAKE_S)
[06:37:12] [PASSED] 0xD742 (NOVALAKE_S)
[06:37:12] [PASSED] 0xD743 (NOVALAKE_S)
[06:37:12] [PASSED] 0xD744 (NOVALAKE_S)
[06:37:12] [PASSED] 0xD745 (NOVALAKE_S)
[06:37:12] [PASSED] 0x674C (CRESCENTISLAND)
[06:37:12] [PASSED] 0xD750 (NOVALAKE_P)
[06:37:12] [PASSED] 0xD751 (NOVALAKE_P)
[06:37:12] [PASSED] 0xD752 (NOVALAKE_P)
[06:37:12] [PASSED] 0xD753 (NOVALAKE_P)
[06:37:12] [PASSED] 0xD754 (NOVALAKE_P)
[06:37:12] [PASSED] 0xD755 (NOVALAKE_P)
[06:37:12] [PASSED] 0xD756 (NOVALAKE_P)
[06:37:12] [PASSED] 0xD757 (NOVALAKE_P)
[06:37:12] [PASSED] 0xD75F (NOVALAKE_P)
[06:37:12] =============== [PASSED] check_platform_desc ===============
[06:37:12] ===================== [PASSED] xe_pci ======================
[06:37:12] =================== xe_rtp (2 subtests) ====================
[06:37:12] =============== xe_rtp_process_to_sr_tests  ================
[06:37:12] [PASSED] coalesce-same-reg
[06:37:12] [PASSED] no-match-no-add
[06:37:12] [PASSED] match-or
[06:37:12] [PASSED] match-or-xfail
[06:37:12] [PASSED] no-match-no-add-multiple-rules
[06:37:12] [PASSED] two-regs-two-entries
[06:37:12] [PASSED] clr-one-set-other
[06:37:12] [PASSED] set-field
[06:37:12] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[06:37:12] [PASSED] conflict-not-disjoint
[06:37:12] [PASSED] conflict-reg-type
[06:37:12] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[06:37:12] ================== xe_rtp_process_tests  ===================
[06:37:12] [PASSED] active1
[06:37:12] [PASSED] active2
[06:37:12] [PASSED] active-inactive
[06:37:12] [PASSED] inactive-active
[06:37:12] [PASSED] inactive-1st_or_active-inactive
[06:37:12] [PASSED] inactive-2nd_or_active-inactive
[06:37:12] [PASSED] inactive-last_or_active-inactive
[06:37:12] [PASSED] inactive-no_or_active-inactive
[06:37:12] ============== [PASSED] xe_rtp_process_tests ===============
[06:37:12] ===================== [PASSED] xe_rtp ======================
[06:37:12] ==================== xe_wa (1 subtest) =====================
[06:37:12] ======================== xe_wa_gt  =========================
[06:37:12] [PASSED] TIGERLAKE B0
[06:37:12] [PASSED] DG1 A0
[06:37:12] [PASSED] DG1 B0
[06:37:12] [PASSED] ALDERLAKE_S A0
[06:37:12] [PASSED] ALDERLAKE_S B0
[06:37:12] [PASSED] ALDERLAKE_S C0
[06:37:12] [PASSED] ALDERLAKE_S D0
[06:37:12] [PASSED] ALDERLAKE_P A0
[06:37:12] [PASSED] ALDERLAKE_P B0
[06:37:12] [PASSED] ALDERLAKE_P C0
[06:37:12] [PASSED] ALDERLAKE_S RPLS D0
[06:37:12] [PASSED] ALDERLAKE_P RPLU E0
[06:37:12] [PASSED] DG2 G10 C0
[06:37:12] [PASSED] DG2 G11 B1
[06:37:12] [PASSED] DG2 G12 A1
[06:37:12] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[06:37:12] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[06:37:12] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[06:37:12] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[06:37:12] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[06:37:12] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[06:37:12] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[06:37:12] ==================== [PASSED] xe_wa_gt =====================
[06:37:12] ====================== [PASSED] xe_wa ======================
[06:37:12] ============================================================
[06:37:12] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[06:37:12] Elapsed time: 35.559s total, 4.262s configuring, 30.630s building, 0.613s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[06:37:12] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[06:37:14] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[06:37:38] Starting KUnit Kernel (1/1)...
[06:37:38] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[06:37:38] ============ drm_test_pick_cmdline (2 subtests) ============
[06:37:38] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[06:37:38] =============== drm_test_pick_cmdline_named  ===============
[06:37:38] [PASSED] NTSC
[06:37:38] [PASSED] NTSC-J
[06:37:38] [PASSED] PAL
[06:37:38] [PASSED] PAL-M
[06:37:38] =========== [PASSED] drm_test_pick_cmdline_named ===========
[06:37:38] ============== [PASSED] drm_test_pick_cmdline ==============
[06:37:38] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[06:37:38] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[06:37:38] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[06:37:38] =========== drm_validate_clone_mode (2 subtests) ===========
[06:37:38] ============== drm_test_check_in_clone_mode  ===============
[06:37:38] [PASSED] in_clone_mode
[06:37:38] [PASSED] not_in_clone_mode
[06:37:38] ========== [PASSED] drm_test_check_in_clone_mode ===========
[06:37:38] =============== drm_test_check_valid_clones  ===============
[06:37:38] [PASSED] not_in_clone_mode
[06:37:38] [PASSED] valid_clone
[06:37:38] [PASSED] invalid_clone
[06:37:38] =========== [PASSED] drm_test_check_valid_clones ===========
[06:37:38] ============= [PASSED] drm_validate_clone_mode =============
[06:37:38] ============= drm_validate_modeset (1 subtest) =============
[06:37:38] [PASSED] drm_test_check_connector_changed_modeset
[06:37:38] ============== [PASSED] drm_validate_modeset ===============
[06:37:38] ====== drm_test_bridge_get_current_state (2 subtests) ======
[06:37:38] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[06:37:38] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[06:37:38] ======== [PASSED] drm_test_bridge_get_current_state ========
[06:37:38] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[06:37:38] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[06:37:38] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[06:37:38] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[06:37:38] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[06:37:38] ============== drm_bridge_alloc (2 subtests) ===============
[06:37:38] [PASSED] drm_test_drm_bridge_alloc_basic
[06:37:38] [PASSED] drm_test_drm_bridge_alloc_get_put
[06:37:38] ================ [PASSED] drm_bridge_alloc =================
[06:37:38] ============= drm_cmdline_parser (40 subtests) =============
[06:37:38] [PASSED] drm_test_cmdline_force_d_only
[06:37:38] [PASSED] drm_test_cmdline_force_D_only_dvi
[06:37:38] [PASSED] drm_test_cmdline_force_D_only_hdmi
[06:37:38] [PASSED] drm_test_cmdline_force_D_only_not_digital
[06:37:38] [PASSED] drm_test_cmdline_force_e_only
[06:37:38] [PASSED] drm_test_cmdline_res
[06:37:38] [PASSED] drm_test_cmdline_res_vesa
[06:37:38] [PASSED] drm_test_cmdline_res_vesa_rblank
[06:37:38] [PASSED] drm_test_cmdline_res_rblank
[06:37:38] [PASSED] drm_test_cmdline_res_bpp
[06:37:38] [PASSED] drm_test_cmdline_res_refresh
[06:37:38] [PASSED] drm_test_cmdline_res_bpp_refresh
[06:37:38] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[06:37:38] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[06:37:38] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[06:37:38] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[06:37:38] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[06:37:38] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[06:37:38] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[06:37:38] [PASSED] drm_test_cmdline_res_margins_force_on
[06:37:38] [PASSED] drm_test_cmdline_res_vesa_margins
[06:37:38] [PASSED] drm_test_cmdline_name
[06:37:38] [PASSED] drm_test_cmdline_name_bpp
[06:37:38] [PASSED] drm_test_cmdline_name_option
[06:37:38] [PASSED] drm_test_cmdline_name_bpp_option
[06:37:38] [PASSED] drm_test_cmdline_rotate_0
[06:37:38] [PASSED] drm_test_cmdline_rotate_90
[06:37:38] [PASSED] drm_test_cmdline_rotate_180
[06:37:38] [PASSED] drm_test_cmdline_rotate_270
[06:37:38] [PASSED] drm_test_cmdline_hmirror
[06:37:38] [PASSED] drm_test_cmdline_vmirror
[06:37:38] [PASSED] drm_test_cmdline_margin_options
[06:37:38] [PASSED] drm_test_cmdline_multiple_options
[06:37:38] [PASSED] drm_test_cmdline_bpp_extra_and_option
[06:37:38] [PASSED] drm_test_cmdline_extra_and_option
[06:37:38] [PASSED] drm_test_cmdline_freestanding_options
[06:37:38] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[06:37:38] [PASSED] drm_test_cmdline_panel_orientation
[06:37:38] ================ drm_test_cmdline_invalid  =================
[06:37:38] [PASSED] margin_only
[06:37:38] [PASSED] interlace_only
[06:37:38] [PASSED] res_missing_x
[06:37:38] [PASSED] res_missing_y
[06:37:38] [PASSED] res_bad_y
[06:37:38] [PASSED] res_missing_y_bpp
[06:37:38] [PASSED] res_bad_bpp
[06:37:38] [PASSED] res_bad_refresh
[06:37:38] [PASSED] res_bpp_refresh_force_on_off
[06:37:38] [PASSED] res_invalid_mode
[06:37:38] [PASSED] res_bpp_wrong_place_mode
[06:37:38] [PASSED] name_bpp_refresh
[06:37:38] [PASSED] name_refresh
[06:37:38] [PASSED] name_refresh_wrong_mode
[06:37:38] [PASSED] name_refresh_invalid_mode
[06:37:38] [PASSED] rotate_multiple
[06:37:38] [PASSED] rotate_invalid_val
[06:37:38] [PASSED] rotate_truncated
[06:37:38] [PASSED] invalid_option
[06:37:38] [PASSED] invalid_tv_option
[06:37:38] [PASSED] truncated_tv_option
[06:37:38] ============ [PASSED] drm_test_cmdline_invalid =============
[06:37:38] =============== drm_test_cmdline_tv_options  ===============
[06:37:38] [PASSED] NTSC
[06:37:38] [PASSED] NTSC_443
[06:37:38] [PASSED] NTSC_J
[06:37:38] [PASSED] PAL
[06:37:38] [PASSED] PAL_M
[06:37:38] [PASSED] PAL_N
[06:37:38] [PASSED] SECAM
[06:37:38] [PASSED] MONO_525
[06:37:38] [PASSED] MONO_625
[06:37:38] =========== [PASSED] drm_test_cmdline_tv_options ===========
[06:37:38] =============== [PASSED] drm_cmdline_parser ================
[06:37:38] ========== drmm_connector_hdmi_init (20 subtests) ==========
[06:37:38] [PASSED] drm_test_connector_hdmi_init_valid
[06:37:38] [PASSED] drm_test_connector_hdmi_init_bpc_8
[06:37:38] [PASSED] drm_test_connector_hdmi_init_bpc_10
[06:37:38] [PASSED] drm_test_connector_hdmi_init_bpc_12
[06:37:38] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[06:37:38] [PASSED] drm_test_connector_hdmi_init_bpc_null
[06:37:38] [PASSED] drm_test_connector_hdmi_init_formats_empty
[06:37:38] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[06:37:38] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[06:37:38] [PASSED] supported_formats=0x9 yuv420_allowed=1
[06:37:38] [PASSED] supported_formats=0x9 yuv420_allowed=0
[06:37:38] [PASSED] supported_formats=0x3 yuv420_allowed=1
[06:37:38] [PASSED] supported_formats=0x3 yuv420_allowed=0
[06:37:38] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[06:37:38] [PASSED] drm_test_connector_hdmi_init_null_ddc
[06:37:38] [PASSED] drm_test_connector_hdmi_init_null_product
[06:37:38] [PASSED] drm_test_connector_hdmi_init_null_vendor
[06:37:38] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[06:37:38] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[06:37:38] [PASSED] drm_test_connector_hdmi_init_product_valid
[06:37:38] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[06:37:38] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[06:37:38] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[06:37:38] ========= drm_test_connector_hdmi_init_type_valid  =========
[06:37:38] [PASSED] HDMI-A
[06:37:38] [PASSED] HDMI-B
[06:37:38] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[06:37:38] ======== drm_test_connector_hdmi_init_type_invalid  ========
[06:37:38] [PASSED] Unknown
[06:37:38] [PASSED] VGA
[06:37:38] [PASSED] DVI-I
[06:37:38] [PASSED] DVI-D
[06:37:38] [PASSED] DVI-A
[06:37:38] [PASSED] Composite
[06:37:38] [PASSED] SVIDEO
[06:37:38] [PASSED] LVDS
[06:37:38] [PASSED] Component
[06:37:38] [PASSED] DIN
[06:37:38] [PASSED] DP
[06:37:38] [PASSED] TV
[06:37:38] [PASSED] eDP
[06:37:38] [PASSED] Virtual
[06:37:38] [PASSED] DSI
[06:37:38] [PASSED] DPI
[06:37:38] [PASSED] Writeback
[06:37:38] [PASSED] SPI
[06:37:38] [PASSED] USB
[06:37:38] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[06:37:38] ============ [PASSED] drmm_connector_hdmi_init =============
[06:37:38] ============= drmm_connector_init (3 subtests) =============
[06:37:38] [PASSED] drm_test_drmm_connector_init
[06:37:38] [PASSED] drm_test_drmm_connector_init_null_ddc
[06:37:38] ========= drm_test_drmm_connector_init_type_valid  =========
[06:37:38] [PASSED] Unknown
[06:37:38] [PASSED] VGA
[06:37:38] [PASSED] DVI-I
[06:37:38] [PASSED] DVI-D
[06:37:38] [PASSED] DVI-A
[06:37:38] [PASSED] Composite
[06:37:38] [PASSED] SVIDEO
[06:37:38] [PASSED] LVDS
[06:37:38] [PASSED] Component
[06:37:38] [PASSED] DIN
[06:37:38] [PASSED] DP
[06:37:38] [PASSED] HDMI-A
[06:37:38] [PASSED] HDMI-B
[06:37:38] [PASSED] TV
[06:37:38] [PASSED] eDP
[06:37:38] [PASSED] Virtual
[06:37:38] [PASSED] DSI
[06:37:38] [PASSED] DPI
[06:37:38] [PASSED] Writeback
[06:37:38] [PASSED] SPI
[06:37:38] [PASSED] USB
[06:37:38] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[06:37:38] =============== [PASSED] drmm_connector_init ===============
[06:37:38] ========= drm_connector_dynamic_init (6 subtests) ==========
[06:37:38] [PASSED] drm_test_drm_connector_dynamic_init
[06:37:38] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[06:37:38] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[06:37:38] [PASSED] drm_test_drm_connector_dynamic_init_properties
[06:37:38] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[06:37:38] [PASSED] Unknown
[06:37:38] [PASSED] VGA
[06:37:38] [PASSED] DVI-I
[06:37:38] [PASSED] DVI-D
[06:37:38] [PASSED] DVI-A
[06:37:38] [PASSED] Composite
[06:37:38] [PASSED] SVIDEO
[06:37:38] [PASSED] LVDS
[06:37:38] [PASSED] Component
[06:37:38] [PASSED] DIN
[06:37:38] [PASSED] DP
[06:37:38] [PASSED] HDMI-A
[06:37:38] [PASSED] HDMI-B
[06:37:38] [PASSED] TV
[06:37:38] [PASSED] eDP
[06:37:38] [PASSED] Virtual
[06:37:38] [PASSED] DSI
[06:37:38] [PASSED] DPI
[06:37:38] [PASSED] Writeback
[06:37:38] [PASSED] SPI
[06:37:38] [PASSED] USB
[06:37:38] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[06:37:38] ======== drm_test_drm_connector_dynamic_init_name  =========
[06:37:38] [PASSED] Unknown
[06:37:38] [PASSED] VGA
[06:37:38] [PASSED] DVI-I
[06:37:38] [PASSED] DVI-D
[06:37:38] [PASSED] DVI-A
[06:37:38] [PASSED] Composite
[06:37:38] [PASSED] SVIDEO
[06:37:38] [PASSED] LVDS
[06:37:38] [PASSED] Component
[06:37:38] [PASSED] DIN
[06:37:38] [PASSED] DP
[06:37:38] [PASSED] HDMI-A
[06:37:38] [PASSED] HDMI-B
[06:37:38] [PASSED] TV
[06:37:38] [PASSED] eDP
[06:37:38] [PASSED] Virtual
[06:37:38] [PASSED] DSI
[06:37:38] [PASSED] DPI
[06:37:38] [PASSED] Writeback
[06:37:38] [PASSED] SPI
[06:37:38] [PASSED] USB
[06:37:38] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[06:37:38] =========== [PASSED] drm_connector_dynamic_init ============
[06:37:38] ==== drm_connector_dynamic_register_early (4 subtests) =====
[06:37:38] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[06:37:38] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[06:37:38] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[06:37:38] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[06:37:38] ====== [PASSED] drm_connector_dynamic_register_early =======
[06:37:38] ======= drm_connector_dynamic_register (7 subtests) ========
[06:37:38] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[06:37:38] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[06:37:38] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[06:37:38] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[06:37:38] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[06:37:38] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[06:37:38] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[06:37:38] ========= [PASSED] drm_connector_dynamic_register ==========
[06:37:38] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[06:37:38] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[06:37:38] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[06:37:38] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[06:37:38] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[06:37:38] ========== drm_test_get_tv_mode_from_name_valid  ===========
[06:37:38] [PASSED] NTSC
[06:37:38] [PASSED] NTSC-443
[06:37:38] [PASSED] NTSC-J
[06:37:38] [PASSED] PAL
[06:37:38] [PASSED] PAL-M
[06:37:38] [PASSED] PAL-N
[06:37:38] [PASSED] SECAM
[06:37:38] [PASSED] Mono
[06:37:38] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[06:37:38] [PASSED] drm_test_get_tv_mode_from_name_truncated
[06:37:38] ============ [PASSED] drm_get_tv_mode_from_name ============
[06:37:38] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[06:37:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[06:37:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[06:37:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[06:37:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[06:37:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[06:37:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[06:37:38] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[06:37:38] [PASSED] VIC 96
[06:37:38] [PASSED] VIC 97
[06:37:38] [PASSED] VIC 101
[06:37:38] [PASSED] VIC 102
[06:37:38] [PASSED] VIC 106
[06:37:38] [PASSED] VIC 107
[06:37:38] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[06:37:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[06:37:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[06:37:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[06:37:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[06:37:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[06:37:38] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[06:37:38] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[06:37:38] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[06:37:38] [PASSED] Automatic
[06:37:38] [PASSED] Full
[06:37:38] [PASSED] Limited 16:235
[06:37:38] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[06:37:38] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[06:37:38] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[06:37:38] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[06:37:38] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[06:37:38] [PASSED] RGB
[06:37:38] [PASSED] YUV 4:2:0
[06:37:38] [PASSED] YUV 4:2:2
[06:37:38] [PASSED] YUV 4:4:4
[06:37:38] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[06:37:38] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[06:37:38] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[06:37:38] ============= drm_damage_helper (21 subtests) ==============
[06:37:38] [PASSED] drm_test_damage_iter_no_damage
[06:37:38] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[06:37:38] [PASSED] drm_test_damage_iter_no_damage_src_moved
[06:37:38] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[06:37:38] [PASSED] drm_test_damage_iter_no_damage_not_visible
[06:37:38] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[06:37:38] [PASSED] drm_test_damage_iter_no_damage_no_fb
[06:37:38] [PASSED] drm_test_damage_iter_simple_damage
[06:37:38] [PASSED] drm_test_damage_iter_single_damage
[06:37:38] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[06:37:38] [PASSED] drm_test_damage_iter_single_damage_outside_src
[06:37:38] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[06:37:38] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[06:37:38] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[06:37:38] [PASSED] drm_test_damage_iter_single_damage_src_moved
[06:37:38] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[06:37:38] [PASSED] drm_test_damage_iter_damage
[06:37:38] [PASSED] drm_test_damage_iter_damage_one_intersect
[06:37:38] [PASSED] drm_test_damage_iter_damage_one_outside
[06:37:38] [PASSED] drm_test_damage_iter_damage_src_moved
[06:37:38] [PASSED] drm_test_damage_iter_damage_not_visible
[06:37:38] ================ [PASSED] drm_damage_helper ================
[06:37:38] ============== drm_dp_mst_helper (3 subtests) ==============
[06:37:38] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[06:37:38] [PASSED] Clock 154000 BPP 30 DSC disabled
[06:37:38] [PASSED] Clock 234000 BPP 30 DSC disabled
[06:37:38] [PASSED] Clock 297000 BPP 24 DSC disabled
[06:37:38] [PASSED] Clock 332880 BPP 24 DSC enabled
[06:37:38] [PASSED] Clock 324540 BPP 24 DSC enabled
[06:37:38] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[06:37:38] ============== drm_test_dp_mst_calc_pbn_div  ===============
[06:37:38] [PASSED] Link rate 2000000 lane count 4
[06:37:38] [PASSED] Link rate 2000000 lane count 2
[06:37:38] [PASSED] Link rate 2000000 lane count 1
[06:37:38] [PASSED] Link rate 1350000 lane count 4
[06:37:38] [PASSED] Link rate 1350000 lane count 2
[06:37:38] [PASSED] Link rate 1350000 lane count 1
[06:37:38] [PASSED] Link rate 1000000 lane count 4
[06:37:38] [PASSED] Link rate 1000000 lane count 2
[06:37:38] [PASSED] Link rate 1000000 lane count 1
[06:37:38] [PASSED] Link rate 810000 lane count 4
[06:37:38] [PASSED] Link rate 810000 lane count 2
[06:37:38] [PASSED] Link rate 810000 lane count 1
[06:37:38] [PASSED] Link rate 540000 lane count 4
[06:37:38] [PASSED] Link rate 540000 lane count 2
[06:37:38] [PASSED] Link rate 540000 lane count 1
[06:37:38] [PASSED] Link rate 270000 lane count 4
[06:37:38] [PASSED] Link rate 270000 lane count 2
[06:37:38] [PASSED] Link rate 270000 lane count 1
[06:37:38] [PASSED] Link rate 162000 lane count 4
[06:37:38] [PASSED] Link rate 162000 lane count 2
[06:37:38] [PASSED] Link rate 162000 lane count 1
[06:37:38] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[06:37:38] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[06:37:38] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[06:37:38] [PASSED] DP_POWER_UP_PHY with port number
[06:37:38] [PASSED] DP_POWER_DOWN_PHY with port number
[06:37:38] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[06:37:38] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[06:37:38] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[06:37:38] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[06:37:38] [PASSED] DP_QUERY_PAYLOAD with port number
[06:37:38] [PASSED] DP_QUERY_PAYLOAD with VCPI
[06:37:38] [PASSED] DP_REMOTE_DPCD_READ with port number
[06:37:38] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[06:37:38] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[06:37:38] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[06:37:38] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[06:37:38] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[06:37:38] [PASSED] DP_REMOTE_I2C_READ with port number
[06:37:38] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[06:37:38] [PASSED] DP_REMOTE_I2C_READ with transactions array
[06:37:38] [PASSED] DP_REMOTE_I2C_WRITE with port number
[06:37:38] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[06:37:38] [PASSED] DP_REMOTE_I2C_WRITE with data array
[06:37:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[06:37:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[06:37:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[06:37:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[06:37:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[06:37:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[06:37:38] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[06:37:38] ================ [PASSED] drm_dp_mst_helper ================
[06:37:38] ================== drm_exec (7 subtests) ===================
[06:37:38] [PASSED] sanitycheck
[06:37:38] [PASSED] test_lock
[06:37:38] [PASSED] test_lock_unlock
[06:37:38] [PASSED] test_duplicates
[06:37:38] [PASSED] test_prepare
[06:37:38] [PASSED] test_prepare_array
[06:37:38] [PASSED] test_multiple_loops
[06:37:38] ==================== [PASSED] drm_exec =====================
[06:37:38] =========== drm_format_helper_test (17 subtests) ===========
[06:37:38] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[06:37:38] [PASSED] single_pixel_source_buffer
[06:37:38] [PASSED] single_pixel_clip_rectangle
[06:37:38] [PASSED] well_known_colors
[06:37:38] [PASSED] destination_pitch
[06:37:38] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[06:37:38] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[06:37:38] [PASSED] single_pixel_source_buffer
[06:37:38] [PASSED] single_pixel_clip_rectangle
[06:37:38] [PASSED] well_known_colors
[06:37:38] [PASSED] destination_pitch
[06:37:38] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[06:37:38] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[06:37:38] [PASSED] single_pixel_source_buffer
[06:37:38] [PASSED] single_pixel_clip_rectangle
[06:37:38] [PASSED] well_known_colors
[06:37:38] [PASSED] destination_pitch
[06:37:38] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[06:37:38] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[06:37:38] [PASSED] single_pixel_source_buffer
[06:37:38] [PASSED] single_pixel_clip_rectangle
[06:37:38] [PASSED] well_known_colors
[06:37:38] [PASSED] destination_pitch
[06:37:38] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[06:37:38] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[06:37:38] [PASSED] single_pixel_source_buffer
[06:37:38] [PASSED] single_pixel_clip_rectangle
[06:37:38] [PASSED] well_known_colors
[06:37:38] [PASSED] destination_pitch
[06:37:38] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[06:37:38] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[06:37:38] [PASSED] single_pixel_source_buffer
[06:37:38] [PASSED] single_pixel_clip_rectangle
[06:37:38] [PASSED] well_known_colors
[06:37:38] [PASSED] destination_pitch
[06:37:38] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[06:37:38] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[06:37:38] [PASSED] single_pixel_source_buffer
[06:37:38] [PASSED] single_pixel_clip_rectangle
[06:37:38] [PASSED] well_known_colors
[06:37:38] [PASSED] destination_pitch
[06:37:38] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[06:37:38] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[06:37:38] [PASSED] single_pixel_source_buffer
[06:37:38] [PASSED] single_pixel_clip_rectangle
[06:37:38] [PASSED] well_known_colors
[06:37:38] [PASSED] destination_pitch
[06:37:38] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[06:37:38] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[06:37:38] [PASSED] single_pixel_source_buffer
[06:37:38] [PASSED] single_pixel_clip_rectangle
[06:37:38] [PASSED] well_known_colors
[06:37:38] [PASSED] destination_pitch
[06:37:38] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[06:37:38] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[06:37:38] [PASSED] single_pixel_source_buffer
[06:37:38] [PASSED] single_pixel_clip_rectangle
[06:37:38] [PASSED] well_known_colors
[06:37:38] [PASSED] destination_pitch
[06:37:38] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[06:37:38] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[06:37:38] [PASSED] single_pixel_source_buffer
[06:37:38] [PASSED] single_pixel_clip_rectangle
[06:37:38] [PASSED] well_known_colors
[06:37:38] [PASSED] destination_pitch
[06:37:38] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[06:37:38] ============== drm_test_fb_xrgb8888_to_mono  ===============
[06:37:38] [PASSED] single_pixel_source_buffer
[06:37:38] [PASSED] single_pixel_clip_rectangle
[06:37:38] [PASSED] well_known_colors
[06:37:38] [PASSED] destination_pitch
[06:37:38] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[06:37:38] ==================== drm_test_fb_swab  =====================
[06:37:38] [PASSED] single_pixel_source_buffer
[06:37:38] [PASSED] single_pixel_clip_rectangle
[06:37:38] [PASSED] well_known_colors
[06:37:38] [PASSED] destination_pitch
[06:37:38] ================ [PASSED] drm_test_fb_swab =================
[06:37:38] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[06:37:38] [PASSED] single_pixel_source_buffer
[06:37:38] [PASSED] single_pixel_clip_rectangle
[06:37:38] [PASSED] well_known_colors
[06:37:38] [PASSED] destination_pitch
[06:37:38] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[06:37:38] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[06:37:38] [PASSED] single_pixel_source_buffer
[06:37:38] [PASSED] single_pixel_clip_rectangle
[06:37:38] [PASSED] well_known_colors
[06:37:38] [PASSED] destination_pitch
[06:37:38] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[06:37:38] ================= drm_test_fb_clip_offset  =================
[06:37:38] [PASSED] pass through
[06:37:38] [PASSED] horizontal offset
[06:37:38] [PASSED] vertical offset
[06:37:38] [PASSED] horizontal and vertical offset
[06:37:38] [PASSED] horizontal offset (custom pitch)
[06:37:38] [PASSED] vertical offset (custom pitch)
[06:37:38] [PASSED] horizontal and vertical offset (custom pitch)
[06:37:38] ============= [PASSED] drm_test_fb_clip_offset =============
[06:37:38] =================== drm_test_fb_memcpy  ====================
[06:37:38] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[06:37:38] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[06:37:38] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[06:37:38] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[06:37:38] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[06:37:38] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[06:37:38] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[06:37:38] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[06:37:38] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[06:37:38] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[06:37:38] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[06:37:38] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[06:37:38] =============== [PASSED] drm_test_fb_memcpy ================
[06:37:38] ============= [PASSED] drm_format_helper_test ==============
[06:37:38] ================= drm_format (18 subtests) =================
[06:37:38] [PASSED] drm_test_format_block_width_invalid
[06:37:38] [PASSED] drm_test_format_block_width_one_plane
[06:37:38] [PASSED] drm_test_format_block_width_two_plane
[06:37:38] [PASSED] drm_test_format_block_width_three_plane
[06:37:38] [PASSED] drm_test_format_block_width_tiled
[06:37:38] [PASSED] drm_test_format_block_height_invalid
[06:37:38] [PASSED] drm_test_format_block_height_one_plane
[06:37:38] [PASSED] drm_test_format_block_height_two_plane
[06:37:38] [PASSED] drm_test_format_block_height_three_plane
[06:37:38] [PASSED] drm_test_format_block_height_tiled
[06:37:38] [PASSED] drm_test_format_min_pitch_invalid
[06:37:38] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[06:37:38] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[06:37:38] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[06:37:38] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[06:37:38] [PASSED] drm_test_format_min_pitch_two_plane
[06:37:38] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[06:37:38] [PASSED] drm_test_format_min_pitch_tiled
[06:37:38] =================== [PASSED] drm_format ====================
[06:37:38] ============== drm_framebuffer (10 subtests) ===============
[06:37:38] ========== drm_test_framebuffer_check_src_coords  ==========
[06:37:38] [PASSED] Success: source fits into fb
[06:37:38] [PASSED] Fail: overflowing fb with x-axis coordinate
[06:37:38] [PASSED] Fail: overflowing fb with y-axis coordinate
[06:37:38] [PASSED] Fail: overflowing fb with source width
[06:37:38] [PASSED] Fail: overflowing fb with source height
[06:37:38] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[06:37:38] [PASSED] drm_test_framebuffer_cleanup
[06:37:38] =============== drm_test_framebuffer_create  ===============
[06:37:38] [PASSED] ABGR8888 normal sizes
[06:37:38] [PASSED] ABGR8888 max sizes
[06:37:38] [PASSED] ABGR8888 pitch greater than min required
[06:37:38] [PASSED] ABGR8888 pitch less than min required
[06:37:38] [PASSED] ABGR8888 Invalid width
[06:37:38] [PASSED] ABGR8888 Invalid buffer handle
[06:37:38] [PASSED] No pixel format
[06:37:38] [PASSED] ABGR8888 Width 0
[06:37:38] [PASSED] ABGR8888 Height 0
[06:37:38] [PASSED] ABGR8888 Out of bound height * pitch combination
[06:37:38] [PASSED] ABGR8888 Large buffer offset
[06:37:38] [PASSED] ABGR8888 Buffer offset for inexistent plane
[06:37:38] [PASSED] ABGR8888 Invalid flag
[06:37:38] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[06:37:38] [PASSED] ABGR8888 Valid buffer modifier
[06:37:38] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[06:37:38] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[06:37:38] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[06:37:38] [PASSED] NV12 Normal sizes
[06:37:38] [PASSED] NV12 Max sizes
[06:37:38] [PASSED] NV12 Invalid pitch
[06:37:38] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[06:37:38] [PASSED] NV12 different  modifier per-plane
[06:37:38] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[06:37:38] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[06:37:38] [PASSED] NV12 Modifier for inexistent plane
[06:37:38] [PASSED] NV12 Handle for inexistent plane
[06:37:38] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[06:37:38] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[06:37:38] [PASSED] YVU420 Normal sizes
[06:37:38] [PASSED] YVU420 Max sizes
[06:37:38] [PASSED] YVU420 Invalid pitch
[06:37:38] [PASSED] YVU420 Different pitches
[06:37:38] [PASSED] YVU420 Different buffer offsets/pitches
[06:37:38] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[06:37:38] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[06:37:38] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[06:37:38] [PASSED] YVU420 Valid modifier
[06:37:38] [PASSED] YVU420 Different modifiers per plane
[06:37:38] [PASSED] YVU420 Modifier for inexistent plane
[06:37:38] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[06:37:38] [PASSED] X0L2 Normal sizes
[06:37:38] [PASSED] X0L2 Max sizes
[06:37:38] [PASSED] X0L2 Invalid pitch
[06:37:38] [PASSED] X0L2 Pitch greater than minimum required
[06:37:38] [PASSED] X0L2 Handle for inexistent plane
[06:37:38] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[06:37:38] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[06:37:38] [PASSED] X0L2 Valid modifier
[06:37:38] [PASSED] X0L2 Modifier for inexistent plane
[06:37:38] =========== [PASSED] drm_test_framebuffer_create ===========
[06:37:38] [PASSED] drm_test_framebuffer_free
[06:37:38] [PASSED] drm_test_framebuffer_init
[06:37:38] [PASSED] drm_test_framebuffer_init_bad_format
[06:37:38] [PASSED] drm_test_framebuffer_init_dev_mismatch
[06:37:38] [PASSED] drm_test_framebuffer_lookup
[06:37:38] [PASSED] drm_test_framebuffer_lookup_inexistent
[06:37:38] [PASSED] drm_test_framebuffer_modifiers_not_supported
[06:37:38] ================= [PASSED] drm_framebuffer =================
[06:37:38] ================ drm_gem_shmem (8 subtests) ================
[06:37:38] [PASSED] drm_gem_shmem_test_obj_create
[06:37:38] [PASSED] drm_gem_shmem_test_obj_create_private
[06:37:38] [PASSED] drm_gem_shmem_test_pin_pages
[06:37:38] [PASSED] drm_gem_shmem_test_vmap
[06:37:38] [PASSED] drm_gem_shmem_test_get_sg_table
[06:37:38] [PASSED] drm_gem_shmem_test_get_pages_sgt
[06:37:38] [PASSED] drm_gem_shmem_test_madvise
[06:37:38] [PASSED] drm_gem_shmem_test_purge
[06:37:38] ================== [PASSED] drm_gem_shmem ==================
[06:37:38] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[06:37:38] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[06:37:38] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[06:37:38] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[06:37:38] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[06:37:38] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[06:37:38] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[06:37:38] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[06:37:38] [PASSED] Automatic
[06:37:38] [PASSED] Full
[06:37:38] [PASSED] Limited 16:235
[06:37:38] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[06:37:38] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[06:37:38] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[06:37:38] [PASSED] drm_test_check_disable_connector
[06:37:38] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[06:37:38] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[06:37:38] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[06:37:38] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[06:37:38] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[06:37:38] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[06:37:38] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[06:37:38] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[06:37:38] [PASSED] drm_test_check_output_bpc_dvi
[06:37:38] [PASSED] drm_test_check_output_bpc_format_vic_1
[06:37:38] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[06:37:38] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[06:37:38] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[06:37:38] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[06:37:38] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[06:37:38] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[06:37:38] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[06:37:38] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[06:37:38] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[06:37:38] [PASSED] drm_test_check_broadcast_rgb_value
[06:37:38] [PASSED] drm_test_check_bpc_8_value
[06:37:38] [PASSED] drm_test_check_bpc_10_value
[06:37:38] [PASSED] drm_test_check_bpc_12_value
[06:37:38] [PASSED] drm_test_check_format_value
[06:37:38] [PASSED] drm_test_check_tmds_char_value
[06:37:38] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[06:37:38] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[06:37:38] [PASSED] drm_test_check_mode_valid
[06:37:38] [PASSED] drm_test_check_mode_valid_reject
[06:37:38] [PASSED] drm_test_check_mode_valid_reject_rate
[06:37:38] [PASSED] drm_test_check_mode_valid_reject_max_clock
[06:37:38] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[06:37:38] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[06:37:38] [PASSED] drm_test_check_infoframes
[06:37:38] [PASSED] drm_test_check_reject_avi_infoframe
[06:37:38] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[06:37:38] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[06:37:38] [PASSED] drm_test_check_reject_audio_infoframe
[06:37:38] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[06:37:38] ================= drm_managed (2 subtests) =================
[06:37:38] [PASSED] drm_test_managed_release_action
[06:37:38] [PASSED] drm_test_managed_run_action
[06:37:38] =================== [PASSED] drm_managed ===================
[06:37:38] =================== drm_mm (6 subtests) ====================
[06:37:38] [PASSED] drm_test_mm_init
[06:37:38] [PASSED] drm_test_mm_debug
[06:37:38] [PASSED] drm_test_mm_align32
[06:37:38] [PASSED] drm_test_mm_align64
[06:37:38] [PASSED] drm_test_mm_lowest
[06:37:38] [PASSED] drm_test_mm_highest
[06:37:38] ===================== [PASSED] drm_mm ======================
[06:37:38] ============= drm_modes_analog_tv (5 subtests) =============
[06:37:38] [PASSED] drm_test_modes_analog_tv_mono_576i
[06:37:38] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[06:37:38] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[06:37:38] [PASSED] drm_test_modes_analog_tv_pal_576i
[06:37:38] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[06:37:38] =============== [PASSED] drm_modes_analog_tv ===============
[06:37:38] ============== drm_plane_helper (2 subtests) ===============
[06:37:38] =============== drm_test_check_plane_state  ================
[06:37:38] [PASSED] clipping_simple
[06:37:38] [PASSED] clipping_rotate_reflect
[06:37:38] [PASSED] positioning_simple
[06:37:38] [PASSED] upscaling
[06:37:38] [PASSED] downscaling
[06:37:38] [PASSED] rounding1
[06:37:38] [PASSED] rounding2
[06:37:38] [PASSED] rounding3
[06:37:38] [PASSED] rounding4
[06:37:38] =========== [PASSED] drm_test_check_plane_state ============
[06:37:38] =========== drm_test_check_invalid_plane_state  ============
[06:37:38] [PASSED] positioning_invalid
[06:37:38] [PASSED] upscaling_invalid
[06:37:38] [PASSED] downscaling_invalid
[06:37:38] ======= [PASSED] drm_test_check_invalid_plane_state ========
[06:37:38] ================ [PASSED] drm_plane_helper =================
[06:37:38] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[06:37:38] ====== drm_test_connector_helper_tv_get_modes_check  =======
[06:37:38] [PASSED] None
[06:37:38] [PASSED] PAL
[06:37:38] [PASSED] NTSC
[06:37:38] [PASSED] Both, NTSC Default
[06:37:38] [PASSED] Both, PAL Default
[06:37:38] [PASSED] Both, NTSC Default, with PAL on command-line
[06:37:38] [PASSED] Both, PAL Default, with NTSC on command-line
[06:37:38] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[06:37:38] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[06:37:38] ================== drm_rect (9 subtests) ===================
[06:37:38] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[06:37:38] [PASSED] drm_test_rect_clip_scaled_not_clipped
[06:37:38] [PASSED] drm_test_rect_clip_scaled_clipped
[06:37:38] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[06:37:38] ================= drm_test_rect_intersect  =================
[06:37:38] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[06:37:38] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[06:37:38] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[06:37:38] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[06:37:38] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[06:37:38] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[06:37:38] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[06:37:38] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[06:37:38] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[06:37:38] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[06:37:38] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[06:37:38] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[06:37:38] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[06:37:38] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[06:37:38] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[06:37:38] ============= [PASSED] drm_test_rect_intersect =============
[06:37:38] ================ drm_test_rect_calc_hscale  ================
[06:37:38] [PASSED] normal use
[06:37:38] [PASSED] out of max range
[06:37:38] [PASSED] out of min range
[06:37:38] [PASSED] zero dst
[06:37:38] [PASSED] negative src
[06:37:38] [PASSED] negative dst
[06:37:38] ============ [PASSED] drm_test_rect_calc_hscale ============
[06:37:38] ================ drm_test_rect_calc_vscale  ================
[06:37:38] [PASSED] normal use
[06:37:38] [PASSED] out of max range
[06:37:38] [PASSED] out of min range
[06:37:38] [PASSED] zero dst
[06:37:38] [PASSED] negative src
[06:37:38] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[06:37:38] ============ [PASSED] drm_test_rect_calc_vscale ============
[06:37:38] ================== drm_test_rect_rotate  ===================
[06:37:38] [PASSED] reflect-x
[06:37:38] [PASSED] reflect-y
[06:37:38] [PASSED] rotate-0
[06:37:38] [PASSED] rotate-90
[06:37:38] [PASSED] rotate-180
[06:37:38] [PASSED] rotate-270
[06:37:38] ============== [PASSED] drm_test_rect_rotate ===============
[06:37:38] ================ drm_test_rect_rotate_inv  =================
[06:37:38] [PASSED] reflect-x
[06:37:38] [PASSED] reflect-y
[06:37:38] [PASSED] rotate-0
[06:37:38] [PASSED] rotate-90
[06:37:38] [PASSED] rotate-180
[06:37:38] [PASSED] rotate-270
[06:37:38] ============ [PASSED] drm_test_rect_rotate_inv =============
[06:37:38] ==================== [PASSED] drm_rect =====================
[06:37:38] ============ drm_sysfb_modeset_test (1 subtest) ============
[06:37:38] ============ drm_test_sysfb_build_fourcc_list  =============
[06:37:38] [PASSED] no native formats
[06:37:38] [PASSED] XRGB8888 as native format
[06:37:38] [PASSED] remove duplicates
[06:37:38] [PASSED] convert alpha formats
[06:37:38] [PASSED] random formats
[06:37:38] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[06:37:38] ============= [PASSED] drm_sysfb_modeset_test ==============
[06:37:38] ================== drm_fixp (2 subtests) ===================
[06:37:38] [PASSED] drm_test_int2fixp
[06:37:38] [PASSED] drm_test_sm2fixp
[06:37:38] ==================== [PASSED] drm_fixp =====================
[06:37:38] ============================================================
[06:37:38] Testing complete. Ran 621 tests: passed: 621
[06:37:38] Elapsed time: 25.888s total, 1.663s configuring, 24.056s building, 0.168s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[06:37:38] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[06:37:40] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[06:37:49] Starting KUnit Kernel (1/1)...
[06:37:49] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[06:37:50] ================= ttm_device (5 subtests) ==================
[06:37:50] [PASSED] ttm_device_init_basic
[06:37:50] [PASSED] ttm_device_init_multiple
[06:37:50] [PASSED] ttm_device_fini_basic
[06:37:50] [PASSED] ttm_device_init_no_vma_man
[06:37:50] ================== ttm_device_init_pools  ==================
[06:37:50] [PASSED] No DMA allocations, no DMA32 required
[06:37:50] [PASSED] DMA allocations, DMA32 required
[06:37:50] [PASSED] No DMA allocations, DMA32 required
[06:37:50] [PASSED] DMA allocations, no DMA32 required
[06:37:50] ============== [PASSED] ttm_device_init_pools ==============
[06:37:50] =================== [PASSED] ttm_device ====================
[06:37:50] ================== ttm_pool (8 subtests) ===================
[06:37:50] ================== ttm_pool_alloc_basic  ===================
[06:37:50] [PASSED] One page
[06:37:50] [PASSED] More than one page
[06:37:50] [PASSED] Above the allocation limit
[06:37:50] [PASSED] One page, with coherent DMA mappings enabled
[06:37:50] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[06:37:50] ============== [PASSED] ttm_pool_alloc_basic ===============
[06:37:50] ============== ttm_pool_alloc_basic_dma_addr  ==============
[06:37:50] [PASSED] One page
[06:37:50] [PASSED] More than one page
[06:37:50] [PASSED] Above the allocation limit
[06:37:50] [PASSED] One page, with coherent DMA mappings enabled
[06:37:50] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[06:37:50] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[06:37:50] [PASSED] ttm_pool_alloc_order_caching_match
[06:37:50] [PASSED] ttm_pool_alloc_caching_mismatch
[06:37:50] [PASSED] ttm_pool_alloc_order_mismatch
[06:37:50] [PASSED] ttm_pool_free_dma_alloc
[06:37:50] [PASSED] ttm_pool_free_no_dma_alloc
[06:37:50] [PASSED] ttm_pool_fini_basic
[06:37:50] ==================== [PASSED] ttm_pool =====================
[06:37:50] ================ ttm_resource (8 subtests) =================
[06:37:50] ================= ttm_resource_init_basic  =================
[06:37:50] [PASSED] Init resource in TTM_PL_SYSTEM
[06:37:50] [PASSED] Init resource in TTM_PL_VRAM
[06:37:50] [PASSED] Init resource in a private placement
[06:37:50] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[06:37:50] ============= [PASSED] ttm_resource_init_basic =============
[06:37:50] [PASSED] ttm_resource_init_pinned
[06:37:50] [PASSED] ttm_resource_fini_basic
[06:37:50] [PASSED] ttm_resource_manager_init_basic
[06:37:50] [PASSED] ttm_resource_manager_usage_basic
[06:37:50] [PASSED] ttm_resource_manager_set_used_basic
[06:37:50] [PASSED] ttm_sys_man_alloc_basic
[06:37:50] [PASSED] ttm_sys_man_free_basic
[06:37:50] ================== [PASSED] ttm_resource ===================
[06:37:50] =================== ttm_tt (15 subtests) ===================
[06:37:50] ==================== ttm_tt_init_basic  ====================
[06:37:50] [PASSED] Page-aligned size
[06:37:50] [PASSED] Extra pages requested
[06:37:50] ================ [PASSED] ttm_tt_init_basic ================
[06:37:50] [PASSED] ttm_tt_init_misaligned
[06:37:50] [PASSED] ttm_tt_fini_basic
[06:37:50] [PASSED] ttm_tt_fini_sg
[06:37:50] [PASSED] ttm_tt_fini_shmem
[06:37:50] [PASSED] ttm_tt_create_basic
[06:37:50] [PASSED] ttm_tt_create_invalid_bo_type
[06:37:50] [PASSED] ttm_tt_create_ttm_exists
[06:37:50] [PASSED] ttm_tt_create_failed
[06:37:50] [PASSED] ttm_tt_destroy_basic
[06:37:50] [PASSED] ttm_tt_populate_null_ttm
[06:37:50] [PASSED] ttm_tt_populate_populated_ttm
[06:37:50] [PASSED] ttm_tt_unpopulate_basic
[06:37:50] [PASSED] ttm_tt_unpopulate_empty_ttm
[06:37:50] [PASSED] ttm_tt_swapin_basic
[06:37:50] ===================== [PASSED] ttm_tt ======================
[06:37:50] =================== ttm_bo (14 subtests) ===================
[06:37:50] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[06:37:50] [PASSED] Cannot be interrupted and sleeps
[06:37:50] [PASSED] Cannot be interrupted, locks straight away
[06:37:50] [PASSED] Can be interrupted, sleeps
[06:37:50] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[06:37:50] [PASSED] ttm_bo_reserve_locked_no_sleep
[06:37:50] [PASSED] ttm_bo_reserve_no_wait_ticket
[06:37:50] [PASSED] ttm_bo_reserve_double_resv
[06:37:50] [PASSED] ttm_bo_reserve_interrupted
[06:37:50] [PASSED] ttm_bo_reserve_deadlock
[06:37:50] [PASSED] ttm_bo_unreserve_basic
[06:37:50] [PASSED] ttm_bo_unreserve_pinned
[06:37:50] [PASSED] ttm_bo_unreserve_bulk
[06:37:50] [PASSED] ttm_bo_fini_basic
[06:37:50] [PASSED] ttm_bo_fini_shared_resv
[06:37:50] [PASSED] ttm_bo_pin_basic
[06:37:50] [PASSED] ttm_bo_pin_unpin_resource
[06:37:50] [PASSED] ttm_bo_multiple_pin_one_unpin
[06:37:50] ===================== [PASSED] ttm_bo ======================
[06:37:50] ============== ttm_bo_validate (21 subtests) ===============
[06:37:50] ============== ttm_bo_init_reserved_sys_man  ===============
[06:37:50] [PASSED] Buffer object for userspace
[06:37:50] [PASSED] Kernel buffer object
[06:37:50] [PASSED] Shared buffer object
[06:37:50] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[06:37:50] ============== ttm_bo_init_reserved_mock_man  ==============
[06:37:50] [PASSED] Buffer object for userspace
[06:37:50] [PASSED] Kernel buffer object
[06:37:50] [PASSED] Shared buffer object
[06:37:50] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[06:37:50] [PASSED] ttm_bo_init_reserved_resv
[06:37:50] ================== ttm_bo_validate_basic  ==================
[06:37:50] [PASSED] Buffer object for userspace
[06:37:50] [PASSED] Kernel buffer object
[06:37:50] [PASSED] Shared buffer object
[06:37:50] ============== [PASSED] ttm_bo_validate_basic ==============
[06:37:50] [PASSED] ttm_bo_validate_invalid_placement
[06:37:50] ============= ttm_bo_validate_same_placement  ==============
[06:37:50] [PASSED] System manager
[06:37:50] [PASSED] VRAM manager
[06:37:50] ========= [PASSED] ttm_bo_validate_same_placement ==========
[06:37:50] [PASSED] ttm_bo_validate_failed_alloc
[06:37:50] [PASSED] ttm_bo_validate_pinned
[06:37:50] [PASSED] ttm_bo_validate_busy_placement
[06:37:50] ================ ttm_bo_validate_multihop  =================
[06:37:50] [PASSED] Buffer object for userspace
[06:37:50] [PASSED] Kernel buffer object
[06:37:50] [PASSED] Shared buffer object
[06:37:50] ============ [PASSED] ttm_bo_validate_multihop =============
[06:37:50] ========== ttm_bo_validate_no_placement_signaled  ==========
[06:37:50] [PASSED] Buffer object in system domain, no page vector
[06:37:50] [PASSED] Buffer object in system domain with an existing page vector
[06:37:50] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[06:37:50] ======== ttm_bo_validate_no_placement_not_signaled  ========
[06:37:50] [PASSED] Buffer object for userspace
[06:37:50] [PASSED] Kernel buffer object
[06:37:50] [PASSED] Shared buffer object
[06:37:50] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[06:37:50] [PASSED] ttm_bo_validate_move_fence_signaled
[06:37:50] ========= ttm_bo_validate_move_fence_not_signaled  =========
[06:37:50] [PASSED] Waits for GPU
[06:37:50] [PASSED] Tries to lock straight away
[06:37:50] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[06:37:50] [PASSED] ttm_bo_validate_happy_evict
[06:37:50] [PASSED] ttm_bo_validate_all_pinned_evict
[06:37:50] [PASSED] ttm_bo_validate_allowed_only_evict
[06:37:50] [PASSED] ttm_bo_validate_deleted_evict
[06:37:50] [PASSED] ttm_bo_validate_busy_domain_evict
[06:37:50] [PASSED] ttm_bo_validate_evict_gutting
[06:37:50] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[06:37:50] ================= [PASSED] ttm_bo_validate =================
[06:37:50] ============================================================
[06:37:50] Testing complete. Ran 101 tests: passed: 101
[06:37:50] Elapsed time: 11.228s total, 1.688s configuring, 9.324s building, 0.179s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for drm/i915/dmc: Update PIPEDMC interrupt mask (rev2)

[Patchwork]

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== Series Details ==

Series: drm/i915/dmc: Update PIPEDMC interrupt mask (rev2)
URL   : https://patchwork.freedesktop.org/series/162933/
State : success

== Summary ==

CI Bug Log - changes from xe-4695-e2ad8f051843c953c01f8609c8b392abc2bd5c82_BAT -> xe-pw-162933v2_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (13 -> 13)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * Linux: xe-4695-e2ad8f051843c953c01f8609c8b392abc2bd5c82 -> xe-pw-162933v2

  IGT_8792: 8792
  xe-4695-e2ad8f051843c953c01f8609c8b392abc2bd5c82: e2ad8f051843c953c01f8609c8b392abc2bd5c82
  xe-pw-162933v2: 162933v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/index.html

[-- Attachment #2: Type: text/html, Size: 1421 bytes --]

✗ Xe.CI.FULL: failure for drm/i915/dmc: Update PIPEDMC interrupt mask (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 21198 bytes --]

== Series Details ==

Series: drm/i915/dmc: Update PIPEDMC interrupt mask (rev2)
URL   : https://patchwork.freedesktop.org/series/162933/
State : failure

== Summary ==

CI Bug Log - changes from xe-4695-e2ad8f051843c953c01f8609c8b392abc2bd5c82_FULL -> xe-pw-162933v2_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-162933v2_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-162933v2_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-162933v2_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-bmg:          [PASS][1] -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4695-e2ad8f051843c953c01f8609c8b392abc2bd5c82/shard-bmg-1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  
Known issues
------------

  Here are the changes found in xe-pw-162933v2_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-bmg:          NOTRUN -> [SKIP][3] ([Intel XE#1124]) +1 other test skip
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-8/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  * igt@kms_bw@linear-tiling-3-displays-1920x1080p:
    - shard-bmg:          NOTRUN -> [SKIP][4] ([Intel XE#367] / [Intel XE#7354])
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-8/igt@kms_bw@linear-tiling-3-displays-1920x1080p.html

  * igt@kms_ccs@bad-pixel-format-4-tiled-dg2-rc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][5] ([Intel XE#2887]) +6 other tests skip
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-8/igt@kms_ccs@bad-pixel-format-4-tiled-dg2-rc-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc:
    - shard-bmg:          NOTRUN -> [SKIP][6] ([Intel XE#3432])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-9/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc.html

  * igt@kms_chamelium_color@ctm-0-50:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#2325] / [Intel XE#7358])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-9/igt@kms_chamelium_color@ctm-0-50.html

  * igt@kms_chamelium_edid@vga-edid-read:
    - shard-bmg:          NOTRUN -> [SKIP][8] ([Intel XE#2252])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-8/igt@kms_chamelium_edid@vga-edid-read.html

  * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic:
    - shard-bmg:          [PASS][9] -> [SKIP][10] ([Intel XE#2291])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4695-e2ad8f051843c953c01f8609c8b392abc2bd5c82/shard-bmg-3/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-5/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
    - shard-bmg:          [PASS][11] -> [DMESG-WARN][12] ([Intel XE#5354])
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4695-e2ad8f051843c953c01f8609c8b392abc2bd5c82/shard-bmg-2/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-7/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html

  * igt@kms_flip@2x-plain-flip-ts-check:
    - shard-bmg:          [PASS][13] -> [SKIP][14] ([Intel XE#2316])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4695-e2ad8f051843c953c01f8609c8b392abc2bd5c82/shard-bmg-3/igt@kms_flip@2x-plain-flip-ts-check.html
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-5/igt@kms_flip@2x-plain-flip-ts-check.html

  * igt@kms_flip@flip-vs-expired-vblank@b-edp1:
    - shard-lnl:          [PASS][15] -> [FAIL][16] ([Intel XE#301])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4695-e2ad8f051843c953c01f8609c8b392abc2bd5c82/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-bmg:          [PASS][17] -> [INCOMPLETE][18] ([Intel XE#2049] / [Intel XE#2597]) +1 other test incomplete
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4695-e2ad8f051843c953c01f8609c8b392abc2bd5c82/shard-bmg-7/igt@kms_flip@flip-vs-suspend.html
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-9/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#2311]) +5 other tests skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#4141]) +2 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-9/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-argb161616f-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][21] ([Intel XE#7061] / [Intel XE#7356]) +1 other test skip
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-9/igt@kms_frontbuffer_tracking@fbc-argb161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][22] ([Intel XE#2313]) +5 other tests skip
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-9/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_panel_fitting@atomic-fastset:
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#2486])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-9/igt@kms_panel_fitting@atomic-fastset.html

  * igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#7283])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-9/igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier.html

  * igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-sf:
    - shard-bmg:          NOTRUN -> [SKIP][25] ([Intel XE#1489]) +1 other test skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-9/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-sf.html

  * igt@kms_psr2_su@page_flip-nv12:
    - shard-bmg:          NOTRUN -> [SKIP][26] ([Intel XE#2387] / [Intel XE#7429])
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-9/igt@kms_psr2_su@page_flip-nv12.html

  * igt@kms_psr@pr-dpms:
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#2234] / [Intel XE#2850]) +2 other tests skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-9/igt@kms_psr@pr-dpms.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
    - shard-bmg:          NOTRUN -> [SKIP][28] ([Intel XE#3414] / [Intel XE#3904] / [Intel XE#7342])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-9/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html

  * igt@kms_sharpness_filter@invalid-plane-with-filter:
    - shard-bmg:          NOTRUN -> [SKIP][29] ([Intel XE#6503]) +1 other test skip
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-9/igt@kms_sharpness_filter@invalid-plane-with-filter.html

  * igt@kms_vrr@flip-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][30] ([Intel XE#1499]) +1 other test skip
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-8/igt@kms_vrr@flip-suspend.html

  * igt@xe_evict@evict-mixed-many-threads-small:
    - shard-bmg:          [PASS][31] -> [INCOMPLETE][32] ([Intel XE#6321])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4695-e2ad8f051843c953c01f8609c8b392abc2bd5c82/shard-bmg-4/igt@xe_evict@evict-mixed-many-threads-small.html
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-2/igt@xe_evict@evict-mixed-many-threads-small.html

  * igt@xe_evict@evict-threads-small-multi-queue:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#7140])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-9/igt@xe_evict@evict-threads-small-multi-queue.html

  * igt@xe_exec_fault_mode@many-multi-queue-rebind-imm:
    - shard-bmg:          NOTRUN -> [SKIP][34] ([Intel XE#7136]) +3 other tests skip
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-9/igt@xe_exec_fault_mode@many-multi-queue-rebind-imm.html

  * igt@xe_exec_multi_queue@one-queue-preempt-mode-fault-userptr-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][35] ([Intel XE#6874]) +4 other tests skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-9/igt@xe_exec_multi_queue@one-queue-preempt-mode-fault-userptr-invalidate.html

  * igt@xe_exec_system_allocator@many-large-free-race-nomemset:
    - shard-bmg:          [PASS][36] -> [INCOMPLETE][37] ([Intel XE#2594])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4695-e2ad8f051843c953c01f8609c8b392abc2bd5c82/shard-bmg-10/igt@xe_exec_system_allocator@many-large-free-race-nomemset.html
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-10/igt@xe_exec_system_allocator@many-large-free-race-nomemset.html

  * igt@xe_exec_threads@threads-multi-queue-cm-shared-vm-basic:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#7138]) +1 other test skip
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-8/igt@xe_exec_threads@threads-multi-queue-cm-shared-vm-basic.html

  * igt@xe_multigpu_svm@mgpu-migration-basic:
    - shard-bmg:          NOTRUN -> [SKIP][39] ([Intel XE#6964])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-8/igt@xe_multigpu_svm@mgpu-migration-basic.html

  
#### Possible fixes ####

  * igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic:
    - shard-bmg:          [SKIP][40] ([Intel XE#2291]) -> [PASS][41]
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4695-e2ad8f051843c953c01f8609c8b392abc2bd5c82/shard-bmg-5/igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic.html
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-8/igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic.html

  * igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset:
    - shard-bmg:          [SKIP][42] ([Intel XE#2316]) -> [PASS][43] +1 other test pass
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4695-e2ad8f051843c953c01f8609c8b392abc2bd5c82/shard-bmg-5/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset.html
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-8/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset.html

  * igt@kms_flip@flip-vs-expired-vblank@a-edp1:
    - shard-lnl:          [FAIL][44] ([Intel XE#301]) -> [PASS][45]
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4695-e2ad8f051843c953c01f8609c8b392abc2bd5c82/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html

  * igt@xe_evict@evict-beng-mixed-many-threads-small:
    - shard-bmg:          [INCOMPLETE][46] ([Intel XE#6321]) -> [PASS][47]
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4695-e2ad8f051843c953c01f8609c8b392abc2bd5c82/shard-bmg-7/igt@xe_evict@evict-beng-mixed-many-threads-small.html
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-3/igt@xe_evict@evict-beng-mixed-many-threads-small.html

  
#### Warnings ####

  * igt@kms_content_protection@lic-type-0-hdcp14:
    - shard-bmg:          [FAIL][48] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) -> [SKIP][49] ([Intel XE#7194])
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4695-e2ad8f051843c953c01f8609c8b392abc2bd5c82/shard-bmg-3/igt@kms_content_protection@lic-type-0-hdcp14.html
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-5/igt@kms_content_protection@lic-type-0-hdcp14.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-shrfb-plflip-blt:
    - shard-bmg:          [SKIP][50] ([Intel XE#2312]) -> [SKIP][51] ([Intel XE#2311]) +4 other tests skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4695-e2ad8f051843c953c01f8609c8b392abc2bd5c82/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-shrfb-plflip-blt.html
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-shrfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt:
    - shard-bmg:          [SKIP][52] ([Intel XE#4141]) -> [SKIP][53] ([Intel XE#2312]) +1 other test skip
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4695-e2ad8f051843c953c01f8609c8b392abc2bd5c82/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt.html
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-move:
    - shard-bmg:          [SKIP][54] ([Intel XE#2312]) -> [SKIP][55] ([Intel XE#4141]) +1 other test skip
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4695-e2ad8f051843c953c01f8609c8b392abc2bd5c82/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-move.html
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-move.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-cur-indfb-move:
    - shard-bmg:          [SKIP][56] ([Intel XE#2311]) -> [SKIP][57] ([Intel XE#2312]) +2 other tests skip
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4695-e2ad8f051843c953c01f8609c8b392abc2bd5c82/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-cur-indfb-move.html
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-cur-indfb-move.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-render:
    - shard-bmg:          [SKIP][58] ([Intel XE#2313]) -> [SKIP][59] ([Intel XE#2312]) +3 other tests skip
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4695-e2ad8f051843c953c01f8609c8b392abc2bd5c82/shard-bmg-3/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-render.html
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-5/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-pgflip-blt:
    - shard-bmg:          [SKIP][60] ([Intel XE#2312]) -> [SKIP][61] ([Intel XE#2313]) +3 other tests skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4695-e2ad8f051843c953c01f8609c8b392abc2bd5c82/shard-bmg-5/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-pgflip-blt.html
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-8/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-pgflip-blt.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-bmg:          [SKIP][62] ([Intel XE#2426] / [Intel XE#5848]) -> [SKIP][63] ([Intel XE#2509] / [Intel XE#7437])
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4695-e2ad8f051843c953c01f8609c8b392abc2bd5c82/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-6/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv:
    - shard-bmg:          [ABORT][64] ([Intel XE#5466] / [Intel XE#7577]) -> [ABORT][65] ([Intel XE#5466] / [Intel XE#6652] / [Intel XE#7577])
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4695-e2ad8f051843c953c01f8609c8b392abc2bd5c82/shard-bmg-6/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/shard-bmg-1/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2486]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2486
  [Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
  [Intel XE#2594]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2594
  [Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#5354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5354
  [Intel XE#5466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5466
  [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#6652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6652
  [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
  [Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
  [Intel XE#7140]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7140
  [Intel XE#7194]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7194
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
  [Intel XE#7354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7354
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
  [Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
  [Intel XE#7429]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7429
  [Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
  [Intel XE#7577]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7577


Build changes
-------------

  * Linux: xe-4695-e2ad8f051843c953c01f8609c8b392abc2bd5c82 -> xe-pw-162933v2

  IGT_8792: 8792
  xe-4695-e2ad8f051843c953c01f8609c8b392abc2bd5c82: e2ad8f051843c953c01f8609c8b392abc2bd5c82
  xe-pw-162933v2: 162933v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162933v2/index.html

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