From: "Tauro, Riana" <riana.tauro@intel.com>
To: Mallesh Koujalagi <mallesh.koujalagi@intel.com>,
<intel-xe@lists.freedesktop.org>, <rodrigo.vivi@intel.com>,
<matthew.brost@intel.com>, <thomas.hellstrom@linux.intel.com>
Cc: <anshuman.gupta@intel.com>, <badal.nilawar@intel.com>,
<vinay.belgaumkar@intel.com>, <aravind.iddamsetty@intel.com>,
<karthik.poosa@intel.com>, <sk.anirban@intel.com>,
<raag.jadav@intel.com>
Subject: Re: [RFC PATCH v3 1/3] drm/xe: Add error Signature IDs for RAS logging
Date: Fri, 19 Jun 2026 11:18:13 +0530 [thread overview]
Message-ID: <2c2b5167-97fd-49fb-88f4-71e1dd1b3122@intel.com> (raw)
In-Reply-To: <20260617104711.79646-6-mallesh.koujalagi@intel.com>
On 17-06-2026 16:17, Mallesh Koujalagi wrote:
> Every GPU fault needs a stable numeric label so monitoring tools can
GPU fault does not need a label. This patch introduces so it's easy for
tools /script to monitor.
> identify what went wrong without parsing log text. Add xe_sig_ids.h
> which defines those labels, called SIG_IDs.
>
> Signed-off-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
> ---
> v3:
> - Add HW SIG IDS details. (Riana)
> ---
> drivers/gpu/drm/xe/xe_sig_ids.h | 29 +++++++++++++++++++++++++++++
> 1 file changed, 29 insertions(+)
> create mode 100644 drivers/gpu/drm/xe/xe_sig_ids.h
>
> diff --git a/drivers/gpu/drm/xe/xe_sig_ids.h b/drivers/gpu/drm/xe/xe_sig_ids.h
> new file mode 100644
> index 000000000000..7badd0d7ad72
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_sig_ids.h
> @@ -0,0 +1,29 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2026 Intel Corporation
> + */
> +
> +#ifndef _XE_SIG_IDS_H_
> +#define _XE_SIG_IDS_H_
Document would be more relevant here
> +
> +/*
> + * Driver SIG_IDs
> + */
> +#define XE_SIG_PROBE 1 /* FATAL: probe failed */
> +#define XE_SIG_WEDGED 2 /* FATAL: device wedged */
> +#define XE_SIG_SURVIVABILITY 3 /* FATAL: survivability mode */
> +#define XE_SIG_FW 4 /* RECOVERABLE: GuC/HuC/UC/GSC/CSC/PCODE */
> +#define XE_SIG_GT_TDR 5 /* RECOVERABLE: engine hang / reset */
> +#define XE_SIG_MEM_FAULT 6 /* RECOVERABLE: VM bind, page fault, GTT */
> +#define XE_SIG_IO_BUS 7 /* RECOVERABLE: runtime PCIe/IOMMU/MMIO */
> +
> +/*
> + * HW SIG_IDs
Acronym needed? Mention Hardware error
> + */
> +#define XE_SIG_HW_DEVICE_MEMORY 8 /* Device memory errors (e.g. ECC) */
example not needed. If required please define
> +#define XE_SIG_HW_CORE_COMPUTE 9 /* Compute/shader core errors */
> +#define XE_SIG_HW_PCIE 10 /* PCIe interface errors */
> +#define XE_SIG_HW_FABRIC 11 /* On-package fabric errors */
on-package?
Thanks
Riana
> +#define XE_SIG_HW_SOC_INTERNAL 12 /* SoC-internal errors */
> +
> +#endif /* _XE_SIG_IDS_H_ */
next prev parent reply other threads:[~2026-06-19 5:48 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-17 10:47 [RFC PATCH v3 0/3] drm/xe: Structured RAS error logging infrastructure Mallesh Koujalagi
2026-06-17 10:47 ` [RFC PATCH v3 1/3] drm/xe: Add error Signature IDs for RAS logging Mallesh Koujalagi
2026-06-19 5:48 ` Tauro, Riana [this message]
2026-06-23 7:41 ` Mallesh, Koujalagi
2026-06-20 17:02 ` Michal Wajdeczko
2026-06-24 11:51 ` Mallesh, Koujalagi
2026-06-17 10:47 ` [RFC PATCH v3 2/3] drm/xe: Add RAS logging helpers Mallesh Koujalagi
2026-06-19 5:43 ` Tauro, Riana
2026-06-23 10:41 ` Mallesh, Koujalagi
2026-06-20 19:29 ` Michal Wajdeczko
2026-06-24 16:03 ` Mallesh, Koujalagi
2026-07-03 11:23 ` Tauro, Riana
2026-06-17 10:47 ` [RFC PATCH v3 3/3] drm/xe: use XE_RAS_WEDGED macro in xe_device_declare_wedged Mallesh Koujalagi
2026-06-17 16:06 ` Bhadane, Dnyaneshwar
2026-06-20 19:39 ` Michal Wajdeczko
2026-06-24 16:16 ` Mallesh, Koujalagi
2026-06-17 11:11 ` ✗ CI.checkpatch: warning for drm/xe: Structured RAS error logging infrastructure (rev3) Patchwork
2026-06-17 11:11 ` ✗ CI.KUnit: failure " Patchwork
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