From: "Ghimiray, Himal Prasad" <himal.prasad.ghimiray@intel.com>
To: Matthew Brost <matthew.brost@intel.com>
Cc: <intel-xe@lists.freedesktop.org>, <thomas.hellstrom@linux.intel.com>
Subject: Re: [PATCH v4 20/20] drm/xe/madvise: Skip vma invalidation if mem attr are unchanged
Date: Thu, 26 Jun 2025 14:24:08 +0530 [thread overview]
Message-ID: <352e6be8-4ddb-4442-8a0b-5f49f63be9c0@intel.com> (raw)
In-Reply-To: <aFnU+sQWnsk63A9+@lstrano-desk.jf.intel.com>
On 24-06-2025 03:58, Matthew Brost wrote:
> On Fri, Jun 13, 2025 at 06:25:58PM +0530, Himal Prasad Ghimiray wrote:
>> If a VMA within the madvise input range already has the same memory
>> attribute as the one requested by the user, skip PTE zapping for that
>> VMA to avoid unnecessary invalidation.
>>
>> Suggested-by: Matthew Brost <matthew.brost@intel.com>
>> Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
>> ---
>> drivers/gpu/drm/xe/xe_vm.c | 1 +
>> drivers/gpu/drm/xe/xe_vm_madvise.c | 57 ++++++++++++++++++------------
>> drivers/gpu/drm/xe/xe_vm_types.h | 6 ++++
>> 3 files changed, 42 insertions(+), 22 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
>> index d9ce25f3abf4..56d6c286e3d3 100644
>> --- a/drivers/gpu/drm/xe/xe_vm.c
>> +++ b/drivers/gpu/drm/xe/xe_vm.c
>> @@ -1226,6 +1226,7 @@ static struct xe_vma *xe_vma_create(struct xe_vm *vm,
>> vma->gpuva.flags |= XE_VMA_ATOMIC_PTE_BIT;
>>
>> vma->attr = *attr;
>> + vma->skip_invalidation = 0;
>
> This kzalloc'd so not needed.
>
>>
>> if (bo) {
>> struct drm_gpuvm_bo *vm_bo;
>> diff --git a/drivers/gpu/drm/xe/xe_vm_madvise.c b/drivers/gpu/drm/xe/xe_vm_madvise.c
>> index 5b96c8fc73a5..06e40ab0970e 100644
>> --- a/drivers/gpu/drm/xe/xe_vm_madvise.c
>> +++ b/drivers/gpu/drm/xe/xe_vm_madvise.c
>> @@ -88,13 +88,18 @@ static void madvise_preferred_mem_loc(struct xe_device *xe, struct xe_vm *vm,
>> xe_assert(vm->xe, op->type == DRM_XE_VMA_ATTR_PREFERRED_LOC);
>>
>> for (i = 0; i < num_vmas; i++) {
>> - vmas[i]->attr.preferred_loc.devmem_fd = op->preferred_mem_loc.devmem_fd;
>> -
>> - /* Till multi-device support is not added migration_policy
>> - * is of no use and can be ignored.
>> - */
>> - vmas[i]->attr.preferred_loc.migration_policy =
>> + if (vmas[i]->attr.preferred_loc.devmem_fd == op->preferred_mem_loc.devmem_fd &&
>> + vmas[i]->attr.preferred_loc.migration_policy ==
>> + op->preferred_mem_loc.migration_policy) {
>> + vmas[i]->skip_invalidation = 1;
>
> In the else statement, you need to clear this so subsequent madvise
> which change properties do issue invalidations.
Missed it. Will fix
>
>> + } else {
>> + vmas[i]->attr.preferred_loc.devmem_fd = op->preferred_mem_loc.devmem_fd;
>> + /* Till multi-device support is not added migration_policy
>> + * is of no use and can be ignored.
>> + */
>> + vmas[i]->attr.preferred_loc.migration_policy =
>> op->preferred_mem_loc.migration_policy;
>> + }
>> }
>> }
>>
>> @@ -109,7 +114,10 @@ static void madvise_atomic(struct xe_device *xe, struct xe_vm *vm,
>> xe_assert(vm->xe, op->atomic.val <= DRM_XE_VMA_ATOMIC_CPU);
>>
>> for (i = 0; i < num_vmas; i++) {
>> - vmas[i]->attr.atomic_access = op->atomic.val;
>> + if (vmas[i]->attr.atomic_access == op->atomic.val)
>> + vmas[i]->skip_invalidation = 1;
>> + else
>> + vmas[i]->attr.atomic_access = op->atomic.val;
>>
>> bo = xe_vma_bo(vmas[i]);
>> if (!bo)
>> @@ -134,9 +142,12 @@ static void madvise_pat_index(struct xe_device *xe, struct xe_vm *vm,
>>
>> xe_assert(vm->xe, op->type == DRM_XE_VMA_ATTR_PAT);
>>
>> - for (i = 0; i < num_vmas; i++)
>> - vmas[i]->attr.pat_index = op->pat_index.val;
>> -
>> + for (i = 0; i < num_vmas; i++) {
>> + if (vmas[i]->attr.pat_index == op->pat_index.val)
>> + vmas[i]->skip_invalidation = 1;
>> + else
>> + vmas[i]->attr.pat_index = op->pat_index.val;
>> + }
>> }
>>
>> typedef void (*madvise_func)(struct xe_device *xe, struct xe_vm *vm,
>> @@ -161,23 +172,25 @@ static void xe_zap_ptes_in_madvise_range(struct xe_vm *vm, u64 start, u64 end, u
>> false, MAX_SCHEDULE_TIMEOUT) <= 0)
>> XE_WARN_ON(1);
>>
>> - *tile_mask = xe_svm_ranges_zap_ptes_in_range(vm, start, end);
>> -
>> drm_gpuvm_for_each_va_range(gpuva, &vm->gpuvm, start, end) {
>> struct xe_vma *vma = gpuva_to_vma(gpuva);
>>
>> - if (xe_vma_is_cpu_addr_mirror(vma))
>> + if (vma->skip_invalidation)
>> continue;
>>
>> - if (xe_vma_is_userptr(vma)) {
>> - WARN_ON_ONCE(!dma_resv_test_signaled(xe_vm_resv(xe_vma_vm(vma)),
>> - DMA_RESV_USAGE_BOOKKEEP));
>> - }
>> -
>> - for_each_tile(tile, vm->xe, id) {
>> - if (xe_pt_zap_ptes(tile, vma)) {
>> - *tile_mask |= BIT(id);
>> - vma->tile_invalidated |= BIT(id);
>> + if (xe_vma_is_cpu_addr_mirror(vma)) {
>> + *tile_mask |= xe_svm_ranges_zap_ptes_in_range(vm,
>> + xe_vma_start(vma),
>> + xe_vma_end(vma));
>> + } else {
>> + if (xe_vma_is_userptr(vma))
>> + WARN_ON_ONCE(!dma_resv_test_signaled(xe_vm_resv(xe_vma_vm(vma)),
>> + DMA_RESV_USAGE_BOOKKEEP));
>> + for_each_tile(tile, vm->xe, id) {
>> + if (xe_pt_zap_ptes(tile, vma)) {
>> + *tile_mask |= BIT(id);
>> + vma->tile_invalidated |= BIT(id);
>> + }
>> }
>> }
>> }
>> diff --git a/drivers/gpu/drm/xe/xe_vm_types.h b/drivers/gpu/drm/xe/xe_vm_types.h
>> index c7156f8e2ed2..3b3019ecbfab 100644
>> --- a/drivers/gpu/drm/xe/xe_vm_types.h
>> +++ b/drivers/gpu/drm/xe/xe_vm_types.h
>> @@ -151,6 +151,12 @@ struct xe_vma {
>> /** @tile_staged: bind is staged for this VMA */
>> u8 tile_staged;
>>
>> + /**
>> + * @skip_invalidation: Used in madvise to avoid invalidation
>> + * if mem attributes doesn't change
>> + */
>> + u32 skip_invalidation;
>
> bool or I think you can safely stuff this into gpuva flags (e.g.,
> DRM_GPUVA_USERBITS) as this only set / cleared / viewed by a single
> thread and all other flags are set at init time or bind time (i.e., no
> races).
would change it to bool.
If you choose the latter, or regardless, we should probably
> document the gpuva usage.
do you mean gpuva userbit flags ?
>
> Matt
>
>> +
>> /**
>> * @ufence: The user fence that was provided with MAP.
>> * Needs to be signalled before UNMAP can be processed.
>> --
>> 2.34.1
>>
next prev parent reply other threads:[~2025-06-26 8:54 UTC|newest]
Thread overview: 68+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-13 12:55 [PATCH v4 00/20] MADVISE FOR XE Himal Prasad Ghimiray
2025-06-13 12:43 ` ✗ CI.checkpatch: warning for MADVISE FOR XE (rev2) Patchwork
2025-06-13 12:44 ` ✗ CI.KUnit: failure " Patchwork
2025-06-13 12:55 ` [PATCH v4 01/20] Introduce drm_gpuvm_sm_map_ops_flags enums for sm_map_ops Himal Prasad Ghimiray
2025-06-13 12:55 ` [PATCH v4 02/20] drm/xe/uapi: Add madvise interface Himal Prasad Ghimiray
2025-06-13 14:15 ` Souza, Jose
2025-06-23 4:30 ` Matthew Brost
2025-06-23 6:20 ` Ghimiray, Himal Prasad
2025-06-27 13:47 ` Thomas Hellström
2025-06-27 14:29 ` Thomas Hellström
2025-06-27 18:13 ` Matthew Brost
2025-06-13 12:55 ` [PATCH v4 03/20] drm/xe/vm: Add attributes struct as member of vma Himal Prasad Ghimiray
2025-06-23 4:18 ` Matthew Brost
2025-06-23 6:21 ` Ghimiray, Himal Prasad
2025-06-27 14:32 ` Thomas Hellström
2025-06-13 12:55 ` [PATCH v4 04/20] drm/xe/vma: Move pat_index to vma attributes Himal Prasad Ghimiray
2025-06-13 12:55 ` [PATCH v4 05/20] drm/xe/vma: Modify new_vma to accept struct xe_vma_mem_attr as parameter Himal Prasad Ghimiray
2025-06-23 4:38 ` Matthew Brost
2025-06-23 16:21 ` Matthew Brost
2025-06-13 12:55 ` [PATCH v4 06/20] drm/gpusvm: Make drm_gpusvm_for_each_* macros public Himal Prasad Ghimiray
2025-06-13 12:55 ` [PATCH v4 07/20] drm/xe/svm: Split system allocator vma incase of madvise call Himal Prasad Ghimiray
2025-06-13 12:55 ` [PATCH v4 08/20] drm/xe/svm: Add xe_svm_ranges_zap_ptes_in_range() for PTE zapping Himal Prasad Ghimiray
2025-06-23 4:56 ` Matthew Brost
2025-06-23 6:25 ` Ghimiray, Himal Prasad
2025-06-13 12:55 ` [PATCH v4 09/20] drm/xe: Implement madvise ioctl for xe Himal Prasad Ghimiray
2025-06-23 5:33 ` Matthew Brost
2025-06-26 6:04 ` Lin, Shuicheng
2025-06-26 6:15 ` Matthew Brost
2025-06-26 8:36 ` Ghimiray, Himal Prasad
2025-06-26 8:34 ` Ghimiray, Himal Prasad
2025-06-13 12:55 ` [PATCH v4 10/20] drm/xe/vm: Add an identifier for madvise in xe_vma_ops Himal Prasad Ghimiray
2025-06-23 5:38 ` Matthew Brost
2025-06-23 6:28 ` Ghimiray, Himal Prasad
2025-06-13 12:55 ` [PATCH v4 11/20] drm/xe: Allow CPU address mirror VMA unbind with gpu bindings for madvise Himal Prasad Ghimiray
2025-06-14 4:31 ` kernel test robot
2025-06-23 5:52 ` Matthew Brost
2025-06-23 6:18 ` Ghimiray, Himal Prasad
2025-06-23 11:45 ` Matthew Brost
2025-06-13 12:55 ` [PATCH v4 12/20] drm/xe/svm : Add svm ranges migration policy on atomic access Himal Prasad Ghimiray
2025-06-23 16:32 ` Matthew Brost
2025-06-13 12:55 ` [PATCH v4 13/20] drm/xe/madvise: Update migration policy based on preferred location Himal Prasad Ghimiray
2025-06-13 23:31 ` kernel test robot
2025-06-14 5:33 ` kernel test robot
2025-06-13 12:55 ` [PATCH v4 14/20] drm/xe/svm: Support DRM_XE_SVM_ATTR_PAT memory attribute Himal Prasad Ghimiray
2025-06-23 16:34 ` Matthew Brost
2025-06-13 12:55 ` [PATCH v4 15/20] drm/xe/uapi: Add flag for consulting madvise hints on svm prefetch Himal Prasad Ghimiray
2025-06-23 16:36 ` Matthew Brost
2025-06-13 12:55 ` [PATCH v4 16/20] drm/xe/svm: Consult madvise preferred location in prefetch Himal Prasad Ghimiray
2025-06-23 22:07 ` Matthew Brost
2025-06-13 12:55 ` [PATCH v4 17/20] drm/xe/bo: Add attributes field to xe_bo Himal Prasad Ghimiray
2025-06-13 12:55 ` [PATCH v4 18/20] drm/xe/bo: Update atomic_access attribute on madvise Himal Prasad Ghimiray
2025-06-23 16:19 ` Matthew Brost
2025-06-13 12:55 ` [PATCH v4 19/20] drm/xe/uapi: Add UAPI for querying VMA count and memory attributes Himal Prasad Ghimiray
2025-06-23 22:43 ` Matthew Brost
2025-06-24 2:18 ` Matthew Brost
2025-06-27 13:20 ` Thomas Hellström
2025-06-27 13:43 ` Thomas Hellström
2025-06-26 3:44 ` Lin, Shuicheng
2025-06-13 12:55 ` [PATCH v4 20/20] drm/xe/madvise: Skip vma invalidation if mem attr are unchanged Himal Prasad Ghimiray
2025-06-23 22:28 ` Matthew Brost
2025-06-26 8:54 ` Ghimiray, Himal Prasad [this message]
2025-06-16 4:30 ` ✗ CI.checkpatch: warning for MADVISE FOR XE (rev3) Patchwork
2025-06-16 4:31 ` ✓ CI.KUnit: success " Patchwork
2025-06-16 4:45 ` ✗ CI.checksparse: warning " Patchwork
2025-06-16 5:13 ` ✓ Xe.CI.BAT: success " Patchwork
2025-06-16 15:06 ` ✗ Xe.CI.Full: failure " Patchwork
2025-07-29 4:41 ` [PATCH v4 00/20] MADVISE FOR XE Matthew Brost
2025-07-30 11:16 ` Ghimiray, Himal Prasad
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=352e6be8-4ddb-4442-8a0b-5f49f63be9c0@intel.com \
--to=himal.prasad.ghimiray@intel.com \
--cc=intel-xe@lists.freedesktop.org \
--cc=matthew.brost@intel.com \
--cc=thomas.hellstrom@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox