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* [PATCH v2] drm/xe: Limit sg segment size to PAGE_SIZE on Xen PV
@ 2026-09-16 17:30 Szymon Acedański
  2026-09-17 12:16 ` ✗ LGCI.VerificationFailed: failure for drm/xe: Limit sg segment size to PAGE_SIZE on Xen PV (rev2) Patchwork
                   ` (4 more replies)
  0 siblings, 5 replies; 9+ messages in thread
From: Szymon Acedański @ 2026-09-16 17:30 UTC (permalink / raw)
  To: intel-xe
  Cc: thomas.hellstrom, matthew.brost, rodrigo.vivi, maarten.lankhorst,
	hch, bob.beckett, dri-devel, marmarek, xen-devel,
	Szymon Acedański, stable

Fix display corruption on Xen PV dom0, where DMA buffers are not
guaranteed machine-contiguous, in which case bounce buffering kicks
in, breaking xe's memory coherency assumptions.

Apply the same workaround i915 carries in i915_sg_segment_size() since
commit 78a07fe777c4 ("drm/i915: stop abusing swiotlb_max_segment").

Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
Reported-by: Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/8382
Link: https://lore.kernel.org/xen-devel/aYtznP_tT6xNPwf-@mail-itl/
Link: https://lore.kernel.org/all/20221020110308.1582518-1-hch@lst.de/ # i915 counterpart
Cc: Christoph Hellwig <hch@lst.de>
Cc: Robert Beckett <bob.beckett@collabora.com>
Cc: stable@vger.kernel.org # v6.8+
Signed-off-by: Szymon Acedański <accek@invisiblethingslab.com>
---
v2:
 - Imperative language in the commit message (Thomas Hellström)
 - CC the authors of the original i915 workaround (Thomas Hellström)

 drivers/gpu/drm/xe/xe_bo.h | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_bo.h b/drivers/gpu/drm/xe/xe_bo.h
index 290ca62..341fa93 100644
--- a/drivers/gpu/drm/xe/xe_bo.h
+++ b/drivers/gpu/drm/xe/xe_bo.h
@@ -9,6 +9,8 @@
 #include <drm/drm_prime.h>
 #include <drm/ttm/ttm_tt.h>
 
+#include <xen/xen.h>
+
 #include "xe_bo_types.h"
 #include "xe_ggtt.h"
 #include "xe_macros.h"
@@ -574,6 +576,23 @@ static inline unsigned int xe_sg_segment_size(struct device *dev)
 	struct scatterlist __maybe_unused sg;
 	size_t max = BIT_ULL(sizeof(sg.length) * 8) - 1;
 
+	/*
+	 * For Xen PV guests pages aren't contiguous in DMA (machine) address
+	 * space.  The DMA API takes care of that both in dma_alloc_* (by
+	 * calling into the hypervisor to make the pages contiguous) and in
+	 * dma_map_* (by bounce buffering).  But xe (like i915, see commit
+	 * 78a07fe777c4) ignores the coherency aspects of the DMA API and thus
+	 * can't cope with bounce buffering actually happening, so add a hack
+	 * here to force small allocations and mappings when running in PV
+	 * mode on Xen.
+	 *
+	 * Note this will still break if bounce buffering is required for other
+	 * reasons, like confidential computing hypervisors or PCIe root ports
+	 * with addressing limitations.
+	 */
+	if (xen_pv_domain())
+		return PAGE_SIZE;
+
 	max = min_t(size_t, max, dma_max_mapping_size(dev));
 
 	/*

base-commit: baafc300cd079a5210c1e70e5ea3d93518e40b38
-- 
2.53.0


^ permalink raw reply related	[flat|nested] 9+ messages in thread
end of thread, other threads:[~2026-09-21 14:30 UTC | newest]

Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-09-16 17:30 [PATCH v2] drm/xe: Limit sg segment size to PAGE_SIZE on Xen PV Szymon Acedański
2026-09-17 12:16 ` ✗ LGCI.VerificationFailed: failure for drm/xe: Limit sg segment size to PAGE_SIZE on Xen PV (rev2) Patchwork
2026-09-21  6:34 ` ✓ CI.KUnit: success for drm/xe: Limit sg segment size to PAGE_SIZE on Xen PV (rev3) Patchwork
2026-09-21  7:49 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-09-21  9:30   ` Szymon Acedański
2026-09-21  9:47 ` ✗ Xe.CI.FULL: " Patchwork
2026-09-21 10:07   ` Szymon Acedański
2026-09-21 13:57 ` [PATCH v2] drm/xe: Limit sg segment size to PAGE_SIZE on Xen PV Thomas Hellström
2026-09-21 14:30   ` Thomas Hellström

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