Re: [PATCH] drm/i915/display: Workaround for odd panning for planar yuv

["Pottumuttu, Sai Teja" <sai.teja.pottumuttu@intel.com>]

On 25-09-2024 17:55, Nemesa Garg wrote:
> Disable the support for odd x pan for NV12 format as underrun
> issue is seen.
>
> WA: 16024459452

Just some additional nitpicks,

- We should mention about the even xsize in commit message as well I guess.

- We usually refer to the WA lineage. In the comment below, you have 
added the correct lineage "16023981245", let us add the same here in 
commit message as well.

>
> v2: Replace HSD with WA in commit message [Suraj]
>      Modified the condition for handling odd panning
>
> v3: Simplified the condition for checking hsub
>      Using older framework for wa as rev1[Jani]
>
> v4: Modify the condition for hsub [Sai Teja]
>      Initialize hsub in else path [Dan]
>
> Signed-off-by: Nemesa Garg <nemesa.garg@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_atomic_plane.c | 10 +++++++++-
>   1 file changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> index e979786aa5cf..dfe795b8e917 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> @@ -1029,8 +1029,16 @@ int intel_plane_check_src_coordinates(struct intel_plane_state *plane_state)
>   		 * This allows NV12 and P0xx formats to have odd size and/or odd
>   		 * source coordinates on DISPLAY_VER(i915) >= 20
>   		 */
> -		hsub = 1;
>   		vsub = 1;
> +		/*
> +		 * Wa_16023981245 for display version 20.
> +		 * Do not support odd x-panning for even xsize for NV12.
> +		 */
> +		if (IS_LUNARLAKE(i915) && fb->format->format == DRM_FORMAT_NV12
> +		    && src_w % 2 == 0)
> +			return -EINVAL;
> +
> +		hsub = 1;
>   	} else {
>   		hsub = fb->format->hsub;
>   		vsub = fb->format->vsub;