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From: "Hogander, Jouni" <jouni.hogander@intel.com>
To: "intel-xe@lists.freedesktop.org" <intel-xe@lists.freedesktop.org>,
	"Manna,  Animesh" <animesh.manna@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Cc: "Kandpal, Suraj" <suraj.kandpal@intel.com>,
	"Nikula, Jani" <jani.nikula@intel.com>
Subject: Re: [PATCH v5 08/15] drm/i915/alpm: Half LFPS cycle calculation
Date: Wed, 2 Sep 2026 09:30:06 +0000	[thread overview]
Message-ID: <5460cebd29879ac3919586492511bd2056bb8cf3.camel@intel.com> (raw)
In-Reply-To: <dfbac2e7a2a2be4bb2d7bad8aabdd0b24e88cfb4.camel@intel.com>

On Wed, 2026-09-02 at 11:41 +0300, Hogander, Jouni wrote:
> On Tue, 2026-08-25 at 11:15 +0530, Animesh Manna wrote:
> > Add support for half LFPS cycle calculation for DP2.1 ALPM as
> > dependent
> > parameters got changed.
> > 
> > v1: Initial version.
> > v2: Avoid returning early. [Jani]
> > v3: Use intel_crtc_has_type(). [Suraj]
> > 
> > Cc: Jouni Högander <jouni.hogander@intel.com>
> > Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_alpm.c | 18 ++++++++++++------
> >  1 file changed, 12 insertions(+), 6 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c
> > b/drivers/gpu/drm/i915/display/intel_alpm.c
> > index 078e04bb69d2..98aa418a6ff7 100644
> > --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> > +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> > @@ -80,12 +80,18 @@ static int get_silence_period_symbols(const
> > struct intel_crtc_state *crtc_state)
> >  static void get_lfps_cycle_min_max_time(const struct
> > intel_crtc_state *crtc_state,
> 
> Not your patch, but maybe better naming would be
> get_lfps_period_min_max_time()
> 
> >  					int *min, int *max)
> >  {
> > -	if (crtc_state->port_clock < 540000) {
> > -		*min = 65 * LFPS_CYCLE_COUNT;
> > -		*max = 75 * LFPS_CYCLE_COUNT;
> > -	} else {
> > -		*min = 140;
> > -		*max = 800;
> > +	struct intel_display *display =
> > to_intel_display(crtc_state);
> > +
> > +	*min = 320;
> > +	*max = 1600;
> > +	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) {
> > +		if (crtc_state->port_clock < 540000 &&
> > DISPLAY_VER(display) < 35) {
> > +			*min = 65 * LFPS_CYCLE_COUNT;
> > +			*max = 75 * LFPS_CYCLE_COUNT;
> > +		} else {
> > +			*min = 140;
> > +			*max = 800;
> > +		}
> 
> This is getting messy. Maybe it would be more clear to have:
> 
> if (DISPLAY_VER(display) < 35)
>     get_lfps_cycle_min_max_time_cx0()
> else
>     get_lfps_cycle_min_max_time_lt()

HAS_LT_PHY(display) would be better to use than display version.

BR,
Jouni Högander

> 
> BR,
> Jouni Högander
> >  	}
> >  }
> >  
> 


  reply	other threads:[~2026-09-02  9:30 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-25  5:45 [PATCH v5 00/15] Enable DP2.1 alpm Animesh Manna
2026-08-25  5:45 ` [PATCH v5 01/15] drm/i915/alpm: Add DPCD definition for DP2.1 ALPM capability Animesh Manna
2026-08-25  7:55   ` Kandpal, Suraj
2026-08-27 10:51     ` Manna, Animesh
2026-08-25  5:45 ` [PATCH v5 02/15] drm/i915/alpm: Move alpm sink capabality readout in separate function Animesh Manna
2026-08-25  6:28   ` sashiko-bot
2026-08-25  7:57   ` Kandpal, Suraj
2026-09-02  5:30     ` Hogander, Jouni
2026-08-25  5:45 ` [PATCH v5 03/15] drm/i915/alpm: alpm_init() for DP2.1 Animesh Manna
2026-08-25  7:44   ` sashiko-bot
2026-09-02  6:09   ` Hogander, Jouni
2026-08-25  5:45 ` [PATCH v5 04/15] drm/i915/alpm: Enable debugfs " Animesh Manna
2026-08-25  6:38   ` sashiko-bot
2026-09-02  6:14   ` Hogander, Jouni
2026-08-25  5:45 ` [PATCH v5 05/15] drm/i915/alpm: Refactor Auxless wake time calculation Animesh Manna
2026-08-25  5:45 ` [PATCH v5 06/15] drm/i915/alpm: Auxless wake time calculation for Xe3p Animesh Manna
2026-08-25  6:30   ` sashiko-bot
2026-09-02  7:22   ` Hogander, Jouni
2026-08-25  5:45 ` [PATCH v5 07/15] drm/i915/alpm: table based establishment period Animesh Manna
2026-08-25  6:34   ` sashiko-bot
2026-09-02  7:24   ` Hogander, Jouni
2026-08-25  5:45 ` [PATCH v5 08/15] drm/i915/alpm: Half LFPS cycle calculation Animesh Manna
2026-08-25  6:31   ` sashiko-bot
2026-09-02  8:41   ` Hogander, Jouni
2026-09-02  9:30     ` Hogander, Jouni [this message]
2026-08-25  5:45 ` [PATCH v5 09/15] drm/i915/alpm: Modify LFPS cycle count for DP ALPM Animesh Manna
2026-08-25  6:33   ` sashiko-bot
2026-09-02  8:49   ` Hogander, Jouni
2026-08-25  5:45 ` [PATCH v5 10/15] drm/i915/alpm: Program LTTPR count for DP 2.1 ALPM Animesh Manna
2026-08-25  6:32   ` sashiko-bot
2026-09-02  9:27   ` Hogander, Jouni
2026-08-25  5:45 ` [PATCH v5 11/15] drm/i915/alpm: Enable MAC Transmitting LFPS for LT PHY Animesh Manna
2026-09-02  9:37   ` Hogander, Jouni
2026-08-25  5:45 ` [PATCH v5 12/15] drm/i915/alpm: Replace is_edp() with alpm_is_possible() Animesh Manna
2026-08-25  6:43   ` sashiko-bot
2026-09-02  9:49   ` Hogander, Jouni
2026-08-25  5:45 ` [PATCH v5 13/15] drm/i915/alpm: Introduce has_alpm to decouple from pr/psr2/lobf Animesh Manna
2026-08-25  6:35   ` sashiko-bot
2026-09-02 10:04   ` Hogander, Jouni
2026-08-25  5:45 ` [PATCH v5 14/15] drm/i915/alpm: Compute and program switch to active latency Animesh Manna
2026-08-25  6:39   ` sashiko-bot
2026-09-02 10:10   ` Hogander, Jouni
2026-08-25  5:45 ` [PATCH v5 15/15] drm/i915/alpm: Program zero-based LFPS half cycle duration Animesh Manna
2026-08-25  6:40   ` sashiko-bot
2026-09-02 10:17   ` Hogander, Jouni
2026-08-25  7:59 ` ✗ CI.checkpatch: warning for Enable DP2.1 alpm (rev5) Patchwork
2026-08-25  8:01 ` ✓ CI.KUnit: success " Patchwork
2026-08-25  8:41 ` ✓ Xe.CI.BAT: " Patchwork
2026-08-25 12:23 ` ✓ Xe.CI.FULL: " Patchwork

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