Re: [PATCH 02/16] drm/i915/dp_mst: Use VRR Timing generator for DP MST for fixed_rr

["Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>]

On 3/24/2025 11:12 PM, Ville Syrjälä wrote:
> On Mon, Mar 24, 2025 at 07:02:34PM +0530, Ankit Nautiyal wrote:
>> Currently the variable timings are supported only for DP and eDP and not
>> for DP MST. Call intel_vrr_compute_config() for MST which will configure
>> fixed refresh rate timings irrespective of whether VRR is supported or
>> not. Since vrr_capable still doesn't have support for DP MST this will be
>> just treated as non VRR case and vrr.vmin/vmax/flipline will be all set
>> to adjusted_mode->crtc_vtotal.
>>
>> This will help to move away from the legacy timing generator and
>> always use VRR timing generator by default.
>>
>> With this change, we need to exclude MST in intel_vrr_is_capable for
>> now, to avoid having LRR with MST.
>>
>> v2: Exclude MST in intel_vrr_is_capable() for now. (Ville)
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>>   drivers/gpu/drm/i915/display/intel_dp_mst.c | 3 +++
>>   drivers/gpu/drm/i915/display/intel_vrr.c    | 2 ++
>>   2 files changed, 5 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
>> index 02f95108c637..bd47cf127b4c 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
>> @@ -52,6 +52,7 @@
>>   #include "intel_pfit.h"
>>   #include "intel_psr.h"
>>   #include "intel_vdsc.h"
>> +#include "intel_vrr.h"
>>   #include "skl_scaler.h"
>>   
>>   /*
>> @@ -710,6 +711,8 @@ static int mst_stream_compute_config(struct intel_encoder *encoder,
>>   		pipe_config->lane_lat_optim_mask =
>>   			bxt_dpio_phy_calc_lane_lat_optim_mask(pipe_config->lane_count);
>>   
>> +	intel_vrr_compute_config(pipe_config, conn_state);
>> +
>>   	intel_dp_audio_compute_config(encoder, pipe_config, conn_state);
>>   
>>   	intel_ddi_compute_min_voltage_level(pipe_config);
>> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
>> index 6bdcdfed4b9b..c682c487eb25 100644
>> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
>> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
>> @@ -32,6 +32,8 @@ bool intel_vrr_is_capable(struct intel_connector *connector)
>>   			return false;
>>   		fallthrough;
>>   	case DRM_MODE_CONNECTOR_DisplayPort:
>> +		if (connector->mst.dp)
>> +			return false;
> The DP spec is pretty vague about this, but it looks to me like it's
> saying that the last MST branch device must support the "ignore MSA"
> bit in order to support adaptive sync. I guess we might need to do that
> stuff via remote DPCD. Or perhaps in the worst case we'd have iterate
> through the whole MST chain.
>
> Looks like there's at least this MST hub that claims adaptive sync
> support:
> https://club-3d.com/en/detail/2486/usb_type_c_3.2_gen_1_multi_stream_transport_(mst)hub_displayport1.4_triple_monitor/
> We should probably get one and see if we can get this working.

As you have highlighted some effort is required for DP + MST.

Thanks for digging up this, I have noted this down and will try to get 
or similar device for testing.

>
> In the meantime
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Thanks again for the suggestion and reviews.

Regards,

Ankit


>
>>   		intel_dp = intel_attached_dp(connector);
>>   
>>   		if (!drm_dp_sink_can_do_video_without_timing_msa(intel_dp->dpcd))
>> -- 
>> 2.45.2