* [PATCH 0/5] drm/i915/irq: Clean up the GEN11_GU_MISC mess
@ 2026-11-05 20:34 Ville Syrjala
2026-11-05 20:34 ` [PATCH 1/5] drm/i915/irq: Relocate gen11_gu_misc_irq_ack() Ville Syrjala
` (7 more replies)
0 siblings, 8 replies; 15+ messages in thread
From: Ville Syrjala @ 2026-11-05 20:34 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Clean up the mess around the GEN11_GU_MISC interrupts. Now all
the interrupt register details live in i915_irq.c where they
belong, and the display will only know that a GSE interrupt
needs to be handled.
Ville Syrjälä (5):
drm/i915/irq: Relocate gen11_gu_misc_irq_ack()
drm/i915/irq:
s/gen11_gu_misc_irq_handler()/intel_display_gse_irq_handler()/
drm/i915/irq: Extract gen11_gu_misc_irq_postinstall()
drm/i915/irq: Keep GSE interrupts masked if display is not present
drm/i915/irq: Reorder GU_MISC vs. display in gen11_irq_postinstall()
.../gpu/drm/i915/display/intel_display_irq.c | 29 ++---------
.../gpu/drm/i915/display/intel_display_irq.h | 3 +-
drivers/gpu/drm/i915/i915_irq.c | 48 +++++++++++++++----
3 files changed, 45 insertions(+), 35 deletions(-)
--
2.56.0
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 1/5] drm/i915/irq: Relocate gen11_gu_misc_irq_ack()
2026-11-05 20:34 [PATCH 0/5] drm/i915/irq: Clean up the GEN11_GU_MISC mess Ville Syrjala
@ 2026-11-05 20:34 ` Ville Syrjala
2026-11-06 9:18 ` Jani Nikula
2026-11-05 20:34 ` [PATCH 2/5] drm/i915/irq: s/gen11_gu_misc_irq_handler()/intel_display_gse_irq_handler()/ Ville Syrjala
` (6 subsequent siblings)
7 siblings, 1 reply; 15+ messages in thread
From: Ville Syrjala @ 2026-11-05 20:34 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
The Gunit misc interrupts (GEN11_GU_MISC_*) aren't a display thing.
Currently the irq ack/handler live in intel_display_irq.c, whereas
the irq reset/postingstall lives in i915_irq.c.
gen11_gu_misc_irq_ack() belongs with its reset/postinstall
counterparts in i915_irq.c, so move it there. The handler we'll
leave in the display code.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
.../gpu/drm/i915/display/intel_display_irq.c | 23 ++---------------
.../gpu/drm/i915/display/intel_display_irq.h | 3 +--
drivers/gpu/drm/i915/i915_irq.c | 25 ++++++++++++++++---
3 files changed, 24 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index b8d7e8de4ee8..af8d6737d36c 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -1587,28 +1587,9 @@ static bool gen8_display_irq_handler(struct intel_display *display,
return true;
}
-u32 gen11_gu_misc_irq_ack(struct intel_display *display, const u32 master_ctl)
+void gen11_gu_misc_irq_handler(struct intel_display *display)
{
- u32 iir;
-
- if (!(master_ctl & GEN11_GU_MISC_IRQ))
- return 0;
-
- intel_display_rpm_assert_block(display);
-
- iir = intel_de_read_fw(display, GEN11_GU_MISC_IIR);
- if (likely(iir))
- intel_de_write_fw(display, GEN11_GU_MISC_IIR, iir);
-
- intel_display_rpm_assert_unblock(display);
-
- return iir;
-}
-
-void gen11_gu_misc_irq_handler(struct intel_display *display, const u32 iir)
-{
- if (iir & GEN11_GU_MISC_GSE)
- intel_opregion_asle_intr(display);
+ intel_opregion_asle_intr(display);
}
static bool gen11_display_irq_handler(struct intel_display *display,
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h b/drivers/gpu/drm/i915/display/intel_display_irq.h
index 84446bf53401..00dfed88eab7 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.h
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.h
@@ -52,8 +52,7 @@ void bdw_disable_vblank(struct drm_crtc *crtc);
void ilk_display_irq_master_disable(struct intel_display *display, u32 *de_ier, u32 *sde_ier);
void ilk_display_irq_master_enable(struct intel_display *display, u32 de_ier, u32 sde_ier);
-u32 gen11_gu_misc_irq_ack(struct intel_display *display, const u32 master_ctl);
-void gen11_gu_misc_irq_handler(struct intel_display *display, const u32 iir);
+void gen11_gu_misc_irq_handler(struct intel_display *display);
struct intel_display_irq_state {
u32 master_ctl;
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 932409b943ad..1d03ac90b7e2 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -491,6 +491,21 @@ static inline void gen11_master_intr_enable(void __iomem * const regs)
raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, GEN11_MASTER_IRQ);
}
+static u32 gen11_gu_misc_irq_ack(void __iomem * const regs,
+ u32 master_ctl)
+{
+ u32 iir;
+
+ if (!(master_ctl & GEN11_GU_MISC_IRQ))
+ return 0;
+
+ iir = raw_reg_read(regs, GEN11_GU_MISC_IIR);
+ if (likely(iir))
+ raw_reg_write(regs, GEN11_GU_MISC_IIR, iir);
+
+ return iir;
+}
+
static irqreturn_t gen11_irq_handler(int irq, void *arg)
{
struct drm_i915_private *i915 = arg;
@@ -516,11 +531,12 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg)
if (master_ctl & GEN11_DISPLAY_IRQ)
intel_display_irq_handler(display, NULL);
- gu_misc_iir = gen11_gu_misc_irq_ack(display, master_ctl);
+ gu_misc_iir = gen11_gu_misc_irq_ack(regs, master_ctl);
gen11_master_intr_enable(regs);
- gen11_gu_misc_irq_handler(display, gu_misc_iir);
+ if (gu_misc_iir & GEN11_GU_MISC_GSE)
+ gen11_gu_misc_irq_handler(display);
pmu_irq_stats(i915, IRQ_HANDLED);
@@ -583,11 +599,12 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg)
if (master_ctl & GEN11_DISPLAY_IRQ)
intel_display_irq_handler(display, NULL);
- gu_misc_iir = gen11_gu_misc_irq_ack(display, master_ctl);
+ gu_misc_iir = gen11_gu_misc_irq_ack(regs, master_ctl);
dg1_master_intr_enable(regs);
- gen11_gu_misc_irq_handler(display, gu_misc_iir);
+ if (gu_misc_iir & GEN11_GU_MISC_GSE)
+ gen11_gu_misc_irq_handler(display);
pmu_irq_stats(i915, IRQ_HANDLED);
--
2.56.0
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 2/5] drm/i915/irq: s/gen11_gu_misc_irq_handler()/intel_display_gse_irq_handler()/
2026-11-05 20:34 [PATCH 0/5] drm/i915/irq: Clean up the GEN11_GU_MISC mess Ville Syrjala
2026-11-05 20:34 ` [PATCH 1/5] drm/i915/irq: Relocate gen11_gu_misc_irq_ack() Ville Syrjala
@ 2026-11-05 20:34 ` Ville Syrjala
2026-11-06 9:20 ` Jani Nikula
2026-11-05 20:34 ` [PATCH 3/5] drm/i915/irq: Extract gen11_gu_misc_irq_postinstall() Ville Syrjala
` (5 subsequent siblings)
7 siblings, 1 reply; 15+ messages in thread
From: Ville Syrjala @ 2026-11-05 20:34 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Now that gen11_gu_misc_irq_handler() just handles the GSE
interrupt let's rename it to intel_display_gse_irq_handler().
And now that it's our generic GSE irq handler let's also
call it for all the GSE interrupts signaled via actual
display interrupts as well. The old GMCH ASLE/BLC interrupts
I left calling intel_opregion_asle_intr() directly, just
because the naming there makes more sense that way.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display_irq.c | 8 ++++----
drivers/gpu/drm/i915/display/intel_display_irq.h | 2 +-
drivers/gpu/drm/i915/i915_irq.c | 4 ++--
3 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index af8d6737d36c..5430eb5245da 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -904,7 +904,7 @@ static void _ilk_display_irq_handler(struct intel_display *display, u32 de_iir)
intel_dp_aux_irq_handler(display);
if (de_iir & DE_GSE)
- intel_opregion_asle_intr(display);
+ intel_display_gse_irq_handler(display);
if (de_iir & DE_POISON)
drm_err(display->drm, "Poison interrupt\n");
@@ -971,7 +971,7 @@ static void _ivb_display_irq_handler(struct intel_display *display, u32 de_iir)
intel_dp_aux_irq_handler(display);
if (de_iir & DE_GSE_IVB)
- intel_opregion_asle_intr(display);
+ intel_display_gse_irq_handler(display);
for_each_pipe(display, pipe) {
if (de_iir & DE_PIPE_VBLANK_IVB(pipe))
@@ -1279,7 +1279,7 @@ gen8_de_misc_irq_handler(struct intel_display *display, u32 iir)
found = true;
}
} else if (iir & GEN8_DE_MISC_GSE) {
- intel_opregion_asle_intr(display);
+ intel_display_gse_irq_handler(display);
found = true;
}
@@ -1587,7 +1587,7 @@ static bool gen8_display_irq_handler(struct intel_display *display,
return true;
}
-void gen11_gu_misc_irq_handler(struct intel_display *display)
+void intel_display_gse_irq_handler(struct intel_display *display)
{
intel_opregion_asle_intr(display);
}
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h b/drivers/gpu/drm/i915/display/intel_display_irq.h
index 00dfed88eab7..1fd11328a264 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.h
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.h
@@ -52,7 +52,7 @@ void bdw_disable_vblank(struct drm_crtc *crtc);
void ilk_display_irq_master_disable(struct intel_display *display, u32 *de_ier, u32 *sde_ier);
void ilk_display_irq_master_enable(struct intel_display *display, u32 de_ier, u32 sde_ier);
-void gen11_gu_misc_irq_handler(struct intel_display *display);
+void intel_display_gse_irq_handler(struct intel_display *display);
struct intel_display_irq_state {
u32 master_ctl;
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 1d03ac90b7e2..12082167face 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -536,7 +536,7 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg)
gen11_master_intr_enable(regs);
if (gu_misc_iir & GEN11_GU_MISC_GSE)
- gen11_gu_misc_irq_handler(display);
+ intel_display_gse_irq_handler(display);
pmu_irq_stats(i915, IRQ_HANDLED);
@@ -604,7 +604,7 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg)
dg1_master_intr_enable(regs);
if (gu_misc_iir & GEN11_GU_MISC_GSE)
- gen11_gu_misc_irq_handler(display);
+ intel_display_gse_irq_handler(display);
pmu_irq_stats(i915, IRQ_HANDLED);
--
2.56.0
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 3/5] drm/i915/irq: Extract gen11_gu_misc_irq_postinstall()
2026-11-05 20:34 [PATCH 0/5] drm/i915/irq: Clean up the GEN11_GU_MISC mess Ville Syrjala
2026-11-05 20:34 ` [PATCH 1/5] drm/i915/irq: Relocate gen11_gu_misc_irq_ack() Ville Syrjala
2026-11-05 20:34 ` [PATCH 2/5] drm/i915/irq: s/gen11_gu_misc_irq_handler()/intel_display_gse_irq_handler()/ Ville Syrjala
@ 2026-11-05 20:34 ` Ville Syrjala
2026-11-06 9:22 ` Jani Nikula
2026-11-05 20:34 ` [PATCH 4/5] drm/i915/irq: Keep GSE interrupts masked if display is not present Ville Syrjala
` (4 subsequent siblings)
7 siblings, 1 reply; 15+ messages in thread
From: Ville Syrjala @ 2026-11-05 20:34 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Both gen11 and dg1 duplicate the same code to set up the
GEN11_GU_MISC interrupts. Extract it to a shared helper.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/i915_irq.c | 16 ++++++++++++----
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 12082167face..823d97284d78 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -725,17 +725,26 @@ static void gen8_irq_postinstall(struct drm_i915_private *dev_priv)
gen8_master_intr_enable(intel_uncore_regs(&dev_priv->uncore));
}
+static void gen11_gu_misc_irq_postinstall(struct drm_i915_private *dev_priv)
+{
+ struct intel_gt *gt = to_gt(dev_priv);
+ struct intel_uncore *uncore = gt->uncore;
+ u32 gu_misc_masked = GEN11_GU_MISC_GSE;
+
+ gen2_irq_init(uncore, GEN11_GU_MISC_IRQ_REGS, ~gu_misc_masked, gu_misc_masked);
+}
+
static void gen11_irq_postinstall(struct drm_i915_private *dev_priv)
{
struct intel_display *display = dev_priv->display;
struct intel_gt *gt = to_gt(dev_priv);
struct intel_uncore *uncore = gt->uncore;
- u32 gu_misc_masked = GEN11_GU_MISC_GSE;
gen11_gt_irq_postinstall(gt);
+
intel_display_irq_postinstall(display);
- gen2_irq_init(uncore, GEN11_GU_MISC_IRQ_REGS, ~gu_misc_masked, gu_misc_masked);
+ gen11_gu_misc_irq_postinstall(dev_priv);
gen11_master_intr_enable(intel_uncore_regs(uncore));
intel_uncore_posting_read(&dev_priv->uncore, GEN11_GFX_MSTR_IRQ);
@@ -745,14 +754,13 @@ static void dg1_irq_postinstall(struct drm_i915_private *dev_priv)
{
struct intel_display *display = dev_priv->display;
struct intel_uncore *uncore = &dev_priv->uncore;
- u32 gu_misc_masked = GEN11_GU_MISC_GSE;
struct intel_gt *gt;
unsigned int i;
for_each_gt(gt, dev_priv, i)
gen11_gt_irq_postinstall(gt);
- gen2_irq_init(uncore, GEN11_GU_MISC_IRQ_REGS, ~gu_misc_masked, gu_misc_masked);
+ gen11_gu_misc_irq_postinstall(dev_priv);
intel_display_irq_postinstall(display);
--
2.56.0
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 4/5] drm/i915/irq: Keep GSE interrupts masked if display is not present
2026-11-05 20:34 [PATCH 0/5] drm/i915/irq: Clean up the GEN11_GU_MISC mess Ville Syrjala
` (2 preceding siblings ...)
2026-11-05 20:34 ` [PATCH 3/5] drm/i915/irq: Extract gen11_gu_misc_irq_postinstall() Ville Syrjala
@ 2026-11-05 20:34 ` Ville Syrjala
2026-11-06 9:25 ` Jani Nikula
2026-11-05 20:34 ` [PATCH 5/5] drm/i915/irq: Reorder GU_MISC vs. display in gen11_irq_postinstall() Ville Syrjala
` (3 subsequent siblings)
7 siblings, 1 reply; 15+ messages in thread
From: Ville Syrjala @ 2026-11-05 20:34 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Display is the only current user of GSE interrupts. Keep the
GSE interrupt masked on icl+ if there is no display.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/i915_irq.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 823d97284d78..5476472d33bd 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -36,6 +36,7 @@
#include <drm/intel/display_parent_interface.h>
#include <drm/intel/intel_gmd_interrupt_regs.h>
+#include "display/intel_display_device.h"
#include "display/intel_display_irq.h"
#include "gt/intel_breadcrumbs.h"
@@ -727,9 +728,13 @@ static void gen8_irq_postinstall(struct drm_i915_private *dev_priv)
static void gen11_gu_misc_irq_postinstall(struct drm_i915_private *dev_priv)
{
+ struct intel_display *display = dev_priv->display;
struct intel_gt *gt = to_gt(dev_priv);
struct intel_uncore *uncore = gt->uncore;
- u32 gu_misc_masked = GEN11_GU_MISC_GSE;
+ u32 gu_misc_masked = 0;
+
+ if (intel_display_device_present(display))
+ gu_misc_masked |= GEN11_GU_MISC_GSE;
gen2_irq_init(uncore, GEN11_GU_MISC_IRQ_REGS, ~gu_misc_masked, gu_misc_masked);
}
--
2.56.0
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 5/5] drm/i915/irq: Reorder GU_MISC vs. display in gen11_irq_postinstall()
2026-11-05 20:34 [PATCH 0/5] drm/i915/irq: Clean up the GEN11_GU_MISC mess Ville Syrjala
` (3 preceding siblings ...)
2026-11-05 20:34 ` [PATCH 4/5] drm/i915/irq: Keep GSE interrupts masked if display is not present Ville Syrjala
@ 2026-11-05 20:34 ` Ville Syrjala
2026-11-06 9:25 ` Jani Nikula
2026-11-05 20:48 ` ✓ CI.KUnit: success for drm/i915/irq: Clean up the GEN11_GU_MISC mess Patchwork
` (2 subsequent siblings)
7 siblings, 1 reply; 15+ messages in thread
From: Ville Syrjala @ 2026-11-05 20:34 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
gen11_irq_postinstall() and dg1_irq_postinstall() call
intel_display_irq_postinstall() and gen11_gu_misc_irq_postinstall()
in the opposite order, presumably for no real reason. Reorder the
gen11 part to match the dg1 part for consistency.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/i915_irq.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 5476472d33bd..8ff2dd74b301 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -747,10 +747,10 @@ static void gen11_irq_postinstall(struct drm_i915_private *dev_priv)
gen11_gt_irq_postinstall(gt);
- intel_display_irq_postinstall(display);
-
gen11_gu_misc_irq_postinstall(dev_priv);
+ intel_display_irq_postinstall(display);
+
gen11_master_intr_enable(intel_uncore_regs(uncore));
intel_uncore_posting_read(&dev_priv->uncore, GEN11_GFX_MSTR_IRQ);
}
--
2.56.0
^ permalink raw reply related [flat|nested] 15+ messages in thread
* ✓ CI.KUnit: success for drm/i915/irq: Clean up the GEN11_GU_MISC mess
2026-11-05 20:34 [PATCH 0/5] drm/i915/irq: Clean up the GEN11_GU_MISC mess Ville Syrjala
` (4 preceding siblings ...)
2026-11-05 20:34 ` [PATCH 5/5] drm/i915/irq: Reorder GU_MISC vs. display in gen11_irq_postinstall() Ville Syrjala
@ 2026-11-05 20:48 ` Patchwork
2026-11-05 21:23 ` ✓ Xe.CI.BAT: " Patchwork
2026-11-06 22:22 ` ✗ Xe.CI.FULL: failure " Patchwork
7 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2026-11-05 20:48 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-xe
== Series Details ==
Series: drm/i915/irq: Clean up the GEN11_GU_MISC mess
URL : https://patchwork.freedesktop.org/series/177897/
State : success
== Summary ==
+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[20:46:48] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:46:53] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[20:47:13] Starting KUnit Kernel (1/1)...
[20:47:13] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:47:13] ================= gpu_buddy (14 subtests) ==================
[20:47:13] [PASSED] gpu_test_buddy_alloc_limit
[20:47:13] [PASSED] gpu_test_buddy_alloc_optimistic
[20:47:13] [PASSED] gpu_test_buddy_alloc_pessimistic
[20:47:13] [PASSED] gpu_test_buddy_alloc_pathological
[20:47:13] [PASSED] gpu_test_buddy_alloc_contiguous
[20:47:13] [PASSED] gpu_test_buddy_alloc_clear
[20:47:13] [PASSED] gpu_test_buddy_alloc_range
[20:47:14] [PASSED] gpu_test_buddy_alloc_range_bias
[20:47:15] [PASSED] gpu_test_buddy_fragmentation_performance
[20:47:15] [PASSED] gpu_test_buddy_dirty_tracker_performance
[20:47:15] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[20:47:15] [PASSED] gpu_test_buddy_offset_aligned_allocation
[20:47:15] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[20:47:15] [PASSED] gpu_test_buddy_addr_to_block
[20:47:15] ==================== [PASSED] gpu_buddy ====================
[20:47:15] ============================================================
[20:47:15] Testing complete. Ran 14 tests: passed: 14
[20:47:15] Elapsed time: 27.299s total, 5.154s configuring, 20.228s building, 1.852s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[20:47:15] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:47:18] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[20:47:56] Starting KUnit Kernel (1/1)...
[20:47:56] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:47:56] ================== guc_buf (11 subtests) ===================
[20:47:56] [PASSED] test_smallest
[20:47:56] [PASSED] test_largest
[20:47:57] [PASSED] test_granular
[20:47:57] [PASSED] test_unique
[20:47:57] [PASSED] test_overlap
[20:47:57] [PASSED] test_reusable
[20:47:57] [PASSED] test_too_big
[20:47:57] [PASSED] test_flush
[20:47:57] [PASSED] test_lookup
[20:47:57] [PASSED] test_data
[20:47:57] [PASSED] test_class
[20:47:57] ===================== [PASSED] guc_buf =====================
[20:47:57] =================== guc_dbm (7 subtests) ===================
[20:47:57] [PASSED] test_empty
[20:47:57] [PASSED] test_default
[20:47:57] ======================== test_size ========================
[20:47:57] [PASSED] 4
[20:47:57] [PASSED] 8
[20:47:57] [PASSED] 32
[20:47:57] [PASSED] 256
[20:47:57] ==================== [PASSED] test_size ====================
[20:47:57] ======================= test_reuse ========================
[20:47:57] [PASSED] 4
[20:47:57] [PASSED] 8
[20:47:57] [PASSED] 32
[20:47:57] [PASSED] 256
[20:47:57] =================== [PASSED] test_reuse ====================
[20:47:57] =================== test_range_overlap ====================
[20:47:57] [PASSED] 4
[20:47:57] [PASSED] 8
[20:47:57] [PASSED] 32
[20:47:57] [PASSED] 256
[20:47:57] =============== [PASSED] test_range_overlap ================
[20:47:57] =================== test_range_compact ====================
[20:47:57] [PASSED] 4
[20:47:57] [PASSED] 8
[20:47:57] [PASSED] 32
[20:47:57] [PASSED] 256
[20:47:57] =============== [PASSED] test_range_compact ================
[20:47:57] ==================== test_range_spare =====================
[20:47:57] [PASSED] 4
[20:47:57] [PASSED] 8
[20:47:57] [PASSED] 32
[20:47:57] [PASSED] 256
[20:47:57] ================ [PASSED] test_range_spare =================
[20:47:57] ===================== [PASSED] guc_dbm =====================
[20:47:57] ================== guc_idm (22 subtests) ===================
[20:47:57] [PASSED] bad_init
[20:47:57] [PASSED] no_init
[20:47:57] [PASSED] init_fini
[20:47:57] [PASSED] check_init_small
[20:47:57] [PASSED] check_init_shared
[20:47:57] [PASSED] check_used
[20:47:57] [PASSED] check_quota
[20:47:57] [PASSED] check_all
[20:47:57] [PASSED] check_limits
[20:47:57] [PASSED] check_overlap
[20:47:57] [PASSED] check_overlap_alloc
[20:47:57] [PASSED] check_overlap_release
[20:47:57] [PASSED] check_overlap_partial_init
[20:47:57] [PASSED] check_overlap_partial_shared_range_blocking
[20:47:57] [PASSED] check_used_usable
[20:47:57] [PASSED] check_used_shareable
[20:47:57] [PASSED] check_used_mixed
[20:47:57] [PASSED] check_release_usable_range
[20:47:57] [PASSED] check_release_shareable_range
[20:47:57] [PASSED] check_split_boundaries
[20:47:57] [PASSED] check_shareable_spare
[20:47:57] [PASSED] check_shareable_spare_fragmented_tail
[20:47:57] ===================== [PASSED] guc_idm =====================
[20:47:57] ============== guc_klv_helpers (13 subtests) ===============
[20:47:57] [PASSED] test_count
[20:47:57] [PASSED] test_encode_u32
[20:47:57] [PASSED] test_encode_u64
[20:47:57] [PASSED] test_encode_string
[20:47:57] [PASSED] test_encode_object_raw
[20:47:57] [PASSED] test_encode_object_klv
[20:47:57] [PASSED] test_encode_object_nested
[20:47:57] [PASSED] test_encode_object_basic
[20:47:57] ===================== test_decode_u16 =====================
[20:47:57] [PASSED] empty
[20:47:57] [PASSED] valid
[20:47:57] [PASSED] max
[20:47:57] [PASSED] big
[20:47:57] [PASSED] long
[20:47:57] ================= [PASSED] test_decode_u16 =================
[20:47:57] ===================== test_decode_u32 =====================
[20:47:57] [PASSED] empty
[20:47:57] [PASSED] valid
[20:47:57] [PASSED] max
[20:47:57] [PASSED] long
[20:47:57] ================= [PASSED] test_decode_u32 =================
[20:47:57] ===================== test_decode_u64 =====================
[20:47:57] [PASSED] empty
[20:47:57] [PASSED] short
[20:47:57] [PASSED] valid
[20:47:57] [PASSED] max
[20:47:57] [PASSED] long
[20:47:57] ================= [PASSED] test_decode_u64 =================
[20:47:57] ===================== test_decode_str =====================
[20:47:57] [PASSED] empty
[20:47:57] [PASSED] one
[20:47:57] [PASSED] one_trash
[20:47:57] [PASSED] two
[20:47:57] [PASSED] two_trash
[20:47:57] [PASSED] three
[20:47:57] [PASSED] dword
[20:47:57] [PASSED] four
[20:47:57] [PASSED] five
[20:47:57] [PASSED] six
[20:47:57] [PASSED] seven
[20:47:57] [PASSED] qword
[20:47:57] ================= [PASSED] test_decode_str =================
[20:47:57] [PASSED] test_print
[20:47:57] ================= [PASSED] guc_klv_helpers =================
[20:47:57] =================== xe_log (4 subtests) ====================
[20:47:57] [PASSED] demo_cper
[20:47:57] [PASSED] demo_dmesg
[20:47:57] ======================= test_dmesg ========================
[20:47:57] [PASSED] test_fatal
[20:47:57] [PASSED] test_fatal_tile
[20:47:57] [PASSED] test_fatal_gt
[20:47:57] [PASSED] test_fatal_comp
[20:47:57] [PASSED] test_fatal_comp_tile
[20:47:57] [PASSED] test_fatal_comp_gt
[20:47:57] [PASSED] test_fatal_all
[20:47:57] [PASSED] test_recoverable
[20:47:57] [PASSED] test_recoverable_tile
[20:47:57] [PASSED] test_recoverable_gt
[20:47:57] [PASSED] test_recoverable_comp
[20:47:57] [PASSED] test_recoverable_comp_tile
[20:47:57] [PASSED] test_recoverable_comp_gt
[20:47:57] [PASSED] test_recoverable_all
[20:47:57] [PASSED] test_info
[20:47:57] [PASSED] test_info_tile
[20:47:57] [PASSED] test_info_gt
[20:47:57] [PASSED] test_info_err
[20:47:57] [PASSED] test_info_comp
[20:47:57] [PASSED] test_info_comp_tile
[20:47:57] [PASSED] test_info_comp_gt
[20:47:57] [PASSED] test_info_all
[20:47:57] [PASSED] test_hw_fatal
[20:47:57] [PASSED] test_hw_recoverable
[20:47:57] [PASSED] test_hw_corrected
[20:47:57] [PASSED] test_hw_informational
[20:47:57] =================== [PASSED] test_dmesg ====================
[20:47:57] ====================== test_invalid =======================
[20:47:57] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[20:47:57] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[20:47:57] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[20:47:57] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[20:47:57] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[20:47:57] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[20:47:57] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[20:47:57] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[20:47:57] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[20:47:57] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[20:47:57] ================== [SKIPPED] test_invalid ==================
[20:47:57] ===================== [PASSED] xe_log ======================
[20:47:57] ================== no_relay (3 subtests) ===================
[20:47:57] [PASSED] xe_drops_guc2pf_if_not_ready
[20:47:57] [PASSED] xe_drops_guc2vf_if_not_ready
[20:47:57] [PASSED] xe_rejects_send_if_not_ready
[20:47:57] ==================== [PASSED] no_relay =====================
[20:47:57] ================== pf_relay (14 subtests) ==================
[20:47:57] [PASSED] pf_rejects_guc2pf_too_short
[20:47:57] [PASSED] pf_rejects_guc2pf_too_long
[20:47:57] [PASSED] pf_rejects_guc2pf_no_payload
[20:47:57] [PASSED] pf_fails_no_payload
[20:47:57] [PASSED] pf_fails_bad_origin
[20:47:57] [PASSED] pf_fails_bad_type
[20:47:57] [PASSED] pf_txn_reports_error
[20:47:57] [PASSED] pf_txn_sends_pf2guc
[20:47:57] [PASSED] pf_sends_pf2guc
[20:47:57] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[20:47:57] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[20:47:57] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[20:47:57] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[20:47:57] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[20:47:57] ==================== [PASSED] pf_relay =====================
[20:47:57] ================== vf_relay (3 subtests) ===================
[20:47:57] [PASSED] vf_rejects_guc2vf_too_short
[20:47:57] [PASSED] vf_rejects_guc2vf_too_long
[20:47:57] [PASSED] vf_rejects_guc2vf_no_payload
[20:47:57] ==================== [PASSED] vf_relay =====================
[20:47:57] ================ pf_gt_config (9 subtests) =================
[20:47:57] [PASSED] fair_contexts_1vf
[20:47:57] [PASSED] fair_doorbells_1vf
[20:47:57] [PASSED] fair_ggtt_1vf
[20:47:57] ====================== fair_vram_1vf ======================
[20:47:57] [PASSED] 3.50 GiB
[20:47:57] [PASSED] 11.5 GiB
[20:47:57] [PASSED] 15.5 GiB
[20:47:57] [PASSED] 31.5 GiB
[20:47:57] [PASSED] 63.5 GiB
[20:47:57] [PASSED] 1.91 GiB
[20:47:57] ================== [PASSED] fair_vram_1vf ==================
[20:47:57] ================ fair_vram_1vf_admin_only =================
[20:47:57] [PASSED] 3.50 GiB
[20:47:57] [PASSED] 11.5 GiB
[20:47:57] [PASSED] 15.5 GiB
[20:47:57] [PASSED] 31.5 GiB
[20:47:57] [PASSED] 63.5 GiB
[20:47:57] [PASSED] 1.91 GiB
[20:47:57] ============ [PASSED] fair_vram_1vf_admin_only =============
[20:47:57] ====================== fair_contexts ======================
[20:47:57] [PASSED] 1 VF
[20:47:57] [PASSED] 2 VFs
[20:47:57] [PASSED] 3 VFs
[20:47:57] [PASSED] 4 VFs
[20:47:57] [PASSED] 5 VFs
[20:47:57] [PASSED] 6 VFs
[20:47:57] [PASSED] 7 VFs
[20:47:57] [PASSED] 8 VFs
[20:47:57] [PASSED] 9 VFs
[20:47:57] [PASSED] 10 VFs
[20:47:57] [PASSED] 11 VFs
[20:47:57] [PASSED] 12 VFs
[20:47:57] [PASSED] 13 VFs
[20:47:57] [PASSED] 14 VFs
[20:47:57] [PASSED] 15 VFs
[20:47:57] [PASSED] 16 VFs
[20:47:57] [PASSED] 17 VFs
[20:47:57] [PASSED] 18 VFs
[20:47:57] [PASSED] 19 VFs
[20:47:57] [PASSED] 20 VFs
[20:47:57] [PASSED] 21 VFs
[20:47:57] [PASSED] 22 VFs
[20:47:57] [PASSED] 23 VFs
[20:47:57] [PASSED] 24 VFs
[20:47:57] [PASSED] 25 VFs
[20:47:57] [PASSED] 26 VFs
[20:47:57] [PASSED] 27 VFs
[20:47:57] [PASSED] 28 VFs
[20:47:57] [PASSED] 29 VFs
[20:47:57] [PASSED] 30 VFs
[20:47:57] [PASSED] 31 VFs
[20:47:57] [PASSED] 32 VFs
[20:47:57] [PASSED] 33 VFs
[20:47:57] [PASSED] 34 VFs
[20:47:57] [PASSED] 35 VFs
[20:47:57] [PASSED] 36 VFs
[20:47:57] [PASSED] 37 VFs
[20:47:57] [PASSED] 38 VFs
[20:47:57] [PASSED] 39 VFs
[20:47:57] [PASSED] 40 VFs
[20:47:57] [PASSED] 41 VFs
[20:47:57] [PASSED] 42 VFs
[20:47:57] [PASSED] 43 VFs
[20:47:57] [PASSED] 44 VFs
[20:47:57] [PASSED] 45 VFs
[20:47:57] [PASSED] 46 VFs
[20:47:57] [PASSED] 47 VFs
[20:47:57] [PASSED] 48 VFs
[20:47:57] [PASSED] 49 VFs
[20:47:57] [PASSED] 50 VFs
[20:47:57] [PASSED] 51 VFs
[20:47:57] [PASSED] 52 VFs
[20:47:57] [PASSED] 53 VFs
[20:47:57] [PASSED] 54 VFs
[20:47:57] [PASSED] 55 VFs
[20:47:57] [PASSED] 56 VFs
[20:47:57] [PASSED] 57 VFs
[20:47:57] [PASSED] 58 VFs
[20:47:57] [PASSED] 59 VFs
[20:47:57] [PASSED] 60 VFs
[20:47:57] [PASSED] 61 VFs
[20:47:57] [PASSED] 62 VFs
[20:47:57] [PASSED] 63 VFs
[20:47:57] ================== [PASSED] fair_contexts ==================
[20:47:57] ===================== fair_doorbells ======================
[20:47:57] [PASSED] 1 VF
[20:47:57] [PASSED] 2 VFs
[20:47:57] [PASSED] 3 VFs
[20:47:57] [PASSED] 4 VFs
[20:47:57] [PASSED] 5 VFs
[20:47:57] [PASSED] 6 VFs
[20:47:57] [PASSED] 7 VFs
[20:47:57] [PASSED] 8 VFs
[20:47:57] [PASSED] 9 VFs
[20:47:57] [PASSED] 10 VFs
[20:47:57] [PASSED] 11 VFs
[20:47:57] [PASSED] 12 VFs
[20:47:57] [PASSED] 13 VFs
[20:47:57] [PASSED] 14 VFs
[20:47:57] [PASSED] 15 VFs
[20:47:57] [PASSED] 16 VFs
[20:47:57] [PASSED] 17 VFs
[20:47:57] [PASSED] 18 VFs
[20:47:57] [PASSED] 19 VFs
[20:47:57] [PASSED] 20 VFs
[20:47:57] [PASSED] 21 VFs
[20:47:57] [PASSED] 22 VFs
[20:47:57] [PASSED] 23 VFs
[20:47:57] [PASSED] 24 VFs
[20:47:57] [PASSED] 25 VFs
[20:47:57] [PASSED] 26 VFs
[20:47:57] [PASSED] 27 VFs
[20:47:57] [PASSED] 28 VFs
[20:47:57] [PASSED] 29 VFs
[20:47:57] [PASSED] 30 VFs
[20:47:57] [PASSED] 31 VFs
[20:47:57] [PASSED] 32 VFs
[20:47:57] [PASSED] 33 VFs
[20:47:57] [PASSED] 34 VFs
[20:47:57] [PASSED] 35 VFs
[20:47:57] [PASSED] 36 VFs
[20:47:57] [PASSED] 37 VFs
[20:47:57] [PASSED] 38 VFs
[20:47:57] [PASSED] 39 VFs
[20:47:57] [PASSED] 40 VFs
[20:47:57] [PASSED] 41 VFs
[20:47:57] [PASSED] 42 VFs
[20:47:57] [PASSED] 43 VFs
[20:47:57] [PASSED] 44 VFs
[20:47:57] [PASSED] 45 VFs
[20:47:57] [PASSED] 46 VFs
[20:47:57] [PASSED] 47 VFs
[20:47:57] [PASSED] 48 VFs
[20:47:57] [PASSED] 49 VFs
[20:47:57] [PASSED] 50 VFs
[20:47:57] [PASSED] 51 VFs
[20:47:57] [PASSED] 52 VFs
[20:47:57] [PASSED] 53 VFs
[20:47:57] [PASSED] 54 VFs
[20:47:57] [PASSED] 55 VFs
[20:47:57] [PASSED] 56 VFs
[20:47:57] [PASSED] 57 VFs
[20:47:57] [PASSED] 58 VFs
[20:47:57] [PASSED] 59 VFs
[20:47:57] [PASSED] 60 VFs
[20:47:57] [PASSED] 61 VFs
[20:47:57] [PASSED] 62 VFs
[20:47:57] [PASSED] 63 VFs
[20:47:57] ================= [PASSED] fair_doorbells ==================
[20:47:57] ======================== fair_ggtt ========================
[20:47:57] [PASSED] 1 VF
[20:47:57] [PASSED] 2 VFs
[20:47:57] [PASSED] 3 VFs
[20:47:57] [PASSED] 4 VFs
[20:47:57] [PASSED] 5 VFs
[20:47:57] [PASSED] 6 VFs
[20:47:57] [PASSED] 7 VFs
[20:47:57] [PASSED] 8 VFs
[20:47:57] [PASSED] 9 VFs
[20:47:57] [PASSED] 10 VFs
[20:47:57] [PASSED] 11 VFs
[20:47:57] [PASSED] 12 VFs
[20:47:57] [PASSED] 13 VFs
[20:47:57] [PASSED] 14 VFs
[20:47:57] [PASSED] 15 VFs
[20:47:57] [PASSED] 16 VFs
[20:47:57] [PASSED] 17 VFs
[20:47:57] [PASSED] 18 VFs
[20:47:57] [PASSED] 19 VFs
[20:47:57] [PASSED] 20 VFs
[20:47:57] [PASSED] 21 VFs
[20:47:57] [PASSED] 22 VFs
[20:47:57] [PASSED] 23 VFs
[20:47:57] [PASSED] 24 VFs
[20:47:57] [PASSED] 25 VFs
[20:47:57] [PASSED] 26 VFs
[20:47:57] [PASSED] 27 VFs
[20:47:57] [PASSED] 28 VFs
[20:47:57] [PASSED] 29 VFs
[20:47:57] [PASSED] 30 VFs
[20:47:57] [PASSED] 31 VFs
[20:47:57] [PASSED] 32 VFs
[20:47:57] [PASSED] 33 VFs
[20:47:57] [PASSED] 34 VFs
[20:47:57] [PASSED] 35 VFs
[20:47:57] [PASSED] 36 VFs
[20:47:57] [PASSED] 37 VFs
[20:47:57] [PASSED] 38 VFs
[20:47:57] [PASSED] 39 VFs
[20:47:57] [PASSED] 40 VFs
[20:47:57] [PASSED] 41 VFs
[20:47:57] [PASSED] 42 VFs
[20:47:57] [PASSED] 43 VFs
[20:47:57] [PASSED] 44 VFs
[20:47:57] [PASSED] 45 VFs
[20:47:57] [PASSED] 46 VFs
[20:47:57] [PASSED] 47 VFs
[20:47:57] [PASSED] 48 VFs
[20:47:57] [PASSED] 49 VFs
[20:47:57] [PASSED] 50 VFs
[20:47:57] [PASSED] 51 VFs
[20:47:57] [PASSED] 52 VFs
[20:47:57] [PASSED] 53 VFs
[20:47:57] [PASSED] 54 VFs
[20:47:57] [PASSED] 55 VFs
[20:47:57] [PASSED] 56 VFs
[20:47:57] [PASSED] 57 VFs
[20:47:57] [PASSED] 58 VFs
[20:47:57] [PASSED] 59 VFs
[20:47:57] [PASSED] 60 VFs
[20:47:57] [PASSED] 61 VFs
[20:47:57] [PASSED] 62 VFs
[20:47:57] [PASSED] 63 VFs
[20:47:57] ==================== [PASSED] fair_ggtt ====================
[20:47:57] ======================== fair_vram ========================
[20:47:57] [PASSED] 1 VF
[20:47:57] [PASSED] 2 VFs
[20:47:57] [PASSED] 3 VFs
[20:47:57] [PASSED] 4 VFs
[20:47:57] [PASSED] 5 VFs
[20:47:57] [PASSED] 6 VFs
[20:47:57] [PASSED] 7 VFs
[20:47:57] [PASSED] 8 VFs
[20:47:57] [PASSED] 9 VFs
[20:47:57] [PASSED] 10 VFs
[20:47:57] [PASSED] 11 VFs
[20:47:57] [PASSED] 12 VFs
[20:47:57] [PASSED] 13 VFs
[20:47:57] [PASSED] 14 VFs
[20:47:57] [PASSED] 15 VFs
[20:47:57] [PASSED] 16 VFs
[20:47:57] [PASSED] 17 VFs
[20:47:57] [PASSED] 18 VFs
[20:47:57] [PASSED] 19 VFs
[20:47:57] [PASSED] 20 VFs
[20:47:57] [PASSED] 21 VFs
[20:47:57] [PASSED] 22 VFs
[20:47:57] [PASSED] 23 VFs
[20:47:57] [PASSED] 24 VFs
[20:47:57] [PASSED] 25 VFs
[20:47:57] [PASSED] 26 VFs
[20:47:57] [PASSED] 27 VFs
[20:47:57] [PASSED] 28 VFs
[20:47:57] [PASSED] 29 VFs
[20:47:57] [PASSED] 30 VFs
[20:47:57] [PASSED] 31 VFs
[20:47:57] [PASSED] 32 VFs
[20:47:57] [PASSED] 33 VFs
[20:47:57] [PASSED] 34 VFs
[20:47:57] [PASSED] 35 VFs
[20:47:57] [PASSED] 36 VFs
[20:47:57] [PASSED] 37 VFs
[20:47:57] [PASSED] 38 VFs
[20:47:57] [PASSED] 39 VFs
[20:47:57] [PASSED] 40 VFs
[20:47:57] [PASSED] 41 VFs
[20:47:57] [PASSED] 42 VFs
[20:47:57] [PASSED] 43 VFs
[20:47:57] [PASSED] 44 VFs
[20:47:57] [PASSED] 45 VFs
[20:47:57] [PASSED] 46 VFs
[20:47:57] [PASSED] 47 VFs
[20:47:57] [PASSED] 48 VFs
[20:47:57] [PASSED] 49 VFs
[20:47:57] [PASSED] 50 VFs
[20:47:57] [PASSED] 51 VFs
[20:47:57] [PASSED] 52 VFs
[20:47:57] [PASSED] 53 VFs
[20:47:57] [PASSED] 54 VFs
[20:47:57] [PASSED] 55 VFs
[20:47:57] [PASSED] 56 VFs
[20:47:57] [PASSED] 57 VFs
[20:47:57] [PASSED] 58 VFs
[20:47:57] [PASSED] 59 VFs
[20:47:57] [PASSED] 60 VFs
[20:47:57] [PASSED] 61 VFs
[20:47:57] [PASSED] 62 VFs
[20:47:57] [PASSED] 63 VFs
[20:47:57] ==================== [PASSED] fair_vram ====================
[20:47:57] ================== [PASSED] pf_gt_config ===================
[20:47:57] ===================== lmtt (1 subtest) =====================
[20:47:57] ======================== test_ops =========================
[20:47:57] [PASSED] 2-level
[20:47:57] [PASSED] multi-level
[20:47:57] ==================== [PASSED] test_ops =====================
[20:47:57] ====================== [PASSED] lmtt =======================
[20:47:57] ================= sriov_packet (1 subtest) =================
[20:47:57] [PASSED] test_descriptor_init
[20:47:57] ================== [PASSED] sriov_packet ===================
[20:47:57] ================= pf_service (11 subtests) =================
[20:47:57] [PASSED] pf_negotiate_any
[20:47:57] [PASSED] pf_negotiate_base_match
[20:47:57] [PASSED] pf_negotiate_base_newer
[20:47:57] [PASSED] pf_negotiate_base_next
[20:47:57] [SKIPPED] pf_negotiate_base_older (no older minor)
[20:47:57] [PASSED] pf_negotiate_base_prev
[20:47:57] [PASSED] pf_negotiate_latest_match
[20:47:57] [PASSED] pf_negotiate_latest_newer
[20:47:57] [PASSED] pf_negotiate_latest_next
[20:47:57] [SKIPPED] pf_negotiate_latest_older (no older minor)
[20:47:57] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[20:47:57] =================== [PASSED] pf_service ====================
[20:47:57] ================= xe_guc_g2g (2 subtests) ==================
[20:47:57] ============== xe_live_guc_g2g_kunit_default ==============
[20:47:57] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[20:47:57] ============== xe_live_guc_g2g_kunit_allmem ===============
[20:47:57] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[20:47:57] =================== [SKIPPED] xe_guc_g2g ===================
[20:47:57] =================== xe_mocs (2 subtests) ===================
[20:47:57] ================ xe_live_mocs_kernel_kunit ================
[20:47:57] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[20:47:57] ================ xe_live_mocs_reset_kunit =================
[20:47:57] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[20:47:57] ==================== [SKIPPED] xe_mocs =====================
[20:47:57] ================= xe_migrate (3 subtests) ==================
[20:47:57] ================= xe_migrate_sanity_kunit =================
[20:47:57] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[20:47:57] ================== xe_validate_ccs_kunit ==================
[20:47:57] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[20:47:57] ============= xe_migrate_access_memory_kunit ==============
[20:47:57] ========= [SKIPPED] xe_migrate_access_memory_kunit =========
[20:47:57] =================== [SKIPPED] xe_migrate ===================
[20:47:57] ================== xe_dma_buf (1 subtest) ==================
[20:47:57] ==================== xe_dma_buf_kunit =====================
[20:47:57] ================ [SKIPPED] xe_dma_buf_kunit ================
[20:47:57] =================== [SKIPPED] xe_dma_buf ===================
[20:47:57] ================= xe_bo_shrink (1 subtest) =================
[20:47:57] =================== xe_bo_shrink_kunit ====================
[20:47:57] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[20:47:57] ================== [SKIPPED] xe_bo_shrink ==================
[20:47:57] ==================== xe_bo (2 subtests) ====================
[20:47:57] ================== xe_ccs_migrate_kunit ===================
[20:47:57] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[20:47:57] ==================== xe_bo_evict_kunit ====================
[20:47:57] =============== [SKIPPED] xe_bo_evict_kunit ================
[20:47:57] ===================== [SKIPPED] xe_bo ======================
[20:47:57] =================== xe_any (9 subtests) ====================
[20:47:57] [PASSED] test_to_xe
[20:47:57] [PASSED] test_to_dev
[20:47:57] [PASSED] test_to_pdev
[20:47:57] [PASSED] test_to_drm
[20:47:57] [PASSED] test_if_pdev
[20:47:57] [PASSED] test_if_xe
[20:47:57] [PASSED] test_if_tile
[20:47:57] [PASSED] test_if_gt
[20:47:57] [PASSED] test_to_id
[20:47:57] ===================== [PASSED] xe_any ======================
[20:47:57] ==================== args (13 subtests) ====================
[20:47:57] [PASSED] count_args_test
[20:47:57] [PASSED] call_args_example
[20:47:57] [PASSED] call_args_test
[20:47:57] [PASSED] drop_first_arg_example
[20:47:57] [PASSED] drop_first_arg_test
[20:47:57] [PASSED] first_arg_example
[20:47:57] [PASSED] first_arg_test
[20:47:57] [PASSED] last_arg_example
[20:47:57] [PASSED] last_arg_test
[20:47:57] [PASSED] pick_arg_example
[20:47:57] [PASSED] if_args_example
[20:47:57] [PASSED] if_args_test
[20:47:57] [PASSED] sep_comma_example
[20:47:57] ====================== [PASSED] args =======================
[20:47:57] =================== xe_pci (3 subtests) ====================
[20:47:57] ==================== check_graphics_ip ====================
[20:47:57] [PASSED] 12.00 Xe_LP
[20:47:57] [PASSED] 12.10 Xe_LP+
[20:47:57] [PASSED] 12.55 Xe_HPG
[20:47:57] [PASSED] 12.60 Xe_HPC
[20:47:57] [PASSED] 12.70 Xe_LPG
[20:47:57] [PASSED] 12.71 Xe_LPG
[20:47:57] [PASSED] 12.74 Xe_LPG+
[20:47:57] [PASSED] 20.01 Xe2_HPG
[20:47:57] [PASSED] 20.02 Xe2_HPG
[20:47:57] [PASSED] 20.04 Xe2_LPG
[20:47:57] [PASSED] 30.00 Xe3_LPG
[20:47:57] [PASSED] 30.01 Xe3_LPG
[20:47:57] [PASSED] 30.03 Xe3_LPG
[20:47:57] [PASSED] 30.04 Xe3_LPG
[20:47:57] [PASSED] 30.05 Xe3_LPG
[20:47:57] [PASSED] 35.10 Xe3p_LPG
[20:47:57] [PASSED] 35.11 Xe3p_XPC
[20:47:57] ================ [PASSED] check_graphics_ip ================
[20:47:57] ===================== check_media_ip ======================
[20:47:57] [PASSED] 12.00 Xe_M
[20:47:57] [PASSED] 12.55 Xe_HPM
[20:47:57] [PASSED] 13.00 Xe_LPM+
[20:47:57] [PASSED] 13.01 Xe2_HPM
[20:47:57] [PASSED] 20.00 Xe2_LPM
[20:47:57] [PASSED] 30.00 Xe3_LPM
[20:47:57] [PASSED] 30.02 Xe3_LPM
[20:47:57] [PASSED] 35.00 Xe3p_LPM
[20:47:57] [PASSED] 35.03 Xe3p_HPM
[20:47:57] ================= [PASSED] check_media_ip ==================
[20:47:57] =================== check_platform_desc ===================
[20:47:57] [PASSED] 0x9A60 (TIGERLAKE)
[20:47:57] [PASSED] 0x9A68 (TIGERLAKE)
[20:47:57] [PASSED] 0x9A70 (TIGERLAKE)
[20:47:57] [PASSED] 0x9A40 (TIGERLAKE)
[20:47:57] [PASSED] 0x9A49 (TIGERLAKE)
[20:47:57] [PASSED] 0x9A59 (TIGERLAKE)
[20:47:57] [PASSED] 0x9A78 (TIGERLAKE)
[20:47:57] [PASSED] 0x9AC0 (TIGERLAKE)
[20:47:57] [PASSED] 0x9AC9 (TIGERLAKE)
[20:47:57] [PASSED] 0x9AD9 (TIGERLAKE)
[20:47:57] [PASSED] 0x9AF8 (TIGERLAKE)
[20:47:57] [PASSED] 0x4C80 (ROCKETLAKE)
[20:47:57] [PASSED] 0x4C8A (ROCKETLAKE)
[20:47:57] [PASSED] 0x4C8B (ROCKETLAKE)
[20:47:57] [PASSED] 0x4C8C (ROCKETLAKE)
[20:47:57] [PASSED] 0x4C90 (ROCKETLAKE)
[20:47:57] [PASSED] 0x4C9A (ROCKETLAKE)
[20:47:57] [PASSED] 0x4680 (ALDERLAKE_S)
[20:47:57] [PASSED] 0x4682 (ALDERLAKE_S)
[20:47:57] [PASSED] 0x4688 (ALDERLAKE_S)
[20:47:57] [PASSED] 0x468A (ALDERLAKE_S)
[20:47:57] [PASSED] 0x468B (ALDERLAKE_S)
[20:47:57] [PASSED] 0x4690 (ALDERLAKE_S)
[20:47:57] [PASSED] 0x4692 (ALDERLAKE_S)
[20:47:57] [PASSED] 0x4693 (ALDERLAKE_S)
[20:47:57] [PASSED] 0x46A0 (ALDERLAKE_P)
[20:47:57] [PASSED] 0x46A1 (ALDERLAKE_P)
[20:47:57] [PASSED] 0x46A2 (ALDERLAKE_P)
[20:47:57] [PASSED] 0x46A3 (ALDERLAKE_P)
[20:47:57] [PASSED] 0x46A6 (ALDERLAKE_P)
[20:47:57] [PASSED] 0x46A8 (ALDERLAKE_P)
[20:47:57] [PASSED] 0x46AA (ALDERLAKE_P)
[20:47:57] [PASSED] 0x462A (ALDERLAKE_P)
[20:47:57] [PASSED] 0x4626 (ALDERLAKE_P)
[20:47:57] [PASSED] 0x4628 (ALDERLAKE_P)
[20:47:57] [PASSED] 0x46B0 (ALDERLAKE_P)
[20:47:57] [PASSED] 0x46B1 (ALDERLAKE_P)
[20:47:57] [PASSED] 0x46B2 (ALDERLAKE_P)
[20:47:57] [PASSED] 0x46B3 (ALDERLAKE_P)
[20:47:57] [PASSED] 0x46C0 (ALDERLAKE_P)
[20:47:57] [PASSED] 0x46C1 (ALDERLAKE_P)
[20:47:57] [PASSED] 0x46C2 (ALDERLAKE_P)
[20:47:57] [PASSED] 0x46C3 (ALDERLAKE_P)
[20:47:57] [PASSED] 0x46D0 (ALDERLAKE_N)
[20:47:57] [PASSED] 0x46D1 (ALDERLAKE_N)
[20:47:57] [PASSED] 0x46D2 (ALDERLAKE_N)
[20:47:57] [PASSED] 0x46D3 (ALDERLAKE_N)
[20:47:57] [PASSED] 0x46D4 (ALDERLAKE_N)
[20:47:57] [PASSED] 0xA721 (ALDERLAKE_P)
[20:47:57] [PASSED] 0xA7A1 (ALDERLAKE_P)
[20:47:57] [PASSED] 0xA7A9 (ALDERLAKE_P)
[20:47:57] [PASSED] 0xA7AC (ALDERLAKE_P)
[20:47:57] [PASSED] 0xA7AD (ALDERLAKE_P)
[20:47:57] [PASSED] 0xA720 (ALDERLAKE_P)
[20:47:57] [PASSED] 0xA7A0 (ALDERLAKE_P)
[20:47:57] [PASSED] 0xA7A8 (ALDERLAKE_P)
[20:47:57] [PASSED] 0xA7AA (ALDERLAKE_P)
[20:47:57] [PASSED] 0xA7AB (ALDERLAKE_P)
[20:47:57] [PASSED] 0xA780 (ALDERLAKE_S)
[20:47:57] [PASSED] 0xA781 (ALDERLAKE_S)
[20:47:57] [PASSED] 0xA782 (ALDERLAKE_S)
[20:47:57] [PASSED] 0xA783 (ALDERLAKE_S)
[20:47:57] [PASSED] 0xA788 (ALDERLAKE_S)
[20:47:57] [PASSED] 0xA789 (ALDERLAKE_S)
[20:47:57] [PASSED] 0xA78A (ALDERLAKE_S)
[20:47:57] [PASSED] 0xA78B (ALDERLAKE_S)
[20:47:57] [PASSED] 0x4905 (DG1)
[20:47:57] [PASSED] 0x4906 (DG1)
[20:47:57] [PASSED] 0x4907 (DG1)
[20:47:57] [PASSED] 0x4908 (DG1)
[20:47:57] [PASSED] 0x4909 (DG1)
[20:47:57] [PASSED] 0x56C0 (DG2)
[20:47:57] [PASSED] 0x56C2 (DG2)
[20:47:57] [PASSED] 0x56C1 (DG2)
[20:47:57] [PASSED] 0x7D51 (METEORLAKE)
[20:47:57] [PASSED] 0x7DD1 (METEORLAKE)
[20:47:57] [PASSED] 0x7D41 (METEORLAKE)
[20:47:57] [PASSED] 0x7D67 (METEORLAKE)
[20:47:57] [PASSED] 0xB640 (METEORLAKE)
[20:47:57] [PASSED] 0x56A0 (DG2)
[20:47:57] [PASSED] 0x56A1 (DG2)
[20:47:57] [PASSED] 0x56A2 (DG2)
[20:47:57] [PASSED] 0x56BE (DG2)
[20:47:57] [PASSED] 0x56BF (DG2)
[20:47:57] [PASSED] 0x5690 (DG2)
[20:47:57] [PASSED] 0x5691 (DG2)
[20:47:57] [PASSED] 0x5692 (DG2)
[20:47:57] [PASSED] 0x56A5 (DG2)
[20:47:57] [PASSED] 0x56A6 (DG2)
[20:47:57] [PASSED] 0x56B0 (DG2)
[20:47:57] [PASSED] 0x56B1 (DG2)
[20:47:57] [PASSED] 0x56BA (DG2)
[20:47:57] [PASSED] 0x56BB (DG2)
[20:47:57] [PASSED] 0x56BC (DG2)
[20:47:57] [PASSED] 0x56BD (DG2)
[20:47:57] [PASSED] 0x5693 (DG2)
[20:47:57] [PASSED] 0x5694 (DG2)
[20:47:57] [PASSED] 0x5695 (DG2)
[20:47:57] [PASSED] 0x56A3 (DG2)
[20:47:57] [PASSED] 0x56A4 (DG2)
[20:47:57] [PASSED] 0x56B2 (DG2)
[20:47:57] [PASSED] 0x56B3 (DG2)
[20:47:57] [PASSED] 0x5696 (DG2)
[20:47:57] [PASSED] 0x5697 (DG2)
[20:47:57] [PASSED] 0xB69 (PVC)
[20:47:57] [PASSED] 0xB6E (PVC)
[20:47:57] [PASSED] 0xBD4 (PVC)
[20:47:57] [PASSED] 0xBD5 (PVC)
[20:47:57] [PASSED] 0xBD6 (PVC)
[20:47:57] [PASSED] 0xBD7 (PVC)
[20:47:57] [PASSED] 0xBD8 (PVC)
[20:47:57] [PASSED] 0xBD9 (PVC)
[20:47:57] [PASSED] 0xBDA (PVC)
[20:47:57] [PASSED] 0xBDB (PVC)
[20:47:57] [PASSED] 0xBE0 (PVC)
[20:47:57] [PASSED] 0xBE1 (PVC)
[20:47:57] [PASSED] 0xBE5 (PVC)
[20:47:57] [PASSED] 0x7D40 (METEORLAKE)
[20:47:57] [PASSED] 0x7D45 (METEORLAKE)
[20:47:57] [PASSED] 0x7D55 (METEORLAKE)
[20:47:57] [PASSED] 0x7D60 (METEORLAKE)
[20:47:57] [PASSED] 0x7DD5 (METEORLAKE)
[20:47:57] [PASSED] 0x6420 (LUNARLAKE)
[20:47:57] [PASSED] 0x64A0 (LUNARLAKE)
[20:47:57] [PASSED] 0x64B0 (LUNARLAKE)
[20:47:57] [PASSED] 0xE202 (BATTLEMAGE)
[20:47:57] [PASSED] 0xE209 (BATTLEMAGE)
[20:47:57] [PASSED] 0xE20B (BATTLEMAGE)
[20:47:57] [PASSED] 0xE20C (BATTLEMAGE)
[20:47:57] [PASSED] 0xE20D (BATTLEMAGE)
[20:47:57] [PASSED] 0xE210 (BATTLEMAGE)
[20:47:57] [PASSED] 0xE211 (BATTLEMAGE)
[20:47:57] [PASSED] 0xE212 (BATTLEMAGE)
[20:47:57] [PASSED] 0xE216 (BATTLEMAGE)
[20:47:57] [PASSED] 0xE220 (BATTLEMAGE)
[20:47:57] [PASSED] 0xE221 (BATTLEMAGE)
[20:47:57] [PASSED] 0xE222 (BATTLEMAGE)
[20:47:57] [PASSED] 0xE223 (BATTLEMAGE)
[20:47:57] [PASSED] 0xB080 (PANTHERLAKE)
[20:47:57] [PASSED] 0xB081 (PANTHERLAKE)
[20:47:57] [PASSED] 0xB082 (PANTHERLAKE)
[20:47:57] [PASSED] 0xB083 (PANTHERLAKE)
[20:47:57] [PASSED] 0xB084 (PANTHERLAKE)
[20:47:57] [PASSED] 0xB085 (PANTHERLAKE)
[20:47:57] [PASSED] 0xB086 (PANTHERLAKE)
[20:47:57] [PASSED] 0xB087 (PANTHERLAKE)
[20:47:57] [PASSED] 0xB08F (PANTHERLAKE)
[20:47:57] [PASSED] 0xB090 (PANTHERLAKE)
[20:47:57] [PASSED] 0xB0A0 (PANTHERLAKE)
[20:47:57] [PASSED] 0xB0A1 (PANTHERLAKE)
[20:47:57] [PASSED] 0xB0B0 (PANTHERLAKE)
[20:47:57] [PASSED] 0xFD80 (PANTHERLAKE)
[20:47:57] [PASSED] 0xFD81 (PANTHERLAKE)
[20:47:57] [PASSED] 0xD740 (NOVALAKE_S)
[20:47:57] [PASSED] 0xD741 (NOVALAKE_S)
[20:47:57] [PASSED] 0xD742 (NOVALAKE_S)
[20:47:57] [PASSED] 0xD743 (NOVALAKE_S)
[20:47:57] [PASSED] 0xD745 (NOVALAKE_S)
[20:47:57] [PASSED] 0xD74A (NOVALAKE_S)
[20:47:57] [PASSED] 0xD74B (NOVALAKE_S)
[20:47:57] [PASSED] 0x674C (CRESCENTISLAND)
[20:47:57] [PASSED] 0x674D (CRESCENTISLAND)
[20:47:57] [PASSED] 0x674E (CRESCENTISLAND)
[20:47:57] [PASSED] 0x674F (CRESCENTISLAND)
[20:47:57] [PASSED] 0x6750 (CRESCENTISLAND)
[20:47:57] [PASSED] 0x6751 (CRESCENTISLAND)
[20:47:57] [PASSED] 0x6752 (CRESCENTISLAND)
[20:47:57] [PASSED] 0xD750 (NOVALAKE_P)
[20:47:57] [PASSED] 0xD751 (NOVALAKE_P)
[20:47:57] [PASSED] 0xD752 (NOVALAKE_P)
[20:47:57] [PASSED] 0xD753 (NOVALAKE_P)
[20:47:57] [PASSED] 0xD754 (NOVALAKE_P)
[20:47:57] [PASSED] 0xD755 (NOVALAKE_P)
[20:47:57] [PASSED] 0xD756 (NOVALAKE_P)
[20:47:57] [PASSED] 0xD757 (NOVALAKE_P)
[20:47:57] [PASSED] 0xD75F (NOVALAKE_P)
[20:47:57] =============== [PASSED] check_platform_desc ===============
[20:47:57] ===================== [PASSED] xe_pci ======================
[20:47:57] ============= xe_rtp_tables_test (5 subtests) ==============
[20:47:57] ================== xe_rtp_table_gt_test ===================
[20:47:57] [PASSED] gt_was/14011060649
[20:47:57] [PASSED] gt_was/14011059788
[20:47:57] [PASSED] gt_was/14015795083
[20:47:57] [PASSED] gt_was/16021867713
[20:47:57] [PASSED] gt_was/14019449301
[20:47:57] [PASSED] gt_was/16028005424
[20:47:57] [PASSED] gt_was/14026578760
[20:47:57] [PASSED] gt_was/1409420604
[20:47:57] [PASSED] gt_was/1408615072
[20:47:57] [PASSED] gt_was/22010523718
[20:47:57] [PASSED] gt_was/14011006942
[20:47:57] [PASSED] gt_was/14014830051
[20:47:57] [PASSED] gt_was/18018781329
[20:47:57] [PASSED] gt_was/1509235366
[20:47:57] [PASSED] gt_was/18018781329
[20:47:57] [PASSED] gt_was/16016694945
[20:47:57] [PASSED] gt_was/14018575942
[20:47:57] [PASSED] gt_was/22016670082
[20:47:57] [PASSED] gt_was/22016670082
[20:47:57] [PASSED] gt_was/14017421178
[20:47:57] [PASSED] gt_was/16025250150
[20:47:57] [PASSED] gt_was/14021871409
[20:47:57] [PASSED] gt_was/16021865536
[20:47:57] [PASSED] gt_was/14021486841
[20:47:57] [PASSED] gt_was/14025160223
[20:47:57] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[20:47:57] [PASSED] gt_was/14025635424
[20:47:57] [PASSED] gt_was/16028005424
[20:47:57] ============== [PASSED] xe_rtp_table_gt_test ===============
[20:47:57] ================== xe_rtp_table_gt_test ===================
[20:47:57] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[20:47:57] [PASSED] gt_tunings/Tuning: 32B Access Enable
[20:47:57] [PASSED] gt_tunings/Tuning: L3 cache
[20:47:57] [PASSED] gt_tunings/Tuning: L3 cache - media
[20:47:57] [PASSED] gt_tunings/Tuning: Compression Overfetch
[20:47:57] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[20:47:57] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[20:47:57] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[20:47:57] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[20:47:57] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[20:47:57] [PASSED] gt_tunings/Tuning: Stateless compression control
[20:47:57] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[20:47:57] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[20:47:57] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[20:47:57] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[20:47:57] [PASSED] gt_tunings/Tuning: Force All Non-Compressible Memory Reads to be 256B Overfetches
[20:47:57] ============== [PASSED] xe_rtp_table_gt_test ===============
[20:47:57] ================== xe_rtp_table_oob_test ==================
[20:47:57] [PASSED] oob_was/1607983814
[20:47:57] [PASSED] oob_was/16010904313
[20:47:57] [PASSED] oob_was/18022495364
[20:47:57] [PASSED] oob_was/22012773006
[20:47:57] [PASSED] oob_was/14014475959
[20:47:57] [PASSED] oob_was/22011391025
[20:47:57] [PASSED] oob_was/22012727170
[20:47:57] [PASSED] oob_was/22012727685
[20:47:57] [PASSED] oob_was/22016596838
[20:47:57] [PASSED] oob_was/18020744125
[20:47:57] [PASSED] oob_was/1409600907
[20:47:57] [PASSED] oob_was/22014953428
[20:47:57] [PASSED] oob_was/16017236439
[20:47:57] [PASSED] oob_was/14019821291
[20:47:57] [PASSED] oob_was/14015076503
[20:47:57] [PASSED] oob_was/22016122933
[20:47:57] [PASSED] oob_was/14018913170
[20:47:57] [PASSED] oob_was/14018094691
[20:47:57] [PASSED] oob_was/18024947630
[20:47:57] [PASSED] oob_was/16022287689
[20:47:57] [PASSED] oob_was/13011645652
[20:47:57] [PASSED] oob_was/14022293748
[20:47:57] [PASSED] oob_was/22019794406
[20:47:57] [PASSED] oob_was/22019338487
[20:47:57] [PASSED] oob_was/16023588340
[20:47:57] [PASSED] oob_was/14019789679
[20:47:57] [PASSED] oob_was/14022866841
[20:47:57] [PASSED] oob_was/16021333562
[20:47:57] [PASSED] oob_was/14016712196
[20:47:57] [PASSED] oob_was/14015568240
[20:47:57] [PASSED] oob_was/18013179988
[20:47:57] [PASSED] oob_was/1508761755
[20:47:57] [PASSED] oob_was/16023105232
[20:47:57] [PASSED] oob_was/16026508708
[20:47:57] [PASSED] oob_was/14020001231
[20:47:57] [PASSED] oob_was/16023683509
[20:47:57] [PASSED] oob_was/14025515070
[20:47:57] [PASSED] oob_was/15015404425_disable
[20:47:57] [PASSED] oob_was/16026007364
[20:47:57] [PASSED] oob_was/14020316580
[20:47:57] [PASSED] oob_was/14025883347
[20:47:57] [PASSED] oob_was/16029380221
[20:47:57] [PASSED] oob_was/22022079272
[20:47:57] [PASSED] oob_was/16029897822
[20:47:57] [PASSED] oob_was/14026539277
[20:47:57] [PASSED] oob_was/14027054324
[20:47:57] [PASSED] oob_was/14025941587
[20:47:57] [PASSED] oob_was/16030224309
[20:47:57] [PASSED] oob_was/14028709524
[20:47:57] ============== [PASSED] xe_rtp_table_oob_test ==============
[20:47:57] ================ xe_rtp_table_dev_oob_test ================
[20:47:57] [PASSED] device_oob_was/22010954014
[20:47:57] [PASSED] device_oob_was/15015404425
[20:47:57] [PASSED] device_oob_was/22019338487_display
[20:47:57] [PASSED] device_oob_was/14022085890
[20:47:57] [PASSED] device_oob_was/14026633728
[20:47:57] [PASSED] device_oob_was/14026746987
[20:47:57] [PASSED] device_oob_was/14026779378
[20:47:57] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[20:47:57] ========== xe_rtp_table_missing_upper_bound_test ==========
[20:47:57] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[20:47:57] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[20:47:57] [PASSED] register_whitelist/1806527549
[20:47:57] [PASSED] register_whitelist/allow_read_ctx_timestamp
[20:47:57] [PASSED] register_whitelist/allow_read_queue_timestamp
[20:47:57] [PASSED] register_whitelist/16014440446
[20:47:57] [PASSED] register_whitelist/16017236439
[20:47:57] [PASSED] register_whitelist/16020183090
[20:47:57] [PASSED] register_whitelist/14024997852
[20:47:57] [PASSED] register_whitelist/14024997852
[20:47:57] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[20:47:57] =============== [PASSED] xe_rtp_tables_test ================
[20:47:57] =================== xe_rtp (3 subtests) ====================
[20:47:57] =================== xe_rtp_rules_tests ====================
[20:47:57] [PASSED] no
[20:47:57] [PASSED] yes
[20:47:57] [PASSED] no-and-no
[20:47:57] [PASSED] no-and-yes
[20:47:57] [PASSED] yes-and-no
[20:47:57] [PASSED] yes-and-yes
[20:47:57] [PASSED] no-or-no
[20:47:57] [PASSED] no-or-yes
[20:47:57] [PASSED] yes-or-no
[20:47:57] [PASSED] yes-or-yes
[20:47:57] [PASSED] no-yes-or-yes-no
[20:47:57] [PASSED] no-yes-or-yes-yes
[20:47:57] [PASSED] yes-yes-or-no-yes
[20:47:57] [PASSED] yes-yes-or-yes-yes
[20:47:57] [PASSED] no-no-or-yes-or-no
[20:47:57] [PASSED] or
[20:47:57] [PASSED] or-yes
[20:47:57] [PASSED] or-no
[20:47:57] [PASSED] yes-or
[20:47:57] [PASSED] no-or
[20:47:57] [PASSED] no-or-or-yes
[20:47:57] [PASSED] yes-or-or-no
[20:47:57] [PASSED] no-or-or-no
[20:47:57] [PASSED] missing-context-engine-class
[20:47:57] [PASSED] missing-context-engine-class-or-yes
[20:47:57] [PASSED] missing-context-engine-class-or-or-yes
[20:47:57] =============== [PASSED] xe_rtp_rules_tests ================
[20:47:57] =============== xe_rtp_process_to_sr_tests ================
[20:47:57] [PASSED] coalesce-same-reg
[20:47:57] [PASSED] coalesce-same-reg-literal-and-func
[20:47:57] [PASSED] no-match-no-add
[20:47:57] [PASSED] two-regs-two-entries
[20:47:57] [PASSED] clr-one-set-other
[20:47:57] [PASSED] set-field
[20:47:57] [PASSED] conflict-duplicate
[20:47:57] [PASSED] conflict-not-disjoint
[20:47:57] [PASSED] conflict-not-disjoint-literal-and-func
[20:47:57] [PASSED] conflict-reg-type
[20:47:57] [PASSED] bad-mcr-reg-forced-to-regular
[20:47:57] [PASSED] bad-regular-reg-forced-to-mcr
[20:47:57] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[20:47:57] ================== xe_rtp_process_tests ===================
[20:47:57] [PASSED] active1
[20:47:57] [PASSED] active2
[20:47:57] [PASSED] active-inactive
[20:47:57] [PASSED] inactive-active
[20:47:57] [PASSED] inactive-active-inactive
[20:47:57] [PASSED] inactive-inactive-inactive
[20:47:57] ============== [PASSED] xe_rtp_process_tests ===============
[20:47:57] ===================== [PASSED] xe_rtp ======================
[20:47:57] ==================== xe_wa (1 subtest) =====================
[20:47:57] ======================== xe_wa_gt =========================
[20:47:57] [PASSED] TIGERLAKE B0
[20:47:57] [PASSED] DG1 A0
[20:47:57] [PASSED] DG1 B0
[20:47:57] [PASSED] ALDERLAKE_S A0
[20:47:57] [PASSED] ALDERLAKE_S B0
[20:47:57] [PASSED] ALDERLAKE_S C0
[20:47:57] [PASSED] ALDERLAKE_S D0
[20:47:57] [PASSED] ALDERLAKE_P A0
[20:47:57] [PASSED] ALDERLAKE_P B0
[20:47:57] [PASSED] ALDERLAKE_P C0
[20:47:57] [PASSED] ALDERLAKE_S RPLS D0
[20:47:57] [PASSED] ALDERLAKE_P RPLU E0
[20:47:57] [PASSED] DG2 G10 C0
[20:47:57] [PASSED] DG2 G11 B1
[20:47:57] [PASSED] DG2 G12 A1
[20:47:57] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[20:47:57] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[20:47:57] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[20:47:57] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[20:47:57] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[20:47:57] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[20:47:57] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[20:47:57] ==================== [PASSED] xe_wa_gt =====================
[20:47:57] ====================== [PASSED] xe_wa ======================
[20:47:57] ============================================================
[20:47:57] Testing complete. Ran 840 tests: passed: 811, skipped: 29
[20:47:57] Elapsed time: 41.566s total, 2.551s configuring, 38.299s building, 0.707s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[20:47:57] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:48:00] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[20:48:25] Starting KUnit Kernel (1/1)...
[20:48:25] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:48:25] ============ drm_test_pick_cmdline (2 subtests) ============
[20:48:25] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[20:48:25] =============== drm_test_pick_cmdline_named ===============
[20:48:25] [PASSED] NTSC
[20:48:25] [PASSED] NTSC-J
[20:48:25] [PASSED] PAL
[20:48:25] [PASSED] PAL-M
[20:48:25] =========== [PASSED] drm_test_pick_cmdline_named ===========
[20:48:25] ============== [PASSED] drm_test_pick_cmdline ==============
[20:48:25] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[20:48:25] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[20:48:25] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[20:48:25] =========== drm_validate_clone_mode (2 subtests) ===========
[20:48:25] ============== drm_test_check_in_clone_mode ===============
[20:48:25] [PASSED] in_clone_mode
[20:48:25] [PASSED] not_in_clone_mode
[20:48:25] ========== [PASSED] drm_test_check_in_clone_mode ===========
[20:48:25] =============== drm_test_check_valid_clones ===============
[20:48:25] [PASSED] not_in_clone_mode
[20:48:25] [PASSED] valid_clone
[20:48:25] [PASSED] invalid_clone
[20:48:25] =========== [PASSED] drm_test_check_valid_clones ===========
[20:48:25] ============= [PASSED] drm_validate_clone_mode =============
[20:48:25] ============= drm_validate_modeset (1 subtest) =============
[20:48:25] [PASSED] drm_test_check_connector_changed_modeset
[20:48:25] ============== [PASSED] drm_validate_modeset ===============
[20:48:25] ====== drm_test_bridge_get_current_state (1 subtest) =======
[20:48:25] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[20:48:25] ======== [PASSED] drm_test_bridge_get_current_state ========
[20:48:25] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[20:48:25] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[20:48:25] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[20:48:25] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[20:48:25] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[20:48:25] ============== drm_bridge_alloc (2 subtests) ===============
[20:48:25] [PASSED] drm_test_drm_bridge_alloc_basic
[20:48:25] [PASSED] drm_test_drm_bridge_alloc_get_put
[20:48:25] ================ [PASSED] drm_bridge_alloc =================
[20:48:25] ============= drm_bridge_bus_fmt (5 subtests) ==============
[20:48:25] [PASSED] drm_test_bridge_rgb_yuv_rgb
[20:48:25] [PASSED] drm_test_bridge_must_convert_to_yuv444
[20:48:25] [PASSED] drm_test_bridge_hdmi_auto_rgb
[20:48:25] [PASSED] drm_test_bridge_auto_first
[20:48:25] [PASSED] drm_test_bridge_rgb_yuv_no_path
[20:48:25] =============== [PASSED] drm_bridge_bus_fmt ================
[20:48:25] ============= drm_cmdline_parser (40 subtests) =============
[20:48:25] [PASSED] drm_test_cmdline_force_d_only
[20:48:25] [PASSED] drm_test_cmdline_force_D_only_dvi
[20:48:25] [PASSED] drm_test_cmdline_force_D_only_hdmi
[20:48:25] [PASSED] drm_test_cmdline_force_D_only_not_digital
[20:48:25] [PASSED] drm_test_cmdline_force_e_only
[20:48:25] [PASSED] drm_test_cmdline_res
[20:48:25] [PASSED] drm_test_cmdline_res_vesa
[20:48:25] [PASSED] drm_test_cmdline_res_vesa_rblank
[20:48:25] [PASSED] drm_test_cmdline_res_rblank
[20:48:25] [PASSED] drm_test_cmdline_res_bpp
[20:48:25] [PASSED] drm_test_cmdline_res_refresh
[20:48:25] [PASSED] drm_test_cmdline_res_bpp_refresh
[20:48:25] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[20:48:25] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[20:48:25] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[20:48:25] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[20:48:25] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[20:48:25] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[20:48:25] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[20:48:25] [PASSED] drm_test_cmdline_res_margins_force_on
[20:48:25] [PASSED] drm_test_cmdline_res_vesa_margins
[20:48:25] [PASSED] drm_test_cmdline_name
[20:48:25] [PASSED] drm_test_cmdline_name_bpp
[20:48:25] [PASSED] drm_test_cmdline_name_option
[20:48:25] [PASSED] drm_test_cmdline_name_bpp_option
[20:48:25] [PASSED] drm_test_cmdline_rotate_0
[20:48:25] [PASSED] drm_test_cmdline_rotate_90
[20:48:25] [PASSED] drm_test_cmdline_rotate_180
[20:48:25] [PASSED] drm_test_cmdline_rotate_270
[20:48:25] [PASSED] drm_test_cmdline_hmirror
[20:48:25] [PASSED] drm_test_cmdline_vmirror
[20:48:25] [PASSED] drm_test_cmdline_margin_options
[20:48:25] [PASSED] drm_test_cmdline_multiple_options
[20:48:25] [PASSED] drm_test_cmdline_bpp_extra_and_option
[20:48:25] [PASSED] drm_test_cmdline_extra_and_option
[20:48:25] [PASSED] drm_test_cmdline_freestanding_options
[20:48:25] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[20:48:25] [PASSED] drm_test_cmdline_panel_orientation
[20:48:25] ================ drm_test_cmdline_invalid =================
[20:48:25] [PASSED] margin_only
[20:48:25] [PASSED] interlace_only
[20:48:25] [PASSED] res_missing_x
[20:48:25] [PASSED] res_missing_y
[20:48:25] [PASSED] res_bad_y
[20:48:25] [PASSED] res_missing_y_bpp
[20:48:25] [PASSED] res_bad_bpp
[20:48:25] [PASSED] res_bad_refresh
[20:48:25] [PASSED] res_bpp_refresh_force_on_off
[20:48:25] [PASSED] res_invalid_mode
[20:48:25] [PASSED] res_bpp_wrong_place_mode
[20:48:25] [PASSED] name_bpp_refresh
[20:48:25] [PASSED] name_refresh
[20:48:25] [PASSED] name_refresh_wrong_mode
[20:48:25] [PASSED] name_refresh_invalid_mode
[20:48:25] [PASSED] rotate_multiple
[20:48:25] [PASSED] rotate_invalid_val
[20:48:25] [PASSED] rotate_truncated
[20:48:25] [PASSED] invalid_option
[20:48:25] [PASSED] invalid_tv_option
[20:48:25] [PASSED] truncated_tv_option
[20:48:25] ============ [PASSED] drm_test_cmdline_invalid =============
[20:48:25] =============== drm_test_cmdline_tv_options ===============
[20:48:25] [PASSED] NTSC
[20:48:25] [PASSED] NTSC_443
[20:48:25] [PASSED] NTSC_J
[20:48:25] [PASSED] PAL
[20:48:25] [PASSED] PAL_M
[20:48:25] [PASSED] PAL_N
[20:48:25] [PASSED] SECAM
[20:48:25] [PASSED] MONO_525
[20:48:25] [PASSED] MONO_625
[20:48:25] =========== [PASSED] drm_test_cmdline_tv_options ===========
[20:48:25] =============== [PASSED] drm_cmdline_parser ================
[20:48:25] ========== drmm_connector_hdmi_init (20 subtests) ==========
[20:48:25] [PASSED] drm_test_connector_hdmi_init_valid
[20:48:25] [PASSED] drm_test_connector_hdmi_init_bpc_8
[20:48:25] [PASSED] drm_test_connector_hdmi_init_bpc_10
[20:48:25] [PASSED] drm_test_connector_hdmi_init_bpc_12
[20:48:25] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[20:48:25] [PASSED] drm_test_connector_hdmi_init_bpc_null
[20:48:25] [PASSED] drm_test_connector_hdmi_init_formats_empty
[20:48:25] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[20:48:25] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[20:48:25] [PASSED] supported_formats=0x9 yuv420_allowed=1
[20:48:25] [PASSED] supported_formats=0x9 yuv420_allowed=0
[20:48:25] [PASSED] supported_formats=0x5 yuv420_allowed=1
[20:48:25] [PASSED] supported_formats=0x5 yuv420_allowed=0
[20:48:25] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[20:48:25] [PASSED] drm_test_connector_hdmi_init_null_ddc
[20:48:25] [PASSED] drm_test_connector_hdmi_init_null_product
[20:48:25] [PASSED] drm_test_connector_hdmi_init_null_vendor
[20:48:25] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[20:48:25] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[20:48:25] [PASSED] drm_test_connector_hdmi_init_product_valid
[20:48:25] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[20:48:25] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[20:48:25] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[20:48:25] ========= drm_test_connector_hdmi_init_type_valid =========
[20:48:25] [PASSED] HDMI-A
[20:48:25] [PASSED] HDMI-B
[20:48:25] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[20:48:25] ======== drm_test_connector_hdmi_init_type_invalid ========
[20:48:25] [PASSED] Unknown
[20:48:25] [PASSED] VGA
[20:48:25] [PASSED] DVI-I
[20:48:25] [PASSED] DVI-D
[20:48:25] [PASSED] DVI-A
[20:48:25] [PASSED] Composite
[20:48:25] [PASSED] SVIDEO
[20:48:25] [PASSED] LVDS
[20:48:25] [PASSED] Component
[20:48:25] [PASSED] DIN
[20:48:25] [PASSED] DP
[20:48:25] [PASSED] TV
[20:48:25] [PASSED] eDP
[20:48:25] [PASSED] Virtual
[20:48:25] [PASSED] DSI
[20:48:25] [PASSED] DPI
[20:48:25] [PASSED] Writeback
[20:48:25] [PASSED] SPI
[20:48:25] [PASSED] USB
[20:48:25] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[20:48:25] ============ [PASSED] drmm_connector_hdmi_init =============
[20:48:25] ============= drmm_connector_init (3 subtests) =============
[20:48:25] [PASSED] drm_test_drmm_connector_init
[20:48:25] [PASSED] drm_test_drmm_connector_init_null_ddc
[20:48:25] ========= drm_test_drmm_connector_init_type_valid =========
[20:48:25] [PASSED] Unknown
[20:48:25] [PASSED] VGA
[20:48:25] [PASSED] DVI-I
[20:48:25] [PASSED] DVI-D
[20:48:25] [PASSED] DVI-A
[20:48:25] [PASSED] Composite
[20:48:25] [PASSED] SVIDEO
[20:48:25] [PASSED] LVDS
[20:48:25] [PASSED] Component
[20:48:25] [PASSED] DIN
[20:48:25] [PASSED] DP
[20:48:25] [PASSED] HDMI-A
[20:48:25] [PASSED] HDMI-B
[20:48:25] [PASSED] TV
[20:48:25] [PASSED] eDP
[20:48:25] [PASSED] Virtual
[20:48:25] [PASSED] DSI
[20:48:25] [PASSED] DPI
[20:48:25] [PASSED] Writeback
[20:48:25] [PASSED] SPI
[20:48:25] [PASSED] USB
[20:48:25] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[20:48:25] =============== [PASSED] drmm_connector_init ===============
[20:48:25] ========= drm_connector_dynamic_init (6 subtests) ==========
[20:48:25] [PASSED] drm_test_drm_connector_dynamic_init
[20:48:25] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[20:48:25] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[20:48:25] [PASSED] drm_test_drm_connector_dynamic_init_properties
[20:48:25] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[20:48:25] [PASSED] Unknown
[20:48:25] [PASSED] VGA
[20:48:25] [PASSED] DVI-I
[20:48:25] [PASSED] DVI-D
[20:48:25] [PASSED] DVI-A
[20:48:25] [PASSED] Composite
[20:48:25] [PASSED] SVIDEO
[20:48:25] [PASSED] LVDS
[20:48:25] [PASSED] Component
[20:48:25] [PASSED] DIN
[20:48:25] [PASSED] DP
[20:48:25] [PASSED] HDMI-A
[20:48:25] [PASSED] HDMI-B
[20:48:25] [PASSED] TV
[20:48:25] [PASSED] eDP
[20:48:25] [PASSED] Virtual
[20:48:25] [PASSED] DSI
[20:48:25] [PASSED] DPI
[20:48:25] [PASSED] Writeback
[20:48:25] [PASSED] SPI
[20:48:25] [PASSED] USB
[20:48:25] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[20:48:25] ======== drm_test_drm_connector_dynamic_init_name =========
[20:48:25] [PASSED] Unknown
[20:48:25] [PASSED] VGA
[20:48:25] [PASSED] DVI-I
[20:48:25] [PASSED] DVI-D
[20:48:25] [PASSED] DVI-A
[20:48:25] [PASSED] Composite
[20:48:25] [PASSED] SVIDEO
[20:48:25] [PASSED] LVDS
[20:48:25] [PASSED] Component
[20:48:25] [PASSED] DIN
[20:48:25] [PASSED] DP
[20:48:25] [PASSED] HDMI-A
[20:48:25] [PASSED] HDMI-B
[20:48:25] [PASSED] TV
[20:48:25] [PASSED] eDP
[20:48:25] [PASSED] Virtual
[20:48:25] [PASSED] DSI
[20:48:25] [PASSED] DPI
[20:48:25] [PASSED] Writeback
[20:48:25] [PASSED] SPI
[20:48:25] [PASSED] USB
[20:48:25] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[20:48:25] =========== [PASSED] drm_connector_dynamic_init ============
[20:48:25] ==== drm_connector_dynamic_register_early (4 subtests) =====
[20:48:25] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[20:48:25] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[20:48:25] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[20:48:25] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[20:48:25] ====== [PASSED] drm_connector_dynamic_register_early =======
[20:48:25] ======= drm_connector_dynamic_register (7 subtests) ========
[20:48:25] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[20:48:25] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[20:48:25] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[20:48:25] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[20:48:25] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[20:48:25] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[20:48:25] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[20:48:25] ========= [PASSED] drm_connector_dynamic_register ==========
[20:48:25] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[20:48:25] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[20:48:25] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[20:48:25] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[20:48:25] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[20:48:25] ========== drm_test_get_tv_mode_from_name_valid ===========
[20:48:25] [PASSED] NTSC
[20:48:25] [PASSED] NTSC-443
[20:48:25] [PASSED] NTSC-J
[20:48:25] [PASSED] PAL
[20:48:25] [PASSED] PAL-M
[20:48:25] [PASSED] PAL-N
[20:48:25] [PASSED] SECAM
[20:48:25] [PASSED] Mono
[20:48:25] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[20:48:25] [PASSED] drm_test_get_tv_mode_from_name_truncated
[20:48:25] ============ [PASSED] drm_get_tv_mode_from_name ============
[20:48:25] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[20:48:25] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[20:48:25] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[20:48:25] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[20:48:25] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[20:48:25] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[20:48:25] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[20:48:25] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[20:48:25] [PASSED] VIC 96
[20:48:25] [PASSED] VIC 97
[20:48:25] [PASSED] VIC 101
[20:48:25] [PASSED] VIC 102
[20:48:25] [PASSED] VIC 106
[20:48:25] [PASSED] VIC 107
[20:48:25] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[20:48:25] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[20:48:25] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[20:48:25] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[20:48:25] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[20:48:25] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[20:48:25] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[20:48:25] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[20:48:25] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[20:48:25] [PASSED] Automatic
[20:48:25] [PASSED] Full
[20:48:25] [PASSED] Limited 16:235
[20:48:25] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[20:48:25] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[20:48:25] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[20:48:25] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[20:48:25] === drm_test_drm_hdmi_connector_get_output_format_name ====
[20:48:25] [PASSED] RGB
[20:48:25] [PASSED] YUV 4:2:0
[20:48:25] [PASSED] YUV 4:2:2
[20:48:25] [PASSED] YUV 4:4:4
[20:48:25] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[20:48:25] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[20:48:25] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[20:48:25] ============= drm_damage_helper (21 subtests) ==============
[20:48:25] [PASSED] drm_test_damage_iter_no_damage
[20:48:25] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[20:48:25] [PASSED] drm_test_damage_iter_no_damage_src_moved
[20:48:25] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[20:48:25] [PASSED] drm_test_damage_iter_no_damage_not_visible
[20:48:25] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[20:48:25] [PASSED] drm_test_damage_iter_no_damage_no_fb
[20:48:25] [PASSED] drm_test_damage_iter_simple_damage
[20:48:25] [PASSED] drm_test_damage_iter_single_damage
[20:48:25] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[20:48:25] [PASSED] drm_test_damage_iter_single_damage_outside_src
[20:48:25] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[20:48:25] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[20:48:25] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[20:48:25] [PASSED] drm_test_damage_iter_single_damage_src_moved
[20:48:25] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[20:48:25] [PASSED] drm_test_damage_iter_damage
[20:48:25] [PASSED] drm_test_damage_iter_damage_one_intersect
[20:48:25] [PASSED] drm_test_damage_iter_damage_one_outside
[20:48:25] [PASSED] drm_test_damage_iter_damage_src_moved
[20:48:25] [PASSED] drm_test_damage_iter_damage_not_visible
[20:48:25] ================ [PASSED] drm_damage_helper ================
[20:48:25] ============== drm_dp_mst_helper (3 subtests) ==============
[20:48:25] ============== drm_test_dp_mst_calc_pbn_mode ==============
[20:48:25] [PASSED] Clock 154000 BPP 30 DSC disabled
[20:48:25] [PASSED] Clock 234000 BPP 30 DSC disabled
[20:48:25] [PASSED] Clock 297000 BPP 24 DSC disabled
[20:48:25] [PASSED] Clock 332880 BPP 24 DSC enabled
[20:48:25] [PASSED] Clock 324540 BPP 24 DSC enabled
[20:48:25] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[20:48:25] ============== drm_test_dp_mst_calc_pbn_div ===============
[20:48:25] [PASSED] Link rate 2000000 lane count 4
[20:48:25] [PASSED] Link rate 2000000 lane count 2
[20:48:25] [PASSED] Link rate 2000000 lane count 1
[20:48:25] [PASSED] Link rate 1350000 lane count 4
[20:48:25] [PASSED] Link rate 1350000 lane count 2
[20:48:25] [PASSED] Link rate 1350000 lane count 1
[20:48:25] [PASSED] Link rate 1000000 lane count 4
[20:48:25] [PASSED] Link rate 1000000 lane count 2
[20:48:25] [PASSED] Link rate 1000000 lane count 1
[20:48:25] [PASSED] Link rate 810000 lane count 4
[20:48:25] [PASSED] Link rate 810000 lane count 2
[20:48:25] [PASSED] Link rate 810000 lane count 1
[20:48:25] [PASSED] Link rate 540000 lane count 4
[20:48:25] [PASSED] Link rate 540000 lane count 2
[20:48:25] [PASSED] Link rate 540000 lane count 1
[20:48:25] [PASSED] Link rate 270000 lane count 4
[20:48:25] [PASSED] Link rate 270000 lane count 2
[20:48:25] [PASSED] Link rate 270000 lane count 1
[20:48:25] [PASSED] Link rate 162000 lane count 4
[20:48:25] [PASSED] Link rate 162000 lane count 2
[20:48:25] [PASSED] Link rate 162000 lane count 1
[20:48:25] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[20:48:25] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[20:48:25] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[20:48:25] [PASSED] DP_POWER_UP_PHY with port number
[20:48:25] [PASSED] DP_POWER_DOWN_PHY with port number
[20:48:25] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[20:48:25] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[20:48:25] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[20:48:25] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[20:48:25] [PASSED] DP_QUERY_PAYLOAD with port number
[20:48:25] [PASSED] DP_QUERY_PAYLOAD with VCPI
[20:48:25] [PASSED] DP_REMOTE_DPCD_READ with port number
[20:48:25] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[20:48:25] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[20:48:25] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[20:48:25] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[20:48:25] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[20:48:25] [PASSED] DP_REMOTE_I2C_READ with port number
[20:48:25] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[20:48:25] [PASSED] DP_REMOTE_I2C_READ with transactions array
[20:48:25] [PASSED] DP_REMOTE_I2C_WRITE with port number
[20:48:25] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[20:48:25] [PASSED] DP_REMOTE_I2C_WRITE with data array
[20:48:25] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[20:48:25] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[20:48:25] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[20:48:25] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[20:48:25] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[20:48:25] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[20:48:25] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[20:48:25] ================ [PASSED] drm_dp_mst_helper ================
[20:48:25] ================== drm_exec (7 subtests) ===================
[20:48:25] [PASSED] sanitycheck
[20:48:25] [PASSED] test_lock
[20:48:25] [PASSED] test_lock_unlock
[20:48:25] [PASSED] test_duplicates
[20:48:25] [PASSED] test_prepare
[20:48:25] [PASSED] test_prepare_array
[20:48:25] [PASSED] test_multiple_loops
[20:48:25] ==================== [PASSED] drm_exec =====================
[20:48:25] =========== drm_format_helper_test (17 subtests) ===========
[20:48:25] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[20:48:25] [PASSED] single_pixel_source_buffer
[20:48:25] [PASSED] single_pixel_clip_rectangle
[20:48:25] [PASSED] well_known_colors
[20:48:25] [PASSED] destination_pitch
[20:48:25] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[20:48:25] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[20:48:25] [PASSED] single_pixel_source_buffer
[20:48:25] [PASSED] single_pixel_clip_rectangle
[20:48:25] [PASSED] well_known_colors
[20:48:25] [PASSED] destination_pitch
[20:48:25] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[20:48:25] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[20:48:25] [PASSED] single_pixel_source_buffer
[20:48:25] [PASSED] single_pixel_clip_rectangle
[20:48:25] [PASSED] well_known_colors
[20:48:25] [PASSED] destination_pitch
[20:48:25] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[20:48:25] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[20:48:25] [PASSED] single_pixel_source_buffer
[20:48:25] [PASSED] single_pixel_clip_rectangle
[20:48:25] [PASSED] well_known_colors
[20:48:25] [PASSED] destination_pitch
[20:48:25] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[20:48:25] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[20:48:25] [PASSED] single_pixel_source_buffer
[20:48:25] [PASSED] single_pixel_clip_rectangle
[20:48:25] [PASSED] well_known_colors
[20:48:25] [PASSED] destination_pitch
[20:48:25] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[20:48:25] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[20:48:25] [PASSED] single_pixel_source_buffer
[20:48:25] [PASSED] single_pixel_clip_rectangle
[20:48:25] [PASSED] well_known_colors
[20:48:25] [PASSED] destination_pitch
[20:48:25] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[20:48:25] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[20:48:25] [PASSED] single_pixel_source_buffer
[20:48:25] [PASSED] single_pixel_clip_rectangle
[20:48:25] [PASSED] well_known_colors
[20:48:25] [PASSED] destination_pitch
[20:48:25] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[20:48:25] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[20:48:25] [PASSED] single_pixel_source_buffer
[20:48:25] [PASSED] single_pixel_clip_rectangle
[20:48:25] [PASSED] well_known_colors
[20:48:25] [PASSED] destination_pitch
[20:48:25] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[20:48:25] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[20:48:25] [PASSED] single_pixel_source_buffer
[20:48:25] [PASSED] single_pixel_clip_rectangle
[20:48:25] [PASSED] well_known_colors
[20:48:25] [PASSED] destination_pitch
[20:48:25] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[20:48:25] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[20:48:25] [PASSED] single_pixel_source_buffer
[20:48:25] [PASSED] single_pixel_clip_rectangle
[20:48:25] [PASSED] well_known_colors
[20:48:25] [PASSED] destination_pitch
[20:48:25] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[20:48:25] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[20:48:25] [PASSED] single_pixel_source_buffer
[20:48:25] [PASSED] single_pixel_clip_rectangle
[20:48:25] [PASSED] well_known_colors
[20:48:25] [PASSED] destination_pitch
[20:48:25] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[20:48:25] ============== drm_test_fb_xrgb8888_to_mono ===============
[20:48:25] [PASSED] single_pixel_source_buffer
[20:48:25] [PASSED] single_pixel_clip_rectangle
[20:48:25] [PASSED] well_known_colors
[20:48:25] [PASSED] destination_pitch
[20:48:25] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[20:48:25] ==================== drm_test_fb_swab =====================
[20:48:25] [PASSED] single_pixel_source_buffer
[20:48:25] [PASSED] single_pixel_clip_rectangle
[20:48:25] [PASSED] well_known_colors
[20:48:25] [PASSED] destination_pitch
[20:48:25] ================ [PASSED] drm_test_fb_swab =================
[20:48:25] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[20:48:25] [PASSED] single_pixel_source_buffer
[20:48:25] [PASSED] single_pixel_clip_rectangle
[20:48:25] [PASSED] well_known_colors
[20:48:25] [PASSED] destination_pitch
[20:48:25] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[20:48:25] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[20:48:25] [PASSED] single_pixel_source_buffer
[20:48:25] [PASSED] single_pixel_clip_rectangle
[20:48:25] [PASSED] well_known_colors
[20:48:25] [PASSED] destination_pitch
[20:48:25] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[20:48:25] ================= drm_test_fb_clip_offset =================
[20:48:25] [PASSED] pass through
[20:48:25] [PASSED] horizontal offset
[20:48:25] [PASSED] vertical offset
[20:48:25] [PASSED] horizontal and vertical offset
[20:48:25] [PASSED] horizontal offset (custom pitch)
[20:48:25] [PASSED] vertical offset (custom pitch)
[20:48:25] [PASSED] horizontal and vertical offset (custom pitch)
[20:48:25] ============= [PASSED] drm_test_fb_clip_offset =============
[20:48:25] =================== drm_test_fb_memcpy ====================
[20:48:25] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[20:48:25] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[20:48:25] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[20:48:25] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[20:48:25] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[20:48:25] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[20:48:25] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[20:48:25] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[20:48:25] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[20:48:25] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[20:48:25] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[20:48:25] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[20:48:25] =============== [PASSED] drm_test_fb_memcpy ================
[20:48:25] ============= [PASSED] drm_format_helper_test ==============
[20:48:25] ================= drm_format (18 subtests) =================
[20:48:25] [PASSED] drm_test_format_block_width_invalid
[20:48:25] [PASSED] drm_test_format_block_width_one_plane
[20:48:25] [PASSED] drm_test_format_block_width_two_plane
[20:48:25] [PASSED] drm_test_format_block_width_three_plane
[20:48:25] [PASSED] drm_test_format_block_width_tiled
[20:48:25] [PASSED] drm_test_format_block_height_invalid
[20:48:25] [PASSED] drm_test_format_block_height_one_plane
[20:48:25] [PASSED] drm_test_format_block_height_two_plane
[20:48:25] [PASSED] drm_test_format_block_height_three_plane
[20:48:25] [PASSED] drm_test_format_block_height_tiled
[20:48:25] [PASSED] drm_test_format_min_pitch_invalid
[20:48:25] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[20:48:25] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[20:48:25] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[20:48:25] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[20:48:25] [PASSED] drm_test_format_min_pitch_two_plane
[20:48:25] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[20:48:25] [PASSED] drm_test_format_min_pitch_tiled
[20:48:25] =================== [PASSED] drm_format ====================
[20:48:25] ============== drm_framebuffer (10 subtests) ===============
[20:48:25] ========== drm_test_framebuffer_check_src_coords ==========
[20:48:25] [PASSED] Success: source fits into fb
[20:48:25] [PASSED] Fail: overflowing fb with x-axis coordinate
[20:48:25] [PASSED] Fail: overflowing fb with y-axis coordinate
[20:48:25] [PASSED] Fail: overflowing fb with source width
[20:48:25] [PASSED] Fail: overflowing fb with source height
[20:48:25] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[20:48:25] [PASSED] drm_test_framebuffer_cleanup
[20:48:25] =============== drm_test_framebuffer_create ===============
[20:48:25] [PASSED] ABGR8888 normal sizes
[20:48:25] [PASSED] ABGR8888 max sizes
[20:48:25] [PASSED] ABGR8888 pitch greater than min required
[20:48:25] [PASSED] ABGR8888 pitch less than min required
[20:48:25] [PASSED] ABGR8888 Invalid width
[20:48:25] [PASSED] ABGR8888 Invalid buffer handle
[20:48:25] [PASSED] No pixel format
[20:48:25] [PASSED] ABGR8888 Width 0
[20:48:25] [PASSED] ABGR8888 Height 0
[20:48:25] [PASSED] ABGR8888 Out of bound height * pitch combination
[20:48:25] [PASSED] ABGR8888 Large buffer offset
[20:48:25] [PASSED] ABGR8888 Buffer offset for inexistent plane
[20:48:25] [PASSED] ABGR8888 Invalid flag
[20:48:25] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[20:48:25] [PASSED] ABGR8888 Valid buffer modifier
[20:48:25] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[20:48:25] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[20:48:25] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[20:48:25] [PASSED] NV12 Normal sizes
[20:48:25] [PASSED] NV12 Max sizes
[20:48:25] [PASSED] NV12 Invalid pitch
[20:48:25] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[20:48:25] [PASSED] NV12 different modifier per-plane
[20:48:25] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[20:48:25] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[20:48:25] [PASSED] NV12 Modifier for inexistent plane
[20:48:25] [PASSED] NV12 Handle for inexistent plane
[20:48:25] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[20:48:25] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[20:48:25] [PASSED] YVU420 Normal sizes
[20:48:25] [PASSED] YVU420 Max sizes
[20:48:25] [PASSED] YVU420 Invalid pitch
[20:48:25] [PASSED] YVU420 Different pitches
[20:48:25] [PASSED] YVU420 Different buffer offsets/pitches
[20:48:25] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[20:48:25] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[20:48:25] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[20:48:25] [PASSED] YVU420 Valid modifier
[20:48:25] [PASSED] YVU420 Different modifiers per plane
[20:48:25] [PASSED] YVU420 Modifier for inexistent plane
[20:48:25] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[20:48:25] [PASSED] X0L2 Normal sizes
[20:48:25] [PASSED] X0L2 Max sizes
[20:48:25] [PASSED] X0L2 Invalid pitch
[20:48:25] [PASSED] X0L2 Pitch greater than minimum required
[20:48:25] [PASSED] X0L2 Handle for inexistent plane
[20:48:25] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[20:48:25] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[20:48:25] [PASSED] X0L2 Valid modifier
[20:48:25] [PASSED] X0L2 Modifier for inexistent plane
[20:48:25] =========== [PASSED] drm_test_framebuffer_create ===========
[20:48:25] [PASSED] drm_test_framebuffer_free
[20:48:25] [PASSED] drm_test_framebuffer_init
[20:48:25] [PASSED] drm_test_framebuffer_init_bad_format
[20:48:25] [PASSED] drm_test_framebuffer_init_dev_mismatch
[20:48:25] [PASSED] drm_test_framebuffer_lookup
[20:48:25] [PASSED] drm_test_framebuffer_lookup_inexistent
[20:48:25] [PASSED] drm_test_framebuffer_modifiers_not_supported
[20:48:25] ================= [PASSED] drm_framebuffer =================
[20:48:25] ================ drm_gem_shmem (8 subtests) ================
[20:48:25] [PASSED] drm_gem_shmem_test_obj_create
[20:48:25] [PASSED] drm_gem_shmem_test_obj_create_private
[20:48:25] [PASSED] drm_gem_shmem_test_pin_pages
[20:48:25] [PASSED] drm_gem_shmem_test_vmap
[20:48:25] [PASSED] drm_gem_shmem_test_get_sg_table
[20:48:25] [PASSED] drm_gem_shmem_test_get_pages_sgt
[20:48:25] [PASSED] drm_gem_shmem_test_madvise
[20:48:25] [PASSED] drm_gem_shmem_test_purge
[20:48:25] ================== [PASSED] drm_gem_shmem ==================
[20:48:25] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[20:48:25] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[20:48:25] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[20:48:25] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[20:48:25] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[20:48:25] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[20:48:25] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[20:48:25] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[20:48:25] [PASSED] Automatic
[20:48:25] [PASSED] Full
[20:48:25] [PASSED] Limited 16:235
[20:48:25] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[20:48:25] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[20:48:25] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[20:48:25] [PASSED] drm_test_check_disable_connector
[20:48:25] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[20:48:25] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[20:48:25] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[20:48:25] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[20:48:25] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[20:48:25] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[20:48:25] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[20:48:25] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[20:48:25] [PASSED] drm_test_check_output_bpc_dvi
[20:48:25] [PASSED] drm_test_check_output_bpc_format_vic_1
[20:48:25] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[20:48:25] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[20:48:25] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[20:48:25] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[20:48:25] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[20:48:25] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[20:48:25] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[20:48:25] ============ drm_test_check_hdmi_color_format =============
[20:48:25] [PASSED] AUTO -> RGB
[20:48:25] [PASSED] YCBCR422 -> YUV422
[20:48:25] [PASSED] YCBCR420 -> YUV420
[20:48:25] [PASSED] YCBCR444 -> YUV444
[20:48:25] [PASSED] RGB -> RGB
[20:48:25] ======== [PASSED] drm_test_check_hdmi_color_format =========
[20:48:25] ======== drm_test_check_hdmi_color_format_420_only ========
[20:48:25] [PASSED] RGB should fail
[20:48:25] [PASSED] YUV444 should fail
[20:48:25] [PASSED] YUV422 should fail
[20:48:25] [PASSED] YUV420 should work
[20:48:25] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[20:48:25] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[20:48:25] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[20:48:25] [PASSED] drm_test_check_broadcast_rgb_value
[20:48:25] [PASSED] drm_test_check_bpc_8_value
[20:48:25] [PASSED] drm_test_check_bpc_10_value
[20:48:25] [PASSED] drm_test_check_bpc_12_value
[20:48:25] [PASSED] drm_test_check_format_value
[20:48:25] [PASSED] drm_test_check_tmds_char_value
[20:48:25] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[20:48:25] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[20:48:25] [PASSED] drm_test_check_mode_valid
[20:48:25] [PASSED] drm_test_check_mode_valid_reject
[20:48:25] [PASSED] drm_test_check_mode_valid_reject_rate
[20:48:25] [PASSED] drm_test_check_mode_valid_reject_max_clock
[20:48:25] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[20:48:25] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[20:48:25] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[20:48:25] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[20:48:25] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[20:48:25] [PASSED] drm_test_check_infoframes
[20:48:25] [PASSED] drm_test_check_reject_avi_infoframe
[20:48:25] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[20:48:25] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[20:48:25] [PASSED] drm_test_check_reject_audio_infoframe
[20:48:25] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[20:48:25] ================= drm_managed (2 subtests) =================
[20:48:25] [PASSED] drm_test_managed_release_action
[20:48:25] [PASSED] drm_test_managed_run_action
[20:48:25] =================== [PASSED] drm_managed ===================
[20:48:25] =================== drm_mm (6 subtests) ====================
[20:48:25] [PASSED] drm_test_mm_init
[20:48:25] [PASSED] drm_test_mm_debug
[20:48:25] [PASSED] drm_test_mm_align32
[20:48:25] [PASSED] drm_test_mm_align64
[20:48:25] [PASSED] drm_test_mm_lowest
[20:48:25] [PASSED] drm_test_mm_highest
[20:48:25] ===================== [PASSED] drm_mm ======================
[20:48:25] ============= drm_modes_analog_tv (5 subtests) =============
[20:48:25] [PASSED] drm_test_modes_analog_tv_mono_576i
[20:48:25] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[20:48:25] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[20:48:25] [PASSED] drm_test_modes_analog_tv_pal_576i
[20:48:25] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[20:48:25] =============== [PASSED] drm_modes_analog_tv ===============
[20:48:25] ============== drm_panic_helper (3 subtests) ===============
[20:48:25] ============= drm_test_panic_screen_user_map ==============
[20:48:25] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[20:48:25] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[20:48:25] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[20:48:25] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[20:48:25] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[20:48:25] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[20:48:25] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[20:48:25] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[20:48:25] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[20:48:25] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[20:48:25] ========= [PASSED] drm_test_panic_screen_user_map ==========
[20:48:25] ============= drm_test_panic_screen_user_page =============
[20:48:25] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[20:48:25] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[20:48:25] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[20:48:25] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[20:48:25] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[20:48:25] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[20:48:25] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[20:48:25] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[20:48:25] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[20:48:25] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[20:48:25] ========= [PASSED] drm_test_panic_screen_user_page =========
[20:48:25] ========== drm_test_panic_screen_user_set_pixel ===========
[20:48:25] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[20:48:25] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[20:48:25] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[20:48:25] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[20:48:25] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[20:48:25] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[20:48:25] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[20:48:25] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[20:48:25] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[20:48:25] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[20:48:25] ====== [PASSED] drm_test_panic_screen_user_set_pixel =======
[20:48:25] ================ [PASSED] drm_panic_helper =================
[20:48:25] ============== drm_plane_helper (2 subtests) ===============
[20:48:25] =============== drm_test_check_plane_state ================
[20:48:25] [PASSED] clipping_simple
[20:48:25] [PASSED] clipping_rotate_reflect
[20:48:25] [PASSED] positioning_simple
[20:48:25] [PASSED] upscaling
[20:48:25] [PASSED] downscaling
[20:48:25] [PASSED] rounding1
[20:48:25] [PASSED] rounding2
[20:48:25] [PASSED] rounding3
[20:48:25] [PASSED] rounding4
[20:48:25] =========== [PASSED] drm_test_check_plane_state ============
[20:48:25] =========== drm_test_check_invalid_plane_state ============
[20:48:25] [PASSED] positioning_invalid
[20:48:25] [PASSED] upscaling_invalid
[20:48:25] [PASSED] downscaling_invalid
[20:48:25] ======= [PASSED] drm_test_check_invalid_plane_state ========
[20:48:25] ================ [PASSED] drm_plane_helper =================
[20:48:25] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[20:48:25] ====== drm_test_connector_helper_tv_get_modes_check =======
[20:48:25] [PASSED] None
[20:48:25] [PASSED] PAL
[20:48:25] [PASSED] NTSC
[20:48:25] [PASSED] Both, NTSC Default
[20:48:25] [PASSED] Both, PAL Default
[20:48:25] [PASSED] Both, NTSC Default, with PAL on command-line
[20:48:25] [PASSED] Both, PAL Default, with NTSC on command-line
[20:48:25] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[20:48:25] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[20:48:25] ================== drm_rect (9 subtests) ===================
[20:48:25] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[20:48:25] [PASSED] drm_test_rect_clip_scaled_not_clipped
[20:48:25] [PASSED] drm_test_rect_clip_scaled_clipped
[20:48:25] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[20:48:25] ================= drm_test_rect_intersect =================
[20:48:25] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[20:48:25] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[20:48:25] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[20:48:25] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[20:48:25] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[20:48:25] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[20:48:25] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[20:48:25] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[20:48:25] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[20:48:25] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[20:48:25] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[20:48:25] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[20:48:25] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[20:48:25] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[20:48:25] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[20:48:25] ============= [PASSED] drm_test_rect_intersect =============
[20:48:25] ================ drm_test_rect_calc_hscale ================
[20:48:25] [PASSED] normal use
[20:48:25] [PASSED] out of max range
[20:48:25] [PASSED] out of min range
[20:48:25] [PASSED] zero dst
[20:48:25] [PASSED] negative src
[20:48:25] [PASSED] negative dst
[20:48:25] ============ [PASSED] drm_test_rect_calc_hscale ============
[20:48:25] ================ drm_test_rect_calc_vscale ================
[20:48:25] [PASSED] normal use
[20:48:25] [PASSED] out of max range
[20:48:25] [PASSED] out of min range
[20:48:25] [PASSED] zero dst
[20:48:25] [PASSED] negative src
[20:48:25] [PASSED] negative dst
[20:48:25] ============ [PASSED] drm_test_rect_calc_vscale ============
[20:48:25] ================== drm_test_rect_rotate ===================
[20:48:25] [PASSED] reflect-x
[20:48:25] [PASSED] reflect-y
[20:48:25] [PASSED] rotate-0
[20:48:25] [PASSED] rotate-90
[20:48:25] [PASSED] rotate-180
[20:48:25] [PASSED] rotate-270
[20:48:25] ============== [PASSED] drm_test_rect_rotate ===============
[20:48:25] ================ drm_test_rect_rotate_inv =================
[20:48:25] [PASSED] reflect-x
[20:48:25] [PASSED] reflect-y
[20:48:25] [PASSED] rotate-0
[20:48:25] [PASSED] rotate-90
[20:48:25] [PASSED] rotate-180
[20:48:25] [PASSED] rotate-270
[20:48:25] ============ [PASSED] drm_test_rect_rotate_inv =============
[20:48:25] ==================== [PASSED] drm_rect =====================
[20:48:25] ============ drm_sysfb_modeset_test (1 subtest) ============
[20:48:25] ============ drm_test_sysfb_build_fourcc_list =============
[20:48:25] [PASSED] no native formats
[20:48:25] [PASSED] XRGB8888 as native format
[20:48:25] [PASSED] remove duplicates
[20:48:25] [PASSED] convert alpha formats
[20:48:25] [PASSED] random formats
[20:48:25] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[20:48:25] ============= [PASSED] drm_sysfb_modeset_test ==============
[20:48:25] ================== drm_fixp (2 subtests) ===================
[20:48:25] [PASSED] drm_test_int2fixp
[20:48:25] [PASSED] drm_test_sm2fixp
[20:48:25] ==================== [PASSED] drm_fixp =====================
[20:48:25] ============================================================
[20:48:25] Testing complete. Ran 667 tests: passed: 667
[20:48:25] Elapsed time: 28.136s total, 2.521s configuring, 25.196s building, 0.408s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[20:48:25] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:48:28] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[20:48:38] Starting KUnit Kernel (1/1)...
[20:48:38] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:48:38] ================= ttm_device (5 subtests) ==================
[20:48:38] [PASSED] ttm_device_init_basic
[20:48:38] [PASSED] ttm_device_init_multiple
[20:48:38] [PASSED] ttm_device_fini_basic
[20:48:38] [PASSED] ttm_device_init_no_vma_man
[20:48:38] ================== ttm_device_init_pools ==================
[20:48:38] [PASSED] No DMA allocations, no DMA32 required
[20:48:38] [PASSED] DMA allocations, DMA32 required
[20:48:38] [PASSED] No DMA allocations, DMA32 required
[20:48:38] [PASSED] DMA allocations, no DMA32 required
[20:48:38] ============== [PASSED] ttm_device_init_pools ==============
[20:48:38] =================== [PASSED] ttm_device ====================
[20:48:38] ================== ttm_pool (8 subtests) ===================
[20:48:38] ================== ttm_pool_alloc_basic ===================
[20:48:38] [PASSED] One page
[20:48:38] [PASSED] More than one page
[20:48:38] [PASSED] Above the allocation limit
[20:48:38] [PASSED] One page, with coherent DMA mappings enabled
[20:48:38] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[20:48:38] ============== [PASSED] ttm_pool_alloc_basic ===============
[20:48:38] ============== ttm_pool_alloc_basic_dma_addr ==============
[20:48:38] [PASSED] One page
[20:48:38] [PASSED] More than one page
[20:48:38] [PASSED] Above the allocation limit
[20:48:38] [PASSED] One page, with coherent DMA mappings enabled
[20:48:38] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[20:48:38] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[20:48:38] [PASSED] ttm_pool_alloc_order_caching_match
[20:48:38] [PASSED] ttm_pool_alloc_caching_mismatch
[20:48:38] [PASSED] ttm_pool_alloc_order_mismatch
[20:48:38] [PASSED] ttm_pool_free_dma_alloc
[20:48:38] [PASSED] ttm_pool_free_no_dma_alloc
[20:48:38] [PASSED] ttm_pool_fini_basic
[20:48:38] ==================== [PASSED] ttm_pool =====================
[20:48:38] ================ ttm_resource (8 subtests) =================
[20:48:38] ================= ttm_resource_init_basic =================
[20:48:38] [PASSED] Init resource in TTM_PL_SYSTEM
[20:48:38] [PASSED] Init resource in TTM_PL_VRAM
[20:48:38] [PASSED] Init resource in a private placement
[20:48:38] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[20:48:38] ============= [PASSED] ttm_resource_init_basic =============
[20:48:38] [PASSED] ttm_resource_init_pinned
[20:48:38] [PASSED] ttm_resource_fini_basic
[20:48:38] [PASSED] ttm_resource_manager_init_basic
[20:48:38] [PASSED] ttm_resource_manager_usage_basic
[20:48:38] [PASSED] ttm_resource_manager_set_used_basic
[20:48:38] [PASSED] ttm_sys_man_alloc_basic
[20:48:38] [PASSED] ttm_sys_man_free_basic
[20:48:38] ================== [PASSED] ttm_resource ===================
[20:48:38] =================== ttm_tt (15 subtests) ===================
[20:48:38] ==================== ttm_tt_init_basic ====================
[20:48:38] [PASSED] Page-aligned size
[20:48:38] [PASSED] Extra pages requested
[20:48:38] ================ [PASSED] ttm_tt_init_basic ================
[20:48:38] [PASSED] ttm_tt_init_misaligned
[20:48:38] [PASSED] ttm_tt_fini_basic
[20:48:38] [PASSED] ttm_tt_fini_sg
[20:48:38] [PASSED] ttm_tt_fini_shmem
[20:48:38] [PASSED] ttm_tt_create_basic
[20:48:38] [PASSED] ttm_tt_create_invalid_bo_type
[20:48:38] [PASSED] ttm_tt_create_ttm_exists
[20:48:38] [PASSED] ttm_tt_create_failed
[20:48:38] [PASSED] ttm_tt_destroy_basic
[20:48:38] [PASSED] ttm_tt_populate_null_ttm
[20:48:38] [PASSED] ttm_tt_populate_populated_ttm
[20:48:38] [PASSED] ttm_tt_unpopulate_basic
[20:48:38] [PASSED] ttm_tt_unpopulate_empty_ttm
[20:48:38] [PASSED] ttm_tt_swapin_basic
[20:48:38] ===================== [PASSED] ttm_tt ======================
[20:48:38] =================== ttm_bo (14 subtests) ===================
[20:48:38] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[20:48:38] [PASSED] Cannot be interrupted and sleeps
[20:48:38] [PASSED] Cannot be interrupted, locks straight away
[20:48:38] [PASSED] Can be interrupted, sleeps
[20:48:38] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[20:48:38] [PASSED] ttm_bo_reserve_locked_no_sleep
[20:48:38] [PASSED] ttm_bo_reserve_no_wait_ticket
[20:48:38] [PASSED] ttm_bo_reserve_double_resv
[20:48:38] [PASSED] ttm_bo_reserve_interrupted
[20:48:38] [PASSED] ttm_bo_reserve_deadlock
[20:48:38] [PASSED] ttm_bo_unreserve_basic
[20:48:38] [PASSED] ttm_bo_unreserve_pinned
[20:48:38] [PASSED] ttm_bo_unreserve_bulk
[20:48:38] [PASSED] ttm_bo_fini_basic
[20:48:38] [PASSED] ttm_bo_fini_shared_resv
[20:48:38] [PASSED] ttm_bo_pin_basic
[20:48:38] [PASSED] ttm_bo_pin_unpin_resource
[20:48:38] [PASSED] ttm_bo_multiple_pin_one_unpin
[20:48:38] ===================== [PASSED] ttm_bo ======================
[20:48:38] ============== ttm_bo_validate (22 subtests) ===============
[20:48:38] ============== ttm_bo_init_reserved_sys_man ===============
[20:48:38] [PASSED] Buffer object for userspace
[20:48:38] [PASSED] Kernel buffer object
[20:48:38] [PASSED] Shared buffer object
[20:48:38] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[20:48:38] ============== ttm_bo_init_reserved_mock_man ==============
[20:48:38] [PASSED] Buffer object for userspace
[20:48:38] [PASSED] Kernel buffer object
[20:48:38] [PASSED] Shared buffer object
[20:48:38] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[20:48:38] [PASSED] ttm_bo_init_reserved_resv
[20:48:38] ================== ttm_bo_validate_basic ==================
[20:48:38] [PASSED] Buffer object for userspace
[20:48:38] [PASSED] Kernel buffer object
[20:48:38] [PASSED] Shared buffer object
[20:48:38] ============== [PASSED] ttm_bo_validate_basic ==============
[20:48:38] [PASSED] ttm_bo_validate_invalid_placement
[20:48:38] ============= ttm_bo_validate_same_placement ==============
[20:48:38] [PASSED] System manager
[20:48:38] [PASSED] VRAM manager
[20:48:38] ========= [PASSED] ttm_bo_validate_same_placement ==========
[20:48:38] [PASSED] ttm_bo_validate_failed_alloc
[20:48:38] [PASSED] ttm_bo_validate_pinned
[20:48:38] [PASSED] ttm_bo_validate_busy_placement
[20:48:38] ================ ttm_bo_validate_multihop =================
[20:48:38] [PASSED] Buffer object for userspace
[20:48:38] [PASSED] Kernel buffer object
[20:48:38] [PASSED] Shared buffer object
[20:48:38] ============ [PASSED] ttm_bo_validate_multihop =============
[20:48:38] ========== ttm_bo_validate_no_placement_signaled ==========
[20:48:38] [PASSED] Buffer object in system domain, no page vector
[20:48:38] [PASSED] Buffer object in system domain with an existing page vector
[20:48:38] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[20:48:38] ======== ttm_bo_validate_no_placement_not_signaled ========
[20:48:38] [PASSED] Buffer object for userspace
[20:48:38] [PASSED] Kernel buffer object
[20:48:38] [PASSED] Shared buffer object
[20:48:38] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[20:48:38] [PASSED] ttm_bo_validate_move_fence_signaled
[20:48:38] ========= ttm_bo_validate_move_fence_not_signaled =========
[20:48:38] [PASSED] Waits for GPU
[20:48:38] [PASSED] Tries to lock straight away
[20:48:38] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[20:48:38] [PASSED] ttm_bo_validate_swapout
[20:48:38] [PASSED] ttm_bo_validate_happy_evict
[20:48:38] [PASSED] ttm_bo_validate_all_pinned_evict
[20:48:38] [PASSED] ttm_bo_validate_allowed_only_evict
[20:48:38] [PASSED] ttm_bo_validate_deleted_evict
[20:48:38] [PASSED] ttm_bo_validate_busy_domain_evict
[20:48:38] [PASSED] ttm_bo_validate_evict_gutting
[20:48:38] [PASSED] ttm_bo_validate_recrusive_evict
[20:48:38] ================= [PASSED] ttm_bo_validate =================
[20:48:38] ============================================================
[20:48:38] Testing complete. Ran 102 tests: passed: 102
[20:48:38] Elapsed time: 12.902s total, 2.565s configuring, 10.122s building, 0.181s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[20:48:38] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:48:41] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[20:48:50] Starting KUnit Kernel (1/1)...
[20:48:50] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:48:50] =============== dma-buf-fence (12 subtests) ================
[20:48:50] [PASSED] test_sanitycheck
[20:48:50] [PASSED] test_signaling
[20:48:50] [PASSED] test_add_callback
[20:48:50] [PASSED] test_late_add_callback
[20:48:50] [PASSED] test_rm_callback
[20:48:50] [PASSED] test_late_rm_callback
[20:48:50] [PASSED] test_status
[20:48:50] [PASSED] test_error
[20:48:50] [PASSED] test_wait
[20:48:50] [PASSED] test_wait_timeout
[20:48:50] [PASSED] test_stub
[20:48:50] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[20:48:50] ================== [PASSED] dma-buf-fence ==================
[20:48:50] ============ dma-buf-fence-chain (11 subtests) =============
[20:48:50] [PASSED] test_sanitycheck
[20:48:50] [PASSED] test_find_seqno
[20:48:50] [PASSED] test_find_signaled
[20:48:50] [PASSED] test_find_out_of_order
[20:48:55] [PASSED] test_find_gap
[20:48:55] [PASSED] test_find_race
[20:48:55] [PASSED] test_signal_forward
[20:48:55] [PASSED] test_signal_backward
[20:48:55] [PASSED] test_wait_forward
[20:48:55] [PASSED] test_wait_backward
[20:48:55] [PASSED] test_wait_random
[20:48:55] =============== [PASSED] dma-buf-fence-chain ===============
[20:48:55] ============ dma-buf-fence-unwrap (11 subtests) ============
[20:48:55] [PASSED] test_sanitycheck
[20:48:55] [PASSED] test_unwrap_array
[20:48:55] [PASSED] test_unwrap_chain
[20:48:55] [PASSED] test_unwrap_chain_array
[20:48:55] [PASSED] test_unwrap_merge
[20:48:55] [PASSED] test_unwrap_merge_duplicate
[20:48:55] [PASSED] test_unwrap_merge_seqno
[20:48:55] [PASSED] test_unwrap_merge_order
[20:48:55] [PASSED] test_unwrap_merge_complex
[20:48:55] [PASSED] test_unwrap_merge_complex_seqno
[20:48:55] [PASSED] test_dedup_empty
[20:48:55] ============== [PASSED] dma-buf-fence-unwrap ===============
[20:48:55] ================ dma-buf-resv (5 subtests) =================
[20:48:55] [PASSED] test_sanitycheck
[20:48:55] ===================== test_signaling ======================
[20:48:55] [PASSED] kernel
[20:48:55] [PASSED] write
[20:48:55] [PASSED] read
[20:48:55] [PASSED] bookkeep
[20:48:55] ================= [PASSED] test_signaling ==================
[20:48:55] ====================== test_for_each ======================
[20:48:55] [PASSED] kernel
[20:48:55] [PASSED] write
[20:48:55] [PASSED] read
[20:48:55] [PASSED] bookkeep
[20:48:55] ================== [PASSED] test_for_each ==================
[20:48:55] ================= test_for_each_unlocked ==================
[20:48:55] [PASSED] kernel
[20:48:55] [PASSED] write
[20:48:55] [PASSED] read
[20:48:55] [PASSED] bookkeep
[20:48:55] ============= [PASSED] test_for_each_unlocked ==============
[20:48:55] ===================== test_get_fences =====================
[20:48:55] [PASSED] kernel
[20:48:55] [PASSED] write
[20:48:55] [PASSED] read
[20:48:55] [PASSED] bookkeep
[20:48:55] ================= [PASSED] test_get_fences =================
[20:48:55] ================== [PASSED] dma-buf-resv ===================
[20:48:55] ============================================================
[20:48:55] Testing complete. Ran 51 tests: passed: 50, skipped: 1
[20:48:55] Elapsed time: 16.734s total, 2.536s configuring, 8.875s building, 5.272s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 15+ messages in thread
* ✓ Xe.CI.BAT: success for drm/i915/irq: Clean up the GEN11_GU_MISC mess
2026-11-05 20:34 [PATCH 0/5] drm/i915/irq: Clean up the GEN11_GU_MISC mess Ville Syrjala
` (5 preceding siblings ...)
2026-11-05 20:48 ` ✓ CI.KUnit: success for drm/i915/irq: Clean up the GEN11_GU_MISC mess Patchwork
@ 2026-11-05 21:23 ` Patchwork
2026-11-06 22:22 ` ✗ Xe.CI.FULL: failure " Patchwork
7 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2026-11-05 21:23 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 1428 bytes --]
== Series Details ==
Series: drm/i915/irq: Clean up the GEN11_GU_MISC mess
URL : https://patchwork.freedesktop.org/series/177897/
State : success
== Summary ==
CI Bug Log - changes from xe-6073-44f84d69c4528c0d36dbe06ea327f41182dfcc55_BAT -> xe-pw-177897v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (15 -> 15)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-177897v1_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@core_hotunplug@unbind-rebind:
- bat-bmg-2: [PASS][1] -> [ABORT][2] ([Intel XE#9463])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6073-44f84d69c4528c0d36dbe06ea327f41182dfcc55/bat-bmg-2/igt@core_hotunplug@unbind-rebind.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/bat-bmg-2/igt@core_hotunplug@unbind-rebind.html
[Intel XE#9463]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9463
Build changes
-------------
* Linux: xe-6073-44f84d69c4528c0d36dbe06ea327f41182dfcc55 -> xe-pw-177897v1
IGT_9179: 9179
xe-6073-44f84d69c4528c0d36dbe06ea327f41182dfcc55: 44f84d69c4528c0d36dbe06ea327f41182dfcc55
xe-pw-177897v1: 177897v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/index.html
[-- Attachment #2: Type: text/html, Size: 1993 bytes --]
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 1/5] drm/i915/irq: Relocate gen11_gu_misc_irq_ack()
2026-11-05 20:34 ` [PATCH 1/5] drm/i915/irq: Relocate gen11_gu_misc_irq_ack() Ville Syrjala
@ 2026-11-06 9:18 ` Jani Nikula
0 siblings, 0 replies; 15+ messages in thread
From: Jani Nikula @ 2026-11-06 9:18 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx; +Cc: intel-xe
On Thu, 05 Nov 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The Gunit misc interrupts (GEN11_GU_MISC_*) aren't a display thing.
> Currently the irq ack/handler live in intel_display_irq.c, whereas
> the irq reset/postingstall lives in i915_irq.c.
>
> gen11_gu_misc_irq_ack() belongs with its reset/postinstall
> counterparts in i915_irq.c, so move it there. The handler we'll
> leave in the display code.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
This could be followed up with moving GEN11_GU_MISC_* macros from
include/drm/intel/intel_gmd_interrupt_regs.h to an i915 core internal
header.
> ---
> .../gpu/drm/i915/display/intel_display_irq.c | 23 ++---------------
> .../gpu/drm/i915/display/intel_display_irq.h | 3 +--
> drivers/gpu/drm/i915/i915_irq.c | 25 ++++++++++++++++---
> 3 files changed, 24 insertions(+), 27 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
> index b8d7e8de4ee8..af8d6737d36c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> @@ -1587,28 +1587,9 @@ static bool gen8_display_irq_handler(struct intel_display *display,
> return true;
> }
>
> -u32 gen11_gu_misc_irq_ack(struct intel_display *display, const u32 master_ctl)
> +void gen11_gu_misc_irq_handler(struct intel_display *display)
> {
> - u32 iir;
> -
> - if (!(master_ctl & GEN11_GU_MISC_IRQ))
> - return 0;
> -
> - intel_display_rpm_assert_block(display);
> -
> - iir = intel_de_read_fw(display, GEN11_GU_MISC_IIR);
> - if (likely(iir))
> - intel_de_write_fw(display, GEN11_GU_MISC_IIR, iir);
> -
> - intel_display_rpm_assert_unblock(display);
> -
> - return iir;
> -}
> -
> -void gen11_gu_misc_irq_handler(struct intel_display *display, const u32 iir)
> -{
> - if (iir & GEN11_GU_MISC_GSE)
> - intel_opregion_asle_intr(display);
> + intel_opregion_asle_intr(display);
> }
>
> static bool gen11_display_irq_handler(struct intel_display *display,
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h b/drivers/gpu/drm/i915/display/intel_display_irq.h
> index 84446bf53401..00dfed88eab7 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.h
> @@ -52,8 +52,7 @@ void bdw_disable_vblank(struct drm_crtc *crtc);
> void ilk_display_irq_master_disable(struct intel_display *display, u32 *de_ier, u32 *sde_ier);
> void ilk_display_irq_master_enable(struct intel_display *display, u32 de_ier, u32 sde_ier);
>
> -u32 gen11_gu_misc_irq_ack(struct intel_display *display, const u32 master_ctl);
> -void gen11_gu_misc_irq_handler(struct intel_display *display, const u32 iir);
> +void gen11_gu_misc_irq_handler(struct intel_display *display);
>
> struct intel_display_irq_state {
> u32 master_ctl;
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 932409b943ad..1d03ac90b7e2 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -491,6 +491,21 @@ static inline void gen11_master_intr_enable(void __iomem * const regs)
> raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, GEN11_MASTER_IRQ);
> }
>
> +static u32 gen11_gu_misc_irq_ack(void __iomem * const regs,
> + u32 master_ctl)
> +{
> + u32 iir;
> +
> + if (!(master_ctl & GEN11_GU_MISC_IRQ))
> + return 0;
> +
> + iir = raw_reg_read(regs, GEN11_GU_MISC_IIR);
> + if (likely(iir))
> + raw_reg_write(regs, GEN11_GU_MISC_IIR, iir);
> +
> + return iir;
> +}
> +
> static irqreturn_t gen11_irq_handler(int irq, void *arg)
> {
> struct drm_i915_private *i915 = arg;
> @@ -516,11 +531,12 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg)
> if (master_ctl & GEN11_DISPLAY_IRQ)
> intel_display_irq_handler(display, NULL);
>
> - gu_misc_iir = gen11_gu_misc_irq_ack(display, master_ctl);
> + gu_misc_iir = gen11_gu_misc_irq_ack(regs, master_ctl);
>
> gen11_master_intr_enable(regs);
>
> - gen11_gu_misc_irq_handler(display, gu_misc_iir);
> + if (gu_misc_iir & GEN11_GU_MISC_GSE)
> + gen11_gu_misc_irq_handler(display);
>
> pmu_irq_stats(i915, IRQ_HANDLED);
>
> @@ -583,11 +599,12 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg)
> if (master_ctl & GEN11_DISPLAY_IRQ)
> intel_display_irq_handler(display, NULL);
>
> - gu_misc_iir = gen11_gu_misc_irq_ack(display, master_ctl);
> + gu_misc_iir = gen11_gu_misc_irq_ack(regs, master_ctl);
>
> dg1_master_intr_enable(regs);
>
> - gen11_gu_misc_irq_handler(display, gu_misc_iir);
> + if (gu_misc_iir & GEN11_GU_MISC_GSE)
> + gen11_gu_misc_irq_handler(display);
>
> pmu_irq_stats(i915, IRQ_HANDLED);
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 2/5] drm/i915/irq: s/gen11_gu_misc_irq_handler()/intel_display_gse_irq_handler()/
2026-11-05 20:34 ` [PATCH 2/5] drm/i915/irq: s/gen11_gu_misc_irq_handler()/intel_display_gse_irq_handler()/ Ville Syrjala
@ 2026-11-06 9:20 ` Jani Nikula
0 siblings, 0 replies; 15+ messages in thread
From: Jani Nikula @ 2026-11-06 9:20 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx; +Cc: intel-xe
On Thu, 05 Nov 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Now that gen11_gu_misc_irq_handler() just handles the GSE
> interrupt let's rename it to intel_display_gse_irq_handler().
>
> And now that it's our generic GSE irq handler let's also
> call it for all the GSE interrupts signaled via actual
> display interrupts as well. The old GMCH ASLE/BLC interrupts
> I left calling intel_opregion_asle_intr() directly, just
> because the naming there makes more sense that way.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
This could be followed up with having xe_display_irq_enable() call
intel_display_gse_irq_handler() instead of intel_opregion_asle_intr().
Oh, and xe_display_irq_enable() is also misnamed.
> ---
> drivers/gpu/drm/i915/display/intel_display_irq.c | 8 ++++----
> drivers/gpu/drm/i915/display/intel_display_irq.h | 2 +-
> drivers/gpu/drm/i915/i915_irq.c | 4 ++--
> 3 files changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
> index af8d6737d36c..5430eb5245da 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> @@ -904,7 +904,7 @@ static void _ilk_display_irq_handler(struct intel_display *display, u32 de_iir)
> intel_dp_aux_irq_handler(display);
>
> if (de_iir & DE_GSE)
> - intel_opregion_asle_intr(display);
> + intel_display_gse_irq_handler(display);
>
> if (de_iir & DE_POISON)
> drm_err(display->drm, "Poison interrupt\n");
> @@ -971,7 +971,7 @@ static void _ivb_display_irq_handler(struct intel_display *display, u32 de_iir)
> intel_dp_aux_irq_handler(display);
>
> if (de_iir & DE_GSE_IVB)
> - intel_opregion_asle_intr(display);
> + intel_display_gse_irq_handler(display);
>
> for_each_pipe(display, pipe) {
> if (de_iir & DE_PIPE_VBLANK_IVB(pipe))
> @@ -1279,7 +1279,7 @@ gen8_de_misc_irq_handler(struct intel_display *display, u32 iir)
> found = true;
> }
> } else if (iir & GEN8_DE_MISC_GSE) {
> - intel_opregion_asle_intr(display);
> + intel_display_gse_irq_handler(display);
> found = true;
> }
>
> @@ -1587,7 +1587,7 @@ static bool gen8_display_irq_handler(struct intel_display *display,
> return true;
> }
>
> -void gen11_gu_misc_irq_handler(struct intel_display *display)
> +void intel_display_gse_irq_handler(struct intel_display *display)
> {
> intel_opregion_asle_intr(display);
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h b/drivers/gpu/drm/i915/display/intel_display_irq.h
> index 00dfed88eab7..1fd11328a264 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.h
> @@ -52,7 +52,7 @@ void bdw_disable_vblank(struct drm_crtc *crtc);
> void ilk_display_irq_master_disable(struct intel_display *display, u32 *de_ier, u32 *sde_ier);
> void ilk_display_irq_master_enable(struct intel_display *display, u32 de_ier, u32 sde_ier);
>
> -void gen11_gu_misc_irq_handler(struct intel_display *display);
> +void intel_display_gse_irq_handler(struct intel_display *display);
>
> struct intel_display_irq_state {
> u32 master_ctl;
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 1d03ac90b7e2..12082167face 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -536,7 +536,7 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg)
> gen11_master_intr_enable(regs);
>
> if (gu_misc_iir & GEN11_GU_MISC_GSE)
> - gen11_gu_misc_irq_handler(display);
> + intel_display_gse_irq_handler(display);
>
> pmu_irq_stats(i915, IRQ_HANDLED);
>
> @@ -604,7 +604,7 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg)
> dg1_master_intr_enable(regs);
>
> if (gu_misc_iir & GEN11_GU_MISC_GSE)
> - gen11_gu_misc_irq_handler(display);
> + intel_display_gse_irq_handler(display);
>
> pmu_irq_stats(i915, IRQ_HANDLED);
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 3/5] drm/i915/irq: Extract gen11_gu_misc_irq_postinstall()
2026-11-05 20:34 ` [PATCH 3/5] drm/i915/irq: Extract gen11_gu_misc_irq_postinstall() Ville Syrjala
@ 2026-11-06 9:22 ` Jani Nikula
0 siblings, 0 replies; 15+ messages in thread
From: Jani Nikula @ 2026-11-06 9:22 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx; +Cc: intel-xe
On Thu, 05 Nov 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Both gen11 and dg1 duplicate the same code to set up the
> GEN11_GU_MISC interrupts. Extract it to a shared helper.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/i915_irq.c | 16 ++++++++++++----
> 1 file changed, 12 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 12082167face..823d97284d78 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -725,17 +725,26 @@ static void gen8_irq_postinstall(struct drm_i915_private *dev_priv)
> gen8_master_intr_enable(intel_uncore_regs(&dev_priv->uncore));
> }
>
> +static void gen11_gu_misc_irq_postinstall(struct drm_i915_private *dev_priv)
> +{
> + struct intel_gt *gt = to_gt(dev_priv);
> + struct intel_uncore *uncore = gt->uncore;
That's a roundabout path to uncore, but *shrug*.
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> + u32 gu_misc_masked = GEN11_GU_MISC_GSE;
> +
> + gen2_irq_init(uncore, GEN11_GU_MISC_IRQ_REGS, ~gu_misc_masked, gu_misc_masked);
> +}
> +
> static void gen11_irq_postinstall(struct drm_i915_private *dev_priv)
> {
> struct intel_display *display = dev_priv->display;
> struct intel_gt *gt = to_gt(dev_priv);
> struct intel_uncore *uncore = gt->uncore;
> - u32 gu_misc_masked = GEN11_GU_MISC_GSE;
>
> gen11_gt_irq_postinstall(gt);
> +
> intel_display_irq_postinstall(display);
>
> - gen2_irq_init(uncore, GEN11_GU_MISC_IRQ_REGS, ~gu_misc_masked, gu_misc_masked);
> + gen11_gu_misc_irq_postinstall(dev_priv);
>
> gen11_master_intr_enable(intel_uncore_regs(uncore));
> intel_uncore_posting_read(&dev_priv->uncore, GEN11_GFX_MSTR_IRQ);
> @@ -745,14 +754,13 @@ static void dg1_irq_postinstall(struct drm_i915_private *dev_priv)
> {
> struct intel_display *display = dev_priv->display;
> struct intel_uncore *uncore = &dev_priv->uncore;
> - u32 gu_misc_masked = GEN11_GU_MISC_GSE;
> struct intel_gt *gt;
> unsigned int i;
>
> for_each_gt(gt, dev_priv, i)
> gen11_gt_irq_postinstall(gt);
>
> - gen2_irq_init(uncore, GEN11_GU_MISC_IRQ_REGS, ~gu_misc_masked, gu_misc_masked);
> + gen11_gu_misc_irq_postinstall(dev_priv);
>
> intel_display_irq_postinstall(display);
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 4/5] drm/i915/irq: Keep GSE interrupts masked if display is not present
2026-11-05 20:34 ` [PATCH 4/5] drm/i915/irq: Keep GSE interrupts masked if display is not present Ville Syrjala
@ 2026-11-06 9:25 ` Jani Nikula
2026-11-06 17:00 ` Ville Syrjälä
0 siblings, 1 reply; 15+ messages in thread
From: Jani Nikula @ 2026-11-06 9:25 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx; +Cc: intel-xe
On Thu, 05 Nov 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Display is the only current user of GSE interrupts. Keep the
> GSE interrupt masked on icl+ if there is no display.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
xe could use the same treatment.
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/i915_irq.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 823d97284d78..5476472d33bd 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -36,6 +36,7 @@
> #include <drm/intel/display_parent_interface.h>
> #include <drm/intel/intel_gmd_interrupt_regs.h>
>
> +#include "display/intel_display_device.h"
> #include "display/intel_display_irq.h"
>
> #include "gt/intel_breadcrumbs.h"
> @@ -727,9 +728,13 @@ static void gen8_irq_postinstall(struct drm_i915_private *dev_priv)
>
> static void gen11_gu_misc_irq_postinstall(struct drm_i915_private *dev_priv)
> {
> + struct intel_display *display = dev_priv->display;
> struct intel_gt *gt = to_gt(dev_priv);
> struct intel_uncore *uncore = gt->uncore;
> - u32 gu_misc_masked = GEN11_GU_MISC_GSE;
> + u32 gu_misc_masked = 0;
> +
> + if (intel_display_device_present(display))
> + gu_misc_masked |= GEN11_GU_MISC_GSE;
>
> gen2_irq_init(uncore, GEN11_GU_MISC_IRQ_REGS, ~gu_misc_masked, gu_misc_masked);
> }
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 5/5] drm/i915/irq: Reorder GU_MISC vs. display in gen11_irq_postinstall()
2026-11-05 20:34 ` [PATCH 5/5] drm/i915/irq: Reorder GU_MISC vs. display in gen11_irq_postinstall() Ville Syrjala
@ 2026-11-06 9:25 ` Jani Nikula
0 siblings, 0 replies; 15+ messages in thread
From: Jani Nikula @ 2026-11-06 9:25 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx; +Cc: intel-xe
On Thu, 05 Nov 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> gen11_irq_postinstall() and dg1_irq_postinstall() call
> intel_display_irq_postinstall() and gen11_gu_misc_irq_postinstall()
> in the opposite order, presumably for no real reason. Reorder the
> gen11 part to match the dg1 part for consistency.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/i915_irq.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 5476472d33bd..8ff2dd74b301 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -747,10 +747,10 @@ static void gen11_irq_postinstall(struct drm_i915_private *dev_priv)
>
> gen11_gt_irq_postinstall(gt);
>
> - intel_display_irq_postinstall(display);
> -
> gen11_gu_misc_irq_postinstall(dev_priv);
>
> + intel_display_irq_postinstall(display);
> +
> gen11_master_intr_enable(intel_uncore_regs(uncore));
> intel_uncore_posting_read(&dev_priv->uncore, GEN11_GFX_MSTR_IRQ);
> }
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 4/5] drm/i915/irq: Keep GSE interrupts masked if display is not present
2026-11-06 9:25 ` Jani Nikula
@ 2026-11-06 17:00 ` Ville Syrjälä
0 siblings, 0 replies; 15+ messages in thread
From: Ville Syrjälä @ 2026-11-06 17:00 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx, intel-xe, Maarten Lankhorst, Matthew Brost
On Fri, Nov 06, 2026 at 11:25:09AM +0200, Jani Nikula wrote:
> On Thu, 05 Nov 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Display is the only current user of GSE interrupts. Keep the
> > GSE interrupt masked on icl+ if there is no display.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> xe could use the same treatment.
Didn't even realize xe was enabling this. Ugh. The GSE irq
handler is currently called xe_disaplay_irq_enable()? What?
xe's interrupt handlers also look quite expensive because
all the master bits are checked in the non-inlined sub handler
functions. So no matter how many actual interrupt bits are set
you always pay the cost of a dozen redundant function calls.
At least it filters out the entire tile if nothing happened
on it.
I suppose the "just function calls in the top level handler"
approach does keep the code looking fairly neat. But for
efficiency those should probably be static inlines so you
don't pay the extra function call cost for every bit you
want to check. Might have to think about using that approach
for the display irq code actually...
I also don't know why xe has all those weird probe_display
checks in the display irq stuff. Why would display irqs
even be unmasked if there is no display?
Anyways, for now I'll just stick to fixing up the GSE
stuff in xe.
>
> Reviewed-by: Jani Nikula <jani.nikula@intel.com>
>
> > ---
> > drivers/gpu/drm/i915/i915_irq.c | 7 ++++++-
> > 1 file changed, 6 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> > index 823d97284d78..5476472d33bd 100644
> > --- a/drivers/gpu/drm/i915/i915_irq.c
> > +++ b/drivers/gpu/drm/i915/i915_irq.c
> > @@ -36,6 +36,7 @@
> > #include <drm/intel/display_parent_interface.h>
> > #include <drm/intel/intel_gmd_interrupt_regs.h>
> >
> > +#include "display/intel_display_device.h"
> > #include "display/intel_display_irq.h"
> >
> > #include "gt/intel_breadcrumbs.h"
> > @@ -727,9 +728,13 @@ static void gen8_irq_postinstall(struct drm_i915_private *dev_priv)
> >
> > static void gen11_gu_misc_irq_postinstall(struct drm_i915_private *dev_priv)
> > {
> > + struct intel_display *display = dev_priv->display;
> > struct intel_gt *gt = to_gt(dev_priv);
> > struct intel_uncore *uncore = gt->uncore;
> > - u32 gu_misc_masked = GEN11_GU_MISC_GSE;
> > + u32 gu_misc_masked = 0;
> > +
> > + if (intel_display_device_present(display))
> > + gu_misc_masked |= GEN11_GU_MISC_GSE;
> >
> > gen2_irq_init(uncore, GEN11_GU_MISC_IRQ_REGS, ~gu_misc_masked, gu_misc_masked);
> > }
>
> --
> Jani Nikula, Intel
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 15+ messages in thread
* ✗ Xe.CI.FULL: failure for drm/i915/irq: Clean up the GEN11_GU_MISC mess
2026-11-05 20:34 [PATCH 0/5] drm/i915/irq: Clean up the GEN11_GU_MISC mess Ville Syrjala
` (6 preceding siblings ...)
2026-11-05 21:23 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-11-06 22:22 ` Patchwork
7 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2026-11-06 22:22 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 18387 bytes --]
== Series Details ==
Series: drm/i915/irq: Clean up the GEN11_GU_MISC mess
URL : https://patchwork.freedesktop.org/series/177897/
State : failure
== Summary ==
CI Bug Log - changes from xe-6073-44f84d69c4528c0d36dbe06ea327f41182dfcc55_FULL -> xe-pw-177897v1_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-177897v1_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-177897v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (3 -> 3)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-177897v1_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@kms_frontbuffer_tracking@fbcpsr-suspend:
- shard-ptl: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6073-44f84d69c4528c0d36dbe06ea327f41182dfcc55/shard-ptl-1/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-ptl-8/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html
* igt@kms_setmode@basic@pipe-b-edp-1:
- shard-ptl: [PASS][3] -> [FAIL][4]
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6073-44f84d69c4528c0d36dbe06ea327f41182dfcc55/shard-ptl-5/igt@kms_setmode@basic@pipe-b-edp-1.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-ptl-8/igt@kms_setmode@basic@pipe-b-edp-1.html
Known issues
------------
Here are the changes found in xe-pw-177897v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0:
- shard-bmg: NOTRUN -> [SKIP][5] ([Intel XE#1124])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-bmg-1/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-c-dp-2:
- shard-bmg: [PASS][6] -> [INCOMPLETE][7] ([Intel XE#7084] / [Intel XE#8150]) +1 other test incomplete
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6073-44f84d69c4528c0d36dbe06ea327f41182dfcc55/shard-bmg-10/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-c-dp-2.html
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-bmg-6/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-c-dp-2.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-b-dp-1:
- shard-bmg: NOTRUN -> [SKIP][8] ([Intel XE#2652]) +3 other tests skip
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-bmg-7/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-b-dp-1.html
* igt@kms_content_protection@legacy@pipe-a-dp-1:
- shard-bmg: NOTRUN -> [FAIL][9] ([Intel XE#3304])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-bmg-7/igt@kms_content_protection@legacy@pipe-a-dp-1.html
* igt@kms_content_protection@uevent-hdcp14@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][10] ([Intel XE#6707] / [Intel XE#7439])
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-bmg-3/igt@kms_content_protection@uevent-hdcp14@pipe-a-dp-2.html
* igt@kms_dsc@dsc-basic-bigjoiner:
- shard-bmg: NOTRUN -> [SKIP][11] ([Intel XE#8265])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-bmg-1/igt@kms_dsc@dsc-basic-bigjoiner.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling:
- shard-bmg: NOTRUN -> [SKIP][12] ([Intel XE#7178] / [Intel XE#7349])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-bmg-1/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling:
- shard-bmg: NOTRUN -> [SKIP][13] ([Intel XE#7178] / [Intel XE#7351])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-bmg-1/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling.html
* igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][14] ([Intel XE#2311]) +4 other tests skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt:
- shard-bmg: NOTRUN -> [SKIP][15] ([Intel XE#4141]) +1 other test skip
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrshdr-argb161616f-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#7061])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcdrrshdr-argb161616f-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][17] ([Intel XE#2313]) +2 other tests skip
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt.html
* igt@kms_plane@pixel-format-yf-tiled-modifier:
- shard-bmg: NOTRUN -> [SKIP][18] ([Intel XE#7283])
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-bmg-1/igt@kms_plane@pixel-format-yf-tiled-modifier.html
* igt@kms_pm_dc@dc3co-after-dc6@pr-xrgb8888:
- shard-bmg: NOTRUN -> [SKIP][19] ([Intel XE#8395] / [Intel XE#8396]) +1 other test skip
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-bmg-1/igt@kms_pm_dc@dc3co-after-dc6@pr-xrgb8888.html
* igt@kms_pm_dc@dc3co-after-dc6@psr2-yuv420:
- shard-bmg: NOTRUN -> [SKIP][20] ([Intel XE#8396]) +1 other test skip
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-bmg-1/igt@kms_pm_dc@dc3co-after-dc6@psr2-yuv420.html
* igt@kms_psr@fbc-psr-no-drrs:
- shard-bmg: NOTRUN -> [SKIP][21] ([Intel XE#2234] / [Intel XE#2850])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-bmg-1/igt@kms_psr@fbc-psr-no-drrs.html
* igt@kms_setmode@basic:
- shard-ptl: [PASS][22] -> [FAIL][23] ([Intel XE#8618]) +1 other test fail
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6073-44f84d69c4528c0d36dbe06ea327f41182dfcc55/shard-ptl-5/igt@kms_setmode@basic.html
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-ptl-8/igt@kms_setmode@basic.html
* igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr-invalidate-prefetch:
- shard-bmg: NOTRUN -> [SKIP][24] ([Intel XE#8374])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-bmg-1/igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr-invalidate-prefetch.html
* igt@xe_exec_multi_queue@max-queues-preempt-mode-fault-basic:
- shard-bmg: NOTRUN -> [SKIP][25] ([Intel XE#8364])
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-bmg-1/igt@xe_exec_multi_queue@max-queues-preempt-mode-fault-basic.html
* igt@xe_exec_threads@threads-multi-queue-cm-fd-basic:
- shard-bmg: NOTRUN -> [SKIP][26] ([Intel XE#8378])
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-bmg-1/igt@xe_exec_threads@threads-multi-queue-cm-fd-basic.html
* igt@xe_multigpu_svm@mgpu-atomic-op-basic:
- shard-bmg: NOTRUN -> [SKIP][27] ([Intel XE#6964])
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-bmg-1/igt@xe_multigpu_svm@mgpu-atomic-op-basic.html
* igt@xe_pm@s4-mocs:
- shard-ptl: [PASS][28] -> [ABORT][29] ([Intel XE#9362])
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6073-44f84d69c4528c0d36dbe06ea327f41182dfcc55/shard-ptl-8/igt@xe_pm@s4-mocs.html
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-ptl-2/igt@xe_pm@s4-mocs.html
* igt@xe_pm@s4-multiple-execs:
- shard-lnl: [PASS][30] -> [ABORT][31] ([Intel XE#9362])
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6073-44f84d69c4528c0d36dbe06ea327f41182dfcc55/shard-lnl-2/igt@xe_pm@s4-multiple-execs.html
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-lnl-5/igt@xe_pm@s4-multiple-execs.html
* igt@xe_pxp@pxp-stale-queue-post-termination-irq:
- shard-bmg: NOTRUN -> [SKIP][32] ([Intel XE#4733] / [Intel XE#7417])
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-bmg-1/igt@xe_pxp@pxp-stale-queue-post-termination-irq.html
* igt@xe_query@multigpu-query-topology-l3-bank-mask:
- shard-bmg: NOTRUN -> [SKIP][33] ([Intel XE#944])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-bmg-1/igt@xe_query@multigpu-query-topology-l3-bank-mask.html
* igt@xe_sriov_scheduling@nonpreempt-engine-resets-normal-priority@numvfs-random-gt0-rcs0:
- shard-bmg: [PASS][34] -> [TIMEOUT][35] ([Intel XE#9668]) +1 other test timeout
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6073-44f84d69c4528c0d36dbe06ea327f41182dfcc55/shard-bmg-4/igt@xe_sriov_scheduling@nonpreempt-engine-resets-normal-priority@numvfs-random-gt0-rcs0.html
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-bmg-9/igt@xe_sriov_scheduling@nonpreempt-engine-resets-normal-priority@numvfs-random-gt0-rcs0.html
#### Possible fixes ####
* igt@kms_async_flips@alternate-sync-async-flip-atomic:
- shard-bmg: [FAIL][36] ([Intel XE#3718] / [Intel XE#6078]) -> [PASS][37]
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6073-44f84d69c4528c0d36dbe06ea327f41182dfcc55/shard-bmg-6/igt@kms_async_flips@alternate-sync-async-flip-atomic.html
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-bmg-4/igt@kms_async_flips@alternate-sync-async-flip-atomic.html
* igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-dp-2:
- shard-bmg: [FAIL][38] ([Intel XE#6078]) -> [PASS][39]
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6073-44f84d69c4528c0d36dbe06ea327f41182dfcc55/shard-bmg-6/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-dp-2.html
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-bmg-4/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-dp-2.html
* igt@kms_cursor_edge_walk@256x256-top-bottom:
- shard-bmg: [FAIL][40] -> [PASS][41] +1 other test pass
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6073-44f84d69c4528c0d36dbe06ea327f41182dfcc55/shard-bmg-5/igt@kms_cursor_edge_walk@256x256-top-bottom.html
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-bmg-9/igt@kms_cursor_edge_walk@256x256-top-bottom.html
* igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible:
- shard-lnl: [FAIL][42] ([Intel XE#3098]) -> [PASS][43] +1 other test pass
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6073-44f84d69c4528c0d36dbe06ea327f41182dfcc55/shard-lnl-4/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible.html
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-lnl-6/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank@b-edp1:
- shard-lnl: [FAIL][44] ([Intel XE#301]) -> [PASS][45] +1 other test pass
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6073-44f84d69c4528c0d36dbe06ea327f41182dfcc55/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-lnl-6/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
* igt@kms_setmode@basic-no-cpu-idle:
- shard-ptl: [FAIL][46] ([Intel XE#8618]) -> [PASS][47] +1 other test pass
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6073-44f84d69c4528c0d36dbe06ea327f41182dfcc55/shard-ptl-5/igt@kms_setmode@basic-no-cpu-idle.html
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-ptl-6/igt@kms_setmode@basic-no-cpu-idle.html
* igt@xe_exec_reset@gt-stress-reset-pm-transition:
- shard-ptl: [DMESG-WARN][48] ([Intel XE#8652]) -> [PASS][49]
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6073-44f84d69c4528c0d36dbe06ea327f41182dfcc55/shard-ptl-2/igt@xe_exec_reset@gt-stress-reset-pm-transition.html
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-ptl-4/igt@xe_exec_reset@gt-stress-reset-pm-transition.html
* igt@xe_exec_system_allocator@process-many-large-execqueues-mmap-remap-ro-eocheck:
- shard-bmg: [DMESG-WARN][50] ([Intel XE#7774]) -> [PASS][51]
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6073-44f84d69c4528c0d36dbe06ea327f41182dfcc55/shard-bmg-5/igt@xe_exec_system_allocator@process-many-large-execqueues-mmap-remap-ro-eocheck.html
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-bmg-9/igt@xe_exec_system_allocator@process-many-large-execqueues-mmap-remap-ro-eocheck.html
* igt@xe_pm@s4-multiple-execs:
- shard-bmg: [ABORT][52] ([Intel XE#9362]) -> [PASS][53]
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6073-44f84d69c4528c0d36dbe06ea327f41182dfcc55/shard-bmg-1/igt@xe_pm@s4-multiple-execs.html
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-bmg-1/igt@xe_pm@s4-multiple-execs.html
* igt@xe_pm@s4-vm-bind-prefetch:
- shard-ptl: [DMESG-WARN][54] ([Intel XE#7727]) -> [PASS][55]
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6073-44f84d69c4528c0d36dbe06ea327f41182dfcc55/shard-ptl-6/igt@xe_pm@s4-vm-bind-prefetch.html
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-ptl-1/igt@xe_pm@s4-vm-bind-prefetch.html
* igt@xe_pm_residency@gt-c6-freeze@gt1:
- shard-bmg: [FAIL][56] ([Intel XE#9254]) -> [PASS][57] +1 other test pass
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6073-44f84d69c4528c0d36dbe06ea327f41182dfcc55/shard-bmg-9/igt@xe_pm_residency@gt-c6-freeze@gt1.html
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-bmg-6/igt@xe_pm_residency@gt-c6-freeze@gt1.html
#### Warnings ####
* igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
- shard-lnl: [SKIP][58] -> [SKIP][59] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#7383])
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6073-44f84d69c4528c0d36dbe06ea327f41182dfcc55/shard-lnl-2/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/shard-lnl-5/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3098
[Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
[Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
[Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#6078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6078
[Intel XE#6707]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6707
[Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
[Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
[Intel XE#7084]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7084
[Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
[Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
[Intel XE#7349]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7349
[Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
[Intel XE#7383]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7383
[Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
[Intel XE#7439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7439
[Intel XE#7727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7727
[Intel XE#7774]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7774
[Intel XE#8150]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8150
[Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
[Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
[Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
[Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
[Intel XE#8395]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8395
[Intel XE#8396]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8396
[Intel XE#8618]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8618
[Intel XE#8652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8652
[Intel XE#9254]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9254
[Intel XE#9362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9362
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
[Intel XE#9668]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9668
Build changes
-------------
* Linux: xe-6073-44f84d69c4528c0d36dbe06ea327f41182dfcc55 -> xe-pw-177897v1
IGT_9179: 9179
xe-6073-44f84d69c4528c0d36dbe06ea327f41182dfcc55: 44f84d69c4528c0d36dbe06ea327f41182dfcc55
xe-pw-177897v1: 177897v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177897v1/index.html
[-- Attachment #2: Type: text/html, Size: 20245 bytes --]
^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2026-11-06 22:22 UTC | newest]
Thread overview: 15+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-11-05 20:34 [PATCH 0/5] drm/i915/irq: Clean up the GEN11_GU_MISC mess Ville Syrjala
2026-11-05 20:34 ` [PATCH 1/5] drm/i915/irq: Relocate gen11_gu_misc_irq_ack() Ville Syrjala
2026-11-06 9:18 ` Jani Nikula
2026-11-05 20:34 ` [PATCH 2/5] drm/i915/irq: s/gen11_gu_misc_irq_handler()/intel_display_gse_irq_handler()/ Ville Syrjala
2026-11-06 9:20 ` Jani Nikula
2026-11-05 20:34 ` [PATCH 3/5] drm/i915/irq: Extract gen11_gu_misc_irq_postinstall() Ville Syrjala
2026-11-06 9:22 ` Jani Nikula
2026-11-05 20:34 ` [PATCH 4/5] drm/i915/irq: Keep GSE interrupts masked if display is not present Ville Syrjala
2026-11-06 9:25 ` Jani Nikula
2026-11-06 17:00 ` Ville Syrjälä
2026-11-05 20:34 ` [PATCH 5/5] drm/i915/irq: Reorder GU_MISC vs. display in gen11_irq_postinstall() Ville Syrjala
2026-11-06 9:25 ` Jani Nikula
2026-11-05 20:48 ` ✓ CI.KUnit: success for drm/i915/irq: Clean up the GEN11_GU_MISC mess Patchwork
2026-11-05 21:23 ` ✓ Xe.CI.BAT: " Patchwork
2026-11-06 22:22 ` ✗ Xe.CI.FULL: failure " Patchwork
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox