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From: "Tauro, Riana" <riana.tauro@intel.com>
To: Raag Jadav <raag.jadav@intel.com>
Cc: <intel-xe@lists.freedesktop.org>, <anshuman.gupta@intel.com>,
	<rodrigo.vivi@intel.com>, <aravind.iddamsetty@linux.intel.com>,
	<badal.nilawar@intel.com>, <ravi.kishore.koppuravuri@intel.com>,
	<mallesh.koujalagi@intel.com>, <soham.purkait@intel.com>
Subject: Re: [PATCH v3 08/10] drm/xe/xe_ras: Add structures for SoC Internal errors
Date: Mon, 13 Apr 2026 13:25:59 +0530	[thread overview]
Message-ID: <61f6226a-1dd1-4643-8fe4-ad5c08c118d4@intel.com> (raw)
In-Reply-To: <adY5hH7l-HiXt-Fu@black.igk.intel.com>


On 4/8/2026 4:48 PM, Raag Jadav wrote:
> On Thu, Apr 02, 2026 at 12:31:39PM +0530, Riana Tauro wrote:
>> Add response structures for SoC Internal errors.
> This looks like should be squashed with next patch, or did I miss something?
Yeah it can be combined. Will squash it in next rev

Thanks
Riana
>
> Raag
>
>> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
>> ---
>> v2: simplify soc structures
>> ---
>>   drivers/gpu/drm/xe/xe_ras_types.h | 51 +++++++++++++++++++++++++++++++
>>   1 file changed, 51 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
>> index e37dd12bffa3..65158bf716a7 100644
>> --- a/drivers/gpu/drm/xe/xe_ras_types.h
>> +++ b/drivers/gpu/drm/xe/xe_ras_types.h
>> @@ -10,6 +10,7 @@
>>   
>>   #define XE_RAS_NUM_ERROR_ARR		3
>>   #define XE_RAS_MAX_ERROR_DETAILS	16
>> +#define XE_RAS_IEH_PUNIT_ERROR		BIT(1)
>>   
>>   /**
>>    * enum xe_ras_recovery_action - RAS recovery actions
>> @@ -149,4 +150,54 @@ struct xe_ras_compute_error {
>>   	u32 spare_log3;
>>   } __packed;
>>   
>> +/**
>> + * struct xe_ras_soc_error_source - Source of SOC error
>> + */
>> +struct xe_ras_soc_error_source {
>> +	/** @csc: CSC error */
>> +	u32 csc:1;
>> +	/** @soc: SOC error */
>> +	u32 soc:1;
>> +	/** @reserved: Reserved for future use */
>> +	u32 reserved:30;
>> +} __packed;
>> +
>> +/**
>> + * struct xe_ras_soc_error - SOC error details
>> + */
>> +struct xe_ras_soc_error {
>> +	/** @error_source: Error Source */
>> +	struct xe_ras_soc_error_source error_source;
>> +	/** @additional_details: Additional details */
>> +	u32 additional_details[15];
>> +} __packed;
>> +
>> +/**
>> + * struct xe_ras_csc_error - CSC error details
>> + */
>> +struct xe_ras_csc_error {
>> +	/** @hec_uncorr_err_status: CSC error */
>> +	u32 hec_uncorr_err_status;
>> +	/** @hec_uncorr_fw_err_dw0: CSC f/w error */
>> +	u32 hec_uncorr_fw_err_dw0;
>> +} __packed;
>> +
>> +/**
>> + * struct xe_ras_ieh_error - SoC IEH (Integrated Error Handler) details
>> + */
>> +struct xe_ras_ieh_error {
>> +	/** @ieh_instance: IEH instance */
>> +	u32 ieh_instance:2;
>> +	/** @reserved: Reserved for future use */
>> +	u32 reserved:30;
>> +	/** @global_error_status: Global error status */
>> +	u32 global_error_status;
>> +	/** @local_error_status: Local error status */
>> +	u32 local_error_status;
>> +	/** @gerr_mask: Global error mask */
>> +	u32 gerr_mask;
>> +	/** @additional_info: Additional information */
>> +	u32 additional_info[10];
>> +} __packed;
>> +
>>   #endif
>> -- 
>> 2.47.1
>>

  reply	other threads:[~2026-04-13  7:56 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-02  7:01 [PATCH v3 00/10] Introduce Xe Uncorrectable Error Handling Riana Tauro
2026-04-02  7:01 ` [PATCH v3 01/10] drm/xe/xe_survivability: Decouple survivability info from boot survivability Riana Tauro
2026-04-14 12:15   ` Mallesh, Koujalagi
2026-04-02  7:01 ` [PATCH v3 02/10] drm/xe/xe_pci_error: Implement PCI error recovery callbacks Riana Tauro
2026-04-07  4:50   ` Matthew Brost
2026-04-13  9:00     ` Tauro, Riana
2026-04-14 13:29       ` Mallesh, Koujalagi
2026-04-16  4:48         ` Tauro, Riana
2026-04-16  5:33           ` Mallesh, Koujalagi
2026-04-02  7:01 ` [PATCH v3 03/10] drm/xe/xe_pci_error: Group all devres to release them on PCIe slot reset Riana Tauro
2026-04-16 13:07   ` Mallesh, Koujalagi
2026-04-02  7:01 ` [PATCH v3 04/10] drm/xe: Skip device access during PCI error recovery Riana Tauro
2026-04-02  7:01 ` [PATCH v3 05/10] drm/xe/xe_ras: Initialize Uncorrectable AER Registers Riana Tauro
2026-04-07  5:50   ` Raag Jadav
2026-04-02  7:01 ` [PATCH v3 06/10] drm/xe/xe_ras: Add structures and commands for Uncorrectable Core Compute Errors Riana Tauro
2026-04-07  5:59   ` Raag Jadav
2026-04-02  7:01 ` [PATCH v3 07/10] drm/xe/xe_ras: Add support for Uncorrectable Core-Compute errors Riana Tauro
2026-04-08 11:15   ` Raag Jadav
2026-04-13  8:17     ` Tauro, Riana
2026-04-02  7:01 ` [PATCH v3 08/10] drm/xe/xe_ras: Add structures for SoC Internal errors Riana Tauro
2026-04-08 11:18   ` Raag Jadav
2026-04-13  7:55     ` Tauro, Riana [this message]
2026-04-02  7:01 ` [PATCH v3 09/10] drm/xe/xe_ras: Handle Uncorrectable " Riana Tauro
2026-04-02  7:01 ` [PATCH v3 10/10] drm/xe/xe_pci_error: Process errors in mmio_enabled Riana Tauro
2026-04-02  8:01 ` ✗ CI.checkpatch: warning for Introduce Xe Uncorrectable Error Handling (rev3) Patchwork
2026-04-02  8:02 ` ✓ CI.KUnit: success " Patchwork
2026-04-02  8:50 ` ✓ Xe.CI.BAT: " Patchwork
2026-04-02 15:08 ` ✓ Xe.CI.FULL: " Patchwork

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