Re: [PATCH 05/12] drm/i915/dp: Add crtc state for AS SDP transmission line

[Jani Nikula <jani.nikula@linux.intel.com>]

On Mon, 13 Apr 2026, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> The Adaptive Sync SDP is currently the only DisplayPort SDP with a
> programmable transmission line. Store the AS SDP transmission line
> in the crtc state and include it in the pipe configuration comparison.
>
> This provides a common place for SDP transmission lines and paves the way
> for supporting additional SDP TL programming, including the common base
> SDP transmission line introduced with Xe3p_lpd.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c       | 2 ++
>  drivers/gpu/drm/i915/display/intel_display_types.h | 8 ++++++++
>  2 files changed, 10 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 10b6c6fcb03f..c66541f26a09 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -5434,6 +5434,8 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
>  	}
>  	PIPE_CONF_CHECK_DP_VSC_SDP(vsc);
>  
> +	PIPE_CONF_CHECK_I(dp_sdp_tl.as);
> +

Too short, too many acronyms.

>  	PIPE_CONF_CHECK_X(sync_mode_slaves_mask);
>  	PIPE_CONF_CHECK_I(master_transcoder);
>  	PIPE_CONF_CHECK_X(joiner_pipes);
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index e2496db1642a..f58454c23859 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1298,6 +1298,14 @@ struct intel_crtc_state {
>  		struct drm_dp_as_sdp as_sdp;
>  	} infoframes;
>  
> +	struct {
> +		/*
> +		 * SDP Transmission line, relative to the Vtotal.
> +		 * The programmed transmit line is (Vtotal - value)
> +		 */
> +		u16 as;
> +	} dp_sdp_tl;

Why would this deserve to be a top level sub-struct in the crtc state?

> +
>  	u8 eld[MAX_ELD_BYTES];
>  
>  	/* HDMI scrambling status */

-- 
Jani Nikula, Intel