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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
	intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org
Subject: Re: [PATCH 04/19] drm/i915/vga: Extract intel_gmch_ctrl_reg()
Date: Tue, 09 Dec 2025 12:28:01 +0200	[thread overview]
Message-ID: <77bdcd1a4125dadf1200b400948929fb9815c801@intel.com> (raw)
In-Reply-To: <20251208182637.334-5-ville.syrjala@linux.intel.com>

On Mon, 08 Dec 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Extract the GMCH_CTLR register offset determination into a helper
> rather than using a local varaible. I'll be needing this in another
> function soon.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_vga.c | 12 +++++++++---
>  1 file changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c
> index 39c68aec647b..84fd5475d336 100644
> --- a/drivers/gpu/drm/i915/display/intel_vga.c
> +++ b/drivers/gpu/drm/i915/display/intel_vga.c
> @@ -18,6 +18,11 @@
>  #include "intel_vga.h"
>  #include "intel_vga_regs.h"
>  
> +static unsigned int intel_gmch_ctrl_reg(struct intel_display *display)
> +{
> +	return DISPLAY_VER(display) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL;
> +}
> +
>  static i915_reg_t intel_vga_cntrl_reg(struct intel_display *display)
>  {
>  	if (display->platform.valleyview || display->platform.cherryview)
> @@ -98,10 +103,10 @@ void intel_vga_disable(struct intel_display *display)
>  static int intel_gmch_vga_set_state(struct intel_display *display, bool enable_decode)
>  {
>  	struct pci_dev *pdev = to_pci_dev(display->drm->dev);
> -	unsigned int reg = DISPLAY_VER(display) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL;
>  	u16 gmch_ctrl;
>  
> -	if (pci_bus_read_config_word(pdev->bus, PCI_DEVFN(0, 0), reg, &gmch_ctrl)) {
> +	if (pci_bus_read_config_word(pdev->bus, PCI_DEVFN(0, 0),
> +				     intel_gmch_ctrl_reg(display), &gmch_ctrl)) {
>  		drm_err(display->drm, "failed to read control word\n");
>  		return -EIO;
>  	}
> @@ -114,7 +119,8 @@ static int intel_gmch_vga_set_state(struct intel_display *display, bool enable_d
>  	else
>  		gmch_ctrl |= INTEL_GMCH_VGA_DISABLE;
>  
> -	if (pci_bus_write_config_word(pdev->bus, PCI_DEVFN(0, 0), reg, gmch_ctrl)) {
> +	if (pci_bus_write_config_word(pdev->bus, PCI_DEVFN(0, 0),
> +				      intel_gmch_ctrl_reg(display), gmch_ctrl)) {
>  		drm_err(display->drm, "failed to write control word\n");
>  		return -EIO;
>  	}

-- 
Jani Nikula, Intel

  reply	other threads:[~2025-12-09 10:28 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-08 18:26 [PATCH 00/19] drm/i915/vga: Try to sort out the VGA decode mess Ville Syrjala
2025-12-08 18:26 ` [PATCH 01/19] drm/i915/vga: Register vgaarb client later Ville Syrjala
2025-12-09 10:23   ` Jani Nikula
2025-12-08 18:26 ` [PATCH 02/19] drm/i915/vga: Get rid of intel_vga_reset_io_mem() Ville Syrjala
2025-12-09 10:26   ` Jani Nikula
2025-12-08 18:26 ` [PATCH 03/19] drm/i915/power: Remove i915_power_well_desc::has_vga Ville Syrjala
2025-12-09 10:27   ` Jani Nikula
2025-12-08 18:26 ` [PATCH 04/19] drm/i915/vga: Extract intel_gmch_ctrl_reg() Ville Syrjala
2025-12-09 10:28   ` Jani Nikula [this message]
2025-12-08 18:26 ` [PATCH 05/19] drm/i915/vga: Don't touch VGA registers if VGA decode is fully disabled Ville Syrjala
2025-12-09 10:29   ` Jani Nikula
2025-12-08 18:26 ` [PATCH 06/19] drm/i915/vga: Clean up VGA registers even if VGA plane is disabled Ville Syrjala
2025-12-09 10:32   ` Jani Nikula
2025-12-08 18:26 ` [PATCH 07/19] drm/i915/vga: Avoid VGA arbiter during intel_vga_disable() for iGPUs Ville Syrjala
2025-12-09 10:35   ` Jani Nikula
2025-12-09 12:17     ` Ville Syrjälä
2025-12-08 18:26 ` [PATCH 08/19] drm/i915/vga: Stop trying to use GMCH_CTRL for VGA decode control Ville Syrjala
2025-12-09 10:39   ` Jani Nikula
2025-12-08 18:26 ` [PATCH 09/19] drm/i915/vga: Assert that VGA register accesses are going to the right GPU Ville Syrjala
2025-12-09 10:40   ` Jani Nikula
2025-12-08 18:26 ` [PATCH 10/19] drm/i915/de: Simplify intel_de_read8() Ville Syrjala
2025-12-09 10:47   ` Jani Nikula
2025-12-08 18:26 ` [PATCH 11/19] drm/i915/de: Add intel_de_write8() Ville Syrjala
2025-12-09 10:49   ` Jani Nikula
2025-12-08 18:26 ` [PATCH 12/19] drm/i915/vga: Introduce intel_vga_{read,write}() Ville Syrjala
2025-12-09 10:52   ` Jani Nikula
2025-12-08 18:26 ` [PATCH 13/19] drm/i915/vga: Use MMIO for VGA registers on pre-g4x Ville Syrjala
2025-12-09 10:53   ` Jani Nikula
2025-12-08 18:26 ` [PATCH 14/19] video/vga: Add VGA_IS0_R Ville Syrjala
2025-12-08 21:07   ` kernel test robot
2025-12-08 21:18   ` kernel test robot
2025-12-08 22:22   ` kernel test robot
2025-12-09  7:55   ` [PATCH v2 " Ville Syrjala
2025-12-09 10:55     ` Jani Nikula
2025-12-18 16:56       ` Ville Syrjälä
2025-12-10 14:13   ` [PATCH " kernel test robot
2025-12-10 14:24   ` kernel test robot
2025-12-08 18:26 ` [PATCH 15/19] drm/i915/crt: Use IS0_R instead of VGA_MIS_W Ville Syrjala
2025-12-09 10:56   ` Jani Nikula
2025-12-08 18:26 ` [PATCH 16/19] drm/i915/crt: Extract intel_crt_sense_above_threshold() Ville Syrjala
2025-12-09 10:57   ` Jani Nikula
2025-12-08 18:26 ` [PATCH 17/19] drm/i915: Get rid of the INTEL_GMCH_CTRL alias Ville Syrjala
2025-12-09 10:58   ` Jani Nikula
2025-12-08 18:26 ` [PATCH 18/19] drm/i915: Clean up PCI config space reg defines Ville Syrjala
2025-12-09 11:00   ` Jani Nikula
2025-12-09 11:01   ` Jani Nikula
2025-12-08 18:26 ` [PATCH 19/19] drm/i915: Document the GMCH_CTRL register a bit Ville Syrjala
2025-12-09 11:03   ` Jani Nikula
2025-12-08 20:19 ` ✗ CI.KUnit: failure for drm/i915/vga: Try to sort out the VGA decode mess Patchwork
2025-12-09  8:52 ` ✓ CI.KUnit: success for drm/i915/vga: Try to sort out the VGA decode mess (rev2) Patchwork
2025-12-09  9:07 ` ✗ CI.checksparse: warning " Patchwork
2025-12-09  9:35 ` ✓ Xe.CI.BAT: success " Patchwork
2025-12-09 15:57 ` ✗ Xe.CI.Full: failure " Patchwork

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