* [PATCH v3 0/2] Cleaning up code related to VRAM regions and its initialization - part 2
@ 2025-06-24 9:22 Piórkowski, Piotr
2025-06-24 9:22 ` [PATCH v3 1/2] drm/xe: Use dynamic allocation for tile and device VRAM region structures Piórkowski, Piotr
` (4 more replies)
0 siblings, 5 replies; 10+ messages in thread
From: Piórkowski, Piotr @ 2025-06-24 9:22 UTC (permalink / raw)
To: intel-xe
Cc: Piotr Piórkowski, Matthew Auld, Stuart Summers, Rodrigo Vivi,
Jani Nikula
From: Piotr Piórkowski <piotr.piorkowski@intel.com>
As a follow-up to the earlier VRAM region cleanups, this patch series
focuses on further improving the flexibility and clarity of
the Xe driver's VRAM management.
This series focuses on preparing the VRAM region handling code for future
platforms, where a more dynamic representation of device and tile VRAM
regions will be required. Static allocation of these structures is replaced
with dynamic allocation to increase flexibility and improve maintainability.
Additionally, the initialization logic for device-wide and tile-local VRAM
regions is unified, replacing the previously separate code paths. This
simplification improves code clarity and facilitates future extensions
involving additional VRAM region types.
v2:
- fix doc comments in struct xe_vram_region
- remove unnecessary includes (Jani)
v3:
- move code from xe_vram_init_regions_managers to xe_tile_init_noalloc
(Matthew)
- replace ioremap_wc to devm_ioremap_wc for mapping VRAM BAR
(Matthew)
- Replace the tile id parameter with vram region in the xe_pf_begin
function.
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: Stuart Summers <stuart.summers@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Piotr Piórkowski (2):
drm/xe: Use dynamic allocation for tile and device VRAM region
structures
drm/xe: Unify the initialization of VRAM regions
drivers/gpu/drm/xe/display/xe_fb_pin.c | 2 +-
drivers/gpu/drm/xe/display/xe_plane_initial.c | 2 +-
drivers/gpu/drm/xe/xe_assert.h | 2 +-
drivers/gpu/drm/xe/xe_device.c | 19 +++
drivers/gpu/drm/xe/xe_device_types.h | 14 +-
drivers/gpu/drm/xe/xe_gt_pagefault.c | 12 +-
drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c | 2 +-
drivers/gpu/drm/xe/xe_migrate.c | 18 +--
drivers/gpu/drm/xe/xe_pci.c | 6 +
drivers/gpu/drm/xe/xe_query.c | 4 +-
drivers/gpu/drm/xe/xe_svm.c | 17 +-
drivers/gpu/drm/xe/xe_tile.c | 57 ++++---
drivers/gpu/drm/xe/xe_tile.h | 2 +
drivers/gpu/drm/xe/xe_ttm_stolen_mgr.c | 6 +-
drivers/gpu/drm/xe/xe_ttm_vram_mgr.c | 18 ++-
drivers/gpu/drm/xe/xe_ttm_vram_mgr.h | 3 +-
drivers/gpu/drm/xe/xe_vram.c | 152 +++++++++++-------
drivers/gpu/drm/xe/xe_vram.h | 4 +
18 files changed, 217 insertions(+), 123 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH v3 1/2] drm/xe: Use dynamic allocation for tile and device VRAM region structures 2025-06-24 9:22 [PATCH v3 0/2] Cleaning up code related to VRAM regions and its initialization - part 2 Piórkowski, Piotr @ 2025-06-24 9:22 ` Piórkowski, Piotr 2025-06-24 9:46 ` Michal Wajdeczko 2025-06-24 9:53 ` Jani Nikula 2025-06-24 9:22 ` [PATCH v3 2/2] drm/xe: Unify the initialization of VRAM regions Piórkowski, Piotr ` (3 subsequent siblings) 4 siblings, 2 replies; 10+ messages in thread From: Piórkowski, Piotr @ 2025-06-24 9:22 UTC (permalink / raw) To: intel-xe Cc: Piotr Piórkowski, Stuart Summers, Matthew Auld, Satyanarayana K V P From: Piotr Piórkowski <piotr.piorkowski@intel.com> In future platforms, we will need to represent the device and tile VRAM regions in a more dynamic way, so let's abandon the static allocation of these structures and start use a dynamic allocation. Signed-off-by: Piotr Piórkowski <piotr.piorkowski@intel.com> Cc: Stuart Summers <stuart.summers@intel.com> Cc: Matthew Auld <matthew.auld@intel.com> Reviewed-by: Satyanarayana K V P <satyanarayana.k.v.p@intel.com> --- drivers/gpu/drm/xe/display/xe_fb_pin.c | 2 +- drivers/gpu/drm/xe/display/xe_plane_initial.c | 2 +- drivers/gpu/drm/xe/xe_assert.h | 2 +- drivers/gpu/drm/xe/xe_device.c | 19 ++++++ drivers/gpu/drm/xe/xe_device_types.h | 6 +- drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c | 2 +- drivers/gpu/drm/xe/xe_migrate.c | 18 ++--- drivers/gpu/drm/xe/xe_pci.c | 6 ++ drivers/gpu/drm/xe/xe_query.c | 2 +- drivers/gpu/drm/xe/xe_svm.c | 17 ++--- drivers/gpu/drm/xe/xe_tile.c | 33 +++++++++- drivers/gpu/drm/xe/xe_tile.h | 2 + drivers/gpu/drm/xe/xe_ttm_stolen_mgr.c | 6 +- drivers/gpu/drm/xe/xe_ttm_vram_mgr.c | 4 +- drivers/gpu/drm/xe/xe_vram.c | 66 ++++++++++--------- 15 files changed, 121 insertions(+), 66 deletions(-) diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c index 6b362695d6b6..733c17c945bf 100644 --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c @@ -294,7 +294,7 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb, * accessible. This is important on small-bar systems where * only some subset of VRAM is CPU accessible. */ - if (tile->mem.vram.io_size < tile->mem.vram.usable_size) { + if (tile->mem.vram->io_size < tile->mem.vram->usable_size) { ret = -EINVAL; goto err; } diff --git a/drivers/gpu/drm/xe/display/xe_plane_initial.c b/drivers/gpu/drm/xe/display/xe_plane_initial.c index b2ede3af9345..97b58c0ff39a 100644 --- a/drivers/gpu/drm/xe/display/xe_plane_initial.c +++ b/drivers/gpu/drm/xe/display/xe_plane_initial.c @@ -103,7 +103,7 @@ initial_plane_bo(struct xe_device *xe, * We don't currently expect this to ever be placed in the * stolen portion. */ - if (phys_base >= tile0->mem.vram.usable_size) { + if (phys_base >= tile0->mem.vram->usable_size) { drm_err(&xe->drm, "Initial plane programming using invalid range, phys_base=%pa\n", &phys_base); diff --git a/drivers/gpu/drm/xe/xe_assert.h b/drivers/gpu/drm/xe/xe_assert.h index 68fe70ce2be3..cd63cdd2dc78 100644 --- a/drivers/gpu/drm/xe/xe_assert.h +++ b/drivers/gpu/drm/xe/xe_assert.h @@ -145,7 +145,7 @@ const struct xe_tile *__tile = (tile); \ char __buf[10] __maybe_unused; \ xe_assert_msg(tile_to_xe(__tile), condition, "tile: %u VRAM %s\n" msg, \ - __tile->id, ({ string_get_size(__tile->mem.vram.actual_physical_size, 1, \ + __tile->id, ({ string_get_size(__tile->mem.vram->actual_physical_size, 1, \ STRING_UNITS_2, __buf, sizeof(__buf)); __buf; }), ## arg); \ }) diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c index e160e7be84f0..18f0d8f6d0a2 100644 --- a/drivers/gpu/drm/xe/xe_device.c +++ b/drivers/gpu/drm/xe/xe_device.c @@ -685,6 +685,21 @@ static void sriov_update_device_info(struct xe_device *xe) } } +static int xe_device_vram_alloc(struct xe_device *xe) +{ + struct xe_vram_region *vram; + + if (!IS_DGFX(xe)) + return 0; + + vram = drmm_kzalloc(&xe->drm, sizeof(*vram), GFP_KERNEL); + if (!vram) + return -ENOMEM; + + xe->mem.vram = vram; + return 0; +} + /** * xe_device_probe_early: Device early probe * @xe: xe device instance @@ -729,6 +744,10 @@ int xe_device_probe_early(struct xe_device *xe) xe->wedged.mode = xe_modparam.wedged_mode; + err = xe_device_vram_alloc(xe); + if (err) + return err; + return 0; } ALLOW_ERROR_INJECTION(xe_device_probe_early, ERRNO); /* See xe_pci_probe() */ diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h index 6aca4b1a2824..a7bcda67d05f 100644 --- a/drivers/gpu/drm/xe/xe_device_types.h +++ b/drivers/gpu/drm/xe/xe_device_types.h @@ -74,6 +74,8 @@ struct xe_pxp; * device, such as HBM memory or CXL extension memory. */ struct xe_vram_region { + /** @tile: Backpointer to tile */ + struct xe_tile *tile; /** @io_start: IO start address of this VRAM instance */ resource_size_t io_start; /** @@ -213,7 +215,7 @@ struct xe_tile { * Although VRAM is associated with a specific tile, it can * still be accessed by all tiles' GTs. */ - struct xe_vram_region vram; + struct xe_vram_region *vram; /** @mem.ggtt: Global graphics translation table */ struct xe_ggtt *ggtt; @@ -394,7 +396,7 @@ struct xe_device { /** @mem: memory info for device */ struct { /** @mem.vram: VRAM info for device */ - struct xe_vram_region vram; + struct xe_vram_region *vram; /** @mem.sys_mgr: system TTM manager */ struct ttm_resource_manager sys_mgr; /** @mem.sys_mgr: system memory shrinker. */ diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c index 3556c41c041b..a33a6f3a6731 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c @@ -1574,7 +1574,7 @@ static u64 pf_query_free_lmem(struct xe_gt *gt) { struct xe_tile *tile = gt->tile; - return xe_ttm_vram_get_avail(&tile->mem.vram.ttm.manager); + return xe_ttm_vram_get_avail(&tile->mem.vram->ttm.manager); } static u64 pf_query_max_lmem(struct xe_gt *gt) diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c index 8f8e9fdfb2a8..c0bd23aaaa23 100644 --- a/drivers/gpu/drm/xe/xe_migrate.c +++ b/drivers/gpu/drm/xe/xe_migrate.c @@ -130,9 +130,9 @@ static u64 xe_migrate_vram_ofs(struct xe_device *xe, u64 addr, bool is_comp_pte) u64 identity_offset = IDENTITY_OFFSET; if (GRAPHICS_VER(xe) >= 20 && is_comp_pte) - identity_offset += DIV_ROUND_UP_ULL(xe->mem.vram.actual_physical_size, SZ_1G); + identity_offset += DIV_ROUND_UP_ULL(xe->mem.vram->actual_physical_size, SZ_1G); - addr -= xe->mem.vram.dpa_base; + addr -= xe->mem.vram->dpa_base; return addr + (identity_offset << xe_pt_shift(2)); } @@ -142,22 +142,22 @@ static void xe_migrate_program_identity(struct xe_device *xe, struct xe_vm *vm, u64 pos, ofs, flags; u64 entry; /* XXX: Unclear if this should be usable_size? */ - u64 vram_limit = xe->mem.vram.actual_physical_size + - xe->mem.vram.dpa_base; + u64 vram_limit = xe->mem.vram->actual_physical_size + + xe->mem.vram->dpa_base; u32 level = 2; ofs = map_ofs + XE_PAGE_SIZE * level + vram_offset * 8; flags = vm->pt_ops->pte_encode_addr(xe, 0, pat_index, level, true, 0); - xe_assert(xe, IS_ALIGNED(xe->mem.vram.usable_size, SZ_2M)); + xe_assert(xe, IS_ALIGNED(xe->mem.vram->usable_size, SZ_2M)); /* * Use 1GB pages when possible, last chunk always use 2M * pages as mixing reserved memory (stolen, WOCPM) with a single * mapping is not allowed on certain platforms. */ - for (pos = xe->mem.vram.dpa_base; pos < vram_limit; + for (pos = xe->mem.vram->dpa_base; pos < vram_limit; pos += SZ_1G, ofs += 8) { if (pos + SZ_1G >= vram_limit) { entry = vm->pt_ops->pde_encode_bo(bo, pt_2m_ofs, @@ -310,7 +310,7 @@ static int xe_migrate_prepare_vm(struct xe_tile *tile, struct xe_migrate *m, xe_migrate_program_identity(xe, vm, bo, map_ofs, IDENTITY_OFFSET, pat_index, pt30_ofs); - xe_assert(xe, xe->mem.vram.actual_physical_size <= + xe_assert(xe, xe->mem.vram->actual_physical_size <= (MAX_NUM_PTE - IDENTITY_OFFSET) * SZ_1G); /* @@ -320,10 +320,10 @@ static int xe_migrate_prepare_vm(struct xe_tile *tile, struct xe_migrate *m, if (GRAPHICS_VER(xe) >= 20 && xe_device_has_flat_ccs(xe)) { u16 comp_pat_index = xe->pat.idx[XE_CACHE_NONE_COMPRESSION]; u64 vram_offset = IDENTITY_OFFSET + - DIV_ROUND_UP_ULL(xe->mem.vram.actual_physical_size, SZ_1G); + DIV_ROUND_UP_ULL(xe->mem.vram->actual_physical_size, SZ_1G); u64 pt31_ofs = bo->size - XE_PAGE_SIZE; - xe_assert(xe, xe->mem.vram.actual_physical_size <= (MAX_NUM_PTE - + xe_assert(xe, xe->mem.vram->actual_physical_size <= (MAX_NUM_PTE - IDENTITY_OFFSET - IDENTITY_OFFSET / 2) * SZ_1G); xe_migrate_program_identity(xe, vm, bo, map_ofs, vram_offset, comp_pat_index, pt31_ofs); diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c index 824461c31288..90494f16d3d8 100644 --- a/drivers/gpu/drm/xe/xe_pci.c +++ b/drivers/gpu/drm/xe/xe_pci.c @@ -714,12 +714,18 @@ static int xe_info_init(struct xe_device *xe, * All of these together determine the overall GT count. */ for_each_tile(tile, xe, id) { + int err; + gt = tile->primary_gt; gt->info.id = xe->info.gt_count++; gt->info.type = XE_GT_TYPE_MAIN; gt->info.has_indirect_ring_state = graphics_desc->has_indirect_ring_state; gt->info.engine_mask = graphics_desc->hw_engine_mask; + err = xe_tile_alloc_vram(tile); + if (err) + return err; + if (MEDIA_VER(xe) < 13 && media_desc) gt->info.engine_mask |= media_desc->hw_engine_mask; diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c index e8e1743dcb1e..ba9b7482605c 100644 --- a/drivers/gpu/drm/xe/xe_query.c +++ b/drivers/gpu/drm/xe/xe_query.c @@ -337,7 +337,7 @@ static int query_config(struct xe_device *xe, struct drm_xe_device_query *query) config->num_params = num_params; config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID] = xe->info.devid | (xe->info.revid << 16); - if (xe_device_get_root_tile(xe)->mem.vram.usable_size) + if (xe->mem.vram) config->info[DRM_XE_QUERY_CONFIG_FLAGS] |= DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM; if (xe->info.has_usm && IS_ENABLED(CONFIG_DRM_XE_GPUSVM)) diff --git a/drivers/gpu/drm/xe/xe_svm.c b/drivers/gpu/drm/xe/xe_svm.c index 26418e9bdff0..98d79c118e45 100644 --- a/drivers/gpu/drm/xe/xe_svm.c +++ b/drivers/gpu/drm/xe/xe_svm.c @@ -302,16 +302,11 @@ static struct xe_vram_region *page_to_vr(struct page *page) return container_of(page_pgmap(page), struct xe_vram_region, pagemap); } -static struct xe_tile *vr_to_tile(struct xe_vram_region *vr) -{ - return container_of(vr, struct xe_tile, mem.vram); -} - static u64 xe_vram_region_page_to_dpa(struct xe_vram_region *vr, struct page *page) { u64 dpa; - struct xe_tile *tile = vr_to_tile(vr); + struct xe_tile *tile = vr->tile; u64 pfn = page_to_pfn(page); u64 offset; @@ -366,7 +361,7 @@ static int xe_svm_copy(struct page **pages, dma_addr_t *dma_addr, if (!vr && spage) { vr = page_to_vr(spage); - tile = vr_to_tile(vr); + tile = vr->tile; } XE_WARN_ON(spage && page_to_vr(spage) != vr); @@ -502,7 +497,7 @@ static u64 block_offset_to_pfn(struct xe_vram_region *vr, u64 offset) static struct drm_buddy *tile_to_buddy(struct xe_tile *tile) { - return &tile->mem.vram.ttm.mm; + return &tile->mem.vram->ttm.mm; } static int xe_svm_populate_devmem_pfn(struct drm_gpusvm_devmem *devmem_allocation, @@ -516,7 +511,7 @@ static int xe_svm_populate_devmem_pfn(struct drm_gpusvm_devmem *devmem_allocatio list_for_each_entry(block, blocks, link) { struct xe_vram_region *vr = block->private; - struct xe_tile *tile = vr_to_tile(vr); + struct xe_tile *tile = vr->tile; struct drm_buddy *buddy = tile_to_buddy(tile); u64 block_pfn = block_offset_to_pfn(vr, drm_buddy_block_offset(block)); int i; @@ -679,7 +674,7 @@ u64 xe_svm_find_vma_start(struct xe_vm *vm, u64 start, u64 end, struct xe_vma *v #if IS_ENABLED(CONFIG_DRM_XE_DEVMEM_MIRROR) static struct xe_vram_region *tile_to_vr(struct xe_tile *tile) { - return &tile->mem.vram; + return tile->mem.vram; } /** @@ -726,7 +721,7 @@ int xe_svm_alloc_vram(struct xe_vm *vm, struct xe_tile *tile, drm_gpusvm_devmem_init(&bo->devmem_allocation, vm->xe->drm.dev, mm, &gpusvm_devmem_ops, - &tile->mem.vram.dpagemap, + &tile->mem.vram->dpagemap, xe_svm_range_size(range)); blocks = &to_xe_ttm_vram_mgr_resource(bo->ttm.resource)->blocks; diff --git a/drivers/gpu/drm/xe/xe_tile.c b/drivers/gpu/drm/xe/xe_tile.c index 672faa0b67f1..c64a4d1a5bb9 100644 --- a/drivers/gpu/drm/xe/xe_tile.c +++ b/drivers/gpu/drm/xe/xe_tile.c @@ -94,6 +94,33 @@ static int xe_tile_alloc(struct xe_tile *tile) return 0; } +/** + * xe_tile_alloc_vram - Perform per-tile VRAM structs allocation + * @tile: Tile to perform allocations for + * + * Allocates VRAM per-tile data structures using DRM-managed allocations. + * Does not touch the hardware. + * + * Returns -ENOMEM if allocations fail, otherwise 0. + */ +int xe_tile_alloc_vram(struct xe_tile *tile) +{ + struct xe_device *xe = tile_to_xe(tile); + struct xe_vram_region *vram; + + if (!IS_DGFX(xe)) + return 0; + + vram = drmm_kzalloc(&xe->drm, sizeof(*vram), GFP_KERNEL); + if (!vram) + return -ENOMEM; + + vram->tile = tile; + tile->mem.vram = vram; + + return 0; +} + /** * xe_tile_init_early - Initialize the tile and primary GT * @tile: Tile to initialize @@ -131,8 +158,8 @@ static int tile_ttm_mgr_init(struct xe_tile *tile) struct xe_device *xe = tile_to_xe(tile); int err; - if (tile->mem.vram.usable_size) { - err = xe_ttm_vram_mgr_init(tile, &tile->mem.vram.ttm); + if (tile->mem.vram->usable_size) { + err = xe_ttm_vram_mgr_init(tile, &tile->mem.vram->ttm); if (err) return err; xe->info.mem_region_mask |= BIT(tile->id) << 1; @@ -167,7 +194,7 @@ int xe_tile_init_noalloc(struct xe_tile *tile) xe_wa_apply_tile_workarounds(tile); if (xe->info.has_usm && IS_DGFX(xe)) - xe_devm_add(tile, &tile->mem.vram); + xe_devm_add(tile, tile->mem.vram); return xe_tile_sysfs_init(tile); } diff --git a/drivers/gpu/drm/xe/xe_tile.h b/drivers/gpu/drm/xe/xe_tile.h index eb939316d55b..8dd87ccb2aca 100644 --- a/drivers/gpu/drm/xe/xe_tile.h +++ b/drivers/gpu/drm/xe/xe_tile.h @@ -14,6 +14,8 @@ int xe_tile_init_early(struct xe_tile *tile, struct xe_device *xe, u8 id); int xe_tile_init_noalloc(struct xe_tile *tile); int xe_tile_init(struct xe_tile *tile); +int xe_tile_alloc_vram(struct xe_tile *tile); + void xe_tile_migrate_wait(struct xe_tile *tile); #endif diff --git a/drivers/gpu/drm/xe/xe_ttm_stolen_mgr.c b/drivers/gpu/drm/xe/xe_ttm_stolen_mgr.c index d9c9d2547aad..19bfc22b9706 100644 --- a/drivers/gpu/drm/xe/xe_ttm_stolen_mgr.c +++ b/drivers/gpu/drm/xe/xe_ttm_stolen_mgr.c @@ -89,8 +89,8 @@ static s64 detect_bar2_dgfx(struct xe_device *xe, struct xe_ttm_stolen_mgr *mgr) u64 tile_offset; u64 tile_size; - tile_offset = tile->mem.vram.io_start - xe->mem.vram.io_start; - tile_size = tile->mem.vram.actual_physical_size; + tile_offset = tile->mem.vram->io_start - xe->mem.vram->io_start; + tile_size = tile->mem.vram->actual_physical_size; /* Use DSM base address instead for stolen memory */ mgr->stolen_base = (xe_mmio_read64_2x32(mmio, DSMBASE) & BDSM_MASK) - tile_offset; @@ -107,7 +107,7 @@ static s64 detect_bar2_dgfx(struct xe_device *xe, struct xe_ttm_stolen_mgr *mgr) /* Verify usage fits in the actual resource available */ if (mgr->stolen_base + stolen_size <= pci_resource_len(pdev, LMEM_BAR)) - mgr->io_base = tile->mem.vram.io_start + mgr->stolen_base; + mgr->io_base = tile->mem.vram->io_start + mgr->stolen_base; /* * There may be few KB of platform dependent reserved memory at the end diff --git a/drivers/gpu/drm/xe/xe_ttm_vram_mgr.c b/drivers/gpu/drm/xe/xe_ttm_vram_mgr.c index 9e375a40aee9..d9afe0e22071 100644 --- a/drivers/gpu/drm/xe/xe_ttm_vram_mgr.c +++ b/drivers/gpu/drm/xe/xe_ttm_vram_mgr.c @@ -340,7 +340,7 @@ int __xe_ttm_vram_mgr_init(struct xe_device *xe, struct xe_ttm_vram_mgr *mgr, int xe_ttm_vram_mgr_init(struct xe_tile *tile, struct xe_ttm_vram_mgr *mgr) { struct xe_device *xe = tile_to_xe(tile); - struct xe_vram_region *vram = &tile->mem.vram; + struct xe_vram_region *vram = tile->mem.vram; return __xe_ttm_vram_mgr_init(xe, mgr, XE_PL_VRAM0 + tile->id, vram->usable_size, vram->io_size, @@ -392,7 +392,7 @@ int xe_ttm_vram_mgr_alloc_sgt(struct xe_device *xe, */ xe_res_first(res, offset, length, &cursor); for_each_sgtable_sg((*sgt), sg, i) { - phys_addr_t phys = cursor.start + tile->mem.vram.io_start; + phys_addr_t phys = cursor.start + tile->mem.vram->io_start; size_t size = min_t(u64, cursor.size, SZ_2G); dma_addr_t addr; diff --git a/drivers/gpu/drm/xe/xe_vram.c b/drivers/gpu/drm/xe/xe_vram.c index e421a74fb87c..18124a5fb291 100644 --- a/drivers/gpu/drm/xe/xe_vram.c +++ b/drivers/gpu/drm/xe/xe_vram.c @@ -147,16 +147,16 @@ static int determine_lmem_bar_size(struct xe_device *xe) resize_vram_bar(xe); - xe->mem.vram.io_start = pci_resource_start(pdev, LMEM_BAR); - xe->mem.vram.io_size = pci_resource_len(pdev, LMEM_BAR); - if (!xe->mem.vram.io_size) + xe->mem.vram->io_start = pci_resource_start(pdev, LMEM_BAR); + xe->mem.vram->io_size = pci_resource_len(pdev, LMEM_BAR); + if (!xe->mem.vram->io_size) return -EIO; /* XXX: Need to change when xe link code is ready */ - xe->mem.vram.dpa_base = 0; + xe->mem.vram->dpa_base = 0; /* set up a map to the total memory area. */ - xe->mem.vram.mapping = ioremap_wc(xe->mem.vram.io_start, xe->mem.vram.io_size); + xe->mem.vram->mapping = ioremap_wc(xe->mem.vram->io_start, xe->mem.vram->io_size); return 0; } @@ -278,13 +278,13 @@ static void vram_fini(void *arg) struct xe_tile *tile; int id; - if (xe->mem.vram.mapping) - iounmap(xe->mem.vram.mapping); + if (xe->mem.vram->mapping) + iounmap(xe->mem.vram->mapping); - xe->mem.vram.mapping = NULL; + xe->mem.vram->mapping = NULL; for_each_tile(tile, xe, id) - tile->mem.vram.mapping = NULL; + tile->mem.vram->mapping = NULL; } /** @@ -320,10 +320,10 @@ int xe_vram_probe(struct xe_device *xe) if (err) return err; - drm_info(&xe->drm, "VISIBLE VRAM: %pa, %pa\n", &xe->mem.vram.io_start, - &xe->mem.vram.io_size); + drm_info(&xe->drm, "VISIBLE VRAM: %pa, %pa\n", &xe->mem.vram->io_start, + &xe->mem.vram->io_size); - io_size = xe->mem.vram.io_size; + io_size = xe->mem.vram->io_size; /* tile specific ranges */ for_each_tile(tile, xe, id) { @@ -331,44 +331,48 @@ int xe_vram_probe(struct xe_device *xe) if (err) return err; - tile->mem.vram.actual_physical_size = tile_size; - tile->mem.vram.io_start = xe->mem.vram.io_start + tile_offset; - tile->mem.vram.io_size = min_t(u64, vram_size, io_size); + tile->mem.vram->actual_physical_size = tile_size; + tile->mem.vram->io_start = xe->mem.vram->io_start + tile_offset; + tile->mem.vram->io_size = min_t(u64, vram_size, io_size); - if (!tile->mem.vram.io_size) { + if (!tile->mem.vram->io_size) { drm_err(&xe->drm, "Tile without any CPU visible VRAM. Aborting.\n"); return -ENODEV; } - tile->mem.vram.dpa_base = xe->mem.vram.dpa_base + tile_offset; - tile->mem.vram.usable_size = vram_size; - tile->mem.vram.mapping = xe->mem.vram.mapping + tile_offset; + tile->mem.vram->dpa_base = xe->mem.vram->dpa_base + tile_offset; + tile->mem.vram->usable_size = vram_size; + tile->mem.vram->mapping = xe->mem.vram->mapping + tile_offset; - if (tile->mem.vram.io_size < tile->mem.vram.usable_size) + if (tile->mem.vram->io_size < tile->mem.vram->usable_size) drm_info(&xe->drm, "Small BAR device\n"); - drm_info(&xe->drm, "VRAM[%u, %u]: Actual physical size %pa, usable size exclude stolen %pa, CPU accessible size %pa\n", id, - tile->id, &tile->mem.vram.actual_physical_size, &tile->mem.vram.usable_size, &tile->mem.vram.io_size); - drm_info(&xe->drm, "VRAM[%u, %u]: DPA range: [%pa-%llx], io range: [%pa-%llx]\n", id, tile->id, - &tile->mem.vram.dpa_base, tile->mem.vram.dpa_base + (u64)tile->mem.vram.actual_physical_size, - &tile->mem.vram.io_start, tile->mem.vram.io_start + (u64)tile->mem.vram.io_size); + drm_info(&xe->drm, + "VRAM[%u, %u]: Actual physical size %pa, usable size exclude stolen %pa, CPU accessible size %pa\n", + id, tile->id, &tile->mem.vram->actual_physical_size, + &tile->mem.vram->usable_size, &tile->mem.vram->io_size); + drm_info(&xe->drm, "VRAM[%u, %u]: DPA range: [%pa-%llx], io range: [%pa-%llx]\n", + id, tile->id, &tile->mem.vram->dpa_base, + tile->mem.vram->dpa_base + (u64)tile->mem.vram->actual_physical_size, + &tile->mem.vram->io_start, + tile->mem.vram->io_start + (u64)tile->mem.vram->io_size); /* calculate total size using tile size to get the correct HW sizing */ total_size += tile_size; available_size += vram_size; - if (total_size > xe->mem.vram.io_size) { + if (total_size > xe->mem.vram->io_size) { drm_info(&xe->drm, "VRAM: %pa is larger than resource %pa\n", - &total_size, &xe->mem.vram.io_size); + &total_size, &xe->mem.vram->io_size); } io_size -= min_t(u64, tile_size, io_size); } - xe->mem.vram.actual_physical_size = total_size; + xe->mem.vram->actual_physical_size = total_size; - drm_info(&xe->drm, "Total VRAM: %pa, %pa\n", &xe->mem.vram.io_start, - &xe->mem.vram.actual_physical_size); - drm_info(&xe->drm, "Available VRAM: %pa, %pa\n", &xe->mem.vram.io_start, + drm_info(&xe->drm, "Total VRAM: %pa, %pa\n", &xe->mem.vram->io_start, + &xe->mem.vram->actual_physical_size); + drm_info(&xe->drm, "Available VRAM: %pa, %pa\n", &xe->mem.vram->io_start, &available_size); return devm_add_action_or_reset(xe->drm.dev, vram_fini, xe); -- 2.34.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH v3 1/2] drm/xe: Use dynamic allocation for tile and device VRAM region structures 2025-06-24 9:22 ` [PATCH v3 1/2] drm/xe: Use dynamic allocation for tile and device VRAM region structures Piórkowski, Piotr @ 2025-06-24 9:46 ` Michal Wajdeczko 2025-06-25 9:00 ` Jani Nikula 2025-06-24 9:53 ` Jani Nikula 1 sibling, 1 reply; 10+ messages in thread From: Michal Wajdeczko @ 2025-06-24 9:46 UTC (permalink / raw) To: Piórkowski, Piotr, intel-xe Cc: Stuart Summers, Matthew Auld, Satyanarayana K V P On 24.06.2025 11:22, Piórkowski, Piotr wrote: > diff --git a/drivers/gpu/drm/xe/xe_assert.h b/drivers/gpu/drm/xe/xe_assert.h > index 68fe70ce2be3..cd63cdd2dc78 100644 > --- a/drivers/gpu/drm/xe/xe_assert.h > +++ b/drivers/gpu/drm/xe/xe_assert.h > @@ -145,7 +145,7 @@ > const struct xe_tile *__tile = (tile); \ > char __buf[10] __maybe_unused; \ > xe_assert_msg(tile_to_xe(__tile), condition, "tile: %u VRAM %s\n" msg, \ > - __tile->id, ({ string_get_size(__tile->mem.vram.actual_physical_size, 1, \ > + __tile->id, ({ string_get_size(__tile->mem.vram->actual_physical_size, 1, \ > STRING_UNITS_2, __buf, sizeof(__buf)); __buf; }), ## arg); \ > }) > this assert will cause NPD on !DGFX, likely you need at least this: __tile->mem.vram ? __tile->mem.vram->actual_physical_size : 0 ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v3 1/2] drm/xe: Use dynamic allocation for tile and device VRAM region structures 2025-06-24 9:46 ` Michal Wajdeczko @ 2025-06-25 9:00 ` Jani Nikula 0 siblings, 0 replies; 10+ messages in thread From: Jani Nikula @ 2025-06-25 9:00 UTC (permalink / raw) To: Michal Wajdeczko, Piórkowski, Piotr, intel-xe Cc: Stuart Summers, Matthew Auld, Satyanarayana K V P On Tue, 24 Jun 2025, Michal Wajdeczko <michal.wajdeczko@intel.com> wrote: > On 24.06.2025 11:22, Piórkowski, Piotr wrote: >> diff --git a/drivers/gpu/drm/xe/xe_assert.h b/drivers/gpu/drm/xe/xe_assert.h >> index 68fe70ce2be3..cd63cdd2dc78 100644 >> --- a/drivers/gpu/drm/xe/xe_assert.h >> +++ b/drivers/gpu/drm/xe/xe_assert.h >> @@ -145,7 +145,7 @@ >> const struct xe_tile *__tile = (tile); \ >> char __buf[10] __maybe_unused; \ >> xe_assert_msg(tile_to_xe(__tile), condition, "tile: %u VRAM %s\n" msg, \ >> - __tile->id, ({ string_get_size(__tile->mem.vram.actual_physical_size, 1, \ >> + __tile->id, ({ string_get_size(__tile->mem.vram->actual_physical_size, 1, \ >> STRING_UNITS_2, __buf, sizeof(__buf)); __buf; }), ## arg); \ >> }) >> > > this assert will cause NPD on !DGFX, likely you need at least this: > > __tile->mem.vram ? __tile->mem.vram->actual_physical_size : 0 There'd be other benefits in adding abstractions for this, such as making vram an opaque pointer and not requiring its definition be included absolutely everywhere via xe_assert.h. BR, Jani. -- Jani Nikula, Intel ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v3 1/2] drm/xe: Use dynamic allocation for tile and device VRAM region structures 2025-06-24 9:22 ` [PATCH v3 1/2] drm/xe: Use dynamic allocation for tile and device VRAM region structures Piórkowski, Piotr 2025-06-24 9:46 ` Michal Wajdeczko @ 2025-06-24 9:53 ` Jani Nikula 1 sibling, 0 replies; 10+ messages in thread From: Jani Nikula @ 2025-06-24 9:53 UTC (permalink / raw) To: Piórkowski, Piotr, intel-xe Cc: Piotr Piórkowski, Stuart Summers, Matthew Auld, Satyanarayana K V P On Tue, 24 Jun 2025, Piórkowski, Piotr <piotr.piorkowski@intel.com> wrote: > From: Piotr Piórkowski <piotr.piorkowski@intel.com> > > In future platforms, we will need to represent the device and tile > VRAM regions in a more dynamic way, so let's abandon the static > allocation of these structures and start use a dynamic allocation. > > Signed-off-by: Piotr Piórkowski <piotr.piorkowski@intel.com> > Cc: Stuart Summers <stuart.summers@intel.com> > Cc: Matthew Auld <matthew.auld@intel.com> > Reviewed-by: Satyanarayana K V P <satyanarayana.k.v.p@intel.com> > --- > drivers/gpu/drm/xe/display/xe_fb_pin.c | 2 +- > drivers/gpu/drm/xe/display/xe_plane_initial.c | 2 +- > drivers/gpu/drm/xe/xe_assert.h | 2 +- > drivers/gpu/drm/xe/xe_device.c | 19 ++++++ > drivers/gpu/drm/xe/xe_device_types.h | 6 +- > drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c | 2 +- > drivers/gpu/drm/xe/xe_migrate.c | 18 ++--- > drivers/gpu/drm/xe/xe_pci.c | 6 ++ > drivers/gpu/drm/xe/xe_query.c | 2 +- > drivers/gpu/drm/xe/xe_svm.c | 17 ++--- > drivers/gpu/drm/xe/xe_tile.c | 33 +++++++++- > drivers/gpu/drm/xe/xe_tile.h | 2 + > drivers/gpu/drm/xe/xe_ttm_stolen_mgr.c | 6 +- > drivers/gpu/drm/xe/xe_ttm_vram_mgr.c | 4 +- > drivers/gpu/drm/xe/xe_vram.c | 66 ++++++++++--------- > 15 files changed, 121 insertions(+), 66 deletions(-) > > diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c > index 6b362695d6b6..733c17c945bf 100644 > --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c > +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c > @@ -294,7 +294,7 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb, > * accessible. This is important on small-bar systems where > * only some subset of VRAM is CPU accessible. > */ > - if (tile->mem.vram.io_size < tile->mem.vram.usable_size) { > + if (tile->mem.vram->io_size < tile->mem.vram->usable_size) { > ret = -EINVAL; > goto err; > } > diff --git a/drivers/gpu/drm/xe/display/xe_plane_initial.c b/drivers/gpu/drm/xe/display/xe_plane_initial.c > index b2ede3af9345..97b58c0ff39a 100644 > --- a/drivers/gpu/drm/xe/display/xe_plane_initial.c > +++ b/drivers/gpu/drm/xe/display/xe_plane_initial.c > @@ -103,7 +103,7 @@ initial_plane_bo(struct xe_device *xe, > * We don't currently expect this to ever be placed in the > * stolen portion. > */ > - if (phys_base >= tile0->mem.vram.usable_size) { > + if (phys_base >= tile0->mem.vram->usable_size) { > drm_err(&xe->drm, > "Initial plane programming using invalid range, phys_base=%pa\n", > &phys_base); > diff --git a/drivers/gpu/drm/xe/xe_assert.h b/drivers/gpu/drm/xe/xe_assert.h > index 68fe70ce2be3..cd63cdd2dc78 100644 > --- a/drivers/gpu/drm/xe/xe_assert.h > +++ b/drivers/gpu/drm/xe/xe_assert.h > @@ -145,7 +145,7 @@ > const struct xe_tile *__tile = (tile); \ > char __buf[10] __maybe_unused; \ > xe_assert_msg(tile_to_xe(__tile), condition, "tile: %u VRAM %s\n" msg, \ > - __tile->id, ({ string_get_size(__tile->mem.vram.actual_physical_size, 1, \ > + __tile->id, ({ string_get_size(__tile->mem.vram->actual_physical_size, 1, \ > STRING_UNITS_2, __buf, sizeof(__buf)); __buf; }), ## arg); \ > }) > > diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c > index e160e7be84f0..18f0d8f6d0a2 100644 > --- a/drivers/gpu/drm/xe/xe_device.c > +++ b/drivers/gpu/drm/xe/xe_device.c > @@ -685,6 +685,21 @@ static void sriov_update_device_info(struct xe_device *xe) > } > } > > +static int xe_device_vram_alloc(struct xe_device *xe) > +{ > + struct xe_vram_region *vram; > + > + if (!IS_DGFX(xe)) > + return 0; > + > + vram = drmm_kzalloc(&xe->drm, sizeof(*vram), GFP_KERNEL); > + if (!vram) > + return -ENOMEM; > + > + xe->mem.vram = vram; > + return 0; > +} > + > /** > * xe_device_probe_early: Device early probe > * @xe: xe device instance > @@ -729,6 +744,10 @@ int xe_device_probe_early(struct xe_device *xe) > > xe->wedged.mode = xe_modparam.wedged_mode; > > + err = xe_device_vram_alloc(xe); > + if (err) > + return err; > + > return 0; > } > ALLOW_ERROR_INJECTION(xe_device_probe_early, ERRNO); /* See xe_pci_probe() */ > diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h > index 6aca4b1a2824..a7bcda67d05f 100644 > --- a/drivers/gpu/drm/xe/xe_device_types.h > +++ b/drivers/gpu/drm/xe/xe_device_types.h > @@ -74,6 +74,8 @@ struct xe_pxp; > * device, such as HBM memory or CXL extension memory. > */ > struct xe_vram_region { > + /** @tile: Backpointer to tile */ > + struct xe_tile *tile; > /** @io_start: IO start address of this VRAM instance */ > resource_size_t io_start; > /** > @@ -213,7 +215,7 @@ struct xe_tile { > * Although VRAM is associated with a specific tile, it can > * still be accessed by all tiles' GTs. > */ > - struct xe_vram_region vram; > + struct xe_vram_region *vram; With this, struct xe_vram_region definition could be moved out of xe_device_types as follow-up, and the pointer could be opaque to a lot of code. > > /** @mem.ggtt: Global graphics translation table */ > struct xe_ggtt *ggtt; > @@ -394,7 +396,7 @@ struct xe_device { > /** @mem: memory info for device */ > struct { > /** @mem.vram: VRAM info for device */ > - struct xe_vram_region vram; > + struct xe_vram_region *vram; > /** @mem.sys_mgr: system TTM manager */ > struct ttm_resource_manager sys_mgr; > /** @mem.sys_mgr: system memory shrinker. */ > diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c > index 3556c41c041b..a33a6f3a6731 100644 > --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c > +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c > @@ -1574,7 +1574,7 @@ static u64 pf_query_free_lmem(struct xe_gt *gt) > { > struct xe_tile *tile = gt->tile; > > - return xe_ttm_vram_get_avail(&tile->mem.vram.ttm.manager); > + return xe_ttm_vram_get_avail(&tile->mem.vram->ttm.manager); > } > > static u64 pf_query_max_lmem(struct xe_gt *gt) > diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c > index 8f8e9fdfb2a8..c0bd23aaaa23 100644 > --- a/drivers/gpu/drm/xe/xe_migrate.c > +++ b/drivers/gpu/drm/xe/xe_migrate.c > @@ -130,9 +130,9 @@ static u64 xe_migrate_vram_ofs(struct xe_device *xe, u64 addr, bool is_comp_pte) > u64 identity_offset = IDENTITY_OFFSET; > > if (GRAPHICS_VER(xe) >= 20 && is_comp_pte) > - identity_offset += DIV_ROUND_UP_ULL(xe->mem.vram.actual_physical_size, SZ_1G); > + identity_offset += DIV_ROUND_UP_ULL(xe->mem.vram->actual_physical_size, SZ_1G); > > - addr -= xe->mem.vram.dpa_base; > + addr -= xe->mem.vram->dpa_base; > return addr + (identity_offset << xe_pt_shift(2)); > } > > @@ -142,22 +142,22 @@ static void xe_migrate_program_identity(struct xe_device *xe, struct xe_vm *vm, > u64 pos, ofs, flags; > u64 entry; > /* XXX: Unclear if this should be usable_size? */ > - u64 vram_limit = xe->mem.vram.actual_physical_size + > - xe->mem.vram.dpa_base; > + u64 vram_limit = xe->mem.vram->actual_physical_size + > + xe->mem.vram->dpa_base; > u32 level = 2; > > ofs = map_ofs + XE_PAGE_SIZE * level + vram_offset * 8; > flags = vm->pt_ops->pte_encode_addr(xe, 0, pat_index, level, > true, 0); > > - xe_assert(xe, IS_ALIGNED(xe->mem.vram.usable_size, SZ_2M)); > + xe_assert(xe, IS_ALIGNED(xe->mem.vram->usable_size, SZ_2M)); > > /* > * Use 1GB pages when possible, last chunk always use 2M > * pages as mixing reserved memory (stolen, WOCPM) with a single > * mapping is not allowed on certain platforms. > */ > - for (pos = xe->mem.vram.dpa_base; pos < vram_limit; > + for (pos = xe->mem.vram->dpa_base; pos < vram_limit; > pos += SZ_1G, ofs += 8) { > if (pos + SZ_1G >= vram_limit) { > entry = vm->pt_ops->pde_encode_bo(bo, pt_2m_ofs, > @@ -310,7 +310,7 @@ static int xe_migrate_prepare_vm(struct xe_tile *tile, struct xe_migrate *m, > > xe_migrate_program_identity(xe, vm, bo, map_ofs, IDENTITY_OFFSET, > pat_index, pt30_ofs); > - xe_assert(xe, xe->mem.vram.actual_physical_size <= > + xe_assert(xe, xe->mem.vram->actual_physical_size <= > (MAX_NUM_PTE - IDENTITY_OFFSET) * SZ_1G); > > /* > @@ -320,10 +320,10 @@ static int xe_migrate_prepare_vm(struct xe_tile *tile, struct xe_migrate *m, > if (GRAPHICS_VER(xe) >= 20 && xe_device_has_flat_ccs(xe)) { > u16 comp_pat_index = xe->pat.idx[XE_CACHE_NONE_COMPRESSION]; > u64 vram_offset = IDENTITY_OFFSET + > - DIV_ROUND_UP_ULL(xe->mem.vram.actual_physical_size, SZ_1G); > + DIV_ROUND_UP_ULL(xe->mem.vram->actual_physical_size, SZ_1G); > u64 pt31_ofs = bo->size - XE_PAGE_SIZE; > > - xe_assert(xe, xe->mem.vram.actual_physical_size <= (MAX_NUM_PTE - > + xe_assert(xe, xe->mem.vram->actual_physical_size <= (MAX_NUM_PTE - > IDENTITY_OFFSET - IDENTITY_OFFSET / 2) * SZ_1G); > xe_migrate_program_identity(xe, vm, bo, map_ofs, vram_offset, > comp_pat_index, pt31_ofs); > diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c > index 824461c31288..90494f16d3d8 100644 > --- a/drivers/gpu/drm/xe/xe_pci.c > +++ b/drivers/gpu/drm/xe/xe_pci.c > @@ -714,12 +714,18 @@ static int xe_info_init(struct xe_device *xe, > * All of these together determine the overall GT count. > */ > for_each_tile(tile, xe, id) { > + int err; > + > gt = tile->primary_gt; > gt->info.id = xe->info.gt_count++; > gt->info.type = XE_GT_TYPE_MAIN; > gt->info.has_indirect_ring_state = graphics_desc->has_indirect_ring_state; > gt->info.engine_mask = graphics_desc->hw_engine_mask; > > + err = xe_tile_alloc_vram(tile); > + if (err) > + return err; > + > if (MEDIA_VER(xe) < 13 && media_desc) > gt->info.engine_mask |= media_desc->hw_engine_mask; > > diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c > index e8e1743dcb1e..ba9b7482605c 100644 > --- a/drivers/gpu/drm/xe/xe_query.c > +++ b/drivers/gpu/drm/xe/xe_query.c > @@ -337,7 +337,7 @@ static int query_config(struct xe_device *xe, struct drm_xe_device_query *query) > config->num_params = num_params; > config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID] = > xe->info.devid | (xe->info.revid << 16); > - if (xe_device_get_root_tile(xe)->mem.vram.usable_size) > + if (xe->mem.vram) > config->info[DRM_XE_QUERY_CONFIG_FLAGS] |= > DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM; > if (xe->info.has_usm && IS_ENABLED(CONFIG_DRM_XE_GPUSVM)) > diff --git a/drivers/gpu/drm/xe/xe_svm.c b/drivers/gpu/drm/xe/xe_svm.c > index 26418e9bdff0..98d79c118e45 100644 > --- a/drivers/gpu/drm/xe/xe_svm.c > +++ b/drivers/gpu/drm/xe/xe_svm.c > @@ -302,16 +302,11 @@ static struct xe_vram_region *page_to_vr(struct page *page) > return container_of(page_pgmap(page), struct xe_vram_region, pagemap); > } > > -static struct xe_tile *vr_to_tile(struct xe_vram_region *vr) > -{ > - return container_of(vr, struct xe_tile, mem.vram); > -} > - > static u64 xe_vram_region_page_to_dpa(struct xe_vram_region *vr, > struct page *page) > { > u64 dpa; > - struct xe_tile *tile = vr_to_tile(vr); > + struct xe_tile *tile = vr->tile; > u64 pfn = page_to_pfn(page); > u64 offset; > > @@ -366,7 +361,7 @@ static int xe_svm_copy(struct page **pages, dma_addr_t *dma_addr, > > if (!vr && spage) { > vr = page_to_vr(spage); > - tile = vr_to_tile(vr); > + tile = vr->tile; > } > XE_WARN_ON(spage && page_to_vr(spage) != vr); > > @@ -502,7 +497,7 @@ static u64 block_offset_to_pfn(struct xe_vram_region *vr, u64 offset) > > static struct drm_buddy *tile_to_buddy(struct xe_tile *tile) > { > - return &tile->mem.vram.ttm.mm; > + return &tile->mem.vram->ttm.mm; > } > > static int xe_svm_populate_devmem_pfn(struct drm_gpusvm_devmem *devmem_allocation, > @@ -516,7 +511,7 @@ static int xe_svm_populate_devmem_pfn(struct drm_gpusvm_devmem *devmem_allocatio > > list_for_each_entry(block, blocks, link) { > struct xe_vram_region *vr = block->private; > - struct xe_tile *tile = vr_to_tile(vr); > + struct xe_tile *tile = vr->tile; > struct drm_buddy *buddy = tile_to_buddy(tile); > u64 block_pfn = block_offset_to_pfn(vr, drm_buddy_block_offset(block)); > int i; > @@ -679,7 +674,7 @@ u64 xe_svm_find_vma_start(struct xe_vm *vm, u64 start, u64 end, struct xe_vma *v > #if IS_ENABLED(CONFIG_DRM_XE_DEVMEM_MIRROR) > static struct xe_vram_region *tile_to_vr(struct xe_tile *tile) > { > - return &tile->mem.vram; > + return tile->mem.vram; > } > > /** > @@ -726,7 +721,7 @@ int xe_svm_alloc_vram(struct xe_vm *vm, struct xe_tile *tile, > drm_gpusvm_devmem_init(&bo->devmem_allocation, > vm->xe->drm.dev, mm, > &gpusvm_devmem_ops, > - &tile->mem.vram.dpagemap, > + &tile->mem.vram->dpagemap, > xe_svm_range_size(range)); > > blocks = &to_xe_ttm_vram_mgr_resource(bo->ttm.resource)->blocks; > diff --git a/drivers/gpu/drm/xe/xe_tile.c b/drivers/gpu/drm/xe/xe_tile.c > index 672faa0b67f1..c64a4d1a5bb9 100644 > --- a/drivers/gpu/drm/xe/xe_tile.c > +++ b/drivers/gpu/drm/xe/xe_tile.c > @@ -94,6 +94,33 @@ static int xe_tile_alloc(struct xe_tile *tile) > return 0; > } > > +/** > + * xe_tile_alloc_vram - Perform per-tile VRAM structs allocation > + * @tile: Tile to perform allocations for > + * > + * Allocates VRAM per-tile data structures using DRM-managed allocations. > + * Does not touch the hardware. > + * > + * Returns -ENOMEM if allocations fail, otherwise 0. > + */ > +int xe_tile_alloc_vram(struct xe_tile *tile) > +{ > + struct xe_device *xe = tile_to_xe(tile); > + struct xe_vram_region *vram; > + > + if (!IS_DGFX(xe)) > + return 0; > + > + vram = drmm_kzalloc(&xe->drm, sizeof(*vram), GFP_KERNEL); > + if (!vram) > + return -ENOMEM; > + > + vram->tile = tile; > + tile->mem.vram = vram; > + > + return 0; > +} > + > /** > * xe_tile_init_early - Initialize the tile and primary GT > * @tile: Tile to initialize > @@ -131,8 +158,8 @@ static int tile_ttm_mgr_init(struct xe_tile *tile) > struct xe_device *xe = tile_to_xe(tile); > int err; > > - if (tile->mem.vram.usable_size) { > - err = xe_ttm_vram_mgr_init(tile, &tile->mem.vram.ttm); > + if (tile->mem.vram->usable_size) { > + err = xe_ttm_vram_mgr_init(tile, &tile->mem.vram->ttm); > if (err) > return err; > xe->info.mem_region_mask |= BIT(tile->id) << 1; > @@ -167,7 +194,7 @@ int xe_tile_init_noalloc(struct xe_tile *tile) > xe_wa_apply_tile_workarounds(tile); > > if (xe->info.has_usm && IS_DGFX(xe)) > - xe_devm_add(tile, &tile->mem.vram); > + xe_devm_add(tile, tile->mem.vram); > > return xe_tile_sysfs_init(tile); > } > diff --git a/drivers/gpu/drm/xe/xe_tile.h b/drivers/gpu/drm/xe/xe_tile.h > index eb939316d55b..8dd87ccb2aca 100644 > --- a/drivers/gpu/drm/xe/xe_tile.h > +++ b/drivers/gpu/drm/xe/xe_tile.h > @@ -14,6 +14,8 @@ int xe_tile_init_early(struct xe_tile *tile, struct xe_device *xe, u8 id); > int xe_tile_init_noalloc(struct xe_tile *tile); > int xe_tile_init(struct xe_tile *tile); > > +int xe_tile_alloc_vram(struct xe_tile *tile); > + > void xe_tile_migrate_wait(struct xe_tile *tile); > > #endif > diff --git a/drivers/gpu/drm/xe/xe_ttm_stolen_mgr.c b/drivers/gpu/drm/xe/xe_ttm_stolen_mgr.c > index d9c9d2547aad..19bfc22b9706 100644 > --- a/drivers/gpu/drm/xe/xe_ttm_stolen_mgr.c > +++ b/drivers/gpu/drm/xe/xe_ttm_stolen_mgr.c > @@ -89,8 +89,8 @@ static s64 detect_bar2_dgfx(struct xe_device *xe, struct xe_ttm_stolen_mgr *mgr) > u64 tile_offset; > u64 tile_size; > > - tile_offset = tile->mem.vram.io_start - xe->mem.vram.io_start; > - tile_size = tile->mem.vram.actual_physical_size; > + tile_offset = tile->mem.vram->io_start - xe->mem.vram->io_start; > + tile_size = tile->mem.vram->actual_physical_size; > > /* Use DSM base address instead for stolen memory */ > mgr->stolen_base = (xe_mmio_read64_2x32(mmio, DSMBASE) & BDSM_MASK) - tile_offset; > @@ -107,7 +107,7 @@ static s64 detect_bar2_dgfx(struct xe_device *xe, struct xe_ttm_stolen_mgr *mgr) > > /* Verify usage fits in the actual resource available */ > if (mgr->stolen_base + stolen_size <= pci_resource_len(pdev, LMEM_BAR)) > - mgr->io_base = tile->mem.vram.io_start + mgr->stolen_base; > + mgr->io_base = tile->mem.vram->io_start + mgr->stolen_base; > > /* > * There may be few KB of platform dependent reserved memory at the end > diff --git a/drivers/gpu/drm/xe/xe_ttm_vram_mgr.c b/drivers/gpu/drm/xe/xe_ttm_vram_mgr.c > index 9e375a40aee9..d9afe0e22071 100644 > --- a/drivers/gpu/drm/xe/xe_ttm_vram_mgr.c > +++ b/drivers/gpu/drm/xe/xe_ttm_vram_mgr.c > @@ -340,7 +340,7 @@ int __xe_ttm_vram_mgr_init(struct xe_device *xe, struct xe_ttm_vram_mgr *mgr, > int xe_ttm_vram_mgr_init(struct xe_tile *tile, struct xe_ttm_vram_mgr *mgr) > { > struct xe_device *xe = tile_to_xe(tile); > - struct xe_vram_region *vram = &tile->mem.vram; > + struct xe_vram_region *vram = tile->mem.vram; > > return __xe_ttm_vram_mgr_init(xe, mgr, XE_PL_VRAM0 + tile->id, > vram->usable_size, vram->io_size, > @@ -392,7 +392,7 @@ int xe_ttm_vram_mgr_alloc_sgt(struct xe_device *xe, > */ > xe_res_first(res, offset, length, &cursor); > for_each_sgtable_sg((*sgt), sg, i) { > - phys_addr_t phys = cursor.start + tile->mem.vram.io_start; > + phys_addr_t phys = cursor.start + tile->mem.vram->io_start; > size_t size = min_t(u64, cursor.size, SZ_2G); > dma_addr_t addr; > > diff --git a/drivers/gpu/drm/xe/xe_vram.c b/drivers/gpu/drm/xe/xe_vram.c > index e421a74fb87c..18124a5fb291 100644 > --- a/drivers/gpu/drm/xe/xe_vram.c > +++ b/drivers/gpu/drm/xe/xe_vram.c > @@ -147,16 +147,16 @@ static int determine_lmem_bar_size(struct xe_device *xe) > > resize_vram_bar(xe); > > - xe->mem.vram.io_start = pci_resource_start(pdev, LMEM_BAR); > - xe->mem.vram.io_size = pci_resource_len(pdev, LMEM_BAR); > - if (!xe->mem.vram.io_size) > + xe->mem.vram->io_start = pci_resource_start(pdev, LMEM_BAR); > + xe->mem.vram->io_size = pci_resource_len(pdev, LMEM_BAR); > + if (!xe->mem.vram->io_size) > return -EIO; > > /* XXX: Need to change when xe link code is ready */ > - xe->mem.vram.dpa_base = 0; > + xe->mem.vram->dpa_base = 0; > > /* set up a map to the total memory area. */ > - xe->mem.vram.mapping = ioremap_wc(xe->mem.vram.io_start, xe->mem.vram.io_size); > + xe->mem.vram->mapping = ioremap_wc(xe->mem.vram->io_start, xe->mem.vram->io_size); > > return 0; > } > @@ -278,13 +278,13 @@ static void vram_fini(void *arg) > struct xe_tile *tile; > int id; > > - if (xe->mem.vram.mapping) > - iounmap(xe->mem.vram.mapping); > + if (xe->mem.vram->mapping) > + iounmap(xe->mem.vram->mapping); > > - xe->mem.vram.mapping = NULL; > + xe->mem.vram->mapping = NULL; > > for_each_tile(tile, xe, id) > - tile->mem.vram.mapping = NULL; > + tile->mem.vram->mapping = NULL; > } > > /** > @@ -320,10 +320,10 @@ int xe_vram_probe(struct xe_device *xe) > if (err) > return err; > > - drm_info(&xe->drm, "VISIBLE VRAM: %pa, %pa\n", &xe->mem.vram.io_start, > - &xe->mem.vram.io_size); > + drm_info(&xe->drm, "VISIBLE VRAM: %pa, %pa\n", &xe->mem.vram->io_start, > + &xe->mem.vram->io_size); > > - io_size = xe->mem.vram.io_size; > + io_size = xe->mem.vram->io_size; > > /* tile specific ranges */ > for_each_tile(tile, xe, id) { > @@ -331,44 +331,48 @@ int xe_vram_probe(struct xe_device *xe) > if (err) > return err; > > - tile->mem.vram.actual_physical_size = tile_size; > - tile->mem.vram.io_start = xe->mem.vram.io_start + tile_offset; > - tile->mem.vram.io_size = min_t(u64, vram_size, io_size); > + tile->mem.vram->actual_physical_size = tile_size; > + tile->mem.vram->io_start = xe->mem.vram->io_start + tile_offset; > + tile->mem.vram->io_size = min_t(u64, vram_size, io_size); > > - if (!tile->mem.vram.io_size) { > + if (!tile->mem.vram->io_size) { > drm_err(&xe->drm, "Tile without any CPU visible VRAM. Aborting.\n"); > return -ENODEV; > } > > - tile->mem.vram.dpa_base = xe->mem.vram.dpa_base + tile_offset; > - tile->mem.vram.usable_size = vram_size; > - tile->mem.vram.mapping = xe->mem.vram.mapping + tile_offset; > + tile->mem.vram->dpa_base = xe->mem.vram->dpa_base + tile_offset; > + tile->mem.vram->usable_size = vram_size; > + tile->mem.vram->mapping = xe->mem.vram->mapping + tile_offset; > > - if (tile->mem.vram.io_size < tile->mem.vram.usable_size) > + if (tile->mem.vram->io_size < tile->mem.vram->usable_size) > drm_info(&xe->drm, "Small BAR device\n"); > - drm_info(&xe->drm, "VRAM[%u, %u]: Actual physical size %pa, usable size exclude stolen %pa, CPU accessible size %pa\n", id, > - tile->id, &tile->mem.vram.actual_physical_size, &tile->mem.vram.usable_size, &tile->mem.vram.io_size); > - drm_info(&xe->drm, "VRAM[%u, %u]: DPA range: [%pa-%llx], io range: [%pa-%llx]\n", id, tile->id, > - &tile->mem.vram.dpa_base, tile->mem.vram.dpa_base + (u64)tile->mem.vram.actual_physical_size, > - &tile->mem.vram.io_start, tile->mem.vram.io_start + (u64)tile->mem.vram.io_size); > + drm_info(&xe->drm, > + "VRAM[%u, %u]: Actual physical size %pa, usable size exclude stolen %pa, CPU accessible size %pa\n", > + id, tile->id, &tile->mem.vram->actual_physical_size, > + &tile->mem.vram->usable_size, &tile->mem.vram->io_size); > + drm_info(&xe->drm, "VRAM[%u, %u]: DPA range: [%pa-%llx], io range: [%pa-%llx]\n", > + id, tile->id, &tile->mem.vram->dpa_base, > + tile->mem.vram->dpa_base + (u64)tile->mem.vram->actual_physical_size, > + &tile->mem.vram->io_start, > + tile->mem.vram->io_start + (u64)tile->mem.vram->io_size); > > /* calculate total size using tile size to get the correct HW sizing */ > total_size += tile_size; > available_size += vram_size; > > - if (total_size > xe->mem.vram.io_size) { > + if (total_size > xe->mem.vram->io_size) { > drm_info(&xe->drm, "VRAM: %pa is larger than resource %pa\n", > - &total_size, &xe->mem.vram.io_size); > + &total_size, &xe->mem.vram->io_size); > } > > io_size -= min_t(u64, tile_size, io_size); > } > > - xe->mem.vram.actual_physical_size = total_size; > + xe->mem.vram->actual_physical_size = total_size; > > - drm_info(&xe->drm, "Total VRAM: %pa, %pa\n", &xe->mem.vram.io_start, > - &xe->mem.vram.actual_physical_size); > - drm_info(&xe->drm, "Available VRAM: %pa, %pa\n", &xe->mem.vram.io_start, > + drm_info(&xe->drm, "Total VRAM: %pa, %pa\n", &xe->mem.vram->io_start, > + &xe->mem.vram->actual_physical_size); > + drm_info(&xe->drm, "Available VRAM: %pa, %pa\n", &xe->mem.vram->io_start, > &available_size); > > return devm_add_action_or_reset(xe->drm.dev, vram_fini, xe); -- Jani Nikula, Intel ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v3 2/2] drm/xe: Unify the initialization of VRAM regions 2025-06-24 9:22 [PATCH v3 0/2] Cleaning up code related to VRAM regions and its initialization - part 2 Piórkowski, Piotr 2025-06-24 9:22 ` [PATCH v3 1/2] drm/xe: Use dynamic allocation for tile and device VRAM region structures Piórkowski, Piotr @ 2025-06-24 9:22 ` Piórkowski, Piotr 2025-06-24 10:10 ` Matthew Auld 2025-06-24 12:27 ` ✓ CI.KUnit: success for Cleaning up code related to VRAM regions and its initialization - part 2 (rev6) Patchwork ` (2 subsequent siblings) 4 siblings, 1 reply; 10+ messages in thread From: Piórkowski, Piotr @ 2025-06-24 9:22 UTC (permalink / raw) To: intel-xe; +Cc: Piotr Piórkowski, Stuart Summers, Matthew Auld, Jani Nikula From: Piotr Piórkowski <piotr.piorkowski@intel.com> Currently in the drivers we have defined VRAM regions per device and per tile. Initialization of these regions is done in two completely different ways. To simplify the logic of the code and make it easier to add new regions in the future, let's unify the way we initialize VRAM regions. v2: - fix doc comments in struct xe_vram_region - remove unnecessary includes (Jani) v3: - move code from xe_vram_init_regions_managers to xe_tile_init_noalloc (Matthew) - replace ioremap_wc to devm_ioremap_wc for mapping VRAM BAR (Matthew) - Replace the tile id parameter with vram region in the xe_pf_begin function. Signed-off-by: Piotr Piórkowski <piotr.piorkowski@intel.com> Cc: Stuart Summers <stuart.summers@intel.com> Cc: Matthew Auld <matthew.auld@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/xe/xe_device_types.h | 8 ++ drivers/gpu/drm/xe/xe_gt_pagefault.c | 12 ++- drivers/gpu/drm/xe/xe_query.c | 2 +- drivers/gpu/drm/xe/xe_tile.c | 38 +++---- drivers/gpu/drm/xe/xe_ttm_vram_mgr.c | 16 ++- drivers/gpu/drm/xe/xe_ttm_vram_mgr.h | 3 +- drivers/gpu/drm/xe/xe_vram.c | 148 ++++++++++++++++----------- drivers/gpu/drm/xe/xe_vram.h | 4 + 8 files changed, 135 insertions(+), 96 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h index a7bcda67d05f..e34a48d1312b 100644 --- a/drivers/gpu/drm/xe/xe_device_types.h +++ b/drivers/gpu/drm/xe/xe_device_types.h @@ -76,6 +76,12 @@ struct xe_pxp; struct xe_vram_region { /** @tile: Backpointer to tile */ struct xe_tile *tile; + /** + * @id: VRAM region instance id + * + * The value should be unique for VRAM region. + */ + u8 id; /** @io_start: IO start address of this VRAM instance */ resource_size_t io_start; /** @@ -108,6 +114,8 @@ struct xe_vram_region { void __iomem *mapping; /** @ttm: VRAM TTM manager */ struct xe_ttm_vram_mgr ttm; + /** @placement: TTM placement dedicated for this region */ + u32 placement; #if IS_ENABLED(CONFIG_DRM_XE_DEVMEM_MIRROR) /** @pagemap: Used to remap device memory as ZONE_DEVICE */ struct dev_pagemap pagemap; diff --git a/drivers/gpu/drm/xe/xe_gt_pagefault.c b/drivers/gpu/drm/xe/xe_gt_pagefault.c index 3522865c67c9..a20ddab31c96 100644 --- a/drivers/gpu/drm/xe/xe_gt_pagefault.c +++ b/drivers/gpu/drm/xe/xe_gt_pagefault.c @@ -74,7 +74,7 @@ static bool vma_is_valid(struct xe_tile *tile, struct xe_vma *vma) } static int xe_pf_begin(struct drm_exec *exec, struct xe_vma *vma, - bool atomic, unsigned int id) + bool atomic, struct xe_vram_region *vram) { struct xe_bo *bo = xe_vma_bo(vma); struct xe_vm *vm = xe_vma_vm(vma); @@ -84,14 +84,16 @@ static int xe_pf_begin(struct drm_exec *exec, struct xe_vma *vma, if (err) return err; - if (atomic && IS_DGFX(vm->xe)) { + if (atomic && vram) { + xe_assert(vm->xe, IS_DGFX(vm->xe)); + if (xe_vma_is_userptr(vma)) { err = -EACCES; return err; } /* Migrate to VRAM, move should invalidate the VMA first */ - err = xe_bo_migrate(bo, XE_PL_VRAM0 + id); + err = xe_bo_migrate(bo, vram->placement); if (err) return err; } else if (bo) { @@ -138,7 +140,7 @@ static int handle_vma_pagefault(struct xe_gt *gt, struct xe_vma *vma, /* Lock VM and BOs dma-resv */ drm_exec_init(&exec, 0, 0); drm_exec_until_all_locked(&exec) { - err = xe_pf_begin(&exec, vma, atomic, tile->id); + err = xe_pf_begin(&exec, vma, atomic, tile->mem.vram); drm_exec_retry_on_contention(&exec); if (xe_vm_validate_should_retry(&exec, err, &end)) err = -EAGAIN; @@ -572,7 +574,7 @@ static int handle_acc(struct xe_gt *gt, struct acc *acc) /* Lock VM and BOs dma-resv */ drm_exec_init(&exec, 0, 0); drm_exec_until_all_locked(&exec) { - ret = xe_pf_begin(&exec, vma, true, tile->id); + ret = xe_pf_begin(&exec, vma, true, tile->mem.vram); drm_exec_retry_on_contention(&exec); if (ret) break; diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c index ba9b7482605c..ffd2efffa7a3 100644 --- a/drivers/gpu/drm/xe/xe_query.c +++ b/drivers/gpu/drm/xe/xe_query.c @@ -409,7 +409,7 @@ static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query gt_list->gt_list[id].near_mem_regions = 0x1; else gt_list->gt_list[id].near_mem_regions = - BIT(gt_to_tile(gt)->id) << 1; + BIT(gt_to_tile(gt)->mem.vram->id) << 1; gt_list->gt_list[id].far_mem_regions = xe->info.mem_region_mask ^ gt_list->gt_list[id].near_mem_regions; diff --git a/drivers/gpu/drm/xe/xe_tile.c b/drivers/gpu/drm/xe/xe_tile.c index c64a4d1a5bb9..3acd8e359070 100644 --- a/drivers/gpu/drm/xe/xe_tile.c +++ b/drivers/gpu/drm/xe/xe_tile.c @@ -7,6 +7,7 @@ #include <drm/drm_managed.h> +#include "xe_bo.h" #include "xe_device.h" #include "xe_ggtt.h" #include "xe_gt.h" @@ -18,6 +19,7 @@ #include "xe_tile_sysfs.h" #include "xe_ttm_vram_mgr.h" #include "xe_wa.h" +#include "xe_vram.h" /** * DOC: Multi-tile Design @@ -111,11 +113,9 @@ int xe_tile_alloc_vram(struct xe_tile *tile) if (!IS_DGFX(xe)) return 0; - vram = drmm_kzalloc(&xe->drm, sizeof(*vram), GFP_KERNEL); - if (!vram) - return -ENOMEM; - - vram->tile = tile; + vram = xe_vram_region_alloc(xe, tile->id, XE_PL_VRAM0 + tile->id); + if (IS_ERR(vram)) + return PTR_ERR(vram); tile->mem.vram = vram; return 0; @@ -153,21 +153,6 @@ int xe_tile_init_early(struct xe_tile *tile, struct xe_device *xe, u8 id) } ALLOW_ERROR_INJECTION(xe_tile_init_early, ERRNO); /* See xe_pci_probe() */ -static int tile_ttm_mgr_init(struct xe_tile *tile) -{ - struct xe_device *xe = tile_to_xe(tile); - int err; - - if (tile->mem.vram->usable_size) { - err = xe_ttm_vram_mgr_init(tile, &tile->mem.vram->ttm); - if (err) - return err; - xe->info.mem_region_mask |= BIT(tile->id) << 1; - } - - return 0; -} - /** * xe_tile_init_noalloc - Init tile up to the point where allocations can happen. * @tile: The tile to initialize. @@ -185,17 +170,20 @@ static int tile_ttm_mgr_init(struct xe_tile *tile) int xe_tile_init_noalloc(struct xe_tile *tile) { struct xe_device *xe = tile_to_xe(tile); - int err; - - err = tile_ttm_mgr_init(tile); - if (err) - return err; xe_wa_apply_tile_workarounds(tile); if (xe->info.has_usm && IS_DGFX(xe)) xe_devm_add(tile, tile->mem.vram); + if (IS_DGFX(xe) && !ttm_resource_manager_used(&tile->mem.vram->ttm.manager)) { + int err = xe_ttm_vram_mgr_init(xe, tile->mem.vram); + + if (err) + return err; + xe->info.mem_region_mask |= BIT(tile->mem.vram->id) << 1; + } + return xe_tile_sysfs_init(tile); } diff --git a/drivers/gpu/drm/xe/xe_ttm_vram_mgr.c b/drivers/gpu/drm/xe/xe_ttm_vram_mgr.c index d9afe0e22071..3a9780d39c65 100644 --- a/drivers/gpu/drm/xe/xe_ttm_vram_mgr.c +++ b/drivers/gpu/drm/xe/xe_ttm_vram_mgr.c @@ -337,12 +337,18 @@ int __xe_ttm_vram_mgr_init(struct xe_device *xe, struct xe_ttm_vram_mgr *mgr, return drmm_add_action_or_reset(&xe->drm, ttm_vram_mgr_fini, mgr); } -int xe_ttm_vram_mgr_init(struct xe_tile *tile, struct xe_ttm_vram_mgr *mgr) +/** + * xe_ttm_vram_mgr_init - initialize TTM VRAM region + * @xe: pointer to Xe device + * @vram: pointer to xe_vram_region that contains the memory region attributes + * + * Initialize the Xe TTM for given @vram region using the given parameters. + * + * Returns 0 for success, negative error code otherwise. + */ +int xe_ttm_vram_mgr_init(struct xe_device *xe, struct xe_vram_region *vram) { - struct xe_device *xe = tile_to_xe(tile); - struct xe_vram_region *vram = tile->mem.vram; - - return __xe_ttm_vram_mgr_init(xe, mgr, XE_PL_VRAM0 + tile->id, + return __xe_ttm_vram_mgr_init(xe, &vram->ttm, vram->placement, vram->usable_size, vram->io_size, PAGE_SIZE); } diff --git a/drivers/gpu/drm/xe/xe_ttm_vram_mgr.h b/drivers/gpu/drm/xe/xe_ttm_vram_mgr.h index cc76050e376d..87b7fae5edba 100644 --- a/drivers/gpu/drm/xe/xe_ttm_vram_mgr.h +++ b/drivers/gpu/drm/xe/xe_ttm_vram_mgr.h @@ -11,11 +11,12 @@ enum dma_data_direction; struct xe_device; struct xe_tile; +struct xe_vram_region; int __xe_ttm_vram_mgr_init(struct xe_device *xe, struct xe_ttm_vram_mgr *mgr, u32 mem_type, u64 size, u64 io_size, u64 default_page_size); -int xe_ttm_vram_mgr_init(struct xe_tile *tile, struct xe_ttm_vram_mgr *mgr); +int xe_ttm_vram_mgr_init(struct xe_device *xe, struct xe_vram_region *vram); int xe_ttm_vram_mgr_alloc_sgt(struct xe_device *xe, struct ttm_resource *res, u64 offset, u64 length, diff --git a/drivers/gpu/drm/xe/xe_vram.c b/drivers/gpu/drm/xe/xe_vram.c index 18124a5fb291..e35b4dda9172 100644 --- a/drivers/gpu/drm/xe/xe_vram.c +++ b/drivers/gpu/drm/xe/xe_vram.c @@ -19,6 +19,7 @@ #include "xe_mmio.h" #include "xe_module.h" #include "xe_sriov.h" +#include "xe_ttm_vram_mgr.h" #include "xe_vram.h" #define BAR_SIZE_SHIFT 20 @@ -136,7 +137,7 @@ static bool resource_is_valid(struct pci_dev *pdev, int bar) return true; } -static int determine_lmem_bar_size(struct xe_device *xe) +static int determine_lmem_bar_size(struct xe_device *xe, struct xe_vram_region *lmem_bar) { struct pci_dev *pdev = to_pci_dev(xe->drm.dev); @@ -147,16 +148,16 @@ static int determine_lmem_bar_size(struct xe_device *xe) resize_vram_bar(xe); - xe->mem.vram->io_start = pci_resource_start(pdev, LMEM_BAR); - xe->mem.vram->io_size = pci_resource_len(pdev, LMEM_BAR); - if (!xe->mem.vram->io_size) + lmem_bar->io_start = pci_resource_start(pdev, LMEM_BAR); + lmem_bar->io_size = pci_resource_len(pdev, LMEM_BAR); + if (!lmem_bar->io_size) return -EIO; /* XXX: Need to change when xe link code is ready */ - xe->mem.vram->dpa_base = 0; + lmem_bar->dpa_base = 0; /* set up a map to the total memory area. */ - xe->mem.vram->mapping = ioremap_wc(xe->mem.vram->io_start, xe->mem.vram->io_size); + lmem_bar->mapping = devm_ioremap_wc(&pdev->dev, lmem_bar->io_start, lmem_bar->io_size); return 0; } @@ -287,6 +288,65 @@ static void vram_fini(void *arg) tile->mem.vram->mapping = NULL; } +struct xe_vram_region *xe_vram_region_alloc(struct xe_device *xe, u8 id, u32 placement) +{ + struct xe_vram_region *vram; + struct drm_device *drm = &xe->drm; + + xe_assert(xe, id < xe->info.tile_count); + + vram = drmm_kzalloc(drm, sizeof(*vram), GFP_KERNEL); + if (!vram) + return NULL; + + vram->id = id; + vram->placement = placement; + vram->tile = &xe->tiles[id]; + + return vram; +} + +static void print_vram_region_info(struct xe_device *xe, struct xe_vram_region *vram) +{ + struct drm_device *drm = &xe->drm; + + if (vram->io_size < vram->usable_size) + drm_info(drm, "Small BAR device\n"); + + drm_info(drm, + "VRAM[%u]: Actual physical size %pa, usable size exclude stolen %pa, CPU accessible size %pa\n", + vram->id, &vram->actual_physical_size, &vram->usable_size, &vram->io_size); + drm_info(drm, "VRAM[%u]: DPA range: [%pa-%llx], io range: [%pa-%llx]\n", + vram->id, &vram->dpa_base, vram->dpa_base + (u64)vram->actual_physical_size, + &vram->io_start, vram->io_start + (u64)vram->io_size); +} + +static int vram_region_init(struct xe_device *xe, struct xe_vram_region *vram, + struct xe_vram_region *lmem_bar, u64 offset, u64 usable_size, + u64 region_size, resource_size_t remain_io_size) +{ + /* Check if VRAM region is already initialized */ + if (vram->mapping) + return 0; + + vram->actual_physical_size = region_size; + vram->io_start = lmem_bar->io_start + offset; + vram->io_size = min_t(u64, usable_size, remain_io_size); + + if (!vram->io_size) { + drm_err(&xe->drm, "Tile without any CPU visible VRAM. Aborting.\n"); + return -ENODEV; + } + + vram->dpa_base = lmem_bar->dpa_base + offset; + vram->mapping = lmem_bar->mapping + offset; + vram->usable_size = usable_size; + + print_vram_region_info(xe, vram); + + return 0; +} + /** * xe_vram_probe() - Probe VRAM configuration * @xe: the &xe_device @@ -298,82 +358,52 @@ static void vram_fini(void *arg) int xe_vram_probe(struct xe_device *xe) { struct xe_tile *tile; - resource_size_t io_size; + struct xe_vram_region lmem_bar; + resource_size_t remain_io_size; u64 available_size = 0; u64 total_size = 0; - u64 tile_offset; - u64 tile_size; - u64 vram_size; int err; u8 id; if (!IS_DGFX(xe)) return 0; - /* Get the size of the root tile's vram for later accessibility comparison */ - tile = xe_device_get_root_tile(xe); - err = tile_vram_size(tile, &vram_size, &tile_size, &tile_offset); - if (err) - return err; - - err = determine_lmem_bar_size(xe); + err = determine_lmem_bar_size(xe, &lmem_bar); if (err) return err; + drm_info(&xe->drm, "VISIBLE VRAM: %pa, %pa\n", &lmem_bar.io_start, &lmem_bar.io_size); - drm_info(&xe->drm, "VISIBLE VRAM: %pa, %pa\n", &xe->mem.vram->io_start, - &xe->mem.vram->io_size); + remain_io_size = lmem_bar.io_size; - io_size = xe->mem.vram->io_size; - - /* tile specific ranges */ for_each_tile(tile, xe, id) { - err = tile_vram_size(tile, &vram_size, &tile_size, &tile_offset); + u64 region_size; + u64 usable_size; + u64 tile_offset; + + err = tile_vram_size(tile, &usable_size, ®ion_size, &tile_offset); if (err) return err; - tile->mem.vram->actual_physical_size = tile_size; - tile->mem.vram->io_start = xe->mem.vram->io_start + tile_offset; - tile->mem.vram->io_size = min_t(u64, vram_size, io_size); + total_size += region_size; + available_size += usable_size; - if (!tile->mem.vram->io_size) { - drm_err(&xe->drm, "Tile without any CPU visible VRAM. Aborting.\n"); - return -ENODEV; - } + err = vram_region_init(xe, tile->mem.vram, &lmem_bar, tile_offset, usable_size, + region_size, remain_io_size); + if (err) + return err; - tile->mem.vram->dpa_base = xe->mem.vram->dpa_base + tile_offset; - tile->mem.vram->usable_size = vram_size; - tile->mem.vram->mapping = xe->mem.vram->mapping + tile_offset; - - if (tile->mem.vram->io_size < tile->mem.vram->usable_size) - drm_info(&xe->drm, "Small BAR device\n"); - drm_info(&xe->drm, - "VRAM[%u, %u]: Actual physical size %pa, usable size exclude stolen %pa, CPU accessible size %pa\n", - id, tile->id, &tile->mem.vram->actual_physical_size, - &tile->mem.vram->usable_size, &tile->mem.vram->io_size); - drm_info(&xe->drm, "VRAM[%u, %u]: DPA range: [%pa-%llx], io range: [%pa-%llx]\n", - id, tile->id, &tile->mem.vram->dpa_base, - tile->mem.vram->dpa_base + (u64)tile->mem.vram->actual_physical_size, - &tile->mem.vram->io_start, - tile->mem.vram->io_start + (u64)tile->mem.vram->io_size); - - /* calculate total size using tile size to get the correct HW sizing */ - total_size += tile_size; - available_size += vram_size; - - if (total_size > xe->mem.vram->io_size) { + if (total_size > lmem_bar.io_size) { drm_info(&xe->drm, "VRAM: %pa is larger than resource %pa\n", - &total_size, &xe->mem.vram->io_size); + &total_size, &lmem_bar.io_size); } - io_size -= min_t(u64, tile_size, io_size); + remain_io_size -= min_t(u64, tile->mem.vram->actual_physical_size, remain_io_size); } - xe->mem.vram->actual_physical_size = total_size; - - drm_info(&xe->drm, "Total VRAM: %pa, %pa\n", &xe->mem.vram->io_start, - &xe->mem.vram->actual_physical_size); - drm_info(&xe->drm, "Available VRAM: %pa, %pa\n", &xe->mem.vram->io_start, - &available_size); + err = vram_region_init(xe, xe->mem.vram, &lmem_bar, 0, available_size, total_size, + lmem_bar.io_size); + if (err) + return err; return devm_add_action_or_reset(xe->drm.dev, vram_fini, xe); } diff --git a/drivers/gpu/drm/xe/xe_vram.h b/drivers/gpu/drm/xe/xe_vram.h index e31cc04ec0db..4fc0bc1df4ce 100644 --- a/drivers/gpu/drm/xe/xe_vram.h +++ b/drivers/gpu/drm/xe/xe_vram.h @@ -6,8 +6,12 @@ #ifndef _XE_VRAM_H_ #define _XE_VRAM_H_ +#include <linux/types.h> + struct xe_device; +struct xe_vram_region; +struct xe_vram_region *xe_vram_region_alloc(struct xe_device *xe, u8 id, u32 placement); int xe_vram_probe(struct xe_device *xe); #endif -- 2.34.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH v3 2/2] drm/xe: Unify the initialization of VRAM regions 2025-06-24 9:22 ` [PATCH v3 2/2] drm/xe: Unify the initialization of VRAM regions Piórkowski, Piotr @ 2025-06-24 10:10 ` Matthew Auld 0 siblings, 0 replies; 10+ messages in thread From: Matthew Auld @ 2025-06-24 10:10 UTC (permalink / raw) To: Piórkowski, Piotr, intel-xe; +Cc: Stuart Summers, Jani Nikula On 24/06/2025 10:22, Piórkowski, Piotr wrote: > From: Piotr Piórkowski <piotr.piorkowski@intel.com> > > Currently in the drivers we have defined VRAM regions per device and per > tile. Initialization of these regions is done in two completely different > ways. To simplify the logic of the code and make it easier to add new > regions in the future, let's unify the way we initialize VRAM regions. > > v2: > - fix doc comments in struct xe_vram_region > - remove unnecessary includes (Jani) > v3: > - move code from xe_vram_init_regions_managers to xe_tile_init_noalloc > (Matthew) > - replace ioremap_wc to devm_ioremap_wc for mapping VRAM BAR > (Matthew) > - Replace the tile id parameter with vram region in the xe_pf_begin > function. > > Signed-off-by: Piotr Piórkowski <piotr.piorkowski@intel.com> > Cc: Stuart Summers <stuart.summers@intel.com> > Cc: Matthew Auld <matthew.auld@intel.com> > Cc: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/xe/xe_device_types.h | 8 ++ > drivers/gpu/drm/xe/xe_gt_pagefault.c | 12 ++- > drivers/gpu/drm/xe/xe_query.c | 2 +- > drivers/gpu/drm/xe/xe_tile.c | 38 +++---- > drivers/gpu/drm/xe/xe_ttm_vram_mgr.c | 16 ++- > drivers/gpu/drm/xe/xe_ttm_vram_mgr.h | 3 +- > drivers/gpu/drm/xe/xe_vram.c | 148 ++++++++++++++++----------- > drivers/gpu/drm/xe/xe_vram.h | 4 + > 8 files changed, 135 insertions(+), 96 deletions(-) > > diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h > index a7bcda67d05f..e34a48d1312b 100644 > --- a/drivers/gpu/drm/xe/xe_device_types.h > +++ b/drivers/gpu/drm/xe/xe_device_types.h > @@ -76,6 +76,12 @@ struct xe_pxp; > struct xe_vram_region { > /** @tile: Backpointer to tile */ > struct xe_tile *tile; > + /** > + * @id: VRAM region instance id > + * > + * The value should be unique for VRAM region. > + */ > + u8 id; > /** @io_start: IO start address of this VRAM instance */ > resource_size_t io_start; > /** > @@ -108,6 +114,8 @@ struct xe_vram_region { > void __iomem *mapping; > /** @ttm: VRAM TTM manager */ > struct xe_ttm_vram_mgr ttm; > + /** @placement: TTM placement dedicated for this region */ > + u32 placement; > #if IS_ENABLED(CONFIG_DRM_XE_DEVMEM_MIRROR) > /** @pagemap: Used to remap device memory as ZONE_DEVICE */ > struct dev_pagemap pagemap; > diff --git a/drivers/gpu/drm/xe/xe_gt_pagefault.c b/drivers/gpu/drm/xe/xe_gt_pagefault.c > index 3522865c67c9..a20ddab31c96 100644 > --- a/drivers/gpu/drm/xe/xe_gt_pagefault.c > +++ b/drivers/gpu/drm/xe/xe_gt_pagefault.c > @@ -74,7 +74,7 @@ static bool vma_is_valid(struct xe_tile *tile, struct xe_vma *vma) > } > > static int xe_pf_begin(struct drm_exec *exec, struct xe_vma *vma, > - bool atomic, unsigned int id) > + bool atomic, struct xe_vram_region *vram) > { > struct xe_bo *bo = xe_vma_bo(vma); > struct xe_vm *vm = xe_vma_vm(vma); > @@ -84,14 +84,16 @@ static int xe_pf_begin(struct drm_exec *exec, struct xe_vma *vma, > if (err) > return err; > > - if (atomic && IS_DGFX(vm->xe)) { > + if (atomic && vram) { > + xe_assert(vm->xe, IS_DGFX(vm->xe)); > + > if (xe_vma_is_userptr(vma)) { > err = -EACCES; > return err; > } > > /* Migrate to VRAM, move should invalidate the VMA first */ > - err = xe_bo_migrate(bo, XE_PL_VRAM0 + id); > + err = xe_bo_migrate(bo, vram->placement); > if (err) > return err; > } else if (bo) { > @@ -138,7 +140,7 @@ static int handle_vma_pagefault(struct xe_gt *gt, struct xe_vma *vma, > /* Lock VM and BOs dma-resv */ > drm_exec_init(&exec, 0, 0); > drm_exec_until_all_locked(&exec) { > - err = xe_pf_begin(&exec, vma, atomic, tile->id); > + err = xe_pf_begin(&exec, vma, atomic, tile->mem.vram); > drm_exec_retry_on_contention(&exec); > if (xe_vm_validate_should_retry(&exec, err, &end)) > err = -EAGAIN; > @@ -572,7 +574,7 @@ static int handle_acc(struct xe_gt *gt, struct acc *acc) > /* Lock VM and BOs dma-resv */ > drm_exec_init(&exec, 0, 0); > drm_exec_until_all_locked(&exec) { > - ret = xe_pf_begin(&exec, vma, true, tile->id); > + ret = xe_pf_begin(&exec, vma, true, tile->mem.vram); > drm_exec_retry_on_contention(&exec); > if (ret) > break; > diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c > index ba9b7482605c..ffd2efffa7a3 100644 > --- a/drivers/gpu/drm/xe/xe_query.c > +++ b/drivers/gpu/drm/xe/xe_query.c > @@ -409,7 +409,7 @@ static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query > gt_list->gt_list[id].near_mem_regions = 0x1; > else > gt_list->gt_list[id].near_mem_regions = > - BIT(gt_to_tile(gt)->id) << 1; > + BIT(gt_to_tile(gt)->mem.vram->id) << 1; > gt_list->gt_list[id].far_mem_regions = xe->info.mem_region_mask ^ > gt_list->gt_list[id].near_mem_regions; > > diff --git a/drivers/gpu/drm/xe/xe_tile.c b/drivers/gpu/drm/xe/xe_tile.c > index c64a4d1a5bb9..3acd8e359070 100644 > --- a/drivers/gpu/drm/xe/xe_tile.c > +++ b/drivers/gpu/drm/xe/xe_tile.c > @@ -7,6 +7,7 @@ > > #include <drm/drm_managed.h> > > +#include "xe_bo.h" > #include "xe_device.h" > #include "xe_ggtt.h" > #include "xe_gt.h" > @@ -18,6 +19,7 @@ > #include "xe_tile_sysfs.h" > #include "xe_ttm_vram_mgr.h" > #include "xe_wa.h" > +#include "xe_vram.h" > > /** > * DOC: Multi-tile Design > @@ -111,11 +113,9 @@ int xe_tile_alloc_vram(struct xe_tile *tile) > if (!IS_DGFX(xe)) > return 0; > > - vram = drmm_kzalloc(&xe->drm, sizeof(*vram), GFP_KERNEL); > - if (!vram) > - return -ENOMEM; > - > - vram->tile = tile; > + vram = xe_vram_region_alloc(xe, tile->id, XE_PL_VRAM0 + tile->id); > + if (IS_ERR(vram)) > + return PTR_ERR(vram); > tile->mem.vram = vram; > > return 0; > @@ -153,21 +153,6 @@ int xe_tile_init_early(struct xe_tile *tile, struct xe_device *xe, u8 id) > } > ALLOW_ERROR_INJECTION(xe_tile_init_early, ERRNO); /* See xe_pci_probe() */ > > -static int tile_ttm_mgr_init(struct xe_tile *tile) > -{ > - struct xe_device *xe = tile_to_xe(tile); > - int err; > - > - if (tile->mem.vram->usable_size) { > - err = xe_ttm_vram_mgr_init(tile, &tile->mem.vram->ttm); > - if (err) > - return err; > - xe->info.mem_region_mask |= BIT(tile->id) << 1; > - } > - > - return 0; > -} > - > /** > * xe_tile_init_noalloc - Init tile up to the point where allocations can happen. > * @tile: The tile to initialize. > @@ -185,17 +170,20 @@ static int tile_ttm_mgr_init(struct xe_tile *tile) > int xe_tile_init_noalloc(struct xe_tile *tile) > { > struct xe_device *xe = tile_to_xe(tile); > - int err; > - > - err = tile_ttm_mgr_init(tile); > - if (err) > - return err; > > xe_wa_apply_tile_workarounds(tile); > > if (xe->info.has_usm && IS_DGFX(xe)) > xe_devm_add(tile, tile->mem.vram); > > + if (IS_DGFX(xe) && !ttm_resource_manager_used(&tile->mem.vram->ttm.manager)) { > + int err = xe_ttm_vram_mgr_init(xe, tile->mem.vram); > + > + if (err) > + return err; > + xe->info.mem_region_mask |= BIT(tile->mem.vram->id) << 1; > + } > + > return xe_tile_sysfs_init(tile); > } > > diff --git a/drivers/gpu/drm/xe/xe_ttm_vram_mgr.c b/drivers/gpu/drm/xe/xe_ttm_vram_mgr.c > index d9afe0e22071..3a9780d39c65 100644 > --- a/drivers/gpu/drm/xe/xe_ttm_vram_mgr.c > +++ b/drivers/gpu/drm/xe/xe_ttm_vram_mgr.c > @@ -337,12 +337,18 @@ int __xe_ttm_vram_mgr_init(struct xe_device *xe, struct xe_ttm_vram_mgr *mgr, > return drmm_add_action_or_reset(&xe->drm, ttm_vram_mgr_fini, mgr); > } > > -int xe_ttm_vram_mgr_init(struct xe_tile *tile, struct xe_ttm_vram_mgr *mgr) > +/** > + * xe_ttm_vram_mgr_init - initialize TTM VRAM region > + * @xe: pointer to Xe device > + * @vram: pointer to xe_vram_region that contains the memory region attributes > + * > + * Initialize the Xe TTM for given @vram region using the given parameters. > + * > + * Returns 0 for success, negative error code otherwise. > + */ > +int xe_ttm_vram_mgr_init(struct xe_device *xe, struct xe_vram_region *vram) > { > - struct xe_device *xe = tile_to_xe(tile); > - struct xe_vram_region *vram = tile->mem.vram; > - > - return __xe_ttm_vram_mgr_init(xe, mgr, XE_PL_VRAM0 + tile->id, > + return __xe_ttm_vram_mgr_init(xe, &vram->ttm, vram->placement, > vram->usable_size, vram->io_size, > PAGE_SIZE); > } > diff --git a/drivers/gpu/drm/xe/xe_ttm_vram_mgr.h b/drivers/gpu/drm/xe/xe_ttm_vram_mgr.h > index cc76050e376d..87b7fae5edba 100644 > --- a/drivers/gpu/drm/xe/xe_ttm_vram_mgr.h > +++ b/drivers/gpu/drm/xe/xe_ttm_vram_mgr.h > @@ -11,11 +11,12 @@ > enum dma_data_direction; > struct xe_device; > struct xe_tile; > +struct xe_vram_region; > > int __xe_ttm_vram_mgr_init(struct xe_device *xe, struct xe_ttm_vram_mgr *mgr, > u32 mem_type, u64 size, u64 io_size, > u64 default_page_size); > -int xe_ttm_vram_mgr_init(struct xe_tile *tile, struct xe_ttm_vram_mgr *mgr); > +int xe_ttm_vram_mgr_init(struct xe_device *xe, struct xe_vram_region *vram); > int xe_ttm_vram_mgr_alloc_sgt(struct xe_device *xe, > struct ttm_resource *res, > u64 offset, u64 length, > diff --git a/drivers/gpu/drm/xe/xe_vram.c b/drivers/gpu/drm/xe/xe_vram.c > index 18124a5fb291..e35b4dda9172 100644 > --- a/drivers/gpu/drm/xe/xe_vram.c > +++ b/drivers/gpu/drm/xe/xe_vram.c > @@ -19,6 +19,7 @@ > #include "xe_mmio.h" > #include "xe_module.h" > #include "xe_sriov.h" > +#include "xe_ttm_vram_mgr.h" > #include "xe_vram.h" > > #define BAR_SIZE_SHIFT 20 > @@ -136,7 +137,7 @@ static bool resource_is_valid(struct pci_dev *pdev, int bar) > return true; > } > > -static int determine_lmem_bar_size(struct xe_device *xe) > +static int determine_lmem_bar_size(struct xe_device *xe, struct xe_vram_region *lmem_bar) > { > struct pci_dev *pdev = to_pci_dev(xe->drm.dev); > > @@ -147,16 +148,16 @@ static int determine_lmem_bar_size(struct xe_device *xe) > > resize_vram_bar(xe); > > - xe->mem.vram->io_start = pci_resource_start(pdev, LMEM_BAR); > - xe->mem.vram->io_size = pci_resource_len(pdev, LMEM_BAR); > - if (!xe->mem.vram->io_size) > + lmem_bar->io_start = pci_resource_start(pdev, LMEM_BAR); > + lmem_bar->io_size = pci_resource_len(pdev, LMEM_BAR); > + if (!lmem_bar->io_size) > return -EIO; > > /* XXX: Need to change when xe link code is ready */ > - xe->mem.vram->dpa_base = 0; > + lmem_bar->dpa_base = 0; > > /* set up a map to the total memory area. */ > - xe->mem.vram->mapping = ioremap_wc(xe->mem.vram->io_start, xe->mem.vram->io_size); > + lmem_bar->mapping = devm_ioremap_wc(&pdev->dev, lmem_bar->io_start, lmem_bar->io_size); Nice. I think in vram_fini() we can now also drop the manual iounmap()? You could also potentially make the s/ioremap_wc/devm_ioremap_wc/ a seperate change at the start of the series, since this technically fixes an existing issue, plus as a standalone change is an improvement. Up to you though. > > return 0; > } > @@ -287,6 +288,65 @@ static void vram_fini(void *arg) > tile->mem.vram->mapping = NULL; > } > > +struct xe_vram_region *xe_vram_region_alloc(struct xe_device *xe, u8 id, u32 placement) > +{ > + struct xe_vram_region *vram; > + struct drm_device *drm = &xe->drm; > + > + xe_assert(xe, id < xe->info.tile_count); > + > + vram = drmm_kzalloc(drm, sizeof(*vram), GFP_KERNEL); > + if (!vram) > + return NULL; > + > + vram->id = id; > + vram->placement = placement; > + vram->tile = &xe->tiles[id]; > + > + return vram; > +} > + > +static void print_vram_region_info(struct xe_device *xe, struct xe_vram_region *vram) > +{ > + struct drm_device *drm = &xe->drm; > + > + if (vram->io_size < vram->usable_size) > + drm_info(drm, "Small BAR device\n"); > + > + drm_info(drm, > + "VRAM[%u]: Actual physical size %pa, usable size exclude stolen %pa, CPU accessible size %pa\n", > + vram->id, &vram->actual_physical_size, &vram->usable_size, &vram->io_size); > + drm_info(drm, "VRAM[%u]: DPA range: [%pa-%llx], io range: [%pa-%llx]\n", > + vram->id, &vram->dpa_base, vram->dpa_base + (u64)vram->actual_physical_size, > + &vram->io_start, vram->io_start + (u64)vram->io_size); > +} > + > +static int vram_region_init(struct xe_device *xe, struct xe_vram_region *vram, > + struct xe_vram_region *lmem_bar, u64 offset, u64 usable_size, > + u64 region_size, resource_size_t remain_io_size) > +{ > + /* Check if VRAM region is already initialized */ > + if (vram->mapping) > + return 0; > + > + vram->actual_physical_size = region_size; > + vram->io_start = lmem_bar->io_start + offset; > + vram->io_size = min_t(u64, usable_size, remain_io_size); > + > + if (!vram->io_size) { > + drm_err(&xe->drm, "Tile without any CPU visible VRAM. Aborting.\n"); > + return -ENODEV; > + } > + > + vram->dpa_base = lmem_bar->dpa_base + offset; > + vram->mapping = lmem_bar->mapping + offset; > + vram->usable_size = usable_size; > + > + print_vram_region_info(xe, vram); > + > + return 0; > +} > + > /** > * xe_vram_probe() - Probe VRAM configuration > * @xe: the &xe_device > @@ -298,82 +358,52 @@ static void vram_fini(void *arg) > int xe_vram_probe(struct xe_device *xe) > { > struct xe_tile *tile; > - resource_size_t io_size; > + struct xe_vram_region lmem_bar; > + resource_size_t remain_io_size; > u64 available_size = 0; > u64 total_size = 0; > - u64 tile_offset; > - u64 tile_size; > - u64 vram_size; > int err; > u8 id; > > if (!IS_DGFX(xe)) > return 0; > > - /* Get the size of the root tile's vram for later accessibility comparison */ > - tile = xe_device_get_root_tile(xe); > - err = tile_vram_size(tile, &vram_size, &tile_size, &tile_offset); > - if (err) > - return err; > - > - err = determine_lmem_bar_size(xe); > + err = determine_lmem_bar_size(xe, &lmem_bar); > if (err) > return err; > + drm_info(&xe->drm, "VISIBLE VRAM: %pa, %pa\n", &lmem_bar.io_start, &lmem_bar.io_size); > > - drm_info(&xe->drm, "VISIBLE VRAM: %pa, %pa\n", &xe->mem.vram->io_start, > - &xe->mem.vram->io_size); > + remain_io_size = lmem_bar.io_size; > > - io_size = xe->mem.vram->io_size; > - > - /* tile specific ranges */ > for_each_tile(tile, xe, id) { > - err = tile_vram_size(tile, &vram_size, &tile_size, &tile_offset); > + u64 region_size; > + u64 usable_size; > + u64 tile_offset; > + > + err = tile_vram_size(tile, &usable_size, ®ion_size, &tile_offset); > if (err) > return err; > > - tile->mem.vram->actual_physical_size = tile_size; > - tile->mem.vram->io_start = xe->mem.vram->io_start + tile_offset; > - tile->mem.vram->io_size = min_t(u64, vram_size, io_size); > + total_size += region_size; > + available_size += usable_size; > > - if (!tile->mem.vram->io_size) { > - drm_err(&xe->drm, "Tile without any CPU visible VRAM. Aborting.\n"); > - return -ENODEV; > - } > + err = vram_region_init(xe, tile->mem.vram, &lmem_bar, tile_offset, usable_size, > + region_size, remain_io_size); > + if (err) > + return err; > > - tile->mem.vram->dpa_base = xe->mem.vram->dpa_base + tile_offset; > - tile->mem.vram->usable_size = vram_size; > - tile->mem.vram->mapping = xe->mem.vram->mapping + tile_offset; > - > - if (tile->mem.vram->io_size < tile->mem.vram->usable_size) > - drm_info(&xe->drm, "Small BAR device\n"); > - drm_info(&xe->drm, > - "VRAM[%u, %u]: Actual physical size %pa, usable size exclude stolen %pa, CPU accessible size %pa\n", > - id, tile->id, &tile->mem.vram->actual_physical_size, > - &tile->mem.vram->usable_size, &tile->mem.vram->io_size); > - drm_info(&xe->drm, "VRAM[%u, %u]: DPA range: [%pa-%llx], io range: [%pa-%llx]\n", > - id, tile->id, &tile->mem.vram->dpa_base, > - tile->mem.vram->dpa_base + (u64)tile->mem.vram->actual_physical_size, > - &tile->mem.vram->io_start, > - tile->mem.vram->io_start + (u64)tile->mem.vram->io_size); > - > - /* calculate total size using tile size to get the correct HW sizing */ > - total_size += tile_size; > - available_size += vram_size; > - > - if (total_size > xe->mem.vram->io_size) { > + if (total_size > lmem_bar.io_size) { > drm_info(&xe->drm, "VRAM: %pa is larger than resource %pa\n", > - &total_size, &xe->mem.vram->io_size); > + &total_size, &lmem_bar.io_size); > } > > - io_size -= min_t(u64, tile_size, io_size); > + remain_io_size -= min_t(u64, tile->mem.vram->actual_physical_size, remain_io_size); > } > > - xe->mem.vram->actual_physical_size = total_size; > - > - drm_info(&xe->drm, "Total VRAM: %pa, %pa\n", &xe->mem.vram->io_start, > - &xe->mem.vram->actual_physical_size); > - drm_info(&xe->drm, "Available VRAM: %pa, %pa\n", &xe->mem.vram->io_start, > - &available_size); > + err = vram_region_init(xe, xe->mem.vram, &lmem_bar, 0, available_size, total_size, > + lmem_bar.io_size); > + if (err) > + return err; > > return devm_add_action_or_reset(xe->drm.dev, vram_fini, xe); > } > diff --git a/drivers/gpu/drm/xe/xe_vram.h b/drivers/gpu/drm/xe/xe_vram.h > index e31cc04ec0db..4fc0bc1df4ce 100644 > --- a/drivers/gpu/drm/xe/xe_vram.h > +++ b/drivers/gpu/drm/xe/xe_vram.h > @@ -6,8 +6,12 @@ > #ifndef _XE_VRAM_H_ > #define _XE_VRAM_H_ > > +#include <linux/types.h> > + > struct xe_device; > +struct xe_vram_region; > > +struct xe_vram_region *xe_vram_region_alloc(struct xe_device *xe, u8 id, u32 placement); > int xe_vram_probe(struct xe_device *xe); > > #endif ^ permalink raw reply [flat|nested] 10+ messages in thread
* ✓ CI.KUnit: success for Cleaning up code related to VRAM regions and its initialization - part 2 (rev6) 2025-06-24 9:22 [PATCH v3 0/2] Cleaning up code related to VRAM regions and its initialization - part 2 Piórkowski, Piotr 2025-06-24 9:22 ` [PATCH v3 1/2] drm/xe: Use dynamic allocation for tile and device VRAM region structures Piórkowski, Piotr 2025-06-24 9:22 ` [PATCH v3 2/2] drm/xe: Unify the initialization of VRAM regions Piórkowski, Piotr @ 2025-06-24 12:27 ` Patchwork 2025-06-24 13:28 ` ✓ Xe.CI.BAT: " Patchwork 2025-06-25 1:40 ` ✗ Xe.CI.Full: failure " Patchwork 4 siblings, 0 replies; 10+ messages in thread From: Patchwork @ 2025-06-24 12:27 UTC (permalink / raw) To: Piórkowski, Piotr; +Cc: intel-xe == Series Details == Series: Cleaning up code related to VRAM regions and its initialization - part 2 (rev6) URL : https://patchwork.freedesktop.org/series/149503/ State : success == Summary == + trap cleanup EXIT + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig [12:25:59] Configuring KUnit Kernel ... Generating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [12:26:03] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [12:26:30] Starting KUnit Kernel (1/1)... [12:26:30] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [12:26:30] ================== guc_buf (11 subtests) =================== [12:26:30] [PASSED] test_smallest [12:26:30] [PASSED] test_largest [12:26:30] [PASSED] test_granular [12:26:30] [PASSED] test_unique [12:26:30] [PASSED] test_overlap [12:26:30] [PASSED] test_reusable [12:26:30] [PASSED] test_too_big [12:26:30] [PASSED] test_flush [12:26:30] [PASSED] test_lookup [12:26:30] [PASSED] test_data [12:26:30] [PASSED] test_class [12:26:30] ===================== [PASSED] guc_buf ===================== [12:26:30] =================== guc_dbm (7 subtests) =================== [12:26:30] [PASSED] test_empty [12:26:30] [PASSED] test_default [12:26:30] ======================== test_size ======================== [12:26:30] [PASSED] 4 [12:26:30] [PASSED] 8 [12:26:30] [PASSED] 32 [12:26:30] [PASSED] 256 [12:26:30] ==================== [PASSED] test_size ==================== [12:26:30] ======================= test_reuse ======================== [12:26:30] [PASSED] 4 [12:26:30] [PASSED] 8 [12:26:30] [PASSED] 32 [12:26:30] [PASSED] 256 [12:26:30] =================== [PASSED] test_reuse ==================== [12:26:30] =================== test_range_overlap ==================== [12:26:30] [PASSED] 4 [12:26:30] [PASSED] 8 [12:26:30] [PASSED] 32 [12:26:30] [PASSED] 256 [12:26:30] =============== [PASSED] test_range_overlap ================ [12:26:30] =================== test_range_compact ==================== [12:26:30] [PASSED] 4 [12:26:30] [PASSED] 8 [12:26:30] [PASSED] 32 [12:26:30] [PASSED] 256 [12:26:30] =============== [PASSED] test_range_compact ================ [12:26:30] ==================== test_range_spare ===================== [12:26:30] [PASSED] 4 [12:26:30] [PASSED] 8 [12:26:30] [PASSED] 32 [12:26:30] [PASSED] 256 [12:26:30] ================ [PASSED] test_range_spare ================= [12:26:30] ===================== [PASSED] guc_dbm ===================== [12:26:30] =================== guc_idm (6 subtests) =================== [12:26:30] [PASSED] bad_init [12:26:30] [PASSED] no_init [12:26:30] [PASSED] init_fini [12:26:30] [PASSED] check_used [12:26:30] [PASSED] check_quota [12:26:30] [PASSED] check_all [12:26:30] ===================== [PASSED] guc_idm ===================== [12:26:30] ================== no_relay (3 subtests) =================== [12:26:30] [PASSED] xe_drops_guc2pf_if_not_ready [12:26:30] [PASSED] xe_drops_guc2vf_if_not_ready [12:26:30] [PASSED] xe_rejects_send_if_not_ready [12:26:30] ==================== [PASSED] no_relay ===================== [12:26:30] ================== pf_relay (14 subtests) ================== [12:26:30] [PASSED] pf_rejects_guc2pf_too_short [12:26:30] [PASSED] pf_rejects_guc2pf_too_long [12:26:30] [PASSED] pf_rejects_guc2pf_no_payload [12:26:30] [PASSED] pf_fails_no_payload [12:26:30] [PASSED] pf_fails_bad_origin [12:26:30] [PASSED] pf_fails_bad_type [12:26:30] [PASSED] pf_txn_reports_error [12:26:30] [PASSED] pf_txn_sends_pf2guc [12:26:30] [PASSED] pf_sends_pf2guc [12:26:30] [SKIPPED] pf_loopback_nop [12:26:30] [SKIPPED] pf_loopback_echo [12:26:30] [SKIPPED] pf_loopback_fail [12:26:30] [SKIPPED] pf_loopback_busy [12:26:30] [SKIPPED] pf_loopback_retry [12:26:30] ==================== [PASSED] pf_relay ===================== [12:26:30] ================== vf_relay (3 subtests) =================== [12:26:30] [PASSED] vf_rejects_guc2vf_too_short [12:26:30] [PASSED] vf_rejects_guc2vf_too_long [12:26:30] [PASSED] vf_rejects_guc2vf_no_payload [12:26:30] ==================== [PASSED] vf_relay ===================== [12:26:30] ================= pf_service (11 subtests) ================= [12:26:30] [PASSED] pf_negotiate_any [12:26:30] [PASSED] pf_negotiate_base_match [12:26:30] [PASSED] pf_negotiate_base_newer [12:26:30] [PASSED] pf_negotiate_base_next [12:26:30] [SKIPPED] pf_negotiate_base_older [12:26:30] [PASSED] pf_negotiate_base_prev [12:26:30] [PASSED] pf_negotiate_latest_match [12:26:30] [PASSED] pf_negotiate_latest_newer [12:26:30] [PASSED] pf_negotiate_latest_next [12:26:30] [SKIPPED] pf_negotiate_latest_older [12:26:30] [SKIPPED] pf_negotiate_latest_prev [12:26:30] =================== [PASSED] pf_service ==================== [12:26:30] ===================== lmtt (1 subtest) ===================== [12:26:30] ======================== test_ops ========================= [12:26:30] [PASSED] 2-level [12:26:30] [PASSED] multi-level [12:26:30] ==================== [PASSED] test_ops ===================== [12:26:30] ====================== [PASSED] lmtt ======================= [12:26:30] =================== xe_mocs (2 subtests) =================== [12:26:30] ================ xe_live_mocs_kernel_kunit ================ [12:26:30] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============ [12:26:30] ================ xe_live_mocs_reset_kunit ================= [12:26:30] ============ [SKIPPED] xe_live_mocs_reset_kunit ============ [12:26:30] ==================== [SKIPPED] xe_mocs ===================== [12:26:30] ================= xe_migrate (2 subtests) ================== [12:26:30] ================= xe_migrate_sanity_kunit ================= [12:26:30] ============ [SKIPPED] xe_migrate_sanity_kunit ============= [12:26:30] ================== xe_validate_ccs_kunit ================== [12:26:30] ============= [SKIPPED] xe_validate_ccs_kunit ============== [12:26:30] =================== [SKIPPED] xe_migrate =================== [12:26:30] ================== xe_dma_buf (1 subtest) ================== [12:26:30] ==================== xe_dma_buf_kunit ===================== [12:26:30] ================ [SKIPPED] xe_dma_buf_kunit ================ [12:26:30] =================== [SKIPPED] xe_dma_buf =================== [12:26:30] ================= xe_bo_shrink (1 subtest) ================= [12:26:30] =================== xe_bo_shrink_kunit ==================== [12:26:30] =============== [SKIPPED] xe_bo_shrink_kunit =============== [12:26:30] ================== [SKIPPED] xe_bo_shrink ================== [12:26:30] ==================== xe_bo (2 subtests) ==================== [12:26:30] ================== xe_ccs_migrate_kunit =================== [12:26:30] ============== [SKIPPED] xe_ccs_migrate_kunit ============== [12:26:30] ==================== xe_bo_evict_kunit ==================== [12:26:30] =============== [SKIPPED] xe_bo_evict_kunit ================ [12:26:30] ===================== [SKIPPED] xe_bo ====================== [12:26:30] ==================== args (11 subtests) ==================== [12:26:30] [PASSED] count_args_test [12:26:30] [PASSED] call_args_example [12:26:30] [PASSED] call_args_test [12:26:30] [PASSED] drop_first_arg_example [12:26:30] [PASSED] drop_first_arg_test [12:26:30] [PASSED] first_arg_example [12:26:30] [PASSED] first_arg_test [12:26:30] [PASSED] last_arg_example [12:26:30] [PASSED] last_arg_test [12:26:30] [PASSED] pick_arg_example [12:26:30] [PASSED] sep_comma_example [12:26:30] ====================== [PASSED] args ======================= [12:26:30] =================== xe_pci (2 subtests) ==================== [12:26:30] ==================== check_graphics_ip ==================== [12:26:30] [PASSED] 12.70 Xe_LPG [12:26:30] [PASSED] 12.71 Xe_LPG [12:26:30] [PASSED] 12.74 Xe_LPG+ [12:26:30] [PASSED] 20.01 Xe2_HPG [12:26:30] [PASSED] 20.02 Xe2_HPG [12:26:30] [PASSED] 20.04 Xe2_LPG [12:26:30] [PASSED] 30.00 Xe3_LPG [12:26:30] [PASSED] 30.01 Xe3_LPG [12:26:30] [PASSED] 30.03 Xe3_LPG [12:26:30] ================ [PASSED] check_graphics_ip ================ [12:26:30] ===================== check_media_ip ====================== [12:26:30] [PASSED] 13.00 Xe_LPM+ [12:26:30] [PASSED] 13.01 Xe2_HPM [12:26:30] [PASSED] 20.00 Xe2_LPM [12:26:30] [PASSED] 30.00 Xe3_LPM [12:26:30] [PASSED] 30.02 Xe3_LPM stty: 'standard input': Inappropriate ioctl for device [12:26:30] ================= [PASSED] check_media_ip ================== [12:26:30] ===================== [PASSED] xe_pci ====================== [12:26:30] =================== xe_rtp (2 subtests) ==================== [12:26:30] =============== xe_rtp_process_to_sr_tests ================ [12:26:30] [PASSED] coalesce-same-reg [12:26:30] [PASSED] no-match-no-add [12:26:30] [PASSED] match-or [12:26:30] [PASSED] match-or-xfail [12:26:30] [PASSED] no-match-no-add-multiple-rules [12:26:30] [PASSED] two-regs-two-entries [12:26:30] [PASSED] clr-one-set-other [12:26:30] [PASSED] set-field [12:26:30] [PASSED] conflict-duplicate [12:26:30] [PASSED] conflict-not-disjoint [12:26:30] [PASSED] conflict-reg-type [12:26:30] =========== [PASSED] xe_rtp_process_to_sr_tests ============ [12:26:30] ================== xe_rtp_process_tests =================== [12:26:30] [PASSED] active1 [12:26:30] [PASSED] active2 [12:26:30] [PASSED] active-inactive [12:26:30] [PASSED] inactive-active [12:26:30] [PASSED] inactive-1st_or_active-inactive [12:26:30] [PASSED] inactive-2nd_or_active-inactive [12:26:30] [PASSED] inactive-last_or_active-inactive [12:26:30] [PASSED] inactive-no_or_active-inactive [12:26:30] ============== [PASSED] xe_rtp_process_tests =============== [12:26:30] ===================== [PASSED] xe_rtp ====================== [12:26:30] ==================== xe_wa (1 subtest) ===================== [12:26:30] ======================== xe_wa_gt ========================= [12:26:30] [PASSED] TIGERLAKE (B0) [12:26:30] [PASSED] DG1 (A0) [12:26:30] [PASSED] DG1 (B0) [12:26:30] [PASSED] ALDERLAKE_S (A0) [12:26:30] [PASSED] ALDERLAKE_S (B0) [12:26:30] [PASSED] ALDERLAKE_S (C0) [12:26:30] [PASSED] ALDERLAKE_S (D0) [12:26:30] [PASSED] ALDERLAKE_P (A0) [12:26:30] [PASSED] ALDERLAKE_P (B0) [12:26:30] [PASSED] ALDERLAKE_P (C0) [12:26:30] [PASSED] ALDERLAKE_S_RPLS (D0) [12:26:30] [PASSED] ALDERLAKE_P_RPLU (E0) [12:26:30] [PASSED] DG2_G10 (C0) [12:26:30] [PASSED] DG2_G11 (B1) [12:26:30] [PASSED] DG2_G12 (A1) [12:26:30] [PASSED] METEORLAKE (g:A0, m:A0) [12:26:30] [PASSED] METEORLAKE (g:A0, m:A0) [12:26:30] [PASSED] METEORLAKE (g:A0, m:A0) [12:26:30] [PASSED] LUNARLAKE (g:A0, m:A0) [12:26:30] [PASSED] LUNARLAKE (g:B0, m:A0) [12:26:30] [PASSED] BATTLEMAGE (g:A0, m:A1) [12:26:30] ==================== [PASSED] xe_wa_gt ===================== [12:26:30] ====================== [PASSED] xe_wa ====================== [12:26:30] ============================================================ [12:26:30] Testing complete. Ran 145 tests: passed: 129, skipped: 16 [12:26:30] Elapsed time: 31.285s total, 4.202s configuring, 26.767s building, 0.299s running + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig [12:26:30] Configuring KUnit Kernel ... Regenerating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [12:26:32] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [12:26:53] Starting KUnit Kernel (1/1)... [12:26:53] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [12:26:54] == drm_test_atomic_get_connector_for_encoder (1 subtest) === [12:26:54] [PASSED] drm_test_drm_atomic_get_connector_for_encoder [12:26:54] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ==== [12:26:54] =========== drm_validate_clone_mode (2 subtests) =========== [12:26:54] ============== drm_test_check_in_clone_mode =============== [12:26:54] [PASSED] in_clone_mode [12:26:54] [PASSED] not_in_clone_mode [12:26:54] ========== [PASSED] drm_test_check_in_clone_mode =========== [12:26:54] =============== drm_test_check_valid_clones =============== [12:26:54] [PASSED] not_in_clone_mode [12:26:54] [PASSED] valid_clone [12:26:54] [PASSED] invalid_clone [12:26:54] =========== [PASSED] drm_test_check_valid_clones =========== [12:26:54] ============= [PASSED] drm_validate_clone_mode ============= [12:26:54] ============= drm_validate_modeset (1 subtest) ============= [12:26:54] [PASSED] drm_test_check_connector_changed_modeset [12:26:54] ============== [PASSED] drm_validate_modeset =============== [12:26:54] ====== drm_test_bridge_get_current_state (2 subtests) ====== [12:26:54] [PASSED] drm_test_drm_bridge_get_current_state_atomic [12:26:54] [PASSED] drm_test_drm_bridge_get_current_state_legacy [12:26:54] ======== [PASSED] drm_test_bridge_get_current_state ======== [12:26:54] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ====== [12:26:54] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic [12:26:54] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled [12:26:54] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy [12:26:54] ======== [PASSED] drm_test_bridge_helper_reset_crtc ======== [12:26:54] ============== drm_bridge_alloc (2 subtests) =============== [12:26:54] [PASSED] drm_test_drm_bridge_alloc_basic [12:26:54] [PASSED] drm_test_drm_bridge_alloc_get_put [12:26:54] ================ [PASSED] drm_bridge_alloc ================= [12:26:54] ================== drm_buddy (7 subtests) ================== [12:26:54] [PASSED] drm_test_buddy_alloc_limit [12:26:54] [PASSED] drm_test_buddy_alloc_optimistic [12:26:54] [PASSED] drm_test_buddy_alloc_pessimistic [12:26:54] [PASSED] drm_test_buddy_alloc_pathological [12:26:54] [PASSED] drm_test_buddy_alloc_contiguous [12:26:54] [PASSED] drm_test_buddy_alloc_clear [12:26:54] [PASSED] drm_test_buddy_alloc_range_bias [12:26:54] ==================== [PASSED] drm_buddy ==================== [12:26:54] ============= drm_cmdline_parser (40 subtests) ============= [12:26:54] [PASSED] drm_test_cmdline_force_d_only [12:26:54] [PASSED] drm_test_cmdline_force_D_only_dvi [12:26:54] [PASSED] drm_test_cmdline_force_D_only_hdmi [12:26:54] [PASSED] drm_test_cmdline_force_D_only_not_digital [12:26:54] [PASSED] drm_test_cmdline_force_e_only [12:26:54] [PASSED] drm_test_cmdline_res [12:26:54] [PASSED] drm_test_cmdline_res_vesa [12:26:54] [PASSED] drm_test_cmdline_res_vesa_rblank [12:26:54] [PASSED] drm_test_cmdline_res_rblank [12:26:54] [PASSED] drm_test_cmdline_res_bpp [12:26:54] [PASSED] drm_test_cmdline_res_refresh [12:26:54] [PASSED] drm_test_cmdline_res_bpp_refresh [12:26:54] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced [12:26:54] [PASSED] drm_test_cmdline_res_bpp_refresh_margins [12:26:54] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off [12:26:54] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on [12:26:54] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog [12:26:54] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital [12:26:54] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on [12:26:54] [PASSED] drm_test_cmdline_res_margins_force_on [12:26:54] [PASSED] drm_test_cmdline_res_vesa_margins [12:26:54] [PASSED] drm_test_cmdline_name [12:26:54] [PASSED] drm_test_cmdline_name_bpp [12:26:54] [PASSED] drm_test_cmdline_name_option [12:26:54] [PASSED] drm_test_cmdline_name_bpp_option [12:26:54] [PASSED] drm_test_cmdline_rotate_0 [12:26:54] [PASSED] drm_test_cmdline_rotate_90 [12:26:54] [PASSED] drm_test_cmdline_rotate_180 [12:26:54] [PASSED] drm_test_cmdline_rotate_270 [12:26:54] [PASSED] drm_test_cmdline_hmirror [12:26:54] [PASSED] drm_test_cmdline_vmirror [12:26:54] [PASSED] drm_test_cmdline_margin_options [12:26:54] [PASSED] drm_test_cmdline_multiple_options [12:26:54] [PASSED] drm_test_cmdline_bpp_extra_and_option [12:26:54] [PASSED] drm_test_cmdline_extra_and_option [12:26:54] [PASSED] drm_test_cmdline_freestanding_options [12:26:54] [PASSED] drm_test_cmdline_freestanding_force_e_and_options [12:26:54] [PASSED] drm_test_cmdline_panel_orientation [12:26:54] ================ drm_test_cmdline_invalid ================= [12:26:54] [PASSED] margin_only [12:26:54] [PASSED] interlace_only [12:26:54] [PASSED] res_missing_x [12:26:54] [PASSED] res_missing_y [12:26:54] [PASSED] res_bad_y [12:26:54] [PASSED] res_missing_y_bpp [12:26:54] [PASSED] res_bad_bpp [12:26:54] [PASSED] res_bad_refresh [12:26:54] [PASSED] res_bpp_refresh_force_on_off [12:26:54] [PASSED] res_invalid_mode [12:26:54] [PASSED] res_bpp_wrong_place_mode [12:26:54] [PASSED] name_bpp_refresh [12:26:54] [PASSED] name_refresh [12:26:54] [PASSED] name_refresh_wrong_mode [12:26:54] [PASSED] name_refresh_invalid_mode [12:26:54] [PASSED] rotate_multiple [12:26:54] [PASSED] rotate_invalid_val [12:26:54] [PASSED] rotate_truncated [12:26:54] [PASSED] invalid_option [12:26:54] [PASSED] invalid_tv_option [12:26:54] [PASSED] truncated_tv_option [12:26:54] ============ [PASSED] drm_test_cmdline_invalid ============= [12:26:54] =============== drm_test_cmdline_tv_options =============== [12:26:54] [PASSED] NTSC [12:26:54] [PASSED] NTSC_443 [12:26:54] [PASSED] NTSC_J [12:26:54] [PASSED] PAL [12:26:54] [PASSED] PAL_M [12:26:54] [PASSED] PAL_N [12:26:54] [PASSED] SECAM [12:26:54] [PASSED] MONO_525 [12:26:54] [PASSED] MONO_625 [12:26:54] =========== [PASSED] drm_test_cmdline_tv_options =========== [12:26:54] =============== [PASSED] drm_cmdline_parser ================ [12:26:54] ========== drmm_connector_hdmi_init (20 subtests) ========== [12:26:54] [PASSED] drm_test_connector_hdmi_init_valid [12:26:54] [PASSED] drm_test_connector_hdmi_init_bpc_8 [12:26:54] [PASSED] drm_test_connector_hdmi_init_bpc_10 [12:26:54] [PASSED] drm_test_connector_hdmi_init_bpc_12 [12:26:54] [PASSED] drm_test_connector_hdmi_init_bpc_invalid [12:26:54] [PASSED] drm_test_connector_hdmi_init_bpc_null [12:26:54] [PASSED] drm_test_connector_hdmi_init_formats_empty [12:26:54] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb [12:26:54] === drm_test_connector_hdmi_init_formats_yuv420_allowed === [12:26:54] [PASSED] supported_formats=0x9 yuv420_allowed=1 [12:26:54] [PASSED] supported_formats=0x9 yuv420_allowed=0 [12:26:54] [PASSED] supported_formats=0x3 yuv420_allowed=1 [12:26:54] [PASSED] supported_formats=0x3 yuv420_allowed=0 [12:26:54] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed === [12:26:54] [PASSED] drm_test_connector_hdmi_init_null_ddc [12:26:54] [PASSED] drm_test_connector_hdmi_init_null_product [12:26:54] [PASSED] drm_test_connector_hdmi_init_null_vendor [12:26:54] [PASSED] drm_test_connector_hdmi_init_product_length_exact [12:26:54] [PASSED] drm_test_connector_hdmi_init_product_length_too_long [12:26:54] [PASSED] drm_test_connector_hdmi_init_product_valid [12:26:54] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact [12:26:54] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long [12:26:54] [PASSED] drm_test_connector_hdmi_init_vendor_valid [12:26:54] ========= drm_test_connector_hdmi_init_type_valid ========= [12:26:54] [PASSED] HDMI-A [12:26:54] [PASSED] HDMI-B [12:26:54] ===== [PASSED] drm_test_connector_hdmi_init_type_valid ===== [12:26:54] ======== drm_test_connector_hdmi_init_type_invalid ======== [12:26:54] [PASSED] Unknown [12:26:54] [PASSED] VGA [12:26:54] [PASSED] DVI-I [12:26:54] [PASSED] DVI-D [12:26:54] [PASSED] DVI-A [12:26:54] [PASSED] Composite [12:26:54] [PASSED] SVIDEO [12:26:54] [PASSED] LVDS [12:26:54] [PASSED] Component [12:26:54] [PASSED] DIN [12:26:54] [PASSED] DP [12:26:54] [PASSED] TV [12:26:54] [PASSED] eDP [12:26:54] [PASSED] Virtual [12:26:54] [PASSED] DSI [12:26:54] [PASSED] DPI [12:26:54] [PASSED] Writeback [12:26:54] [PASSED] SPI [12:26:54] [PASSED] USB [12:26:54] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ==== [12:26:54] ============ [PASSED] drmm_connector_hdmi_init ============= [12:26:54] ============= drmm_connector_init (3 subtests) ============= [12:26:54] [PASSED] drm_test_drmm_connector_init [12:26:54] [PASSED] drm_test_drmm_connector_init_null_ddc [12:26:54] ========= drm_test_drmm_connector_init_type_valid ========= [12:26:54] [PASSED] Unknown [12:26:54] [PASSED] VGA [12:26:54] [PASSED] DVI-I [12:26:54] [PASSED] DVI-D [12:26:54] [PASSED] DVI-A [12:26:54] [PASSED] Composite [12:26:54] [PASSED] SVIDEO [12:26:54] [PASSED] LVDS [12:26:54] [PASSED] Component [12:26:54] [PASSED] DIN [12:26:54] [PASSED] DP [12:26:54] [PASSED] HDMI-A [12:26:54] [PASSED] HDMI-B [12:26:54] [PASSED] TV [12:26:54] [PASSED] eDP [12:26:54] [PASSED] Virtual [12:26:54] [PASSED] DSI [12:26:54] [PASSED] DPI [12:26:54] [PASSED] Writeback [12:26:54] [PASSED] SPI [12:26:54] [PASSED] USB [12:26:54] ===== [PASSED] drm_test_drmm_connector_init_type_valid ===== [12:26:54] =============== [PASSED] drmm_connector_init =============== [12:26:54] ========= drm_connector_dynamic_init (6 subtests) ========== [12:26:54] [PASSED] drm_test_drm_connector_dynamic_init [12:26:54] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc [12:26:54] [PASSED] drm_test_drm_connector_dynamic_init_not_added [12:26:54] [PASSED] drm_test_drm_connector_dynamic_init_properties [12:26:54] ===== drm_test_drm_connector_dynamic_init_type_valid ====== [12:26:54] [PASSED] Unknown [12:26:54] [PASSED] VGA [12:26:54] [PASSED] DVI-I [12:26:54] [PASSED] DVI-D [12:26:54] [PASSED] DVI-A [12:26:54] [PASSED] Composite [12:26:54] [PASSED] SVIDEO [12:26:54] [PASSED] LVDS [12:26:54] [PASSED] Component [12:26:54] [PASSED] DIN [12:26:54] [PASSED] DP [12:26:54] [PASSED] HDMI-A [12:26:54] [PASSED] HDMI-B [12:26:54] [PASSED] TV [12:26:54] [PASSED] eDP [12:26:54] [PASSED] Virtual [12:26:54] [PASSED] DSI [12:26:54] [PASSED] DPI [12:26:54] [PASSED] Writeback [12:26:54] [PASSED] SPI [12:26:54] [PASSED] USB [12:26:54] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid == [12:26:54] ======== drm_test_drm_connector_dynamic_init_name ========= [12:26:54] [PASSED] Unknown [12:26:54] [PASSED] VGA [12:26:54] [PASSED] DVI-I [12:26:54] [PASSED] DVI-D [12:26:54] [PASSED] DVI-A [12:26:54] [PASSED] Composite [12:26:54] [PASSED] SVIDEO [12:26:54] [PASSED] LVDS [12:26:54] [PASSED] Component [12:26:54] [PASSED] DIN [12:26:54] [PASSED] DP [12:26:54] [PASSED] HDMI-A [12:26:54] [PASSED] HDMI-B [12:26:54] [PASSED] TV [12:26:54] [PASSED] eDP [12:26:54] [PASSED] Virtual [12:26:54] [PASSED] DSI [12:26:54] [PASSED] DPI [12:26:54] [PASSED] Writeback [12:26:54] [PASSED] SPI [12:26:54] [PASSED] USB [12:26:54] ==== [PASSED] drm_test_drm_connector_dynamic_init_name ===== [12:26:54] =========== [PASSED] drm_connector_dynamic_init ============ [12:26:54] ==== drm_connector_dynamic_register_early (4 subtests) ===== [12:26:54] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list [12:26:54] [PASSED] drm_test_drm_connector_dynamic_register_early_defer [12:26:54] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init [12:26:54] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object [12:26:54] ====== [PASSED] drm_connector_dynamic_register_early ======= [12:26:54] ======= drm_connector_dynamic_register (7 subtests) ======== [12:26:54] [PASSED] drm_test_drm_connector_dynamic_register_on_list [12:26:54] [PASSED] drm_test_drm_connector_dynamic_register_no_defer [12:26:54] [PASSED] drm_test_drm_connector_dynamic_register_no_init [12:26:54] [PASSED] drm_test_drm_connector_dynamic_register_mode_object [12:26:54] [PASSED] drm_test_drm_connector_dynamic_register_sysfs [12:26:54] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name [12:26:54] [PASSED] drm_test_drm_connector_dynamic_register_debugfs [12:26:54] ========= [PASSED] drm_connector_dynamic_register ========== [12:26:54] = drm_connector_attach_broadcast_rgb_property (2 subtests) = [12:26:54] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property [12:26:54] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector [12:26:54] === [PASSED] drm_connector_attach_broadcast_rgb_property === [12:26:54] ========== drm_get_tv_mode_from_name (2 subtests) ========== [12:26:54] ========== drm_test_get_tv_mode_from_name_valid =========== [12:26:54] [PASSED] NTSC [12:26:54] [PASSED] NTSC-443 [12:26:54] [PASSED] NTSC-J [12:26:54] [PASSED] PAL [12:26:54] [PASSED] PAL-M [12:26:54] [PASSED] PAL-N [12:26:54] [PASSED] SECAM [12:26:54] [PASSED] Mono [12:26:54] ====== [PASSED] drm_test_get_tv_mode_from_name_valid ======= [12:26:54] [PASSED] drm_test_get_tv_mode_from_name_truncated [12:26:54] ============ [PASSED] drm_get_tv_mode_from_name ============ [12:26:54] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) = [12:26:54] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb [12:26:54] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc [12:26:54] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1 [12:26:54] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc [12:26:54] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1 [12:26:54] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double [12:26:54] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid = [12:26:54] [PASSED] VIC 96 [12:26:54] [PASSED] VIC 97 [12:26:54] [PASSED] VIC 101 [12:26:54] [PASSED] VIC 102 [12:26:54] [PASSED] VIC 106 [12:26:54] [PASSED] VIC 107 [12:26:54] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid === [12:26:54] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc [12:26:54] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc [12:26:54] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc [12:26:54] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc [12:26:54] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc [12:26:54] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ==== [12:26:54] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) == [12:26:54] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ==== [12:26:54] [PASSED] Automatic [12:26:54] [PASSED] Full [12:26:54] [PASSED] Limited 16:235 [12:26:54] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name === [12:26:54] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid [12:26:54] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ==== [12:26:54] == drm_hdmi_connector_get_output_format_name (2 subtests) == [12:26:54] === drm_test_drm_hdmi_connector_get_output_format_name ==== [12:26:54] [PASSED] RGB [12:26:54] [PASSED] YUV 4:2:0 [12:26:54] [PASSED] YUV 4:2:2 [12:26:54] [PASSED] YUV 4:4:4 [12:26:54] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name === [12:26:54] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid [12:26:54] ==== [PASSED] drm_hdmi_connector_get_output_format_name ==== [12:26:54] ============= drm_damage_helper (21 subtests) ============== [12:26:54] [PASSED] drm_test_damage_iter_no_damage [12:26:54] [PASSED] drm_test_damage_iter_no_damage_fractional_src [12:26:54] [PASSED] drm_test_damage_iter_no_damage_src_moved [12:26:54] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved [12:26:54] [PASSED] drm_test_damage_iter_no_damage_not_visible [12:26:54] [PASSED] drm_test_damage_iter_no_damage_no_crtc [12:26:54] [PASSED] drm_test_damage_iter_no_damage_no_fb [12:26:54] [PASSED] drm_test_damage_iter_simple_damage [12:26:54] [PASSED] drm_test_damage_iter_single_damage [12:26:54] [PASSED] drm_test_damage_iter_single_damage_intersect_src [12:26:54] [PASSED] drm_test_damage_iter_single_damage_outside_src [12:26:54] [PASSED] drm_test_damage_iter_single_damage_fractional_src [12:26:54] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src [12:26:54] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src [12:26:54] [PASSED] drm_test_damage_iter_single_damage_src_moved [12:26:54] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved [12:26:54] [PASSED] drm_test_damage_iter_damage [12:26:54] [PASSED] drm_test_damage_iter_damage_one_intersect [12:26:54] [PASSED] drm_test_damage_iter_damage_one_outside [12:26:54] [PASSED] drm_test_damage_iter_damage_src_moved [12:26:54] [PASSED] drm_test_damage_iter_damage_not_visible [12:26:54] ================ [PASSED] drm_damage_helper ================ [12:26:54] ============== drm_dp_mst_helper (3 subtests) ============== [12:26:54] ============== drm_test_dp_mst_calc_pbn_mode ============== [12:26:54] [PASSED] Clock 154000 BPP 30 DSC disabled [12:26:54] [PASSED] Clock 234000 BPP 30 DSC disabled [12:26:54] [PASSED] Clock 297000 BPP 24 DSC disabled [12:26:54] [PASSED] Clock 332880 BPP 24 DSC enabled [12:26:54] [PASSED] Clock 324540 BPP 24 DSC enabled [12:26:54] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ========== [12:26:54] ============== drm_test_dp_mst_calc_pbn_div =============== [12:26:54] [PASSED] Link rate 2000000 lane count 4 [12:26:54] [PASSED] Link rate 2000000 lane count 2 [12:26:54] [PASSED] Link rate 2000000 lane count 1 [12:26:54] [PASSED] Link rate 1350000 lane count 4 [12:26:54] [PASSED] Link rate 1350000 lane count 2 [12:26:54] [PASSED] Link rate 1350000 lane count 1 [12:26:54] [PASSED] Link rate 1000000 lane count 4 [12:26:54] [PASSED] Link rate 1000000 lane count 2 [12:26:54] [PASSED] Link rate 1000000 lane count 1 [12:26:54] [PASSED] Link rate 810000 lane count 4 [12:26:54] [PASSED] Link rate 810000 lane count 2 [12:26:54] [PASSED] Link rate 810000 lane count 1 [12:26:54] [PASSED] Link rate 540000 lane count 4 [12:26:54] [PASSED] Link rate 540000 lane count 2 [12:26:54] [PASSED] Link rate 540000 lane count 1 [12:26:54] [PASSED] Link rate 270000 lane count 4 [12:26:54] [PASSED] Link rate 270000 lane count 2 [12:26:54] [PASSED] Link rate 270000 lane count 1 [12:26:54] [PASSED] Link rate 162000 lane count 4 [12:26:54] [PASSED] Link rate 162000 lane count 2 [12:26:54] [PASSED] Link rate 162000 lane count 1 [12:26:54] ========== [PASSED] drm_test_dp_mst_calc_pbn_div =========== [12:26:54] ========= drm_test_dp_mst_sideband_msg_req_decode ========= [12:26:54] [PASSED] DP_ENUM_PATH_RESOURCES with port number [12:26:54] [PASSED] DP_POWER_UP_PHY with port number [12:26:54] [PASSED] DP_POWER_DOWN_PHY with port number [12:26:54] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks [12:26:54] [PASSED] DP_ALLOCATE_PAYLOAD with port number [12:26:54] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI [12:26:54] [PASSED] DP_ALLOCATE_PAYLOAD with PBN [12:26:54] [PASSED] DP_QUERY_PAYLOAD with port number [12:26:54] [PASSED] DP_QUERY_PAYLOAD with VCPI [12:26:54] [PASSED] DP_REMOTE_DPCD_READ with port number [12:26:54] [PASSED] DP_REMOTE_DPCD_READ with DPCD address [12:26:54] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes [12:26:54] [PASSED] DP_REMOTE_DPCD_WRITE with port number [12:26:54] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address [12:26:54] [PASSED] DP_REMOTE_DPCD_WRITE with data array [12:26:54] [PASSED] DP_REMOTE_I2C_READ with port number [12:26:54] [PASSED] DP_REMOTE_I2C_READ with I2C device ID [12:26:54] [PASSED] DP_REMOTE_I2C_READ with transactions array [12:26:54] [PASSED] DP_REMOTE_I2C_WRITE with port number [12:26:54] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID [12:26:54] [PASSED] DP_REMOTE_I2C_WRITE with data array [12:26:54] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID [12:26:54] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID [12:26:54] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event [12:26:54] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event [12:26:54] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior [12:26:54] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior [12:26:54] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode ===== [12:26:54] ================ [PASSED] drm_dp_mst_helper ================ [12:26:54] ================== drm_exec (7 subtests) =================== [12:26:54] [PASSED] sanitycheck [12:26:54] [PASSED] test_lock [12:26:54] [PASSED] test_lock_unlock [12:26:54] [PASSED] test_duplicates [12:26:54] [PASSED] test_prepare [12:26:54] [PASSED] test_prepare_array [12:26:54] [PASSED] test_multiple_loops [12:26:54] ==================== [PASSED] drm_exec ===================== [12:26:54] =========== drm_format_helper_test (17 subtests) =========== [12:26:54] ============== drm_test_fb_xrgb8888_to_gray8 ============== [12:26:54] [PASSED] single_pixel_source_buffer [12:26:54] [PASSED] single_pixel_clip_rectangle [12:26:54] [PASSED] well_known_colors [12:26:54] [PASSED] destination_pitch [12:26:54] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ========== [12:26:54] ============= drm_test_fb_xrgb8888_to_rgb332 ============== [12:26:54] [PASSED] single_pixel_source_buffer [12:26:54] [PASSED] single_pixel_clip_rectangle [12:26:54] [PASSED] well_known_colors [12:26:54] [PASSED] destination_pitch [12:26:54] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ========== [12:26:54] ============= drm_test_fb_xrgb8888_to_rgb565 ============== [12:26:54] [PASSED] single_pixel_source_buffer [12:26:54] [PASSED] single_pixel_clip_rectangle [12:26:54] [PASSED] well_known_colors [12:26:54] [PASSED] destination_pitch [12:26:54] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ========== [12:26:54] ============ drm_test_fb_xrgb8888_to_xrgb1555 ============= [12:26:54] [PASSED] single_pixel_source_buffer [12:26:54] [PASSED] single_pixel_clip_rectangle [12:26:54] [PASSED] well_known_colors [12:26:54] [PASSED] destination_pitch [12:26:54] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 ========= [12:26:54] ============ drm_test_fb_xrgb8888_to_argb1555 ============= [12:26:54] [PASSED] single_pixel_source_buffer [12:26:54] [PASSED] single_pixel_clip_rectangle [12:26:54] [PASSED] well_known_colors [12:26:54] [PASSED] destination_pitch [12:26:54] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 ========= [12:26:54] ============ drm_test_fb_xrgb8888_to_rgba5551 ============= [12:26:54] [PASSED] single_pixel_source_buffer [12:26:54] [PASSED] single_pixel_clip_rectangle [12:26:54] [PASSED] well_known_colors [12:26:54] [PASSED] destination_pitch [12:26:54] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 ========= [12:26:54] ============= drm_test_fb_xrgb8888_to_rgb888 ============== [12:26:54] [PASSED] single_pixel_source_buffer [12:26:54] [PASSED] single_pixel_clip_rectangle [12:26:54] [PASSED] well_known_colors [12:26:54] [PASSED] destination_pitch [12:26:54] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ========== [12:26:54] ============= drm_test_fb_xrgb8888_to_bgr888 ============== [12:26:54] [PASSED] single_pixel_source_buffer [12:26:54] [PASSED] single_pixel_clip_rectangle [12:26:54] [PASSED] well_known_colors [12:26:54] [PASSED] destination_pitch [12:26:54] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ========== [12:26:54] ============ drm_test_fb_xrgb8888_to_argb8888 ============= [12:26:54] [PASSED] single_pixel_source_buffer [12:26:54] [PASSED] single_pixel_clip_rectangle [12:26:54] [PASSED] well_known_colors [12:26:54] [PASSED] destination_pitch [12:26:54] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 ========= [12:26:54] =========== drm_test_fb_xrgb8888_to_xrgb2101010 =========== [12:26:54] [PASSED] single_pixel_source_buffer [12:26:54] [PASSED] single_pixel_clip_rectangle [12:26:54] [PASSED] well_known_colors [12:26:54] [PASSED] destination_pitch [12:26:54] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 ======= [12:26:54] =========== drm_test_fb_xrgb8888_to_argb2101010 =========== [12:26:54] [PASSED] single_pixel_source_buffer [12:26:54] [PASSED] single_pixel_clip_rectangle [12:26:54] [PASSED] well_known_colors [12:26:54] [PASSED] destination_pitch [12:26:54] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 ======= [12:26:54] ============== drm_test_fb_xrgb8888_to_mono =============== [12:26:54] [PASSED] single_pixel_source_buffer [12:26:54] [PASSED] single_pixel_clip_rectangle [12:26:54] [PASSED] well_known_colors [12:26:54] [PASSED] destination_pitch [12:26:54] ========== [PASSED] drm_test_fb_xrgb8888_to_mono =========== [12:26:54] ==================== drm_test_fb_swab ===================== [12:26:54] [PASSED] single_pixel_source_buffer [12:26:54] [PASSED] single_pixel_clip_rectangle [12:26:54] [PASSED] well_known_colors [12:26:54] [PASSED] destination_pitch [12:26:54] ================ [PASSED] drm_test_fb_swab ================= [12:26:54] ============ drm_test_fb_xrgb8888_to_xbgr8888 ============= [12:26:54] [PASSED] single_pixel_source_buffer [12:26:54] [PASSED] single_pixel_clip_rectangle [12:26:54] [PASSED] well_known_colors [12:26:54] [PASSED] destination_pitch [12:26:54] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 ========= [12:26:54] ============ drm_test_fb_xrgb8888_to_abgr8888 ============= [12:26:54] [PASSED] single_pixel_source_buffer [12:26:54] [PASSED] single_pixel_clip_rectangle [12:26:54] [PASSED] well_known_colors [12:26:54] [PASSED] destination_pitch [12:26:54] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 ========= [12:26:54] ================= drm_test_fb_clip_offset ================= [12:26:54] [PASSED] pass through [12:26:54] [PASSED] horizontal offset [12:26:54] [PASSED] vertical offset [12:26:54] [PASSED] horizontal and vertical offset [12:26:54] [PASSED] horizontal offset (custom pitch) [12:26:54] [PASSED] vertical offset (custom pitch) [12:26:54] [PASSED] horizontal and vertical offset (custom pitch) [12:26:54] ============= [PASSED] drm_test_fb_clip_offset ============= [12:26:54] =================== drm_test_fb_memcpy ==================== [12:26:54] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258) [12:26:54] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258) [12:26:54] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559) [12:26:54] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258) [12:26:54] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258) [12:26:54] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559) [12:26:54] [PASSED] well_known_colors: XB24 little-endian (0x34324258) [12:26:54] [PASSED] well_known_colors: XRA8 little-endian (0x38415258) [12:26:54] [PASSED] well_known_colors: YU24 little-endian (0x34325559) [12:26:54] [PASSED] destination_pitch: XB24 little-endian (0x34324258) [12:26:54] [PASSED] destination_pitch: XRA8 little-endian (0x38415258) [12:26:54] [PASSED] destination_pitch: YU24 little-endian (0x34325559) [12:26:54] =============== [PASSED] drm_test_fb_memcpy ================ [12:26:54] ============= [PASSED] drm_format_helper_test ============== [12:26:54] ================= drm_format (18 subtests) ================= [12:26:54] [PASSED] drm_test_format_block_width_invalid [12:26:54] [PASSED] drm_test_format_block_width_one_plane [12:26:54] [PASSED] drm_test_format_block_width_two_plane [12:26:54] [PASSED] drm_test_format_block_width_three_plane [12:26:54] [PASSED] drm_test_format_block_width_tiled [12:26:54] [PASSED] drm_test_format_block_height_invalid [12:26:54] [PASSED] drm_test_format_block_height_one_plane [12:26:54] [PASSED] drm_test_format_block_height_two_plane [12:26:54] [PASSED] drm_test_format_block_height_three_plane [12:26:54] [PASSED] drm_test_format_block_height_tiled [12:26:54] [PASSED] drm_test_format_min_pitch_invalid [12:26:54] [PASSED] drm_test_format_min_pitch_one_plane_8bpp [12:26:54] [PASSED] drm_test_format_min_pitch_one_plane_16bpp [12:26:54] [PASSED] drm_test_format_min_pitch_one_plane_24bpp [12:26:54] [PASSED] drm_test_format_min_pitch_one_plane_32bpp [12:26:54] [PASSED] drm_test_format_min_pitch_two_plane [12:26:54] [PASSED] drm_test_format_min_pitch_three_plane_8bpp [12:26:54] [PASSED] drm_test_format_min_pitch_tiled [12:26:54] =================== [PASSED] drm_format ==================== [12:26:54] ============== drm_framebuffer (10 subtests) =============== [12:26:54] ========== drm_test_framebuffer_check_src_coords ========== [12:26:54] [PASSED] Success: source fits into fb [12:26:54] [PASSED] Fail: overflowing fb with x-axis coordinate [12:26:54] [PASSED] Fail: overflowing fb with y-axis coordinate [12:26:54] [PASSED] Fail: overflowing fb with source width [12:26:54] [PASSED] Fail: overflowing fb with source height [12:26:54] ====== [PASSED] drm_test_framebuffer_check_src_coords ====== [12:26:54] [PASSED] drm_test_framebuffer_cleanup [12:26:54] =============== drm_test_framebuffer_create =============== [12:26:54] [PASSED] ABGR8888 normal sizes [12:26:54] [PASSED] ABGR8888 max sizes [12:26:54] [PASSED] ABGR8888 pitch greater than min required [12:26:54] [PASSED] ABGR8888 pitch less than min required [12:26:54] [PASSED] ABGR8888 Invalid width [12:26:54] [PASSED] ABGR8888 Invalid buffer handle [12:26:54] [PASSED] No pixel format [12:26:54] [PASSED] ABGR8888 Width 0 [12:26:54] [PASSED] ABGR8888 Height 0 [12:26:54] [PASSED] ABGR8888 Out of bound height * pitch combination [12:26:54] [PASSED] ABGR8888 Large buffer offset [12:26:54] [PASSED] ABGR8888 Buffer offset for inexistent plane [12:26:54] [PASSED] ABGR8888 Invalid flag [12:26:54] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers [12:26:54] [PASSED] ABGR8888 Valid buffer modifier [12:26:54] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE) [12:26:54] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS [12:26:54] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS [12:26:54] [PASSED] NV12 Normal sizes [12:26:54] [PASSED] NV12 Max sizes [12:26:54] [PASSED] NV12 Invalid pitch [12:26:54] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag [12:26:54] [PASSED] NV12 different modifier per-plane [12:26:54] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE [12:26:54] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS [12:26:54] [PASSED] NV12 Modifier for inexistent plane [12:26:54] [PASSED] NV12 Handle for inexistent plane [12:26:54] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS [12:26:54] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier [12:26:54] [PASSED] YVU420 Normal sizes [12:26:54] [PASSED] YVU420 Max sizes [12:26:54] [PASSED] YVU420 Invalid pitch [12:26:54] [PASSED] YVU420 Different pitches [12:26:54] [PASSED] YVU420 Different buffer offsets/pitches [12:26:54] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS [12:26:54] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS [12:26:54] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS [12:26:54] [PASSED] YVU420 Valid modifier [12:26:54] [PASSED] YVU420 Different modifiers per plane [12:26:54] [PASSED] YVU420 Modifier for inexistent plane [12:26:54] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR) [12:26:54] [PASSED] X0L2 Normal sizes [12:26:54] [PASSED] X0L2 Max sizes [12:26:54] [PASSED] X0L2 Invalid pitch [12:26:54] [PASSED] X0L2 Pitch greater than minimum required [12:26:54] [PASSED] X0L2 Handle for inexistent plane [12:26:54] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set [12:26:54] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set [12:26:54] [PASSED] X0L2 Valid modifier [12:26:54] [PASSED] X0L2 Modifier for inexistent plane [12:26:54] =========== [PASSED] drm_test_framebuffer_create =========== [12:26:54] [PASSED] drm_test_framebuffer_free [12:26:54] [PASSED] drm_test_framebuffer_init [12:26:54] [PASSED] drm_test_framebuffer_init_bad_format [12:26:54] [PASSED] drm_test_framebuffer_init_dev_mismatch [12:26:54] [PASSED] drm_test_framebuffer_lookup [12:26:54] [PASSED] drm_test_framebuffer_lookup_inexistent [12:26:54] [PASSED] drm_test_framebuffer_modifiers_not_supported [12:26:54] ================= [PASSED] drm_framebuffer ================= [12:26:54] ================ drm_gem_shmem (8 subtests) ================ [12:26:54] [PASSED] drm_gem_shmem_test_obj_create [12:26:54] [PASSED] drm_gem_shmem_test_obj_create_private [12:26:54] [PASSED] drm_gem_shmem_test_pin_pages [12:26:54] [PASSED] drm_gem_shmem_test_vmap [12:26:54] [PASSED] drm_gem_shmem_test_get_pages_sgt [12:26:54] [PASSED] drm_gem_shmem_test_get_sg_table [12:26:54] [PASSED] drm_gem_shmem_test_madvise [12:26:54] [PASSED] drm_gem_shmem_test_purge [12:26:54] ================== [PASSED] drm_gem_shmem ================== [12:26:54] === drm_atomic_helper_connector_hdmi_check (27 subtests) === [12:26:54] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode [12:26:54] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1 [12:26:54] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode [12:26:54] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1 [12:26:54] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode [12:26:54] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1 [12:26:54] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 ======= [12:26:54] [PASSED] Automatic [12:26:54] [PASSED] Full [12:26:54] [PASSED] Limited 16:235 [12:26:54] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 === [12:26:54] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed [12:26:54] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed [12:26:54] [PASSED] drm_test_check_disable_connector [12:26:54] [PASSED] drm_test_check_hdmi_funcs_reject_rate [12:26:54] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb [12:26:54] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420 [12:26:54] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422 [12:26:54] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420 [12:26:54] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420 [12:26:54] [PASSED] drm_test_check_output_bpc_crtc_mode_changed [12:26:54] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed [12:26:54] [PASSED] drm_test_check_output_bpc_dvi [12:26:54] [PASSED] drm_test_check_output_bpc_format_vic_1 [12:26:54] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only [12:26:54] [PASSED] drm_test_check_output_bpc_format_display_rgb_only [12:26:54] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only [12:26:54] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only [12:26:54] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc [12:26:54] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc [12:26:54] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc [12:26:54] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ====== [12:26:54] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ==== [12:26:54] [PASSED] drm_test_check_broadcast_rgb_value [12:26:54] [PASSED] drm_test_check_bpc_8_value [12:26:54] [PASSED] drm_test_check_bpc_10_value [12:26:54] [PASSED] drm_test_check_bpc_12_value [12:26:54] [PASSED] drm_test_check_format_value [12:26:54] [PASSED] drm_test_check_tmds_char_value [12:26:54] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ====== [12:26:54] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) = [12:26:54] [PASSED] drm_test_check_mode_valid [12:26:54] [PASSED] drm_test_check_mode_valid_reject [12:26:54] [PASSED] drm_test_check_mode_valid_reject_rate [12:26:54] [PASSED] drm_test_check_mode_valid_reject_max_clock [12:26:54] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid === [12:26:54] ================= drm_managed (2 subtests) ================= [12:26:54] [PASSED] drm_test_managed_release_action [12:26:54] [PASSED] drm_test_managed_run_action [12:26:54] =================== [PASSED] drm_managed =================== [12:26:54] =================== drm_mm (6 subtests) ==================== [12:26:54] [PASSED] drm_test_mm_init [12:26:54] [PASSED] drm_test_mm_debug [12:26:54] [PASSED] drm_test_mm_align32 [12:26:54] [PASSED] drm_test_mm_align64 [12:26:54] [PASSED] drm_test_mm_lowest [12:26:54] [PASSED] drm_test_mm_highest [12:26:54] ===================== [PASSED] drm_mm ====================== [12:26:54] ============= drm_modes_analog_tv (5 subtests) ============= [12:26:54] [PASSED] drm_test_modes_analog_tv_mono_576i [12:26:54] [PASSED] drm_test_modes_analog_tv_ntsc_480i [12:26:54] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined [12:26:54] [PASSED] drm_test_modes_analog_tv_pal_576i [12:26:54] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined [12:26:54] =============== [PASSED] drm_modes_analog_tv =============== [12:26:54] ============== drm_plane_helper (2 subtests) =============== [12:26:54] =============== drm_test_check_plane_state ================ [12:26:54] [PASSED] clipping_simple [12:26:54] [PASSED] clipping_rotate_reflect [12:26:54] [PASSED] positioning_simple [12:26:54] [PASSED] upscaling [12:26:54] [PASSED] downscaling [12:26:54] [PASSED] rounding1 [12:26:54] [PASSED] rounding2 [12:26:54] [PASSED] rounding3 [12:26:54] [PASSED] rounding4 [12:26:54] =========== [PASSED] drm_test_check_plane_state ============ [12:26:54] =========== drm_test_check_invalid_plane_state ============ [12:26:54] [PASSED] positioning_invalid [12:26:54] [PASSED] upscaling_invalid [12:26:54] [PASSED] downscaling_invalid [12:26:54] ======= [PASSED] drm_test_check_invalid_plane_state ======== [12:26:54] ================ [PASSED] drm_plane_helper ================= [12:26:54] ====== drm_connector_helper_tv_get_modes (1 subtest) ======= [12:26:54] ====== drm_test_connector_helper_tv_get_modes_check ======= [12:26:54] [PASSED] None [12:26:54] [PASSED] PAL [12:26:54] [PASSED] NTSC [12:26:54] [PASSED] Both, NTSC Default [12:26:54] [PASSED] Both, PAL Default [12:26:54] [PASSED] Both, NTSC Default, with PAL on command-line [12:26:54] [PASSED] Both, PAL Default, with NTSC on command-line [12:26:54] == [PASSED] drm_test_connector_helper_tv_get_modes_check === [12:26:54] ======== [PASSED] drm_connector_helper_tv_get_modes ======== [12:26:54] ================== drm_rect (9 subtests) =================== [12:26:54] [PASSED] drm_test_rect_clip_scaled_div_by_zero [12:26:54] [PASSED] drm_test_rect_clip_scaled_not_clipped [12:26:54] [PASSED] drm_test_rect_clip_scaled_clipped [12:26:54] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned [12:26:54] ================= drm_test_rect_intersect ================= [12:26:54] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0 [12:26:54] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1 [12:26:54] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0 [12:26:54] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1 [12:26:54] [PASSED] right x left: 2x1+0+0 x 3x1+1+0 [12:26:54] [PASSED] left x right: 3x1+1+0 x 2x1+0+0 [12:26:54] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1 [12:26:54] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0 [12:26:54] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1 [12:26:54] [PASSED] touching side: 1x1+0+0 x 1x1+1+0 [12:26:54] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0 [12:26:54] [PASSED] inside another: 2x2+0+0 x 1x1+1+1 [12:26:54] [PASSED] far away: 1x1+0+0 x 1x1+3+6 [12:26:54] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10 [12:26:54] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10 [12:26:54] ============= [PASSED] drm_test_rect_intersect ============= [12:26:54] ================ drm_test_rect_calc_hscale ================ [12:26:54] [PASSED] normal use [12:26:54] [PASSED] out of max range [12:26:54] [PASSED] out of min range [12:26:54] [PASSED] zero dst [12:26:54] [PASSED] negative src [12:26:54] [PASSED] negative dst [12:26:54] ============ [PASSED] drm_test_rect_calc_hscale ============ [12:26:54] ================ drm_test_rect_calc_vscale ================ [12:26:54] [PASSED] normal use [12:26:54] [PASSED] out of max range [12:26:54] [PASSED] out of min range [12:26:54] [PASSED] zero dst [12:26:54] [PASSED] negative src [12:26:54] [PASSED] negative dst [12:26:54] ============ [PASSED] drm_test_rect_calc_vscale ============ [12:26:54] ================== drm_test_rect_rotate =================== [12:26:54] [PASSED] reflect-x [12:26:54] [PASSED] reflect-y [12:26:54] [PASSED] rotate-0 [12:26:54] [PASSED] rotate-90 [12:26:54] [PASSED] rotate-180 [12:26:54] [PASSED] rotate-270 stty: 'standard input': Inappropriate ioctl for device [12:26:54] ============== [PASSED] drm_test_rect_rotate =============== [12:26:54] ================ drm_test_rect_rotate_inv ================= [12:26:54] [PASSED] reflect-x [12:26:54] [PASSED] reflect-y [12:26:54] [PASSED] rotate-0 [12:26:54] [PASSED] rotate-90 [12:26:54] [PASSED] rotate-180 [12:26:54] [PASSED] rotate-270 [12:26:54] ============ [PASSED] drm_test_rect_rotate_inv ============= [12:26:54] ==================== [PASSED] drm_rect ===================== [12:26:54] ============ drm_sysfb_modeset_test (1 subtest) ============ [12:26:54] ============ drm_test_sysfb_build_fourcc_list ============= [12:26:54] [PASSED] no native formats [12:26:54] [PASSED] XRGB8888 as native format [12:26:54] [PASSED] remove duplicates [12:26:54] [PASSED] convert alpha formats [12:26:54] [PASSED] random formats [12:26:54] ======== [PASSED] drm_test_sysfb_build_fourcc_list ========= [12:26:54] ============= [PASSED] drm_sysfb_modeset_test ============== [12:26:54] ============================================================ [12:26:54] Testing complete. Ran 616 tests: passed: 616 [12:26:54] Elapsed time: 23.153s total, 1.637s configuring, 21.347s building, 0.137s running + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig [12:26:54] Configuring KUnit Kernel ... Regenerating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [12:26:55] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [12:27:03] Starting KUnit Kernel (1/1)... [12:27:03] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [12:27:03] ================= ttm_device (5 subtests) ================== [12:27:03] [PASSED] ttm_device_init_basic [12:27:03] [PASSED] ttm_device_init_multiple [12:27:03] [PASSED] ttm_device_fini_basic [12:27:03] [PASSED] ttm_device_init_no_vma_man [12:27:03] ================== ttm_device_init_pools ================== [12:27:03] [PASSED] No DMA allocations, no DMA32 required [12:27:03] [PASSED] DMA allocations, DMA32 required [12:27:03] [PASSED] No DMA allocations, DMA32 required [12:27:03] [PASSED] DMA allocations, no DMA32 required [12:27:03] ============== [PASSED] ttm_device_init_pools ============== [12:27:03] =================== [PASSED] ttm_device ==================== [12:27:03] ================== ttm_pool (8 subtests) =================== [12:27:03] ================== ttm_pool_alloc_basic =================== [12:27:03] [PASSED] One page [12:27:03] [PASSED] More than one page [12:27:03] [PASSED] Above the allocation limit [12:27:03] [PASSED] One page, with coherent DMA mappings enabled [12:27:03] [PASSED] Above the allocation limit, with coherent DMA mappings enabled [12:27:03] ============== [PASSED] ttm_pool_alloc_basic =============== [12:27:03] ============== ttm_pool_alloc_basic_dma_addr ============== [12:27:03] [PASSED] One page [12:27:03] [PASSED] More than one page [12:27:03] [PASSED] Above the allocation limit [12:27:03] [PASSED] One page, with coherent DMA mappings enabled [12:27:03] [PASSED] Above the allocation limit, with coherent DMA mappings enabled [12:27:03] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ========== [12:27:03] [PASSED] ttm_pool_alloc_order_caching_match [12:27:03] [PASSED] ttm_pool_alloc_caching_mismatch [12:27:03] [PASSED] ttm_pool_alloc_order_mismatch [12:27:03] [PASSED] ttm_pool_free_dma_alloc [12:27:03] [PASSED] ttm_pool_free_no_dma_alloc [12:27:03] [PASSED] ttm_pool_fini_basic [12:27:03] ==================== [PASSED] ttm_pool ===================== [12:27:03] ================ ttm_resource (8 subtests) ================= [12:27:03] ================= ttm_resource_init_basic ================= [12:27:03] [PASSED] Init resource in TTM_PL_SYSTEM [12:27:03] [PASSED] Init resource in TTM_PL_VRAM [12:27:03] [PASSED] Init resource in a private placement [12:27:03] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags [12:27:03] ============= [PASSED] ttm_resource_init_basic ============= [12:27:03] [PASSED] ttm_resource_init_pinned [12:27:03] [PASSED] ttm_resource_fini_basic [12:27:03] [PASSED] ttm_resource_manager_init_basic [12:27:03] [PASSED] ttm_resource_manager_usage_basic [12:27:03] [PASSED] ttm_resource_manager_set_used_basic [12:27:03] [PASSED] ttm_sys_man_alloc_basic [12:27:03] [PASSED] ttm_sys_man_free_basic [12:27:03] ================== [PASSED] ttm_resource =================== [12:27:03] =================== ttm_tt (15 subtests) =================== [12:27:03] ==================== ttm_tt_init_basic ==================== [12:27:03] [PASSED] Page-aligned size [12:27:03] [PASSED] Extra pages requested [12:27:03] ================ [PASSED] ttm_tt_init_basic ================ [12:27:03] [PASSED] ttm_tt_init_misaligned [12:27:03] [PASSED] ttm_tt_fini_basic [12:27:03] [PASSED] ttm_tt_fini_sg [12:27:03] [PASSED] ttm_tt_fini_shmem [12:27:03] [PASSED] ttm_tt_create_basic [12:27:03] [PASSED] ttm_tt_create_invalid_bo_type [12:27:03] [PASSED] ttm_tt_create_ttm_exists [12:27:03] [PASSED] ttm_tt_create_failed [12:27:03] [PASSED] ttm_tt_destroy_basic [12:27:03] [PASSED] ttm_tt_populate_null_ttm [12:27:03] [PASSED] ttm_tt_populate_populated_ttm [12:27:03] [PASSED] ttm_tt_unpopulate_basic [12:27:03] [PASSED] ttm_tt_unpopulate_empty_ttm [12:27:03] [PASSED] ttm_tt_swapin_basic [12:27:03] ===================== [PASSED] ttm_tt ====================== [12:27:03] =================== ttm_bo (14 subtests) =================== [12:27:03] =========== ttm_bo_reserve_optimistic_no_ticket =========== [12:27:03] [PASSED] Cannot be interrupted and sleeps [12:27:03] [PASSED] Cannot be interrupted, locks straight away [12:27:03] [PASSED] Can be interrupted, sleeps [12:27:03] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket ======= [12:27:03] [PASSED] ttm_bo_reserve_locked_no_sleep [12:27:03] [PASSED] ttm_bo_reserve_no_wait_ticket [12:27:03] [PASSED] ttm_bo_reserve_double_resv [12:27:03] [PASSED] ttm_bo_reserve_interrupted [12:27:03] [PASSED] ttm_bo_reserve_deadlock [12:27:03] [PASSED] ttm_bo_unreserve_basic [12:27:03] [PASSED] ttm_bo_unreserve_pinned [12:27:03] [PASSED] ttm_bo_unreserve_bulk [12:27:03] [PASSED] ttm_bo_put_basic [12:27:03] [PASSED] ttm_bo_put_shared_resv [12:27:03] [PASSED] ttm_bo_pin_basic [12:27:03] [PASSED] ttm_bo_pin_unpin_resource [12:27:03] [PASSED] ttm_bo_multiple_pin_one_unpin [12:27:03] ===================== [PASSED] ttm_bo ====================== [12:27:03] ============== ttm_bo_validate (22 subtests) =============== [12:27:03] ============== ttm_bo_init_reserved_sys_man =============== [12:27:03] [PASSED] Buffer object for userspace [12:27:03] [PASSED] Kernel buffer object [12:27:03] [PASSED] Shared buffer object [12:27:03] ========== [PASSED] ttm_bo_init_reserved_sys_man =========== [12:27:03] ============== ttm_bo_init_reserved_mock_man ============== [12:27:03] [PASSED] Buffer object for userspace [12:27:03] [PASSED] Kernel buffer object [12:27:03] [PASSED] Shared buffer object [12:27:03] ========== [PASSED] ttm_bo_init_reserved_mock_man ========== [12:27:03] [PASSED] ttm_bo_init_reserved_resv [12:27:03] ================== ttm_bo_validate_basic ================== [12:27:03] [PASSED] Buffer object for userspace [12:27:03] [PASSED] Kernel buffer object [12:27:03] [PASSED] Shared buffer object [12:27:03] ============== [PASSED] ttm_bo_validate_basic ============== [12:27:03] [PASSED] ttm_bo_validate_invalid_placement [12:27:03] ============= ttm_bo_validate_same_placement ============== [12:27:03] [PASSED] System manager [12:27:03] [PASSED] VRAM manager [12:27:03] ========= [PASSED] ttm_bo_validate_same_placement ========== [12:27:03] [PASSED] ttm_bo_validate_failed_alloc [12:27:03] [PASSED] ttm_bo_validate_pinned [12:27:03] [PASSED] ttm_bo_validate_busy_placement [12:27:03] ================ ttm_bo_validate_multihop ================= [12:27:03] [PASSED] Buffer object for userspace [12:27:03] [PASSED] Kernel buffer object [12:27:03] [PASSED] Shared buffer object [12:27:03] ============ [PASSED] ttm_bo_validate_multihop ============= [12:27:03] ========== ttm_bo_validate_no_placement_signaled ========== [12:27:03] [PASSED] Buffer object in system domain, no page vector [12:27:03] [PASSED] Buffer object in system domain with an existing page vector [12:27:03] ====== [PASSED] ttm_bo_validate_no_placement_signaled ====== [12:27:03] ======== ttm_bo_validate_no_placement_not_signaled ======== [12:27:03] [PASSED] Buffer object for userspace [12:27:03] [PASSED] Kernel buffer object [12:27:03] [PASSED] Shared buffer object [12:27:03] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ==== [12:27:03] [PASSED] ttm_bo_validate_move_fence_signaled [12:27:03] ========= ttm_bo_validate_move_fence_not_signaled ========= [12:27:03] [PASSED] Waits for GPU [12:27:03] [PASSED] Tries to lock straight away [12:27:04] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled ===== [12:27:04] [PASSED] ttm_bo_validate_swapout [12:27:04] [PASSED] ttm_bo_validate_happy_evict [12:27:04] [PASSED] ttm_bo_validate_all_pinned_evict [12:27:04] [PASSED] ttm_bo_validate_allowed_only_evict [12:27:04] [PASSED] ttm_bo_validate_deleted_evict [12:27:04] [PASSED] ttm_bo_validate_busy_domain_evict [12:27:04] [PASSED] ttm_bo_validate_evict_gutting [12:27:04] [PASSED] ttm_bo_validate_recrusive_evict stty: 'standard input': Inappropriate ioctl for device [12:27:04] ================= [PASSED] ttm_bo_validate ================= [12:27:04] ============================================================ [12:27:04] Testing complete. Ran 102 tests: passed: 102 [12:27:04] Elapsed time: 10.110s total, 1.665s configuring, 7.828s building, 0.536s running + cleanup ++ stat -c %u:%g /kernel + chown -R 1003:1003 /kernel ^ permalink raw reply [flat|nested] 10+ messages in thread
* ✓ Xe.CI.BAT: success for Cleaning up code related to VRAM regions and its initialization - part 2 (rev6) 2025-06-24 9:22 [PATCH v3 0/2] Cleaning up code related to VRAM regions and its initialization - part 2 Piórkowski, Piotr ` (2 preceding siblings ...) 2025-06-24 12:27 ` ✓ CI.KUnit: success for Cleaning up code related to VRAM regions and its initialization - part 2 (rev6) Patchwork @ 2025-06-24 13:28 ` Patchwork 2025-06-25 1:40 ` ✗ Xe.CI.Full: failure " Patchwork 4 siblings, 0 replies; 10+ messages in thread From: Patchwork @ 2025-06-24 13:28 UTC (permalink / raw) To: Piórkowski, Piotr; +Cc: intel-xe [-- Attachment #1: Type: text/plain, Size: 1033 bytes --] == Series Details == Series: Cleaning up code related to VRAM regions and its initialization - part 2 (rev6) URL : https://patchwork.freedesktop.org/series/149503/ State : success == Summary == CI Bug Log - changes from xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201_BAT -> xe-pw-149503v6_BAT ==================================================== Summary ------- **SUCCESS** No regressions found. Participating hosts (9 -> 8) ------------------------------ Missing (1): bat-adlp-vm Changes ------- No changes found Build changes ------------- * IGT: IGT_8423 -> IGT_8424 * Linux: xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201 -> xe-pw-149503v6 IGT_8423: 8423 IGT_8424: 68588b3c89a1bbe08c54d21c4d3d2e509957c795 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201: fb5dada21e3cfa26179ca58e1d7c26cdad217201 xe-pw-149503v6: 149503v6 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/index.html [-- Attachment #2: Type: text/html, Size: 1595 bytes --] ^ permalink raw reply [flat|nested] 10+ messages in thread
* ✗ Xe.CI.Full: failure for Cleaning up code related to VRAM regions and its initialization - part 2 (rev6) 2025-06-24 9:22 [PATCH v3 0/2] Cleaning up code related to VRAM regions and its initialization - part 2 Piórkowski, Piotr ` (3 preceding siblings ...) 2025-06-24 13:28 ` ✓ Xe.CI.BAT: " Patchwork @ 2025-06-25 1:40 ` Patchwork 4 siblings, 0 replies; 10+ messages in thread From: Patchwork @ 2025-06-25 1:40 UTC (permalink / raw) To: Piórkowski, Piotr; +Cc: intel-xe [-- Attachment #1: Type: text/plain, Size: 110888 bytes --] == Series Details == Series: Cleaning up code related to VRAM regions and its initialization - part 2 (rev6) URL : https://patchwork.freedesktop.org/series/149503/ State : failure == Summary == CI Bug Log - changes from xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201_FULL -> xe-pw-149503v6_FULL ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with xe-pw-149503v6_FULL absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in xe-pw-149503v6_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (4 -> 4) ------------------------------ No changes in participating hosts Possible new issues ------------------- Here are the unknown changes that may have been introduced in xe-pw-149503v6_FULL: ### IGT changes ### #### Possible regressions #### * igt@kms_big_fb@4-tiled-32bpp-rotate-180: - shard-dg2-set2: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-dg2-436/igt@kms_big_fb@4-tiled-32bpp-rotate-180.html [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-436/igt@kms_big_fb@4-tiled-32bpp-rotate-180.html #### Warnings #### * igt@xe_fault_injection@inject-fault-probe-function-xe_add_hw_engine_class_defaults: - shard-lnl: [ABORT][3] ([Intel XE#4757]) -> [ABORT][4] [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-lnl-5/igt@xe_fault_injection@inject-fault-probe-function-xe_add_hw_engine_class_defaults.html [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-2/igt@xe_fault_injection@inject-fault-probe-function-xe_add_hw_engine_class_defaults.html Known issues ------------ Here are the changes found in xe-pw-149503v6_FULL that come from known issues: ### IGT changes ### #### Issues hit #### * igt@core_hotunplug@hotreplug-lateclose: - shard-dg2-set2: [PASS][5] -> [INCOMPLETE][6] ([Intel XE#2594]) [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-dg2-432/igt@core_hotunplug@hotreplug-lateclose.html [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-435/igt@core_hotunplug@hotreplug-lateclose.html * igt@fbdev@read: - shard-adlp: [PASS][7] -> [SKIP][8] ([Intel XE#2134]) [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-1/igt@fbdev@read.html [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@fbdev@read.html * igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1: - shard-lnl: [PASS][9] -> [FAIL][10] ([Intel XE#911]) +7 other tests fail [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-lnl-4/igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1.html [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-7/igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1.html * igt@kms_async_flips@async-flip-with-page-flip-events-tiled-atomic@pipe-a-hdmi-a-6-4-rc-ccs-cc: - shard-dg2-set2: NOTRUN -> [SKIP][11] ([Intel XE#3767]) +31 other tests skip [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-433/igt@kms_async_flips@async-flip-with-page-flip-events-tiled-atomic@pipe-a-hdmi-a-6-4-rc-ccs-cc.html * igt@kms_async_flips@crc-atomic@pipe-d-hdmi-a-1: - shard-adlp: [PASS][12] -> [FAIL][13] ([Intel XE#3884]) +1 other test fail [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-6/igt@kms_async_flips@crc-atomic@pipe-d-hdmi-a-1.html [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-2/igt@kms_async_flips@crc-atomic@pipe-d-hdmi-a-1.html * igt@kms_atomic_transition@plane-all-modeset-transition-fencing: - shard-adlp: [PASS][14] -> [FAIL][15] ([Intel XE#3908]) +1 other test fail [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-8/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html * igt@kms_big_fb@4-tiled-8bpp-rotate-90: - shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#2327]) +4 other tests skip [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-8/igt@kms_big_fb@4-tiled-8bpp-rotate-90.html * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0: - shard-adlp: NOTRUN -> [SKIP][17] ([Intel XE#1124]) [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-1/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0.html * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip: - shard-lnl: NOTRUN -> [SKIP][18] ([Intel XE#1407]) +4 other tests skip [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-8/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html * igt@kms_big_fb@linear-8bpp-rotate-270: - shard-adlp: NOTRUN -> [SKIP][19] ([Intel XE#316]) [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-3/igt@kms_big_fb@linear-8bpp-rotate-270.html * igt@kms_big_fb@x-tiled-16bpp-rotate-270: - shard-dg2-set2: NOTRUN -> [SKIP][20] ([Intel XE#316]) +4 other tests skip [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-464/igt@kms_big_fb@x-tiled-16bpp-rotate-270.html * igt@kms_big_fb@y-tiled-addfb: - shard-bmg: NOTRUN -> [SKIP][21] ([Intel XE#2328]) [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-5/igt@kms_big_fb@y-tiled-addfb.html - shard-dg2-set2: NOTRUN -> [SKIP][22] ([Intel XE#619]) [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-464/igt@kms_big_fb@y-tiled-addfb.html - shard-lnl: NOTRUN -> [SKIP][23] ([Intel XE#1467]) [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-1/igt@kms_big_fb@y-tiled-addfb.html * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip: - shard-adlp: [PASS][24] -> [DMESG-FAIL][25] ([Intel XE#4543]) +10 other tests dmesg-fail [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-6/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-2/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip: - shard-bmg: NOTRUN -> [SKIP][26] ([Intel XE#1124]) +6 other tests skip [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-5/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip.html - shard-lnl: NOTRUN -> [SKIP][27] ([Intel XE#1124]) +4 other tests skip [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-1/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip.html * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip: - shard-dg2-set2: NOTRUN -> [SKIP][28] ([Intel XE#1124]) +12 other tests skip [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-464/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html * igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p: - shard-bmg: [PASS][29] -> [SKIP][30] ([Intel XE#2314] / [Intel XE#2894]) +1 other test skip [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-bmg-1/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-5/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html * igt@kms_bw@linear-tiling-1-displays-2560x1440p: - shard-dg2-set2: NOTRUN -> [SKIP][31] ([Intel XE#367]) [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-436/igt@kms_bw@linear-tiling-1-displays-2560x1440p.html * igt@kms_ccs@crc-primary-basic-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-1: - shard-adlp: NOTRUN -> [SKIP][32] ([Intel XE#787]) +8 other tests skip [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-4/igt@kms_ccs@crc-primary-basic-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-1.html * igt@kms_ccs@crc-primary-basic-4-tiled-dg2-rc-ccs-cc@pipe-d-hdmi-a-1: - shard-adlp: NOTRUN -> [SKIP][33] ([Intel XE#455] / [Intel XE#787]) +4 other tests skip [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-4/igt@kms_ccs@crc-primary-basic-4-tiled-dg2-rc-ccs-cc@pipe-d-hdmi-a-1.html * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-mc-ccs: - shard-lnl: NOTRUN -> [SKIP][34] ([Intel XE#2887]) +4 other tests skip [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-1/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-mc-ccs.html * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc: - shard-bmg: NOTRUN -> [SKIP][35] ([Intel XE#2887]) +9 other tests skip [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-6/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc.html * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs@pipe-b-dp-2: - shard-bmg: NOTRUN -> [SKIP][36] ([Intel XE#2652] / [Intel XE#787]) +7 other tests skip [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-1/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs@pipe-b-dp-2.html * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-2: - shard-dg2-set2: NOTRUN -> [SKIP][37] ([Intel XE#787]) +195 other tests skip [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-432/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-2.html * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-dp-4: - shard-dg2-set2: NOTRUN -> [INCOMPLETE][38] ([Intel XE#2705] / [Intel XE#4212]) [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-dp-4.html * igt@kms_ccs@random-ccs-data-y-tiled-ccs@pipe-d-dp-2: - shard-dg2-set2: NOTRUN -> [SKIP][39] ([Intel XE#455] / [Intel XE#787]) +38 other tests skip [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-432/igt@kms_ccs@random-ccs-data-y-tiled-ccs@pipe-d-dp-2.html * igt@kms_cdclk@mode-transition: - shard-bmg: NOTRUN -> [SKIP][40] ([Intel XE#2724]) [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-8/igt@kms_cdclk@mode-transition.html * igt@kms_cdclk@mode-transition@pipe-b-edp-1: - shard-lnl: NOTRUN -> [SKIP][41] ([Intel XE#4417]) +3 other tests skip [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-2/igt@kms_cdclk@mode-transition@pipe-b-edp-1.html * igt@kms_cdclk@mode-transition@pipe-d-dp-4: - shard-dg2-set2: NOTRUN -> [SKIP][42] ([Intel XE#4417]) +3 other tests skip [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-435/igt@kms_cdclk@mode-transition@pipe-d-dp-4.html * igt@kms_chamelium_color@ctm-0-25: - shard-bmg: NOTRUN -> [SKIP][43] ([Intel XE#2325]) +1 other test skip [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-5/igt@kms_chamelium_color@ctm-0-25.html * igt@kms_chamelium_color@gamma: - shard-dg2-set2: NOTRUN -> [SKIP][44] ([Intel XE#306]) +2 other tests skip [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-464/igt@kms_chamelium_color@gamma.html - shard-lnl: NOTRUN -> [SKIP][45] ([Intel XE#306]) +1 other test skip [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-8/igt@kms_chamelium_color@gamma.html - shard-adlp: NOTRUN -> [SKIP][46] ([Intel XE#306]) [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-3/igt@kms_chamelium_color@gamma.html * igt@kms_chamelium_hpd@hdmi-hpd-storm-disable: - shard-bmg: NOTRUN -> [SKIP][47] ([Intel XE#2252]) +3 other tests skip [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-8/igt@kms_chamelium_hpd@hdmi-hpd-storm-disable.html * igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode: - shard-dg2-set2: NOTRUN -> [SKIP][48] ([Intel XE#373]) +8 other tests skip [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-464/igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode.html - shard-lnl: NOTRUN -> [SKIP][49] ([Intel XE#373]) +1 other test skip [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-1/igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode.html - shard-adlp: NOTRUN -> [SKIP][50] ([Intel XE#373]) [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-2/igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode.html * igt@kms_content_protection@atomic: - shard-bmg: NOTRUN -> [SKIP][51] ([Intel XE#2341]) [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-5/igt@kms_content_protection@atomic.html - shard-dg2-set2: NOTRUN -> [FAIL][52] ([Intel XE#1178]) +2 other tests fail [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-433/igt@kms_content_protection@atomic.html * igt@kms_content_protection@dp-mst-lic-type-0: - shard-dg2-set2: NOTRUN -> [SKIP][53] ([Intel XE#307]) +1 other test skip [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-464/igt@kms_content_protection@dp-mst-lic-type-0.html - shard-lnl: NOTRUN -> [SKIP][54] ([Intel XE#307]) +1 other test skip [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-1/igt@kms_content_protection@dp-mst-lic-type-0.html - shard-adlp: NOTRUN -> [SKIP][55] ([Intel XE#307]) [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-2/igt@kms_content_protection@dp-mst-lic-type-0.html * igt@kms_content_protection@dp-mst-lic-type-1: - shard-bmg: NOTRUN -> [SKIP][56] ([Intel XE#2390]) +1 other test skip [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-1/igt@kms_content_protection@dp-mst-lic-type-1.html * igt@kms_content_protection@uevent: - shard-dg2-set2: NOTRUN -> [FAIL][57] ([Intel XE#1188]) +1 other test fail [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-432/igt@kms_content_protection@uevent.html * igt@kms_cursor_crc@cursor-offscreen-512x170: - shard-dg2-set2: NOTRUN -> [SKIP][58] ([Intel XE#308]) [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-432/igt@kms_cursor_crc@cursor-offscreen-512x170.html - shard-bmg: NOTRUN -> [SKIP][59] ([Intel XE#2321]) [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-5/igt@kms_cursor_crc@cursor-offscreen-512x170.html * igt@kms_cursor_crc@cursor-rapid-movement-64x64: - shard-adlp: [PASS][60] -> [SKIP][61] ([Intel XE#4950]) +10 other tests skip [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-3/igt@kms_cursor_crc@cursor-rapid-movement-64x64.html [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_cursor_crc@cursor-rapid-movement-64x64.html * igt@kms_cursor_crc@cursor-sliding-128x42: - shard-lnl: NOTRUN -> [SKIP][62] ([Intel XE#1424]) +1 other test skip [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-7/igt@kms_cursor_crc@cursor-sliding-128x42.html - shard-bmg: NOTRUN -> [SKIP][63] ([Intel XE#2320]) +1 other test skip [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-6/igt@kms_cursor_crc@cursor-sliding-128x42.html * igt@kms_cursor_crc@cursor-suspend@pipe-a-hdmi-a-1: - shard-adlp: [PASS][64] -> [DMESG-WARN][65] ([Intel XE#2953] / [Intel XE#4173]) +3 other tests dmesg-warn [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-6/igt@kms_cursor_crc@cursor-suspend@pipe-a-hdmi-a-1.html [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_cursor_crc@cursor-suspend@pipe-a-hdmi-a-1.html * igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy: - shard-bmg: [PASS][66] -> [SKIP][67] ([Intel XE#2291]) +4 other tests skip [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-bmg-3/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-6/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html * igt@kms_cursor_legacy@cursorb-vs-flipa-legacy: - shard-bmg: NOTRUN -> [SKIP][68] ([Intel XE#2291]) +1 other test skip [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size: - shard-lnl: NOTRUN -> [SKIP][69] ([Intel XE#309]) +2 other tests skip [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-7/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions: - shard-dg2-set2: NOTRUN -> [SKIP][70] ([Intel XE#323]) [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-436/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area: - shard-adlp: NOTRUN -> [SKIP][71] ([Intel XE#4422]) [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-3/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area.html - shard-bmg: NOTRUN -> [SKIP][72] ([Intel XE#4422]) [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-1/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area.html - shard-dg2-set2: NOTRUN -> [SKIP][73] ([Intel XE#4422]) [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-433/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area.html - shard-lnl: NOTRUN -> [SKIP][74] ([Intel XE#4422]) [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-8/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area.html * igt@kms_fbcon_fbt@psr: - shard-bmg: NOTRUN -> [SKIP][75] ([Intel XE#776]) [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-5/igt@kms_fbcon_fbt@psr.html * igt@kms_fbcon_fbt@psr-suspend: - shard-dg2-set2: NOTRUN -> [SKIP][76] ([Intel XE#776]) [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-433/igt@kms_fbcon_fbt@psr-suspend.html * igt@kms_flip@2x-busy-flip: - shard-bmg: NOTRUN -> [SKIP][77] ([Intel XE#2316]) [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-5/igt@kms_flip@2x-busy-flip.html * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@cd-hdmi-a6-dp4: - shard-dg2-set2: [PASS][78] -> [FAIL][79] ([Intel XE#301]) +1 other test fail [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-dg2-464/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@cd-hdmi-a6-dp4.html [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-433/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@cd-hdmi-a6-dp4.html * igt@kms_flip@2x-modeset-vs-vblank-race-interruptible: - shard-adlp: NOTRUN -> [SKIP][80] ([Intel XE#310]) [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-9/igt@kms_flip@2x-modeset-vs-vblank-race-interruptible.html * igt@kms_flip@2x-nonexisting-fb: - shard-bmg: [PASS][81] -> [SKIP][82] ([Intel XE#2316]) +11 other tests skip [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-bmg-8/igt@kms_flip@2x-nonexisting-fb.html [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-5/igt@kms_flip@2x-nonexisting-fb.html * igt@kms_flip@2x-plain-flip: - shard-lnl: NOTRUN -> [SKIP][83] ([Intel XE#1421]) +3 other tests skip [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-1/igt@kms_flip@2x-plain-flip.html * igt@kms_flip@dpms-vs-vblank-race-interruptible@a-hdmi-a6: - shard-dg2-set2: [PASS][84] -> [FAIL][85] ([Intel XE#3098]) +1 other test fail [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-dg2-434/igt@kms_flip@dpms-vs-vblank-race-interruptible@a-hdmi-a6.html [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-433/igt@kms_flip@dpms-vs-vblank-race-interruptible@a-hdmi-a6.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a6: - shard-dg2-set2: NOTRUN -> [FAIL][86] ([Intel XE#301]) +5 other tests fail [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-433/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a6.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1: - shard-lnl: NOTRUN -> [FAIL][87] ([Intel XE#301]) +3 other tests fail [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html * igt@kms_flip@flip-vs-expired-vblank@c-dp4: - shard-dg2-set2: [PASS][88] -> [FAIL][89] ([Intel XE#301] / [Intel XE#3321]) [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-dg2-436/igt@kms_flip@flip-vs-expired-vblank@c-dp4.html [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-436/igt@kms_flip@flip-vs-expired-vblank@c-dp4.html * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling@pipe-a-valid-mode: - shard-dg2-set2: NOTRUN -> [SKIP][90] ([Intel XE#455]) +11 other tests skip [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-434/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling@pipe-a-valid-mode.html * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling: - shard-bmg: NOTRUN -> [SKIP][91] ([Intel XE#2293] / [Intel XE#2380]) [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-8/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html - shard-lnl: NOTRUN -> [SKIP][92] ([Intel XE#1401] / [Intel XE#1745]) +1 other test skip [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-2/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode: - shard-bmg: NOTRUN -> [SKIP][93] ([Intel XE#2293]) [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-8/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode.html * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode: - shard-adlp: [PASS][94] -> [DMESG-FAIL][95] ([Intel XE#4543] / [Intel XE#4921]) +1 other test dmesg-fail [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-3/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode.html [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-4/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode.html * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling@pipe-a-default-mode: - shard-lnl: NOTRUN -> [SKIP][96] ([Intel XE#1401]) +1 other test skip [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-8/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling@pipe-a-default-mode.html * igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-x-to-y: - shard-adlp: [PASS][97] -> [FAIL][98] ([Intel XE#1874]) [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-x-to-y.html [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-2/igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-x-to-y.html * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-render: - shard-bmg: NOTRUN -> [SKIP][99] ([Intel XE#2311]) +11 other tests skip [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-render.html * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-shrfb-plflip-blt: - shard-lnl: NOTRUN -> [SKIP][100] ([Intel XE#656]) +15 other tests skip [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-6/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-shrfb-plflip-blt.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt: - shard-bmg: NOTRUN -> [SKIP][101] ([Intel XE#4141]) +7 other tests skip [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt: - shard-bmg: NOTRUN -> [SKIP][102] ([Intel XE#2312]) +12 other tests skip [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt.html * igt@kms_frontbuffer_tracking@fbc-modesetfrombusy: - shard-adlp: [PASS][103] -> [SKIP][104] ([Intel XE#4947]) [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@kms_frontbuffer_tracking@fbc-modesetfrombusy.html [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_frontbuffer_tracking@fbc-modesetfrombusy.html * igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-mmap-wc: - shard-dg2-set2: NOTRUN -> [SKIP][105] ([Intel XE#651]) +24 other tests skip [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-435/igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-mmap-wc.html - shard-lnl: NOTRUN -> [SKIP][106] ([Intel XE#651]) +1 other test skip [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-1/igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt: - shard-bmg: NOTRUN -> [SKIP][107] ([Intel XE#2313]) +11 other tests skip [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-blt: - shard-adlp: NOTRUN -> [SKIP][108] ([Intel XE#656]) +3 other tests skip [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-blt: - shard-dg2-set2: NOTRUN -> [SKIP][109] ([Intel XE#653]) +20 other tests skip [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-463/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-blt: - shard-adlp: NOTRUN -> [SKIP][110] ([Intel XE#653]) [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-blt.html * igt@kms_hdr@brightness-with-hdr: - shard-lnl: NOTRUN -> [SKIP][111] ([Intel XE#3374] / [Intel XE#3544]) [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-3/igt@kms_hdr@brightness-with-hdr.html - shard-bmg: NOTRUN -> [SKIP][112] ([Intel XE#3374] / [Intel XE#3544]) [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-3/igt@kms_hdr@brightness-with-hdr.html * igt@kms_hdr@invalid-hdr: - shard-dg2-set2: [PASS][113] -> [SKIP][114] ([Intel XE#455]) [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-dg2-463/igt@kms_hdr@invalid-hdr.html [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-432/igt@kms_hdr@invalid-hdr.html * igt@kms_multipipe_modeset@basic-max-pipe-crc-check: - shard-bmg: NOTRUN -> [SKIP][115] ([Intel XE#2501]) [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-8/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html - shard-dg2-set2: NOTRUN -> [SKIP][116] ([Intel XE#356]) [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-434/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html * igt@kms_pipe_stress@stress-xrgb8888-ytiled: - shard-bmg: NOTRUN -> [SKIP][117] ([Intel XE#4329]) [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-8/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html - shard-dg2-set2: NOTRUN -> [SKIP][118] ([Intel XE#4359]) [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-434/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html * igt@kms_plane_multiple@2x-tiling-4: - shard-bmg: [PASS][119] -> [SKIP][120] ([Intel XE#4596]) +1 other test skip [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-bmg-1/igt@kms_plane_multiple@2x-tiling-4.html [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-4.html * igt@kms_plane_multiple@tiling-y: - shard-bmg: NOTRUN -> [SKIP][121] ([Intel XE#5020]) [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-8/igt@kms_plane_multiple@tiling-y.html * igt@kms_pm_backlight@fade-with-suspend: - shard-dg2-set2: NOTRUN -> [SKIP][122] ([Intel XE#870]) [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-464/igt@kms_pm_backlight@fade-with-suspend.html * igt@kms_pm_dc@dc6-dpms: - shard-dg2-set2: NOTRUN -> [SKIP][123] ([Intel XE#908]) +1 other test skip [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-433/igt@kms_pm_dc@dc6-dpms.html * igt@kms_pm_dc@dc6-psr: - shard-lnl: [PASS][124] -> [FAIL][125] ([Intel XE#718]) +1 other test fail [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-lnl-4/igt@kms_pm_dc@dc6-psr.html [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-6/igt@kms_pm_dc@dc6-psr.html * igt@kms_pm_rpm@modeset-non-lpsp: - shard-lnl: NOTRUN -> [SKIP][126] ([Intel XE#1439] / [Intel XE#3141]) [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-4/igt@kms_pm_rpm@modeset-non-lpsp.html - shard-adlp: NOTRUN -> [SKIP][127] ([Intel XE#836]) [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-9/igt@kms_pm_rpm@modeset-non-lpsp.html * igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area: - shard-lnl: NOTRUN -> [SKIP][128] ([Intel XE#2893] / [Intel XE#4608]) [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-7/igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area.html * igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area@pipe-b-edp-1: - shard-lnl: NOTRUN -> [SKIP][129] ([Intel XE#4608]) +1 other test skip [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-7/igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area@pipe-b-edp-1.html * igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf: - shard-lnl: NOTRUN -> [SKIP][130] ([Intel XE#2893]) [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-8/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf.html * igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf: - shard-bmg: NOTRUN -> [SKIP][131] ([Intel XE#1489]) +5 other tests skip [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-1/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf.html * igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-sf: - shard-adlp: NOTRUN -> [SKIP][132] ([Intel XE#1489]) [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-sf.html * igt@kms_psr2_sf@psr2-overlay-primary-update-sf-dmg-area: - shard-dg2-set2: NOTRUN -> [SKIP][133] ([Intel XE#1489]) +9 other tests skip [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-435/igt@kms_psr2_sf@psr2-overlay-primary-update-sf-dmg-area.html * igt@kms_psr@fbc-psr2-primary-render: - shard-lnl: NOTRUN -> [SKIP][134] ([Intel XE#1406]) [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-6/igt@kms_psr@fbc-psr2-primary-render.html - shard-bmg: NOTRUN -> [SKIP][135] ([Intel XE#2234] / [Intel XE#2850]) +1 other test skip [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-3/igt@kms_psr@fbc-psr2-primary-render.html * igt@kms_psr@fbc-psr2-primary-render@edp-1: - shard-lnl: NOTRUN -> [SKIP][136] ([Intel XE#4609]) [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-6/igt@kms_psr@fbc-psr2-primary-render@edp-1.html * igt@kms_psr@fbc-psr2-sprite-plane-move: - shard-dg2-set2: NOTRUN -> [SKIP][137] ([Intel XE#2850] / [Intel XE#929]) +4 other tests skip [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-432/igt@kms_psr@fbc-psr2-sprite-plane-move.html * igt@kms_rotation_crc@primary-x-tiled-reflect-x-0: - shard-lnl: NOTRUN -> [FAIL][138] ([Intel XE#4689]) [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-5/igt@kms_rotation_crc@primary-x-tiled-reflect-x-0.html * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0: - shard-lnl: NOTRUN -> [SKIP][139] ([Intel XE#1127]) [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-8/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html - shard-bmg: NOTRUN -> [SKIP][140] ([Intel XE#2330]) [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-1/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html - shard-dg2-set2: NOTRUN -> [SKIP][141] ([Intel XE#1127]) [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-433/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html * igt@kms_setmode@basic@pipe-b-edp-1: - shard-lnl: [PASS][142] -> [FAIL][143] ([Intel XE#2883]) +2 other tests fail [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-lnl-7/igt@kms_setmode@basic@pipe-b-edp-1.html [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-1/igt@kms_setmode@basic@pipe-b-edp-1.html * igt@kms_setmode@clone-exclusive-crtc: - shard-bmg: NOTRUN -> [SKIP][144] ([Intel XE#1435]) [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-5/igt@kms_setmode@clone-exclusive-crtc.html * igt@kms_tiled_display@basic-test-pattern: - shard-bmg: NOTRUN -> [FAIL][145] ([Intel XE#1729]) [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern.html - shard-dg2-set2: NOTRUN -> [FAIL][146] ([Intel XE#1729]) [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-434/igt@kms_tiled_display@basic-test-pattern.html - shard-lnl: NOTRUN -> [SKIP][147] ([Intel XE#362]) [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-7/igt@kms_tiled_display@basic-test-pattern.html * igt@kms_vrr@flip-basic: - shard-bmg: NOTRUN -> [SKIP][148] ([Intel XE#1499]) [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-6/igt@kms_vrr@flip-basic.html * igt@kms_vrr@negative-basic: - shard-bmg: [PASS][149] -> [SKIP][150] ([Intel XE#1499]) [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-bmg-1/igt@kms_vrr@negative-basic.html [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-6/igt@kms_vrr@negative-basic.html * igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all: - shard-dg2-set2: NOTRUN -> [SKIP][151] ([Intel XE#1091] / [Intel XE#2849]) [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-433/igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all.html - shard-lnl: NOTRUN -> [SKIP][152] ([Intel XE#1091] / [Intel XE#2849]) [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-5/igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all.html - shard-bmg: NOTRUN -> [SKIP][153] ([Intel XE#1091] / [Intel XE#2849]) [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-6/igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all.html * igt@xe_copy_basic@mem-copy-linear-0xfd: - shard-adlp: NOTRUN -> [SKIP][154] ([Intel XE#1123]) [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-3/igt@xe_copy_basic@mem-copy-linear-0xfd.html - shard-dg2-set2: NOTRUN -> [SKIP][155] ([Intel XE#1123]) [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-464/igt@xe_copy_basic@mem-copy-linear-0xfd.html * igt@xe_eu_stall@blocking-read: - shard-adlp: NOTRUN -> [SKIP][156] ([Intel XE#5308]) [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-4/igt@xe_eu_stall@blocking-read.html - shard-dg2-set2: NOTRUN -> [SKIP][157] ([Intel XE#5308]) [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-434/igt@xe_eu_stall@blocking-read.html * igt@xe_eudebug@discovery-race-vmbind: - shard-adlp: NOTRUN -> [SKIP][158] ([Intel XE#4837]) +1 other test skip [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@xe_eudebug@discovery-race-vmbind.html * igt@xe_eudebug_online@reset-with-attention: - shard-lnl: NOTRUN -> [SKIP][159] ([Intel XE#4837]) +3 other tests skip [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-2/igt@xe_eudebug_online@reset-with-attention.html * igt@xe_eudebug_online@stopped-thread: - shard-bmg: NOTRUN -> [SKIP][160] ([Intel XE#4837]) +6 other tests skip [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-3/igt@xe_eudebug_online@stopped-thread.html * igt@xe_evict@evict-small-multi-vm: - shard-lnl: NOTRUN -> [SKIP][161] ([Intel XE#688]) [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-2/igt@xe_evict@evict-small-multi-vm.html * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr: - shard-dg2-set2: NOTRUN -> [SKIP][162] ([Intel XE#1392]) [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-432/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr.html * igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-rebind: - shard-lnl: NOTRUN -> [SKIP][163] ([Intel XE#1392]) +1 other test skip [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-3/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-rebind.html * igt@xe_exec_basic@multigpu-no-exec-null-defer-mmap: - shard-dg2-set2: [PASS][164] -> [SKIP][165] ([Intel XE#1392]) +6 other tests skip [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-dg2-436/igt@xe_exec_basic@multigpu-no-exec-null-defer-mmap.html [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-null-defer-mmap.html * igt@xe_exec_basic@multigpu-no-exec-null-rebind: - shard-adlp: NOTRUN -> [SKIP][166] ([Intel XE#1392]) [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@xe_exec_basic@multigpu-no-exec-null-rebind.html * igt@xe_exec_basic@multigpu-once-bindexecqueue-rebind: - shard-bmg: NOTRUN -> [SKIP][167] ([Intel XE#2322]) +4 other tests skip [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-3/igt@xe_exec_basic@multigpu-once-bindexecqueue-rebind.html * igt@xe_exec_fault_mode@many-bindexecqueue-userptr-rebind-imm: - shard-dg2-set2: NOTRUN -> [SKIP][168] ([Intel XE#288]) +24 other tests skip [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-433/igt@xe_exec_fault_mode@many-bindexecqueue-userptr-rebind-imm.html * igt@xe_exec_fault_mode@once-invalid-fault: - shard-adlp: NOTRUN -> [SKIP][169] ([Intel XE#288]) +1 other test skip [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-4/igt@xe_exec_fault_mode@once-invalid-fault.html * igt@xe_exec_mix_modes@exec-simple-batch-store-lr: - shard-dg2-set2: NOTRUN -> [SKIP][170] ([Intel XE#2360]) [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-464/igt@xe_exec_mix_modes@exec-simple-batch-store-lr.html * igt@xe_exec_reset@parallel-gt-reset: - shard-dg2-set2: [PASS][171] -> [DMESG-WARN][172] ([Intel XE#3876]) [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-dg2-434/igt@xe_exec_reset@parallel-gt-reset.html [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-435/igt@xe_exec_reset@parallel-gt-reset.html * igt@xe_exec_sip_eudebug@wait-writesip-nodebug: - shard-dg2-set2: NOTRUN -> [SKIP][173] ([Intel XE#4837]) +11 other tests skip [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-433/igt@xe_exec_sip_eudebug@wait-writesip-nodebug.html * igt@xe_exec_system_allocator@threads-many-large-execqueues-mmap-huge: - shard-lnl: NOTRUN -> [SKIP][174] ([Intel XE#4943]) +10 other tests skip [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-8/igt@xe_exec_system_allocator@threads-many-large-execqueues-mmap-huge.html * igt@xe_exec_system_allocator@threads-many-large-mmap-mlock: - shard-dg2-set2: NOTRUN -> [SKIP][175] ([Intel XE#4915]) +229 other tests skip [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-432/igt@xe_exec_system_allocator@threads-many-large-mmap-mlock.html * igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-mmap-new-huge-nomemset: - shard-adlp: NOTRUN -> [SKIP][176] ([Intel XE#4915]) +23 other tests skip [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-9/igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-mmap-new-huge-nomemset.html * igt@xe_exec_system_allocator@threads-shared-vm-many-stride-mmap-free-huge: - shard-bmg: NOTRUN -> [SKIP][177] ([Intel XE#4943]) +17 other tests skip [177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-1/igt@xe_exec_system_allocator@threads-shared-vm-many-stride-mmap-free-huge.html * igt@xe_exec_threads@threads-mixed-fd-userptr-invalidate: - shard-adlp: [PASS][178] -> [SKIP][179] ([Intel XE#4945]) +29 other tests skip [178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@xe_exec_threads@threads-mixed-fd-userptr-invalidate.html [179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@xe_exec_threads@threads-mixed-fd-userptr-invalidate.html * igt@xe_mmap@pci-membarrier-bad-pagesize: - shard-lnl: NOTRUN -> [SKIP][180] ([Intel XE#5100]) [180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-3/igt@xe_mmap@pci-membarrier-bad-pagesize.html * igt@xe_mmap@small-bar: - shard-dg2-set2: NOTRUN -> [SKIP][181] ([Intel XE#512]) [181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-435/igt@xe_mmap@small-bar.html * igt@xe_module_load@many-reload: - shard-bmg: [PASS][182] -> [DMESG-WARN][183] ([Intel XE#5244]) [182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-bmg-1/igt@xe_module_load@many-reload.html [183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-3/igt@xe_module_load@many-reload.html * igt@xe_oa@whitelisted-registers-userspace-config: - shard-dg2-set2: NOTRUN -> [SKIP][184] ([Intel XE#2541] / [Intel XE#3573]) +5 other tests skip [184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-464/igt@xe_oa@whitelisted-registers-userspace-config.html - shard-adlp: NOTRUN -> [SKIP][185] ([Intel XE#2541] / [Intel XE#3573]) [185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-3/igt@xe_oa@whitelisted-registers-userspace-config.html * igt@xe_pat@pat-index-xehpc: - shard-dg2-set2: NOTRUN -> [SKIP][186] ([Intel XE#2838] / [Intel XE#979]) [186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-434/igt@xe_pat@pat-index-xehpc.html * igt@xe_pm@d3cold-basic: - shard-dg2-set2: NOTRUN -> [SKIP][187] ([Intel XE#2284] / [Intel XE#366]) [187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-432/igt@xe_pm@d3cold-basic.html * igt@xe_pm@s3-vm-bind-unbind-all: - shard-lnl: NOTRUN -> [SKIP][188] ([Intel XE#584]) +2 other tests skip [188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-4/igt@xe_pm@s3-vm-bind-unbind-all.html * igt@xe_pxp@pxp-stale-bo-bind-post-rpm: - shard-dg2-set2: NOTRUN -> [SKIP][189] ([Intel XE#4733]) +3 other tests skip [189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-434/igt@xe_pxp@pxp-stale-bo-bind-post-rpm.html - shard-adlp: NOTRUN -> [SKIP][190] ([Intel XE#4733]) [190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-1/igt@xe_pxp@pxp-stale-bo-bind-post-rpm.html * igt@xe_pxp@pxp-termination-key-update-post-termination-irq: - shard-bmg: NOTRUN -> [SKIP][191] ([Intel XE#4733]) +1 other test skip [191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-5/igt@xe_pxp@pxp-termination-key-update-post-termination-irq.html * igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz: - shard-dg2-set2: NOTRUN -> [SKIP][192] ([Intel XE#944]) [192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-435/igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz.html * igt@xe_query@multigpu-query-mem-usage: - shard-lnl: NOTRUN -> [SKIP][193] ([Intel XE#944]) [193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-8/igt@xe_query@multigpu-query-mem-usage.html * igt@xe_render_copy@render-stress-2-copies: - shard-dg2-set2: NOTRUN -> [SKIP][194] ([Intel XE#4814]) [194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-433/igt@xe_render_copy@render-stress-2-copies.html * igt@xe_sriov_auto_provisioning@resources-released-on-vfs-disabling: - shard-dg2-set2: NOTRUN -> [SKIP][195] ([Intel XE#4130]) [195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-432/igt@xe_sriov_auto_provisioning@resources-released-on-vfs-disabling.html * igt@xe_sriov_scheduling@nonpreempt-engine-resets: - shard-dg2-set2: NOTRUN -> [SKIP][196] ([Intel XE#4351]) [196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-464/igt@xe_sriov_scheduling@nonpreempt-engine-resets.html #### Possible fixes #### * igt@intel_hwmon@hwmon-write: - shard-bmg: [FAIL][197] ([Intel XE#4665]) -> [PASS][198] [197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-bmg-1/igt@intel_hwmon@hwmon-write.html [198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-1/igt@intel_hwmon@hwmon-write.html * igt@kms_big_fb@x-tiled-8bpp-rotate-0: - shard-adlp: [SKIP][199] ([Intel XE#4947]) -> [PASS][200] +2 other tests pass [199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@kms_big_fb@x-tiled-8bpp-rotate-0.html [200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-4/igt@kms_big_fb@x-tiled-8bpp-rotate-0.html * igt@kms_big_fb@x-tiled-addfb-size-offset-overflow: - shard-dg2-set2: [SKIP][201] ([Intel XE#2351] / [Intel XE#4208]) -> [PASS][202] [201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-dg2-436/igt@kms_big_fb@x-tiled-addfb-size-offset-overflow.html [202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-464/igt@kms_big_fb@x-tiled-addfb-size-offset-overflow.html * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip: - shard-adlp: [DMESG-FAIL][203] ([Intel XE#4543]) -> [PASS][204] +5 other tests pass [203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-1/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip.html [204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip.html * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-dp-4: - shard-dg2-set2: [INCOMPLETE][205] ([Intel XE#3124]) -> [PASS][206] [205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-dp-4.html [206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-dp-4.html * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-6: - shard-dg2-set2: [DMESG-WARN][207] ([Intel XE#1727] / [Intel XE#3113]) -> [PASS][208] [207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-6.html [208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-6.html * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size: - shard-bmg: [SKIP][209] ([Intel XE#2291]) -> [PASS][210] +4 other tests pass [209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-bmg-5/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html [210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-8/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html * igt@kms_dither@fb-8bpc-vs-panel-6bpc: - shard-bmg: [SKIP][211] ([Intel XE#1340]) -> [PASS][212] [211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-bmg-6/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html [212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-1/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html * igt@kms_dp_link_training@non-uhbr-sst: - shard-bmg: [SKIP][213] ([Intel XE#4354]) -> [PASS][214] [213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-bmg-5/igt@kms_dp_link_training@non-uhbr-sst.html [214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-3/igt@kms_dp_link_training@non-uhbr-sst.html * igt@kms_dp_linktrain_fallback@dp-fallback: - shard-bmg: [SKIP][215] ([Intel XE#4294]) -> [PASS][216] [215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-bmg-5/igt@kms_dp_linktrain_fallback@dp-fallback.html [216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-3/igt@kms_dp_linktrain_fallback@dp-fallback.html * igt@kms_flip@2x-flip-vs-dpms-on-nop: - shard-bmg: [SKIP][217] ([Intel XE#2316]) -> [PASS][218] +7 other tests pass [217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-bmg-6/igt@kms_flip@2x-flip-vs-dpms-on-nop.html [218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-8/igt@kms_flip@2x-flip-vs-dpms-on-nop.html * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a6-dp4: - shard-dg2-set2: [FAIL][219] ([Intel XE#301] / [Intel XE#3321]) -> [PASS][220] +2 other tests pass [219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-dg2-464/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a6-dp4.html [220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-433/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a6-dp4.html * igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a6: - shard-dg2-set2: [FAIL][221] ([Intel XE#301]) -> [PASS][222] [221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-dg2-436/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a6.html [222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-436/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a6.html * igt@kms_flip@flip-vs-suspend: - shard-bmg: [INCOMPLETE][223] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][224] +1 other test pass [223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-bmg-1/igt@kms_flip@flip-vs-suspend.html [224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-3/igt@kms_flip@flip-vs-suspend.html * igt@kms_flip@flip-vs-suspend-interruptible: - shard-adlp: [DMESG-WARN][225] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][226] +5 other tests pass [225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-1/igt@kms_flip@flip-vs-suspend-interruptible.html [226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-1/igt@kms_flip@flip-vs-suspend-interruptible.html * igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-valid-mode: - shard-adlp: [DMESG-FAIL][227] ([Intel XE#4543] / [Intel XE#4921]) -> [PASS][228] +3 other tests pass [227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-8/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-valid-mode.html [228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-4/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-valid-mode.html * igt@kms_hdr@static-swap: - shard-bmg: [SKIP][229] ([Intel XE#1503]) -> [PASS][230] +1 other test pass [229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-bmg-6/igt@kms_hdr@static-swap.html [230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-8/igt@kms_hdr@static-swap.html * igt@kms_plane_cursor@overlay@pipe-a-hdmi-a-6-size-64: - shard-dg2-set2: [FAIL][231] ([Intel XE#616]) -> [PASS][232] +1 other test pass [231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-dg2-463/igt@kms_plane_cursor@overlay@pipe-a-hdmi-a-6-size-64.html [232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-433/igt@kms_plane_cursor@overlay@pipe-a-hdmi-a-6-size-64.html * igt@kms_plane_multiple@tiling-none: - shard-dg2-set2: [INCOMPLETE][233] -> [PASS][234] +2 other tests pass [233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-dg2-432/igt@kms_plane_multiple@tiling-none.html [234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-433/igt@kms_plane_multiple@tiling-none.html * igt@kms_plane_scaling@plane-scaler-unity-scaling-with-rotation: - shard-adlp: [SKIP][235] ([Intel XE#4950]) -> [PASS][236] +9 other tests pass [235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@kms_plane_scaling@plane-scaler-unity-scaling-with-rotation.html [236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-4/igt@kms_plane_scaling@plane-scaler-unity-scaling-with-rotation.html * igt@kms_pm_dc@dc5-psr: - shard-lnl: [FAIL][237] ([Intel XE#718]) -> [PASS][238] [237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-lnl-8/igt@kms_pm_dc@dc5-psr.html [238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-4/igt@kms_pm_dc@dc5-psr.html * igt@kms_pm_rpm@drm-resources-equal: - shard-adlp: [SKIP][239] ([Intel XE#4962]) -> [PASS][240] [239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@kms_pm_rpm@drm-resources-equal.html [240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-9/igt@kms_pm_rpm@drm-resources-equal.html * igt@kms_prop_blob@invalid-set-prop-any: - shard-dg2-set2: [SKIP][241] ([Intel XE#4208] / [i915#2575]) -> [PASS][242] +6 other tests pass [241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-dg2-436/igt@kms_prop_blob@invalid-set-prop-any.html [242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-432/igt@kms_prop_blob@invalid-set-prop-any.html * igt@kms_vrr@cmrr@pipe-a-edp-1: - shard-lnl: [FAIL][243] ([Intel XE#4459]) -> [PASS][244] +1 other test pass [243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-lnl-2/igt@kms_vrr@cmrr@pipe-a-edp-1.html [244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-4/igt@kms_vrr@cmrr@pipe-a-edp-1.html * igt@kms_vrr@max-min: - shard-lnl: [FAIL][245] ([Intel XE#4227]) -> [PASS][246] +1 other test pass [245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-lnl-2/igt@kms_vrr@max-min.html [246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-lnl-3/igt@kms_vrr@max-min.html * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr: - shard-dg2-set2: [SKIP][247] ([Intel XE#1392]) -> [PASS][248] +5 other tests pass [247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-dg2-432/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr.html [248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-463/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr.html * igt@xe_exec_compute_mode@once-basic: - shard-dg2-set2: [SKIP][249] ([Intel XE#4208]) -> [PASS][250] +5 other tests pass [249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-dg2-436/igt@xe_exec_compute_mode@once-basic.html [250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-434/igt@xe_exec_compute_mode@once-basic.html * igt@xe_exec_threads@threads-bal-rebind: - shard-adlp: [SKIP][251] ([Intel XE#4945]) -> [PASS][252] +10 other tests pass [251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@xe_exec_threads@threads-bal-rebind.html [252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-9/igt@xe_exec_threads@threads-bal-rebind.html * igt@xe_live_ktest@xe_dma_buf: - shard-adlp: [FAIL][253] ([Intel XE#3099]) -> [PASS][254] +1 other test pass [253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@xe_live_ktest@xe_dma_buf.html [254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-9/igt@xe_live_ktest@xe_dma_buf.html #### Warnings #### * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels: - shard-adlp: [SKIP][255] ([Intel XE#455]) -> [SKIP][256] ([Intel XE#4950]) [255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-6/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html [256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html * igt@kms_big_fb@4-tiled-8bpp-rotate-90: - shard-adlp: [SKIP][257] ([Intel XE#4947]) -> [SKIP][258] ([Intel XE#1124]) +1 other test skip [257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@kms_big_fb@4-tiled-8bpp-rotate-90.html [258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-4/igt@kms_big_fb@4-tiled-8bpp-rotate-90.html * igt@kms_big_fb@linear-16bpp-rotate-270: - shard-dg2-set2: [SKIP][259] ([Intel XE#4208]) -> [SKIP][260] ([Intel XE#316]) [259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-dg2-436/igt@kms_big_fb@linear-16bpp-rotate-270.html [260]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-432/igt@kms_big_fb@linear-16bpp-rotate-270.html - shard-adlp: [SKIP][261] ([Intel XE#4947]) -> [SKIP][262] ([Intel XE#316]) [261]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@kms_big_fb@linear-16bpp-rotate-270.html [262]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-2/igt@kms_big_fb@linear-16bpp-rotate-270.html * igt@kms_big_fb@y-tiled-8bpp-rotate-180: - shard-adlp: [SKIP][263] ([Intel XE#4947]) -> [DMESG-FAIL][264] ([Intel XE#4543]) [263]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@kms_big_fb@y-tiled-8bpp-rotate-180.html [264]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-1/igt@kms_big_fb@y-tiled-8bpp-rotate-180.html - shard-dg2-set2: [SKIP][265] ([Intel XE#4208]) -> [SKIP][266] ([Intel XE#1124]) [265]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-dg2-436/igt@kms_big_fb@y-tiled-8bpp-rotate-180.html [266]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-434/igt@kms_big_fb@y-tiled-8bpp-rotate-180.html * igt@kms_big_fb@y-tiled-8bpp-rotate-90: - shard-adlp: [SKIP][267] ([Intel XE#316]) -> [SKIP][268] ([Intel XE#4947]) [267]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-1/igt@kms_big_fb@y-tiled-8bpp-rotate-90.html [268]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_big_fb@y-tiled-8bpp-rotate-90.html * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip: - shard-adlp: [DMESG-WARN][269] ([Intel XE#2953] / [Intel XE#4173]) -> [DMESG-FAIL][270] ([Intel XE#4543]) [269]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-6/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html [270]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-4/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html * igt@kms_big_fb@yf-tiled-16bpp-rotate-270: - shard-adlp: [SKIP][271] ([Intel XE#1124]) -> [SKIP][272] ([Intel XE#4947]) +3 other tests skip [271]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@kms_big_fb@yf-tiled-16bpp-rotate-270.html [272]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_big_fb@yf-tiled-16bpp-rotate-270.html * igt@kms_bw@connected-linear-tiling-1-displays-3840x2160p: - shard-adlp: [SKIP][273] ([Intel XE#4950]) -> [SKIP][274] ([Intel XE#367]) [273]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@kms_bw@connected-linear-tiling-1-displays-3840x2160p.html [274]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-3/igt@kms_bw@connected-linear-tiling-1-displays-3840x2160p.html * igt@kms_bw@connected-linear-tiling-3-displays-2160x1440p: - shard-adlp: [SKIP][275] ([Intel XE#2191]) -> [SKIP][276] ([Intel XE#4950]) [275]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@kms_bw@connected-linear-tiling-3-displays-2160x1440p.html [276]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_bw@connected-linear-tiling-3-displays-2160x1440p.html * igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs-cc: - shard-adlp: [SKIP][277] ([Intel XE#4947]) -> [SKIP][278] ([Intel XE#455] / [Intel XE#787]) [277]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs-cc.html [278]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-9/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs-cc.html * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs: - shard-adlp: [SKIP][279] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][280] ([Intel XE#4947]) +1 other test skip [279]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-6/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html [280]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs: - shard-dg2-set2: [INCOMPLETE][281] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124] / [Intel XE#4345]) -> [INCOMPLETE][282] ([Intel XE#2705] / [Intel XE#4212] / [Intel XE#4345]) [281]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html [282]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html * igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs: - shard-adlp: [SKIP][283] ([Intel XE#2907]) -> [SKIP][284] ([Intel XE#4947]) [283]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-6/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html [284]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html * igt@kms_cdclk@mode-transition-all-outputs: - shard-adlp: [SKIP][285] ([Intel XE#4418]) -> [SKIP][286] ([Intel XE#2351] / [Intel XE#4947]) [285]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-8/igt@kms_cdclk@mode-transition-all-outputs.html [286]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_cdclk@mode-transition-all-outputs.html * igt@kms_chamelium_color@ctm-0-25: - shard-adlp: [SKIP][287] ([Intel XE#4950]) -> [SKIP][288] ([Intel XE#306]) [287]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@kms_chamelium_color@ctm-0-25.html [288]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-2/igt@kms_chamelium_color@ctm-0-25.html * igt@kms_chamelium_frames@hdmi-crc-single: - shard-adlp: [SKIP][289] ([Intel XE#373]) -> [SKIP][290] ([Intel XE#4950]) +2 other tests skip [289]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@kms_chamelium_frames@hdmi-crc-single.html [290]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_chamelium_frames@hdmi-crc-single.html * igt@kms_content_protection@srm: - shard-bmg: [FAIL][291] ([Intel XE#1178]) -> [SKIP][292] ([Intel XE#2341]) [291]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-bmg-3/igt@kms_content_protection@srm.html [292]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-5/igt@kms_content_protection@srm.html * igt@kms_content_protection@uevent: - shard-bmg: [FAIL][293] ([Intel XE#1188]) -> [SKIP][294] ([Intel XE#2341]) [293]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-bmg-1/igt@kms_content_protection@uevent.html [294]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-5/igt@kms_content_protection@uevent.html * igt@kms_cursor_crc@cursor-offscreen-512x512: - shard-adlp: [SKIP][295] ([Intel XE#308]) -> [SKIP][296] ([Intel XE#4950]) [295]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-3/igt@kms_cursor_crc@cursor-offscreen-512x512.html [296]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_cursor_crc@cursor-offscreen-512x512.html * igt@kms_cursor_legacy@2x-cursor-vs-flip-atomic: - shard-adlp: [SKIP][297] ([Intel XE#309]) -> [SKIP][298] ([Intel XE#4950]) [297]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-9/igt@kms_cursor_legacy@2x-cursor-vs-flip-atomic.html [298]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_cursor_legacy@2x-cursor-vs-flip-atomic.html * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy: - shard-adlp: [SKIP][299] ([Intel XE#4950]) -> [SKIP][300] ([Intel XE#309]) +1 other test skip [299]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html [300]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions: - shard-adlp: [SKIP][301] ([Intel XE#323]) -> [SKIP][302] ([Intel XE#4950]) [301]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-1/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html [302]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html * igt@kms_dsc@dsc-fractional-bpp: - shard-adlp: [SKIP][303] ([Intel XE#455]) -> [SKIP][304] ([Intel XE#4947]) [303]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-1/igt@kms_dsc@dsc-fractional-bpp.html [304]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_dsc@dsc-fractional-bpp.html * igt@kms_fbcon_fbt@psr: - shard-adlp: [SKIP][305] ([Intel XE#4947]) -> [SKIP][306] ([Intel XE#776]) [305]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@kms_fbcon_fbt@psr.html [306]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_fbcon_fbt@psr.html - shard-dg2-set2: [SKIP][307] ([Intel XE#4208]) -> [SKIP][308] ([Intel XE#776]) [307]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-dg2-436/igt@kms_fbcon_fbt@psr.html [308]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-433/igt@kms_fbcon_fbt@psr.html * igt@kms_feature_discovery@dp-mst: - shard-adlp: [SKIP][309] ([Intel XE#1137]) -> [SKIP][310] ([Intel XE#4950]) [309]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-1/igt@kms_feature_discovery@dp-mst.html [310]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_feature_discovery@dp-mst.html * igt@kms_flip@2x-flip-vs-blocking-wf-vblank: - shard-adlp: [SKIP][311] ([Intel XE#4950]) -> [SKIP][312] ([Intel XE#310]) [311]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@kms_flip@2x-flip-vs-blocking-wf-vblank.html [312]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-9/igt@kms_flip@2x-flip-vs-blocking-wf-vblank.html * igt@kms_flip@2x-flip-vs-expired-vblank: - shard-adlp: [SKIP][313] ([Intel XE#310]) -> [SKIP][314] ([Intel XE#4950]) [313]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-3/igt@kms_flip@2x-flip-vs-expired-vblank.html [314]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_flip@2x-flip-vs-expired-vblank.html * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling: - shard-adlp: [SKIP][315] ([Intel XE#455]) -> [SKIP][316] ([Intel XE#2351] / [Intel XE#4947]) [315]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-9/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html [316]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html * igt@kms_frontbuffer_tracking@drrs-1p-offscren-pri-indfb-draw-render: - shard-adlp: [SKIP][317] ([Intel XE#651]) -> [SKIP][318] ([Intel XE#4947]) +3 other tests skip [317]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@kms_frontbuffer_tracking@drrs-1p-offscren-pri-indfb-draw-render.html [318]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_frontbuffer_tracking@drrs-1p-offscren-pri-indfb-draw-render.html * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-fullscreen: - shard-dg2-set2: [SKIP][319] ([Intel XE#4208]) -> [SKIP][320] ([Intel XE#651]) +1 other test skip [319]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-dg2-436/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-fullscreen.html [320]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-436/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-fullscreen.html * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render: - shard-bmg: [SKIP][321] ([Intel XE#2312]) -> [SKIP][322] ([Intel XE#2311]) +15 other tests skip [321]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render.html [322]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render.html * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-mmap-wc: - shard-adlp: [SKIP][323] ([Intel XE#2351] / [Intel XE#4947]) -> [SKIP][324] ([Intel XE#656]) [323]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-mmap-wc.html [324]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-4/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-mmap-wc.html - shard-dg2-set2: [SKIP][325] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][326] ([Intel XE#651]) [325]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-dg2-436/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-mmap-wc.html [326]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-434/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-msflip-blt: - shard-adlp: [SKIP][327] ([Intel XE#656]) -> [SKIP][328] ([Intel XE#4947]) +4 other tests skip [327]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-msflip-blt.html [328]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-msflip-blt.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-render: - shard-adlp: [SKIP][329] ([Intel XE#656]) -> [SKIP][330] ([Intel XE#2351] / [Intel XE#4947]) [329]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-render.html [330]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render: - shard-bmg: [SKIP][331] ([Intel XE#2312]) -> [SKIP][332] ([Intel XE#4141]) +11 other tests skip [331]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html [332]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt: - shard-adlp: [SKIP][333] ([Intel XE#4947]) -> [SKIP][334] ([Intel XE#656]) +3 other tests skip [333]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt.html [334]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff: - shard-bmg: [SKIP][335] ([Intel XE#4141]) -> [SKIP][336] ([Intel XE#2312]) +9 other tests skip [335]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html [336]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html * igt@kms_frontbuffer_tracking@fbcdrrs-1p-offscren-pri-shrfb-draw-render: - shard-adlp: [SKIP][337] ([Intel XE#4947]) -> [SKIP][338] ([Intel XE#651]) [337]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@kms_frontbuffer_tracking@fbcdrrs-1p-offscren-pri-shrfb-draw-render.html [338]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-4/igt@kms_frontbuffer_tracking@fbcdrrs-1p-offscren-pri-shrfb-draw-render.html * igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-indfb-plflip-blt: - shard-bmg: [SKIP][339] ([Intel XE#2311]) -> [SKIP][340] ([Intel XE#2312]) +11 other tests skip [339]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-indfb-plflip-blt.html [340]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-indfb-plflip-blt.html * igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-mmap-wc: - shard-adlp: [SKIP][341] ([Intel XE#2351] / [Intel XE#4947]) -> [SKIP][342] ([Intel XE#651]) [341]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-mmap-wc.html [342]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-1/igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-render: - shard-adlp: [SKIP][343] ([Intel XE#653]) -> [SKIP][344] ([Intel XE#4947]) +1 other test skip [343]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-render.html [344]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-msflip-blt: - shard-dg2-set2: [SKIP][345] ([Intel XE#4208]) -> [SKIP][346] ([Intel XE#653]) [345]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-dg2-436/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-msflip-blt.html [346]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-434/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-msflip-blt.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt: - shard-bmg: [SKIP][347] ([Intel XE#2312]) -> [SKIP][348] ([Intel XE#2313]) +24 other tests skip [347]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt.html [348]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt.html * igt@kms_frontbuffer_tracking@fbcpsr-indfb-scaledprimary: - shard-adlp: [SKIP][349] ([Intel XE#4947]) -> [SKIP][350] ([Intel XE#653]) +1 other test skip [349]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@kms_frontbuffer_tracking@fbcpsr-indfb-scaledprimary.html [350]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-9/igt@kms_frontbuffer_tracking@fbcpsr-indfb-scaledprimary.html - shard-dg2-set2: [SKIP][351] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][352] ([Intel XE#653]) [351]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-dg2-436/igt@kms_frontbuffer_tracking@fbcpsr-indfb-scaledprimary.html [352]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-464/igt@kms_frontbuffer_tracking@fbcpsr-indfb-scaledprimary.html * igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt: - shard-bmg: [SKIP][353] ([Intel XE#2313]) -> [SKIP][354] ([Intel XE#2312]) +22 other tests skip [353]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-bmg-3/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html [354]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-5/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html * igt@kms_joiner@basic-big-joiner: - shard-adlp: [SKIP][355] ([Intel XE#346]) -> [SKIP][356] ([Intel XE#4947]) [355]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-1/igt@kms_joiner@basic-big-joiner.html [356]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_joiner@basic-big-joiner.html * igt@kms_plane_multiple@2x-tiling-y: - shard-bmg: [SKIP][357] ([Intel XE#4596]) -> [SKIP][358] ([Intel XE#5021]) [357]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-bmg-5/igt@kms_plane_multiple@2x-tiling-y.html [358]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-1/igt@kms_plane_multiple@2x-tiling-y.html * igt@kms_plane_multiple@2x-tiling-yf: - shard-bmg: [SKIP][359] ([Intel XE#5021]) -> [SKIP][360] ([Intel XE#4596]) [359]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-bmg-8/igt@kms_plane_multiple@2x-tiling-yf.html [360]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-yf.html * igt@kms_pm_backlight@bad-brightness: - shard-adlp: [SKIP][361] ([Intel XE#870]) -> [SKIP][362] ([Intel XE#4947]) [361]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-8/igt@kms_pm_backlight@bad-brightness.html [362]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_pm_backlight@bad-brightness.html * igt@kms_psr2_sf@pr-overlay-plane-move-continuous-sf: - shard-adlp: [SKIP][363] ([Intel XE#1489]) -> [SKIP][364] ([Intel XE#4947]) +1 other test skip [363]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-9/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-sf.html [364]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-sf.html * igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf: - shard-adlp: [SKIP][365] ([Intel XE#4947]) -> [SKIP][366] ([Intel XE#1489]) [365]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf.html [366]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-1/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf.html * igt@kms_psr@fbc-psr2-cursor-blt: - shard-adlp: [SKIP][367] ([Intel XE#2850] / [Intel XE#929]) -> [SKIP][368] ([Intel XE#4947]) +2 other tests skip [367]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-6/igt@kms_psr@fbc-psr2-cursor-blt.html [368]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_psr@fbc-psr2-cursor-blt.html * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180: - shard-adlp: [SKIP][369] ([Intel XE#1127]) -> [SKIP][370] ([Intel XE#4950]) [369]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-9/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html [370]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html * igt@kms_vrr@flip-basic: - shard-adlp: [SKIP][371] ([Intel XE#4950]) -> [SKIP][372] ([Intel XE#455]) +1 other test skip [371]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@kms_vrr@flip-basic.html [372]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-6/igt@kms_vrr@flip-basic.html - shard-dg2-set2: [SKIP][373] ([Intel XE#4208] / [i915#2575]) -> [SKIP][374] ([Intel XE#455]) [373]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-dg2-436/igt@kms_vrr@flip-basic.html [374]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-436/igt@kms_vrr@flip-basic.html * igt@kms_vrr@lobf: - shard-adlp: [SKIP][375] ([Intel XE#2168]) -> [SKIP][376] ([Intel XE#4950]) [375]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-1/igt@kms_vrr@lobf.html [376]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@kms_vrr@lobf.html * igt@xe_configfs@survivability-mode: - shard-adlp: [SKIP][377] ([Intel XE#5249]) -> [SKIP][378] ([Intel XE#4945]) [377]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-3/igt@xe_configfs@survivability-mode.html [378]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@xe_configfs@survivability-mode.html * igt@xe_copy_basic@mem-set-linear-0xfffe: - shard-dg2-set2: [SKIP][379] ([Intel XE#4208]) -> [SKIP][380] ([Intel XE#1126]) [379]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-dg2-436/igt@xe_copy_basic@mem-set-linear-0xfffe.html [380]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-436/igt@xe_copy_basic@mem-set-linear-0xfffe.html - shard-adlp: [SKIP][381] ([Intel XE#4945]) -> [SKIP][382] ([Intel XE#1126]) [381]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@xe_copy_basic@mem-set-linear-0xfffe.html [382]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-6/igt@xe_copy_basic@mem-set-linear-0xfffe.html * igt@xe_eu_stall@unprivileged-access: - shard-adlp: [SKIP][383] ([Intel XE#5308]) -> [SKIP][384] ([Intel XE#4945]) [383]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-6/igt@xe_eu_stall@unprivileged-access.html [384]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@xe_eu_stall@unprivileged-access.html * igt@xe_eudebug_online@breakpoint-not-in-debug-mode: - shard-adlp: [SKIP][385] ([Intel XE#4837]) -> [SKIP][386] ([Intel XE#4945]) +2 other tests skip [385]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-1/igt@xe_eudebug_online@breakpoint-not-in-debug-mode.html [386]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@xe_eudebug_online@breakpoint-not-in-debug-mode.html * igt@xe_eudebug_online@interrupt-reconnect: - shard-adlp: [SKIP][387] ([Intel XE#4945]) -> [SKIP][388] ([Intel XE#4837]) [387]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@xe_eudebug_online@interrupt-reconnect.html [388]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-9/igt@xe_eudebug_online@interrupt-reconnect.html - shard-dg2-set2: [SKIP][389] ([Intel XE#4208]) -> [SKIP][390] ([Intel XE#4837]) [389]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-dg2-436/igt@xe_eudebug_online@interrupt-reconnect.html [390]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-464/igt@xe_eudebug_online@interrupt-reconnect.html * igt@xe_evict@evict-beng-small-cm: - shard-adlp: [SKIP][391] ([Intel XE#261] / [Intel XE#688]) -> [SKIP][392] ([Intel XE#4945]) [391]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@xe_evict@evict-beng-small-cm.html [392]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@xe_evict@evict-beng-small-cm.html * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-rebind: - shard-adlp: [SKIP][393] ([Intel XE#4945]) -> [SKIP][394] ([Intel XE#1392]) [393]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-rebind.html [394]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-9/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-rebind.html * igt@xe_exec_fault_mode@many-execqueues-bindexecqueue-userptr-invalidate-imm: - shard-adlp: [SKIP][395] ([Intel XE#4945]) -> [SKIP][396] ([Intel XE#288]) +1 other test skip [395]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@xe_exec_fault_mode@many-execqueues-bindexecqueue-userptr-invalidate-imm.html [396]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@xe_exec_fault_mode@many-execqueues-bindexecqueue-userptr-invalidate-imm.html - shard-dg2-set2: [SKIP][397] ([Intel XE#4208]) -> [SKIP][398] ([Intel XE#288]) [397]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-dg2-436/igt@xe_exec_fault_mode@many-execqueues-bindexecqueue-userptr-invalidate-imm.html [398]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-435/igt@xe_exec_fault_mode@many-execqueues-bindexecqueue-userptr-invalidate-imm.html * igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-invalidate-race-prefetch: - shard-adlp: [SKIP][399] ([Intel XE#288]) -> [SKIP][400] ([Intel XE#4945]) +3 other tests skip [399]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-9/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-invalidate-race-prefetch.html [400]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-invalidate-race-prefetch.html * igt@xe_exec_reset@cm-cat-error: - shard-adlp: [SKIP][401] ([Intel XE#4945]) -> [DMESG-FAIL][402] ([Intel XE#3868]) [401]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@xe_exec_reset@cm-cat-error.html [402]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-4/igt@xe_exec_reset@cm-cat-error.html * igt@xe_exec_system_allocator@many-large-mmap-remap-dontunmap-eocheck: - shard-adlp: [SKIP][403] ([Intel XE#4945]) -> [SKIP][404] ([Intel XE#4915]) +31 other tests skip [403]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@xe_exec_system_allocator@many-large-mmap-remap-dontunmap-eocheck.html [404]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-9/igt@xe_exec_system_allocator@many-large-mmap-remap-dontunmap-eocheck.html * igt@xe_exec_system_allocator@once-mmap-file-nomemset: - shard-adlp: [SKIP][405] ([Intel XE#4915]) -> [SKIP][406] ([Intel XE#4945]) +44 other tests skip [405]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-1/igt@xe_exec_system_allocator@once-mmap-file-nomemset.html [406]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@xe_exec_system_allocator@once-mmap-file-nomemset.html * igt@xe_exec_system_allocator@threads-many-new-race-nomemset: - shard-dg2-set2: [SKIP][407] ([Intel XE#4208]) -> [SKIP][408] ([Intel XE#4915]) +16 other tests skip [407]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-dg2-436/igt@xe_exec_system_allocator@threads-many-new-race-nomemset.html [408]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-dg2-434/igt@xe_exec_system_allocator@threads-many-new-race-nomemset.html * igt@xe_oa@blocking: - shard-adlp: [SKIP][409] ([Intel XE#2541] / [Intel XE#3573]) -> [SKIP][410] ([Intel XE#4945]) +1 other test skip [409]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-1/igt@xe_oa@blocking.html [410]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@xe_oa@blocking.html * igt@xe_oa@invalid-create-userspace-config: - shard-adlp: [SKIP][411] ([Intel XE#4945]) -> [SKIP][412] ([Intel XE#2541] / [Intel XE#3573]) [411]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-4/igt@xe_oa@invalid-create-userspace-config.html [412]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-4/igt@xe_oa@invalid-create-userspace-config.html * igt@xe_pat@display-vs-wb-transient: - shard-adlp: [SKIP][413] ([Intel XE#1337]) -> [SKIP][414] ([Intel XE#4945]) [413]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-3/igt@xe_pat@display-vs-wb-transient.html [414]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@xe_pat@display-vs-wb-transient.html * igt@xe_query@multigpu-query-engines: - shard-adlp: [SKIP][415] ([Intel XE#944]) -> [SKIP][416] ([Intel XE#4945]) [415]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201/shard-adlp-9/igt@xe_query@multigpu-query-engines.html [416]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/shard-adlp-8/igt@xe_query@multigpu-query-engines.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [Intel XE#1091]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1091 [Intel XE#1123]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1123 [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124 [Intel XE#1126]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1126 [Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127 [Intel XE#1137]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1137 [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178 [Intel XE#1188]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1188 [Intel XE#1337]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1337 [Intel XE#1340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1340 [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392 [Intel XE#1401]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1401 [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406 [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407 [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421 [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424 [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435 [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439 [Intel XE#1467]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1467 [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489 [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499 [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503 [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727 [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729 [Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745 [Intel XE#1874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1874 [Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049 [Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134 [Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168 [Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191 [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234 [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252 [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284 [Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291 [Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293 [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311 [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312 [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313 [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314 [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316 [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320 [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321 [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322 [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325 [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327 [Intel XE#2328]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2328 [Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330 [Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341 [Intel XE#2351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2351 [Intel XE#2360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2360 [Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380 [Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390 [Intel XE#2501]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2501 [Intel XE#2541]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2541 [Intel XE#2594]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2594 [Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597 [Intel XE#261]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/261 [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652 [Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705 [Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724 [Intel XE#2838]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2838 [Intel XE#2849]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2849 [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850 [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288 [Intel XE#2883]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2883 [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887 [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893 [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894 [Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907 [Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953 [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301 [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306 [Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307 [Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308 [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309 [Intel XE#3098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3098 [Intel XE#3099]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3099 [Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310 [Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113 [Intel XE#3124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3124 [Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141 [Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316 [Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323 [Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321 [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374 [Intel XE#346]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/346 [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544 [Intel XE#356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/356 [Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573 [Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362 [Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366 [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367 [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373 [Intel XE#3767]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3767 [Intel XE#3868]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3868 [Intel XE#3876]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3876 [Intel XE#3884]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3884 [Intel XE#3908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3908 [Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130 [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141 [Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173 [Intel XE#4208]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4208 [Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212 [Intel XE#4227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4227 [Intel XE#4294]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4294 [Intel XE#4329]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4329 [Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345 [Intel XE#4351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4351 [Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354 [Intel XE#4359]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4359 [Intel XE#4417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4417 [Intel XE#4418]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4418 [Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422 [Intel XE#4459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4459 [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543 [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455 [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596 [Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608 [Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609 [Intel XE#4665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4665 [Intel XE#4689]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4689 [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733 [Intel XE#4757]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4757 [Intel XE#4814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4814 [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837 [Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915 [Intel XE#4921]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4921 [Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943 [Intel XE#4945]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4945 [Intel XE#4947]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4947 [Intel XE#4950]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4950 [Intel XE#4962]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4962 [Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020 [Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021 [Intel XE#5100]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5100 [Intel XE#512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/512 [Intel XE#5191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5191 [Intel XE#5244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5244 [Intel XE#5249]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5249 [Intel XE#5300]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5300 [Intel XE#5308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5308 [Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584 [Intel XE#616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/616 [Intel XE#619]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/619 [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651 [Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653 [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656 [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688 [Intel XE#718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/718 [Intel XE#776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/776 [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787 [Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836 [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870 [Intel XE#908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/908 [Intel XE#911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/911 [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929 [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944 [Intel XE#979]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/979 [i915#2575]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2575 Build changes ------------- * IGT: IGT_8423 -> IGT_8424 * Linux: xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201 -> xe-pw-149503v6 IGT_8423: 8423 IGT_8424: 68588b3c89a1bbe08c54d21c4d3d2e509957c795 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git xe-3297-fb5dada21e3cfa26179ca58e1d7c26cdad217201: fb5dada21e3cfa26179ca58e1d7c26cdad217201 xe-pw-149503v6: 149503v6 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149503v6/index.html [-- Attachment #2: Type: text/html, Size: 133776 bytes --] ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2025-06-25 9:00 UTC | newest] Thread overview: 10+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2025-06-24 9:22 [PATCH v3 0/2] Cleaning up code related to VRAM regions and its initialization - part 2 Piórkowski, Piotr 2025-06-24 9:22 ` [PATCH v3 1/2] drm/xe: Use dynamic allocation for tile and device VRAM region structures Piórkowski, Piotr 2025-06-24 9:46 ` Michal Wajdeczko 2025-06-25 9:00 ` Jani Nikula 2025-06-24 9:53 ` Jani Nikula 2025-06-24 9:22 ` [PATCH v3 2/2] drm/xe: Unify the initialization of VRAM regions Piórkowski, Piotr 2025-06-24 10:10 ` Matthew Auld 2025-06-24 12:27 ` ✓ CI.KUnit: success for Cleaning up code related to VRAM regions and its initialization - part 2 (rev6) Patchwork 2025-06-24 13:28 ` ✓ Xe.CI.BAT: " Patchwork 2025-06-25 1:40 ` ✗ Xe.CI.Full: failure " Patchwork
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