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From: "Teres Alexis, Alan Previn" <alan.previn.teres.alexis@intel.com>
To: "Dong, Zhanjun" <zhanjun.dong@intel.com>,
	"intel-xe@lists.freedesktop.org" <intel-xe@lists.freedesktop.org>
Subject: Re: [PATCH v11 1/5] drm/xe/guc: Prepare GuC register list and update ADS size for error capture
Date: Thu, 27 Jun 2024 00:13:52 +0000	[thread overview]
Message-ID: <81cfebe69df10f62992cac555ca85801b63afa27.camel@intel.com> (raw)
In-Reply-To: <20240624215404.3213075-2-zhanjun.dong@intel.com>


Hi Zhanjun, i see you addressed everything i commented on in rev8 as
well as everything that Michal commented on in rev9 (except one which
wasnt an issue but was by design).

Although I still found couple of the issues which are not nits, they
are very trivial so i'm giving a conditional RB for the comments i
prefixed with "rb-condition".

Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com>

On Mon, 2024-06-24 at 14:54 -0700, Zhanjun Dong wrote:
> Add referenced registers defines and list of registers.
> Update GuC ADS size allocation to include space for
> the lists of error state capture register descriptors.
> 
> 
alan:snip
> --- a/drivers/gpu/drm/xe/xe_guc_ads.c
> +++ b/drivers/gpu/drm/xe/xe_guc_ads.c
> @@ -18,6 +18,8 @@
>  #include "xe_gt_ccs_mode.h"
>  #include "xe_gt_printk.h"
>  #include "xe_guc.h"
> +#include "xe_guc_capture.h"
> +#include "xe_guc_capture_types.h"
>  #include "xe_guc_ct.h"
>  #include "xe_hw_engine.h"
>  #include "xe_lrc.h"
> @@ -127,6 +129,8 @@ struct __guc_ads_blob {
>  #define info_map_read(xe_, map_, field_) \
>         xe_map_rd_field(xe_, map_, 0, struct guc_gt_system_info,
> field_)
>  
> +static int guc_capture_prep_lists(struct xe_guc_ads *ads);
alan:nit: I think you don't need this prototype definition here now?



alan:snip

> diff --git a/drivers/gpu/drm/xe/xe_guc_capture_types.h
> b/drivers/gpu/drm/xe/xe_guc_capture_types.h
> new file mode 100644
> index 000000000000..b2e78ab53e2e

alan:snip
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_guc_capture_types.h
> @@ -0,0 +1,80 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2024 Intel Corporation
> + */
> +
> +#ifndef _xe_guc_capture_types_H
> +#define _xe_guc_capture_types_H
alan: [rb-condition] this should be all caps, no?
> +
> +#include <linux/types.h>
> +
alan:snip

> +       /**
> +        * @cachelist: Pool of pre-allocated nodes for error capture
> output
> +        *
> +        * We need this pool of pre-allocated nodes because we cannot
> +        * dynamically allocate new nodes when receiving the G2H
> notification
> +        * because the event handlers for all G2H event-processing is
> called
> +        * by the ct processing worker queue and when that queue is
> being
> +        * processed, there is no absoluate guarantee that we are not
> in the
> +        * midst of a GT reset operation (which doesn't allow
> allocations).
> +        */
> +       struct list_head cachelist;
alan: [rb-condition] please move the introduction of cachelist to the
patch where its actually getting initialized and used (extraction
patch, right?)
> +#define PREALLOC_NODES_MAX_COUNT (3 * GUC_MAX_ENGINE_CLASSES *
> GUC_MAX_INSTANCES_PER_CLASS)
> +#define PREALLOC_NODES_DEFAULT_NUMREGS 64
> +
> +       /**
> +        * @max_mmio_per_node: Max MMIO per node.
> +        */
> +       int max_mmio_per_node;
> +
> +       /**
> +        * @outlist: Pool of pre-allocated nodes for error capture
> output
> +        *
> +        * A linked list of parsed GuC error-capture output data
> before
> +        * reporting with formatting via xe_devcoredump. Each node in
> this linked list shall
> +        * contain a single engine-capture including global, engine-
> class and
> +        * engine-instance register dumps as per
> guc_capture_parsed_output_node
> +        */
> +       struct list_head outlist;
> 
alan: [rb-condition] please move the introduction of outlist to the
patch where its actually getting initialized and used (extraction
patch, right?)
> +};
> +


  reply	other threads:[~2024-06-27  0:14 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-24 21:53 [PATCH v11 0/5] drm/xe/guc: Add GuC based register capture for error capture Zhanjun Dong
2024-06-24 21:54 ` [PATCH v11 1/5] drm/xe/guc: Prepare GuC register list and update ADS size " Zhanjun Dong
2024-06-27  0:13   ` Teres Alexis, Alan Previn [this message]
2024-06-28 20:05     ` Dong, Zhanjun
2024-06-27 18:45   ` Michal Wajdeczko
2024-06-28 23:00     ` Dong, Zhanjun
2024-06-28 16:05   ` Lucas De Marchi
2024-06-28 20:06     ` Dong, Zhanjun
2024-06-28 20:17       ` Lucas De Marchi
2024-06-24 21:54 ` [PATCH v11 2/5] drm/xe/guc: Add XE_LP steered register lists Zhanjun Dong
2024-06-24 21:54 ` [PATCH v11 3/5] drm/xe/guc: Add capture size check in GuC log buffer Zhanjun Dong
2024-06-27 18:56   ` Michal Wajdeczko
2024-06-28 23:15     ` Dong, Zhanjun
2024-07-03  3:10   ` Teres Alexis, Alan Previn
2024-07-04 20:27     ` Dong, Zhanjun
2024-06-24 21:54 ` [PATCH v11 4/5] drm/xe/guc: Extract GuC error capture lists Zhanjun Dong
2024-06-28  0:01   ` Teres Alexis, Alan Previn
2024-06-24 21:54 ` [PATCH v11 5/5] drm/xe/guc: Plumb GuC-capture into dev coredump Zhanjun Dong
2024-06-24 21:59 ` ✓ CI.Patch_applied: success for drm/xe/guc: Add GuC based register capture for error capture (rev11) Patchwork
2024-06-24 21:59 ` ✗ CI.checkpatch: warning " Patchwork
2024-06-24 22:00 ` ✓ CI.KUnit: success " Patchwork
2024-06-24 22:12 ` ✓ CI.Build: " Patchwork
2024-06-24 22:14 ` ✗ CI.Hooks: failure " Patchwork
2024-06-24 22:16 ` ✓ CI.checksparse: success " Patchwork
2024-06-24 22:39 ` ✓ CI.BAT: " Patchwork
2024-06-25  0:52 ` ✗ CI.FULL: failure " Patchwork

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