Re: [PATCH v9 16/17] drm/i915/display: Add function to configure event for dc balance

[Jani Nikula <jani.nikula@linux.intel.com>]

On Thu, 27 Nov 2025, Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> wrote:
> Configure pipe dmc event for dc balance enable/disable.
>
> Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dmc.c | 15 +++++++++++++++
>  drivers/gpu/drm/i915/display/intel_dmc.h |  2 ++
>  drivers/gpu/drm/i915/display/intel_vrr.c |  2 ++
>  3 files changed, 19 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
> index 147adcd18320..8de8e69780fa 100644
> --- a/drivers/gpu/drm/i915/display/intel_dmc.c
> +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
> @@ -859,6 +859,21 @@ static void dmc_configure_event(struct intel_display *display,
>  		      dmc_id, num_handlers, event_id);
>  }
>  
> +/*
> + * intel_dmc_configure_dc_balance_event() - Configure event
> + * for dc balance enable/disable
> + * @display: display instance
> + * @pipe: pipe which register use to block
> + * @enable: enable/disable
> + */

How is this comment helpful?

> +void intel_dmc_configure_dc_balance_event(struct intel_display *display,
> +					  enum pipe pipe, bool enable)
> +{
> +	enum intel_dmc_id dmc_id = PIPE_TO_DMC_ID(pipe);
> +
> +	dmc_configure_event(display, dmc_id, PIPEDMC_EVENT_ADAPTIVE_DCB_TRIGGER, enable);
> +}
> +
>  /**
>   * intel_dmc_block_pkgc() - block PKG C-state
>   * @display: display instance
> diff --git a/drivers/gpu/drm/i915/display/intel_dmc.h b/drivers/gpu/drm/i915/display/intel_dmc.h
> index 9c6a42fc820e..3d8a9a593319 100644
> --- a/drivers/gpu/drm/i915/display/intel_dmc.h
> +++ b/drivers/gpu/drm/i915/display/intel_dmc.h
> @@ -25,6 +25,8 @@ void intel_dmc_enable_pipe(const struct intel_crtc_state *crtc_state);
>  void intel_dmc_disable_pipe(const struct intel_crtc_state *crtc_state);
>  void intel_dmc_block_pkgc(struct intel_display *display, enum pipe pipe,
>  			  bool block);
> +void intel_dmc_configure_dc_balance_event(struct intel_display *display,
> +					  enum pipe pipe, bool enable);
>  void intel_dmc_start_pkgc_exit_at_start_of_undelayed_vblank(struct intel_display *display,
>  							    enum pipe pipe, bool enable);
>  void intel_dmc_fini(struct intel_display *display);
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> index 286ffa35107b..ec2e5a94a99e 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -809,6 +809,7 @@ intel_vrr_enable_dc_balancing(const struct intel_crtc_state *crtc_state)
>  		       crtc_state->vrr.dc_balance.slope);
>  	intel_de_write(display, PIPEDMC_DCB_VBLANK(pipe),
>  		       crtc_state->vrr.dc_balance.vblank_target);
> +	intel_dmc_configure_dc_balance_event(display, pipe, true);
>  	intel_de_write(display, TRANS_ADAPTIVE_SYNC_DCB_CTL(cpu_transcoder),
>  		       ADAPTIVE_SYNC_COUNTER_EN);
>  	intel_pipedmc_dcb_enable(NULL, crtc);
> @@ -826,6 +827,7 @@ intel_vrr_disable_dc_balancing(const struct intel_crtc_state *old_crtc_state)
>  		return;
>  
>  	intel_pipedmc_dcb_disable(NULL, crtc);
> +	intel_dmc_configure_dc_balance_event(display, pipe, false);
>  	intel_de_write(display, TRANS_ADAPTIVE_SYNC_DCB_CTL(cpu_transcoder), 0);
>  	intel_de_write(display, PIPEDMC_DCB_VMIN(pipe), 0);
>  	intel_de_write(display, PIPEDMC_DCB_VMAX(pipe), 0);

-- 
Jani Nikula, Intel