Re: [PATCH 08/17] drm/xe/oa: OA stream initialization (OAG)

["Dixit, Ashutosh" <ashutosh.dixit@intel.com>]

On Tue, 19 Dec 2023 18:31:45 -0800, Umesh Nerlige Ramappa wrote:
>

Hi Umesh,

> > diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> > index d318ec0efd7db..1b98b609f7fda 100644
> > --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> > +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> > @@ -156,6 +156,8 @@
> >
> > #define SQCNT1					XE_REG_MCR(0x8718)
> > #define XELPMP_SQCNT1				XE_REG(0x8718)
> > +#define   SQCNT1_PMON_ENABLE			REG_BIT(30)
> > +#define   SQCNT1_OABPC				REG_BIT(29)
> > #define   ENFORCE_RAR				REG_BIT(23)
>
> REG_BIT(29) indentation seems to be off

Indentation is ok, I've explained this elsewhere.

> > +static int xe_oa_emit_oa_config(struct xe_oa_stream *stream)
> > +{
> > +#define NOA_PROGRAM_ADDITIONAL_DELAY_US 500
> > +	struct xe_oa_config_bo *oa_bo;
> > +	int err, us = NOA_PROGRAM_ADDITIONAL_DELAY_US;
> > +
> > +	oa_bo = xe_oa_alloc_config_buffer(stream);
> > +	if (IS_ERR(oa_bo)) {
> > +		err = PTR_ERR(oa_bo);
> > +		goto exit;
> > +	}
> > +
> > +	err = xe_oa_submit_bb(stream, oa_bo->bb);
> > +
> > +	/* Additional empirical delay needed for NOA programming after registers are written */
> > +	usleep_range(us, 2 * us);
>
> Are we planning to signal user fence or something to indicate completion? I
> haven't tracked that aspect much.

Yes that's the plan. This usleep() will be removed when we implement that.

>
> The reset is familiar and lgtm,
>
> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>

Thanks.
--
Ashutosh