Re: [PATCH 6/6] drm/xe/xe_guc_ct: Justify WRITE_ONCE/READ_ONCE usage

["Dixit, Ashutosh" <ashutosh.dixit@intel.com>]

On Thu, 18 Dec 2025 13:03:45 -0800, Cavitt, Jonathan wrote:
>
> -----Original Message-----
> From: Dixit, Ashutosh <ashutosh.dixit@intel.com>
> Sent: Thursday, December 18, 2025 1:01 PM
> To: Cavitt, Jonathan <jonathan.cavitt@intel.com>
> Cc: intel-xe@lists.freedesktop.org; Gupta, Saurabhg <saurabhg.gupta@intel.com>; Zuo, Alex <alex.zuo@intel.com>; Brost, Matthew <matthew.brost@intel.com>; Ceraolo Spurio, Daniele <daniele.ceraolospurio@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>; Wajdeczko, Michal <Michal.Wajdeczko@intel.com>
> Subject: Re: [PATCH 6/6] drm/xe/xe_guc_ct: Justify WRITE_ONCE/READ_ONCE usage
> >
> > On Thu, 18 Dec 2025 07:35:34 -0800, Jonathan Cavitt wrote:
> > >
> > > Usage of READ_ONCE and WRITE_ONCE requires comments justifying it.
> > > Some recently added uses had cross-dependencies with each other, but
> > > needed to be added separately, so introduce the justifications now when
> > > it makes more sense to.
> >
> > What is the reason for doing this in a separate patch? Afais, these
> > comments should be added in the same patches where the code was changed. So
> > people can see it in a single patch...
>
> Because the comment "WRITE_ONCE pairs with READ_ONCEs in xe_guc_ct_initialized
> and xe_guc_ct_enabled" doesn't make sense when those functions don't have
> READ_ONCEs yet.

As Stuart mentioned the WRITE and READ should be in a single patch
anyway. Together with the comments.

>
> >
> > >
> > > Suggested-by: Matthew Brost <matthew.brost@intel.com>
> > > Suggested-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
> > > ---
> > >  drivers/gpu/drm/xe/xe_guc_ct.c | 5 +++++
> > >  drivers/gpu/drm/xe/xe_guc_ct.h | 2 ++
> > >  2 files changed, 7 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/xe/xe_guc_ct.c b/drivers/gpu/drm/xe/xe_guc_ct.c
> > > index 20ac0438ffb6..24857c2c8cb5 100644
> > > --- a/drivers/gpu/drm/xe/xe_guc_ct.c
> > > +++ b/drivers/gpu/drm/xe/xe_guc_ct.c
> > > @@ -529,6 +529,11 @@ static void guc_ct_change_state(struct xe_guc_ct *ct,
> > >	if (ct->g2h_outstanding)
> > >		xe_pm_runtime_put(ct_to_xe(ct));
> > >	ct->g2h_outstanding = 0;
> > > +
> > > +	/*
> > > +	 * WRITE_ONCE pairs with READ_ONCEs in xe_guc_ct_initialized and
> > > +	 * xe_guc_ct_enabled.
> > > +	 */
> > >	WRITE_ONCE(ct->state, state);
> > >
> > >	xe_gt_dbg(gt, "GuC CT communication channel %s\n",
> > > diff --git a/drivers/gpu/drm/xe/xe_guc_ct.h b/drivers/gpu/drm/xe/xe_guc_ct.h
> > > index cb1335f1d66f..8d318b094f33 100644
> > > --- a/drivers/gpu/drm/xe/xe_guc_ct.h
> > > +++ b/drivers/gpu/drm/xe/xe_guc_ct.h
> > > @@ -30,11 +30,13 @@ void xe_guc_ct_print(struct xe_guc_ct *ct, struct drm_printer *p, bool want_ctb)
> > >
> > >  static inline bool xe_guc_ct_initialized(struct xe_guc_ct *ct)
> > >  {
> > > +	/* READ_ONCE pairs with WRITE_ONCE in guc_ct_change_state */
> > >	return READ_ONCE(ct->state) != XE_GUC_CT_STATE_NOT_INITIALIZED;
> > >  }
> > >
> > >  static inline bool xe_guc_ct_enabled(struct xe_guc_ct *ct)
> > >  {
> > > +	/* READ_ONCE pairs with WRITE_ONCE in guc_ct_change_state */
> > >	return READ_ONCE(ct->state) == XE_GUC_CT_STATE_ENABLED;
> > >  }
> > >
> > > --
> > > 2.43.0
> > >
> >