[PATCH v3 0/7] Fix MCR inconsistencies in RTP tables

Intel-XE Archive on lore.kernel.org
 help / color / mirror / Atom feed

* [PATCH v3 0/7] Fix MCR inconsistencies in RTP tables
@ 2026-05-14 21:44 Gustavo Sousa
  2026-05-14 21:44 ` [PATCH v3 1/7] drm/xe: Define CACHE_MODE_1 as MCR register Gustavo Sousa
                   ` (10 more replies)
  0 siblings, 11 replies; 12+ messages in thread
From: Gustavo Sousa @ 2026-05-14 21:44 UTC (permalink / raw)
  To: intel-xe; +Cc: Gustavo Sousa, Matt Roper, Michal Wajdeczko

The Xe driver uses struct xe_reg as base type to represent a register
definition, and defines struct xe_reg_mcr as a sort of subtype to
represent multicast replicated (MCR) registers.  It uses this subtyping
to "force" the use of the correct MCR-based API for MMIO operations on
MCR registers.

In regular driver code, usage of those MCR registers usually need some
reasoning about whether the access will need to be steered or a
multicast; and the correct MCR API will be selected.

For RTP tables, on the other hand, that's not the case.  The developer
when defining an action the developer can either select a regular or a
MCR register and the register save/restore logic will make the selection
between regular vs MCR MMIO access depending on the register instance
defined in the RTP action.

That allows some mistakes to go unnoticed: a non-MCR register instance
could be used for an RTP action against a platform where such a register
is actually MCR; and vice-versa.

This series fixes those mistakes.

Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
Changes in v3:
- Dropped patch "drm/xe/kunit: Add xe_kunit_helper_is_live_test()",
  which became unnecessary in v2.
- This version is being sent mainly to get fresh CI results before
  applying, just in case any new inconsistencies were introduced in the
  meantime.
- Link to v2: https://patch.msgid.link/20260508-rtp-mcr-check-v2-0-9897b147a5d2@intel.com

Changes in v2:
- Incorporated review feedback. Please see individual patches for the
  respective changelogs.
- Dropped inclusion of hw_engines in xe_wa test.  We will implement a more
  focused test to check for MCR inconsistencies in the future, which will
  iterate over all applicable RTP tables.
- As a result of the above, dropped MMIO interception patches, as they became
  unnecessary.
- Link to v1: https://patch.msgid.link/20260116-rtp-mcr-check-v1-0-d420b9c1a327@intel.com

---
Gustavo Sousa (7):
      drm/xe: Define CACHE_MODE_1 as MCR register
      drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN1
      drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN4
      drm/xe: Extract xe_hw_engine_setup_reg_lrc()
      drm/xe/kunit: Use KUNIT_EXPECT_EQ() in xe_wa_gt()
      drm/xe/mcr: Extract reg_in_steering_type_ranges()
      drm/xe/reg_sr: Do sanity check for MCR vs non-MCR

 drivers/gpu/drm/xe/regs/xe_gt_regs.h   |  4 +-
 drivers/gpu/drm/xe/tests/xe_rtp_test.c | 71 ++++++++++++++++++++++++++++++----
 drivers/gpu/drm/xe/tests/xe_wa_test.c  | 14 ++++++-
 drivers/gpu/drm/xe/xe_gt.c             |  8 ++--
 drivers/gpu/drm/xe/xe_gt_mcr.c         | 67 +++++++++++++++++++++++---------
 drivers/gpu/drm/xe/xe_gt_mcr.h         |  1 +
 drivers/gpu/drm/xe/xe_hw_engine.c      | 15 ++++++-
 drivers/gpu/drm/xe/xe_hw_engine.h      |  2 +-
 drivers/gpu/drm/xe/xe_reg_sr.c         | 36 +++++++++++++++++
 drivers/gpu/drm/xe/xe_tuning.c         |  2 +-
 drivers/gpu/drm/xe/xe_wa.c             |  6 +--
 11 files changed, 186 insertions(+), 40 deletions(-)
---
base-commit: 2edbd77a2045d12d30c95dbb5842b831e3da0035
change-id: 20260112-rtp-mcr-check-f976cb1adf94

Best regards,
--  
Gustavo Sousa <gustavo.sousa@intel.com>


^ permalink raw reply	[flat|nested] 12+ messages in thread

* [PATCH v3 1/7] drm/xe: Define CACHE_MODE_1 as MCR register
  2026-05-14 21:44 [PATCH v3 0/7] Fix MCR inconsistencies in RTP tables Gustavo Sousa
@ 2026-05-14 21:44 ` Gustavo Sousa
  2026-05-14 21:44 ` [PATCH v3 2/7] drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN1 Gustavo Sousa
                   ` (9 subsequent siblings)
  10 siblings, 0 replies; 12+ messages in thread
From: Gustavo Sousa @ 2026-05-14 21:44 UTC (permalink / raw)
  To: intel-xe; +Cc: Gustavo Sousa, Matt Roper

CACHE_MODE_1 is a MCR register for all platforms that currently use it
in the Xe driver.  Use XE_REG_MCR() when defining it.

Fixes: 8cd7e9759766 ("drm/xe: Add missing DG2 lrc workarounds")
Fixes: ff063430caa8 ("drm/xe/mtl: Add some initial MTL workarounds")
Bspec: 66534, 67788
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/xe/regs/xe_gt_regs.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
index 16c87ce3f614..408933aee08a 100644
--- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
@@ -152,7 +152,7 @@
 
 #define XEHPG_INSTDONE_GEOM_SVGUNIT		XE_REG_MCR(0x666c)
 
-#define CACHE_MODE_1				XE_REG(0x7004, XE_REG_OPTION_MASKED)
+#define CACHE_MODE_1				XE_REG_MCR(0x7004, XE_REG_OPTION_MASKED)
 #define   MSAA_OPTIMIZATION_REDUC_DISABLE	REG_BIT(11)
 
 #define COMMON_SLICE_CHICKEN1			XE_REG(0x7010, XE_REG_OPTION_MASKED)

-- 
2.53.0


^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH v3 2/7] drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN1
  2026-05-14 21:44 [PATCH v3 0/7] Fix MCR inconsistencies in RTP tables Gustavo Sousa
  2026-05-14 21:44 ` [PATCH v3 1/7] drm/xe: Define CACHE_MODE_1 as MCR register Gustavo Sousa
@ 2026-05-14 21:44 ` Gustavo Sousa
  2026-05-14 21:44 ` [PATCH v3 3/7] drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN4 Gustavo Sousa
                   ` (8 subsequent siblings)
  10 siblings, 0 replies; 12+ messages in thread
From: Gustavo Sousa @ 2026-05-14 21:44 UTC (permalink / raw)
  To: intel-xe; +Cc: Gustavo Sousa, Matt Roper

The register COMMON_SLICE_CHICKEN1 is a MCR register on Xe2.
Let's make sure to define a MCR version of it and use it for the
relevant IP versions.

Use XEHP_ as prefix for the register name, since it is MCR as of Xe_HP.

Fixes: a5d221924e13 ("drm/xe/xe2_hpg: Add set of workarounds")
Fixes: 9f18b55b6d3f ("drm/xe/xe2: Add workaround 18033852989")
Bspec: 66534, 71185
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/xe/regs/xe_gt_regs.h | 1 +
 drivers/gpu/drm/xe/xe_wa.c           | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
index 408933aee08a..b21c66a1b777 100644
--- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
@@ -156,6 +156,7 @@
 #define   MSAA_OPTIMIZATION_REDUC_DISABLE	REG_BIT(11)
 
 #define COMMON_SLICE_CHICKEN1			XE_REG(0x7010, XE_REG_OPTION_MASKED)
+#define XEHP_COMMON_SLICE_CHICKEN1		XE_REG_MCR(0x7010, XE_REG_OPTION_MASKED)
 #define   DISABLE_BOTTOM_CLIP_RECTANGLE_TEST	REG_BIT(14)
 
 #define HIZ_CHICKEN					XE_REG(0x7018, XE_REG_OPTION_MASKED)
diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
index 49f5e3e4c7cc..d6f94486673e 100644
--- a/drivers/gpu/drm/xe/xe_wa.c
+++ b/drivers/gpu/drm/xe/xe_wa.c
@@ -664,7 +664,7 @@ static const struct xe_rtp_entry_sr lrc_was[] = {
 	},
 	{ XE_RTP_NAME("18033852989"),
 	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2004), ENGINE_CLASS(RENDER)),
-	  XE_RTP_ACTIONS(SET(COMMON_SLICE_CHICKEN1, DISABLE_BOTTOM_CLIP_RECTANGLE_TEST))
+	  XE_RTP_ACTIONS(SET(XEHP_COMMON_SLICE_CHICKEN1, DISABLE_BOTTOM_CLIP_RECTANGLE_TEST))
 	},
 	{ XE_RTP_NAME("15016589081"),
 	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2004), ENGINE_CLASS(RENDER)),

-- 
2.53.0


^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH v3 3/7] drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN4
  2026-05-14 21:44 [PATCH v3 0/7] Fix MCR inconsistencies in RTP tables Gustavo Sousa
  2026-05-14 21:44 ` [PATCH v3 1/7] drm/xe: Define CACHE_MODE_1 as MCR register Gustavo Sousa
  2026-05-14 21:44 ` [PATCH v3 2/7] drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN1 Gustavo Sousa
@ 2026-05-14 21:44 ` Gustavo Sousa
  2026-05-14 21:44 ` [PATCH v3 4/7] drm/xe: Extract xe_hw_engine_setup_reg_lrc() Gustavo Sousa
                   ` (7 subsequent siblings)
  10 siblings, 0 replies; 12+ messages in thread
From: Gustavo Sousa @ 2026-05-14 21:44 UTC (permalink / raw)
  To: intel-xe; +Cc: Gustavo Sousa, Matt Roper

The register COMMON_SLICE_CHICKEN4 is a MCR register on both Xe2 and
Xe3. Let's make sure to define a MCR version of it and use it for the
relevant IP versions.

Use XEHP_ as prefix for the register name, since it is MCR as of Xe_HP.

v2:
  - Also change for one entry in lrc_tunnings, which was caught by
    manual testing and add corresponging Fixes tag in commit message.
    (Gustavo)

Fixes: 8d6f16f1f082 ("drm/xe: Extend Wa_22021007897 to Xe3 platforms")
Fixes: e5c13e2c505b ("drm/xe/xe2hpg: Add Wa_22021007897")
Fixes: 8ccf5f6b2295 ("drm/xe/tuning: Apply windower hardware filtering setting on Xe3 and Xe3p")
Bspec: 66534, 71185, 74417
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/xe/regs/xe_gt_regs.h | 1 +
 drivers/gpu/drm/xe/xe_tuning.c       | 2 +-
 drivers/gpu/drm/xe/xe_wa.c           | 4 ++--
 3 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
index b21c66a1b777..08251c7a1a4b 100644
--- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
@@ -179,6 +179,7 @@
 #define XEHPG_SC_INSTDONE_EXTRA2		XE_REG_MCR(0x7108)
 
 #define COMMON_SLICE_CHICKEN4			XE_REG(0x7300, XE_REG_OPTION_MASKED)
+#define XEHP_COMMON_SLICE_CHICKEN4		XE_REG_MCR(0x7300, XE_REG_OPTION_MASKED)
 #define   SBE_PUSH_CONSTANT_BEHIND_FIX_ENABLE	REG_BIT(12)
 #define   DISABLE_TDC_LOAD_BALANCING_CALC	REG_BIT(6)
 #define   HW_FILTERING				REG_BIT(5)
diff --git a/drivers/gpu/drm/xe/xe_tuning.c b/drivers/gpu/drm/xe/xe_tuning.c
index ce39b77a084a..9a1b3862e192 100644
--- a/drivers/gpu/drm/xe/xe_tuning.c
+++ b/drivers/gpu/drm/xe/xe_tuning.c
@@ -134,7 +134,7 @@ static const struct xe_rtp_entry_sr engine_tunings[] = {
 static const struct xe_rtp_entry_sr lrc_tunings[] = {
 	{ XE_RTP_NAME("Tuning: Windower HW Filtering"),
 	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3599), ENGINE_CLASS(RENDER)),
-	  XE_RTP_ACTIONS(SET(COMMON_SLICE_CHICKEN4, HW_FILTERING))
+	  XE_RTP_ACTIONS(SET(XEHP_COMMON_SLICE_CHICKEN4, HW_FILTERING))
 	},
 
 	/* DG2 */
diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
index d6f94486673e..cb811f8a7781 100644
--- a/drivers/gpu/drm/xe/xe_wa.c
+++ b/drivers/gpu/drm/xe/xe_wa.c
@@ -767,7 +767,7 @@ static const struct xe_rtp_entry_sr lrc_was[] = {
 	},
 	{ XE_RTP_NAME("22021007897"),
 	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2002), ENGINE_CLASS(RENDER)),
-	  XE_RTP_ACTIONS(SET(COMMON_SLICE_CHICKEN4, SBE_PUSH_CONSTANT_BEHIND_FIX_ENABLE))
+	  XE_RTP_ACTIONS(SET(XEHP_COMMON_SLICE_CHICKEN4, SBE_PUSH_CONSTANT_BEHIND_FIX_ENABLE))
 	},
 
 	/* Xe3_LPG */
@@ -783,7 +783,7 @@ static const struct xe_rtp_entry_sr lrc_was[] = {
 	},
 	{ XE_RTP_NAME("22021007897"),
 	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3005), ENGINE_CLASS(RENDER)),
-	  XE_RTP_ACTIONS(SET(COMMON_SLICE_CHICKEN4, SBE_PUSH_CONSTANT_BEHIND_FIX_ENABLE))
+	  XE_RTP_ACTIONS(SET(XEHP_COMMON_SLICE_CHICKEN4, SBE_PUSH_CONSTANT_BEHIND_FIX_ENABLE))
 	},
 	{ XE_RTP_NAME("14024681466"),
 	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3005), ENGINE_CLASS(RENDER)),

-- 
2.53.0


^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH v3 4/7] drm/xe: Extract xe_hw_engine_setup_reg_lrc()
  2026-05-14 21:44 [PATCH v3 0/7] Fix MCR inconsistencies in RTP tables Gustavo Sousa
                   ` (2 preceding siblings ...)
  2026-05-14 21:44 ` [PATCH v3 3/7] drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN4 Gustavo Sousa
@ 2026-05-14 21:44 ` Gustavo Sousa
  2026-05-14 21:44 ` [PATCH v3 5/7] drm/xe/kunit: Use KUNIT_EXPECT_EQ() in xe_wa_gt() Gustavo Sousa
                   ` (6 subsequent siblings)
  10 siblings, 0 replies; 12+ messages in thread
From: Gustavo Sousa @ 2026-05-14 21:44 UTC (permalink / raw)
  To: intel-xe; +Cc: Gustavo Sousa, Matt Roper

The steps for processing RTP rules that build up an engine's reg_lrc
arguably belongs to xe_hw_engine.c and should be encapsulated into a
function in that unit.

Move that logic to a new function called xe_hw_engine_setup_reg_lrc().

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
With the dropping of patch "drm/xe/kunit: Include hw_engines in xe_wa
test" from v1, this patch is not really required anymore, but it is a
good refactor IMO, so I decided to keep it in the series.
---
 drivers/gpu/drm/xe/xe_gt.c        |  5 +----
 drivers/gpu/drm/xe/xe_hw_engine.c | 15 +++++++++++++--
 drivers/gpu/drm/xe/xe_hw_engine.h |  2 +-
 3 files changed, 15 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index cdc678d1ae1f..c4b25daad542 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -393,10 +393,7 @@ int xe_gt_record_default_lrcs(struct xe_gt *gt)
 		if (gt->default_lrc[hwe->class])
 			continue;
 
-		xe_reg_sr_init(&hwe->reg_lrc, hwe->name, xe);
-		xe_wa_process_lrc(hwe);
-		xe_hw_engine_setup_default_lrc_state(hwe);
-		xe_tuning_process_lrc(hwe);
+		xe_hw_engine_setup_reg_lrc(hwe);
 
 		default_lrc = drmm_kzalloc(&xe->drm,
 					   xe_gt_lrc_size(gt, hwe->class),
diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
index 0f0e08bcc182..05f0932dbb94 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine.c
+++ b/drivers/gpu/drm/xe/xe_hw_engine.c
@@ -337,8 +337,8 @@ static bool xe_rtp_cfeg_wmtp_disabled(const struct xe_device *xe,
 	return xe_mmio_read32(&hwe->gt->mmio, XEHP_FUSE4) & CFEG_WMTP_DISABLE;
 }
 
-void
-xe_hw_engine_setup_default_lrc_state(struct xe_hw_engine *hwe)
+static void
+hw_engine_setup_default_lrc_state(struct xe_hw_engine *hwe)
 {
 	struct xe_gt *gt = hwe->gt;
 	const u8 mocs_write_idx = gt->mocs.uc_index;
@@ -375,6 +375,17 @@ xe_hw_engine_setup_default_lrc_state(struct xe_hw_engine *hwe)
 			     &hwe->reg_lrc, true);
 }
 
+void xe_hw_engine_setup_reg_lrc(struct xe_hw_engine *hwe)
+{
+	struct xe_gt *gt = hwe->gt;
+	struct xe_device *xe = gt_to_xe(gt);
+
+	xe_reg_sr_init(&hwe->reg_lrc, hwe->name, xe);
+	xe_wa_process_lrc(hwe);
+	hw_engine_setup_default_lrc_state(hwe);
+	xe_tuning_process_lrc(hwe);
+}
+
 static void
 hw_engine_setup_default_state(struct xe_hw_engine *hwe)
 {
diff --git a/drivers/gpu/drm/xe/xe_hw_engine.h b/drivers/gpu/drm/xe/xe_hw_engine.h
index ee9218773b51..c3ee37f8cfc0 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine.h
+++ b/drivers/gpu/drm/xe/xe_hw_engine.h
@@ -59,7 +59,7 @@ struct xe_hw_engine_snapshot *
 xe_hw_engine_snapshot_capture(struct xe_hw_engine *hwe, struct xe_exec_queue *q);
 void xe_hw_engine_snapshot_free(struct xe_hw_engine_snapshot *snapshot);
 void xe_hw_engine_print(struct xe_hw_engine *hwe, struct drm_printer *p);
-void xe_hw_engine_setup_default_lrc_state(struct xe_hw_engine *hwe);
+void xe_hw_engine_setup_reg_lrc(struct xe_hw_engine *hwe);
 
 bool xe_hw_engine_is_reserved(struct xe_hw_engine *hwe);
 

-- 
2.53.0


^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH v3 5/7] drm/xe/kunit: Use KUNIT_EXPECT_EQ() in xe_wa_gt()
  2026-05-14 21:44 [PATCH v3 0/7] Fix MCR inconsistencies in RTP tables Gustavo Sousa
                   ` (3 preceding siblings ...)
  2026-05-14 21:44 ` [PATCH v3 4/7] drm/xe: Extract xe_hw_engine_setup_reg_lrc() Gustavo Sousa
@ 2026-05-14 21:44 ` Gustavo Sousa
  2026-05-14 21:44 ` [PATCH v3 6/7] drm/xe/mcr: Extract reg_in_steering_type_ranges() Gustavo Sousa
                   ` (5 subsequent siblings)
  10 siblings, 0 replies; 12+ messages in thread
From: Gustavo Sousa @ 2026-05-14 21:44 UTC (permalink / raw)
  To: intel-xe; +Cc: Gustavo Sousa, Michal Wajdeczko, Matt Roper

Use KUNIT_EXPECT_EQ() in xe_wa_gt() as reg_sr errors in one GT do not
impact the next GT in the test.

Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/xe/tests/xe_wa_test.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/tests/xe_wa_test.c b/drivers/gpu/drm/xe/tests/xe_wa_test.c
index 49d191043dfa..2bf6fab015cd 100644
--- a/drivers/gpu/drm/xe/tests/xe_wa_test.c
+++ b/drivers/gpu/drm/xe/tests/xe_wa_test.c
@@ -55,7 +55,7 @@ static void xe_wa_gt(struct kunit *test)
 		xe_wa_process_gt(gt);
 		xe_tuning_process_gt(gt);
 
-		KUNIT_ASSERT_EQ(test, gt->reg_sr.errors, 0);
+		KUNIT_EXPECT_EQ(test, gt->reg_sr.errors, 0);
 	}
 }
 

-- 
2.53.0


^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH v3 6/7] drm/xe/mcr: Extract reg_in_steering_type_ranges()
  2026-05-14 21:44 [PATCH v3 0/7] Fix MCR inconsistencies in RTP tables Gustavo Sousa
                   ` (4 preceding siblings ...)
  2026-05-14 21:44 ` [PATCH v3 5/7] drm/xe/kunit: Use KUNIT_EXPECT_EQ() in xe_wa_gt() Gustavo Sousa
@ 2026-05-14 21:44 ` Gustavo Sousa
  2026-05-14 21:44 ` [PATCH v3 7/7] drm/xe/reg_sr: Do sanity check for MCR vs non-MCR Gustavo Sousa
                   ` (4 subsequent siblings)
  10 siblings, 0 replies; 12+ messages in thread
From: Gustavo Sousa @ 2026-05-14 21:44 UTC (permalink / raw)
  To: intel-xe; +Cc: Gustavo Sousa, Matt Roper

The logic to check if a register falls within one of the ranges for a
steering type is already duplicated in
xe_gt_mcr_get_nonterminated_steering().  We will also want to use that
same logic in another upcoming function.  Let's factor out that logic
and put it into a function named reg_in_steering_type_ranges().

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/xe/xe_gt_mcr.c | 43 +++++++++++++++++++++++-------------------
 1 file changed, 24 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_gt_mcr.c b/drivers/gpu/drm/xe/xe_gt_mcr.c
index df281688c617..2b2a4d9c3749 100644
--- a/drivers/gpu/drm/xe/xe_gt_mcr.c
+++ b/drivers/gpu/drm/xe/xe_gt_mcr.c
@@ -600,6 +600,20 @@ void xe_gt_mcr_set_implicit_defaults(struct xe_gt *gt)
 	}
 }
 
+static bool reg_in_steering_type_ranges(struct xe_gt *gt,
+					struct xe_reg reg,
+					int type)
+{
+	if (!gt->steering[type].ranges)
+		return false;
+
+	for (int i = 0; gt->steering[type].ranges[i].end > 0; i++)
+		if (xe_mmio_in_range(&gt->mmio, &gt->steering[type].ranges[i], reg))
+			return true;
+
+	return false;
+}
+
 /*
  * xe_gt_mcr_get_nonterminated_steering - find group/instance values that
  *    will steer a register to a non-terminated instance
@@ -621,30 +635,21 @@ bool xe_gt_mcr_get_nonterminated_steering(struct xe_gt *gt,
 					  u8 *group, u8 *instance)
 {
 	const struct xe_reg reg = to_xe_reg(reg_mcr);
-	const struct xe_mmio_range *implicit_ranges;
 
 	for (int type = 0; type < IMPLICIT_STEERING; type++) {
-		if (!gt->steering[type].ranges)
-			continue;
-
-		for (int i = 0; gt->steering[type].ranges[i].end > 0; i++) {
-			if (xe_mmio_in_range(&gt->mmio, &gt->steering[type].ranges[i], reg)) {
-				drm_WARN(&gt_to_xe(gt)->drm, !gt->steering[type].initialized,
-					 "Uninitialized usage of MCR register %s/%#x\n",
-					 xe_steering_types[type].name, reg.addr);
-
-				*group = gt->steering[type].group_target;
-				*instance = gt->steering[type].instance_target;
-				return true;
-			}
+		if (reg_in_steering_type_ranges(gt, reg, type)) {
+			drm_WARN(&gt_to_xe(gt)->drm, !gt->steering[type].initialized,
+				 "Uninitialized usage of MCR register %s/%#x\n",
+				 xe_steering_types[type].name, reg.addr);
+
+			*group = gt->steering[type].group_target;
+			*instance = gt->steering[type].instance_target;
+			return true;
 		}
 	}
 
-	implicit_ranges = gt->steering[IMPLICIT_STEERING].ranges;
-	if (implicit_ranges)
-		for (int i = 0; implicit_ranges[i].end > 0; i++)
-			if (xe_mmio_in_range(&gt->mmio, &implicit_ranges[i], reg))
-				return false;
+	if (reg_in_steering_type_ranges(gt, reg, IMPLICIT_STEERING))
+		return false;
 
 	/*
 	 * Not found in a steering table and not a register with implicit

-- 
2.53.0


^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH v3 7/7] drm/xe/reg_sr: Do sanity check for MCR vs non-MCR
  2026-05-14 21:44 [PATCH v3 0/7] Fix MCR inconsistencies in RTP tables Gustavo Sousa
                   ` (5 preceding siblings ...)
  2026-05-14 21:44 ` [PATCH v3 6/7] drm/xe/mcr: Extract reg_in_steering_type_ranges() Gustavo Sousa
@ 2026-05-14 21:44 ` Gustavo Sousa
  2026-05-14 23:03 ` ✓ CI.KUnit: success for Fix MCR inconsistencies in RTP tables (rev3) Patchwork
                   ` (3 subsequent siblings)
  10 siblings, 0 replies; 12+ messages in thread
From: Gustavo Sousa @ 2026-05-14 21:44 UTC (permalink / raw)
  To: intel-xe; +Cc: Gustavo Sousa, Matt Roper

The type struct xe_reg_mcr exists to ensure that the correct API is used
when handling MCR registers.  However, for the register save/restore
functionality, the RTP processing always cast the register to a struct
xe_reg and then apply_one_mmio() selects the MMIO API based on the "mcr"
field of the register instance.

This allows the developer to commit mistakes like passing a MCR register
for an RTP action for a GT where the respective register is not MCR; and
vice-versa.

To capture such scenarios, do a sanity check in xe_reg_sr_add() that,
upon an inconsistency:

- "fixes" the register type by favoring what we have in our MCR range
  tables instead of what the developer selected for the save/restore
  entry;
- raises a notice-level message to inform about the inconsistency.

Note: As a collateral of this change, we need to include MCR
initialization in xe_wa_test.c, otherwise a bunch of test cases end up
failing because xe_gt_mcr_check_reg() will always return false, meaning
that will incorrectly say that a MCR register is not MCR.

v2:
  - Downgrade messages to notice level so as not to block CI execution
    when inconsistencies are found. (Matt)
  - Add missing EXPORT_SYMBOL_IF_KUNIT() calls. (Gustavo)

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/xe/tests/xe_rtp_test.c | 71 ++++++++++++++++++++++++++++++----
 drivers/gpu/drm/xe/tests/xe_wa_test.c  | 12 +++++-
 drivers/gpu/drm/xe/xe_gt.c             |  3 ++
 drivers/gpu/drm/xe/xe_gt_mcr.c         | 24 ++++++++++++
 drivers/gpu/drm/xe/xe_gt_mcr.h         |  1 +
 drivers/gpu/drm/xe/xe_reg_sr.c         | 36 +++++++++++++++++
 6 files changed, 139 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/xe/tests/xe_rtp_test.c b/drivers/gpu/drm/xe/tests/xe_rtp_test.c
index e5a0f985a700..5d78f2283df9 100644
--- a/drivers/gpu/drm/xe/tests/xe_rtp_test.c
+++ b/drivers/gpu/drm/xe/tests/xe_rtp_test.c
@@ -9,24 +9,30 @@
 #include <drm/drm_drv.h>
 #include <drm/drm_kunit_helpers.h>
 
+#include <kunit/static_stub.h>
 #include <kunit/test.h>
 
 #include "regs/xe_gt_regs.h"
 #include "regs/xe_reg_defs.h"
 #include "xe_device.h"
 #include "xe_device_types.h"
+#include "xe_gt_mcr.h"
 #include "xe_kunit_helpers.h"
 #include "xe_pci_test.h"
 #include "xe_reg_sr.h"
 #include "xe_rtp.h"
 
-#define REGULAR_REG1	XE_REG(1)
-#define REGULAR_REG2	XE_REG(2)
-#define REGULAR_REG3	XE_REG(3)
-#define MCR_REG1	XE_REG_MCR(1)
-#define MCR_REG2	XE_REG_MCR(2)
-#define MCR_REG3	XE_REG_MCR(3)
-#define MASKED_REG1	XE_REG(1, XE_REG_OPTION_MASKED)
+#define REGULAR_REG1		XE_REG(1)
+#define REGULAR_REG2		XE_REG(2)
+#define REGULAR_REG3		XE_REG(3)
+#define REGULAR_REG4		XE_REG(4)
+#define BAD_REGULAR_REG5	XE_REG(5)
+#define MCR_REG1		XE_REG_MCR(1)
+#define MCR_REG2		XE_REG_MCR(2)
+#define MCR_REG3		XE_REG_MCR(3)
+#define BAD_MCR_REG4		XE_REG_MCR(4)
+#define MCR_REG5		XE_REG_MCR(5)
+#define MASKED_REG1		XE_REG(1, XE_REG_OPTION_MASKED)
 
 #undef XE_REG_MCR
 #define XE_REG_MCR(...)     XE_REG(__VA_ARGS__, .mcr = 1)
@@ -48,6 +54,23 @@ struct rtp_test_case {
 	const struct xe_rtp_entry *entries;
 };
 
+static bool fake_xe_gt_mcr_check_reg(struct xe_gt *gt, struct xe_reg reg)
+{
+	/*
+	 * All supported platforms in this imaginary setup will always have REG4
+	 * as a non-MCR register and REG5 as MCR, meaning that BAD_MCR_REG4 and
+	 * BAD_REGULAR_REG5 represent programming errors to be captured by our
+	 * tests.
+	 */
+	if (reg.raw == BAD_REGULAR_REG5.raw)
+		return true;
+
+	if (reg.raw == BAD_MCR_REG4.raw)
+		return false;
+
+	return reg.mcr;
+}
+
 static bool match_yes(const struct xe_device *xe, const struct xe_gt *gt,
 		      const struct xe_hw_engine *hwe)
 {
@@ -304,6 +327,38 @@ static const struct rtp_to_sr_test_case rtp_to_sr_cases[] = {
 			{}
 		},
 	},
+	{
+		.name = "bad-mcr-reg-forced-to-regular",
+		.expected_reg = REGULAR_REG4,
+		.expected_set_bits = REG_BIT(0),
+		.expected_clr_bits = REG_BIT(0),
+		.expected_active = BIT(0),
+		.expected_count_sr_entries = 1,
+		.expected_sr_errors = 1,
+		.entries = (const struct xe_rtp_entry_sr[]) {
+			{ XE_RTP_NAME("bad-mcr-regular-reg"),
+			  XE_RTP_RULES(FUNC(match_yes)),
+			  XE_RTP_ACTIONS(SET(BAD_MCR_REG4, REG_BIT(0)))
+			},
+			{}
+		},
+	},
+	{
+		.name = "bad-regular-reg-forced-to-mcr",
+		.expected_reg = MCR_REG5,
+		.expected_set_bits = REG_BIT(0),
+		.expected_clr_bits = REG_BIT(0),
+		.expected_active = BIT(0),
+		.expected_count_sr_entries = 1,
+		.expected_sr_errors = 1,
+		.entries = (const struct xe_rtp_entry_sr[]) {
+			{ XE_RTP_NAME("bad-regular-reg"),
+			  XE_RTP_RULES(FUNC(match_yes)),
+			  XE_RTP_ACTIONS(SET(BAD_REGULAR_REG5, REG_BIT(0)))
+			},
+			{}
+		},
+	},
 };
 
 static void xe_rtp_process_to_sr_tests(struct kunit *test)
@@ -523,6 +578,8 @@ static int xe_rtp_test_init(struct kunit *test)
 	xe->drm.dev = dev;
 	test->priv = xe;
 
+	kunit_activate_static_stub(test, xe_gt_mcr_check_reg, fake_xe_gt_mcr_check_reg);
+
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/xe/tests/xe_wa_test.c b/drivers/gpu/drm/xe/tests/xe_wa_test.c
index 2bf6fab015cd..ff0e2502b39f 100644
--- a/drivers/gpu/drm/xe/tests/xe_wa_test.c
+++ b/drivers/gpu/drm/xe/tests/xe_wa_test.c
@@ -9,6 +9,8 @@
 #include <kunit/test.h>
 
 #include "xe_device.h"
+#include "xe_gt.h"
+#include "xe_gt_mcr.h"
 #include "xe_kunit_helpers.h"
 #include "xe_pci_test.h"
 #include "xe_reg_sr.h"
@@ -19,8 +21,10 @@ static int xe_wa_test_init(struct kunit *test)
 {
 	const struct xe_pci_fake_data *param = test->param_value;
 	struct xe_pci_fake_data data = *param;
-	struct xe_device *xe;
 	struct device *dev;
+	struct xe_device *xe;
+	struct xe_gt *gt;
+	int id;
 	int ret;
 
 	dev = drm_kunit_helper_alloc_device(test);
@@ -33,6 +37,12 @@ static int xe_wa_test_init(struct kunit *test)
 	ret = xe_pci_fake_device_init(xe);
 	KUNIT_ASSERT_EQ(test, ret, 0);
 
+	/* Needed for sanitize_mcr(). */
+	for_each_gt(gt, xe, id) {
+		xe_gt_mcr_init_early(gt);
+		xe_gt_mmio_init(gt);
+	}
+
 	if (!param->graphics_verx100)
 		xe->info.step = param->step;
 
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index c4b25daad542..783eb6d631b5 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -7,6 +7,8 @@
 
 #include <linux/minmax.h>
 
+#include <kunit/visibility.h>
+
 #include <drm/drm_managed.h>
 #include <uapi/drm/xe_drm.h>
 
@@ -785,6 +787,7 @@ void xe_gt_mmio_init(struct xe_gt *gt)
 	if (IS_SRIOV_VF(xe))
 		gt->mmio.sriov_vf_gt = gt;
 }
+EXPORT_SYMBOL_IF_KUNIT(xe_gt_mmio_init);
 
 void xe_gt_record_user_engines(struct xe_gt *gt)
 {
diff --git a/drivers/gpu/drm/xe/xe_gt_mcr.c b/drivers/gpu/drm/xe/xe_gt_mcr.c
index 2b2a4d9c3749..04f0098070a4 100644
--- a/drivers/gpu/drm/xe/xe_gt_mcr.c
+++ b/drivers/gpu/drm/xe/xe_gt_mcr.c
@@ -3,6 +3,9 @@
  * Copyright © 2022 Intel Corporation
  */
 
+#include <kunit/static_stub.h>
+#include <kunit/visibility.h>
+
 #include "xe_gt_mcr.h"
 
 #include "regs/xe_gt_regs.h"
@@ -553,6 +556,7 @@ void xe_gt_mcr_init_early(struct xe_gt *gt)
 	/* Mark instance 0 as initialized, we need this early for VRAM and CCS probe. */
 	gt->steering[INSTANCE0].initialized = true;
 }
+EXPORT_SYMBOL_IF_KUNIT(xe_gt_mcr_init_early);
 
 /**
  * xe_gt_mcr_init - Normal initialization of the MCR support
@@ -614,6 +618,26 @@ static bool reg_in_steering_type_ranges(struct xe_gt *gt,
 	return false;
 }
 
+/*
+ * xe_gt_mcr_check_reg - check if a register is recognized by this GT as MCR
+ * @gt: GT structure
+ * @reg: The register to check
+ *
+ * Returns true if the register offset falls within one of the MMIO ranges
+ * classified as MCR for the GT.
+ */
+bool xe_gt_mcr_check_reg(struct xe_gt *gt, struct xe_reg reg)
+{
+	KUNIT_STATIC_STUB_REDIRECT(xe_gt_mcr_check_reg, gt, reg);
+
+	for (int type = 0; type <= IMPLICIT_STEERING; type++)
+		if (reg_in_steering_type_ranges(gt, reg, type))
+			return true;
+
+	return false;
+}
+EXPORT_SYMBOL_IF_KUNIT(xe_gt_mcr_check_reg);
+
 /*
  * xe_gt_mcr_get_nonterminated_steering - find group/instance values that
  *    will steer a register to a non-terminated instance
diff --git a/drivers/gpu/drm/xe/xe_gt_mcr.h b/drivers/gpu/drm/xe/xe_gt_mcr.h
index 2be9419b8acc..75374662f10d 100644
--- a/drivers/gpu/drm/xe/xe_gt_mcr.h
+++ b/drivers/gpu/drm/xe/xe_gt_mcr.h
@@ -26,6 +26,7 @@ void xe_gt_mcr_unicast_write(struct xe_gt *gt, struct xe_reg_mcr mcr_reg,
 void xe_gt_mcr_multicast_write(struct xe_gt *gt, struct xe_reg_mcr mcr_reg,
 			       u32 value);
 
+bool xe_gt_mcr_check_reg(struct xe_gt *gt, struct xe_reg reg);
 bool xe_gt_mcr_get_nonterminated_steering(struct xe_gt *gt,
 					  struct xe_reg_mcr reg_mcr,
 					  u8 *group, u8 *instance);
diff --git a/drivers/gpu/drm/xe/xe_reg_sr.c b/drivers/gpu/drm/xe/xe_reg_sr.c
index 2df0277efb2f..e328f5072557 100644
--- a/drivers/gpu/drm/xe/xe_reg_sr.c
+++ b/drivers/gpu/drm/xe/xe_reg_sr.c
@@ -70,14 +70,49 @@ static void reg_sr_inc_error(struct xe_reg_sr *sr)
 #endif
 }
 
+static struct xe_reg sanitize_mcr(struct xe_reg_sr *sr,
+				  const struct xe_reg_sr_entry *e,
+				  struct xe_gt *gt)
+{
+	struct xe_reg reg = e->reg;
+	bool is_mcr;
+
+	/*
+	 * We need the gt structure to check MCR ranges.
+	 */
+	if (!gt)
+		return reg;
+
+	is_mcr = xe_gt_mcr_check_reg(gt, reg);
+
+	if (is_mcr && !reg.mcr) {
+		reg.mcr = 1;
+		xe_gt_notice(gt, "xe_reg_sr_entry using non-MCR register for address 0x%x, forcing MCR\n",
+			     reg.addr);
+		reg_sr_inc_error(sr);
+	}
+
+	if (!is_mcr && reg.mcr) {
+		reg.mcr = 0;
+		xe_gt_notice(gt, "xe_reg_sr_entry using MCR register for address 0x%x, forcing non-MCR\n",
+			     reg.addr);
+		reg_sr_inc_error(sr);
+	}
+
+	return reg;
+}
+
 int xe_reg_sr_add(struct xe_reg_sr *sr,
 		  const struct xe_reg_sr_entry *e,
 		  struct xe_gt *gt)
 {
 	unsigned long idx = e->reg.addr;
 	struct xe_reg_sr_entry *pentry = xa_load(&sr->xa, idx);
+	struct xe_reg reg;
 	int ret;
 
+	reg = sanitize_mcr(sr, e, gt);
+
 	if (pentry) {
 		if (!compatible_entries(pentry, e)) {
 			ret = -EINVAL;
@@ -98,6 +133,7 @@ int xe_reg_sr_add(struct xe_reg_sr *sr,
 	}
 
 	*pentry = *e;
+	pentry->reg = reg;
 	ret = xa_err(xa_store(&sr->xa, idx, pentry, GFP_KERNEL));
 	if (ret)
 		goto fail_free;

-- 
2.53.0


^ permalink raw reply related	[flat|nested] 12+ messages in thread

* ✓ CI.KUnit: success for Fix MCR inconsistencies in RTP tables (rev3)
  2026-05-14 21:44 [PATCH v3 0/7] Fix MCR inconsistencies in RTP tables Gustavo Sousa
                   ` (6 preceding siblings ...)
  2026-05-14 21:44 ` [PATCH v3 7/7] drm/xe/reg_sr: Do sanity check for MCR vs non-MCR Gustavo Sousa
@ 2026-05-14 23:03 ` Patchwork
  2026-05-14 23:55 ` ✓ Xe.CI.BAT: " Patchwork
                   ` (2 subsequent siblings)
  10 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2026-05-14 23:03 UTC (permalink / raw)
  To: Gustavo Sousa; +Cc: intel-xe

== Series Details ==

Series: Fix MCR inconsistencies in RTP tables (rev3)
URL   : https://patchwork.freedesktop.org/series/160223/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[23:02:22] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[23:02:26] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[23:02:57] Starting KUnit Kernel (1/1)...
[23:02:57] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[23:02:57] ================== guc_buf (11 subtests) ===================
[23:02:57] [PASSED] test_smallest
[23:02:57] [PASSED] test_largest
[23:02:57] [PASSED] test_granular
[23:02:57] [PASSED] test_unique
[23:02:57] [PASSED] test_overlap
[23:02:57] [PASSED] test_reusable
[23:02:57] [PASSED] test_too_big
[23:02:57] [PASSED] test_flush
[23:02:57] [PASSED] test_lookup
[23:02:57] [PASSED] test_data
[23:02:57] [PASSED] test_class
[23:02:57] ===================== [PASSED] guc_buf =====================
[23:02:57] =================== guc_dbm (7 subtests) ===================
[23:02:57] [PASSED] test_empty
[23:02:57] [PASSED] test_default
[23:02:57] ======================== test_size  ========================
[23:02:57] [PASSED] 4
[23:02:57] [PASSED] 8
[23:02:57] [PASSED] 32
[23:02:57] [PASSED] 256
[23:02:57] ==================== [PASSED] test_size ====================
[23:02:57] ======================= test_reuse  ========================
[23:02:57] [PASSED] 4
[23:02:57] [PASSED] 8
[23:02:57] [PASSED] 32
[23:02:57] [PASSED] 256
[23:02:57] =================== [PASSED] test_reuse ====================
[23:02:57] =================== test_range_overlap  ====================
[23:02:57] [PASSED] 4
[23:02:57] [PASSED] 8
[23:02:57] [PASSED] 32
[23:02:57] [PASSED] 256
[23:02:57] =============== [PASSED] test_range_overlap ================
[23:02:57] =================== test_range_compact  ====================
[23:02:57] [PASSED] 4
[23:02:57] [PASSED] 8
[23:02:57] [PASSED] 32
[23:02:57] [PASSED] 256
[23:02:57] =============== [PASSED] test_range_compact ================
[23:02:57] ==================== test_range_spare  =====================
[23:02:57] [PASSED] 4
[23:02:57] [PASSED] 8
[23:02:57] [PASSED] 32
[23:02:57] [PASSED] 256
[23:02:57] ================ [PASSED] test_range_spare =================
[23:02:57] ===================== [PASSED] guc_dbm =====================
[23:02:57] =================== guc_idm (6 subtests) ===================
[23:02:57] [PASSED] bad_init
[23:02:57] [PASSED] no_init
[23:02:57] [PASSED] init_fini
[23:02:57] [PASSED] check_used
[23:02:57] [PASSED] check_quota
[23:02:57] [PASSED] check_all
[23:02:57] ===================== [PASSED] guc_idm =====================
[23:02:57] ================== no_relay (3 subtests) ===================
[23:02:57] [PASSED] xe_drops_guc2pf_if_not_ready
[23:02:57] [PASSED] xe_drops_guc2vf_if_not_ready
[23:02:57] [PASSED] xe_rejects_send_if_not_ready
[23:02:57] ==================== [PASSED] no_relay =====================
[23:02:57] ================== pf_relay (14 subtests) ==================
[23:02:57] [PASSED] pf_rejects_guc2pf_too_short
[23:02:57] [PASSED] pf_rejects_guc2pf_too_long
[23:02:57] [PASSED] pf_rejects_guc2pf_no_payload
[23:02:57] [PASSED] pf_fails_no_payload
[23:02:57] [PASSED] pf_fails_bad_origin
[23:02:57] [PASSED] pf_fails_bad_type
[23:02:57] [PASSED] pf_txn_reports_error
[23:02:57] [PASSED] pf_txn_sends_pf2guc
[23:02:57] [PASSED] pf_sends_pf2guc
[23:02:57] [SKIPPED] pf_loopback_nop
[23:02:57] [SKIPPED] pf_loopback_echo
[23:02:57] [SKIPPED] pf_loopback_fail
[23:02:57] [SKIPPED] pf_loopback_busy
[23:02:57] [SKIPPED] pf_loopback_retry
[23:02:57] ==================== [PASSED] pf_relay =====================
[23:02:57] ================== vf_relay (3 subtests) ===================
[23:02:57] [PASSED] vf_rejects_guc2vf_too_short
[23:02:57] [PASSED] vf_rejects_guc2vf_too_long
[23:02:57] [PASSED] vf_rejects_guc2vf_no_payload
[23:02:57] ==================== [PASSED] vf_relay =====================
[23:02:57] ================ pf_gt_config (9 subtests) =================
[23:02:57] [PASSED] fair_contexts_1vf
[23:02:57] [PASSED] fair_doorbells_1vf
[23:02:57] [PASSED] fair_ggtt_1vf
[23:02:57] ====================== fair_vram_1vf  ======================
[23:02:57] [PASSED] 3.50 GiB
[23:02:57] [PASSED] 11.5 GiB
[23:02:57] [PASSED] 15.5 GiB
[23:02:57] [PASSED] 31.5 GiB
[23:02:57] [PASSED] 63.5 GiB
[23:02:57] [PASSED] 1.91 GiB
[23:02:57] ================== [PASSED] fair_vram_1vf ==================
[23:02:57] ================ fair_vram_1vf_admin_only  =================
[23:02:57] [PASSED] 3.50 GiB
[23:02:57] [PASSED] 11.5 GiB
[23:02:57] [PASSED] 15.5 GiB
[23:02:57] [PASSED] 31.5 GiB
[23:02:57] [PASSED] 63.5 GiB
[23:02:57] [PASSED] 1.91 GiB
[23:02:57] ============ [PASSED] fair_vram_1vf_admin_only =============
[23:02:57] ====================== fair_contexts  ======================
[23:02:57] [PASSED] 1 VF
[23:02:57] [PASSED] 2 VFs
[23:02:57] [PASSED] 3 VFs
[23:02:57] [PASSED] 4 VFs
[23:02:57] [PASSED] 5 VFs
[23:02:57] [PASSED] 6 VFs
[23:02:57] [PASSED] 7 VFs
[23:02:57] [PASSED] 8 VFs
[23:02:57] [PASSED] 9 VFs
[23:02:57] [PASSED] 10 VFs
[23:02:57] [PASSED] 11 VFs
[23:02:57] [PASSED] 12 VFs
[23:02:57] [PASSED] 13 VFs
[23:02:57] [PASSED] 14 VFs
[23:02:57] [PASSED] 15 VFs
[23:02:57] [PASSED] 16 VFs
[23:02:57] [PASSED] 17 VFs
[23:02:57] [PASSED] 18 VFs
[23:02:57] [PASSED] 19 VFs
[23:02:57] [PASSED] 20 VFs
[23:02:58] [PASSED] 21 VFs
[23:02:58] [PASSED] 22 VFs
[23:02:58] [PASSED] 23 VFs
[23:02:58] [PASSED] 24 VFs
[23:02:58] [PASSED] 25 VFs
[23:02:58] [PASSED] 26 VFs
[23:02:58] [PASSED] 27 VFs
[23:02:58] [PASSED] 28 VFs
[23:02:58] [PASSED] 29 VFs
[23:02:58] [PASSED] 30 VFs
[23:02:58] [PASSED] 31 VFs
[23:02:58] [PASSED] 32 VFs
[23:02:58] [PASSED] 33 VFs
[23:02:58] [PASSED] 34 VFs
[23:02:58] [PASSED] 35 VFs
[23:02:58] [PASSED] 36 VFs
[23:02:58] [PASSED] 37 VFs
[23:02:58] [PASSED] 38 VFs
[23:02:58] [PASSED] 39 VFs
[23:02:58] [PASSED] 40 VFs
[23:02:58] [PASSED] 41 VFs
[23:02:58] [PASSED] 42 VFs
[23:02:58] [PASSED] 43 VFs
[23:02:58] [PASSED] 44 VFs
[23:02:58] [PASSED] 45 VFs
[23:02:58] [PASSED] 46 VFs
[23:02:58] [PASSED] 47 VFs
[23:02:58] [PASSED] 48 VFs
[23:02:58] [PASSED] 49 VFs
[23:02:58] [PASSED] 50 VFs
[23:02:58] [PASSED] 51 VFs
[23:02:58] [PASSED] 52 VFs
[23:02:58] [PASSED] 53 VFs
[23:02:58] [PASSED] 54 VFs
[23:02:58] [PASSED] 55 VFs
[23:02:58] [PASSED] 56 VFs
[23:02:58] [PASSED] 57 VFs
[23:02:58] [PASSED] 58 VFs
[23:02:58] [PASSED] 59 VFs
[23:02:58] [PASSED] 60 VFs
[23:02:58] [PASSED] 61 VFs
[23:02:58] [PASSED] 62 VFs
[23:02:58] [PASSED] 63 VFs
[23:02:58] ================== [PASSED] fair_contexts ==================
[23:02:58] ===================== fair_doorbells  ======================
[23:02:58] [PASSED] 1 VF
[23:02:58] [PASSED] 2 VFs
[23:02:58] [PASSED] 3 VFs
[23:02:58] [PASSED] 4 VFs
[23:02:58] [PASSED] 5 VFs
[23:02:58] [PASSED] 6 VFs
[23:02:58] [PASSED] 7 VFs
[23:02:58] [PASSED] 8 VFs
[23:02:58] [PASSED] 9 VFs
[23:02:58] [PASSED] 10 VFs
[23:02:58] [PASSED] 11 VFs
[23:02:58] [PASSED] 12 VFs
[23:02:58] [PASSED] 13 VFs
[23:02:58] [PASSED] 14 VFs
[23:02:58] [PASSED] 15 VFs
[23:02:58] [PASSED] 16 VFs
[23:02:58] [PASSED] 17 VFs
[23:02:58] [PASSED] 18 VFs
[23:02:58] [PASSED] 19 VFs
[23:02:58] [PASSED] 20 VFs
[23:02:58] [PASSED] 21 VFs
[23:02:58] [PASSED] 22 VFs
[23:02:58] [PASSED] 23 VFs
[23:02:58] [PASSED] 24 VFs
[23:02:58] [PASSED] 25 VFs
[23:02:58] [PASSED] 26 VFs
[23:02:58] [PASSED] 27 VFs
[23:02:58] [PASSED] 28 VFs
[23:02:58] [PASSED] 29 VFs
[23:02:58] [PASSED] 30 VFs
[23:02:58] [PASSED] 31 VFs
[23:02:58] [PASSED] 32 VFs
[23:02:58] [PASSED] 33 VFs
[23:02:58] [PASSED] 34 VFs
[23:02:58] [PASSED] 35 VFs
[23:02:58] [PASSED] 36 VFs
[23:02:58] [PASSED] 37 VFs
[23:02:58] [PASSED] 38 VFs
[23:02:58] [PASSED] 39 VFs
[23:02:58] [PASSED] 40 VFs
[23:02:58] [PASSED] 41 VFs
[23:02:58] [PASSED] 42 VFs
[23:02:58] [PASSED] 43 VFs
[23:02:58] [PASSED] 44 VFs
[23:02:58] [PASSED] 45 VFs
[23:02:58] [PASSED] 46 VFs
[23:02:58] [PASSED] 47 VFs
[23:02:58] [PASSED] 48 VFs
[23:02:58] [PASSED] 49 VFs
[23:02:58] [PASSED] 50 VFs
[23:02:58] [PASSED] 51 VFs
[23:02:58] [PASSED] 52 VFs
[23:02:58] [PASSED] 53 VFs
[23:02:58] [PASSED] 54 VFs
[23:02:58] [PASSED] 55 VFs
[23:02:58] [PASSED] 56 VFs
[23:02:58] [PASSED] 57 VFs
[23:02:58] [PASSED] 58 VFs
[23:02:58] [PASSED] 59 VFs
[23:02:58] [PASSED] 60 VFs
[23:02:58] [PASSED] 61 VFs
[23:02:58] [PASSED] 62 VFs
[23:02:58] [PASSED] 63 VFs
[23:02:58] ================= [PASSED] fair_doorbells ==================
[23:02:58] ======================== fair_ggtt  ========================
[23:02:58] [PASSED] 1 VF
[23:02:58] [PASSED] 2 VFs
[23:02:58] [PASSED] 3 VFs
[23:02:58] [PASSED] 4 VFs
[23:02:58] [PASSED] 5 VFs
[23:02:58] [PASSED] 6 VFs
[23:02:58] [PASSED] 7 VFs
[23:02:58] [PASSED] 8 VFs
[23:02:58] [PASSED] 9 VFs
[23:02:58] [PASSED] 10 VFs
[23:02:58] [PASSED] 11 VFs
[23:02:58] [PASSED] 12 VFs
[23:02:58] [PASSED] 13 VFs
[23:02:58] [PASSED] 14 VFs
[23:02:58] [PASSED] 15 VFs
[23:02:58] [PASSED] 16 VFs
[23:02:58] [PASSED] 17 VFs
[23:02:58] [PASSED] 18 VFs
[23:02:58] [PASSED] 19 VFs
[23:02:58] [PASSED] 20 VFs
[23:02:58] [PASSED] 21 VFs
[23:02:58] [PASSED] 22 VFs
[23:02:58] [PASSED] 23 VFs
[23:02:58] [PASSED] 24 VFs
[23:02:58] [PASSED] 25 VFs
[23:02:58] [PASSED] 26 VFs
[23:02:58] [PASSED] 27 VFs
[23:02:58] [PASSED] 28 VFs
[23:02:58] [PASSED] 29 VFs
[23:02:58] [PASSED] 30 VFs
[23:02:58] [PASSED] 31 VFs
[23:02:58] [PASSED] 32 VFs
[23:02:58] [PASSED] 33 VFs
[23:02:58] [PASSED] 34 VFs
[23:02:58] [PASSED] 35 VFs
[23:02:58] [PASSED] 36 VFs
[23:02:58] [PASSED] 37 VFs
[23:02:58] [PASSED] 38 VFs
[23:02:58] [PASSED] 39 VFs
[23:02:58] [PASSED] 40 VFs
[23:02:58] [PASSED] 41 VFs
[23:02:58] [PASSED] 42 VFs
[23:02:58] [PASSED] 43 VFs
[23:02:58] [PASSED] 44 VFs
[23:02:58] [PASSED] 45 VFs
[23:02:58] [PASSED] 46 VFs
[23:02:58] [PASSED] 47 VFs
[23:02:58] [PASSED] 48 VFs
[23:02:58] [PASSED] 49 VFs
[23:02:58] [PASSED] 50 VFs
[23:02:58] [PASSED] 51 VFs
[23:02:58] [PASSED] 52 VFs
[23:02:58] [PASSED] 53 VFs
[23:02:58] [PASSED] 54 VFs
[23:02:58] [PASSED] 55 VFs
[23:02:58] [PASSED] 56 VFs
[23:02:58] [PASSED] 57 VFs
[23:02:58] [PASSED] 58 VFs
[23:02:58] [PASSED] 59 VFs
[23:02:58] [PASSED] 60 VFs
[23:02:58] [PASSED] 61 VFs
[23:02:58] [PASSED] 62 VFs
[23:02:58] [PASSED] 63 VFs
[23:02:58] ==================== [PASSED] fair_ggtt ====================
[23:02:58] ======================== fair_vram  ========================
[23:02:58] [PASSED] 1 VF
[23:02:58] [PASSED] 2 VFs
[23:02:58] [PASSED] 3 VFs
[23:02:58] [PASSED] 4 VFs
[23:02:58] [PASSED] 5 VFs
[23:02:58] [PASSED] 6 VFs
[23:02:58] [PASSED] 7 VFs
[23:02:58] [PASSED] 8 VFs
[23:02:58] [PASSED] 9 VFs
[23:02:58] [PASSED] 10 VFs
[23:02:58] [PASSED] 11 VFs
[23:02:58] [PASSED] 12 VFs
[23:02:58] [PASSED] 13 VFs
[23:02:58] [PASSED] 14 VFs
[23:02:58] [PASSED] 15 VFs
[23:02:58] [PASSED] 16 VFs
[23:02:58] [PASSED] 17 VFs
[23:02:58] [PASSED] 18 VFs
[23:02:58] [PASSED] 19 VFs
[23:02:58] [PASSED] 20 VFs
[23:02:58] [PASSED] 21 VFs
[23:02:58] [PASSED] 22 VFs
[23:02:58] [PASSED] 23 VFs
[23:02:58] [PASSED] 24 VFs
[23:02:58] [PASSED] 25 VFs
[23:02:58] [PASSED] 26 VFs
[23:02:58] [PASSED] 27 VFs
[23:02:58] [PASSED] 28 VFs
[23:02:58] [PASSED] 29 VFs
[23:02:58] [PASSED] 30 VFs
[23:02:58] [PASSED] 31 VFs
[23:02:58] [PASSED] 32 VFs
[23:02:58] [PASSED] 33 VFs
[23:02:58] [PASSED] 34 VFs
[23:02:58] [PASSED] 35 VFs
[23:02:58] [PASSED] 36 VFs
[23:02:58] [PASSED] 37 VFs
[23:02:58] [PASSED] 38 VFs
[23:02:58] [PASSED] 39 VFs
[23:02:58] [PASSED] 40 VFs
[23:02:58] [PASSED] 41 VFs
[23:02:58] [PASSED] 42 VFs
[23:02:58] [PASSED] 43 VFs
[23:02:58] [PASSED] 44 VFs
[23:02:58] [PASSED] 45 VFs
[23:02:58] [PASSED] 46 VFs
[23:02:58] [PASSED] 47 VFs
[23:02:58] [PASSED] 48 VFs
[23:02:58] [PASSED] 49 VFs
[23:02:58] [PASSED] 50 VFs
[23:02:58] [PASSED] 51 VFs
[23:02:58] [PASSED] 52 VFs
[23:02:58] [PASSED] 53 VFs
[23:02:58] [PASSED] 54 VFs
[23:02:58] [PASSED] 55 VFs
[23:02:58] [PASSED] 56 VFs
[23:02:58] [PASSED] 57 VFs
[23:02:58] [PASSED] 58 VFs
[23:02:58] [PASSED] 59 VFs
[23:02:58] [PASSED] 60 VFs
[23:02:58] [PASSED] 61 VFs
[23:02:58] [PASSED] 62 VFs
[23:02:58] [PASSED] 63 VFs
[23:02:58] ==================== [PASSED] fair_vram ====================
[23:02:58] ================== [PASSED] pf_gt_config ===================
[23:02:58] ===================== lmtt (1 subtest) =====================
[23:02:58] ======================== test_ops  =========================
[23:02:58] [PASSED] 2-level
[23:02:58] [PASSED] multi-level
[23:02:58] ==================== [PASSED] test_ops =====================
[23:02:58] ====================== [PASSED] lmtt =======================
[23:02:58] ================= pf_service (11 subtests) =================
[23:02:58] [PASSED] pf_negotiate_any
[23:02:58] [PASSED] pf_negotiate_base_match
[23:02:58] [PASSED] pf_negotiate_base_newer
[23:02:58] [PASSED] pf_negotiate_base_next
[23:02:58] [SKIPPED] pf_negotiate_base_older
[23:02:58] [PASSED] pf_negotiate_base_prev
[23:02:58] [PASSED] pf_negotiate_latest_match
[23:02:58] [PASSED] pf_negotiate_latest_newer
[23:02:58] [PASSED] pf_negotiate_latest_next
[23:02:58] [SKIPPED] pf_negotiate_latest_older
[23:02:58] [SKIPPED] pf_negotiate_latest_prev
[23:02:58] =================== [PASSED] pf_service ====================
[23:02:58] ================= xe_guc_g2g (2 subtests) ==================
[23:02:58] ============== xe_live_guc_g2g_kunit_default  ==============
[23:02:58] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[23:02:58] ============== xe_live_guc_g2g_kunit_allmem  ===============
[23:02:58] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[23:02:58] =================== [SKIPPED] xe_guc_g2g ===================
[23:02:58] =================== xe_mocs (2 subtests) ===================
[23:02:58] ================ xe_live_mocs_kernel_kunit  ================
[23:02:58] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[23:02:58] ================ xe_live_mocs_reset_kunit  =================
[23:02:58] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[23:02:58] ==================== [SKIPPED] xe_mocs =====================
[23:02:58] ================= xe_migrate (2 subtests) ==================
[23:02:58] ================= xe_migrate_sanity_kunit  =================
[23:02:58] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[23:02:58] ================== xe_validate_ccs_kunit  ==================
[23:02:58] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[23:02:58] =================== [SKIPPED] xe_migrate ===================
[23:02:58] ================== xe_dma_buf (1 subtest) ==================
[23:02:58] ==================== xe_dma_buf_kunit  =====================
[23:02:58] ================ [SKIPPED] xe_dma_buf_kunit ================
[23:02:58] =================== [SKIPPED] xe_dma_buf ===================
[23:02:58] ================= xe_bo_shrink (1 subtest) =================
[23:02:58] =================== xe_bo_shrink_kunit  ====================
[23:02:58] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[23:02:58] ================== [SKIPPED] xe_bo_shrink ==================
[23:02:58] ==================== xe_bo (2 subtests) ====================
[23:02:58] ================== xe_ccs_migrate_kunit  ===================
[23:02:58] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[23:02:58] ==================== xe_bo_evict_kunit  ====================
[23:02:58] =============== [SKIPPED] xe_bo_evict_kunit ================
[23:02:58] ===================== [SKIPPED] xe_bo ======================
[23:02:58] ==================== args (13 subtests) ====================
[23:02:58] [PASSED] count_args_test
[23:02:58] [PASSED] call_args_example
[23:02:58] [PASSED] call_args_test
[23:02:58] [PASSED] drop_first_arg_example
[23:02:58] [PASSED] drop_first_arg_test
[23:02:58] [PASSED] first_arg_example
[23:02:58] [PASSED] first_arg_test
[23:02:58] [PASSED] last_arg_example
[23:02:58] [PASSED] last_arg_test
[23:02:58] [PASSED] pick_arg_example
[23:02:58] [PASSED] if_args_example
[23:02:58] [PASSED] if_args_test
[23:02:58] [PASSED] sep_comma_example
[23:02:58] ====================== [PASSED] args =======================
[23:02:58] =================== xe_pci (3 subtests) ====================
[23:02:58] ==================== check_graphics_ip  ====================
[23:02:58] [PASSED] 12.00 Xe_LP
[23:02:58] [PASSED] 12.10 Xe_LP+
[23:02:58] [PASSED] 12.55 Xe_HPG
[23:02:58] [PASSED] 12.60 Xe_HPC
[23:02:58] [PASSED] 12.70 Xe_LPG
[23:02:58] [PASSED] 12.71 Xe_LPG
[23:02:58] [PASSED] 12.74 Xe_LPG+
[23:02:58] [PASSED] 20.01 Xe2_HPG
[23:02:58] [PASSED] 20.02 Xe2_HPG
[23:02:58] [PASSED] 20.04 Xe2_LPG
[23:02:58] [PASSED] 30.00 Xe3_LPG
[23:02:58] [PASSED] 30.01 Xe3_LPG
[23:02:58] [PASSED] 30.03 Xe3_LPG
[23:02:58] [PASSED] 30.04 Xe3_LPG
[23:02:58] [PASSED] 30.05 Xe3_LPG
[23:02:58] [PASSED] 35.10 Xe3p_LPG
[23:02:58] [PASSED] 35.11 Xe3p_XPC
[23:02:58] ================ [PASSED] check_graphics_ip ================
[23:02:58] ===================== check_media_ip  ======================
[23:02:58] [PASSED] 12.00 Xe_M
[23:02:58] [PASSED] 12.55 Xe_HPM
[23:02:58] [PASSED] 13.00 Xe_LPM+
[23:02:58] [PASSED] 13.01 Xe2_HPM
[23:02:58] [PASSED] 20.00 Xe2_LPM
[23:02:58] [PASSED] 30.00 Xe3_LPM
[23:02:58] [PASSED] 30.02 Xe3_LPM
[23:02:58] [PASSED] 35.00 Xe3p_LPM
[23:02:58] [PASSED] 35.03 Xe3p_HPM
[23:02:58] ================= [PASSED] check_media_ip ==================
[23:02:58] =================== check_platform_desc  ===================
[23:02:58] [PASSED] 0x9A60 (TIGERLAKE)
[23:02:58] [PASSED] 0x9A68 (TIGERLAKE)
[23:02:58] [PASSED] 0x9A70 (TIGERLAKE)
[23:02:58] [PASSED] 0x9A40 (TIGERLAKE)
[23:02:58] [PASSED] 0x9A49 (TIGERLAKE)
[23:02:58] [PASSED] 0x9A59 (TIGERLAKE)
[23:02:58] [PASSED] 0x9A78 (TIGERLAKE)
[23:02:58] [PASSED] 0x9AC0 (TIGERLAKE)
[23:02:58] [PASSED] 0x9AC9 (TIGERLAKE)
[23:02:58] [PASSED] 0x9AD9 (TIGERLAKE)
[23:02:58] [PASSED] 0x9AF8 (TIGERLAKE)
[23:02:58] [PASSED] 0x4C80 (ROCKETLAKE)
[23:02:58] [PASSED] 0x4C8A (ROCKETLAKE)
[23:02:58] [PASSED] 0x4C8B (ROCKETLAKE)
[23:02:58] [PASSED] 0x4C8C (ROCKETLAKE)
[23:02:58] [PASSED] 0x4C90 (ROCKETLAKE)
[23:02:58] [PASSED] 0x4C9A (ROCKETLAKE)
[23:02:58] [PASSED] 0x4680 (ALDERLAKE_S)
[23:02:58] [PASSED] 0x4682 (ALDERLAKE_S)
[23:02:58] [PASSED] 0x4688 (ALDERLAKE_S)
[23:02:58] [PASSED] 0x468A (ALDERLAKE_S)
[23:02:58] [PASSED] 0x468B (ALDERLAKE_S)
[23:02:58] [PASSED] 0x4690 (ALDERLAKE_S)
[23:02:58] [PASSED] 0x4692 (ALDERLAKE_S)
[23:02:58] [PASSED] 0x4693 (ALDERLAKE_S)
[23:02:58] [PASSED] 0x46A0 (ALDERLAKE_P)
[23:02:58] [PASSED] 0x46A1 (ALDERLAKE_P)
[23:02:58] [PASSED] 0x46A2 (ALDERLAKE_P)
[23:02:58] [PASSED] 0x46A3 (ALDERLAKE_P)
[23:02:58] [PASSED] 0x46A6 (ALDERLAKE_P)
[23:02:58] [PASSED] 0x46A8 (ALDERLAKE_P)
[23:02:58] [PASSED] 0x46AA (ALDERLAKE_P)
[23:02:58] [PASSED] 0x462A (ALDERLAKE_P)
[23:02:58] [PASSED] 0x4626 (ALDERLAKE_P)
[23:02:58] [PASSED] 0x4628 (ALDERLAKE_P)
[23:02:58] [PASSED] 0x46B0 (ALDERLAKE_P)
[23:02:58] [PASSED] 0x46B1 (ALDERLAKE_P)
[23:02:58] [PASSED] 0x46B2 (ALDERLAKE_P)
[23:02:58] [PASSED] 0x46B3 (ALDERLAKE_P)
[23:02:58] [PASSED] 0x46C0 (ALDERLAKE_P)
[23:02:58] [PASSED] 0x46C1 (ALDERLAKE_P)
[23:02:58] [PASSED] 0x46C2 (ALDERLAKE_P)
[23:02:58] [PASSED] 0x46C3 (ALDERLAKE_P)
[23:02:58] [PASSED] 0x46D0 (ALDERLAKE_N)
[23:02:58] [PASSED] 0x46D1 (ALDERLAKE_N)
[23:02:58] [PASSED] 0x46D2 (ALDERLAKE_N)
[23:02:58] [PASSED] 0x46D3 (ALDERLAKE_N)
[23:02:58] [PASSED] 0x46D4 (ALDERLAKE_N)
[23:02:58] [PASSED] 0xA721 (ALDERLAKE_P)
[23:02:58] [PASSED] 0xA7A1 (ALDERLAKE_P)
[23:02:58] [PASSED] 0xA7A9 (ALDERLAKE_P)
[23:02:58] [PASSED] 0xA7AC (ALDERLAKE_P)
[23:02:58] [PASSED] 0xA7AD (ALDERLAKE_P)
[23:02:58] [PASSED] 0xA720 (ALDERLAKE_P)
[23:02:58] [PASSED] 0xA7A0 (ALDERLAKE_P)
[23:02:58] [PASSED] 0xA7A8 (ALDERLAKE_P)
[23:02:58] [PASSED] 0xA7AA (ALDERLAKE_P)
[23:02:58] [PASSED] 0xA7AB (ALDERLAKE_P)
[23:02:58] [PASSED] 0xA780 (ALDERLAKE_S)
[23:02:58] [PASSED] 0xA781 (ALDERLAKE_S)
[23:02:58] [PASSED] 0xA782 (ALDERLAKE_S)
[23:02:58] [PASSED] 0xA783 (ALDERLAKE_S)
[23:02:58] [PASSED] 0xA788 (ALDERLAKE_S)
[23:02:58] [PASSED] 0xA789 (ALDERLAKE_S)
[23:02:58] [PASSED] 0xA78A (ALDERLAKE_S)
[23:02:58] [PASSED] 0xA78B (ALDERLAKE_S)
[23:02:58] [PASSED] 0x4905 (DG1)
[23:02:58] [PASSED] 0x4906 (DG1)
[23:02:58] [PASSED] 0x4907 (DG1)
[23:02:58] [PASSED] 0x4908 (DG1)
[23:02:58] [PASSED] 0x4909 (DG1)
[23:02:58] [PASSED] 0x56C0 (DG2)
[23:02:58] [PASSED] 0x56C2 (DG2)
[23:02:58] [PASSED] 0x56C1 (DG2)
[23:02:58] [PASSED] 0x7D51 (METEORLAKE)
[23:02:58] [PASSED] 0x7DD1 (METEORLAKE)
[23:02:58] [PASSED] 0x7D41 (METEORLAKE)
[23:02:58] [PASSED] 0x7D67 (METEORLAKE)
[23:02:58] [PASSED] 0xB640 (METEORLAKE)
[23:02:58] [PASSED] 0x56A0 (DG2)
[23:02:58] [PASSED] 0x56A1 (DG2)
[23:02:58] [PASSED] 0x56A2 (DG2)
[23:02:58] [PASSED] 0x56BE (DG2)
[23:02:58] [PASSED] 0x56BF (DG2)
[23:02:58] [PASSED] 0x5690 (DG2)
[23:02:58] [PASSED] 0x5691 (DG2)
[23:02:58] [PASSED] 0x5692 (DG2)
[23:02:58] [PASSED] 0x56A5 (DG2)
[23:02:58] [PASSED] 0x56A6 (DG2)
[23:02:58] [PASSED] 0x56B0 (DG2)
[23:02:58] [PASSED] 0x56B1 (DG2)
[23:02:58] [PASSED] 0x56BA (DG2)
[23:02:58] [PASSED] 0x56BB (DG2)
[23:02:58] [PASSED] 0x56BC (DG2)
[23:02:58] [PASSED] 0x56BD (DG2)
[23:02:58] [PASSED] 0x5693 (DG2)
[23:02:58] [PASSED] 0x5694 (DG2)
[23:02:58] [PASSED] 0x5695 (DG2)
[23:02:58] [PASSED] 0x56A3 (DG2)
[23:02:58] [PASSED] 0x56A4 (DG2)
[23:02:58] [PASSED] 0x56B2 (DG2)
[23:02:58] [PASSED] 0x56B3 (DG2)
[23:02:58] [PASSED] 0x5696 (DG2)
[23:02:58] [PASSED] 0x5697 (DG2)
[23:02:58] [PASSED] 0xB69 (PVC)
[23:02:58] [PASSED] 0xB6E (PVC)
[23:02:58] [PASSED] 0xBD4 (PVC)
[23:02:58] [PASSED] 0xBD5 (PVC)
[23:02:58] [PASSED] 0xBD6 (PVC)
[23:02:58] [PASSED] 0xBD7 (PVC)
[23:02:58] [PASSED] 0xBD8 (PVC)
[23:02:58] [PASSED] 0xBD9 (PVC)
[23:02:58] [PASSED] 0xBDA (PVC)
[23:02:58] [PASSED] 0xBDB (PVC)
[23:02:58] [PASSED] 0xBE0 (PVC)
[23:02:58] [PASSED] 0xBE1 (PVC)
[23:02:58] [PASSED] 0xBE5 (PVC)
[23:02:58] [PASSED] 0x7D40 (METEORLAKE)
[23:02:58] [PASSED] 0x7D45 (METEORLAKE)
[23:02:58] [PASSED] 0x7D55 (METEORLAKE)
[23:02:58] [PASSED] 0x7D60 (METEORLAKE)
[23:02:58] [PASSED] 0x7DD5 (METEORLAKE)
[23:02:58] [PASSED] 0x6420 (LUNARLAKE)
[23:02:58] [PASSED] 0x64A0 (LUNARLAKE)
[23:02:58] [PASSED] 0x64B0 (LUNARLAKE)
[23:02:58] [PASSED] 0xE202 (BATTLEMAGE)
[23:02:58] [PASSED] 0xE209 (BATTLEMAGE)
[23:02:58] [PASSED] 0xE20B (BATTLEMAGE)
[23:02:58] [PASSED] 0xE20C (BATTLEMAGE)
[23:02:58] [PASSED] 0xE20D (BATTLEMAGE)
[23:02:58] [PASSED] 0xE210 (BATTLEMAGE)
[23:02:58] [PASSED] 0xE211 (BATTLEMAGE)
[23:02:58] [PASSED] 0xE212 (BATTLEMAGE)
[23:02:58] [PASSED] 0xE216 (BATTLEMAGE)
[23:02:58] [PASSED] 0xE220 (BATTLEMAGE)
[23:02:58] [PASSED] 0xE221 (BATTLEMAGE)
[23:02:58] [PASSED] 0xE222 (BATTLEMAGE)
[23:02:58] [PASSED] 0xE223 (BATTLEMAGE)
[23:02:58] [PASSED] 0xB080 (PANTHERLAKE)
[23:02:58] [PASSED] 0xB081 (PANTHERLAKE)
[23:02:58] [PASSED] 0xB082 (PANTHERLAKE)
[23:02:58] [PASSED] 0xB083 (PANTHERLAKE)
[23:02:58] [PASSED] 0xB084 (PANTHERLAKE)
[23:02:58] [PASSED] 0xB085 (PANTHERLAKE)
[23:02:58] [PASSED] 0xB086 (PANTHERLAKE)
[23:02:58] [PASSED] 0xB087 (PANTHERLAKE)
[23:02:58] [PASSED] 0xB08F (PANTHERLAKE)
[23:02:58] [PASSED] 0xB090 (PANTHERLAKE)
[23:02:58] [PASSED] 0xB0A0 (PANTHERLAKE)
[23:02:58] [PASSED] 0xB0B0 (PANTHERLAKE)
[23:02:58] [PASSED] 0xFD80 (PANTHERLAKE)
[23:02:58] [PASSED] 0xFD81 (PANTHERLAKE)
[23:02:58] [PASSED] 0xD740 (NOVALAKE_S)
[23:02:58] [PASSED] 0xD741 (NOVALAKE_S)
[23:02:58] [PASSED] 0xD742 (NOVALAKE_S)
[23:02:58] [PASSED] 0xD743 (NOVALAKE_S)
[23:02:58] [PASSED] 0xD744 (NOVALAKE_S)
[23:02:58] [PASSED] 0xD745 (NOVALAKE_S)
[23:02:58] [PASSED] 0x674C (CRESCENTISLAND)
[23:02:58] [PASSED] 0x674D (CRESCENTISLAND)
[23:02:58] [PASSED] 0x674E (CRESCENTISLAND)
[23:02:58] [PASSED] 0x674F (CRESCENTISLAND)
[23:02:58] [PASSED] 0x6750 (CRESCENTISLAND)
[23:02:58] [PASSED] 0xD750 (NOVALAKE_P)
[23:02:58] [PASSED] 0xD751 (NOVALAKE_P)
[23:02:58] [PASSED] 0xD752 (NOVALAKE_P)
[23:02:58] [PASSED] 0xD753 (NOVALAKE_P)
[23:02:58] [PASSED] 0xD754 (NOVALAKE_P)
[23:02:58] [PASSED] 0xD755 (NOVALAKE_P)
[23:02:58] [PASSED] 0xD756 (NOVALAKE_P)
[23:02:58] [PASSED] 0xD757 (NOVALAKE_P)
[23:02:58] [PASSED] 0xD75F (NOVALAKE_P)
[23:02:58] =============== [PASSED] check_platform_desc ===============
[23:02:58] ===================== [PASSED] xe_pci ======================
[23:02:58] =================== xe_rtp (2 subtests) ====================
[23:02:58] =============== xe_rtp_process_to_sr_tests  ================
[23:02:58] [PASSED] coalesce-same-reg
[23:02:58] [PASSED] no-match-no-add
[23:02:58] [PASSED] match-or
[23:02:58] [PASSED] match-or-xfail
[23:02:58] [PASSED] no-match-no-add-multiple-rules
[23:02:58] [PASSED] two-regs-two-entries
[23:02:58] [PASSED] clr-one-set-other
[23:02:58] [PASSED] set-field
[23:02:58] [PASSED] conflict-duplicate
[23:02:58] [PASSED] conflict-not-disjoint
[23:02:58] [PASSED] conflict-reg-type
[23:02:58] [PASSED] bad-mcr-reg-forced-to-regular
[23:02:58] [PASSED] bad-regular-reg-forced-to-mcr
[23:02:58] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[23:02:58] ================== xe_rtp_process_tests  ===================
[23:02:58] [PASSED] active1
[23:02:58] [PASSED] active2
[23:02:58] [PASSED] active-inactive
[23:02:58] [PASSED] inactive-active
[23:02:58] [PASSED] inactive-1st_or_active-inactive
[23:02:58] [PASSED] inactive-2nd_or_active-inactive
[23:02:58] [PASSED] inactive-last_or_active-inactive
[23:02:58] [PASSED] inactive-no_or_active-inactive
[23:02:58] ============== [PASSED] xe_rtp_process_tests ===============
[23:02:58] ===================== [PASSED] xe_rtp ======================
[23:02:58] ==================== xe_wa (1 subtest) =====================
[23:02:58] ======================== xe_wa_gt  =========================
[23:02:58] [PASSED] TIGERLAKE B0
[23:02:58] [PASSED] DG1 A0
[23:02:58] [PASSED] DG1 B0
[23:02:58] [PASSED] ALDERLAKE_S A0
[23:02:58] [PASSED] ALDERLAKE_S B0
[23:02:58] [PASSED] ALDERLAKE_S C0
[23:02:58] [PASSED] ALDERLAKE_S D0
[23:02:58] [PASSED] ALDERLAKE_P A0
[23:02:58] [PASSED] ALDERLAKE_P B0
[23:02:58] [PASSED] ALDERLAKE_P C0
[23:02:58] [PASSED] ALDERLAKE_S RPLS D0
[23:02:58] [PASSED] ALDERLAKE_P RPLU E0
[23:02:58] [PASSED] DG2 G10 C0
[23:02:58] [PASSED] DG2 G11 B1
[23:02:58] [PASSED] DG2 G12 A1
[23:02:58] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[23:02:58] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[23:02:58] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[23:02:58] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[23:02:58] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[23:02:58] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[23:02:58] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[23:02:58] ==================== [PASSED] xe_wa_gt =====================
[23:02:58] ====================== [PASSED] xe_wa ======================
[23:02:58] ============================================================
[23:02:58] Testing complete. Ran 603 tests: passed: 585, skipped: 18
[23:02:58] Elapsed time: 36.224s total, 4.273s configuring, 31.285s building, 0.612s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[23:02:58] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[23:03:00] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[23:03:24] Starting KUnit Kernel (1/1)...
[23:03:24] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[23:03:24] ============ drm_test_pick_cmdline (2 subtests) ============
[23:03:24] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[23:03:24] =============== drm_test_pick_cmdline_named  ===============
[23:03:24] [PASSED] NTSC
[23:03:24] [PASSED] NTSC-J
[23:03:24] [PASSED] PAL
[23:03:24] [PASSED] PAL-M
[23:03:24] =========== [PASSED] drm_test_pick_cmdline_named ===========
[23:03:24] ============== [PASSED] drm_test_pick_cmdline ==============
[23:03:24] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[23:03:24] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[23:03:24] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[23:03:24] =========== drm_validate_clone_mode (2 subtests) ===========
[23:03:24] ============== drm_test_check_in_clone_mode  ===============
[23:03:24] [PASSED] in_clone_mode
[23:03:24] [PASSED] not_in_clone_mode
[23:03:24] ========== [PASSED] drm_test_check_in_clone_mode ===========
[23:03:24] =============== drm_test_check_valid_clones  ===============
[23:03:24] [PASSED] not_in_clone_mode
[23:03:24] [PASSED] valid_clone
[23:03:24] [PASSED] invalid_clone
[23:03:24] =========== [PASSED] drm_test_check_valid_clones ===========
[23:03:24] ============= [PASSED] drm_validate_clone_mode =============
[23:03:24] ============= drm_validate_modeset (1 subtest) =============
[23:03:24] [PASSED] drm_test_check_connector_changed_modeset
[23:03:24] ============== [PASSED] drm_validate_modeset ===============
[23:03:24] ====== drm_test_bridge_get_current_state (2 subtests) ======
[23:03:24] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[23:03:24] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[23:03:24] ======== [PASSED] drm_test_bridge_get_current_state ========
[23:03:24] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[23:03:24] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[23:03:24] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[23:03:24] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[23:03:24] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[23:03:24] ============== drm_bridge_alloc (2 subtests) ===============
[23:03:24] [PASSED] drm_test_drm_bridge_alloc_basic
[23:03:24] [PASSED] drm_test_drm_bridge_alloc_get_put
[23:03:24] ================ [PASSED] drm_bridge_alloc =================
[23:03:24] ============= drm_cmdline_parser (40 subtests) =============
[23:03:24] [PASSED] drm_test_cmdline_force_d_only
[23:03:24] [PASSED] drm_test_cmdline_force_D_only_dvi
[23:03:24] [PASSED] drm_test_cmdline_force_D_only_hdmi
[23:03:24] [PASSED] drm_test_cmdline_force_D_only_not_digital
[23:03:24] [PASSED] drm_test_cmdline_force_e_only
[23:03:24] [PASSED] drm_test_cmdline_res
[23:03:24] [PASSED] drm_test_cmdline_res_vesa
[23:03:24] [PASSED] drm_test_cmdline_res_vesa_rblank
[23:03:24] [PASSED] drm_test_cmdline_res_rblank
[23:03:24] [PASSED] drm_test_cmdline_res_bpp
[23:03:24] [PASSED] drm_test_cmdline_res_refresh
[23:03:24] [PASSED] drm_test_cmdline_res_bpp_refresh
[23:03:24] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[23:03:24] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[23:03:24] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[23:03:24] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[23:03:24] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[23:03:24] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[23:03:24] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[23:03:24] [PASSED] drm_test_cmdline_res_margins_force_on
[23:03:24] [PASSED] drm_test_cmdline_res_vesa_margins
[23:03:24] [PASSED] drm_test_cmdline_name
[23:03:24] [PASSED] drm_test_cmdline_name_bpp
[23:03:24] [PASSED] drm_test_cmdline_name_option
[23:03:24] [PASSED] drm_test_cmdline_name_bpp_option
[23:03:24] [PASSED] drm_test_cmdline_rotate_0
[23:03:24] [PASSED] drm_test_cmdline_rotate_90
[23:03:24] [PASSED] drm_test_cmdline_rotate_180
[23:03:24] [PASSED] drm_test_cmdline_rotate_270
[23:03:24] [PASSED] drm_test_cmdline_hmirror
[23:03:24] [PASSED] drm_test_cmdline_vmirror
[23:03:24] [PASSED] drm_test_cmdline_margin_options
[23:03:24] [PASSED] drm_test_cmdline_multiple_options
[23:03:24] [PASSED] drm_test_cmdline_bpp_extra_and_option
[23:03:24] [PASSED] drm_test_cmdline_extra_and_option
[23:03:24] [PASSED] drm_test_cmdline_freestanding_options
[23:03:24] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[23:03:24] [PASSED] drm_test_cmdline_panel_orientation
[23:03:24] ================ drm_test_cmdline_invalid  =================
[23:03:24] [PASSED] margin_only
[23:03:24] [PASSED] interlace_only
[23:03:24] [PASSED] res_missing_x
[23:03:24] [PASSED] res_missing_y
[23:03:24] [PASSED] res_bad_y
[23:03:24] [PASSED] res_missing_y_bpp
[23:03:24] [PASSED] res_bad_bpp
[23:03:24] [PASSED] res_bad_refresh
[23:03:24] [PASSED] res_bpp_refresh_force_on_off
[23:03:24] [PASSED] res_invalid_mode
[23:03:24] [PASSED] res_bpp_wrong_place_mode
[23:03:24] [PASSED] name_bpp_refresh
[23:03:24] [PASSED] name_refresh
[23:03:24] [PASSED] name_refresh_wrong_mode
[23:03:24] [PASSED] name_refresh_invalid_mode
[23:03:24] [PASSED] rotate_multiple
[23:03:24] [PASSED] rotate_invalid_val
[23:03:24] [PASSED] rotate_truncated
[23:03:24] [PASSED] invalid_option
[23:03:24] [PASSED] invalid_tv_option
[23:03:24] [PASSED] truncated_tv_option
[23:03:24] ============ [PASSED] drm_test_cmdline_invalid =============
[23:03:24] =============== drm_test_cmdline_tv_options  ===============
[23:03:24] [PASSED] NTSC
[23:03:24] [PASSED] NTSC_443
[23:03:24] [PASSED] NTSC_J
[23:03:24] [PASSED] PAL
[23:03:24] [PASSED] PAL_M
[23:03:24] [PASSED] PAL_N
[23:03:24] [PASSED] SECAM
[23:03:24] [PASSED] MONO_525
[23:03:24] [PASSED] MONO_625
[23:03:24] =========== [PASSED] drm_test_cmdline_tv_options ===========
[23:03:24] =============== [PASSED] drm_cmdline_parser ================
[23:03:24] ========== drmm_connector_hdmi_init (20 subtests) ==========
[23:03:24] [PASSED] drm_test_connector_hdmi_init_valid
[23:03:24] [PASSED] drm_test_connector_hdmi_init_bpc_8
[23:03:24] [PASSED] drm_test_connector_hdmi_init_bpc_10
[23:03:24] [PASSED] drm_test_connector_hdmi_init_bpc_12
[23:03:24] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[23:03:24] [PASSED] drm_test_connector_hdmi_init_bpc_null
[23:03:24] [PASSED] drm_test_connector_hdmi_init_formats_empty
[23:03:24] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[23:03:24] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[23:03:24] [PASSED] supported_formats=0x9 yuv420_allowed=1
[23:03:24] [PASSED] supported_formats=0x9 yuv420_allowed=0
[23:03:24] [PASSED] supported_formats=0x5 yuv420_allowed=1
[23:03:24] [PASSED] supported_formats=0x5 yuv420_allowed=0
[23:03:24] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[23:03:24] [PASSED] drm_test_connector_hdmi_init_null_ddc
[23:03:24] [PASSED] drm_test_connector_hdmi_init_null_product
[23:03:24] [PASSED] drm_test_connector_hdmi_init_null_vendor
[23:03:24] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[23:03:24] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[23:03:24] [PASSED] drm_test_connector_hdmi_init_product_valid
[23:03:24] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[23:03:24] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[23:03:24] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[23:03:24] ========= drm_test_connector_hdmi_init_type_valid  =========
[23:03:24] [PASSED] HDMI-A
[23:03:24] [PASSED] HDMI-B
[23:03:24] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[23:03:24] ======== drm_test_connector_hdmi_init_type_invalid  ========
[23:03:24] [PASSED] Unknown
[23:03:24] [PASSED] VGA
[23:03:24] [PASSED] DVI-I
[23:03:24] [PASSED] DVI-D
[23:03:24] [PASSED] DVI-A
[23:03:24] [PASSED] Composite
[23:03:24] [PASSED] SVIDEO
[23:03:24] [PASSED] LVDS
[23:03:24] [PASSED] Component
[23:03:24] [PASSED] DIN
[23:03:24] [PASSED] DP
[23:03:24] [PASSED] TV
[23:03:24] [PASSED] eDP
[23:03:24] [PASSED] Virtual
[23:03:24] [PASSED] DSI
[23:03:24] [PASSED] DPI
[23:03:24] [PASSED] Writeback
[23:03:24] [PASSED] SPI
[23:03:24] [PASSED] USB
[23:03:24] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[23:03:24] ============ [PASSED] drmm_connector_hdmi_init =============
[23:03:24] ============= drmm_connector_init (3 subtests) =============
[23:03:24] [PASSED] drm_test_drmm_connector_init
[23:03:24] [PASSED] drm_test_drmm_connector_init_null_ddc
[23:03:24] ========= drm_test_drmm_connector_init_type_valid  =========
[23:03:24] [PASSED] Unknown
[23:03:24] [PASSED] VGA
[23:03:24] [PASSED] DVI-I
[23:03:24] [PASSED] DVI-D
[23:03:24] [PASSED] DVI-A
[23:03:24] [PASSED] Composite
[23:03:24] [PASSED] SVIDEO
[23:03:24] [PASSED] LVDS
[23:03:24] [PASSED] Component
[23:03:24] [PASSED] DIN
[23:03:24] [PASSED] DP
[23:03:24] [PASSED] HDMI-A
[23:03:24] [PASSED] HDMI-B
[23:03:24] [PASSED] TV
[23:03:24] [PASSED] eDP
[23:03:24] [PASSED] Virtual
[23:03:24] [PASSED] DSI
[23:03:24] [PASSED] DPI
[23:03:24] [PASSED] Writeback
[23:03:24] [PASSED] SPI
[23:03:24] [PASSED] USB
[23:03:24] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[23:03:24] =============== [PASSED] drmm_connector_init ===============
[23:03:24] ========= drm_connector_dynamic_init (6 subtests) ==========
[23:03:24] [PASSED] drm_test_drm_connector_dynamic_init
[23:03:24] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[23:03:24] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[23:03:24] [PASSED] drm_test_drm_connector_dynamic_init_properties
[23:03:24] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[23:03:24] [PASSED] Unknown
[23:03:24] [PASSED] VGA
[23:03:24] [PASSED] DVI-I
[23:03:24] [PASSED] DVI-D
[23:03:24] [PASSED] DVI-A
[23:03:24] [PASSED] Composite
[23:03:24] [PASSED] SVIDEO
[23:03:24] [PASSED] LVDS
[23:03:24] [PASSED] Component
[23:03:24] [PASSED] DIN
[23:03:24] [PASSED] DP
[23:03:24] [PASSED] HDMI-A
[23:03:24] [PASSED] HDMI-B
[23:03:24] [PASSED] TV
[23:03:24] [PASSED] eDP
[23:03:24] [PASSED] Virtual
[23:03:24] [PASSED] DSI
[23:03:24] [PASSED] DPI
[23:03:24] [PASSED] Writeback
[23:03:24] [PASSED] SPI
[23:03:24] [PASSED] USB
[23:03:24] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[23:03:24] ======== drm_test_drm_connector_dynamic_init_name  =========
[23:03:24] [PASSED] Unknown
[23:03:24] [PASSED] VGA
[23:03:24] [PASSED] DVI-I
[23:03:24] [PASSED] DVI-D
[23:03:24] [PASSED] DVI-A
[23:03:24] [PASSED] Composite
[23:03:24] [PASSED] SVIDEO
[23:03:24] [PASSED] LVDS
[23:03:24] [PASSED] Component
[23:03:24] [PASSED] DIN
[23:03:24] [PASSED] DP
[23:03:24] [PASSED] HDMI-A
[23:03:24] [PASSED] HDMI-B
[23:03:24] [PASSED] TV
[23:03:24] [PASSED] eDP
[23:03:24] [PASSED] Virtual
[23:03:24] [PASSED] DSI
[23:03:24] [PASSED] DPI
[23:03:24] [PASSED] Writeback
[23:03:24] [PASSED] SPI
[23:03:24] [PASSED] USB
[23:03:24] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[23:03:24] =========== [PASSED] drm_connector_dynamic_init ============
[23:03:24] ==== drm_connector_dynamic_register_early (4 subtests) =====
[23:03:24] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[23:03:24] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[23:03:24] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[23:03:24] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[23:03:24] ====== [PASSED] drm_connector_dynamic_register_early =======
[23:03:24] ======= drm_connector_dynamic_register (7 subtests) ========
[23:03:24] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[23:03:24] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[23:03:24] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[23:03:24] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[23:03:24] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[23:03:24] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[23:03:24] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[23:03:24] ========= [PASSED] drm_connector_dynamic_register ==========
[23:03:24] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[23:03:24] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[23:03:24] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[23:03:24] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[23:03:24] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[23:03:24] ========== drm_test_get_tv_mode_from_name_valid  ===========
[23:03:24] [PASSED] NTSC
[23:03:24] [PASSED] NTSC-443
[23:03:24] [PASSED] NTSC-J
[23:03:24] [PASSED] PAL
[23:03:24] [PASSED] PAL-M
[23:03:24] [PASSED] PAL-N
[23:03:24] [PASSED] SECAM
[23:03:24] [PASSED] Mono
[23:03:24] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[23:03:24] [PASSED] drm_test_get_tv_mode_from_name_truncated
[23:03:24] ============ [PASSED] drm_get_tv_mode_from_name ============
[23:03:24] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[23:03:24] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[23:03:24] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[23:03:24] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[23:03:24] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[23:03:24] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[23:03:24] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[23:03:24] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[23:03:24] [PASSED] VIC 96
[23:03:24] [PASSED] VIC 97
[23:03:24] [PASSED] VIC 101
[23:03:24] [PASSED] VIC 102
[23:03:24] [PASSED] VIC 106
[23:03:24] [PASSED] VIC 107
[23:03:24] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[23:03:24] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[23:03:24] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[23:03:24] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[23:03:24] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[23:03:24] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[23:03:24] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[23:03:24] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[23:03:24] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[23:03:24] [PASSED] Automatic
[23:03:24] [PASSED] Full
[23:03:24] [PASSED] Limited 16:235
[23:03:24] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[23:03:24] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[23:03:24] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[23:03:24] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[23:03:24] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[23:03:24] [PASSED] RGB
[23:03:24] [PASSED] YUV 4:2:0
[23:03:24] [PASSED] YUV 4:2:2
[23:03:24] [PASSED] YUV 4:4:4
[23:03:24] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[23:03:24] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[23:03:24] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[23:03:24] ============= drm_damage_helper (21 subtests) ==============
[23:03:24] [PASSED] drm_test_damage_iter_no_damage
[23:03:24] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[23:03:24] [PASSED] drm_test_damage_iter_no_damage_src_moved
[23:03:24] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[23:03:24] [PASSED] drm_test_damage_iter_no_damage_not_visible
[23:03:24] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[23:03:24] [PASSED] drm_test_damage_iter_no_damage_no_fb
[23:03:24] [PASSED] drm_test_damage_iter_simple_damage
[23:03:24] [PASSED] drm_test_damage_iter_single_damage
[23:03:24] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[23:03:24] [PASSED] drm_test_damage_iter_single_damage_outside_src
[23:03:24] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[23:03:24] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[23:03:24] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[23:03:24] [PASSED] drm_test_damage_iter_single_damage_src_moved
[23:03:24] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[23:03:24] [PASSED] drm_test_damage_iter_damage
[23:03:24] [PASSED] drm_test_damage_iter_damage_one_intersect
[23:03:24] [PASSED] drm_test_damage_iter_damage_one_outside
[23:03:24] [PASSED] drm_test_damage_iter_damage_src_moved
[23:03:24] [PASSED] drm_test_damage_iter_damage_not_visible
[23:03:24] ================ [PASSED] drm_damage_helper ================
[23:03:24] ============== drm_dp_mst_helper (3 subtests) ==============
[23:03:24] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[23:03:24] [PASSED] Clock 154000 BPP 30 DSC disabled
[23:03:24] [PASSED] Clock 234000 BPP 30 DSC disabled
[23:03:24] [PASSED] Clock 297000 BPP 24 DSC disabled
[23:03:24] [PASSED] Clock 332880 BPP 24 DSC enabled
[23:03:24] [PASSED] Clock 324540 BPP 24 DSC enabled
[23:03:24] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[23:03:24] ============== drm_test_dp_mst_calc_pbn_div  ===============
[23:03:24] [PASSED] Link rate 2000000 lane count 4
[23:03:24] [PASSED] Link rate 2000000 lane count 2
[23:03:24] [PASSED] Link rate 2000000 lane count 1
[23:03:24] [PASSED] Link rate 1350000 lane count 4
[23:03:24] [PASSED] Link rate 1350000 lane count 2
[23:03:24] [PASSED] Link rate 1350000 lane count 1
[23:03:24] [PASSED] Link rate 1000000 lane count 4
[23:03:24] [PASSED] Link rate 1000000 lane count 2
[23:03:24] [PASSED] Link rate 1000000 lane count 1
[23:03:24] [PASSED] Link rate 810000 lane count 4
[23:03:24] [PASSED] Link rate 810000 lane count 2
[23:03:24] [PASSED] Link rate 810000 lane count 1
[23:03:24] [PASSED] Link rate 540000 lane count 4
[23:03:24] [PASSED] Link rate 540000 lane count 2
[23:03:24] [PASSED] Link rate 540000 lane count 1
[23:03:24] [PASSED] Link rate 270000 lane count 4
[23:03:24] [PASSED] Link rate 270000 lane count 2
[23:03:24] [PASSED] Link rate 270000 lane count 1
[23:03:24] [PASSED] Link rate 162000 lane count 4
[23:03:24] [PASSED] Link rate 162000 lane count 2
[23:03:24] [PASSED] Link rate 162000 lane count 1
[23:03:24] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[23:03:24] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[23:03:24] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[23:03:24] [PASSED] DP_POWER_UP_PHY with port number
[23:03:24] [PASSED] DP_POWER_DOWN_PHY with port number
[23:03:24] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[23:03:24] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[23:03:24] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[23:03:24] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[23:03:24] [PASSED] DP_QUERY_PAYLOAD with port number
[23:03:24] [PASSED] DP_QUERY_PAYLOAD with VCPI
[23:03:24] [PASSED] DP_REMOTE_DPCD_READ with port number
[23:03:24] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[23:03:24] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[23:03:24] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[23:03:24] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[23:03:24] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[23:03:24] [PASSED] DP_REMOTE_I2C_READ with port number
[23:03:24] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[23:03:24] [PASSED] DP_REMOTE_I2C_READ with transactions array
[23:03:24] [PASSED] DP_REMOTE_I2C_WRITE with port number
[23:03:24] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[23:03:24] [PASSED] DP_REMOTE_I2C_WRITE with data array
[23:03:24] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[23:03:24] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[23:03:24] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[23:03:24] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[23:03:24] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[23:03:24] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[23:03:24] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[23:03:24] ================ [PASSED] drm_dp_mst_helper ================
[23:03:24] ================== drm_exec (7 subtests) ===================
[23:03:24] [PASSED] sanitycheck
[23:03:24] [PASSED] test_lock
[23:03:24] [PASSED] test_lock_unlock
[23:03:24] [PASSED] test_duplicates
[23:03:24] [PASSED] test_prepare
[23:03:24] [PASSED] test_prepare_array
[23:03:24] [PASSED] test_multiple_loops
[23:03:24] ==================== [PASSED] drm_exec =====================
[23:03:24] =========== drm_format_helper_test (17 subtests) ===========
[23:03:24] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[23:03:24] [PASSED] single_pixel_source_buffer
[23:03:24] [PASSED] single_pixel_clip_rectangle
[23:03:24] [PASSED] well_known_colors
[23:03:24] [PASSED] destination_pitch
[23:03:24] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[23:03:24] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[23:03:24] [PASSED] single_pixel_source_buffer
[23:03:24] [PASSED] single_pixel_clip_rectangle
[23:03:24] [PASSED] well_known_colors
[23:03:24] [PASSED] destination_pitch
[23:03:24] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[23:03:24] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[23:03:24] [PASSED] single_pixel_source_buffer
[23:03:24] [PASSED] single_pixel_clip_rectangle
[23:03:24] [PASSED] well_known_colors
[23:03:24] [PASSED] destination_pitch
[23:03:24] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[23:03:24] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[23:03:24] [PASSED] single_pixel_source_buffer
[23:03:24] [PASSED] single_pixel_clip_rectangle
[23:03:24] [PASSED] well_known_colors
[23:03:24] [PASSED] destination_pitch
[23:03:24] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[23:03:24] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[23:03:24] [PASSED] single_pixel_source_buffer
[23:03:24] [PASSED] single_pixel_clip_rectangle
[23:03:24] [PASSED] well_known_colors
[23:03:24] [PASSED] destination_pitch
[23:03:24] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[23:03:24] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[23:03:24] [PASSED] single_pixel_source_buffer
[23:03:24] [PASSED] single_pixel_clip_rectangle
[23:03:24] [PASSED] well_known_colors
[23:03:24] [PASSED] destination_pitch
[23:03:24] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[23:03:24] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[23:03:24] [PASSED] single_pixel_source_buffer
[23:03:24] [PASSED] single_pixel_clip_rectangle
[23:03:24] [PASSED] well_known_colors
[23:03:24] [PASSED] destination_pitch
[23:03:24] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[23:03:24] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[23:03:24] [PASSED] single_pixel_source_buffer
[23:03:24] [PASSED] single_pixel_clip_rectangle
[23:03:24] [PASSED] well_known_colors
[23:03:24] [PASSED] destination_pitch
[23:03:24] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[23:03:24] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[23:03:24] [PASSED] single_pixel_source_buffer
[23:03:24] [PASSED] single_pixel_clip_rectangle
[23:03:24] [PASSED] well_known_colors
[23:03:24] [PASSED] destination_pitch
[23:03:24] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[23:03:24] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[23:03:24] [PASSED] single_pixel_source_buffer
[23:03:24] [PASSED] single_pixel_clip_rectangle
[23:03:24] [PASSED] well_known_colors
[23:03:24] [PASSED] destination_pitch
[23:03:24] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[23:03:24] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[23:03:24] [PASSED] single_pixel_source_buffer
[23:03:24] [PASSED] single_pixel_clip_rectangle
[23:03:24] [PASSED] well_known_colors
[23:03:24] [PASSED] destination_pitch
[23:03:24] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[23:03:24] ============== drm_test_fb_xrgb8888_to_mono  ===============
[23:03:24] [PASSED] single_pixel_source_buffer
[23:03:24] [PASSED] single_pixel_clip_rectangle
[23:03:24] [PASSED] well_known_colors
[23:03:24] [PASSED] destination_pitch
[23:03:24] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[23:03:24] ==================== drm_test_fb_swab  =====================
[23:03:24] [PASSED] single_pixel_source_buffer
[23:03:24] [PASSED] single_pixel_clip_rectangle
[23:03:24] [PASSED] well_known_colors
[23:03:24] [PASSED] destination_pitch
[23:03:24] ================ [PASSED] drm_test_fb_swab =================
[23:03:24] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[23:03:24] [PASSED] single_pixel_source_buffer
[23:03:24] [PASSED] single_pixel_clip_rectangle
[23:03:24] [PASSED] well_known_colors
[23:03:24] [PASSED] destination_pitch
[23:03:24] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[23:03:24] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[23:03:24] [PASSED] single_pixel_source_buffer
[23:03:24] [PASSED] single_pixel_clip_rectangle
[23:03:24] [PASSED] well_known_colors
[23:03:24] [PASSED] destination_pitch
[23:03:24] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[23:03:24] ================= drm_test_fb_clip_offset  =================
[23:03:24] [PASSED] pass through
[23:03:24] [PASSED] horizontal offset
[23:03:24] [PASSED] vertical offset
[23:03:24] [PASSED] horizontal and vertical offset
[23:03:24] [PASSED] horizontal offset (custom pitch)
[23:03:24] [PASSED] vertical offset (custom pitch)
[23:03:24] [PASSED] horizontal and vertical offset (custom pitch)
[23:03:24] ============= [PASSED] drm_test_fb_clip_offset =============
[23:03:24] =================== drm_test_fb_memcpy  ====================
[23:03:24] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[23:03:24] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[23:03:24] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[23:03:24] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[23:03:24] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[23:03:24] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[23:03:24] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[23:03:24] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[23:03:24] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[23:03:24] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[23:03:24] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[23:03:24] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[23:03:24] =============== [PASSED] drm_test_fb_memcpy ================
[23:03:24] ============= [PASSED] drm_format_helper_test ==============
[23:03:24] ================= drm_format (18 subtests) =================
[23:03:24] [PASSED] drm_test_format_block_width_invalid
[23:03:24] [PASSED] drm_test_format_block_width_one_plane
[23:03:24] [PASSED] drm_test_format_block_width_two_plane
[23:03:24] [PASSED] drm_test_format_block_width_three_plane
[23:03:24] [PASSED] drm_test_format_block_width_tiled
[23:03:24] [PASSED] drm_test_format_block_height_invalid
[23:03:24] [PASSED] drm_test_format_block_height_one_plane
[23:03:24] [PASSED] drm_test_format_block_height_two_plane
[23:03:24] [PASSED] drm_test_format_block_height_three_plane
[23:03:24] [PASSED] drm_test_format_block_height_tiled
[23:03:24] [PASSED] drm_test_format_min_pitch_invalid
[23:03:24] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[23:03:24] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[23:03:24] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[23:03:24] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[23:03:24] [PASSED] drm_test_format_min_pitch_two_plane
[23:03:24] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[23:03:24] [PASSED] drm_test_format_min_pitch_tiled
[23:03:24] =================== [PASSED] drm_format ====================
[23:03:24] ============== drm_framebuffer (10 subtests) ===============
[23:03:24] ========== drm_test_framebuffer_check_src_coords  ==========
[23:03:24] [PASSED] Success: source fits into fb
[23:03:24] [PASSED] Fail: overflowing fb with x-axis coordinate
[23:03:24] [PASSED] Fail: overflowing fb with y-axis coordinate
[23:03:24] [PASSED] Fail: overflowing fb with source width
[23:03:24] [PASSED] Fail: overflowing fb with source height
[23:03:24] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[23:03:24] [PASSED] drm_test_framebuffer_cleanup
[23:03:24] =============== drm_test_framebuffer_create  ===============
[23:03:24] [PASSED] ABGR8888 normal sizes
[23:03:24] [PASSED] ABGR8888 max sizes
[23:03:24] [PASSED] ABGR8888 pitch greater than min required
[23:03:24] [PASSED] ABGR8888 pitch less than min required
[23:03:24] [PASSED] ABGR8888 Invalid width
[23:03:24] [PASSED] ABGR8888 Invalid buffer handle
[23:03:24] [PASSED] No pixel format
[23:03:24] [PASSED] ABGR8888 Width 0
[23:03:24] [PASSED] ABGR8888 Height 0
[23:03:24] [PASSED] ABGR8888 Out of bound height * pitch combination
[23:03:24] [PASSED] ABGR8888 Large buffer offset
[23:03:24] [PASSED] ABGR8888 Buffer offset for inexistent plane
[23:03:24] [PASSED] ABGR8888 Invalid flag
[23:03:24] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[23:03:24] [PASSED] ABGR8888 Valid buffer modifier
[23:03:24] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[23:03:24] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[23:03:24] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[23:03:24] [PASSED] NV12 Normal sizes
[23:03:24] [PASSED] NV12 Max sizes
[23:03:24] [PASSED] NV12 Invalid pitch
[23:03:24] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[23:03:24] [PASSED] NV12 different  modifier per-plane
[23:03:24] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[23:03:24] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[23:03:24] [PASSED] NV12 Modifier for inexistent plane
[23:03:24] [PASSED] NV12 Handle for inexistent plane
[23:03:24] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[23:03:24] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[23:03:24] [PASSED] YVU420 Normal sizes
[23:03:24] [PASSED] YVU420 Max sizes
[23:03:24] [PASSED] YVU420 Invalid pitch
[23:03:24] [PASSED] YVU420 Different pitches
[23:03:24] [PASSED] YVU420 Different buffer offsets/pitches
[23:03:24] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[23:03:24] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[23:03:24] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[23:03:24] [PASSED] YVU420 Valid modifier
[23:03:24] [PASSED] YVU420 Different modifiers per plane
[23:03:24] [PASSED] YVU420 Modifier for inexistent plane
[23:03:24] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[23:03:24] [PASSED] X0L2 Normal sizes
[23:03:24] [PASSED] X0L2 Max sizes
[23:03:24] [PASSED] X0L2 Invalid pitch
[23:03:24] [PASSED] X0L2 Pitch greater than minimum required
[23:03:24] [PASSED] X0L2 Handle for inexistent plane
[23:03:24] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[23:03:24] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[23:03:24] [PASSED] X0L2 Valid modifier
[23:03:24] [PASSED] X0L2 Modifier for inexistent plane
[23:03:24] =========== [PASSED] drm_test_framebuffer_create ===========
[23:03:24] [PASSED] drm_test_framebuffer_free
[23:03:24] [PASSED] drm_test_framebuffer_init
[23:03:24] [PASSED] drm_test_framebuffer_init_bad_format
[23:03:24] [PASSED] drm_test_framebuffer_init_dev_mismatch
[23:03:24] [PASSED] drm_test_framebuffer_lookup
[23:03:24] [PASSED] drm_test_framebuffer_lookup_inexistent
[23:03:24] [PASSED] drm_test_framebuffer_modifiers_not_supported
[23:03:24] ================= [PASSED] drm_framebuffer =================
[23:03:24] ================ drm_gem_shmem (8 subtests) ================
[23:03:24] [PASSED] drm_gem_shmem_test_obj_create
[23:03:24] [PASSED] drm_gem_shmem_test_obj_create_private
[23:03:24] [PASSED] drm_gem_shmem_test_pin_pages
[23:03:24] [PASSED] drm_gem_shmem_test_vmap
[23:03:24] [PASSED] drm_gem_shmem_test_get_sg_table
[23:03:24] [PASSED] drm_gem_shmem_test_get_pages_sgt
[23:03:24] [PASSED] drm_gem_shmem_test_madvise
[23:03:24] [PASSED] drm_gem_shmem_test_purge
[23:03:24] ================== [PASSED] drm_gem_shmem ==================
[23:03:24] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[23:03:24] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[23:03:24] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[23:03:24] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[23:03:24] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[23:03:24] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[23:03:24] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[23:03:24] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[23:03:24] [PASSED] Automatic
[23:03:24] [PASSED] Full
[23:03:24] [PASSED] Limited 16:235
[23:03:24] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[23:03:24] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[23:03:24] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[23:03:24] [PASSED] drm_test_check_disable_connector
[23:03:24] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[23:03:24] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[23:03:24] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[23:03:24] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[23:03:24] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[23:03:24] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[23:03:24] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[23:03:24] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[23:03:24] [PASSED] drm_test_check_output_bpc_dvi
[23:03:24] [PASSED] drm_test_check_output_bpc_format_vic_1
[23:03:24] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[23:03:24] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[23:03:24] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[23:03:24] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[23:03:24] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[23:03:24] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[23:03:24] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[23:03:24] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[23:03:24] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[23:03:24] [PASSED] drm_test_check_broadcast_rgb_value
[23:03:24] [PASSED] drm_test_check_bpc_8_value
[23:03:24] [PASSED] drm_test_check_bpc_10_value
[23:03:24] [PASSED] drm_test_check_bpc_12_value
[23:03:24] [PASSED] drm_test_check_format_value
[23:03:24] [PASSED] drm_test_check_tmds_char_value
[23:03:24] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[23:03:24] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[23:03:24] [PASSED] drm_test_check_mode_valid
[23:03:24] [PASSED] drm_test_check_mode_valid_reject
[23:03:24] [PASSED] drm_test_check_mode_valid_reject_rate
[23:03:24] [PASSED] drm_test_check_mode_valid_reject_max_clock
[23:03:24] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[23:03:24] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[23:03:24] [PASSED] drm_test_check_infoframes
[23:03:24] [PASSED] drm_test_check_reject_avi_infoframe
[23:03:24] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[23:03:24] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[23:03:24] [PASSED] drm_test_check_reject_audio_infoframe
[23:03:24] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[23:03:24] ================= drm_managed (2 subtests) =================
[23:03:24] [PASSED] drm_test_managed_release_action
[23:03:24] [PASSED] drm_test_managed_run_action
[23:03:24] =================== [PASSED] drm_managed ===================
[23:03:24] =================== drm_mm (6 subtests) ====================
[23:03:24] [PASSED] drm_test_mm_init
[23:03:24] [PASSED] drm_test_mm_debug
[23:03:24] [PASSED] drm_test_mm_align32
[23:03:24] [PASSED] drm_test_mm_align64
[23:03:24] [PASSED] drm_test_mm_lowest
[23:03:24] [PASSED] drm_test_mm_highest
[23:03:24] ===================== [PASSED] drm_mm ======================
[23:03:24] ============= drm_modes_analog_tv (5 subtests) =============
[23:03:24] [PASSED] drm_test_modes_analog_tv_mono_576i
[23:03:24] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[23:03:24] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[23:03:24] [PASSED] drm_test_modes_analog_tv_pal_576i
[23:03:24] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[23:03:24] =============== [PASSED] drm_modes_analog_tv ===============
[23:03:24] ============== drm_plane_helper (2 subtests) ===============
[23:03:24] =============== drm_test_check_plane_state  ================
[23:03:24] [PASSED] clipping_simple
[23:03:24] [PASSED] clipping_rotate_reflect
[23:03:24] [PASSED] positioning_simple
[23:03:24] [PASSED] upscaling
[23:03:24] [PASSED] downscaling
[23:03:24] [PASSED] rounding1
[23:03:24] [PASSED] rounding2
[23:03:24] [PASSED] rounding3
[23:03:24] [PASSED] rounding4
[23:03:24] =========== [PASSED] drm_test_check_plane_state ============
[23:03:24] =========== drm_test_check_invalid_plane_state  ============
[23:03:24] [PASSED] positioning_invalid
[23:03:24] [PASSED] upscaling_invalid
[23:03:24] [PASSED] downscaling_invalid
[23:03:24] ======= [PASSED] drm_test_check_invalid_plane_state ========
[23:03:24] ================ [PASSED] drm_plane_helper =================
[23:03:24] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[23:03:24] ====== drm_test_connector_helper_tv_get_modes_check  =======
[23:03:24] [PASSED] None
[23:03:24] [PASSED] PAL
[23:03:24] [PASSED] NTSC
[23:03:24] [PASSED] Both, NTSC Default
[23:03:24] [PASSED] Both, PAL Default
[23:03:24] [PASSED] Both, NTSC Default, with PAL on command-line
[23:03:24] [PASSED] Both, PAL Default, with NTSC on command-line
[23:03:24] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[23:03:24] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[23:03:24] ================== drm_rect (9 subtests) ===================
[23:03:24] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[23:03:24] [PASSED] drm_test_rect_clip_scaled_not_clipped
[23:03:24] [PASSED] drm_test_rect_clip_scaled_clipped
[23:03:24] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[23:03:24] ================= drm_test_rect_intersect  =================
[23:03:24] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[23:03:24] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[23:03:24] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[23:03:24] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[23:03:24] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[23:03:24] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[23:03:24] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[23:03:24] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[23:03:24] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[23:03:24] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[23:03:24] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[23:03:24] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[23:03:24] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[23:03:24] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[23:03:24] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[23:03:24] ============= [PASSED] drm_test_rect_intersect =============
[23:03:24] ================ drm_test_rect_calc_hscale  ================
[23:03:24] [PASSED] normal use
[23:03:24] [PASSED] out of max range
[23:03:24] [PASSED] out of min range
[23:03:24] [PASSED] zero dst
[23:03:24] [PASSED] negative src
[23:03:24] [PASSED] negative dst
[23:03:24] ============ [PASSED] drm_test_rect_calc_hscale ============
[23:03:24] ================ drm_test_rect_calc_vscale  ================
[23:03:24] [PASSED] normal use
[23:03:24] [PASSED] out of max range
[23:03:24] [PASSED] out of min range
[23:03:24] [PASSED] zero dst
[23:03:24] [PASSED] negative src
[23:03:24] [PASSED] negative dst
[23:03:24] ============ [PASSED] drm_test_rect_calc_vscale ============
[23:03:24] ================== drm_test_rect_rotate  ===================
[23:03:24] [PASSED] reflect-x
[23:03:24] [PASSED] reflect-y
[23:03:24] [PASSED] rotate-0
[23:03:24] [PASSED] rotate-90
[23:03:24] [PASSED] rotate-180
[23:03:24] [PASSED] rotate-270
[23:03:24] ============== [PASSED] drm_test_rect_rotate ===============
[23:03:24] ================ drm_test_rect_rotate_inv  =================
[23:03:24] [PASSED] reflect-x
[23:03:24] [PASSED] reflect-y
[23:03:24] [PASSED] rotate-0
[23:03:24] [PASSED] rotate-90
[23:03:24] [PASSED] rotate-180
[23:03:24] [PASSED] rotate-270
[23:03:24] ============ [PASSED] drm_test_rect_rotate_inv =============
[23:03:24] ==================== [PASSED] drm_rect =====================
[23:03:24] ============ drm_sysfb_modeset_test (1 subtest) ============
[23:03:24] ============ drm_test_sysfb_build_fourcc_list  =============
[23:03:24] [PASSED] no native formats
[23:03:24] [PASSED] XRGB8888 as native format
[23:03:24] [PASSED] remove duplicates
[23:03:24] [PASSED] convert alpha formats
[23:03:24] [PASSED] random formats
[23:03:24] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[23:03:24] ============= [PASSED] drm_sysfb_modeset_test ==============
[23:03:24] ================== drm_fixp (2 subtests) ===================
[23:03:24] [PASSED] drm_test_int2fixp
[23:03:24] [PASSED] drm_test_sm2fixp
[23:03:24] ==================== [PASSED] drm_fixp =====================
[23:03:24] ============================================================
[23:03:24] Testing complete. Ran 621 tests: passed: 621
[23:03:24] Elapsed time: 26.035s total, 1.753s configuring, 24.117s building, 0.133s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[23:03:24] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[23:03:26] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[23:03:35] Starting KUnit Kernel (1/1)...
[23:03:35] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[23:03:35] ================= ttm_device (5 subtests) ==================
[23:03:35] [PASSED] ttm_device_init_basic
[23:03:35] [PASSED] ttm_device_init_multiple
[23:03:35] [PASSED] ttm_device_fini_basic
[23:03:35] [PASSED] ttm_device_init_no_vma_man
[23:03:35] ================== ttm_device_init_pools  ==================
[23:03:35] [PASSED] No DMA allocations, no DMA32 required
[23:03:35] [PASSED] DMA allocations, DMA32 required
[23:03:35] [PASSED] No DMA allocations, DMA32 required
[23:03:35] [PASSED] DMA allocations, no DMA32 required
[23:03:35] ============== [PASSED] ttm_device_init_pools ==============
[23:03:35] =================== [PASSED] ttm_device ====================
[23:03:35] ================== ttm_pool (8 subtests) ===================
[23:03:35] ================== ttm_pool_alloc_basic  ===================
[23:03:35] [PASSED] One page
[23:03:35] [PASSED] More than one page
[23:03:35] [PASSED] Above the allocation limit
[23:03:35] [PASSED] One page, with coherent DMA mappings enabled
[23:03:35] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[23:03:35] ============== [PASSED] ttm_pool_alloc_basic ===============
[23:03:35] ============== ttm_pool_alloc_basic_dma_addr  ==============
[23:03:35] [PASSED] One page
[23:03:35] [PASSED] More than one page
[23:03:35] [PASSED] Above the allocation limit
[23:03:35] [PASSED] One page, with coherent DMA mappings enabled
[23:03:35] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[23:03:35] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[23:03:35] [PASSED] ttm_pool_alloc_order_caching_match
[23:03:35] [PASSED] ttm_pool_alloc_caching_mismatch
[23:03:35] [PASSED] ttm_pool_alloc_order_mismatch
[23:03:35] [PASSED] ttm_pool_free_dma_alloc
[23:03:35] [PASSED] ttm_pool_free_no_dma_alloc
[23:03:35] [PASSED] ttm_pool_fini_basic
[23:03:35] ==================== [PASSED] ttm_pool =====================
[23:03:35] ================ ttm_resource (8 subtests) =================
[23:03:35] ================= ttm_resource_init_basic  =================
[23:03:35] [PASSED] Init resource in TTM_PL_SYSTEM
[23:03:35] [PASSED] Init resource in TTM_PL_VRAM
[23:03:35] [PASSED] Init resource in a private placement
[23:03:35] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[23:03:35] ============= [PASSED] ttm_resource_init_basic =============
[23:03:35] [PASSED] ttm_resource_init_pinned
[23:03:35] [PASSED] ttm_resource_fini_basic
[23:03:35] [PASSED] ttm_resource_manager_init_basic
[23:03:35] [PASSED] ttm_resource_manager_usage_basic
[23:03:35] [PASSED] ttm_resource_manager_set_used_basic
[23:03:35] [PASSED] ttm_sys_man_alloc_basic
[23:03:35] [PASSED] ttm_sys_man_free_basic
[23:03:35] ================== [PASSED] ttm_resource ===================
[23:03:35] =================== ttm_tt (15 subtests) ===================
[23:03:35] ==================== ttm_tt_init_basic  ====================
[23:03:35] [PASSED] Page-aligned size
[23:03:35] [PASSED] Extra pages requested
[23:03:35] ================ [PASSED] ttm_tt_init_basic ================
[23:03:35] [PASSED] ttm_tt_init_misaligned
[23:03:35] [PASSED] ttm_tt_fini_basic
[23:03:35] [PASSED] ttm_tt_fini_sg
[23:03:35] [PASSED] ttm_tt_fini_shmem
[23:03:35] [PASSED] ttm_tt_create_basic
[23:03:35] [PASSED] ttm_tt_create_invalid_bo_type
[23:03:35] [PASSED] ttm_tt_create_ttm_exists
[23:03:35] [PASSED] ttm_tt_create_failed
[23:03:35] [PASSED] ttm_tt_destroy_basic
[23:03:35] [PASSED] ttm_tt_populate_null_ttm
[23:03:35] [PASSED] ttm_tt_populate_populated_ttm
[23:03:35] [PASSED] ttm_tt_unpopulate_basic
[23:03:35] [PASSED] ttm_tt_unpopulate_empty_ttm
[23:03:35] [PASSED] ttm_tt_swapin_basic
[23:03:35] ===================== [PASSED] ttm_tt ======================
[23:03:35] =================== ttm_bo (14 subtests) ===================
[23:03:35] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[23:03:35] [PASSED] Cannot be interrupted and sleeps
[23:03:35] [PASSED] Cannot be interrupted, locks straight away
[23:03:35] [PASSED] Can be interrupted, sleeps
[23:03:35] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[23:03:35] [PASSED] ttm_bo_reserve_locked_no_sleep
[23:03:35] [PASSED] ttm_bo_reserve_no_wait_ticket
[23:03:35] [PASSED] ttm_bo_reserve_double_resv
[23:03:35] [PASSED] ttm_bo_reserve_interrupted
[23:03:35] [PASSED] ttm_bo_reserve_deadlock
[23:03:35] [PASSED] ttm_bo_unreserve_basic
[23:03:35] [PASSED] ttm_bo_unreserve_pinned
[23:03:35] [PASSED] ttm_bo_unreserve_bulk
[23:03:35] [PASSED] ttm_bo_fini_basic
[23:03:35] [PASSED] ttm_bo_fini_shared_resv
[23:03:35] [PASSED] ttm_bo_pin_basic
[23:03:35] [PASSED] ttm_bo_pin_unpin_resource
[23:03:35] [PASSED] ttm_bo_multiple_pin_one_unpin
[23:03:35] ===================== [PASSED] ttm_bo ======================
[23:03:35] ============== ttm_bo_validate (22 subtests) ===============
[23:03:35] ============== ttm_bo_init_reserved_sys_man  ===============
[23:03:35] [PASSED] Buffer object for userspace
[23:03:35] [PASSED] Kernel buffer object
[23:03:35] [PASSED] Shared buffer object
[23:03:35] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[23:03:35] ============== ttm_bo_init_reserved_mock_man  ==============
[23:03:35] [PASSED] Buffer object for userspace
[23:03:35] [PASSED] Kernel buffer object
[23:03:35] [PASSED] Shared buffer object
[23:03:35] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[23:03:35] [PASSED] ttm_bo_init_reserved_resv
[23:03:35] ================== ttm_bo_validate_basic  ==================
[23:03:35] [PASSED] Buffer object for userspace
[23:03:35] [PASSED] Kernel buffer object
[23:03:35] [PASSED] Shared buffer object
[23:03:35] ============== [PASSED] ttm_bo_validate_basic ==============
[23:03:35] [PASSED] ttm_bo_validate_invalid_placement
[23:03:35] ============= ttm_bo_validate_same_placement  ==============
[23:03:35] [PASSED] System manager
[23:03:35] [PASSED] VRAM manager
[23:03:35] ========= [PASSED] ttm_bo_validate_same_placement ==========
[23:03:35] [PASSED] ttm_bo_validate_failed_alloc
[23:03:35] [PASSED] ttm_bo_validate_pinned
[23:03:35] [PASSED] ttm_bo_validate_busy_placement
[23:03:35] ================ ttm_bo_validate_multihop  =================
[23:03:35] [PASSED] Buffer object for userspace
[23:03:35] [PASSED] Kernel buffer object
[23:03:35] [PASSED] Shared buffer object
[23:03:35] ============ [PASSED] ttm_bo_validate_multihop =============
[23:03:35] ========== ttm_bo_validate_no_placement_signaled  ==========
[23:03:35] [PASSED] Buffer object in system domain, no page vector
[23:03:35] [PASSED] Buffer object in system domain with an existing page vector
[23:03:35] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[23:03:35] ======== ttm_bo_validate_no_placement_not_signaled  ========
[23:03:35] [PASSED] Buffer object for userspace
[23:03:35] [PASSED] Kernel buffer object
[23:03:35] [PASSED] Shared buffer object
[23:03:35] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[23:03:35] [PASSED] ttm_bo_validate_move_fence_signaled
[23:03:36] ========= ttm_bo_validate_move_fence_not_signaled  =========
[23:03:36] [PASSED] Waits for GPU
[23:03:36] [PASSED] Tries to lock straight away
[23:03:36] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[23:03:36] [PASSED] ttm_bo_validate_swapout
[23:03:36] [PASSED] ttm_bo_validate_happy_evict
[23:03:36] [PASSED] ttm_bo_validate_all_pinned_evict
[23:03:36] [PASSED] ttm_bo_validate_allowed_only_evict
[23:03:36] [PASSED] ttm_bo_validate_deleted_evict
[23:03:36] [PASSED] ttm_bo_validate_busy_domain_evict
[23:03:36] [PASSED] ttm_bo_validate_evict_gutting
[23:03:36] [PASSED] ttm_bo_validate_recrusive_evict
[23:03:36] ================= [PASSED] ttm_bo_validate =================
[23:03:36] ============================================================
[23:03:36] Testing complete. Ran 102 tests: passed: 102
[23:03:36] Elapsed time: 11.525s total, 1.688s configuring, 9.572s building, 0.217s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel



^ permalink raw reply	[flat|nested] 12+ messages in thread

* ✓ Xe.CI.BAT: success for Fix MCR inconsistencies in RTP tables (rev3)
  2026-05-14 21:44 [PATCH v3 0/7] Fix MCR inconsistencies in RTP tables Gustavo Sousa
                   ` (7 preceding siblings ...)
  2026-05-14 23:03 ` ✓ CI.KUnit: success for Fix MCR inconsistencies in RTP tables (rev3) Patchwork
@ 2026-05-14 23:55 ` Patchwork
  2026-05-15 17:30 ` ✓ Xe.CI.FULL: " Patchwork
  2026-05-15 21:19 ` [PATCH v3 0/7] Fix MCR inconsistencies in RTP tables Gustavo Sousa
  10 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2026-05-14 23:55 UTC (permalink / raw)
  To: Gustavo Sousa; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 958 bytes --]

== Series Details ==

Series: Fix MCR inconsistencies in RTP tables (rev3)
URL   : https://patchwork.freedesktop.org/series/160223/
State : success

== Summary ==

CI Bug Log - changes from xe-5066-2edbd77a2045d12d30c95dbb5842b831e3da0035_BAT -> xe-pw-160223v3_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (13 -> 13)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * Linux: xe-5066-2edbd77a2045d12d30c95dbb5842b831e3da0035 -> xe-pw-160223v3

  IGT_8912: 22222b7d987067331459c2a866e6387a669b7f70 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-5066-2edbd77a2045d12d30c95dbb5842b831e3da0035: 2edbd77a2045d12d30c95dbb5842b831e3da0035
  xe-pw-160223v3: 160223v3

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/index.html

[-- Attachment #2: Type: text/html, Size: 1506 bytes --]

^ permalink raw reply	[flat|nested] 12+ messages in thread

* ✓ Xe.CI.FULL: success for Fix MCR inconsistencies in RTP tables (rev3)
  2026-05-14 21:44 [PATCH v3 0/7] Fix MCR inconsistencies in RTP tables Gustavo Sousa
                   ` (8 preceding siblings ...)
  2026-05-14 23:55 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-05-15 17:30 ` Patchwork
  2026-05-15 21:19 ` [PATCH v3 0/7] Fix MCR inconsistencies in RTP tables Gustavo Sousa
  10 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2026-05-15 17:30 UTC (permalink / raw)
  To: Gustavo Sousa; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 22257 bytes --]

== Series Details ==

Series: Fix MCR inconsistencies in RTP tables (rev3)
URL   : https://patchwork.freedesktop.org/series/160223/
State : success

== Summary ==

CI Bug Log - changes from xe-5066-2edbd77a2045d12d30c95dbb5842b831e3da0035_FULL -> xe-pw-160223v3_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-160223v3_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
    - shard-bmg:          NOTRUN -> [SKIP][1] ([Intel XE#2370])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-8/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html

  * igt@kms_big_fb@linear-8bpp-rotate-270:
    - shard-bmg:          NOTRUN -> [SKIP][2] ([Intel XE#2327])
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-10/igt@kms_big_fb@linear-8bpp-rotate-270.html

  * igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-180-hflip:
    - shard-bmg:          NOTRUN -> [SKIP][3] ([Intel XE#7059] / [Intel XE#7085])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-8/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-180-hflip.html

  * igt@kms_big_fb@yf-tiled-64bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][4] ([Intel XE#1124]) +4 other tests skip
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-8/igt@kms_big_fb@yf-tiled-64bpp-rotate-90.html

  * igt@kms_bw@connected-linear-tiling-3-displays-target-2160x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][5] ([Intel XE#7679])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-8/igt@kms_bw@connected-linear-tiling-3-displays-target-2160x1440p.html

  * igt@kms_bw@linear-tiling-4-displays-target-2160x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][6] ([Intel XE#367]) +1 other test skip
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-8/igt@kms_bw@linear-tiling-4-displays-target-2160x1440p.html

  * igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#2887]) +5 other tests skip
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-10/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-mc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][8] ([Intel XE#3432])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-10/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-mc-ccs.html

  * igt@kms_chamelium_color@ctm-0-25:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#2325] / [Intel XE#7358])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-10/igt@kms_chamelium_color@ctm-0-25.html

  * igt@kms_chamelium_hpd@dp-hpd:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#2252]) +2 other tests skip
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-8/igt@kms_chamelium_hpd@dp-hpd.html

  * igt@kms_content_protection@legacy:
    - shard-bmg:          NOTRUN -> [FAIL][11] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) +3 other tests fail
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-8/igt@kms_content_protection@legacy.html

  * igt@kms_cursor_crc@cursor-offscreen-32x10:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#2320])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-10/igt@kms_cursor_crc@cursor-offscreen-32x10.html

  * igt@kms_cursor_edge_walk@256x256-top-bottom:
    - shard-bmg:          [PASS][13] -> [FAIL][14] ([Intel XE#6841]) +1 other test fail
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5066-2edbd77a2045d12d30c95dbb5842b831e3da0035/shard-bmg-9/igt@kms_cursor_edge_walk@256x256-top-bottom.html
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-2/igt@kms_cursor_edge_walk@256x256-top-bottom.html

  * igt@kms_dsc@dsc-with-bpc-formats:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#2244]) +1 other test skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-8/igt@kms_dsc@dsc-with-bpc-formats.html

  * igt@kms_feature_discovery@psr2:
    - shard-bmg:          NOTRUN -> [SKIP][16] ([Intel XE#2374] / [Intel XE#6128])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-10/igt@kms_feature_discovery@psr2.html

  * igt@kms_flip@flip-vs-expired-vblank@b-edp1:
    - shard-lnl:          [PASS][17] -> [FAIL][18] ([Intel XE#301]) +2 other tests fail
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5066-2edbd77a2045d12d30c95dbb5842b831e3da0035/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html

  * igt@kms_flip@flip-vs-expired-vblank@c-edp1:
    - shard-lnl:          [PASS][19] -> [FAIL][20] ([Intel XE#301] / [Intel XE#3149]) +1 other test fail
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5066-2edbd77a2045d12d30c95dbb5842b831e3da0035/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][21] ([Intel XE#7178] / [Intel XE#7351])
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-8/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][22] ([Intel XE#2311]) +23 other tests skip
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@drrshdr-abgr161616f-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#7061]) +2 other tests skip
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-10/igt@kms_frontbuffer_tracking@drrshdr-abgr161616f-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#4141]) +5 other tests skip
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-abgr161616f-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][25] ([Intel XE#7061] / [Intel XE#7356]) +2 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcdrrs-abgr161616f-draw-render.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][26] ([Intel XE#2313]) +24 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-8/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f:
    - shard-bmg:          [PASS][27] -> [SKIP][28] ([Intel XE#7915]) +3 other tests skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5066-2edbd77a2045d12d30c95dbb5842b831e3da0035/shard-bmg-6/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f.html
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-3/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f.html

  * igt@kms_panel_fitting@atomic-fastset:
    - shard-bmg:          NOTRUN -> [SKIP][29] ([Intel XE#2486])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-8/igt@kms_panel_fitting@atomic-fastset.html

  * igt@kms_plane@pixel-format-4-tiled-modifier@pipe-a-plane-5:
    - shard-bmg:          NOTRUN -> [SKIP][30] ([Intel XE#7130]) +1 other test skip
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-8/igt@kms_plane@pixel-format-4-tiled-modifier@pipe-a-plane-5.html

  * igt@kms_plane_lowres@tiling-yf:
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#2393])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-10/igt@kms_plane_lowres@tiling-yf.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-c:
    - shard-bmg:          NOTRUN -> [SKIP][32] ([Intel XE#2763] / [Intel XE#6886]) +4 other tests skip
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-8/igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-c.html

  * igt@kms_pm_backlight@fade:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#7376] / [Intel XE#7760] / [Intel XE#870])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-10/igt@kms_pm_backlight@fade.html

  * igt@kms_pm_lpsp@kms-lpsp:
    - shard-bmg:          NOTRUN -> [SKIP][34] ([Intel XE#2499])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-8/igt@kms_pm_lpsp@kms-lpsp.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf:
    - shard-bmg:          NOTRUN -> [SKIP][35] ([Intel XE#1489])
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-8/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf.html

  * igt@kms_psr2_su@frontbuffer-xrgb8888:
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#2387] / [Intel XE#7429])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-8/igt@kms_psr2_su@frontbuffer-xrgb8888.html

  * igt@kms_psr@fbc-pr-no-drrs:
    - shard-bmg:          NOTRUN -> [SKIP][37] ([Intel XE#2234] / [Intel XE#2850]) +2 other tests skip
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-10/igt@kms_psr@fbc-pr-no-drrs.html

  * igt@kms_rotation_crc@sprite-rotation-90-pos-100-0:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#3904] / [Intel XE#7342])
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-8/igt@kms_rotation_crc@sprite-rotation-90-pos-100-0.html

  * igt@kms_sharpness_filter@filter-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][39] ([Intel XE#6503]) +1 other test skip
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-10/igt@kms_sharpness_filter@filter-suspend.html

  * igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1:
    - shard-lnl:          [PASS][40] -> [FAIL][41] ([Intel XE#2142]) +1 other test fail
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5066-2edbd77a2045d12d30c95dbb5842b831e3da0035/shard-lnl-2/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-lnl-5/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html

  * igt@xe_eudebug@basic-vm-bind-ufence:
    - shard-bmg:          NOTRUN -> [SKIP][42] ([Intel XE#7636]) +6 other tests skip
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-8/igt@xe_eudebug@basic-vm-bind-ufence.html

  * igt@xe_evict@evict-beng-mixed-many-threads-small:
    - shard-bmg:          [PASS][43] -> [INCOMPLETE][44] ([Intel XE#6321])
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5066-2edbd77a2045d12d30c95dbb5842b831e3da0035/shard-bmg-10/igt@xe_evict@evict-beng-mixed-many-threads-small.html
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-1/igt@xe_evict@evict-beng-mixed-many-threads-small.html

  * igt@xe_evict@evict-small-multi-queue-priority:
    - shard-bmg:          NOTRUN -> [SKIP][45] ([Intel XE#7140])
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-8/igt@xe_evict@evict-small-multi-queue-priority.html

  * igt@xe_exec_basic@multigpu-once-basic-defer-bind:
    - shard-bmg:          NOTRUN -> [SKIP][46] ([Intel XE#2322] / [Intel XE#7372]) +2 other tests skip
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-8/igt@xe_exec_basic@multigpu-once-basic-defer-bind.html

  * igt@xe_exec_fault_mode@many-multi-queue-userptr-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][47] ([Intel XE#7136]) +6 other tests skip
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-10/igt@xe_exec_fault_mode@many-multi-queue-userptr-invalidate.html

  * igt@xe_exec_multi_queue@two-queues-priority:
    - shard-bmg:          NOTRUN -> [SKIP][48] ([Intel XE#6874]) +10 other tests skip
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-8/igt@xe_exec_multi_queue@two-queues-priority.html

  * igt@xe_exec_reset@cm-multi-queue-gt-reset:
    - shard-bmg:          NOTRUN -> [SKIP][49] ([Intel XE#7866])
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-8/igt@xe_exec_reset@cm-multi-queue-gt-reset.html

  * igt@xe_exec_threads@threads-multi-queue-cm-shared-vm-userptr:
    - shard-bmg:          NOTRUN -> [SKIP][50] ([Intel XE#7138]) +2 other tests skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-8/igt@xe_exec_threads@threads-multi-queue-cm-shared-vm-userptr.html

  * igt@xe_multigpu_svm@mgpu-latency-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#6964])
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-10/igt@xe_multigpu_svm@mgpu-latency-prefetch.html

  * igt@xe_pat@xa-app-transient-media-off:
    - shard-bmg:          NOTRUN -> [SKIP][52] ([Intel XE#7590])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-10/igt@xe_pat@xa-app-transient-media-off.html

  * igt@xe_pmu:
    - shard-bmg:          NOTRUN -> [INCOMPLETE][53] ([Intel XE#2594])
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-7/igt@xe_pmu.html

  * igt@xe_prefetch_fault@prefetch-fault-svm:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#7599])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-8/igt@xe_prefetch_fault@prefetch-fault-svm.html

  * igt@xe_pxp@pxp-termination-key-update-post-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][55] ([Intel XE#4733] / [Intel XE#7417])
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-8/igt@xe_pxp@pxp-termination-key-update-post-suspend.html

  * igt@xe_query@multigpu-query-cs-cycles:
    - shard-bmg:          NOTRUN -> [SKIP][56] ([Intel XE#944])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-10/igt@xe_query@multigpu-query-cs-cycles.html

  * igt@xe_wedged@wedged-mode-toggle:
    - shard-bmg:          [PASS][57] -> [ABORT][58] ([Intel XE#7914])
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5066-2edbd77a2045d12d30c95dbb5842b831e3da0035/shard-bmg-1/igt@xe_wedged@wedged-mode-toggle.html
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-5/igt@xe_wedged@wedged-mode-toggle.html

  
#### Possible fixes ####

  * igt@kms_hdr@static-toggle-dpms@pipe-a-hdmi-a-3-xrgb2101010:
    - shard-bmg:          [SKIP][59] ([Intel XE#7915]) -> [PASS][60] +1 other test pass
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5066-2edbd77a2045d12d30c95dbb5842b831e3da0035/shard-bmg-7/igt@kms_hdr@static-toggle-dpms@pipe-a-hdmi-a-3-xrgb2101010.html
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-9/igt@kms_hdr@static-toggle-dpms@pipe-a-hdmi-a-3-xrgb2101010.html

  * igt@xe_exec_threads@threads-bal-mixed-fd-basic:
    - shard-bmg:          [ABORT][61] -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5066-2edbd77a2045d12d30c95dbb5842b831e3da0035/shard-bmg-2/igt@xe_exec_threads@threads-bal-mixed-fd-basic.html
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-10/igt@xe_exec_threads@threads-bal-mixed-fd-basic.html

  
#### Warnings ####

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-bmg:          [SKIP][63] ([Intel XE#2426] / [Intel XE#5848]) -> [SKIP][64] ([Intel XE#2509] / [Intel XE#7437])
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5066-2edbd77a2045d12d30c95dbb5842b831e3da0035/shard-bmg-9/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#2142]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2142
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2370
  [Intel XE#2374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2374
  [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
  [Intel XE#2393]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2393
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2486]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2486
  [Intel XE#2499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2499
  [Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
  [Intel XE#2594]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2594
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
  [Intel XE#6128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6128
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#6841]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6841
  [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#7059]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7059
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7085]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7085
  [Intel XE#7130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7130
  [Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
  [Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
  [Intel XE#7140]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7140
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
  [Intel XE#7376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7376
  [Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
  [Intel XE#7429]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7429
  [Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
  [Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
  [Intel XE#7599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7599
  [Intel XE#7636]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7636
  [Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
  [Intel XE#7760]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7760
  [Intel XE#7866]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7866
  [Intel XE#7914]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7914
  [Intel XE#7915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7915
  [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * Linux: xe-5066-2edbd77a2045d12d30c95dbb5842b831e3da0035 -> xe-pw-160223v3

  IGT_8912: 22222b7d987067331459c2a866e6387a669b7f70 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-5066-2edbd77a2045d12d30c95dbb5842b831e3da0035: 2edbd77a2045d12d30c95dbb5842b831e3da0035
  xe-pw-160223v3: 160223v3

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160223v3/index.html

[-- Attachment #2: Type: text/html, Size: 24110 bytes --]

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH v3 0/7] Fix MCR inconsistencies in RTP tables
  2026-05-14 21:44 [PATCH v3 0/7] Fix MCR inconsistencies in RTP tables Gustavo Sousa
                   ` (9 preceding siblings ...)
  2026-05-15 17:30 ` ✓ Xe.CI.FULL: " Patchwork
@ 2026-05-15 21:19 ` Gustavo Sousa
  10 siblings, 0 replies; 12+ messages in thread
From: Gustavo Sousa @ 2026-05-15 21:19 UTC (permalink / raw)
  To: intel-xe; +Cc: Matt Roper, Michal Wajdeczko

Gustavo Sousa <gustavo.sousa@intel.com> writes:

> The Xe driver uses struct xe_reg as base type to represent a register
> definition, and defines struct xe_reg_mcr as a sort of subtype to
> represent multicast replicated (MCR) registers.  It uses this subtyping
> to "force" the use of the correct MCR-based API for MMIO operations on
> MCR registers.
>
> In regular driver code, usage of those MCR registers usually need some
> reasoning about whether the access will need to be steered or a
> multicast; and the correct MCR API will be selected.
>
> For RTP tables, on the other hand, that's not the case.  The developer
> when defining an action the developer can either select a regular or a
> MCR register and the register save/restore logic will make the selection
> between regular vs MCR MMIO access depending on the register instance
> defined in the RTP action.
>
> That allows some mistakes to go unnoticed: a non-MCR register instance
> could be used for an RTP action against a platform where such a register
> is actually MCR; and vice-versa.
>
> This series fixes those mistakes.
>
> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>

Pushed to drm-xe-next.

Thanks Matt and Michal for the reviews!

--
Gustavo Sousa

> ---
> Changes in v3:
> - Dropped patch "drm/xe/kunit: Add xe_kunit_helper_is_live_test()",
>   which became unnecessary in v2.
> - This version is being sent mainly to get fresh CI results before
>   applying, just in case any new inconsistencies were introduced in the
>   meantime.
> - Link to v2: https://patch.msgid.link/20260508-rtp-mcr-check-v2-0-9897b147a5d2@intel.com
>
> Changes in v2:
> - Incorporated review feedback. Please see individual patches for the
>   respective changelogs.
> - Dropped inclusion of hw_engines in xe_wa test.  We will implement a more
>   focused test to check for MCR inconsistencies in the future, which will
>   iterate over all applicable RTP tables.
> - As a result of the above, dropped MMIO interception patches, as they became
>   unnecessary.
> - Link to v1: https://patch.msgid.link/20260116-rtp-mcr-check-v1-0-d420b9c1a327@intel.com
>
> ---
> Gustavo Sousa (7):
>       drm/xe: Define CACHE_MODE_1 as MCR register
>       drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN1
>       drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN4
>       drm/xe: Extract xe_hw_engine_setup_reg_lrc()
>       drm/xe/kunit: Use KUNIT_EXPECT_EQ() in xe_wa_gt()
>       drm/xe/mcr: Extract reg_in_steering_type_ranges()
>       drm/xe/reg_sr: Do sanity check for MCR vs non-MCR
>
>  drivers/gpu/drm/xe/regs/xe_gt_regs.h   |  4 +-
>  drivers/gpu/drm/xe/tests/xe_rtp_test.c | 71 ++++++++++++++++++++++++++++++----
>  drivers/gpu/drm/xe/tests/xe_wa_test.c  | 14 ++++++-
>  drivers/gpu/drm/xe/xe_gt.c             |  8 ++--
>  drivers/gpu/drm/xe/xe_gt_mcr.c         | 67 +++++++++++++++++++++++---------
>  drivers/gpu/drm/xe/xe_gt_mcr.h         |  1 +
>  drivers/gpu/drm/xe/xe_hw_engine.c      | 15 ++++++-
>  drivers/gpu/drm/xe/xe_hw_engine.h      |  2 +-
>  drivers/gpu/drm/xe/xe_reg_sr.c         | 36 +++++++++++++++++
>  drivers/gpu/drm/xe/xe_tuning.c         |  2 +-
>  drivers/gpu/drm/xe/xe_wa.c             |  6 +--
>  11 files changed, 186 insertions(+), 40 deletions(-)
> ---
> base-commit: 2edbd77a2045d12d30c95dbb5842b831e3da0035
> change-id: 20260112-rtp-mcr-check-f976cb1adf94
>
> Best regards,
> --  
> Gustavo Sousa <gustavo.sousa@intel.com>

^ permalink raw reply	[flat|nested] 12+ messages in thread

end of thread, other threads:[~2026-05-15 21:19 UTC | newest]

Thread overview: 12+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-05-14 21:44 [PATCH v3 0/7] Fix MCR inconsistencies in RTP tables Gustavo Sousa
2026-05-14 21:44 ` [PATCH v3 1/7] drm/xe: Define CACHE_MODE_1 as MCR register Gustavo Sousa
2026-05-14 21:44 ` [PATCH v3 2/7] drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN1 Gustavo Sousa
2026-05-14 21:44 ` [PATCH v3 3/7] drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN4 Gustavo Sousa
2026-05-14 21:44 ` [PATCH v3 4/7] drm/xe: Extract xe_hw_engine_setup_reg_lrc() Gustavo Sousa
2026-05-14 21:44 ` [PATCH v3 5/7] drm/xe/kunit: Use KUNIT_EXPECT_EQ() in xe_wa_gt() Gustavo Sousa
2026-05-14 21:44 ` [PATCH v3 6/7] drm/xe/mcr: Extract reg_in_steering_type_ranges() Gustavo Sousa
2026-05-14 21:44 ` [PATCH v3 7/7] drm/xe/reg_sr: Do sanity check for MCR vs non-MCR Gustavo Sousa
2026-05-14 23:03 ` ✓ CI.KUnit: success for Fix MCR inconsistencies in RTP tables (rev3) Patchwork
2026-05-14 23:55 ` ✓ Xe.CI.BAT: " Patchwork
2026-05-15 17:30 ` ✓ Xe.CI.FULL: " Patchwork
2026-05-15 21:19 ` [PATCH v3 0/7] Fix MCR inconsistencies in RTP tables Gustavo Sousa

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox