* [PATCH 1/1] drm/xe/eustall: Return EBADFD from read if EU stall registers get reset
@ 2025-10-01 6:38 Harish Chegondi
0 siblings, 0 replies; 12+ messages in thread
From: Harish Chegondi @ 2025-10-01 6:38 UTC (permalink / raw)
To: intel-xe; +Cc: Harish Chegondi, Ashutosh Dixit
If a reset (GT or engine) happens during EU stall data sampling, all the
EU stall registers can get reset to 0. This will result in EU stall data
buffers' read and write pointer register values to be out of sync with
the cached values. This can result in read() returning invalid data. To
prevent this, check the value of a EU stall base register. If it is zero,
it indicates a reset may have happened that wiped the register to zero.
If this happens, return EBADFD from read() upon which the user space
should close the fd and open a new fd for a new EU stall data
collection session.
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Signed-off-by: Harish Chegondi <harish.chegondi@intel.com>
---
drivers/gpu/drm/xe/xe_eu_stall.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_eu_stall.c b/drivers/gpu/drm/xe/xe_eu_stall.c
index f5cfdf29fde3..39d5f2abe73b 100644
--- a/drivers/gpu/drm/xe/xe_eu_stall.c
+++ b/drivers/gpu/drm/xe/xe_eu_stall.c
@@ -516,9 +516,24 @@ static ssize_t xe_eu_stall_stream_read_locked(struct xe_eu_stall_data_stream *st
size_t total_size = 0;
u16 group, instance;
unsigned int xecore;
+ u32 base_reg_value;
int ret = 0;
mutex_lock(&stream->xecore_buf_lock);
+ /* If a GT or engine reset happens during EU stall data sampling,
+ * all EU stall registers get reset to 0 and the cached values of
+ * EU stall data buffers' read and write pointers are out of sync
+ * with the register values. This can cause invalid data to be
+ * returned from read(). To prevent this, check the value of a
+ * EU stall base register. If it is zero, return -EBADFD. The
+ * user is expected to close the fd and open a new fd.
+ */
+ base_reg_value = xe_gt_mcr_unicast_read_any(gt, XEHPC_EUSTALL_BASE);
+ if (unlikely(!base_reg_value)) {
+ xe_gt_dbg(gt, "EU stall base register has been reset to 0\n");
+ mutex_unlock(&stream->xecore_buf_lock);
+ return -EBADFD;
+ }
if (bitmap_weight(stream->data_drop.mask, XE_MAX_DSS_FUSE_BITS)) {
if (!stream->data_drop.reported_to_user) {
stream->data_drop.reported_to_user = true;
--
2.51.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 1/1] drm/xe/eustall: Return EBADFD from read if EU stall registers get reset
@ 2025-12-08 6:16 Harish Chegondi
2025-12-08 6:32 ` ✓ CI.KUnit: success for series starting with [1/1] " Patchwork
` (4 more replies)
0 siblings, 5 replies; 12+ messages in thread
From: Harish Chegondi @ 2025-12-08 6:16 UTC (permalink / raw)
To: intel-xe; +Cc: Harish Chegondi, Ashutosh Dixit, Umesh Nerlige Ramappa
If a reset (GT or engine) happens during EU stall data sampling, all the
EU stall registers can get reset to 0. This will result in EU stall data
buffers' read and write pointer register values to be out of sync with
the cached values. This can result in read() returning invalid data. To
prevent this, check the value of a EU stall base register. If it is zero,
it indicates a reset may have happened that wiped the register to zero.
If this happens, return EBADFD from read() upon which the user space
should close the fd and open a new fd for a new EU stall data
collection session.
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Signed-off-by: Harish Chegondi <harish.chegondi@intel.com>
---
drivers/gpu/drm/xe/xe_eu_stall.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_eu_stall.c b/drivers/gpu/drm/xe/xe_eu_stall.c
index 97dfb7945b7a..02c0beb4559f 100644
--- a/drivers/gpu/drm/xe/xe_eu_stall.c
+++ b/drivers/gpu/drm/xe/xe_eu_stall.c
@@ -541,9 +541,24 @@ static ssize_t xe_eu_stall_stream_read_locked(struct xe_eu_stall_data_stream *st
size_t total_size = 0;
u16 group, instance;
unsigned int xecore;
+ u32 base_reg_value;
int ret = 0;
mutex_lock(&stream->xecore_buf_lock);
+ /* If a GT or engine reset happens during EU stall data sampling,
+ * all EU stall registers get reset to 0 and the cached values of
+ * EU stall data buffers' read and write pointers are out of sync
+ * with the register values. This can cause invalid data to be
+ * returned from read(). To prevent this, check the value of a
+ * EU stall base register. If it is zero, return -EBADFD. The
+ * user is expected to close the fd and open a new fd.
+ */
+ base_reg_value = xe_gt_mcr_unicast_read_any(gt, XEHPC_EUSTALL_BASE);
+ if (unlikely(!base_reg_value)) {
+ xe_gt_dbg(gt, "EU stall base register has been reset to 0\n");
+ mutex_unlock(&stream->xecore_buf_lock);
+ return -EBADFD;
+ }
if (bitmap_weight(stream->data_drop.mask, XE_MAX_DSS_FUSE_BITS)) {
if (!stream->data_drop.reported_to_user) {
stream->data_drop.reported_to_user = true;
--
2.43.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* ✓ CI.KUnit: success for series starting with [1/1] drm/xe/eustall: Return EBADFD from read if EU stall registers get reset
2025-12-08 6:16 [PATCH 1/1] drm/xe/eustall: Return EBADFD from read if EU stall registers get reset Harish Chegondi
@ 2025-12-08 6:32 ` Patchwork
2025-12-08 7:56 ` ✓ Xe.CI.BAT: " Patchwork
` (3 subsequent siblings)
4 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2025-12-08 6:32 UTC (permalink / raw)
To: Harish Chegondi; +Cc: intel-xe
== Series Details ==
Series: series starting with [1/1] drm/xe/eustall: Return EBADFD from read if EU stall registers get reset
URL : https://patchwork.freedesktop.org/series/158622/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[06:31:33] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[06:31:37] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[06:32:08] Starting KUnit Kernel (1/1)...
[06:32:08] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[06:32:08] ================== guc_buf (11 subtests) ===================
[06:32:08] [PASSED] test_smallest
[06:32:08] [PASSED] test_largest
[06:32:08] [PASSED] test_granular
[06:32:08] [PASSED] test_unique
[06:32:08] [PASSED] test_overlap
[06:32:08] [PASSED] test_reusable
[06:32:08] [PASSED] test_too_big
[06:32:08] [PASSED] test_flush
[06:32:08] [PASSED] test_lookup
[06:32:08] [PASSED] test_data
[06:32:08] [PASSED] test_class
[06:32:08] ===================== [PASSED] guc_buf =====================
[06:32:08] =================== guc_dbm (7 subtests) ===================
[06:32:08] [PASSED] test_empty
[06:32:08] [PASSED] test_default
[06:32:08] ======================== test_size ========================
[06:32:08] [PASSED] 4
[06:32:08] [PASSED] 8
[06:32:08] [PASSED] 32
[06:32:08] [PASSED] 256
[06:32:08] ==================== [PASSED] test_size ====================
[06:32:08] ======================= test_reuse ========================
[06:32:08] [PASSED] 4
[06:32:08] [PASSED] 8
[06:32:08] [PASSED] 32
[06:32:08] [PASSED] 256
[06:32:08] =================== [PASSED] test_reuse ====================
[06:32:08] =================== test_range_overlap ====================
[06:32:08] [PASSED] 4
[06:32:08] [PASSED] 8
[06:32:08] [PASSED] 32
[06:32:08] [PASSED] 256
[06:32:08] =============== [PASSED] test_range_overlap ================
[06:32:08] =================== test_range_compact ====================
[06:32:08] [PASSED] 4
[06:32:08] [PASSED] 8
[06:32:08] [PASSED] 32
[06:32:08] [PASSED] 256
[06:32:08] =============== [PASSED] test_range_compact ================
[06:32:08] ==================== test_range_spare =====================
[06:32:08] [PASSED] 4
[06:32:08] [PASSED] 8
[06:32:08] [PASSED] 32
[06:32:08] [PASSED] 256
[06:32:08] ================ [PASSED] test_range_spare =================
[06:32:08] ===================== [PASSED] guc_dbm =====================
[06:32:08] =================== guc_idm (6 subtests) ===================
[06:32:08] [PASSED] bad_init
[06:32:08] [PASSED] no_init
[06:32:08] [PASSED] init_fini
[06:32:08] [PASSED] check_used
[06:32:08] [PASSED] check_quota
[06:32:08] [PASSED] check_all
[06:32:08] ===================== [PASSED] guc_idm =====================
[06:32:08] ================== no_relay (3 subtests) ===================
[06:32:08] [PASSED] xe_drops_guc2pf_if_not_ready
[06:32:08] [PASSED] xe_drops_guc2vf_if_not_ready
[06:32:08] [PASSED] xe_rejects_send_if_not_ready
[06:32:08] ==================== [PASSED] no_relay =====================
[06:32:08] ================== pf_relay (14 subtests) ==================
[06:32:08] [PASSED] pf_rejects_guc2pf_too_short
[06:32:08] [PASSED] pf_rejects_guc2pf_too_long
[06:32:08] [PASSED] pf_rejects_guc2pf_no_payload
[06:32:08] [PASSED] pf_fails_no_payload
[06:32:08] [PASSED] pf_fails_bad_origin
[06:32:08] [PASSED] pf_fails_bad_type
[06:32:08] [PASSED] pf_txn_reports_error
[06:32:08] [PASSED] pf_txn_sends_pf2guc
[06:32:08] [PASSED] pf_sends_pf2guc
[06:32:08] [SKIPPED] pf_loopback_nop
[06:32:08] [SKIPPED] pf_loopback_echo
[06:32:08] [SKIPPED] pf_loopback_fail
[06:32:08] [SKIPPED] pf_loopback_busy
[06:32:08] [SKIPPED] pf_loopback_retry
[06:32:08] ==================== [PASSED] pf_relay =====================
[06:32:08] ================== vf_relay (3 subtests) ===================
[06:32:08] [PASSED] vf_rejects_guc2vf_too_short
[06:32:08] [PASSED] vf_rejects_guc2vf_too_long
[06:32:08] [PASSED] vf_rejects_guc2vf_no_payload
[06:32:08] ==================== [PASSED] vf_relay =====================
[06:32:08] ================ pf_gt_config (6 subtests) =================
[06:32:08] [PASSED] fair_contexts_1vf
[06:32:08] [PASSED] fair_doorbells_1vf
[06:32:08] [PASSED] fair_ggtt_1vf
[06:32:08] ====================== fair_contexts ======================
[06:32:08] [PASSED] 1 VF
[06:32:08] [PASSED] 2 VFs
[06:32:08] [PASSED] 3 VFs
[06:32:08] [PASSED] 4 VFs
[06:32:08] [PASSED] 5 VFs
[06:32:08] [PASSED] 6 VFs
[06:32:08] [PASSED] 7 VFs
[06:32:08] [PASSED] 8 VFs
[06:32:08] [PASSED] 9 VFs
[06:32:08] [PASSED] 10 VFs
[06:32:08] [PASSED] 11 VFs
[06:32:08] [PASSED] 12 VFs
[06:32:08] [PASSED] 13 VFs
[06:32:08] [PASSED] 14 VFs
[06:32:08] [PASSED] 15 VFs
[06:32:08] [PASSED] 16 VFs
[06:32:08] [PASSED] 17 VFs
[06:32:08] [PASSED] 18 VFs
[06:32:08] [PASSED] 19 VFs
[06:32:08] [PASSED] 20 VFs
[06:32:08] [PASSED] 21 VFs
[06:32:08] [PASSED] 22 VFs
[06:32:08] [PASSED] 23 VFs
[06:32:08] [PASSED] 24 VFs
[06:32:08] [PASSED] 25 VFs
[06:32:08] [PASSED] 26 VFs
[06:32:08] [PASSED] 27 VFs
[06:32:08] [PASSED] 28 VFs
[06:32:08] [PASSED] 29 VFs
[06:32:08] [PASSED] 30 VFs
[06:32:08] [PASSED] 31 VFs
[06:32:08] [PASSED] 32 VFs
[06:32:08] [PASSED] 33 VFs
[06:32:08] [PASSED] 34 VFs
[06:32:08] [PASSED] 35 VFs
[06:32:08] [PASSED] 36 VFs
[06:32:08] [PASSED] 37 VFs
[06:32:08] [PASSED] 38 VFs
[06:32:08] [PASSED] 39 VFs
[06:32:08] [PASSED] 40 VFs
[06:32:08] [PASSED] 41 VFs
[06:32:08] [PASSED] 42 VFs
[06:32:08] [PASSED] 43 VFs
[06:32:08] [PASSED] 44 VFs
[06:32:08] [PASSED] 45 VFs
[06:32:08] [PASSED] 46 VFs
[06:32:08] [PASSED] 47 VFs
[06:32:08] [PASSED] 48 VFs
[06:32:08] [PASSED] 49 VFs
[06:32:08] [PASSED] 50 VFs
[06:32:08] [PASSED] 51 VFs
[06:32:08] [PASSED] 52 VFs
[06:32:08] [PASSED] 53 VFs
[06:32:08] [PASSED] 54 VFs
[06:32:08] [PASSED] 55 VFs
[06:32:08] [PASSED] 56 VFs
[06:32:08] [PASSED] 57 VFs
[06:32:08] [PASSED] 58 VFs
[06:32:08] [PASSED] 59 VFs
[06:32:08] [PASSED] 60 VFs
[06:32:08] [PASSED] 61 VFs
[06:32:08] [PASSED] 62 VFs
[06:32:08] [PASSED] 63 VFs
[06:32:08] ================== [PASSED] fair_contexts ==================
[06:32:08] ===================== fair_doorbells ======================
[06:32:08] [PASSED] 1 VF
[06:32:08] [PASSED] 2 VFs
[06:32:08] [PASSED] 3 VFs
[06:32:08] [PASSED] 4 VFs
[06:32:08] [PASSED] 5 VFs
[06:32:08] [PASSED] 6 VFs
[06:32:08] [PASSED] 7 VFs
[06:32:08] [PASSED] 8 VFs
[06:32:08] [PASSED] 9 VFs
[06:32:08] [PASSED] 10 VFs
[06:32:08] [PASSED] 11 VFs
[06:32:08] [PASSED] 12 VFs
[06:32:08] [PASSED] 13 VFs
[06:32:08] [PASSED] 14 VFs
[06:32:08] [PASSED] 15 VFs
[06:32:08] [PASSED] 16 VFs
[06:32:08] [PASSED] 17 VFs
[06:32:08] [PASSED] 18 VFs
[06:32:08] [PASSED] 19 VFs
[06:32:08] [PASSED] 20 VFs
[06:32:08] [PASSED] 21 VFs
[06:32:08] [PASSED] 22 VFs
[06:32:08] [PASSED] 23 VFs
[06:32:08] [PASSED] 24 VFs
[06:32:08] [PASSED] 25 VFs
[06:32:08] [PASSED] 26 VFs
[06:32:08] [PASSED] 27 VFs
[06:32:08] [PASSED] 28 VFs
[06:32:08] [PASSED] 29 VFs
[06:32:08] [PASSED] 30 VFs
[06:32:08] [PASSED] 31 VFs
[06:32:08] [PASSED] 32 VFs
[06:32:08] [PASSED] 33 VFs
[06:32:08] [PASSED] 34 VFs
[06:32:08] [PASSED] 35 VFs
[06:32:08] [PASSED] 36 VFs
[06:32:08] [PASSED] 37 VFs
[06:32:08] [PASSED] 38 VFs
[06:32:08] [PASSED] 39 VFs
[06:32:08] [PASSED] 40 VFs
[06:32:08] [PASSED] 41 VFs
[06:32:08] [PASSED] 42 VFs
[06:32:08] [PASSED] 43 VFs
[06:32:08] [PASSED] 44 VFs
[06:32:08] [PASSED] 45 VFs
[06:32:08] [PASSED] 46 VFs
[06:32:08] [PASSED] 47 VFs
[06:32:08] [PASSED] 48 VFs
[06:32:08] [PASSED] 49 VFs
[06:32:08] [PASSED] 50 VFs
[06:32:08] [PASSED] 51 VFs
[06:32:08] [PASSED] 52 VFs
[06:32:08] [PASSED] 53 VFs
[06:32:08] [PASSED] 54 VFs
[06:32:08] [PASSED] 55 VFs
[06:32:08] [PASSED] 56 VFs
[06:32:08] [PASSED] 57 VFs
[06:32:08] [PASSED] 58 VFs
[06:32:08] [PASSED] 59 VFs
[06:32:08] [PASSED] 60 VFs
[06:32:08] [PASSED] 61 VFs
[06:32:08] [PASSED] 62 VFs
[06:32:08] [PASSED] 63 VFs
[06:32:08] ================= [PASSED] fair_doorbells ==================
[06:32:08] ======================== fair_ggtt ========================
[06:32:08] [PASSED] 1 VF
[06:32:08] [PASSED] 2 VFs
[06:32:08] [PASSED] 3 VFs
[06:32:08] [PASSED] 4 VFs
[06:32:08] [PASSED] 5 VFs
[06:32:08] [PASSED] 6 VFs
[06:32:08] [PASSED] 7 VFs
[06:32:08] [PASSED] 8 VFs
[06:32:08] [PASSED] 9 VFs
[06:32:08] [PASSED] 10 VFs
[06:32:08] [PASSED] 11 VFs
[06:32:08] [PASSED] 12 VFs
[06:32:08] [PASSED] 13 VFs
[06:32:08] [PASSED] 14 VFs
[06:32:08] [PASSED] 15 VFs
[06:32:08] [PASSED] 16 VFs
[06:32:08] [PASSED] 17 VFs
[06:32:08] [PASSED] 18 VFs
[06:32:08] [PASSED] 19 VFs
[06:32:08] [PASSED] 20 VFs
[06:32:08] [PASSED] 21 VFs
[06:32:08] [PASSED] 22 VFs
[06:32:08] [PASSED] 23 VFs
[06:32:08] [PASSED] 24 VFs
[06:32:08] [PASSED] 25 VFs
[06:32:08] [PASSED] 26 VFs
[06:32:08] [PASSED] 27 VFs
[06:32:08] [PASSED] 28 VFs
[06:32:08] [PASSED] 29 VFs
[06:32:08] [PASSED] 30 VFs
[06:32:08] [PASSED] 31 VFs
[06:32:08] [PASSED] 32 VFs
[06:32:08] [PASSED] 33 VFs
[06:32:08] [PASSED] 34 VFs
[06:32:08] [PASSED] 35 VFs
[06:32:08] [PASSED] 36 VFs
[06:32:08] [PASSED] 37 VFs
[06:32:08] [PASSED] 38 VFs
[06:32:08] [PASSED] 39 VFs
[06:32:08] [PASSED] 40 VFs
[06:32:08] [PASSED] 41 VFs
[06:32:08] [PASSED] 42 VFs
[06:32:08] [PASSED] 43 VFs
[06:32:08] [PASSED] 44 VFs
[06:32:08] [PASSED] 45 VFs
[06:32:08] [PASSED] 46 VFs
[06:32:08] [PASSED] 47 VFs
[06:32:08] [PASSED] 48 VFs
[06:32:08] [PASSED] 49 VFs
[06:32:08] [PASSED] 50 VFs
[06:32:08] [PASSED] 51 VFs
[06:32:08] [PASSED] 52 VFs
[06:32:08] [PASSED] 53 VFs
[06:32:08] [PASSED] 54 VFs
[06:32:08] [PASSED] 55 VFs
[06:32:08] [PASSED] 56 VFs
[06:32:08] [PASSED] 57 VFs
[06:32:08] [PASSED] 58 VFs
[06:32:08] [PASSED] 59 VFs
[06:32:08] [PASSED] 60 VFs
[06:32:08] [PASSED] 61 VFs
[06:32:08] [PASSED] 62 VFs
[06:32:08] [PASSED] 63 VFs
[06:32:08] ==================== [PASSED] fair_ggtt ====================
[06:32:08] ================== [PASSED] pf_gt_config ===================
[06:32:08] ===================== lmtt (1 subtest) =====================
[06:32:08] ======================== test_ops =========================
[06:32:08] [PASSED] 2-level
[06:32:08] [PASSED] multi-level
[06:32:08] ==================== [PASSED] test_ops =====================
[06:32:08] ====================== [PASSED] lmtt =======================
[06:32:08] ================= pf_service (11 subtests) =================
[06:32:08] [PASSED] pf_negotiate_any
[06:32:08] [PASSED] pf_negotiate_base_match
[06:32:08] [PASSED] pf_negotiate_base_newer
[06:32:08] [PASSED] pf_negotiate_base_next
[06:32:08] [SKIPPED] pf_negotiate_base_older
[06:32:08] [PASSED] pf_negotiate_base_prev
[06:32:08] [PASSED] pf_negotiate_latest_match
[06:32:08] [PASSED] pf_negotiate_latest_newer
[06:32:08] [PASSED] pf_negotiate_latest_next
[06:32:08] [SKIPPED] pf_negotiate_latest_older
[06:32:08] [SKIPPED] pf_negotiate_latest_prev
[06:32:08] =================== [PASSED] pf_service ====================
[06:32:08] ================= xe_guc_g2g (2 subtests) ==================
[06:32:08] ============== xe_live_guc_g2g_kunit_default ==============
[06:32:08] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[06:32:08] ============== xe_live_guc_g2g_kunit_allmem ===============
[06:32:08] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[06:32:08] =================== [SKIPPED] xe_guc_g2g ===================
[06:32:08] =================== xe_mocs (2 subtests) ===================
[06:32:08] ================ xe_live_mocs_kernel_kunit ================
[06:32:08] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[06:32:08] ================ xe_live_mocs_reset_kunit =================
[06:32:08] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[06:32:08] ==================== [SKIPPED] xe_mocs =====================
[06:32:08] ================= xe_migrate (2 subtests) ==================
[06:32:08] ================= xe_migrate_sanity_kunit =================
[06:32:08] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[06:32:08] ================== xe_validate_ccs_kunit ==================
[06:32:08] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[06:32:08] =================== [SKIPPED] xe_migrate ===================
[06:32:08] ================== xe_dma_buf (1 subtest) ==================
[06:32:08] ==================== xe_dma_buf_kunit =====================
[06:32:08] ================ [SKIPPED] xe_dma_buf_kunit ================
[06:32:08] =================== [SKIPPED] xe_dma_buf ===================
[06:32:08] ================= xe_bo_shrink (1 subtest) =================
[06:32:08] =================== xe_bo_shrink_kunit ====================
[06:32:08] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[06:32:08] ================== [SKIPPED] xe_bo_shrink ==================
[06:32:08] ==================== xe_bo (2 subtests) ====================
[06:32:08] ================== xe_ccs_migrate_kunit ===================
[06:32:08] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[06:32:08] ==================== xe_bo_evict_kunit ====================
[06:32:08] =============== [SKIPPED] xe_bo_evict_kunit ================
[06:32:08] ===================== [SKIPPED] xe_bo ======================
[06:32:08] ==================== args (11 subtests) ====================
[06:32:08] [PASSED] count_args_test
[06:32:08] [PASSED] call_args_example
[06:32:08] [PASSED] call_args_test
[06:32:08] [PASSED] drop_first_arg_example
[06:32:08] [PASSED] drop_first_arg_test
[06:32:08] [PASSED] first_arg_example
[06:32:08] [PASSED] first_arg_test
[06:32:08] [PASSED] last_arg_example
[06:32:08] [PASSED] last_arg_test
[06:32:08] [PASSED] pick_arg_example
[06:32:08] [PASSED] sep_comma_example
[06:32:08] ====================== [PASSED] args =======================
[06:32:08] =================== xe_pci (3 subtests) ====================
[06:32:08] ==================== check_graphics_ip ====================
[06:32:08] [PASSED] 12.00 Xe_LP
[06:32:08] [PASSED] 12.10 Xe_LP+
[06:32:08] [PASSED] 12.55 Xe_HPG
[06:32:08] [PASSED] 12.60 Xe_HPC
[06:32:08] [PASSED] 12.70 Xe_LPG
[06:32:08] [PASSED] 12.71 Xe_LPG
[06:32:08] [PASSED] 12.74 Xe_LPG+
[06:32:08] [PASSED] 20.01 Xe2_HPG
[06:32:08] [PASSED] 20.02 Xe2_HPG
[06:32:08] [PASSED] 20.04 Xe2_LPG
[06:32:08] [PASSED] 30.00 Xe3_LPG
[06:32:08] [PASSED] 30.01 Xe3_LPG
[06:32:08] [PASSED] 30.03 Xe3_LPG
[06:32:08] [PASSED] 30.04 Xe3_LPG
[06:32:08] [PASSED] 30.05 Xe3_LPG
[06:32:08] [PASSED] 35.11 Xe3p_XPC
[06:32:08] ================ [PASSED] check_graphics_ip ================
[06:32:08] ===================== check_media_ip ======================
[06:32:08] [PASSED] 12.00 Xe_M
[06:32:08] [PASSED] 12.55 Xe_HPM
[06:32:08] [PASSED] 13.00 Xe_LPM+
[06:32:08] [PASSED] 13.01 Xe2_HPM
[06:32:08] [PASSED] 20.00 Xe2_LPM
[06:32:08] [PASSED] 30.00 Xe3_LPM
[06:32:08] [PASSED] 30.02 Xe3_LPM
[06:32:08] [PASSED] 35.00 Xe3p_LPM
[06:32:08] [PASSED] 35.03 Xe3p_HPM
[06:32:08] ================= [PASSED] check_media_ip ==================
[06:32:08] =================== check_platform_desc ===================
[06:32:08] [PASSED] 0x9A60 (TIGERLAKE)
[06:32:08] [PASSED] 0x9A68 (TIGERLAKE)
[06:32:08] [PASSED] 0x9A70 (TIGERLAKE)
[06:32:08] [PASSED] 0x9A40 (TIGERLAKE)
[06:32:08] [PASSED] 0x9A49 (TIGERLAKE)
[06:32:08] [PASSED] 0x9A59 (TIGERLAKE)
[06:32:08] [PASSED] 0x9A78 (TIGERLAKE)
[06:32:08] [PASSED] 0x9AC0 (TIGERLAKE)
[06:32:08] [PASSED] 0x9AC9 (TIGERLAKE)
[06:32:08] [PASSED] 0x9AD9 (TIGERLAKE)
[06:32:08] [PASSED] 0x9AF8 (TIGERLAKE)
[06:32:08] [PASSED] 0x4C80 (ROCKETLAKE)
[06:32:08] [PASSED] 0x4C8A (ROCKETLAKE)
[06:32:08] [PASSED] 0x4C8B (ROCKETLAKE)
[06:32:08] [PASSED] 0x4C8C (ROCKETLAKE)
[06:32:08] [PASSED] 0x4C90 (ROCKETLAKE)
[06:32:08] [PASSED] 0x4C9A (ROCKETLAKE)
[06:32:08] [PASSED] 0x4680 (ALDERLAKE_S)
[06:32:08] [PASSED] 0x4682 (ALDERLAKE_S)
[06:32:08] [PASSED] 0x4688 (ALDERLAKE_S)
[06:32:08] [PASSED] 0x468A (ALDERLAKE_S)
[06:32:08] [PASSED] 0x468B (ALDERLAKE_S)
[06:32:08] [PASSED] 0x4690 (ALDERLAKE_S)
[06:32:08] [PASSED] 0x4692 (ALDERLAKE_S)
[06:32:08] [PASSED] 0x4693 (ALDERLAKE_S)
[06:32:08] [PASSED] 0x46A0 (ALDERLAKE_P)
[06:32:08] [PASSED] 0x46A1 (ALDERLAKE_P)
[06:32:08] [PASSED] 0x46A2 (ALDERLAKE_P)
[06:32:08] [PASSED] 0x46A3 (ALDERLAKE_P)
[06:32:08] [PASSED] 0x46A6 (ALDERLAKE_P)
[06:32:08] [PASSED] 0x46A8 (ALDERLAKE_P)
[06:32:08] [PASSED] 0x46AA (ALDERLAKE_P)
[06:32:08] [PASSED] 0x462A (ALDERLAKE_P)
[06:32:08] [PASSED] 0x4626 (ALDERLAKE_P)
[06:32:08] [PASSED] 0x4628 (ALDERLAKE_P)
[06:32:08] [PASSED] 0x46B0 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[06:32:08] [PASSED] 0x46B1 (ALDERLAKE_P)
[06:32:08] [PASSED] 0x46B2 (ALDERLAKE_P)
[06:32:08] [PASSED] 0x46B3 (ALDERLAKE_P)
[06:32:08] [PASSED] 0x46C0 (ALDERLAKE_P)
[06:32:08] [PASSED] 0x46C1 (ALDERLAKE_P)
[06:32:08] [PASSED] 0x46C2 (ALDERLAKE_P)
[06:32:08] [PASSED] 0x46C3 (ALDERLAKE_P)
[06:32:08] [PASSED] 0x46D0 (ALDERLAKE_N)
[06:32:08] [PASSED] 0x46D1 (ALDERLAKE_N)
[06:32:08] [PASSED] 0x46D2 (ALDERLAKE_N)
[06:32:08] [PASSED] 0x46D3 (ALDERLAKE_N)
[06:32:08] [PASSED] 0x46D4 (ALDERLAKE_N)
[06:32:08] [PASSED] 0xA721 (ALDERLAKE_P)
[06:32:08] [PASSED] 0xA7A1 (ALDERLAKE_P)
[06:32:08] [PASSED] 0xA7A9 (ALDERLAKE_P)
[06:32:08] [PASSED] 0xA7AC (ALDERLAKE_P)
[06:32:08] [PASSED] 0xA7AD (ALDERLAKE_P)
[06:32:08] [PASSED] 0xA720 (ALDERLAKE_P)
[06:32:08] [PASSED] 0xA7A0 (ALDERLAKE_P)
[06:32:08] [PASSED] 0xA7A8 (ALDERLAKE_P)
[06:32:08] [PASSED] 0xA7AA (ALDERLAKE_P)
[06:32:08] [PASSED] 0xA7AB (ALDERLAKE_P)
[06:32:08] [PASSED] 0xA780 (ALDERLAKE_S)
[06:32:08] [PASSED] 0xA781 (ALDERLAKE_S)
[06:32:08] [PASSED] 0xA782 (ALDERLAKE_S)
[06:32:08] [PASSED] 0xA783 (ALDERLAKE_S)
[06:32:08] [PASSED] 0xA788 (ALDERLAKE_S)
[06:32:08] [PASSED] 0xA789 (ALDERLAKE_S)
[06:32:08] [PASSED] 0xA78A (ALDERLAKE_S)
[06:32:08] [PASSED] 0xA78B (ALDERLAKE_S)
[06:32:08] [PASSED] 0x4905 (DG1)
[06:32:08] [PASSED] 0x4906 (DG1)
[06:32:08] [PASSED] 0x4907 (DG1)
[06:32:08] [PASSED] 0x4908 (DG1)
[06:32:08] [PASSED] 0x4909 (DG1)
[06:32:08] [PASSED] 0x56C0 (DG2)
[06:32:08] [PASSED] 0x56C2 (DG2)
[06:32:08] [PASSED] 0x56C1 (DG2)
[06:32:08] [PASSED] 0x7D51 (METEORLAKE)
[06:32:08] [PASSED] 0x7DD1 (METEORLAKE)
[06:32:08] [PASSED] 0x7D41 (METEORLAKE)
[06:32:08] [PASSED] 0x7D67 (METEORLAKE)
[06:32:08] [PASSED] 0xB640 (METEORLAKE)
[06:32:08] [PASSED] 0x56A0 (DG2)
[06:32:08] [PASSED] 0x56A1 (DG2)
[06:32:08] [PASSED] 0x56A2 (DG2)
[06:32:08] [PASSED] 0x56BE (DG2)
[06:32:08] [PASSED] 0x56BF (DG2)
[06:32:08] [PASSED] 0x5690 (DG2)
[06:32:08] [PASSED] 0x5691 (DG2)
[06:32:08] [PASSED] 0x5692 (DG2)
[06:32:08] [PASSED] 0x56A5 (DG2)
[06:32:08] [PASSED] 0x56A6 (DG2)
[06:32:08] [PASSED] 0x56B0 (DG2)
[06:32:08] [PASSED] 0x56B1 (DG2)
[06:32:08] [PASSED] 0x56BA (DG2)
[06:32:08] [PASSED] 0x56BB (DG2)
[06:32:08] [PASSED] 0x56BC (DG2)
[06:32:08] [PASSED] 0x56BD (DG2)
[06:32:08] [PASSED] 0x5693 (DG2)
[06:32:08] [PASSED] 0x5694 (DG2)
[06:32:08] [PASSED] 0x5695 (DG2)
[06:32:08] [PASSED] 0x56A3 (DG2)
[06:32:08] [PASSED] 0x56A4 (DG2)
[06:32:08] [PASSED] 0x56B2 (DG2)
[06:32:08] [PASSED] 0x56B3 (DG2)
[06:32:08] [PASSED] 0x5696 (DG2)
[06:32:08] [PASSED] 0x5697 (DG2)
[06:32:08] [PASSED] 0xB69 (PVC)
[06:32:08] [PASSED] 0xB6E (PVC)
[06:32:08] [PASSED] 0xBD4 (PVC)
[06:32:08] [PASSED] 0xBD5 (PVC)
[06:32:08] [PASSED] 0xBD6 (PVC)
[06:32:08] [PASSED] 0xBD7 (PVC)
[06:32:08] [PASSED] 0xBD8 (PVC)
[06:32:08] [PASSED] 0xBD9 (PVC)
[06:32:08] [PASSED] 0xBDA (PVC)
[06:32:08] [PASSED] 0xBDB (PVC)
[06:32:08] [PASSED] 0xBE0 (PVC)
[06:32:08] [PASSED] 0xBE1 (PVC)
[06:32:08] [PASSED] 0xBE5 (PVC)
[06:32:08] [PASSED] 0x7D40 (METEORLAKE)
[06:32:08] [PASSED] 0x7D45 (METEORLAKE)
[06:32:08] [PASSED] 0x7D55 (METEORLAKE)
[06:32:08] [PASSED] 0x7D60 (METEORLAKE)
[06:32:08] [PASSED] 0x7DD5 (METEORLAKE)
[06:32:08] [PASSED] 0x6420 (LUNARLAKE)
[06:32:08] [PASSED] 0x64A0 (LUNARLAKE)
[06:32:08] [PASSED] 0x64B0 (LUNARLAKE)
[06:32:08] [PASSED] 0xE202 (BATTLEMAGE)
[06:32:08] [PASSED] 0xE209 (BATTLEMAGE)
[06:32:08] [PASSED] 0xE20B (BATTLEMAGE)
[06:32:08] [PASSED] 0xE20C (BATTLEMAGE)
[06:32:08] [PASSED] 0xE20D (BATTLEMAGE)
[06:32:08] [PASSED] 0xE210 (BATTLEMAGE)
[06:32:08] [PASSED] 0xE211 (BATTLEMAGE)
[06:32:08] [PASSED] 0xE212 (BATTLEMAGE)
[06:32:08] [PASSED] 0xE216 (BATTLEMAGE)
[06:32:08] [PASSED] 0xE220 (BATTLEMAGE)
[06:32:08] [PASSED] 0xE221 (BATTLEMAGE)
[06:32:08] [PASSED] 0xE222 (BATTLEMAGE)
[06:32:08] [PASSED] 0xE223 (BATTLEMAGE)
[06:32:08] [PASSED] 0xB080 (PANTHERLAKE)
[06:32:08] [PASSED] 0xB081 (PANTHERLAKE)
[06:32:08] [PASSED] 0xB082 (PANTHERLAKE)
[06:32:08] [PASSED] 0xB083 (PANTHERLAKE)
[06:32:08] [PASSED] 0xB084 (PANTHERLAKE)
[06:32:08] [PASSED] 0xB085 (PANTHERLAKE)
[06:32:08] [PASSED] 0xB086 (PANTHERLAKE)
[06:32:08] [PASSED] 0xB087 (PANTHERLAKE)
[06:32:08] [PASSED] 0xB08F (PANTHERLAKE)
[06:32:08] [PASSED] 0xB090 (PANTHERLAKE)
[06:32:08] [PASSED] 0xB0A0 (PANTHERLAKE)
[06:32:08] [PASSED] 0xB0B0 (PANTHERLAKE)
[06:32:08] [PASSED] 0xD740 (NOVALAKE_S)
[06:32:08] [PASSED] 0xD741 (NOVALAKE_S)
[06:32:08] [PASSED] 0xD742 (NOVALAKE_S)
[06:32:08] [PASSED] 0xD743 (NOVALAKE_S)
[06:32:08] [PASSED] 0xD744 (NOVALAKE_S)
[06:32:08] [PASSED] 0xD745 (NOVALAKE_S)
[06:32:08] [PASSED] 0x674C (CRESCENTISLAND)
[06:32:08] [PASSED] 0xFD80 (PANTHERLAKE)
[06:32:08] [PASSED] 0xFD81 (PANTHERLAKE)
[06:32:08] =============== [PASSED] check_platform_desc ===============
[06:32:08] ===================== [PASSED] xe_pci ======================
[06:32:08] =================== xe_rtp (2 subtests) ====================
[06:32:08] =============== xe_rtp_process_to_sr_tests ================
[06:32:08] [PASSED] coalesce-same-reg
[06:32:08] [PASSED] no-match-no-add
[06:32:08] [PASSED] match-or
[06:32:08] [PASSED] match-or-xfail
[06:32:08] [PASSED] no-match-no-add-multiple-rules
[06:32:08] [PASSED] two-regs-two-entries
[06:32:08] [PASSED] clr-one-set-other
[06:32:08] [PASSED] set-field
[06:32:08] [PASSED] conflict-duplicate
[06:32:08] [PASSED] conflict-not-disjoint
[06:32:08] [PASSED] conflict-reg-type
[06:32:08] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[06:32:08] ================== xe_rtp_process_tests ===================
[06:32:08] [PASSED] active1
[06:32:08] [PASSED] active2
[06:32:08] [PASSED] active-inactive
[06:32:08] [PASSED] inactive-active
[06:32:08] [PASSED] inactive-1st_or_active-inactive
[06:32:08] [PASSED] inactive-2nd_or_active-inactive
[06:32:08] [PASSED] inactive-last_or_active-inactive
[06:32:08] [PASSED] inactive-no_or_active-inactive
[06:32:08] ============== [PASSED] xe_rtp_process_tests ===============
[06:32:08] ===================== [PASSED] xe_rtp ======================
[06:32:08] ==================== xe_wa (1 subtest) =====================
[06:32:08] ======================== xe_wa_gt =========================
[06:32:08] [PASSED] TIGERLAKE B0
[06:32:08] [PASSED] DG1 A0
[06:32:08] [PASSED] DG1 B0
[06:32:08] [PASSED] ALDERLAKE_S A0
[06:32:08] [PASSED] ALDERLAKE_S B0
[06:32:08] [PASSED] ALDERLAKE_S C0
[06:32:08] [PASSED] ALDERLAKE_S D0
[06:32:08] [PASSED] ALDERLAKE_P A0
[06:32:08] [PASSED] ALDERLAKE_P B0
[06:32:08] [PASSED] ALDERLAKE_P C0
[06:32:08] [PASSED] ALDERLAKE_S RPLS D0
[06:32:08] [PASSED] ALDERLAKE_P RPLU E0
[06:32:08] [PASSED] DG2 G10 C0
[06:32:08] [PASSED] DG2 G11 B1
[06:32:08] [PASSED] DG2 G12 A1
[06:32:08] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[06:32:08] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[06:32:08] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[06:32:08] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[06:32:08] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[06:32:08] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[06:32:08] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[06:32:08] ==================== [PASSED] xe_wa_gt =====================
[06:32:08] ====================== [PASSED] xe_wa ======================
[06:32:08] ============================================================
[06:32:08] Testing complete. Ran 510 tests: passed: 492, skipped: 18
[06:32:08] Elapsed time: 35.359s total, 4.258s configuring, 30.584s building, 0.466s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[06:32:09] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[06:32:10] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[06:32:35] Starting KUnit Kernel (1/1)...
[06:32:35] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[06:32:35] ============ drm_test_pick_cmdline (2 subtests) ============
[06:32:35] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[06:32:35] =============== drm_test_pick_cmdline_named ===============
[06:32:35] [PASSED] NTSC
[06:32:35] [PASSED] NTSC-J
[06:32:35] [PASSED] PAL
[06:32:35] [PASSED] PAL-M
[06:32:35] =========== [PASSED] drm_test_pick_cmdline_named ===========
[06:32:35] ============== [PASSED] drm_test_pick_cmdline ==============
[06:32:35] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[06:32:35] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[06:32:35] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[06:32:35] =========== drm_validate_clone_mode (2 subtests) ===========
[06:32:35] ============== drm_test_check_in_clone_mode ===============
[06:32:35] [PASSED] in_clone_mode
[06:32:35] [PASSED] not_in_clone_mode
[06:32:35] ========== [PASSED] drm_test_check_in_clone_mode ===========
[06:32:35] =============== drm_test_check_valid_clones ===============
[06:32:35] [PASSED] not_in_clone_mode
[06:32:35] [PASSED] valid_clone
[06:32:35] [PASSED] invalid_clone
[06:32:35] =========== [PASSED] drm_test_check_valid_clones ===========
[06:32:35] ============= [PASSED] drm_validate_clone_mode =============
[06:32:35] ============= drm_validate_modeset (1 subtest) =============
[06:32:35] [PASSED] drm_test_check_connector_changed_modeset
[06:32:35] ============== [PASSED] drm_validate_modeset ===============
[06:32:35] ====== drm_test_bridge_get_current_state (2 subtests) ======
[06:32:35] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[06:32:35] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[06:32:35] ======== [PASSED] drm_test_bridge_get_current_state ========
[06:32:35] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[06:32:35] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[06:32:35] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[06:32:35] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[06:32:35] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[06:32:35] ============== drm_bridge_alloc (2 subtests) ===============
[06:32:35] [PASSED] drm_test_drm_bridge_alloc_basic
[06:32:35] [PASSED] drm_test_drm_bridge_alloc_get_put
[06:32:35] ================ [PASSED] drm_bridge_alloc =================
[06:32:35] ================== drm_buddy (8 subtests) ==================
[06:32:35] [PASSED] drm_test_buddy_alloc_limit
[06:32:35] [PASSED] drm_test_buddy_alloc_optimistic
[06:32:35] [PASSED] drm_test_buddy_alloc_pessimistic
[06:32:35] [PASSED] drm_test_buddy_alloc_pathological
[06:32:35] [PASSED] drm_test_buddy_alloc_contiguous
[06:32:35] [PASSED] drm_test_buddy_alloc_clear
[06:32:35] [PASSED] drm_test_buddy_alloc_range_bias
[06:32:35] [PASSED] drm_test_buddy_fragmentation_performance
[06:32:35] ==================== [PASSED] drm_buddy ====================
[06:32:35] ============= drm_cmdline_parser (40 subtests) =============
[06:32:35] [PASSED] drm_test_cmdline_force_d_only
[06:32:35] [PASSED] drm_test_cmdline_force_D_only_dvi
[06:32:35] [PASSED] drm_test_cmdline_force_D_only_hdmi
[06:32:35] [PASSED] drm_test_cmdline_force_D_only_not_digital
[06:32:35] [PASSED] drm_test_cmdline_force_e_only
[06:32:35] [PASSED] drm_test_cmdline_res
[06:32:35] [PASSED] drm_test_cmdline_res_vesa
[06:32:35] [PASSED] drm_test_cmdline_res_vesa_rblank
[06:32:35] [PASSED] drm_test_cmdline_res_rblank
[06:32:35] [PASSED] drm_test_cmdline_res_bpp
[06:32:35] [PASSED] drm_test_cmdline_res_refresh
[06:32:35] [PASSED] drm_test_cmdline_res_bpp_refresh
[06:32:35] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[06:32:35] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[06:32:35] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[06:32:35] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[06:32:35] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[06:32:35] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[06:32:35] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[06:32:35] [PASSED] drm_test_cmdline_res_margins_force_on
[06:32:35] [PASSED] drm_test_cmdline_res_vesa_margins
[06:32:35] [PASSED] drm_test_cmdline_name
[06:32:35] [PASSED] drm_test_cmdline_name_bpp
[06:32:35] [PASSED] drm_test_cmdline_name_option
[06:32:35] [PASSED] drm_test_cmdline_name_bpp_option
[06:32:35] [PASSED] drm_test_cmdline_rotate_0
[06:32:35] [PASSED] drm_test_cmdline_rotate_90
[06:32:35] [PASSED] drm_test_cmdline_rotate_180
[06:32:35] [PASSED] drm_test_cmdline_rotate_270
[06:32:35] [PASSED] drm_test_cmdline_hmirror
[06:32:35] [PASSED] drm_test_cmdline_vmirror
[06:32:35] [PASSED] drm_test_cmdline_margin_options
[06:32:35] [PASSED] drm_test_cmdline_multiple_options
[06:32:35] [PASSED] drm_test_cmdline_bpp_extra_and_option
[06:32:35] [PASSED] drm_test_cmdline_extra_and_option
[06:32:35] [PASSED] drm_test_cmdline_freestanding_options
[06:32:35] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[06:32:35] [PASSED] drm_test_cmdline_panel_orientation
[06:32:35] ================ drm_test_cmdline_invalid =================
[06:32:35] [PASSED] margin_only
[06:32:35] [PASSED] interlace_only
[06:32:35] [PASSED] res_missing_x
[06:32:35] [PASSED] res_missing_y
[06:32:35] [PASSED] res_bad_y
[06:32:35] [PASSED] res_missing_y_bpp
[06:32:35] [PASSED] res_bad_bpp
[06:32:35] [PASSED] res_bad_refresh
[06:32:35] [PASSED] res_bpp_refresh_force_on_off
[06:32:35] [PASSED] res_invalid_mode
[06:32:35] [PASSED] res_bpp_wrong_place_mode
[06:32:35] [PASSED] name_bpp_refresh
[06:32:35] [PASSED] name_refresh
[06:32:35] [PASSED] name_refresh_wrong_mode
[06:32:35] [PASSED] name_refresh_invalid_mode
[06:32:35] [PASSED] rotate_multiple
[06:32:35] [PASSED] rotate_invalid_val
[06:32:35] [PASSED] rotate_truncated
[06:32:35] [PASSED] invalid_option
[06:32:35] [PASSED] invalid_tv_option
[06:32:35] [PASSED] truncated_tv_option
[06:32:35] ============ [PASSED] drm_test_cmdline_invalid =============
[06:32:35] =============== drm_test_cmdline_tv_options ===============
[06:32:35] [PASSED] NTSC
[06:32:35] [PASSED] NTSC_443
[06:32:35] [PASSED] NTSC_J
[06:32:35] [PASSED] PAL
[06:32:35] [PASSED] PAL_M
[06:32:35] [PASSED] PAL_N
[06:32:35] [PASSED] SECAM
[06:32:35] [PASSED] MONO_525
[06:32:35] [PASSED] MONO_625
[06:32:35] =========== [PASSED] drm_test_cmdline_tv_options ===========
[06:32:35] =============== [PASSED] drm_cmdline_parser ================
[06:32:35] ========== drmm_connector_hdmi_init (20 subtests) ==========
[06:32:35] [PASSED] drm_test_connector_hdmi_init_valid
[06:32:35] [PASSED] drm_test_connector_hdmi_init_bpc_8
[06:32:35] [PASSED] drm_test_connector_hdmi_init_bpc_10
[06:32:35] [PASSED] drm_test_connector_hdmi_init_bpc_12
[06:32:35] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[06:32:35] [PASSED] drm_test_connector_hdmi_init_bpc_null
[06:32:35] [PASSED] drm_test_connector_hdmi_init_formats_empty
[06:32:35] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[06:32:35] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[06:32:35] [PASSED] supported_formats=0x9 yuv420_allowed=1
[06:32:35] [PASSED] supported_formats=0x9 yuv420_allowed=0
[06:32:35] [PASSED] supported_formats=0x3 yuv420_allowed=1
[06:32:35] [PASSED] supported_formats=0x3 yuv420_allowed=0
[06:32:35] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[06:32:35] [PASSED] drm_test_connector_hdmi_init_null_ddc
[06:32:35] [PASSED] drm_test_connector_hdmi_init_null_product
[06:32:35] [PASSED] drm_test_connector_hdmi_init_null_vendor
[06:32:35] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[06:32:35] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[06:32:35] [PASSED] drm_test_connector_hdmi_init_product_valid
[06:32:35] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[06:32:35] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[06:32:35] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[06:32:35] ========= drm_test_connector_hdmi_init_type_valid =========
[06:32:35] [PASSED] HDMI-A
[06:32:35] [PASSED] HDMI-B
[06:32:35] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[06:32:35] ======== drm_test_connector_hdmi_init_type_invalid ========
[06:32:35] [PASSED] Unknown
[06:32:35] [PASSED] VGA
[06:32:35] [PASSED] DVI-I
[06:32:35] [PASSED] DVI-D
[06:32:35] [PASSED] DVI-A
[06:32:35] [PASSED] Composite
[06:32:35] [PASSED] SVIDEO
[06:32:35] [PASSED] LVDS
[06:32:35] [PASSED] Component
[06:32:35] [PASSED] DIN
[06:32:35] [PASSED] DP
[06:32:35] [PASSED] TV
[06:32:35] [PASSED] eDP
[06:32:35] [PASSED] Virtual
[06:32:35] [PASSED] DSI
[06:32:35] [PASSED] DPI
[06:32:35] [PASSED] Writeback
[06:32:35] [PASSED] SPI
[06:32:35] [PASSED] USB
[06:32:35] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[06:32:35] ============ [PASSED] drmm_connector_hdmi_init =============
[06:32:35] ============= drmm_connector_init (3 subtests) =============
[06:32:35] [PASSED] drm_test_drmm_connector_init
[06:32:35] [PASSED] drm_test_drmm_connector_init_null_ddc
[06:32:35] ========= drm_test_drmm_connector_init_type_valid =========
[06:32:35] [PASSED] Unknown
[06:32:35] [PASSED] VGA
[06:32:35] [PASSED] DVI-I
[06:32:35] [PASSED] DVI-D
[06:32:35] [PASSED] DVI-A
[06:32:35] [PASSED] Composite
[06:32:35] [PASSED] SVIDEO
[06:32:35] [PASSED] LVDS
[06:32:35] [PASSED] Component
[06:32:35] [PASSED] DIN
[06:32:35] [PASSED] DP
[06:32:35] [PASSED] HDMI-A
[06:32:35] [PASSED] HDMI-B
[06:32:35] [PASSED] TV
[06:32:35] [PASSED] eDP
[06:32:35] [PASSED] Virtual
[06:32:35] [PASSED] DSI
[06:32:35] [PASSED] DPI
[06:32:35] [PASSED] Writeback
[06:32:35] [PASSED] SPI
[06:32:35] [PASSED] USB
[06:32:35] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[06:32:35] =============== [PASSED] drmm_connector_init ===============
[06:32:35] ========= drm_connector_dynamic_init (6 subtests) ==========
[06:32:35] [PASSED] drm_test_drm_connector_dynamic_init
[06:32:35] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[06:32:35] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[06:32:35] [PASSED] drm_test_drm_connector_dynamic_init_properties
[06:32:35] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[06:32:35] [PASSED] Unknown
[06:32:35] [PASSED] VGA
[06:32:35] [PASSED] DVI-I
[06:32:35] [PASSED] DVI-D
[06:32:35] [PASSED] DVI-A
[06:32:35] [PASSED] Composite
[06:32:35] [PASSED] SVIDEO
[06:32:35] [PASSED] LVDS
[06:32:35] [PASSED] Component
[06:32:35] [PASSED] DIN
[06:32:35] [PASSED] DP
[06:32:35] [PASSED] HDMI-A
[06:32:35] [PASSED] HDMI-B
[06:32:35] [PASSED] TV
[06:32:35] [PASSED] eDP
[06:32:35] [PASSED] Virtual
[06:32:35] [PASSED] DSI
[06:32:35] [PASSED] DPI
[06:32:35] [PASSED] Writeback
[06:32:35] [PASSED] SPI
[06:32:35] [PASSED] USB
[06:32:35] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[06:32:35] ======== drm_test_drm_connector_dynamic_init_name =========
[06:32:35] [PASSED] Unknown
[06:32:35] [PASSED] VGA
[06:32:35] [PASSED] DVI-I
[06:32:35] [PASSED] DVI-D
[06:32:35] [PASSED] DVI-A
[06:32:35] [PASSED] Composite
[06:32:35] [PASSED] SVIDEO
[06:32:35] [PASSED] LVDS
[06:32:35] [PASSED] Component
[06:32:35] [PASSED] DIN
[06:32:35] [PASSED] DP
[06:32:35] [PASSED] HDMI-A
[06:32:35] [PASSED] HDMI-B
[06:32:35] [PASSED] TV
[06:32:35] [PASSED] eDP
[06:32:35] [PASSED] Virtual
[06:32:35] [PASSED] DSI
[06:32:35] [PASSED] DPI
[06:32:35] [PASSED] Writeback
[06:32:35] [PASSED] SPI
[06:32:35] [PASSED] USB
[06:32:35] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[06:32:35] =========== [PASSED] drm_connector_dynamic_init ============
[06:32:35] ==== drm_connector_dynamic_register_early (4 subtests) =====
[06:32:35] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[06:32:35] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[06:32:35] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[06:32:35] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[06:32:35] ====== [PASSED] drm_connector_dynamic_register_early =======
[06:32:35] ======= drm_connector_dynamic_register (7 subtests) ========
[06:32:35] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[06:32:35] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[06:32:35] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[06:32:35] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[06:32:35] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[06:32:35] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[06:32:35] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[06:32:35] ========= [PASSED] drm_connector_dynamic_register ==========
[06:32:35] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[06:32:35] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[06:32:35] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[06:32:35] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[06:32:35] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[06:32:35] ========== drm_test_get_tv_mode_from_name_valid ===========
[06:32:35] [PASSED] NTSC
[06:32:35] [PASSED] NTSC-443
[06:32:35] [PASSED] NTSC-J
[06:32:35] [PASSED] PAL
[06:32:35] [PASSED] PAL-M
[06:32:35] [PASSED] PAL-N
[06:32:35] [PASSED] SECAM
[06:32:35] [PASSED] Mono
[06:32:35] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[06:32:35] [PASSED] drm_test_get_tv_mode_from_name_truncated
[06:32:35] ============ [PASSED] drm_get_tv_mode_from_name ============
[06:32:35] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[06:32:35] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[06:32:35] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[06:32:35] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[06:32:35] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[06:32:35] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[06:32:35] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[06:32:35] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[06:32:35] [PASSED] VIC 96
[06:32:35] [PASSED] VIC 97
[06:32:35] [PASSED] VIC 101
[06:32:35] [PASSED] VIC 102
[06:32:35] [PASSED] VIC 106
[06:32:35] [PASSED] VIC 107
[06:32:35] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[06:32:35] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[06:32:35] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[06:32:35] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[06:32:35] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[06:32:35] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[06:32:35] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[06:32:35] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[06:32:35] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[06:32:35] [PASSED] Automatic
[06:32:35] [PASSED] Full
[06:32:35] [PASSED] Limited 16:235
[06:32:35] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[06:32:35] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[06:32:35] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[06:32:35] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[06:32:35] === drm_test_drm_hdmi_connector_get_output_format_name ====
[06:32:35] [PASSED] RGB
[06:32:35] [PASSED] YUV 4:2:0
[06:32:35] [PASSED] YUV 4:2:2
[06:32:35] [PASSED] YUV 4:4:4
[06:32:35] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[06:32:35] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[06:32:35] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[06:32:35] ============= drm_damage_helper (21 subtests) ==============
[06:32:35] [PASSED] drm_test_damage_iter_no_damage
[06:32:35] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[06:32:35] [PASSED] drm_test_damage_iter_no_damage_src_moved
[06:32:35] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[06:32:35] [PASSED] drm_test_damage_iter_no_damage_not_visible
[06:32:35] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[06:32:35] [PASSED] drm_test_damage_iter_no_damage_no_fb
[06:32:35] [PASSED] drm_test_damage_iter_simple_damage
[06:32:35] [PASSED] drm_test_damage_iter_single_damage
[06:32:35] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[06:32:35] [PASSED] drm_test_damage_iter_single_damage_outside_src
[06:32:35] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[06:32:35] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[06:32:35] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[06:32:35] [PASSED] drm_test_damage_iter_single_damage_src_moved
[06:32:35] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[06:32:35] [PASSED] drm_test_damage_iter_damage
[06:32:35] [PASSED] drm_test_damage_iter_damage_one_intersect
[06:32:35] [PASSED] drm_test_damage_iter_damage_one_outside
[06:32:35] [PASSED] drm_test_damage_iter_damage_src_moved
[06:32:35] [PASSED] drm_test_damage_iter_damage_not_visible
[06:32:35] ================ [PASSED] drm_damage_helper ================
[06:32:35] ============== drm_dp_mst_helper (3 subtests) ==============
[06:32:35] ============== drm_test_dp_mst_calc_pbn_mode ==============
[06:32:35] [PASSED] Clock 154000 BPP 30 DSC disabled
[06:32:35] [PASSED] Clock 234000 BPP 30 DSC disabled
[06:32:35] [PASSED] Clock 297000 BPP 24 DSC disabled
[06:32:35] [PASSED] Clock 332880 BPP 24 DSC enabled
[06:32:35] [PASSED] Clock 324540 BPP 24 DSC enabled
[06:32:35] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[06:32:35] ============== drm_test_dp_mst_calc_pbn_div ===============
[06:32:35] [PASSED] Link rate 2000000 lane count 4
[06:32:35] [PASSED] Link rate 2000000 lane count 2
[06:32:35] [PASSED] Link rate 2000000 lane count 1
[06:32:35] [PASSED] Link rate 1350000 lane count 4
[06:32:35] [PASSED] Link rate 1350000 lane count 2
[06:32:35] [PASSED] Link rate 1350000 lane count 1
[06:32:35] [PASSED] Link rate 1000000 lane count 4
[06:32:35] [PASSED] Link rate 1000000 lane count 2
[06:32:35] [PASSED] Link rate 1000000 lane count 1
[06:32:35] [PASSED] Link rate 810000 lane count 4
[06:32:35] [PASSED] Link rate 810000 lane count 2
[06:32:35] [PASSED] Link rate 810000 lane count 1
[06:32:35] [PASSED] Link rate 540000 lane count 4
[06:32:35] [PASSED] Link rate 540000 lane count 2
[06:32:35] [PASSED] Link rate 540000 lane count 1
[06:32:35] [PASSED] Link rate 270000 lane count 4
[06:32:35] [PASSED] Link rate 270000 lane count 2
[06:32:35] [PASSED] Link rate 270000 lane count 1
[06:32:35] [PASSED] Link rate 162000 lane count 4
[06:32:35] [PASSED] Link rate 162000 lane count 2
[06:32:35] [PASSED] Link rate 162000 lane count 1
[06:32:35] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[06:32:35] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[06:32:35] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[06:32:35] [PASSED] DP_POWER_UP_PHY with port number
[06:32:35] [PASSED] DP_POWER_DOWN_PHY with port number
[06:32:35] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[06:32:35] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[06:32:35] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[06:32:35] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[06:32:35] [PASSED] DP_QUERY_PAYLOAD with port number
[06:32:35] [PASSED] DP_QUERY_PAYLOAD with VCPI
[06:32:35] [PASSED] DP_REMOTE_DPCD_READ with port number
[06:32:35] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[06:32:35] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[06:32:35] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[06:32:35] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[06:32:35] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[06:32:35] [PASSED] DP_REMOTE_I2C_READ with port number
[06:32:35] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[06:32:35] [PASSED] DP_REMOTE_I2C_READ with transactions array
[06:32:35] [PASSED] DP_REMOTE_I2C_WRITE with port number
[06:32:35] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[06:32:35] [PASSED] DP_REMOTE_I2C_WRITE with data array
[06:32:35] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[06:32:35] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[06:32:35] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[06:32:35] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[06:32:35] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[06:32:35] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[06:32:35] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[06:32:35] ================ [PASSED] drm_dp_mst_helper ================
[06:32:35] ================== drm_exec (7 subtests) ===================
[06:32:35] [PASSED] sanitycheck
[06:32:35] [PASSED] test_lock
[06:32:35] [PASSED] test_lock_unlock
[06:32:35] [PASSED] test_duplicates
[06:32:35] [PASSED] test_prepare
[06:32:35] [PASSED] test_prepare_array
[06:32:35] [PASSED] test_multiple_loops
[06:32:35] ==================== [PASSED] drm_exec =====================
[06:32:35] =========== drm_format_helper_test (17 subtests) ===========
[06:32:35] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[06:32:35] [PASSED] single_pixel_source_buffer
[06:32:35] [PASSED] single_pixel_clip_rectangle
[06:32:35] [PASSED] well_known_colors
[06:32:35] [PASSED] destination_pitch
[06:32:35] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[06:32:35] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[06:32:35] [PASSED] single_pixel_source_buffer
[06:32:35] [PASSED] single_pixel_clip_rectangle
[06:32:35] [PASSED] well_known_colors
[06:32:35] [PASSED] destination_pitch
[06:32:35] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[06:32:35] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[06:32:35] [PASSED] single_pixel_source_buffer
[06:32:35] [PASSED] single_pixel_clip_rectangle
[06:32:35] [PASSED] well_known_colors
[06:32:35] [PASSED] destination_pitch
[06:32:35] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[06:32:35] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[06:32:35] [PASSED] single_pixel_source_buffer
[06:32:35] [PASSED] single_pixel_clip_rectangle
[06:32:35] [PASSED] well_known_colors
[06:32:35] [PASSED] destination_pitch
[06:32:35] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[06:32:35] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[06:32:35] [PASSED] single_pixel_source_buffer
[06:32:35] [PASSED] single_pixel_clip_rectangle
[06:32:35] [PASSED] well_known_colors
[06:32:35] [PASSED] destination_pitch
[06:32:35] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[06:32:35] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[06:32:35] [PASSED] single_pixel_source_buffer
[06:32:35] [PASSED] single_pixel_clip_rectangle
[06:32:35] [PASSED] well_known_colors
[06:32:35] [PASSED] destination_pitch
[06:32:35] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[06:32:35] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[06:32:35] [PASSED] single_pixel_source_buffer
[06:32:35] [PASSED] single_pixel_clip_rectangle
[06:32:35] [PASSED] well_known_colors
[06:32:35] [PASSED] destination_pitch
[06:32:35] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[06:32:35] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[06:32:35] [PASSED] single_pixel_source_buffer
[06:32:35] [PASSED] single_pixel_clip_rectangle
[06:32:35] [PASSED] well_known_colors
[06:32:35] [PASSED] destination_pitch
[06:32:35] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[06:32:35] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[06:32:35] [PASSED] single_pixel_source_buffer
[06:32:35] [PASSED] single_pixel_clip_rectangle
[06:32:35] [PASSED] well_known_colors
[06:32:35] [PASSED] destination_pitch
[06:32:35] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[06:32:35] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[06:32:35] [PASSED] single_pixel_source_buffer
[06:32:35] [PASSED] single_pixel_clip_rectangle
[06:32:35] [PASSED] well_known_colors
[06:32:35] [PASSED] destination_pitch
[06:32:35] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[06:32:35] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[06:32:35] [PASSED] single_pixel_source_buffer
[06:32:35] [PASSED] single_pixel_clip_rectangle
[06:32:35] [PASSED] well_known_colors
[06:32:35] [PASSED] destination_pitch
[06:32:35] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[06:32:35] ============== drm_test_fb_xrgb8888_to_mono ===============
[06:32:35] [PASSED] single_pixel_source_buffer
[06:32:35] [PASSED] single_pixel_clip_rectangle
[06:32:35] [PASSED] well_known_colors
[06:32:35] [PASSED] destination_pitch
[06:32:35] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[06:32:35] ==================== drm_test_fb_swab =====================
[06:32:35] [PASSED] single_pixel_source_buffer
[06:32:35] [PASSED] single_pixel_clip_rectangle
[06:32:35] [PASSED] well_known_colors
[06:32:35] [PASSED] destination_pitch
[06:32:35] ================ [PASSED] drm_test_fb_swab =================
[06:32:35] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[06:32:35] [PASSED] single_pixel_source_buffer
[06:32:35] [PASSED] single_pixel_clip_rectangle
[06:32:35] [PASSED] well_known_colors
[06:32:35] [PASSED] destination_pitch
[06:32:35] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[06:32:35] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[06:32:35] [PASSED] single_pixel_source_buffer
[06:32:35] [PASSED] single_pixel_clip_rectangle
[06:32:35] [PASSED] well_known_colors
[06:32:35] [PASSED] destination_pitch
[06:32:35] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[06:32:35] ================= drm_test_fb_clip_offset =================
[06:32:35] [PASSED] pass through
[06:32:35] [PASSED] horizontal offset
[06:32:35] [PASSED] vertical offset
[06:32:35] [PASSED] horizontal and vertical offset
[06:32:35] [PASSED] horizontal offset (custom pitch)
[06:32:35] [PASSED] vertical offset (custom pitch)
[06:32:35] [PASSED] horizontal and vertical offset (custom pitch)
[06:32:35] ============= [PASSED] drm_test_fb_clip_offset =============
[06:32:35] =================== drm_test_fb_memcpy ====================
[06:32:35] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[06:32:35] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[06:32:35] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[06:32:35] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[06:32:35] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[06:32:35] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[06:32:35] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[06:32:35] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[06:32:35] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[06:32:35] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[06:32:35] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[06:32:35] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[06:32:35] =============== [PASSED] drm_test_fb_memcpy ================
[06:32:35] ============= [PASSED] drm_format_helper_test ==============
[06:32:35] ================= drm_format (18 subtests) =================
[06:32:35] [PASSED] drm_test_format_block_width_invalid
[06:32:35] [PASSED] drm_test_format_block_width_one_plane
[06:32:35] [PASSED] drm_test_format_block_width_two_plane
[06:32:35] [PASSED] drm_test_format_block_width_three_plane
[06:32:35] [PASSED] drm_test_format_block_width_tiled
[06:32:35] [PASSED] drm_test_format_block_height_invalid
[06:32:35] [PASSED] drm_test_format_block_height_one_plane
[06:32:35] [PASSED] drm_test_format_block_height_two_plane
[06:32:35] [PASSED] drm_test_format_block_height_three_plane
[06:32:35] [PASSED] drm_test_format_block_height_tiled
[06:32:35] [PASSED] drm_test_format_min_pitch_invalid
[06:32:35] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[06:32:35] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[06:32:35] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[06:32:35] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[06:32:35] [PASSED] drm_test_format_min_pitch_two_plane
[06:32:35] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[06:32:35] [PASSED] drm_test_format_min_pitch_tiled
[06:32:35] =================== [PASSED] drm_format ====================
[06:32:35] ============== drm_framebuffer (10 subtests) ===============
[06:32:35] ========== drm_test_framebuffer_check_src_coords ==========
[06:32:35] [PASSED] Success: source fits into fb
[06:32:35] [PASSED] Fail: overflowing fb with x-axis coordinate
[06:32:35] [PASSED] Fail: overflowing fb with y-axis coordinate
[06:32:35] [PASSED] Fail: overflowing fb with source width
[06:32:35] [PASSED] Fail: overflowing fb with source height
[06:32:35] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[06:32:35] [PASSED] drm_test_framebuffer_cleanup
[06:32:35] =============== drm_test_framebuffer_create ===============
[06:32:35] [PASSED] ABGR8888 normal sizes
[06:32:35] [PASSED] ABGR8888 max sizes
[06:32:35] [PASSED] ABGR8888 pitch greater than min required
[06:32:35] [PASSED] ABGR8888 pitch less than min required
[06:32:35] [PASSED] ABGR8888 Invalid width
[06:32:35] [PASSED] ABGR8888 Invalid buffer handle
[06:32:35] [PASSED] No pixel format
[06:32:35] [PASSED] ABGR8888 Width 0
[06:32:35] [PASSED] ABGR8888 Height 0
[06:32:35] [PASSED] ABGR8888 Out of bound height * pitch combination
[06:32:35] [PASSED] ABGR8888 Large buffer offset
[06:32:35] [PASSED] ABGR8888 Buffer offset for inexistent plane
[06:32:35] [PASSED] ABGR8888 Invalid flag
[06:32:35] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[06:32:35] [PASSED] ABGR8888 Valid buffer modifier
[06:32:35] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[06:32:35] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[06:32:35] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[06:32:35] [PASSED] NV12 Normal sizes
[06:32:35] [PASSED] NV12 Max sizes
[06:32:35] [PASSED] NV12 Invalid pitch
[06:32:35] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[06:32:35] [PASSED] NV12 different modifier per-plane
[06:32:35] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[06:32:35] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[06:32:35] [PASSED] NV12 Modifier for inexistent plane
[06:32:35] [PASSED] NV12 Handle for inexistent plane
[06:32:35] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[06:32:35] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[06:32:35] [PASSED] YVU420 Normal sizes
[06:32:35] [PASSED] YVU420 Max sizes
[06:32:35] [PASSED] YVU420 Invalid pitch
[06:32:35] [PASSED] YVU420 Different pitches
[06:32:35] [PASSED] YVU420 Different buffer offsets/pitches
[06:32:35] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[06:32:35] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[06:32:35] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[06:32:35] [PASSED] YVU420 Valid modifier
[06:32:35] [PASSED] YVU420 Different modifiers per plane
[06:32:35] [PASSED] YVU420 Modifier for inexistent plane
[06:32:35] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[06:32:35] [PASSED] X0L2 Normal sizes
[06:32:35] [PASSED] X0L2 Max sizes
[06:32:35] [PASSED] X0L2 Invalid pitch
[06:32:35] [PASSED] X0L2 Pitch greater than minimum required
[06:32:35] [PASSED] X0L2 Handle for inexistent plane
[06:32:35] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[06:32:35] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[06:32:35] [PASSED] X0L2 Valid modifier
[06:32:35] [PASSED] X0L2 Modifier for inexistent plane
[06:32:35] =========== [PASSED] drm_test_framebuffer_create ===========
[06:32:35] [PASSED] drm_test_framebuffer_free
[06:32:35] [PASSED] drm_test_framebuffer_init
[06:32:35] [PASSED] drm_test_framebuffer_init_bad_format
[06:32:35] [PASSED] drm_test_framebuffer_init_dev_mismatch
[06:32:35] [PASSED] drm_test_framebuffer_lookup
[06:32:35] [PASSED] drm_test_framebuffer_lookup_inexistent
[06:32:35] [PASSED] drm_test_framebuffer_modifiers_not_supported
[06:32:35] ================= [PASSED] drm_framebuffer =================
[06:32:35] ================ drm_gem_shmem (8 subtests) ================
[06:32:35] [PASSED] drm_gem_shmem_test_obj_create
[06:32:35] [PASSED] drm_gem_shmem_test_obj_create_private
[06:32:35] [PASSED] drm_gem_shmem_test_pin_pages
[06:32:35] [PASSED] drm_gem_shmem_test_vmap
[06:32:35] [PASSED] drm_gem_shmem_test_get_pages_sgt
[06:32:35] [PASSED] drm_gem_shmem_test_get_sg_table
[06:32:35] [PASSED] drm_gem_shmem_test_madvise
[06:32:35] [PASSED] drm_gem_shmem_test_purge
[06:32:35] ================== [PASSED] drm_gem_shmem ==================
[06:32:35] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[06:32:35] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[06:32:35] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[06:32:35] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[06:32:35] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[06:32:35] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[06:32:35] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[06:32:35] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[06:32:35] [PASSED] Automatic
[06:32:35] [PASSED] Full
[06:32:35] [PASSED] Limited 16:235
[06:32:35] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[06:32:35] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[06:32:35] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[06:32:35] [PASSED] drm_test_check_disable_connector
[06:32:35] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[06:32:35] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[06:32:35] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[06:32:35] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[06:32:35] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[06:32:35] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[06:32:35] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[06:32:35] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[06:32:35] [PASSED] drm_test_check_output_bpc_dvi
[06:32:35] [PASSED] drm_test_check_output_bpc_format_vic_1
[06:32:35] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[06:32:35] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[06:32:35] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[06:32:35] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[06:32:35] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[06:32:35] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[06:32:35] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[06:32:35] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[06:32:35] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[06:32:35] [PASSED] drm_test_check_broadcast_rgb_value
[06:32:35] [PASSED] drm_test_check_bpc_8_value
[06:32:35] [PASSED] drm_test_check_bpc_10_value
[06:32:35] [PASSED] drm_test_check_bpc_12_value
[06:32:35] [PASSED] drm_test_check_format_value
[06:32:35] [PASSED] drm_test_check_tmds_char_value
[06:32:35] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[06:32:35] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[06:32:35] [PASSED] drm_test_check_mode_valid
[06:32:35] [PASSED] drm_test_check_mode_valid_reject
[06:32:35] [PASSED] drm_test_check_mode_valid_reject_rate
[06:32:35] [PASSED] drm_test_check_mode_valid_reject_max_clock
[06:32:35] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[06:32:35] ================= drm_managed (2 subtests) =================
[06:32:35] [PASSED] drm_test_managed_release_action
[06:32:35] [PASSED] drm_test_managed_run_action
[06:32:35] =================== [PASSED] drm_managed ===================
[06:32:35] =================== drm_mm (6 subtests) ====================
[06:32:35] [PASSED] drm_test_mm_init
[06:32:35] [PASSED] drm_test_mm_debug
[06:32:35] [PASSED] drm_test_mm_align32
[06:32:35] [PASSED] drm_test_mm_align64
[06:32:35] [PASSED] drm_test_mm_lowest
[06:32:35] [PASSED] drm_test_mm_highest
[06:32:35] ===================== [PASSED] drm_mm ======================
[06:32:35] ============= drm_modes_analog_tv (5 subtests) =============
[06:32:35] [PASSED] drm_test_modes_analog_tv_mono_576i
[06:32:35] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[06:32:35] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[06:32:35] [PASSED] drm_test_modes_analog_tv_pal_576i
[06:32:35] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[06:32:35] =============== [PASSED] drm_modes_analog_tv ===============
[06:32:35] ============== drm_plane_helper (2 subtests) ===============
[06:32:35] =============== drm_test_check_plane_state ================
[06:32:35] [PASSED] clipping_simple
[06:32:35] [PASSED] clipping_rotate_reflect
[06:32:35] [PASSED] positioning_simple
[06:32:35] [PASSED] upscaling
[06:32:35] [PASSED] downscaling
[06:32:35] [PASSED] rounding1
[06:32:35] [PASSED] rounding2
[06:32:35] [PASSED] rounding3
[06:32:35] [PASSED] rounding4
[06:32:35] =========== [PASSED] drm_test_check_plane_state ============
[06:32:35] =========== drm_test_check_invalid_plane_state ============
[06:32:35] [PASSED] positioning_invalid
[06:32:35] [PASSED] upscaling_invalid
[06:32:35] [PASSED] downscaling_invalid
[06:32:35] ======= [PASSED] drm_test_check_invalid_plane_state ========
[06:32:35] ================ [PASSED] drm_plane_helper =================
[06:32:35] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[06:32:35] ====== drm_test_connector_helper_tv_get_modes_check =======
[06:32:35] [PASSED] None
[06:32:35] [PASSED] PAL
[06:32:35] [PASSED] NTSC
[06:32:35] [PASSED] Both, NTSC Default
[06:32:35] [PASSED] Both, PAL Default
[06:32:35] [PASSED] Both, NTSC Default, with PAL on command-line
[06:32:35] [PASSED] Both, PAL Default, with NTSC on command-line
[06:32:35] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[06:32:35] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[06:32:35] ================== drm_rect (9 subtests) ===================
[06:32:35] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[06:32:35] [PASSED] drm_test_rect_clip_scaled_not_clipped
[06:32:35] [PASSED] drm_test_rect_clip_scaled_clipped
[06:32:35] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[06:32:35] ================= drm_test_rect_intersect =================
[06:32:35] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[06:32:35] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[06:32:35] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[06:32:35] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[06:32:35] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[06:32:35] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[06:32:35] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[06:32:35] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[06:32:35] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[06:32:35] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[06:32:35] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[06:32:35] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[06:32:35] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[06:32:35] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[06:32:35] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[06:32:35] ============= [PASSED] drm_test_rect_intersect =============
[06:32:35] ================ drm_test_rect_calc_hscale ================
[06:32:35] [PASSED] normal use
[06:32:35] [PASSED] out of max range
[06:32:35] [PASSED] out of min range
[06:32:35] [PASSED] zero dst
[06:32:35] [PASSED] negative src
[06:32:35] [PASSED] negative dst
[06:32:35] ============ [PASSED] drm_test_rect_calc_hscale ============
[06:32:35] ================ drm_test_rect_calc_vscale ================
[06:32:35] [PASSED] normal use
stty: 'standard input': Inappropriate ioctl for device
[06:32:35] [PASSED] out of max range
[06:32:35] [PASSED] out of min range
[06:32:35] [PASSED] zero dst
[06:32:35] [PASSED] negative src
[06:32:35] [PASSED] negative dst
[06:32:35] ============ [PASSED] drm_test_rect_calc_vscale ============
[06:32:35] ================== drm_test_rect_rotate ===================
[06:32:35] [PASSED] reflect-x
[06:32:35] [PASSED] reflect-y
[06:32:35] [PASSED] rotate-0
[06:32:35] [PASSED] rotate-90
[06:32:35] [PASSED] rotate-180
[06:32:35] [PASSED] rotate-270
[06:32:35] ============== [PASSED] drm_test_rect_rotate ===============
[06:32:35] ================ drm_test_rect_rotate_inv =================
[06:32:35] [PASSED] reflect-x
[06:32:35] [PASSED] reflect-y
[06:32:35] [PASSED] rotate-0
[06:32:35] [PASSED] rotate-90
[06:32:35] [PASSED] rotate-180
[06:32:35] [PASSED] rotate-270
[06:32:35] ============ [PASSED] drm_test_rect_rotate_inv =============
[06:32:35] ==================== [PASSED] drm_rect =====================
[06:32:35] ============ drm_sysfb_modeset_test (1 subtest) ============
[06:32:35] ============ drm_test_sysfb_build_fourcc_list =============
[06:32:35] [PASSED] no native formats
[06:32:35] [PASSED] XRGB8888 as native format
[06:32:35] [PASSED] remove duplicates
[06:32:35] [PASSED] convert alpha formats
[06:32:35] [PASSED] random formats
[06:32:35] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[06:32:35] ============= [PASSED] drm_sysfb_modeset_test ==============
[06:32:35] ================== drm_fixp (2 subtests) ===================
[06:32:35] [PASSED] drm_test_int2fixp
[06:32:35] [PASSED] drm_test_sm2fixp
[06:32:35] ==================== [PASSED] drm_fixp =====================
[06:32:35] ============================================================
[06:32:35] Testing complete. Ran 624 tests: passed: 624
[06:32:35] Elapsed time: 26.730s total, 1.621s configuring, 24.684s building, 0.394s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[06:32:35] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[06:32:37] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[06:32:46] Starting KUnit Kernel (1/1)...
[06:32:46] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[06:32:47] ================= ttm_device (5 subtests) ==================
[06:32:47] [PASSED] ttm_device_init_basic
[06:32:47] [PASSED] ttm_device_init_multiple
[06:32:47] [PASSED] ttm_device_fini_basic
[06:32:47] [PASSED] ttm_device_init_no_vma_man
[06:32:47] ================== ttm_device_init_pools ==================
[06:32:47] [PASSED] No DMA allocations, no DMA32 required
[06:32:47] [PASSED] DMA allocations, DMA32 required
[06:32:47] [PASSED] No DMA allocations, DMA32 required
[06:32:47] [PASSED] DMA allocations, no DMA32 required
[06:32:47] ============== [PASSED] ttm_device_init_pools ==============
[06:32:47] =================== [PASSED] ttm_device ====================
[06:32:47] ================== ttm_pool (8 subtests) ===================
[06:32:47] ================== ttm_pool_alloc_basic ===================
[06:32:47] [PASSED] One page
[06:32:47] [PASSED] More than one page
[06:32:47] [PASSED] Above the allocation limit
[06:32:47] [PASSED] One page, with coherent DMA mappings enabled
[06:32:47] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[06:32:47] ============== [PASSED] ttm_pool_alloc_basic ===============
[06:32:47] ============== ttm_pool_alloc_basic_dma_addr ==============
[06:32:47] [PASSED] One page
[06:32:47] [PASSED] More than one page
[06:32:47] [PASSED] Above the allocation limit
[06:32:47] [PASSED] One page, with coherent DMA mappings enabled
[06:32:47] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[06:32:47] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[06:32:47] [PASSED] ttm_pool_alloc_order_caching_match
[06:32:47] [PASSED] ttm_pool_alloc_caching_mismatch
[06:32:47] [PASSED] ttm_pool_alloc_order_mismatch
[06:32:47] [PASSED] ttm_pool_free_dma_alloc
[06:32:47] [PASSED] ttm_pool_free_no_dma_alloc
[06:32:47] [PASSED] ttm_pool_fini_basic
[06:32:47] ==================== [PASSED] ttm_pool =====================
[06:32:47] ================ ttm_resource (8 subtests) =================
[06:32:47] ================= ttm_resource_init_basic =================
[06:32:47] [PASSED] Init resource in TTM_PL_SYSTEM
[06:32:47] [PASSED] Init resource in TTM_PL_VRAM
[06:32:47] [PASSED] Init resource in a private placement
[06:32:47] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[06:32:47] ============= [PASSED] ttm_resource_init_basic =============
[06:32:47] [PASSED] ttm_resource_init_pinned
[06:32:47] [PASSED] ttm_resource_fini_basic
[06:32:47] [PASSED] ttm_resource_manager_init_basic
[06:32:47] [PASSED] ttm_resource_manager_usage_basic
[06:32:47] [PASSED] ttm_resource_manager_set_used_basic
[06:32:47] [PASSED] ttm_sys_man_alloc_basic
[06:32:47] [PASSED] ttm_sys_man_free_basic
[06:32:47] ================== [PASSED] ttm_resource ===================
[06:32:47] =================== ttm_tt (15 subtests) ===================
[06:32:47] ==================== ttm_tt_init_basic ====================
[06:32:47] [PASSED] Page-aligned size
[06:32:47] [PASSED] Extra pages requested
[06:32:47] ================ [PASSED] ttm_tt_init_basic ================
[06:32:47] [PASSED] ttm_tt_init_misaligned
[06:32:47] [PASSED] ttm_tt_fini_basic
[06:32:47] [PASSED] ttm_tt_fini_sg
[06:32:47] [PASSED] ttm_tt_fini_shmem
[06:32:47] [PASSED] ttm_tt_create_basic
[06:32:47] [PASSED] ttm_tt_create_invalid_bo_type
[06:32:47] [PASSED] ttm_tt_create_ttm_exists
[06:32:47] [PASSED] ttm_tt_create_failed
[06:32:47] [PASSED] ttm_tt_destroy_basic
[06:32:47] [PASSED] ttm_tt_populate_null_ttm
[06:32:47] [PASSED] ttm_tt_populate_populated_ttm
[06:32:47] [PASSED] ttm_tt_unpopulate_basic
[06:32:47] [PASSED] ttm_tt_unpopulate_empty_ttm
[06:32:47] [PASSED] ttm_tt_swapin_basic
[06:32:47] ===================== [PASSED] ttm_tt ======================
[06:32:47] =================== ttm_bo (14 subtests) ===================
[06:32:47] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[06:32:47] [PASSED] Cannot be interrupted and sleeps
[06:32:47] [PASSED] Cannot be interrupted, locks straight away
[06:32:47] [PASSED] Can be interrupted, sleeps
[06:32:47] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[06:32:47] [PASSED] ttm_bo_reserve_locked_no_sleep
[06:32:47] [PASSED] ttm_bo_reserve_no_wait_ticket
[06:32:47] [PASSED] ttm_bo_reserve_double_resv
[06:32:47] [PASSED] ttm_bo_reserve_interrupted
[06:32:47] [PASSED] ttm_bo_reserve_deadlock
[06:32:47] [PASSED] ttm_bo_unreserve_basic
[06:32:47] [PASSED] ttm_bo_unreserve_pinned
[06:32:47] [PASSED] ttm_bo_unreserve_bulk
[06:32:47] [PASSED] ttm_bo_fini_basic
[06:32:47] [PASSED] ttm_bo_fini_shared_resv
[06:32:47] [PASSED] ttm_bo_pin_basic
[06:32:47] [PASSED] ttm_bo_pin_unpin_resource
[06:32:47] [PASSED] ttm_bo_multiple_pin_one_unpin
[06:32:47] ===================== [PASSED] ttm_bo ======================
[06:32:47] ============== ttm_bo_validate (21 subtests) ===============
[06:32:47] ============== ttm_bo_init_reserved_sys_man ===============
[06:32:47] [PASSED] Buffer object for userspace
[06:32:47] [PASSED] Kernel buffer object
[06:32:47] [PASSED] Shared buffer object
[06:32:47] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[06:32:47] ============== ttm_bo_init_reserved_mock_man ==============
[06:32:47] [PASSED] Buffer object for userspace
[06:32:47] [PASSED] Kernel buffer object
[06:32:47] [PASSED] Shared buffer object
[06:32:47] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[06:32:47] [PASSED] ttm_bo_init_reserved_resv
[06:32:47] ================== ttm_bo_validate_basic ==================
[06:32:47] [PASSED] Buffer object for userspace
[06:32:47] [PASSED] Kernel buffer object
[06:32:47] [PASSED] Shared buffer object
[06:32:47] ============== [PASSED] ttm_bo_validate_basic ==============
[06:32:47] [PASSED] ttm_bo_validate_invalid_placement
[06:32:47] ============= ttm_bo_validate_same_placement ==============
[06:32:47] [PASSED] System manager
[06:32:47] [PASSED] VRAM manager
[06:32:47] ========= [PASSED] ttm_bo_validate_same_placement ==========
[06:32:47] [PASSED] ttm_bo_validate_failed_alloc
[06:32:47] [PASSED] ttm_bo_validate_pinned
[06:32:47] [PASSED] ttm_bo_validate_busy_placement
[06:32:47] ================ ttm_bo_validate_multihop =================
[06:32:47] [PASSED] Buffer object for userspace
[06:32:47] [PASSED] Kernel buffer object
[06:32:47] [PASSED] Shared buffer object
[06:32:47] ============ [PASSED] ttm_bo_validate_multihop =============
[06:32:47] ========== ttm_bo_validate_no_placement_signaled ==========
[06:32:47] [PASSED] Buffer object in system domain, no page vector
[06:32:47] [PASSED] Buffer object in system domain with an existing page vector
[06:32:47] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[06:32:47] ======== ttm_bo_validate_no_placement_not_signaled ========
[06:32:47] [PASSED] Buffer object for userspace
[06:32:47] [PASSED] Kernel buffer object
[06:32:47] [PASSED] Shared buffer object
[06:32:47] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[06:32:47] [PASSED] ttm_bo_validate_move_fence_signaled
[06:32:47] ========= ttm_bo_validate_move_fence_not_signaled =========
[06:32:47] [PASSED] Waits for GPU
[06:32:47] [PASSED] Tries to lock straight away
[06:32:47] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[06:32:47] [PASSED] ttm_bo_validate_happy_evict
[06:32:47] [PASSED] ttm_bo_validate_all_pinned_evict
[06:32:47] [PASSED] ttm_bo_validate_allowed_only_evict
[06:32:47] [PASSED] ttm_bo_validate_deleted_evict
[06:32:47] [PASSED] ttm_bo_validate_busy_domain_evict
[06:32:47] [PASSED] ttm_bo_validate_evict_gutting
[06:32:47] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[06:32:47] ================= [PASSED] ttm_bo_validate =================
[06:32:47] ============================================================
[06:32:47] Testing complete. Ran 101 tests: passed: 101
[06:32:47] Elapsed time: 11.293s total, 1.641s configuring, 9.436s building, 0.177s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 12+ messages in thread
* ✓ Xe.CI.BAT: success for series starting with [1/1] drm/xe/eustall: Return EBADFD from read if EU stall registers get reset
2025-12-08 6:16 [PATCH 1/1] drm/xe/eustall: Return EBADFD from read if EU stall registers get reset Harish Chegondi
2025-12-08 6:32 ` ✓ CI.KUnit: success for series starting with [1/1] " Patchwork
@ 2025-12-08 7:56 ` Patchwork
2025-12-08 8:48 ` ✗ Xe.CI.Full: failure " Patchwork
` (2 subsequent siblings)
4 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2025-12-08 7:56 UTC (permalink / raw)
To: Harish Chegondi; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 1550 bytes --]
== Series Details ==
Series: series starting with [1/1] drm/xe/eustall: Return EBADFD from read if EU stall registers get reset
URL : https://patchwork.freedesktop.org/series/158622/
State : success
== Summary ==
CI Bug Log - changes from xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79_BAT -> xe-pw-158622v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (12 -> 12)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-158622v1_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@xe_waitfence@engine:
- bat-dg2-oem2: [PASS][1] -> [FAIL][2] ([Intel XE#6519])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/bat-dg2-oem2/igt@xe_waitfence@engine.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/bat-dg2-oem2/igt@xe_waitfence@engine.html
[Intel XE#6519]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6519
Build changes
-------------
* Linux: xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79 -> xe-pw-158622v1
IGT_8658: 5d645d459768a0e5c8e5e95b9fce16bb17319825 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79: db6505187efb9c255df1dd6e78c00d95fadfef79
xe-pw-158622v1: 158622v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/index.html
[-- Attachment #2: Type: text/html, Size: 2115 bytes --]
^ permalink raw reply [flat|nested] 12+ messages in thread
* ✗ Xe.CI.Full: failure for series starting with [1/1] drm/xe/eustall: Return EBADFD from read if EU stall registers get reset
2025-12-08 6:16 [PATCH 1/1] drm/xe/eustall: Return EBADFD from read if EU stall registers get reset Harish Chegondi
2025-12-08 6:32 ` ✓ CI.KUnit: success for series starting with [1/1] " Patchwork
2025-12-08 7:56 ` ✓ Xe.CI.BAT: " Patchwork
@ 2025-12-08 8:48 ` Patchwork
2025-12-12 21:18 ` [PATCH 1/1] " Dixit, Ashutosh
2025-12-18 19:53 ` Dixit, Ashutosh
4 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2025-12-08 8:48 UTC (permalink / raw)
To: Harish Chegondi; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 57400 bytes --]
== Series Details ==
Series: series starting with [1/1] drm/xe/eustall: Return EBADFD from read if EU stall registers get reset
URL : https://patchwork.freedesktop.org/series/158622/
State : failure
== Summary ==
CI Bug Log - changes from xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79_FULL -> xe-pw-158622v1_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-158622v1_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-158622v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-158622v1_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs@pipe-d-dp-2:
- shard-bmg: NOTRUN -> [FAIL][1] +2 other tests fail
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-6/igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs@pipe-d-dp-2.html
* igt@xe_gt_freq@freq_range_exec:
- shard-bmg: [PASS][2] -> [DMESG-WARN][3]
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-5/igt@xe_gt_freq@freq_range_exec.html
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@xe_gt_freq@freq_range_exec.html
* igt@xe_pmu@engine-activity-accuracy-2:
- shard-dg2-set2: [PASS][4] -> [INCOMPLETE][5] +1 other test incomplete
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-dg2-434/igt@xe_pmu@engine-activity-accuracy-2.html
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-436/igt@xe_pmu@engine-activity-accuracy-2.html
New tests
---------
New tests have been introduced between xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79_FULL and xe-pw-158622v1_FULL:
### New IGT tests (25) ###
* igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-a-dp-4:
- Statuses : 1 pass(s)
- Exec time: [2.16] s
* igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-dp-4:
- Statuses : 1 pass(s)
- Exec time: [2.16] s
* igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-c-dp-4:
- Statuses : 1 pass(s)
- Exec time: [2.13] s
* igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-d-dp-4:
- Statuses : 1 pass(s)
- Exec time: [2.16] s
* igt@kms_async_flips@crc-atomic@pipe-a-dp-4:
- Statuses : 1 pass(s)
- Exec time: [2.24] s
* igt@kms_async_flips@crc-atomic@pipe-b-dp-4:
- Statuses : 1 pass(s)
- Exec time: [2.24] s
* igt@kms_async_flips@crc-atomic@pipe-c-dp-4:
- Statuses : 1 pass(s)
- Exec time: [2.23] s
* igt@kms_async_flips@crc-atomic@pipe-d-dp-4:
- Statuses : 1 pass(s)
- Exec time: [2.23] s
* igt@kms_async_flips@test-cursor-atomic@pipe-a-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.14] s
* igt@kms_async_flips@test-cursor-atomic@pipe-b-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.14] s
* igt@kms_async_flips@test-cursor-atomic@pipe-c-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.14] s
* igt@kms_async_flips@test-cursor-atomic@pipe-d-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.14] s
* igt@kms_async_flips@test-time-stamp-atomic@pipe-a-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.17] s
* igt@kms_async_flips@test-time-stamp-atomic@pipe-b-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.17] s
* igt@kms_async_flips@test-time-stamp-atomic@pipe-c-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.17] s
* igt@kms_async_flips@test-time-stamp-atomic@pipe-d-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.18] s
* igt@xe_exec_store@long-shader-bb-check:
- Statuses : 3 pass(s)
- Exec time: [0.01, 0.17] s
* igt@xe_exec_store@long-shader-bb-check@gt0-drm_xe_engine_class_compute0-bb-system-target-system:
- Statuses : 2 pass(s)
- Exec time: [0.00, 0.02] s
* igt@xe_exec_store@long-shader-bb-check@gt0-drm_xe_engine_class_compute0-bb-system-target-vram0:
- Statuses : 1 pass(s)
- Exec time: [0.00] s
* igt@xe_exec_store@long-shader-bb-check@gt0-drm_xe_engine_class_compute0-bb-vram0-target-system:
- Statuses : 1 pass(s)
- Exec time: [0.04] s
* igt@xe_exec_store@long-shader-bb-check@gt0-drm_xe_engine_class_compute0-bb-vram0-target-vram0:
- Statuses : 1 pass(s)
- Exec time: [0.04] s
* igt@xe_exec_store@long-shader-bb-check@gt0-drm_xe_engine_class_render0-bb-system-target-system:
- Statuses : 3 pass(s)
- Exec time: [0.00, 0.01] s
* igt@xe_exec_store@long-shader-bb-check@gt0-drm_xe_engine_class_render0-bb-system-target-vram0:
- Statuses : 1 pass(s)
- Exec time: [0.00] s
* igt@xe_exec_store@long-shader-bb-check@gt0-drm_xe_engine_class_render0-bb-vram0-target-system:
- Statuses : 1 pass(s)
- Exec time: [0.04] s
* igt@xe_exec_store@long-shader-bb-check@gt0-drm_xe_engine_class_render0-bb-vram0-target-vram0:
- Statuses : 1 pass(s)
- Exec time: [0.04] s
Known issues
------------
Here are the changes found in xe-pw-158622v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- shard-bmg: NOTRUN -> [SKIP][6] ([Intel XE#2233])
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-1/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_atomic_transition@plane-toggle-modeset-transition:
- shard-adlp: [PASS][7] -> [FAIL][8] ([Intel XE#3908]) +1 other test fail
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-adlp-1/igt@kms_atomic_transition@plane-toggle-modeset-transition.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-adlp-1/igt@kms_atomic_transition@plane-toggle-modeset-transition.html
* igt@kms_big_fb@4-tiled-32bpp-rotate-90:
- shard-bmg: NOTRUN -> [SKIP][9] ([Intel XE#2327]) +3 other tests skip
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-5/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-8bpp-rotate-90:
- shard-dg2-set2: NOTRUN -> [SKIP][10] ([Intel XE#316])
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-463/igt@kms_big_fb@x-tiled-8bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-16bpp-rotate-90:
- shard-dg2-set2: NOTRUN -> [SKIP][11] ([Intel XE#1124]) +2 other tests skip
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-463/igt@kms_big_fb@y-tiled-16bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-addfb:
- shard-dg2-set2: NOTRUN -> [SKIP][12] ([Intel XE#619])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-463/igt@kms_big_fb@y-tiled-addfb.html
* igt@kms_big_fb@yf-tiled-addfb-size-overflow:
- shard-bmg: NOTRUN -> [SKIP][13] ([Intel XE#610])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip:
- shard-bmg: NOTRUN -> [SKIP][14] ([Intel XE#1124]) +7 other tests skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-5/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
* igt@kms_bw@linear-tiling-1-displays-1920x1080p:
- shard-dg2-set2: NOTRUN -> [SKIP][15] ([Intel XE#367]) +1 other test skip
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-433/igt@kms_bw@linear-tiling-1-displays-1920x1080p.html
* igt@kms_bw@linear-tiling-1-displays-2160x1440p:
- shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#367]) +1 other test skip
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-5/igt@kms_bw@linear-tiling-1-displays-2160x1440p.html
* igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs:
- shard-bmg: NOTRUN -> [SKIP][17] ([Intel XE#2887]) +10 other tests skip
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-6/igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs@pipe-c-dp-2:
- shard-bmg: NOTRUN -> [SKIP][18] ([Intel XE#2652] / [Intel XE#787]) +8 other tests skip
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs@pipe-c-dp-2.html
* igt@kms_ccs@bad-rotation-90-4-tiled-mtl-mc-ccs:
- shard-dg2-set2: NOTRUN -> [SKIP][19] ([Intel XE#455] / [Intel XE#787]) +11 other tests skip
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-463/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-mc-ccs.html
* igt@kms_ccs@crc-primary-basic-y-tiled-gen12-rc-ccs-cc@pipe-a-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][20] ([Intel XE#787]) +41 other tests skip
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-433/igt@kms_ccs@crc-primary-basic-y-tiled-gen12-rc-ccs-cc@pipe-a-dp-4.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
- shard-bmg: [PASS][21] -> [INCOMPLETE][22] ([Intel XE#3862]) +1 other test incomplete
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-1/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-8/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs:
- shard-bmg: NOTRUN -> [SKIP][23] ([Intel XE#3432]) +1 other test skip
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs.html
* igt@kms_cdclk@mode-transition-all-outputs:
- shard-dg2-set2: NOTRUN -> [SKIP][24] ([Intel XE#4418])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-463/igt@kms_cdclk@mode-transition-all-outputs.html
* igt@kms_chamelium_color@degamma:
- shard-bmg: NOTRUN -> [SKIP][25] ([Intel XE#2325])
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-5/igt@kms_chamelium_color@degamma.html
* igt@kms_chamelium_edid@dp-edid-resolution-list:
- shard-bmg: NOTRUN -> [SKIP][26] ([Intel XE#2252]) +5 other tests skip
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-6/igt@kms_chamelium_edid@dp-edid-resolution-list.html
* igt@kms_chamelium_hpd@hdmi-hpd:
- shard-dg2-set2: NOTRUN -> [SKIP][27] ([Intel XE#373]) +2 other tests skip
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-463/igt@kms_chamelium_hpd@hdmi-hpd.html
* igt@kms_colorop@plane-xr24-xr24-ctm_3x4_bt709_dec_enc:
- shard-bmg: NOTRUN -> [SKIP][28] ([Intel XE#6704]) +6 other tests skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-6/igt@kms_colorop@plane-xr24-xr24-ctm_3x4_bt709_dec_enc.html
* igt@kms_colorop@plane-xr30-xr30-bt2020_inv_oetf:
- shard-dg2-set2: NOTRUN -> [SKIP][29] ([Intel XE#6704]) +1 other test skip
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-433/igt@kms_colorop@plane-xr30-xr30-bt2020_inv_oetf.html
* igt@kms_content_protection@dp-mst-suspend-resume:
- shard-bmg: NOTRUN -> [SKIP][30] ([Intel XE#6743])
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-6/igt@kms_content_protection@dp-mst-suspend-resume.html
* igt@kms_content_protection@dp-mst-type-0:
- shard-bmg: NOTRUN -> [SKIP][31] ([Intel XE#2390])
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@kms_content_protection@dp-mst-type-0.html
* igt@kms_content_protection@suspend-resume:
- shard-bmg: NOTRUN -> [FAIL][32] ([Intel XE#1178]) +2 other tests fail
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-5/igt@kms_content_protection@suspend-resume.html
* igt@kms_cursor_crc@cursor-random-32x32:
- shard-bmg: NOTRUN -> [SKIP][33] ([Intel XE#2320]) +4 other tests skip
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@kms_cursor_crc@cursor-random-32x32.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic:
- shard-bmg: [PASS][34] -> [FAIL][35] ([Intel XE#6715])
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-5/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-1/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
* igt@kms_dp_linktrain_fallback@dsc-fallback:
- shard-dg2-set2: NOTRUN -> [SKIP][36] ([Intel XE#4331])
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-433/igt@kms_dp_linktrain_fallback@dsc-fallback.html
* igt@kms_dsc@dsc-with-bpc:
- shard-bmg: NOTRUN -> [SKIP][37] ([Intel XE#2244])
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-6/igt@kms_dsc@dsc-with-bpc.html
* igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats:
- shard-dg2-set2: NOTRUN -> [SKIP][38] ([Intel XE#4422])
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-463/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats.html
* igt@kms_fbcon_fbt@fbc:
- shard-bmg: NOTRUN -> [SKIP][39] ([Intel XE#4156])
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-6/igt@kms_fbcon_fbt@fbc.html
* igt@kms_feature_discovery@dp-mst:
- shard-dg2-set2: NOTRUN -> [SKIP][40] ([Intel XE#1137])
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-463/igt@kms_feature_discovery@dp-mst.html
* igt@kms_flip@flip-vs-expired-vblank@c-edp1:
- shard-lnl: [PASS][41] -> [FAIL][42] ([Intel XE#301] / [Intel XE#3149]) +1 other test fail
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling:
- shard-bmg: NOTRUN -> [SKIP][43] ([Intel XE#2293] / [Intel XE#2380]) +3 other tests skip
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-5/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode:
- shard-bmg: NOTRUN -> [SKIP][44] ([Intel XE#2293]) +3 other tests skip
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-5/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-render:
- shard-bmg: NOTRUN -> [SKIP][45] ([Intel XE#2311]) +23 other tests skip
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-render.html
* igt@kms_frontbuffer_tracking@drrs-slowdraw:
- shard-dg2-set2: NOTRUN -> [SKIP][46] ([Intel XE#651]) +6 other tests skip
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-433/igt@kms_frontbuffer_tracking@drrs-slowdraw.html
* igt@kms_frontbuffer_tracking@fbc-2p-rte:
- shard-bmg: NOTRUN -> [SKIP][47] ([Intel XE#4141]) +9 other tests skip
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-rte.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-offscreen-pri-shrfb-draw-blt:
- shard-dg2-set2: NOTRUN -> [SKIP][48] ([Intel XE#6312])
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-463/igt@kms_frontbuffer_tracking@fbcdrrs-1p-offscreen-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-msflip-blt:
- shard-dg2-set2: NOTRUN -> [SKIP][49] ([Intel XE#653]) +9 other tests skip
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-433/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][50] ([Intel XE#2313]) +21 other tests skip
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt.html
* igt@kms_pipe_stress@stress-xrgb8888-yftiled:
- shard-dg2-set2: NOTRUN -> [SKIP][51] ([Intel XE#5624])
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-433/igt@kms_pipe_stress@stress-xrgb8888-yftiled.html
* igt@kms_plane_multiple@tiling-y:
- shard-bmg: NOTRUN -> [SKIP][52] ([Intel XE#5020])
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-5/igt@kms_plane_multiple@tiling-y.html
* igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-c:
- shard-bmg: NOTRUN -> [SKIP][53] ([Intel XE#5825]) +4 other tests skip
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-6/igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-c.html
* igt@kms_pm_backlight@basic-brightness:
- shard-bmg: NOTRUN -> [SKIP][54] ([Intel XE#870])
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-1/igt@kms_pm_backlight@basic-brightness.html
* igt@kms_pm_backlight@brightness-with-dpms:
- shard-bmg: NOTRUN -> [SKIP][55] ([Intel XE#2938])
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@kms_pm_backlight@brightness-with-dpms.html
* igt@kms_pm_backlight@fade-with-dpms:
- shard-dg2-set2: NOTRUN -> [SKIP][56] ([Intel XE#870])
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-433/igt@kms_pm_backlight@fade-with-dpms.html
* igt@kms_pm_rpm@modeset-lpsp:
- shard-bmg: NOTRUN -> [SKIP][57] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#836])
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-6/igt@kms_pm_rpm@modeset-lpsp.html
* igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf:
- shard-dg2-set2: NOTRUN -> [SKIP][58] ([Intel XE#1406] / [Intel XE#1489]) +2 other tests skip
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-433/igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf.html
* igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area:
- shard-bmg: NOTRUN -> [SKIP][59] ([Intel XE#1406] / [Intel XE#1489]) +5 other tests skip
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-6/igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area.html
* igt@kms_psr2_su@page_flip-xrgb8888:
- shard-bmg: NOTRUN -> [SKIP][60] ([Intel XE#1406] / [Intel XE#2387])
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-5/igt@kms_psr2_su@page_flip-xrgb8888.html
* igt@kms_psr@fbc-psr2-sprite-plane-onoff:
- shard-dg2-set2: NOTRUN -> [SKIP][61] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +3 other tests skip
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-433/igt@kms_psr@fbc-psr2-sprite-plane-onoff.html
* igt@kms_psr@psr-primary-page-flip:
- shard-bmg: NOTRUN -> [SKIP][62] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +7 other tests skip
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@kms_psr@psr-primary-page-flip.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-180:
- shard-dg2-set2: NOTRUN -> [SKIP][63] ([Intel XE#1127])
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-433/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
- shard-bmg: NOTRUN -> [SKIP][64] ([Intel XE#2330])
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-5/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
- shard-dg2-set2: NOTRUN -> [SKIP][65] ([Intel XE#3414])
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-463/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
* igt@kms_scaling_modes@scaling-mode-full:
- shard-bmg: NOTRUN -> [SKIP][66] ([Intel XE#2413])
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@kms_scaling_modes@scaling-mode-full.html
* igt@kms_sharpness_filter@invalid-filter-with-scaling-mode:
- shard-bmg: NOTRUN -> [SKIP][67] ([Intel XE#6503])
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-1/igt@kms_sharpness_filter@invalid-filter-with-scaling-mode.html
* igt@kms_vrr@flip-dpms:
- shard-dg2-set2: NOTRUN -> [SKIP][68] ([Intel XE#455]) +4 other tests skip
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-463/igt@kms_vrr@flip-dpms.html
* igt@xe_copy_basic@mem-copy-linear-0x369:
- shard-dg2-set2: NOTRUN -> [SKIP][69] ([Intel XE#1123])
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-463/igt@xe_copy_basic@mem-copy-linear-0x369.html
* igt@xe_copy_basic@mem-page-copy-1:
- shard-dg2-set2: NOTRUN -> [SKIP][70] ([Intel XE#5300])
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-433/igt@xe_copy_basic@mem-page-copy-1.html
* igt@xe_eudebug@basic-vm-access-parameters:
- shard-dg2-set2: NOTRUN -> [SKIP][71] ([Intel XE#4837]) +1 other test skip
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-463/igt@xe_eudebug@basic-vm-access-parameters.html
* igt@xe_eudebug@basic-vm-bind-discovery:
- shard-bmg: NOTRUN -> [SKIP][72] ([Intel XE#4837]) +7 other tests skip
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-1/igt@xe_eudebug@basic-vm-bind-discovery.html
* igt@xe_eudebug_online@pagefault-read:
- shard-bmg: NOTRUN -> [SKIP][73] ([Intel XE#4837] / [Intel XE#6665]) +3 other tests skip
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-6/igt@xe_eudebug_online@pagefault-read.html
* igt@xe_eudebug_online@writes-caching-sram-bb-vram-target-vram:
- shard-dg2-set2: NOTRUN -> [SKIP][74] ([Intel XE#4837] / [Intel XE#6665])
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-463/igt@xe_eudebug_online@writes-caching-sram-bb-vram-target-vram.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr:
- shard-bmg: NOTRUN -> [SKIP][75] ([Intel XE#2322]) +4 other tests skip
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr.html
* igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-prefetch:
- shard-dg2-set2: NOTRUN -> [SKIP][76] ([Intel XE#288]) +5 other tests skip
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-433/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-prefetch.html
* igt@xe_exec_system_allocator@process-many-large-execqueues-mmap-file-mlock-nomemset:
- shard-bmg: [PASS][77] -> [SKIP][78] ([Intel XE#6557] / [Intel XE#6703]) +2 other tests skip
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-5/igt@xe_exec_system_allocator@process-many-large-execqueues-mmap-file-mlock-nomemset.html
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@xe_exec_system_allocator@process-many-large-execqueues-mmap-file-mlock-nomemset.html
* igt@xe_exec_system_allocator@process-many-stride-mmap-shared-remap-dontunmap-eocheck:
- shard-bmg: [PASS][79] -> [SKIP][80] ([Intel XE#6703]) +59 other tests skip
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-5/igt@xe_exec_system_allocator@process-many-stride-mmap-shared-remap-dontunmap-eocheck.html
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@xe_exec_system_allocator@process-many-stride-mmap-shared-remap-dontunmap-eocheck.html
* igt@xe_exec_system_allocator@threads-many-mmap-new-huge-nomemset:
- shard-bmg: NOTRUN -> [SKIP][81] ([Intel XE#4943]) +19 other tests skip
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-5/igt@xe_exec_system_allocator@threads-many-mmap-new-huge-nomemset.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-stride-new-race-nomemset:
- shard-dg2-set2: NOTRUN -> [SKIP][82] ([Intel XE#4915]) +97 other tests skip
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-463/igt@xe_exec_system_allocator@threads-shared-vm-many-stride-new-race-nomemset.html
* igt@xe_exec_threads@threads-rebind-err:
- shard-bmg: [PASS][83] -> [DMESG-FAIL][84] ([Intel XE#5545])
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-5/igt@xe_exec_threads@threads-rebind-err.html
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@xe_exec_threads@threads-rebind-err.html
* igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit:
- shard-dg2-set2: NOTRUN -> [SKIP][85] ([Intel XE#2229])
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-433/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html
* igt@xe_media_fill@media-fill:
- shard-bmg: NOTRUN -> [SKIP][86] ([Intel XE#2459] / [Intel XE#2596])
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-5/igt@xe_media_fill@media-fill.html
* igt@xe_oa@oa-tlb-invalidate:
- shard-bmg: NOTRUN -> [SKIP][87] ([Intel XE#2248])
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-6/igt@xe_oa@oa-tlb-invalidate.html
* igt@xe_oa@privileged-forked-access-vaddr:
- shard-dg2-set2: NOTRUN -> [SKIP][88] ([Intel XE#3573]) +1 other test skip
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-463/igt@xe_oa@privileged-forked-access-vaddr.html
* igt@xe_pm@d3cold-basic-exec:
- shard-dg2-set2: NOTRUN -> [SKIP][89] ([Intel XE#2284] / [Intel XE#366])
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-433/igt@xe_pm@d3cold-basic-exec.html
* igt@xe_pm@s2idle-d3cold-basic-exec:
- shard-bmg: NOTRUN -> [SKIP][90] ([Intel XE#2284]) +3 other tests skip
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@xe_pm@s2idle-d3cold-basic-exec.html
* igt@xe_pm@vram-d3cold-threshold:
- shard-bmg: NOTRUN -> [SKIP][91] ([Intel XE#579])
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-5/igt@xe_pm@vram-d3cold-threshold.html
* igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_compute0:
- shard-lnl: [PASS][92] -> [FAIL][93] ([Intel XE#6251]) +2 other tests fail
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-lnl-8/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_compute0.html
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-lnl-4/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_compute0.html
* igt@xe_pmu@engine-activity-suspend:
- shard-adlp: [PASS][94] -> [DMESG-WARN][95] ([Intel XE#2953] / [Intel XE#4173]) +3 other tests dmesg-warn
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-adlp-4/igt@xe_pmu@engine-activity-suspend.html
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-adlp-2/igt@xe_pmu@engine-activity-suspend.html
* igt@xe_pxp@pxp-stale-bo-bind-post-rpm:
- shard-bmg: NOTRUN -> [SKIP][96] ([Intel XE#4733])
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-5/igt@xe_pxp@pxp-stale-bo-bind-post-rpm.html
* igt@xe_pxp@pxp-stale-bo-bind-post-suspend:
- shard-dg2-set2: NOTRUN -> [SKIP][97] ([Intel XE#4733]) +1 other test skip
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-463/igt@xe_pxp@pxp-stale-bo-bind-post-suspend.html
* igt@xe_query@multigpu-query-uc-fw-version-huc:
- shard-bmg: NOTRUN -> [SKIP][98] ([Intel XE#944]) +1 other test skip
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-5/igt@xe_query@multigpu-query-uc-fw-version-huc.html
* igt@xe_sriov_flr@flr-vf1-clear:
- shard-bmg: NOTRUN -> [FAIL][99] ([Intel XE#6569])
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-6/igt@xe_sriov_flr@flr-vf1-clear.html
#### Possible fixes ####
* igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
- shard-bmg: [INCOMPLETE][100] -> [PASS][101] +2 other tests pass
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-3/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-5/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
* igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p:
- shard-bmg: [SKIP][102] ([Intel XE#367]) -> [PASS][103]
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p.html
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
- shard-dg2-set2: [INCOMPLETE][104] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345]) -> [PASS][105]
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-b-dp-4:
- shard-dg2-set2: [INCOMPLETE][106] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4212]) -> [PASS][107]
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-b-dp-4.html
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-b-dp-4.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-6:
- shard-dg2-set2: [DMESG-WARN][108] ([Intel XE#1727] / [Intel XE#3113]) -> [PASS][109]
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-6.html
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-6.html
* igt@kms_cursor_legacy@flip-vs-cursor-legacy:
- shard-bmg: [FAIL][110] ([Intel XE#5299]) -> [PASS][111]
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-6/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-3/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
* igt@kms_flip@basic-flip-vs-wf_vblank:
- shard-bmg: [FAIL][112] ([Intel XE#3098]) -> [PASS][113] +1 other test pass
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-1/igt@kms_flip@basic-flip-vs-wf_vblank.html
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-8/igt@kms_flip@basic-flip-vs-wf_vblank.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-bmg: [INCOMPLETE][114] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][115] +1 other test pass
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-8/igt@kms_flip@flip-vs-suspend-interruptible.html
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-6/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-x-to-x:
- shard-adlp: [FAIL][116] ([Intel XE#1874]) -> [PASS][117] +2 other tests pass
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-adlp-8/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-x-to-x.html
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-adlp-6/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-x-to-x.html
* igt@kms_plane_lowres@tiling-none@pipe-d-dp-2:
- shard-bmg: [DMESG-FAIL][118] ([Intel XE#1727]) -> [PASS][119]
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-3/igt@kms_plane_lowres@tiling-none@pipe-d-dp-2.html
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-1/igt@kms_plane_lowres@tiling-none@pipe-d-dp-2.html
* igt@kms_setmode@basic:
- shard-adlp: [FAIL][120] ([Intel XE#6361]) -> [PASS][121] +2 other tests pass
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-adlp-4/igt@kms_setmode@basic.html
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-adlp-2/igt@kms_setmode@basic.html
* igt@kms_setmode@basic@pipe-b-edp-1:
- shard-lnl: [FAIL][122] ([Intel XE#6361]) -> [PASS][123]
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-lnl-8/igt@kms_setmode@basic@pipe-b-edp-1.html
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-lnl-4/igt@kms_setmode@basic@pipe-b-edp-1.html
* igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1:
- shard-lnl: [FAIL][124] ([Intel XE#2142]) -> [PASS][125] +1 other test pass
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-lnl-2/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-lnl-8/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html
* igt@testdisplay:
- shard-bmg: [ABORT][126] ([Intel XE#6740]) -> [PASS][127]
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-3/igt@testdisplay.html
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@testdisplay.html
* igt@xe_evict@evict-mixed-many-threads-small:
- shard-bmg: [INCOMPLETE][128] ([Intel XE#6321]) -> [PASS][129]
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-3/igt@xe_evict@evict-mixed-many-threads-small.html
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-1/igt@xe_evict@evict-mixed-many-threads-small.html
* igt@xe_fault_injection@inject-fault-probe-function-xe_uc_fw_init:
- shard-dg2-set2: [ABORT][130] -> [PASS][131]
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-dg2-432/igt@xe_fault_injection@inject-fault-probe-function-xe_uc_fw_init.html
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-463/igt@xe_fault_injection@inject-fault-probe-function-xe_uc_fw_init.html
* igt@xe_pm@s4-exec-after:
- shard-adlp: [DMESG-WARN][132] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][133] +1 other test pass
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-adlp-1/igt@xe_pm@s4-exec-after.html
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-adlp-1/igt@xe_pm@s4-exec-after.html
#### Warnings ####
* igt@kms_big_fb@linear-32bpp-rotate-90:
- shard-bmg: [SKIP][134] ([Intel XE#2327]) -> [SKIP][135] ([Intel XE#6703])
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-5/igt@kms_big_fb@linear-32bpp-rotate-90.html
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@kms_big_fb@linear-32bpp-rotate-90.html
* igt@kms_big_fb@yf-tiled-16bpp-rotate-270:
- shard-bmg: [SKIP][136] ([Intel XE#1124]) -> [SKIP][137] ([Intel XE#6703])
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-5/igt@kms_big_fb@yf-tiled-16bpp-rotate-270.html
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@kms_big_fb@yf-tiled-16bpp-rotate-270.html
* igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p:
- shard-bmg: [SKIP][138] ([Intel XE#2314] / [Intel XE#2894]) -> [SKIP][139] ([Intel XE#6703])
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-5/igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p.html
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p.html
* igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc:
- shard-bmg: [SKIP][140] ([Intel XE#2887]) -> [SKIP][141] ([Intel XE#6703])
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-5/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc.html
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs:
- shard-bmg: [SKIP][142] ([Intel XE#3432]) -> [SKIP][143] ([Intel XE#6703])
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs.html
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
- shard-dg2-set2: [INCOMPLETE][144] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4345] / [Intel XE#6168]) -> [INCOMPLETE][145] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345])
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-dp-4:
- shard-dg2-set2: [INCOMPLETE][146] ([Intel XE#6168] / [i915#14968]) -> [INCOMPLETE][147] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212])
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-dp-4.html
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-dp-4.html
* igt@kms_chamelium_audio@hdmi-audio:
- shard-bmg: [SKIP][148] ([Intel XE#2252]) -> [SKIP][149] ([Intel XE#6703])
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-5/igt@kms_chamelium_audio@hdmi-audio.html
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@kms_chamelium_audio@hdmi-audio.html
* igt@kms_chamelium_sharpness_filter@filter-basic:
- shard-bmg: [SKIP][150] ([Intel XE#6507]) -> [SKIP][151] ([Intel XE#6557] / [Intel XE#6703])
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-5/igt@kms_chamelium_sharpness_filter@filter-basic.html
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@kms_chamelium_sharpness_filter@filter-basic.html
* igt@kms_colorop@plane-xr30-xr30-3dlut_17_12_rgb:
- shard-bmg: [SKIP][152] ([Intel XE#6704]) -> [SKIP][153] ([Intel XE#6703])
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-5/igt@kms_colorop@plane-xr30-xr30-3dlut_17_12_rgb.html
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@kms_colorop@plane-xr30-xr30-3dlut_17_12_rgb.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling:
- shard-bmg: [SKIP][154] ([Intel XE#2293] / [Intel XE#2380]) -> [SKIP][155] ([Intel XE#6703])
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-5/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling.html
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling.html
* igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-bmg: [SKIP][156] ([Intel XE#2311]) -> [SKIP][157] ([Intel XE#6557] / [Intel XE#6703])
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-shrfb-draw-mmap-wc.html
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt:
- shard-bmg: [SKIP][158] ([Intel XE#4141]) -> [SKIP][159] ([Intel XE#6703]) +2 other tests skip
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-rgb565-draw-blt:
- shard-bmg: [SKIP][160] ([Intel XE#2311]) -> [SKIP][161] ([Intel XE#6703]) +1 other test skip
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcdrrs-rgb565-draw-blt.html
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcdrrs-rgb565-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-render:
- shard-bmg: [SKIP][162] ([Intel XE#2313]) -> [SKIP][163] ([Intel XE#6703]) +4 other tests skip
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-render.html
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-render.html
* igt@kms_hdr@brightness-with-hdr:
- shard-bmg: [SKIP][164] ([Intel XE#3544]) -> [SKIP][165] ([Intel XE#3374] / [Intel XE#3544])
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-4/igt@kms_hdr@brightness-with-hdr.html
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-8/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf:
- shard-bmg: [SKIP][166] ([Intel XE#1406] / [Intel XE#1489]) -> [SKIP][167] ([Intel XE#1406] / [Intel XE#6703]) +1 other test skip
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-5/igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf.html
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf.html
* igt@kms_psr@fbc-pr-primary-blt:
- shard-bmg: [SKIP][168] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) -> [SKIP][169] ([Intel XE#1406] / [Intel XE#6703]) +1 other test skip
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-5/igt@kms_psr@fbc-pr-primary-blt.html
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@kms_psr@fbc-pr-primary-blt.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-bmg: [SKIP][170] ([Intel XE#2426]) -> [SKIP][171] ([Intel XE#6703])
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-5/igt@kms_tiled_display@basic-test-pattern.html
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-dg2-set2: [SKIP][172] ([Intel XE#362]) -> [SKIP][173] ([Intel XE#1500])
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-dg2-463/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-dg2-435/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@xe_eudebug@read-metadata:
- shard-bmg: [SKIP][174] ([Intel XE#4837]) -> [SKIP][175] ([Intel XE#6703]) +1 other test skip
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-5/igt@xe_eudebug@read-metadata.html
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@xe_eudebug@read-metadata.html
* igt@xe_exec_basic@multigpu-no-exec-userptr-rebind:
- shard-bmg: [SKIP][176] ([Intel XE#2322]) -> [SKIP][177] ([Intel XE#6703])
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-5/igt@xe_exec_basic@multigpu-no-exec-userptr-rebind.html
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@xe_exec_basic@multigpu-no-exec-userptr-rebind.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-mmap-huge-nomemset:
- shard-bmg: [SKIP][178] ([Intel XE#4943]) -> [SKIP][179] ([Intel XE#6703]) +1 other test skip
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-5/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-mmap-huge-nomemset.html
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-mmap-huge-nomemset.html
* igt@xe_pm@s4-d3cold-basic-exec:
- shard-bmg: [SKIP][180] ([Intel XE#2284]) -> [SKIP][181] ([Intel XE#6703])
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-5/igt@xe_pm@s4-d3cold-basic-exec.html
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@xe_pm@s4-d3cold-basic-exec.html
* igt@xe_pxp@pxp-termination-key-update-post-rpm:
- shard-bmg: [SKIP][182] ([Intel XE#4733]) -> [SKIP][183] ([Intel XE#6703])
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79/shard-bmg-5/igt@xe_pxp@pxp-termination-key-update-post-rpm.html
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/shard-bmg-2/igt@xe_pxp@pxp-termination-key-update-post-rpm.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#1123]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1123
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127
[Intel XE#1137]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1137
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1500]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1500
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#1874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1874
[Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
[Intel XE#2142]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2142
[Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
[Intel XE#2233]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2233
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
[Intel XE#2248]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2248
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
[Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
[Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
[Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
[Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2459
[Intel XE#2596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2596
[Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
[Intel XE#2938]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2938
[Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3098
[Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
[Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
[Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
[Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
[Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#3862]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3862
[Intel XE#3908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3908
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4156]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4156
[Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
[Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
[Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331
[Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
[Intel XE#4418]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4418
[Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
[Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
[Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
[Intel XE#5299]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5299
[Intel XE#5300]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5300
[Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
[Intel XE#5624]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5624
[Intel XE#579]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/579
[Intel XE#5825]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5825
[Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
[Intel XE#6168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6168
[Intel XE#619]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/619
[Intel XE#6251]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6251
[Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
[Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
[Intel XE#6361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6361
[Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
[Intel XE#6507]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6507
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#6557]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6557
[Intel XE#6569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6569
[Intel XE#6665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6665
[Intel XE#6703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6703
[Intel XE#6704]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6704
[Intel XE#6715]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6715
[Intel XE#6740]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6740
[Intel XE#6743]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6743
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
[Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
[i915#14968]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14968
Build changes
-------------
* Linux: xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79 -> xe-pw-158622v1
IGT_8658: 5d645d459768a0e5c8e5e95b9fce16bb17319825 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-4203-db6505187efb9c255df1dd6e78c00d95fadfef79: db6505187efb9c255df1dd6e78c00d95fadfef79
xe-pw-158622v1: 158622v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158622v1/index.html
[-- Attachment #2: Type: text/html, Size: 68884 bytes --]
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 1/1] drm/xe/eustall: Return EBADFD from read if EU stall registers get reset
2025-12-08 6:16 [PATCH 1/1] drm/xe/eustall: Return EBADFD from read if EU stall registers get reset Harish Chegondi
` (2 preceding siblings ...)
2025-12-08 8:48 ` ✗ Xe.CI.Full: failure " Patchwork
@ 2025-12-12 21:18 ` Dixit, Ashutosh
2025-12-16 23:53 ` Harish Chegondi
2025-12-18 19:53 ` Dixit, Ashutosh
4 siblings, 1 reply; 12+ messages in thread
From: Dixit, Ashutosh @ 2025-12-12 21:18 UTC (permalink / raw)
To: Harish Chegondi; +Cc: intel-xe, Umesh Nerlige Ramappa
On Sun, 07 Dec 2025 22:16:11 -0800, Harish Chegondi wrote:
>
Hi Harish,
> @@ -541,9 +541,24 @@ static ssize_t xe_eu_stall_stream_read_locked(struct xe_eu_stall_data_stream *st
> size_t total_size = 0;
> u16 group, instance;
> unsigned int xecore;
> + u32 base_reg_value;
> int ret = 0;
>
> mutex_lock(&stream->xecore_buf_lock);
> + /* If a GT or engine reset happens during EU stall data sampling,
> + * all EU stall registers get reset to 0 and the cached values of
> + * EU stall data buffers' read and write pointers are out of sync
> + * with the register values. This can cause invalid data to be
> + * returned from read(). To prevent this, check the value of a
> + * EU stall base register. If it is zero, return -EBADFD. The
> + * user is expected to close the fd and open a new fd.
> + */
> + base_reg_value = xe_gt_mcr_unicast_read_any(gt, XEHPC_EUSTALL_BASE);
> + if (unlikely(!base_reg_value)) {
> + xe_gt_dbg(gt, "EU stall base register has been reset to 0\n");
> + mutex_unlock(&stream->xecore_buf_lock);
> + return -EBADFD;
> + }
Since we are introducing an extra register read every read() call here,
does it make sense to first check if there's a real userland need for this?
And actually have a UMD PR which will consume this -EBADFD return value,
before we merge this?
Thanks.
--
Ashutosh
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 1/1] drm/xe/eustall: Return EBADFD from read if EU stall registers get reset
2025-12-12 21:18 ` [PATCH 1/1] " Dixit, Ashutosh
@ 2025-12-16 23:53 ` Harish Chegondi
0 siblings, 0 replies; 12+ messages in thread
From: Harish Chegondi @ 2025-12-16 23:53 UTC (permalink / raw)
To: Dixit, Ashutosh; +Cc: intel-xe, Umesh Nerlige Ramappa
On Fri, Dec 12, 2025 at 01:18:10PM -0800, Dixit, Ashutosh wrote:
> On Sun, 07 Dec 2025 22:16:11 -0800, Harish Chegondi wrote:
> >
>
Hi Ashutosh,
> Hi Harish,
>
> > @@ -541,9 +541,24 @@ static ssize_t xe_eu_stall_stream_read_locked(struct xe_eu_stall_data_stream *st
> > size_t total_size = 0;
> > u16 group, instance;
> > unsigned int xecore;
> > + u32 base_reg_value;
> > int ret = 0;
> >
> > mutex_lock(&stream->xecore_buf_lock);
> > + /* If a GT or engine reset happens during EU stall data sampling,
> > + * all EU stall registers get reset to 0 and the cached values of
> > + * EU stall data buffers' read and write pointers are out of sync
> > + * with the register values. This can cause invalid data to be
> > + * returned from read(). To prevent this, check the value of a
> > + * EU stall base register. If it is zero, return -EBADFD. The
> > + * user is expected to close the fd and open a new fd.
> > + */
> > + base_reg_value = xe_gt_mcr_unicast_read_any(gt, XEHPC_EUSTALL_BASE);
> > + if (unlikely(!base_reg_value)) {
> > + xe_gt_dbg(gt, "EU stall base register has been reset to 0\n");
> > + mutex_unlock(&stream->xecore_buf_lock);
> > + return -EBADFD;
> > + }
>
> Since we are introducing an extra register read every read() call here,
> does it make sense to first check if there's a real userland need for this?
I had discussions with the UMD folks and the feedback I received is - it
would be better to return an error than returning bad EU stall data. If
a reset happens in the middle of EU stall sampling, the circular buffer
pointers get messed up leading to invalid data. However, my
understanding is that if a reset happens when a workload is executing,
the workload will fail with an error. So, the user would probably
discard any EU stall data collected. This error code is an additional
feedback mechanism to the user to not trust the EU stall data collected
so far.
> And actually have a UMD PR which will consume this -EBADFD return value,
> before we merge this?
I agree that the UMDs may have to do additional work on their end, but
their PRs doesn't have to merged before this patch. If EU stall read()
returns any error, the UMDs would probably exit further read of EU stall
data. Even with this new error code, they would exit reading the stall
data. Upon receiving this new error, UMDs should stop reading the data,
close the fd,, open a new fd and read again.
>
> Thanks.
> --
> Ashutosh
Thank You
Harish.
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 1/1] drm/xe/eustall: Return EBADFD from read if EU stall registers get reset
2025-12-08 6:16 [PATCH 1/1] drm/xe/eustall: Return EBADFD from read if EU stall registers get reset Harish Chegondi
` (3 preceding siblings ...)
2025-12-12 21:18 ` [PATCH 1/1] " Dixit, Ashutosh
@ 2025-12-18 19:53 ` Dixit, Ashutosh
2025-12-22 22:37 ` Harish Chegondi
4 siblings, 1 reply; 12+ messages in thread
From: Dixit, Ashutosh @ 2025-12-18 19:53 UTC (permalink / raw)
To: Harish Chegondi; +Cc: intel-xe, Umesh Nerlige Ramappa
On Sun, 07 Dec 2025 22:16:11 -0800, Harish Chegondi wrote:
>
Hi Harish,
> If a reset (GT or engine) happens during EU stall data sampling, all the
> EU stall registers can get reset to 0. This will result in EU stall data
> buffers' read and write pointer register values to be out of sync with
> the cached values. This can result in read() returning invalid data. To
> prevent this, check the value of a EU stall base register. If it is zero,
> it indicates a reset may have happened that wiped the register to zero.
> If this happens, return EBADFD from read() upon which the user space
> should close the fd and open a new fd for a new EU stall data
> collection session.
>
> Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
> Cc: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> Signed-off-by: Harish Chegondi <harish.chegondi@intel.com>
> ---
> drivers/gpu/drm/xe/xe_eu_stall.c | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_eu_stall.c b/drivers/gpu/drm/xe/xe_eu_stall.c
> index 97dfb7945b7a..02c0beb4559f 100644
> --- a/drivers/gpu/drm/xe/xe_eu_stall.c
> +++ b/drivers/gpu/drm/xe/xe_eu_stall.c
> @@ -541,9 +541,24 @@ static ssize_t xe_eu_stall_stream_read_locked(struct xe_eu_stall_data_stream *st
> size_t total_size = 0;
> u16 group, instance;
> unsigned int xecore;
> + u32 base_reg_value;
> int ret = 0;
>
> mutex_lock(&stream->xecore_buf_lock);
> + /* If a GT or engine reset happens during EU stall data sampling,
> + * all EU stall registers get reset to 0 and the cached values of
> + * EU stall data buffers' read and write pointers are out of sync
> + * with the register values. This can cause invalid data to be
> + * returned from read(). To prevent this, check the value of a
> + * EU stall base register. If it is zero, return -EBADFD. The
> + * user is expected to close the fd and open a new fd.
> + */
> + base_reg_value = xe_gt_mcr_unicast_read_any(gt, XEHPC_EUSTALL_BASE);
> + if (unlikely(!base_reg_value)) {
> + xe_gt_dbg(gt, "EU stall base register has been reset to 0\n");
> + mutex_unlock(&stream->xecore_buf_lock);
> + return -EBADFD;
> + }
So I am seeing two problems here:
1. We are doing register read every read() call, rather than just when a
reset happens.
2. The other issue is should reset itself unblock a blocked poll() or
blocking read() call? If we don't do that, it is possible that poll()
or blocking read() remains blocked indefinitely and so either the
non-blocking read() doesn't get called at all, or a blocking read()
remains indefinitely blocked. So that we never actually return -EBADFD
even though a reset has happened.
(Note that, for exec(), I believe any blocked fences will unblock and
return error etc. if a reset happens during an exec() call (see
reset_status()), so EU stall should probably do something similar).
So to address these two issues how about doing something like this:
1. Call an EU stall callback from xe_guc_exec_queue_reset_handler(). In the
callback, if an EU stall stream is open on that gt, check if
XEHPC_EUSTALL_BASE is 0 and set a stream variable stream->reset under a
suitable lock (likely xecore_buf_lock).
2. From eu_stall_data_buf_poll(), if stream->reset is set, return true to
wake up any waiters. We may also need to set POLLERR or POLLHUP revents.
3. Now from read(), if stream->reset is set return -EBADFD.
So I think something like this solves both problems mentioned above.
So could you please look into this and see if this is possible? Or any
other thoughts about this?
Thanks.
--
Ashutosh
> if (bitmap_weight(stream->data_drop.mask, XE_MAX_DSS_FUSE_BITS)) {
> if (!stream->data_drop.reported_to_user) {
> stream->data_drop.reported_to_user = true;
> --
> 2.43.0
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 1/1] drm/xe/eustall: Return EBADFD from read if EU stall registers get reset
2025-12-18 19:53 ` Dixit, Ashutosh
@ 2025-12-22 22:37 ` Harish Chegondi
2025-12-23 5:08 ` Dixit, Ashutosh
0 siblings, 1 reply; 12+ messages in thread
From: Harish Chegondi @ 2025-12-22 22:37 UTC (permalink / raw)
To: Dixit, Ashutosh; +Cc: intel-xe, Umesh Nerlige Ramappa
On Thu, Dec 18, 2025 at 11:53:02AM -0800, Dixit, Ashutosh wrote:
> On Sun, 07 Dec 2025 22:16:11 -0800, Harish Chegondi wrote:
> >
>
Hi Ashutosh,
> Hi Harish,
>
> > If a reset (GT or engine) happens during EU stall data sampling, all the
> > EU stall registers can get reset to 0. This will result in EU stall data
> > buffers' read and write pointer register values to be out of sync with
> > the cached values. This can result in read() returning invalid data. To
> > prevent this, check the value of a EU stall base register. If it is zero,
> > it indicates a reset may have happened that wiped the register to zero.
> > If this happens, return EBADFD from read() upon which the user space
> > should close the fd and open a new fd for a new EU stall data
> > collection session.
> >
> > Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
> > Cc: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> > Signed-off-by: Harish Chegondi <harish.chegondi@intel.com>
> > ---
> > drivers/gpu/drm/xe/xe_eu_stall.c | 15 +++++++++++++++
> > 1 file changed, 15 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_eu_stall.c b/drivers/gpu/drm/xe/xe_eu_stall.c
> > index 97dfb7945b7a..02c0beb4559f 100644
> > --- a/drivers/gpu/drm/xe/xe_eu_stall.c
> > +++ b/drivers/gpu/drm/xe/xe_eu_stall.c
> > @@ -541,9 +541,24 @@ static ssize_t xe_eu_stall_stream_read_locked(struct xe_eu_stall_data_stream *st
> > size_t total_size = 0;
> > u16 group, instance;
> > unsigned int xecore;
> > + u32 base_reg_value;
> > int ret = 0;
> >
> > mutex_lock(&stream->xecore_buf_lock);
> > + /* If a GT or engine reset happens during EU stall data sampling,
> > + * all EU stall registers get reset to 0 and the cached values of
> > + * EU stall data buffers' read and write pointers are out of sync
> > + * with the register values. This can cause invalid data to be
> > + * returned from read(). To prevent this, check the value of a
> > + * EU stall base register. If it is zero, return -EBADFD. The
> > + * user is expected to close the fd and open a new fd.
> > + */
> > + base_reg_value = xe_gt_mcr_unicast_read_any(gt, XEHPC_EUSTALL_BASE);
> > + if (unlikely(!base_reg_value)) {
> > + xe_gt_dbg(gt, "EU stall base register has been reset to 0\n");
> > + mutex_unlock(&stream->xecore_buf_lock);
> > + return -EBADFD;
> > + }
>
> So I am seeing two problems here:
>
> 1. We are doing register read every read() call, rather than just when a
> reset happens.
>
> 2. The other issue is should reset itself unblock a blocked poll() or
> blocking read() call? If we don't do that, it is possible that poll()
> or blocking read() remains blocked indefinitely and so either the
> non-blocking read() doesn't get called at all, or a blocking read()
> remains indefinitely blocked. So that we never actually return -EBADFD
> even though a reset has happened.
>
> (Note that, for exec(), I believe any blocked fences will unblock and
> return error etc. if a reset happens during an exec() call (see
> reset_status()), so EU stall should probably do something similar).
>
> So to address these two issues how about doing something like this:
>
> 1. Call an EU stall callback from xe_guc_exec_queue_reset_handler(). In the
> callback, if an EU stall stream is open on that gt, check if
> XEHPC_EUSTALL_BASE is 0 and set a stream variable stream->reset under a
> suitable lock (likely xecore_buf_lock).
I thought about this and I think this can be racy - if read() is called
after the engine and the EU stall registers got reset but before the
stream->reset is set, the read() would return bad EU stall data. I think
the XEHPC_EUSTALL_BASE register should be checked either in the polling
thread or in read (as in this patch) to avoid any race conditions.
>
> 2. From eu_stall_data_buf_poll(), if stream->reset is set, return true to
> wake up any waiters. We may also need to set POLLERR or POLLHUP revents.
>
> 3. Now from read(), if stream->reset is set return -EBADFD.
>
> So I think something like this solves both problems mentioned above.
>
> So could you please look into this and see if this is possible? Or any
> other thoughts about this?
>
> Thanks.
> --
> Ashutosh
Thank You
Harish.
>
> > if (bitmap_weight(stream->data_drop.mask, XE_MAX_DSS_FUSE_BITS)) {
> > if (!stream->data_drop.reported_to_user) {
> > stream->data_drop.reported_to_user = true;
> > --
> > 2.43.0
> >
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 1/1] drm/xe/eustall: Return EBADFD from read if EU stall registers get reset
2025-12-22 22:37 ` Harish Chegondi
@ 2025-12-23 5:08 ` Dixit, Ashutosh
2025-12-23 23:39 ` Harish Chegondi
0 siblings, 1 reply; 12+ messages in thread
From: Dixit, Ashutosh @ 2025-12-23 5:08 UTC (permalink / raw)
To: Harish Chegondi; +Cc: intel-xe, Umesh Nerlige Ramappa
On Mon, 22 Dec 2025 14:37:53 -0800, Harish Chegondi wrote:
>
> On Thu, Dec 18, 2025 at 11:53:02AM -0800, Dixit, Ashutosh wrote:
> > On Sun, 07 Dec 2025 22:16:11 -0800, Harish Chegondi wrote:
> > >
> >
> Hi Ashutosh,
> > Hi Harish,
> >
> > > If a reset (GT or engine) happens during EU stall data sampling, all the
> > > EU stall registers can get reset to 0. This will result in EU stall data
> > > buffers' read and write pointer register values to be out of sync with
> > > the cached values. This can result in read() returning invalid data. To
> > > prevent this, check the value of a EU stall base register. If it is zero,
> > > it indicates a reset may have happened that wiped the register to zero.
> > > If this happens, return EBADFD from read() upon which the user space
> > > should close the fd and open a new fd for a new EU stall data
> > > collection session.
> > >
> > > Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
> > > Cc: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> > > Signed-off-by: Harish Chegondi <harish.chegondi@intel.com>
> > > ---
> > > drivers/gpu/drm/xe/xe_eu_stall.c | 15 +++++++++++++++
> > > 1 file changed, 15 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/xe/xe_eu_stall.c b/drivers/gpu/drm/xe/xe_eu_stall.c
> > > index 97dfb7945b7a..02c0beb4559f 100644
> > > --- a/drivers/gpu/drm/xe/xe_eu_stall.c
> > > +++ b/drivers/gpu/drm/xe/xe_eu_stall.c
> > > @@ -541,9 +541,24 @@ static ssize_t xe_eu_stall_stream_read_locked(struct xe_eu_stall_data_stream *st
> > > size_t total_size = 0;
> > > u16 group, instance;
> > > unsigned int xecore;
> > > + u32 base_reg_value;
> > > int ret = 0;
> > >
> > > mutex_lock(&stream->xecore_buf_lock);
> > > + /* If a GT or engine reset happens during EU stall data sampling,
> > > + * all EU stall registers get reset to 0 and the cached values of
> > > + * EU stall data buffers' read and write pointers are out of sync
> > > + * with the register values. This can cause invalid data to be
> > > + * returned from read(). To prevent this, check the value of a
> > > + * EU stall base register. If it is zero, return -EBADFD. The
> > > + * user is expected to close the fd and open a new fd.
> > > + */
> > > + base_reg_value = xe_gt_mcr_unicast_read_any(gt, XEHPC_EUSTALL_BASE);
> > > + if (unlikely(!base_reg_value)) {
> > > + xe_gt_dbg(gt, "EU stall base register has been reset to 0\n");
> > > + mutex_unlock(&stream->xecore_buf_lock);
> > > + return -EBADFD;
> > > + }
> >
> > So I am seeing two problems here:
> >
> > 1. We are doing register read every read() call, rather than just when a
> > reset happens.
> >
> > 2. The other issue is should reset itself unblock a blocked poll() or
> > blocking read() call? If we don't do that, it is possible that poll()
> > or blocking read() remains blocked indefinitely and so either the
> > non-blocking read() doesn't get called at all, or a blocking read()
> > remains indefinitely blocked. So that we never actually return -EBADFD
> > even though a reset has happened.
> >
> > (Note that, for exec(), I believe any blocked fences will unblock and
> > return error etc. if a reset happens during an exec() call (see
> > reset_status()), so EU stall should probably do something similar).
> >
> > So to address these two issues how about doing something like this:
> >
> > 1. Call an EU stall callback from xe_guc_exec_queue_reset_handler(). In the
> > callback, if an EU stall stream is open on that gt, check if
> > XEHPC_EUSTALL_BASE is 0 and set a stream variable stream->reset under a
> > suitable lock (likely xecore_buf_lock).
>
> I thought about this and I think this can be racy - if read() is called
> after the engine and the EU stall registers got reset but before the
> stream->reset is set, the read() would return bad EU stall data. I think
> the XEHPC_EUSTALL_BASE register should be checked either in the polling
> thread or in read (as in this patch) to avoid any race conditions.
In that case we need to ask GuC team about "pre context reset" g2h/h2g
messages/callbacks.
Is it possible to deduce that reset has happened from the write_ptr
register which is read in eu_stall_data_buf_poll? Say what happens to the
mask bits when reset occurs (why are the mask bits there in the first place
in a register which cannot be written by SW)? Then we can use that to set
stream->reset, and not have to introduce an extra register read.
In a sense read() cannot return bad data since it uses cached read/wrt
ptr's. So as long as we catch the reset while updating write_ptr, we should
be ok.
Or, can we can drop the constraint that read() will never return bad
data. If a reset happens, read() can return bad data.
Or do you have any other ideas to address the issues I mentioned above?
>
> >
> > 2. From eu_stall_data_buf_poll(), if stream->reset is set, return true to
> > wake up any waiters. We may also need to set POLLERR or POLLHUP revents.
> >
> > 3. Now from read(), if stream->reset is set return -EBADFD.
> >
> > So I think something like this solves both problems mentioned above.
> >
> > So could you please look into this and see if this is possible? Or any
> > other thoughts about this?
> >
> > Thanks.
> > --
> > Ashutosh
> Thank You
> Harish.
> >
> > > if (bitmap_weight(stream->data_drop.mask, XE_MAX_DSS_FUSE_BITS)) {
> > > if (!stream->data_drop.reported_to_user) {
> > > stream->data_drop.reported_to_user = true;
> > > --
> > > 2.43.0
> > >
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 1/1] drm/xe/eustall: Return EBADFD from read if EU stall registers get reset
2025-12-23 5:08 ` Dixit, Ashutosh
@ 2025-12-23 23:39 ` Harish Chegondi
2025-12-24 1:47 ` Dixit, Ashutosh
0 siblings, 1 reply; 12+ messages in thread
From: Harish Chegondi @ 2025-12-23 23:39 UTC (permalink / raw)
To: Dixit, Ashutosh; +Cc: intel-xe, Umesh Nerlige Ramappa
On Mon, Dec 22, 2025 at 09:08:04PM -0800, Dixit, Ashutosh wrote:
> On Mon, 22 Dec 2025 14:37:53 -0800, Harish Chegondi wrote:
> >
> > On Thu, Dec 18, 2025 at 11:53:02AM -0800, Dixit, Ashutosh wrote:
> > > On Sun, 07 Dec 2025 22:16:11 -0800, Harish Chegondi wrote:
> > > >
> > >
> > Hi Ashutosh,
> > > Hi Harish,
> > >
> > > > If a reset (GT or engine) happens during EU stall data sampling, all the
> > > > EU stall registers can get reset to 0. This will result in EU stall data
> > > > buffers' read and write pointer register values to be out of sync with
> > > > the cached values. This can result in read() returning invalid data. To
> > > > prevent this, check the value of a EU stall base register. If it is zero,
> > > > it indicates a reset may have happened that wiped the register to zero.
> > > > If this happens, return EBADFD from read() upon which the user space
> > > > should close the fd and open a new fd for a new EU stall data
> > > > collection session.
> > > >
> > > > Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
> > > > Cc: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> > > > Signed-off-by: Harish Chegondi <harish.chegondi@intel.com>
> > > > ---
> > > > drivers/gpu/drm/xe/xe_eu_stall.c | 15 +++++++++++++++
> > > > 1 file changed, 15 insertions(+)
> > > >
> > > > diff --git a/drivers/gpu/drm/xe/xe_eu_stall.c b/drivers/gpu/drm/xe/xe_eu_stall.c
> > > > index 97dfb7945b7a..02c0beb4559f 100644
> > > > --- a/drivers/gpu/drm/xe/xe_eu_stall.c
> > > > +++ b/drivers/gpu/drm/xe/xe_eu_stall.c
> > > > @@ -541,9 +541,24 @@ static ssize_t xe_eu_stall_stream_read_locked(struct xe_eu_stall_data_stream *st
> > > > size_t total_size = 0;
> > > > u16 group, instance;
> > > > unsigned int xecore;
> > > > + u32 base_reg_value;
> > > > int ret = 0;
> > > >
> > > > mutex_lock(&stream->xecore_buf_lock);
> > > > + /* If a GT or engine reset happens during EU stall data sampling,
> > > > + * all EU stall registers get reset to 0 and the cached values of
> > > > + * EU stall data buffers' read and write pointers are out of sync
> > > > + * with the register values. This can cause invalid data to be
> > > > + * returned from read(). To prevent this, check the value of a
> > > > + * EU stall base register. If it is zero, return -EBADFD. The
> > > > + * user is expected to close the fd and open a new fd.
> > > > + */
> > > > + base_reg_value = xe_gt_mcr_unicast_read_any(gt, XEHPC_EUSTALL_BASE);
> > > > + if (unlikely(!base_reg_value)) {
> > > > + xe_gt_dbg(gt, "EU stall base register has been reset to 0\n");
> > > > + mutex_unlock(&stream->xecore_buf_lock);
> > > > + return -EBADFD;
> > > > + }
> > >
> > > So I am seeing two problems here:
> > >
> > > 1. We are doing register read every read() call, rather than just when a
> > > reset happens.
> > >
> > > 2. The other issue is should reset itself unblock a blocked poll() or
> > > blocking read() call? If we don't do that, it is possible that poll()
> > > or blocking read() remains blocked indefinitely and so either the
> > > non-blocking read() doesn't get called at all, or a blocking read()
> > > remains indefinitely blocked. So that we never actually return -EBADFD
> > > even though a reset has happened.
> > >
> > > (Note that, for exec(), I believe any blocked fences will unblock and
> > > return error etc. if a reset happens during an exec() call (see
> > > reset_status()), so EU stall should probably do something similar).
> > >
> > > So to address these two issues how about doing something like this:
> > >
> > > 1. Call an EU stall callback from xe_guc_exec_queue_reset_handler(). In the
> > > callback, if an EU stall stream is open on that gt, check if
> > > XEHPC_EUSTALL_BASE is 0 and set a stream variable stream->reset under a
> > > suitable lock (likely xecore_buf_lock).
> >
> > I thought about this and I think this can be racy - if read() is called
> > after the engine and the EU stall registers got reset but before the
> > stream->reset is set, the read() would return bad EU stall data. I think
> > the XEHPC_EUSTALL_BASE register should be checked either in the polling
> > thread or in read (as in this patch) to avoid any race conditions.
>
> In that case we need to ask GuC team about "pre context reset" g2h/h2g
> messages/callbacks.
>
> Is it possible to deduce that reset has happened from the write_ptr
> register which is read in eu_stall_data_buf_poll? Say what happens to the
> mask bits when reset occurs (why are the mask bits there in the first place
> in a register which cannot be written by SW)? Then we can use that to set
> stream->reset, and not have to introduce an extra register read.
The write_ptr gets reset to 0, but it happens when the buffer wraps
around too. I am not sure about the mask bits, but I can check what
happens to them after a reset.
>
> In a sense read() cannot return bad data since it uses cached read/wrt
> ptr's. So as long as we catch the reset while updating write_ptr, we should
> be ok.
>
> Or, can we can drop the constraint that read() will never return bad
> data. If a reset happens, read() can return bad data.
>
> Or do you have any other ideas to address the issues I mentioned above?
You earlier suggested about checking the base register in the polling
thread. If we set the stream->reset in the polling thread, it can be
used in both read() and poll(). Do you think this would address the
issues you mentioned above ?
Thank You
Harish.
>
> >
> > >
> > > 2. From eu_stall_data_buf_poll(), if stream->reset is set, return true to
> > > wake up any waiters. We may also need to set POLLERR or POLLHUP revents.
> > >
> > > 3. Now from read(), if stream->reset is set return -EBADFD.
> > >
> > > So I think something like this solves both problems mentioned above.
> > >
> > > So could you please look into this and see if this is possible? Or any
> > > other thoughts about this?
> > >
> > > Thanks.
> > > --
> > > Ashutosh
> > Thank You
> > Harish.
> > >
> > > > if (bitmap_weight(stream->data_drop.mask, XE_MAX_DSS_FUSE_BITS)) {
> > > > if (!stream->data_drop.reported_to_user) {
> > > > stream->data_drop.reported_to_user = true;
> > > > --
> > > > 2.43.0
> > > >
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 1/1] drm/xe/eustall: Return EBADFD from read if EU stall registers get reset
2025-12-23 23:39 ` Harish Chegondi
@ 2025-12-24 1:47 ` Dixit, Ashutosh
0 siblings, 0 replies; 12+ messages in thread
From: Dixit, Ashutosh @ 2025-12-24 1:47 UTC (permalink / raw)
To: Harish Chegondi; +Cc: intel-xe, Umesh Nerlige Ramappa
On Tue, 23 Dec 2025 15:39:47 -0800, Harish Chegondi wrote:
>
> On Mon, Dec 22, 2025 at 09:08:04PM -0800, Dixit, Ashutosh wrote:
> > On Mon, 22 Dec 2025 14:37:53 -0800, Harish Chegondi wrote:
> > >
> > > On Thu, Dec 18, 2025 at 11:53:02AM -0800, Dixit, Ashutosh wrote:
> > > > On Sun, 07 Dec 2025 22:16:11 -0800, Harish Chegondi wrote:
> > > > >
> > > >
> > > Hi Ashutosh,
> > > > Hi Harish,
> > > >
> > > > > If a reset (GT or engine) happens during EU stall data sampling, all the
> > > > > EU stall registers can get reset to 0. This will result in EU stall data
> > > > > buffers' read and write pointer register values to be out of sync with
> > > > > the cached values. This can result in read() returning invalid data. To
> > > > > prevent this, check the value of a EU stall base register. If it is zero,
> > > > > it indicates a reset may have happened that wiped the register to zero.
> > > > > If this happens, return EBADFD from read() upon which the user space
> > > > > should close the fd and open a new fd for a new EU stall data
> > > > > collection session.
> > > > >
> > > > > Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
> > > > > Cc: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> > > > > Signed-off-by: Harish Chegondi <harish.chegondi@intel.com>
> > > > > ---
> > > > > drivers/gpu/drm/xe/xe_eu_stall.c | 15 +++++++++++++++
> > > > > 1 file changed, 15 insertions(+)
> > > > >
> > > > > diff --git a/drivers/gpu/drm/xe/xe_eu_stall.c b/drivers/gpu/drm/xe/xe_eu_stall.c
> > > > > index 97dfb7945b7a..02c0beb4559f 100644
> > > > > --- a/drivers/gpu/drm/xe/xe_eu_stall.c
> > > > > +++ b/drivers/gpu/drm/xe/xe_eu_stall.c
> > > > > @@ -541,9 +541,24 @@ static ssize_t xe_eu_stall_stream_read_locked(struct xe_eu_stall_data_stream *st
> > > > > size_t total_size = 0;
> > > > > u16 group, instance;
> > > > > unsigned int xecore;
> > > > > + u32 base_reg_value;
> > > > > int ret = 0;
> > > > >
> > > > > mutex_lock(&stream->xecore_buf_lock);
> > > > > + /* If a GT or engine reset happens during EU stall data sampling,
> > > > > + * all EU stall registers get reset to 0 and the cached values of
> > > > > + * EU stall data buffers' read and write pointers are out of sync
> > > > > + * with the register values. This can cause invalid data to be
> > > > > + * returned from read(). To prevent this, check the value of a
> > > > > + * EU stall base register. If it is zero, return -EBADFD. The
> > > > > + * user is expected to close the fd and open a new fd.
> > > > > + */
> > > > > + base_reg_value = xe_gt_mcr_unicast_read_any(gt, XEHPC_EUSTALL_BASE);
> > > > > + if (unlikely(!base_reg_value)) {
> > > > > + xe_gt_dbg(gt, "EU stall base register has been reset to 0\n");
> > > > > + mutex_unlock(&stream->xecore_buf_lock);
> > > > > + return -EBADFD;
> > > > > + }
> > > >
> > > > So I am seeing two problems here:
> > > >
> > > > 1. We are doing register read every read() call, rather than just when a
> > > > reset happens.
> > > >
> > > > 2. The other issue is should reset itself unblock a blocked poll() or
> > > > blocking read() call? If we don't do that, it is possible that poll()
> > > > or blocking read() remains blocked indefinitely and so either the
> > > > non-blocking read() doesn't get called at all, or a blocking read()
> > > > remains indefinitely blocked. So that we never actually return -EBADFD
> > > > even though a reset has happened.
> > > >
> > > > (Note that, for exec(), I believe any blocked fences will unblock and
> > > > return error etc. if a reset happens during an exec() call (see
> > > > reset_status()), so EU stall should probably do something similar).
> > > >
> > > > So to address these two issues how about doing something like this:
> > > >
> > > > 1. Call an EU stall callback from xe_guc_exec_queue_reset_handler(). In the
> > > > callback, if an EU stall stream is open on that gt, check if
> > > > XEHPC_EUSTALL_BASE is 0 and set a stream variable stream->reset under a
> > > > suitable lock (likely xecore_buf_lock).
> > >
> > > I thought about this and I think this can be racy - if read() is called
> > > after the engine and the EU stall registers got reset but before the
> > > stream->reset is set, the read() would return bad EU stall data. I think
> > > the XEHPC_EUSTALL_BASE register should be checked either in the polling
> > > thread or in read (as in this patch) to avoid any race conditions.
> >
> > In that case we need to ask GuC team about "pre context reset" g2h/h2g
> > messages/callbacks.
> >
> > Is it possible to deduce that reset has happened from the write_ptr
> > register which is read in eu_stall_data_buf_poll? Say what happens to the
> > mask bits when reset occurs (why are the mask bits there in the first place
> > in a register which cannot be written by SW)? Then we can use that to set
> > stream->reset, and not have to introduce an extra register read.
> The write_ptr gets reset to 0, but it happens when the buffer wraps
> around too.
Yeah, I know, that's why I said check the mask bits.
> I am not sure about the mask bits, but I can check what
> happens to them after a reset.
> >
> > In a sense read() cannot return bad data since it uses cached read/wrt
> > ptr's. So as long as we catch the reset while updating write_ptr, we should
> > be ok.
> >
> > Or, can we can drop the constraint that read() will never return bad
> > data. If a reset happens, read() can return bad data.
> >
> > Or do you have any other ideas to address the issues I mentioned above?
>
> You earlier suggested about checking the base register in the polling
> thread. If we set the stream->reset in the polling thread, it can be
> used in both read() and poll(). Do you think this would address the
> issues you mentioned above ?
Let's first check write_ptr. If it works out we can use that. Otherwise my
preference I think is to avoid introducing an additional register read
anywhere. What we could do is hook into the context reset callback and if
context reset occurs we just unblock any blocked threads, followed by
returning -EBADFD from read(), even if we return bad data. We revisit if
UMD's insist bad data is unacceptable (even in case of a reset).
>
> >
> > >
> > > >
> > > > 2. From eu_stall_data_buf_poll(), if stream->reset is set, return true to
> > > > wake up any waiters. We may also need to set POLLERR or POLLHUP revents.
> > > >
> > > > 3. Now from read(), if stream->reset is set return -EBADFD.
> > > >
> > > > So I think something like this solves both problems mentioned above.
> > > >
> > > > So could you please look into this and see if this is possible? Or any
> > > > other thoughts about this?
> > > >
> > > > Thanks.
> > > > --
> > > > Ashutosh
> > > Thank You
> > > Harish.
> > > >
> > > > > if (bitmap_weight(stream->data_drop.mask, XE_MAX_DSS_FUSE_BITS)) {
> > > > > if (!stream->data_drop.reported_to_user) {
> > > > > stream->data_drop.reported_to_user = true;
> > > > > --
> > > > > 2.43.0
> > > > >
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2025-12-24 1:48 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-12-08 6:16 [PATCH 1/1] drm/xe/eustall: Return EBADFD from read if EU stall registers get reset Harish Chegondi
2025-12-08 6:32 ` ✓ CI.KUnit: success for series starting with [1/1] " Patchwork
2025-12-08 7:56 ` ✓ Xe.CI.BAT: " Patchwork
2025-12-08 8:48 ` ✗ Xe.CI.Full: failure " Patchwork
2025-12-12 21:18 ` [PATCH 1/1] " Dixit, Ashutosh
2025-12-16 23:53 ` Harish Chegondi
2025-12-18 19:53 ` Dixit, Ashutosh
2025-12-22 22:37 ` Harish Chegondi
2025-12-23 5:08 ` Dixit, Ashutosh
2025-12-23 23:39 ` Harish Chegondi
2025-12-24 1:47 ` Dixit, Ashutosh
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2025-10-01 6:38 Harish Chegondi
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