[PATCH v3 0/4] Add debugfs facility to catch RTP mistakes

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* [PATCH v3 0/4] Add debugfs facility to catch RTP mistakes
@ 2026-02-13  0:09 Matt Roper
  2026-02-13  0:09 ` [PATCH v3 1/4] drm/xe/reg_sr: Don't process gt/hwe lists in VF Matt Roper
                   ` (7 more replies)
  0 siblings, 8 replies; 10+ messages in thread
From: Matt Roper @ 2026-02-13  0:09 UTC (permalink / raw)
  To: intel-xe; +Cc: matthew.d.roper, Michal Wajdeczko, Ashutosh Dixit

Unlike i915, Xe doesn't currently do any readback verification of
workaround/tuning settings that it tries to program.  If an entry gets
placed on the wrong table, or applied to the wrong platform/IP, the
programming may be silently ineffective without anyone noticing.

i915's solution of doing verification at application time was
problematic because raising warnings during probe would be treated by CI
as a fatal problem and would prevent CI from even attempting any other
testing until the issue was dealt with.  Let's avoid that with Xe and
instead perform the verification on-demand when a debugfs entry is read.
This makes it very easy to do verification at various times during
manual debugging.  It should also be simply to wrap a dedicated IGT test
around the debugfs entry such that any unexpected failures are reported
against that one test rather than bringing down the entire CI system.

Note that verification of LRC programming is a bit more complicated than
verification of GT/engine programming since we can't just blindly read
the register values from the CPU and expect the RTP values to be in
effect.  Applying LRC progamming ensures that every GPU context created
should have the updated values in the LRC, and those values will get
loaded into the register when the hardware context switches to it.
However when no context is running on the hardware, the register values
may revert to their hardware defaults which do not have the programming
applied.  Instead, we should verify LRC programming by parsing the
engine's 'default LRC' image and making sure the desired programming
appears somewhere in one of the MI_LOAD_REGISTER_IMM state emission
commands.

Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>

v2:
 - Avoid processing RTP -> SR for gt/hwe lists in VF to ensure the
   debugfs entry is safe to use in an SR-IOV VF.  (Ashutosh)
 - Add verification of LRC adjustments by searching engine type's
   default LRC.

v3:
 - Add missing checks to avoid SR-IOV VF processing of RTP -> SR in
   hw_engine_setup_default_state() and
   xe_reg_whitelist_process_engine().

Matt Roper (4):
  drm/xe/reg_sr: Don't process gt/hwe lists in VF
  drm/xe/reg_sr: Add debugfs to verify status of reg_sr programming
  drm/xe: Add facility to lookup the value of a register in a default
    LRC
  drm/xe/reg_sr: Allow register_save_restore_check debugfs to verify LRC
    values

 drivers/gpu/drm/xe/xe_gt_debugfs.c    | 26 ++++++++
 drivers/gpu/drm/xe/xe_hw_engine.c     |  3 +
 drivers/gpu/drm/xe/xe_lrc.c           | 96 +++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_lrc.h           |  4 ++
 drivers/gpu/drm/xe/xe_reg_sr.c        | 71 +++++++++++++++++++-
 drivers/gpu/drm/xe/xe_reg_sr.h        |  7 ++
 drivers/gpu/drm/xe/xe_reg_whitelist.c |  3 +
 drivers/gpu/drm/xe/xe_tuning.c        |  7 ++
 drivers/gpu/drm/xe/xe_wa.c            |  6 ++
 9 files changed, 221 insertions(+), 2 deletions(-)

-- 
2.53.0

^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH v3 1/4] drm/xe/reg_sr: Don't process gt/hwe lists in VF
  2026-02-13  0:09 [PATCH v3 0/4] Add debugfs facility to catch RTP mistakes Matt Roper
@ 2026-02-13  0:09 ` Matt Roper
  2026-02-17 21:34   ` Dixit, Ashutosh
  2026-02-13  0:09 ` [PATCH v3 2/4] drm/xe/reg_sr: Add debugfs to verify status of reg_sr programming Matt Roper
                   ` (6 subsequent siblings)
  7 siblings, 1 reply; 10+ messages in thread
From: Matt Roper @ 2026-02-13  0:09 UTC (permalink / raw)
  To: intel-xe; +Cc: matthew.d.roper, Michal Wajdeczko

There are a few different reg_sr lists managed by the driver for
workarounds/tuning:

 - gt->reg_sr
 - hwe->reg_sr
 - hwe->reg_lrc

The first two are not relevant to SRIOV VFs; a VF KMD does not have
access to the registers that appear on this list and it is the PF KMD's
responsibility to apply such programming on behalf of the entire system.
However the third list contains per-client values that the VF KMD needs
to ensure are incorporated whenever a new LRC is created.

Handling of reg_sr lists comes in two steps: processing an RTP table to
build a reg_sr from the relevant entries, and then applying the contents
of the reg_sr.  Skipping the RTP processing (resulting in an empty
reg_sr) or skipping the application of a reg_sr are both valid ways to
avoid having a VF accidentally try to write registers it doesn't have
access to.  In commit c19e705ec981 ("drm/xe/vf: Stop applying
save-restore MMIOs if VF") and commit 92a5bd302458 ("drm/xe/vf: Unblock
xe_rtp_process_to_sr for VFs") we adjusted the drivers behavior to
always process the RTP table into a reg_sr and just skipped the
application step.  This works fine functionally, but can lead to
confusion during debugging since facilities like the debugfs
'register-save-restore' will still report a bunch of registers that the
VF KMD isn't actually trying to handle.  It will also mislead other
upcoming debug changes.

Let's go back to skipping the RTP => reg_sr processing step, but only
for GT / hwe tables this time.  This will allow LRC reg_sr handling to
continue to work, but will ensure that gt->reg_sr and hwe->reg_sr remain
empty and that debugfs reporting more accurately reflects the KMD's
behavior.

v2:
 - Also skip the hwe processing in hw_engine_setup_default_state() and
   xe_reg_whitelist_process_engine().

Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/xe/xe_hw_engine.c     | 3 +++
 drivers/gpu/drm/xe/xe_reg_sr.c        | 8 ++++++--
 drivers/gpu/drm/xe/xe_reg_whitelist.c | 3 +++
 drivers/gpu/drm/xe/xe_tuning.c        | 7 +++++++
 drivers/gpu/drm/xe/xe_wa.c            | 6 ++++++
 5 files changed, 25 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
index 4d3ee5226e3a..7061312ce6b5 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine.c
+++ b/drivers/gpu/drm/xe/xe_hw_engine.c
@@ -472,6 +472,9 @@ hw_engine_setup_default_state(struct xe_hw_engine *hwe)
 		},
 	};
 
+	if (IS_SRIOV_VF(gt_to_xe(gt)))
+		return;
+
 	xe_rtp_process_to_sr(&ctx, engine_entries, ARRAY_SIZE(engine_entries), &hwe->reg_sr);
 }
 
diff --git a/drivers/gpu/drm/xe/xe_reg_sr.c b/drivers/gpu/drm/xe/xe_reg_sr.c
index d3e13ea33123..1ac911fc6e94 100644
--- a/drivers/gpu/drm/xe/xe_reg_sr.c
+++ b/drivers/gpu/drm/xe/xe_reg_sr.c
@@ -13,6 +13,7 @@
 #include <drm/drm_managed.h>
 #include <drm/drm_print.h>
 
+#include "xe_assert.h"
 #include "xe_device.h"
 #include "xe_device_types.h"
 #include "xe_force_wake.h"
@@ -169,8 +170,11 @@ void xe_reg_sr_apply_mmio(struct xe_reg_sr *sr, struct xe_gt *gt)
 	if (xa_empty(&sr->xa))
 		return;
 
-	if (IS_SRIOV_VF(gt_to_xe(gt)))
-		return;
+	/*
+	 * We don't process non-LRC reg_sr lists in VF, so they should have
+	 * been empty in the check above.
+	 */
+	xe_gt_assert(gt, !IS_SRIOV_VF(gt_to_xe(gt)));
 
 	xe_gt_dbg(gt, "Applying %s save-restore MMIOs\n", sr->name);
 
diff --git a/drivers/gpu/drm/xe/xe_reg_whitelist.c b/drivers/gpu/drm/xe/xe_reg_whitelist.c
index 9c513778d370..83b2d1c68acf 100644
--- a/drivers/gpu/drm/xe/xe_reg_whitelist.c
+++ b/drivers/gpu/drm/xe/xe_reg_whitelist.c
@@ -188,6 +188,9 @@ void xe_reg_whitelist_process_engine(struct xe_hw_engine *hwe)
 {
 	struct xe_rtp_process_ctx ctx = XE_RTP_PROCESS_CTX_INITIALIZER(hwe);
 
+	if (IS_SRIOV_VF(gt_to_xe(hwe->gt)))
+		return;
+
 	xe_rtp_process_to_sr(&ctx, register_whitelist, ARRAY_SIZE(register_whitelist),
 			     &hwe->reg_whitelist);
 	whitelist_apply_to_hwe(hwe);
diff --git a/drivers/gpu/drm/xe/xe_tuning.c b/drivers/gpu/drm/xe/xe_tuning.c
index 316f5e2b2e48..ddd8519f3f19 100644
--- a/drivers/gpu/drm/xe/xe_tuning.c
+++ b/drivers/gpu/drm/xe/xe_tuning.c
@@ -15,6 +15,7 @@
 #include "xe_gt_types.h"
 #include "xe_platform_types.h"
 #include "xe_rtp.h"
+#include "xe_sriov.h"
 
 #undef XE_REG_MCR
 #define XE_REG_MCR(...)     XE_REG(__VA_ARGS__, .mcr = 1)
@@ -197,6 +198,9 @@ void xe_tuning_process_gt(struct xe_gt *gt)
 {
 	struct xe_rtp_process_ctx ctx = XE_RTP_PROCESS_CTX_INITIALIZER(gt);
 
+	if (IS_SRIOV_VF(gt_to_xe(gt)))
+		return;
+
 	xe_rtp_process_ctx_enable_active_tracking(&ctx,
 						  gt->tuning_active.gt,
 						  ARRAY_SIZE(gt_tunings));
@@ -208,6 +212,9 @@ void xe_tuning_process_engine(struct xe_hw_engine *hwe)
 {
 	struct xe_rtp_process_ctx ctx = XE_RTP_PROCESS_CTX_INITIALIZER(hwe);
 
+	if (IS_SRIOV_VF(gt_to_xe(hwe->gt)))
+		return;
+
 	xe_rtp_process_ctx_enable_active_tracking(&ctx,
 						  hwe->gt->tuning_active.engine,
 						  ARRAY_SIZE(engine_tunings));
diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
index 843ce9fe7aab..92547280a5b6 100644
--- a/drivers/gpu/drm/xe/xe_wa.c
+++ b/drivers/gpu/drm/xe/xe_wa.c
@@ -1003,6 +1003,9 @@ void xe_wa_process_gt(struct xe_gt *gt)
 {
 	struct xe_rtp_process_ctx ctx = XE_RTP_PROCESS_CTX_INITIALIZER(gt);
 
+	if (IS_SRIOV_VF(gt_to_xe(gt)))
+		return;
+
 	xe_rtp_process_ctx_enable_active_tracking(&ctx, gt->wa_active.gt,
 						  ARRAY_SIZE(gt_was));
 	xe_rtp_process_to_sr(&ctx, gt_was, ARRAY_SIZE(gt_was), &gt->reg_sr);
@@ -1021,6 +1024,9 @@ void xe_wa_process_engine(struct xe_hw_engine *hwe)
 {
 	struct xe_rtp_process_ctx ctx = XE_RTP_PROCESS_CTX_INITIALIZER(hwe);
 
+	if (IS_SRIOV_VF(gt_to_xe(hwe->gt)))
+		return;
+
 	xe_rtp_process_ctx_enable_active_tracking(&ctx, hwe->gt->wa_active.engine,
 						  ARRAY_SIZE(engine_was));
 	xe_rtp_process_to_sr(&ctx, engine_was, ARRAY_SIZE(engine_was), &hwe->reg_sr);
-- 
2.53.0


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* Re: [PATCH v3 1/4] drm/xe/reg_sr: Don't process gt/hwe lists in VF
  2026-02-13  0:09 ` [PATCH v3 1/4] drm/xe/reg_sr: Don't process gt/hwe lists in VF Matt Roper
@ 2026-02-17 21:34   ` Dixit, Ashutosh
  0 siblings, 0 replies; 10+ messages in thread
From: Dixit, Ashutosh @ 2026-02-17 21:34 UTC (permalink / raw)
  To: Matt Roper; +Cc: intel-xe, Michal Wajdeczko

On Thu, 12 Feb 2026 16:09:31 -0800, Matt Roper wrote:
>

Hi Matt,

> diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
> index 4d3ee5226e3a..7061312ce6b5 100644
> --- a/drivers/gpu/drm/xe/xe_hw_engine.c
> +++ b/drivers/gpu/drm/xe/xe_hw_engine.c
> @@ -472,6 +472,9 @@ hw_engine_setup_default_state(struct xe_hw_engine *hwe)
>		},
>	};
>
> +	if (IS_SRIOV_VF(gt_to_xe(gt)))
> +		return;
> +

I was thinking, instead of having this check in multiple places, this check
should be moved inside xe_rtp_process_to_sr(). And then we should tell
xe_rtp_process_to_sr() whether to skip or to continue somehow. We could
either:

a. add a "type" field (gt/hwe/lrc) to either reg_sr or to ctx, or,
b. add another 'vf' argument to xe_rtp_process_to_sr() ('vf' would be say 1
   for lrc and 0 for other cases).

And based on this information xe_rtp_process_to_sr() would either skip or
continue for VF's.

Thanks.
--
Ashutosh

>	xe_rtp_process_to_sr(&ctx, engine_entries, ARRAY_SIZE(engine_entries), &hwe->reg_sr);

>  }
>
> diff --git a/drivers/gpu/drm/xe/xe_reg_sr.c b/drivers/gpu/drm/xe/xe_reg_sr.c
> index d3e13ea33123..1ac911fc6e94 100644
> --- a/drivers/gpu/drm/xe/xe_reg_sr.c
> +++ b/drivers/gpu/drm/xe/xe_reg_sr.c
> @@ -13,6 +13,7 @@
>  #include <drm/drm_managed.h>
>  #include <drm/drm_print.h>
>
> +#include "xe_assert.h"
>  #include "xe_device.h"
>  #include "xe_device_types.h"
>  #include "xe_force_wake.h"
> @@ -169,8 +170,11 @@ void xe_reg_sr_apply_mmio(struct xe_reg_sr *sr, struct xe_gt *gt)
>	if (xa_empty(&sr->xa))
>		return;
>
> -	if (IS_SRIOV_VF(gt_to_xe(gt)))
> -		return;
> +	/*
> +	 * We don't process non-LRC reg_sr lists in VF, so they should have
> +	 * been empty in the check above.
> +	 */
> +	xe_gt_assert(gt, !IS_SRIOV_VF(gt_to_xe(gt)));
>
>	xe_gt_dbg(gt, "Applying %s save-restore MMIOs\n", sr->name);
>
> diff --git a/drivers/gpu/drm/xe/xe_reg_whitelist.c b/drivers/gpu/drm/xe/xe_reg_whitelist.c
> index 9c513778d370..83b2d1c68acf 100644
> --- a/drivers/gpu/drm/xe/xe_reg_whitelist.c
> +++ b/drivers/gpu/drm/xe/xe_reg_whitelist.c
> @@ -188,6 +188,9 @@ void xe_reg_whitelist_process_engine(struct xe_hw_engine *hwe)
>  {
>	struct xe_rtp_process_ctx ctx = XE_RTP_PROCESS_CTX_INITIALIZER(hwe);
>
> +	if (IS_SRIOV_VF(gt_to_xe(hwe->gt)))
> +		return;
> +
>	xe_rtp_process_to_sr(&ctx, register_whitelist, ARRAY_SIZE(register_whitelist),
>			     &hwe->reg_whitelist);
>	whitelist_apply_to_hwe(hwe);
> diff --git a/drivers/gpu/drm/xe/xe_tuning.c b/drivers/gpu/drm/xe/xe_tuning.c
> index 316f5e2b2e48..ddd8519f3f19 100644
> --- a/drivers/gpu/drm/xe/xe_tuning.c
> +++ b/drivers/gpu/drm/xe/xe_tuning.c
> @@ -15,6 +15,7 @@
>  #include "xe_gt_types.h"
>  #include "xe_platform_types.h"
>  #include "xe_rtp.h"
> +#include "xe_sriov.h"
>
>  #undef XE_REG_MCR
>  #define XE_REG_MCR(...)     XE_REG(__VA_ARGS__, .mcr = 1)
> @@ -197,6 +198,9 @@ void xe_tuning_process_gt(struct xe_gt *gt)
>  {
>	struct xe_rtp_process_ctx ctx = XE_RTP_PROCESS_CTX_INITIALIZER(gt);
>
> +	if (IS_SRIOV_VF(gt_to_xe(gt)))
> +		return;
> +
>	xe_rtp_process_ctx_enable_active_tracking(&ctx,
>						  gt->tuning_active.gt,
>						  ARRAY_SIZE(gt_tunings));
> @@ -208,6 +212,9 @@ void xe_tuning_process_engine(struct xe_hw_engine *hwe)
>  {
>	struct xe_rtp_process_ctx ctx = XE_RTP_PROCESS_CTX_INITIALIZER(hwe);
>
> +	if (IS_SRIOV_VF(gt_to_xe(hwe->gt)))
> +		return;
> +
>	xe_rtp_process_ctx_enable_active_tracking(&ctx,
>						  hwe->gt->tuning_active.engine,
>						  ARRAY_SIZE(engine_tunings));
> diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
> index 843ce9fe7aab..92547280a5b6 100644
> --- a/drivers/gpu/drm/xe/xe_wa.c
> +++ b/drivers/gpu/drm/xe/xe_wa.c
> @@ -1003,6 +1003,9 @@ void xe_wa_process_gt(struct xe_gt *gt)
>  {
>	struct xe_rtp_process_ctx ctx = XE_RTP_PROCESS_CTX_INITIALIZER(gt);
>
> +	if (IS_SRIOV_VF(gt_to_xe(gt)))
> +		return;
> +
>	xe_rtp_process_ctx_enable_active_tracking(&ctx, gt->wa_active.gt,
>						  ARRAY_SIZE(gt_was));
>	xe_rtp_process_to_sr(&ctx, gt_was, ARRAY_SIZE(gt_was), &gt->reg_sr);
> @@ -1021,6 +1024,9 @@ void xe_wa_process_engine(struct xe_hw_engine *hwe)
>  {
>	struct xe_rtp_process_ctx ctx = XE_RTP_PROCESS_CTX_INITIALIZER(hwe);
>
> +	if (IS_SRIOV_VF(gt_to_xe(hwe->gt)))
> +		return;
> +
>	xe_rtp_process_ctx_enable_active_tracking(&ctx, hwe->gt->wa_active.engine,
>						  ARRAY_SIZE(engine_was));
>	xe_rtp_process_to_sr(&ctx, engine_was, ARRAY_SIZE(engine_was), &hwe->reg_sr);
> --
> 2.53.0
>

^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH v3 2/4] drm/xe/reg_sr: Add debugfs to verify status of reg_sr programming
  2026-02-13  0:09 [PATCH v3 0/4] Add debugfs facility to catch RTP mistakes Matt Roper
  2026-02-13  0:09 ` [PATCH v3 1/4] drm/xe/reg_sr: Don't process gt/hwe lists in VF Matt Roper
@ 2026-02-13  0:09 ` Matt Roper
  2026-02-13  0:09 ` [PATCH v3 3/4] drm/xe: Add facility to lookup the value of a register in a default LRC Matt Roper
                   ` (5 subsequent siblings)
  7 siblings, 0 replies; 10+ messages in thread
From: Matt Roper @ 2026-02-13  0:09 UTC (permalink / raw)
  To: intel-xe; +Cc: matthew.d.roper, Ashutosh Dixit

When applying save-restore register programming for workarounds, tuning
settings, and general device configuration we assume the programming was
successful.  However there are a number of cases where the desired
reg_sr programming can become lost:

 - workarounds implemented on the wrong RTP table might not get
   saved/restored at the right time leading to, for example, failure to
   re-apply the programming after engine resets
 - some hardware registers become "locked" and can no longer be updated
   after firmware or the driver finishes initializing them
 - sometimes the hardware teams just made a mistake when documenting the
   register and/or bits that needed to be programmed

Add a debugfs entry that will read back the registers referenced on a
GT's save-restore lists and print any cases where the desired
programming is no longer in effect.  Such cases might indicate the
presence of a driver/firmware bug, might indicate that the documentation
we were following has a mistake, or might be benign (occasionally
registers have broken read-back capability preventing verification, but
previous writes were still successful and effective).

For now we only verify the GT and engine reg_sr lists.  Verifying the
LRC list will require checking the expected programming against the
default_lrc contents, not the live registers (which may not reflect the
reg_sr programming if no context is actively running).

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
 drivers/gpu/drm/xe/xe_gt_debugfs.c | 26 +++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_reg_sr.c     | 34 ++++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_reg_sr.h     |  3 +++
 3 files changed, 63 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_gt_debugfs.c b/drivers/gpu/drm/xe/xe_gt_debugfs.c
index 4363bc9c3606..aa43427a9f4b 100644
--- a/drivers/gpu/drm/xe/xe_gt_debugfs.c
+++ b/drivers/gpu/drm/xe/xe_gt_debugfs.c
@@ -155,6 +155,30 @@ static int register_save_restore(struct xe_gt *gt, struct drm_printer *p)
 	return 0;
 }
 
+/*
+ * Check the registers referenced on a save-restore list and report any
+ * save-restore entries that did not get applied.
+ */
+static int register_save_restore_check(struct xe_gt *gt, struct drm_printer *p)
+{
+	struct xe_hw_engine *hwe;
+	enum xe_hw_engine_id id;
+
+	CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
+	if (!xe_force_wake_ref_has_domain(fw_ref.domains, XE_FORCEWAKE_ALL)) {
+		drm_printf(p, "ERROR: Could not acquire forcewake\n");
+		return -ETIMEDOUT;
+	}
+
+	xe_reg_sr_readback_check(&gt->reg_sr, gt, p);
+	for_each_hw_engine(hwe, gt, id)
+		xe_reg_sr_readback_check(&hwe->reg_sr, gt, p);
+
+	/* TODO: Check hwe->reg_lrc against contents of default_lrc. */
+
+	return 0;
+}
+
 static int rcs_default_lrc(struct xe_gt *gt, struct drm_printer *p)
 {
 	xe_lrc_dump_default(p, gt, XE_ENGINE_CLASS_RENDER);
@@ -209,6 +233,8 @@ static const struct drm_info_list vf_safe_debugfs_list[] = {
 	{ "default_lrc_vecs", .show = xe_gt_debugfs_show_with_rpm, .data = vecs_default_lrc },
 	{ "hwconfig", .show = xe_gt_debugfs_show_with_rpm, .data = hwconfig },
 	{ "pat_sw_config", .show = xe_gt_debugfs_simple_show, .data = xe_pat_dump_sw_config },
+	{ "register-save-restore-check",
+		.show = xe_gt_debugfs_show_with_rpm, .data = register_save_restore_check },
 };
 
 /* everything else should be added here */
diff --git a/drivers/gpu/drm/xe/xe_reg_sr.c b/drivers/gpu/drm/xe/xe_reg_sr.c
index 1ac911fc6e94..75aa4426b3ec 100644
--- a/drivers/gpu/drm/xe/xe_reg_sr.c
+++ b/drivers/gpu/drm/xe/xe_reg_sr.c
@@ -208,3 +208,37 @@ void xe_reg_sr_dump(struct xe_reg_sr *sr, struct drm_printer *p)
 			   str_yes_no(entry->reg.masked),
 			   str_yes_no(entry->reg.mcr));
 }
+
+static u32 readback_reg(struct xe_gt *gt, struct xe_reg reg)
+{
+	struct xe_reg_mcr mcr_reg = to_xe_reg_mcr(reg);
+
+	if (reg.mcr)
+		return xe_gt_mcr_unicast_read_any(gt, mcr_reg);
+	else
+		return xe_mmio_read32(&gt->mmio, reg);
+}
+
+/**
+ * xe_reg_sr_readback_check() - Readback registers referenced in save/restore
+ *     entries and check whether the programming is in place.
+ * @sr: Save/restore entries
+ * @gt: GT to read register from
+ * @p: DRM printer to report discrepancies on
+ */
+void xe_reg_sr_readback_check(struct xe_reg_sr *sr,
+			      struct xe_gt *gt,
+			      struct drm_printer *p)
+{
+	struct xe_reg_sr_entry *entry;
+	unsigned long offset;
+
+	xa_for_each(&sr->xa, offset, entry) {
+		u32 val = readback_reg(gt, entry->reg);
+		u32 mask = entry->clr_bits | entry->set_bits;
+
+		if ((val & mask) != entry->set_bits)
+			drm_printf(p, "%#8lx & %#10x :: expected %#10x got %#10x\n",
+				   offset, mask, entry->set_bits, val & mask);
+	}
+}
diff --git a/drivers/gpu/drm/xe/xe_reg_sr.h b/drivers/gpu/drm/xe/xe_reg_sr.h
index 51fbba423e27..cd133a09aa9b 100644
--- a/drivers/gpu/drm/xe/xe_reg_sr.h
+++ b/drivers/gpu/drm/xe/xe_reg_sr.h
@@ -19,6 +19,9 @@ struct drm_printer;
 
 int xe_reg_sr_init(struct xe_reg_sr *sr, const char *name, struct xe_device *xe);
 void xe_reg_sr_dump(struct xe_reg_sr *sr, struct drm_printer *p);
+void xe_reg_sr_readback_check(struct xe_reg_sr *sr,
+			      struct xe_gt *gt,
+			      struct drm_printer *p);
 
 int xe_reg_sr_add(struct xe_reg_sr *sr, const struct xe_reg_sr_entry *e,
 		  struct xe_gt *gt);
-- 
2.53.0


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v3 3/4] drm/xe: Add facility to lookup the value of a register in a default LRC
  2026-02-13  0:09 [PATCH v3 0/4] Add debugfs facility to catch RTP mistakes Matt Roper
  2026-02-13  0:09 ` [PATCH v3 1/4] drm/xe/reg_sr: Don't process gt/hwe lists in VF Matt Roper
  2026-02-13  0:09 ` [PATCH v3 2/4] drm/xe/reg_sr: Add debugfs to verify status of reg_sr programming Matt Roper
@ 2026-02-13  0:09 ` Matt Roper
  2026-02-13  0:09 ` [PATCH v3 4/4] drm/xe/reg_sr: Allow register_save_restore_check debugfs to verify LRC values Matt Roper
                   ` (4 subsequent siblings)
  7 siblings, 0 replies; 10+ messages in thread
From: Matt Roper @ 2026-02-13  0:09 UTC (permalink / raw)
  To: intel-xe; +Cc: matthew.d.roper

An LRC is stored in memory as a special batchbuffer that hardware will
execute to re-load state when switching to the context; it's a
collection of register values (encoded as MI_LOAD_REGISTER_IMM commands)
and other state instructions (e.g., 3DSTATE_*).  The value that will be
loaded for a given register can be determined by parsing the batchbuffer
to find MI_LRI commands and extracting the value from the offset/value
pairs it contains.  Add functions to do this, which will be used in a
future patch to help verify that our expected reg_sr programming is in
place.

The implementation here returns the value as soon as it finds a match in
the LRC.  Technically a register could appear multiple times (either due
to memory corruption or a hardware defect) and the last value
encountered would be the one in effect when the context resumes
execution.  We can adjust the logic to keep looking and return the last
match instead of first in the future if we encounter real-world cases
where this would assist with debugging.

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/xe/xe_lrc.c | 96 +++++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_lrc.h |  4 ++
 2 files changed, 100 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index 38f648b98868..57ef4f527ed0 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -2155,6 +2155,102 @@ void xe_lrc_dump_default(struct drm_printer *p,
 	}
 }
 
+/*
+ * Lookup the value of a register within the offset/value pairs of an
+ * MI_LOAD_REGISTER_IMM instruction.
+ *
+ * Return -ENOENT if the register is not present in the MI_LRI instruction.
+ */
+static int lookup_reg_in_mi_lri(u32 offset, u32 *value,
+				const u32 *dword_pair, int num_regs)
+{
+	for (int i = 0; i < num_regs; i++) {
+		if (dword_pair[2 * i] == offset) {
+			*value = dword_pair[2 * i + 1];
+			return 0;
+		}
+	}
+
+	return -ENOENT;
+}
+
+/*
+ * Lookup the value of a register in a specific engine type's default LRC.
+ *
+ * Return -EINVAL if the default LRC doesn't exist, or ENOENT if the register
+ * cannot be found in the default LRC.
+ */
+int xe_lrc_lookup_default_reg_value(struct xe_gt *gt,
+				    enum xe_engine_class hwe_class,
+				    u32 offset,
+				    u32 *value)
+{
+	u32 *dw;
+	int remaining_dw, ret;
+
+	if (!gt->default_lrc[hwe_class])
+		return -EINVAL;
+
+	/*
+	 * Skip the beginning of the LRC since it contains the per-process
+	 * hardware status page.
+	 */
+	dw = gt->default_lrc[hwe_class] + LRC_PPHWSP_SIZE;
+	remaining_dw = (xe_gt_lrc_size(gt, hwe_class) - LRC_PPHWSP_SIZE) / 4;
+
+	while (remaining_dw > 0) {
+		u32 num_dw = instr_dw(*dw);
+
+		if (num_dw > remaining_dw)
+			num_dw = remaining_dw;
+
+		switch (*dw & XE_INSTR_CMD_TYPE) {
+		case XE_INSTR_MI:
+			switch (*dw & MI_OPCODE) {
+			case MI_BATCH_BUFFER_END:
+				/* End of LRC; register not found */
+				return -ENOENT;
+
+			case MI_NOOP:
+			case MI_TOPOLOGY_FILTER:
+				/*
+				 * MI_NOOP and MI_TOPOLOGY_FILTER don't have
+				 * a length field and are always 1-dword
+				 * instructions.
+				 */
+				remaining_dw--;
+				dw++;
+				break;
+
+			case MI_LOAD_REGISTER_IMM:
+				ret = lookup_reg_in_mi_lri(offset, value,
+							   dw + 1, (num_dw - 1) / 2);
+				if (ret == 0)
+					return 0;
+
+				fallthrough;
+
+			default:
+				/*
+				 * Jump to next instruction based on length
+				 * field.
+				 */
+				remaining_dw -= num_dw;
+				dw += num_dw;
+				break;
+			}
+			break;
+
+		default:
+			/* Jump to next instruction based on length field. */
+			remaining_dw -= num_dw;
+			dw += num_dw;
+		}
+	}
+
+	return -ENOENT;
+}
+
 struct instr_state {
 	u32 instr;
 	u16 num_dw;
diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h
index c307a3fd9ea2..3e500004f1ae 100644
--- a/drivers/gpu/drm/xe/xe_lrc.h
+++ b/drivers/gpu/drm/xe/xe_lrc.h
@@ -133,6 +133,10 @@ size_t xe_lrc_skip_size(struct xe_device *xe);
 void xe_lrc_dump_default(struct drm_printer *p,
 			 struct xe_gt *gt,
 			 enum xe_engine_class);
+int xe_lrc_lookup_default_reg_value(struct xe_gt *gt,
+				    enum xe_engine_class hwe_class,
+				    u32 offset,
+				    u32 *value);
 
 u32 *xe_lrc_emit_hwe_state_instructions(struct xe_exec_queue *q, u32 *cs);
 
-- 
2.53.0


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v3 4/4] drm/xe/reg_sr: Allow register_save_restore_check debugfs to verify LRC values
  2026-02-13  0:09 [PATCH v3 0/4] Add debugfs facility to catch RTP mistakes Matt Roper
                   ` (2 preceding siblings ...)
  2026-02-13  0:09 ` [PATCH v3 3/4] drm/xe: Add facility to lookup the value of a register in a default LRC Matt Roper
@ 2026-02-13  0:09 ` Matt Roper
  2026-02-13  0:16 ` ✓ CI.KUnit: success for Add debugfs facility to catch RTP mistakes (rev2) Patchwork
                   ` (3 subsequent siblings)
  7 siblings, 0 replies; 10+ messages in thread
From: Matt Roper @ 2026-02-13  0:09 UTC (permalink / raw)
  To: intel-xe; +Cc: matthew.d.roper

reg_sr programming that applies to an engines LRC cannot be verified by
a simple CPU-based register readout because the reg_sr's values may not
be in effect if no context is executing on the hardware at the time we
check.  Instead, we should verify correct reg_sr application by
searching for the register in the default_lrc.

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/xe/xe_gt_debugfs.c |  4 ++--
 drivers/gpu/drm/xe/xe_reg_sr.c     | 29 +++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_reg_sr.h     |  4 ++++
 3 files changed, 35 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_gt_debugfs.c b/drivers/gpu/drm/xe/xe_gt_debugfs.c
index aa43427a9f4b..f45306308cd6 100644
--- a/drivers/gpu/drm/xe/xe_gt_debugfs.c
+++ b/drivers/gpu/drm/xe/xe_gt_debugfs.c
@@ -173,8 +173,8 @@ static int register_save_restore_check(struct xe_gt *gt, struct drm_printer *p)
 	xe_reg_sr_readback_check(&gt->reg_sr, gt, p);
 	for_each_hw_engine(hwe, gt, id)
 		xe_reg_sr_readback_check(&hwe->reg_sr, gt, p);
-
-	/* TODO: Check hwe->reg_lrc against contents of default_lrc. */
+	for_each_hw_engine(hwe, gt, id)
+		xe_reg_sr_lrc_check(&hwe->reg_lrc, gt, hwe, p);
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/xe/xe_reg_sr.c b/drivers/gpu/drm/xe/xe_reg_sr.c
index 75aa4426b3ec..27a9447a672b 100644
--- a/drivers/gpu/drm/xe/xe_reg_sr.c
+++ b/drivers/gpu/drm/xe/xe_reg_sr.c
@@ -21,6 +21,7 @@
 #include "xe_gt_printk.h"
 #include "xe_gt_types.h"
 #include "xe_hw_engine_types.h"
+#include "xe_lrc.h"
 #include "xe_mmio.h"
 #include "xe_rtp_types.h"
 
@@ -242,3 +243,31 @@ void xe_reg_sr_readback_check(struct xe_reg_sr *sr,
 				   offset, mask, entry->set_bits, val & mask);
 	}
 }
+
+/**
+ * xe_reg_sr_lrc_check() - Check LRC for registers referenced in save/restore
+ *     entries and check whether the programming is in place.
+ * @sr: Save/restore entries
+ * @gt: GT to read register from
+ * @p: DRM printer to report discrepancies on
+ */
+void xe_reg_sr_lrc_check(struct xe_reg_sr *sr,
+			 struct xe_gt *gt,
+			 struct xe_hw_engine *hwe,
+			 struct drm_printer *p)
+{
+	struct xe_reg_sr_entry *entry;
+	unsigned long offset;
+
+	xa_for_each(&sr->xa, offset, entry) {
+		u32 val;
+		int ret = xe_lrc_lookup_default_reg_value(gt, hwe->class, offset, &val);
+		u32 mask = entry->clr_bits | entry->set_bits;
+
+		if (ret == -ENOENT)
+			drm_printf(p, "%#8lx :: not found in LRC for %s\n", offset, hwe->name);
+		else if ((val & mask) != entry->set_bits)
+			drm_printf(p, "%#8lx & %#10x :: expected %#10x got %#10x\n",
+				   offset, mask, entry->set_bits, val & mask);
+	}
+}
diff --git a/drivers/gpu/drm/xe/xe_reg_sr.h b/drivers/gpu/drm/xe/xe_reg_sr.h
index cd133a09aa9b..1ec6e8ecf278 100644
--- a/drivers/gpu/drm/xe/xe_reg_sr.h
+++ b/drivers/gpu/drm/xe/xe_reg_sr.h
@@ -22,6 +22,10 @@ void xe_reg_sr_dump(struct xe_reg_sr *sr, struct drm_printer *p);
 void xe_reg_sr_readback_check(struct xe_reg_sr *sr,
 			      struct xe_gt *gt,
 			      struct drm_printer *p);
+void xe_reg_sr_lrc_check(struct xe_reg_sr *sr,
+			 struct xe_gt *gt,
+			 struct xe_hw_engine *hwe,
+			 struct drm_printer *p);
 
 int xe_reg_sr_add(struct xe_reg_sr *sr, const struct xe_reg_sr_entry *e,
 		  struct xe_gt *gt);
-- 
2.53.0


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* ✓ CI.KUnit: success for Add debugfs facility to catch RTP mistakes (rev2)
  2026-02-13  0:09 [PATCH v3 0/4] Add debugfs facility to catch RTP mistakes Matt Roper
                   ` (3 preceding siblings ...)
  2026-02-13  0:09 ` [PATCH v3 4/4] drm/xe/reg_sr: Allow register_save_restore_check debugfs to verify LRC values Matt Roper
@ 2026-02-13  0:16 ` Patchwork
  2026-02-13  0:59 ` ✓ Xe.CI.BAT: " Patchwork
                   ` (2 subsequent siblings)
  7 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-02-13  0:16 UTC (permalink / raw)
  To: Matt Roper; +Cc: intel-xe

== Series Details ==

Series: Add debugfs facility to catch RTP mistakes (rev2)
URL   : https://patchwork.freedesktop.org/series/161517/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[00:14:47] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[00:14:51] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[00:15:22] Starting KUnit Kernel (1/1)...
[00:15:22] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[00:15:23] ================== guc_buf (11 subtests) ===================
[00:15:23] [PASSED] test_smallest
[00:15:23] [PASSED] test_largest
[00:15:23] [PASSED] test_granular
[00:15:23] [PASSED] test_unique
[00:15:23] [PASSED] test_overlap
[00:15:23] [PASSED] test_reusable
[00:15:23] [PASSED] test_too_big
[00:15:23] [PASSED] test_flush
[00:15:23] [PASSED] test_lookup
[00:15:23] [PASSED] test_data
[00:15:23] [PASSED] test_class
[00:15:23] ===================== [PASSED] guc_buf =====================
[00:15:23] =================== guc_dbm (7 subtests) ===================
[00:15:23] [PASSED] test_empty
[00:15:23] [PASSED] test_default
[00:15:23] ======================== test_size  ========================
[00:15:23] [PASSED] 4
[00:15:23] [PASSED] 8
[00:15:23] [PASSED] 32
[00:15:23] [PASSED] 256
[00:15:23] ==================== [PASSED] test_size ====================
[00:15:23] ======================= test_reuse  ========================
[00:15:23] [PASSED] 4
[00:15:23] [PASSED] 8
[00:15:23] [PASSED] 32
[00:15:23] [PASSED] 256
[00:15:23] =================== [PASSED] test_reuse ====================
[00:15:23] =================== test_range_overlap  ====================
[00:15:23] [PASSED] 4
[00:15:23] [PASSED] 8
[00:15:23] [PASSED] 32
[00:15:23] [PASSED] 256
[00:15:23] =============== [PASSED] test_range_overlap ================
[00:15:23] =================== test_range_compact  ====================
[00:15:23] [PASSED] 4
[00:15:23] [PASSED] 8
[00:15:23] [PASSED] 32
[00:15:23] [PASSED] 256
[00:15:23] =============== [PASSED] test_range_compact ================
[00:15:23] ==================== test_range_spare  =====================
[00:15:23] [PASSED] 4
[00:15:23] [PASSED] 8
[00:15:23] [PASSED] 32
[00:15:23] [PASSED] 256
[00:15:23] ================ [PASSED] test_range_spare =================
[00:15:23] ===================== [PASSED] guc_dbm =====================
[00:15:23] =================== guc_idm (6 subtests) ===================
[00:15:23] [PASSED] bad_init
[00:15:23] [PASSED] no_init
[00:15:23] [PASSED] init_fini
[00:15:23] [PASSED] check_used
[00:15:23] [PASSED] check_quota
[00:15:23] [PASSED] check_all
[00:15:23] ===================== [PASSED] guc_idm =====================
[00:15:23] ================== no_relay (3 subtests) ===================
[00:15:23] [PASSED] xe_drops_guc2pf_if_not_ready
[00:15:23] [PASSED] xe_drops_guc2vf_if_not_ready
[00:15:23] [PASSED] xe_rejects_send_if_not_ready
[00:15:23] ==================== [PASSED] no_relay =====================
[00:15:23] ================== pf_relay (14 subtests) ==================
[00:15:23] [PASSED] pf_rejects_guc2pf_too_short
[00:15:23] [PASSED] pf_rejects_guc2pf_too_long
[00:15:23] [PASSED] pf_rejects_guc2pf_no_payload
[00:15:23] [PASSED] pf_fails_no_payload
[00:15:23] [PASSED] pf_fails_bad_origin
[00:15:23] [PASSED] pf_fails_bad_type
[00:15:23] [PASSED] pf_txn_reports_error
[00:15:23] [PASSED] pf_txn_sends_pf2guc
[00:15:23] [PASSED] pf_sends_pf2guc
[00:15:23] [SKIPPED] pf_loopback_nop
[00:15:23] [SKIPPED] pf_loopback_echo
[00:15:23] [SKIPPED] pf_loopback_fail
[00:15:23] [SKIPPED] pf_loopback_busy
[00:15:23] [SKIPPED] pf_loopback_retry
[00:15:23] ==================== [PASSED] pf_relay =====================
[00:15:23] ================== vf_relay (3 subtests) ===================
[00:15:23] [PASSED] vf_rejects_guc2vf_too_short
[00:15:23] [PASSED] vf_rejects_guc2vf_too_long
[00:15:23] [PASSED] vf_rejects_guc2vf_no_payload
[00:15:23] ==================== [PASSED] vf_relay =====================
[00:15:23] ================ pf_gt_config (6 subtests) =================
[00:15:23] [PASSED] fair_contexts_1vf
[00:15:23] [PASSED] fair_doorbells_1vf
[00:15:23] [PASSED] fair_ggtt_1vf
[00:15:23] ====================== fair_contexts  ======================
[00:15:23] [PASSED] 1 VF
[00:15:23] [PASSED] 2 VFs
[00:15:23] [PASSED] 3 VFs
[00:15:23] [PASSED] 4 VFs
[00:15:23] [PASSED] 5 VFs
[00:15:23] [PASSED] 6 VFs
[00:15:23] [PASSED] 7 VFs
[00:15:23] [PASSED] 8 VFs
[00:15:23] [PASSED] 9 VFs
[00:15:23] [PASSED] 10 VFs
[00:15:23] [PASSED] 11 VFs
[00:15:23] [PASSED] 12 VFs
[00:15:23] [PASSED] 13 VFs
[00:15:23] [PASSED] 14 VFs
[00:15:23] [PASSED] 15 VFs
[00:15:23] [PASSED] 16 VFs
[00:15:23] [PASSED] 17 VFs
[00:15:23] [PASSED] 18 VFs
[00:15:23] [PASSED] 19 VFs
[00:15:23] [PASSED] 20 VFs
[00:15:23] [PASSED] 21 VFs
[00:15:23] [PASSED] 22 VFs
[00:15:23] [PASSED] 23 VFs
[00:15:23] [PASSED] 24 VFs
[00:15:23] [PASSED] 25 VFs
[00:15:23] [PASSED] 26 VFs
[00:15:23] [PASSED] 27 VFs
[00:15:23] [PASSED] 28 VFs
[00:15:23] [PASSED] 29 VFs
[00:15:23] [PASSED] 30 VFs
[00:15:23] [PASSED] 31 VFs
[00:15:23] [PASSED] 32 VFs
[00:15:23] [PASSED] 33 VFs
[00:15:23] [PASSED] 34 VFs
[00:15:23] [PASSED] 35 VFs
[00:15:23] [PASSED] 36 VFs
[00:15:23] [PASSED] 37 VFs
[00:15:23] [PASSED] 38 VFs
[00:15:23] [PASSED] 39 VFs
[00:15:23] [PASSED] 40 VFs
[00:15:23] [PASSED] 41 VFs
[00:15:23] [PASSED] 42 VFs
[00:15:23] [PASSED] 43 VFs
[00:15:23] [PASSED] 44 VFs
[00:15:23] [PASSED] 45 VFs
[00:15:23] [PASSED] 46 VFs
[00:15:23] [PASSED] 47 VFs
[00:15:23] [PASSED] 48 VFs
[00:15:23] [PASSED] 49 VFs
[00:15:23] [PASSED] 50 VFs
[00:15:23] [PASSED] 51 VFs
[00:15:23] [PASSED] 52 VFs
[00:15:23] [PASSED] 53 VFs
[00:15:23] [PASSED] 54 VFs
[00:15:23] [PASSED] 55 VFs
[00:15:23] [PASSED] 56 VFs
[00:15:23] [PASSED] 57 VFs
[00:15:23] [PASSED] 58 VFs
[00:15:23] [PASSED] 59 VFs
[00:15:23] [PASSED] 60 VFs
[00:15:23] [PASSED] 61 VFs
[00:15:23] [PASSED] 62 VFs
[00:15:23] [PASSED] 63 VFs
[00:15:23] ================== [PASSED] fair_contexts ==================
[00:15:23] ===================== fair_doorbells  ======================
[00:15:23] [PASSED] 1 VF
[00:15:23] [PASSED] 2 VFs
[00:15:23] [PASSED] 3 VFs
[00:15:23] [PASSED] 4 VFs
[00:15:23] [PASSED] 5 VFs
[00:15:23] [PASSED] 6 VFs
[00:15:23] [PASSED] 7 VFs
[00:15:23] [PASSED] 8 VFs
[00:15:23] [PASSED] 9 VFs
[00:15:23] [PASSED] 10 VFs
[00:15:23] [PASSED] 11 VFs
[00:15:23] [PASSED] 12 VFs
[00:15:23] [PASSED] 13 VFs
[00:15:23] [PASSED] 14 VFs
[00:15:23] [PASSED] 15 VFs
[00:15:23] [PASSED] 16 VFs
[00:15:23] [PASSED] 17 VFs
[00:15:23] [PASSED] 18 VFs
[00:15:23] [PASSED] 19 VFs
[00:15:23] [PASSED] 20 VFs
[00:15:23] [PASSED] 21 VFs
[00:15:23] [PASSED] 22 VFs
[00:15:23] [PASSED] 23 VFs
[00:15:23] [PASSED] 24 VFs
[00:15:23] [PASSED] 25 VFs
[00:15:23] [PASSED] 26 VFs
[00:15:23] [PASSED] 27 VFs
[00:15:23] [PASSED] 28 VFs
[00:15:23] [PASSED] 29 VFs
[00:15:23] [PASSED] 30 VFs
[00:15:23] [PASSED] 31 VFs
[00:15:23] [PASSED] 32 VFs
[00:15:23] [PASSED] 33 VFs
[00:15:23] [PASSED] 34 VFs
[00:15:23] [PASSED] 35 VFs
[00:15:23] [PASSED] 36 VFs
[00:15:23] [PASSED] 37 VFs
[00:15:23] [PASSED] 38 VFs
[00:15:23] [PASSED] 39 VFs
[00:15:23] [PASSED] 40 VFs
[00:15:23] [PASSED] 41 VFs
[00:15:23] [PASSED] 42 VFs
[00:15:23] [PASSED] 43 VFs
[00:15:23] [PASSED] 44 VFs
[00:15:23] [PASSED] 45 VFs
[00:15:23] [PASSED] 46 VFs
[00:15:23] [PASSED] 47 VFs
[00:15:23] [PASSED] 48 VFs
[00:15:23] [PASSED] 49 VFs
[00:15:23] [PASSED] 50 VFs
[00:15:23] [PASSED] 51 VFs
[00:15:23] [PASSED] 52 VFs
[00:15:23] [PASSED] 53 VFs
[00:15:23] [PASSED] 54 VFs
[00:15:23] [PASSED] 55 VFs
[00:15:23] [PASSED] 56 VFs
[00:15:23] [PASSED] 57 VFs
[00:15:23] [PASSED] 58 VFs
[00:15:23] [PASSED] 59 VFs
[00:15:23] [PASSED] 60 VFs
[00:15:23] [PASSED] 61 VFs
[00:15:23] [PASSED] 62 VFs
[00:15:23] [PASSED] 63 VFs
[00:15:23] ================= [PASSED] fair_doorbells ==================
[00:15:23] ======================== fair_ggtt  ========================
[00:15:23] [PASSED] 1 VF
[00:15:23] [PASSED] 2 VFs
[00:15:23] [PASSED] 3 VFs
[00:15:23] [PASSED] 4 VFs
[00:15:23] [PASSED] 5 VFs
[00:15:23] [PASSED] 6 VFs
[00:15:23] [PASSED] 7 VFs
[00:15:23] [PASSED] 8 VFs
[00:15:23] [PASSED] 9 VFs
[00:15:23] [PASSED] 10 VFs
[00:15:23] [PASSED] 11 VFs
[00:15:23] [PASSED] 12 VFs
[00:15:23] [PASSED] 13 VFs
[00:15:23] [PASSED] 14 VFs
[00:15:23] [PASSED] 15 VFs
[00:15:23] [PASSED] 16 VFs
[00:15:23] [PASSED] 17 VFs
[00:15:23] [PASSED] 18 VFs
[00:15:23] [PASSED] 19 VFs
[00:15:23] [PASSED] 20 VFs
[00:15:23] [PASSED] 21 VFs
[00:15:23] [PASSED] 22 VFs
[00:15:23] [PASSED] 23 VFs
[00:15:23] [PASSED] 24 VFs
[00:15:23] [PASSED] 25 VFs
[00:15:23] [PASSED] 26 VFs
[00:15:23] [PASSED] 27 VFs
[00:15:23] [PASSED] 28 VFs
[00:15:23] [PASSED] 29 VFs
[00:15:23] [PASSED] 30 VFs
[00:15:23] [PASSED] 31 VFs
[00:15:23] [PASSED] 32 VFs
[00:15:23] [PASSED] 33 VFs
[00:15:23] [PASSED] 34 VFs
[00:15:23] [PASSED] 35 VFs
[00:15:23] [PASSED] 36 VFs
[00:15:23] [PASSED] 37 VFs
[00:15:23] [PASSED] 38 VFs
[00:15:23] [PASSED] 39 VFs
[00:15:23] [PASSED] 40 VFs
[00:15:23] [PASSED] 41 VFs
[00:15:23] [PASSED] 42 VFs
[00:15:23] [PASSED] 43 VFs
[00:15:23] [PASSED] 44 VFs
[00:15:23] [PASSED] 45 VFs
[00:15:23] [PASSED] 46 VFs
[00:15:23] [PASSED] 47 VFs
[00:15:23] [PASSED] 48 VFs
[00:15:23] [PASSED] 49 VFs
[00:15:23] [PASSED] 50 VFs
[00:15:23] [PASSED] 51 VFs
[00:15:23] [PASSED] 52 VFs
[00:15:23] [PASSED] 53 VFs
[00:15:23] [PASSED] 54 VFs
[00:15:23] [PASSED] 55 VFs
[00:15:23] [PASSED] 56 VFs
[00:15:23] [PASSED] 57 VFs
[00:15:23] [PASSED] 58 VFs
[00:15:23] [PASSED] 59 VFs
[00:15:23] [PASSED] 60 VFs
[00:15:23] [PASSED] 61 VFs
[00:15:23] [PASSED] 62 VFs
[00:15:23] [PASSED] 63 VFs
[00:15:23] ==================== [PASSED] fair_ggtt ====================
[00:15:23] ================== [PASSED] pf_gt_config ===================
[00:15:23] ===================== lmtt (1 subtest) =====================
[00:15:23] ======================== test_ops  =========================
[00:15:23] [PASSED] 2-level
[00:15:23] [PASSED] multi-level
[00:15:23] ==================== [PASSED] test_ops =====================
[00:15:23] ====================== [PASSED] lmtt =======================
[00:15:23] ================= pf_service (11 subtests) =================
[00:15:23] [PASSED] pf_negotiate_any
[00:15:23] [PASSED] pf_negotiate_base_match
[00:15:23] [PASSED] pf_negotiate_base_newer
[00:15:23] [PASSED] pf_negotiate_base_next
[00:15:23] [SKIPPED] pf_negotiate_base_older
[00:15:23] [PASSED] pf_negotiate_base_prev
[00:15:23] [PASSED] pf_negotiate_latest_match
[00:15:23] [PASSED] pf_negotiate_latest_newer
[00:15:23] [PASSED] pf_negotiate_latest_next
[00:15:23] [SKIPPED] pf_negotiate_latest_older
[00:15:23] [SKIPPED] pf_negotiate_latest_prev
[00:15:23] =================== [PASSED] pf_service ====================
[00:15:23] ================= xe_guc_g2g (2 subtests) ==================
[00:15:23] ============== xe_live_guc_g2g_kunit_default  ==============
[00:15:23] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[00:15:23] ============== xe_live_guc_g2g_kunit_allmem  ===============
[00:15:23] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[00:15:23] =================== [SKIPPED] xe_guc_g2g ===================
[00:15:23] =================== xe_mocs (2 subtests) ===================
[00:15:23] ================ xe_live_mocs_kernel_kunit  ================
[00:15:23] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[00:15:23] ================ xe_live_mocs_reset_kunit  =================
[00:15:23] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[00:15:23] ==================== [SKIPPED] xe_mocs =====================
[00:15:23] ================= xe_migrate (2 subtests) ==================
[00:15:23] ================= xe_migrate_sanity_kunit  =================
[00:15:23] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[00:15:23] ================== xe_validate_ccs_kunit  ==================
[00:15:23] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[00:15:23] =================== [SKIPPED] xe_migrate ===================
[00:15:23] ================== xe_dma_buf (1 subtest) ==================
[00:15:23] ==================== xe_dma_buf_kunit  =====================
[00:15:23] ================ [SKIPPED] xe_dma_buf_kunit ================
[00:15:23] =================== [SKIPPED] xe_dma_buf ===================
[00:15:23] ================= xe_bo_shrink (1 subtest) =================
[00:15:23] =================== xe_bo_shrink_kunit  ====================
[00:15:23] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[00:15:23] ================== [SKIPPED] xe_bo_shrink ==================
[00:15:23] ==================== xe_bo (2 subtests) ====================
[00:15:23] ================== xe_ccs_migrate_kunit  ===================
[00:15:23] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[00:15:23] ==================== xe_bo_evict_kunit  ====================
[00:15:23] =============== [SKIPPED] xe_bo_evict_kunit ================
[00:15:23] ===================== [SKIPPED] xe_bo ======================
[00:15:23] ==================== args (13 subtests) ====================
[00:15:23] [PASSED] count_args_test
[00:15:23] [PASSED] call_args_example
[00:15:23] [PASSED] call_args_test
[00:15:23] [PASSED] drop_first_arg_example
[00:15:23] [PASSED] drop_first_arg_test
[00:15:23] [PASSED] first_arg_example
[00:15:23] [PASSED] first_arg_test
[00:15:23] [PASSED] last_arg_example
[00:15:23] [PASSED] last_arg_test
[00:15:23] [PASSED] pick_arg_example
[00:15:23] [PASSED] if_args_example
[00:15:23] [PASSED] if_args_test
[00:15:23] [PASSED] sep_comma_example
[00:15:23] ====================== [PASSED] args =======================
[00:15:23] =================== xe_pci (3 subtests) ====================
[00:15:23] ==================== check_graphics_ip  ====================
[00:15:23] [PASSED] 12.00 Xe_LP
[00:15:23] [PASSED] 12.10 Xe_LP+
[00:15:23] [PASSED] 12.55 Xe_HPG
[00:15:23] [PASSED] 12.60 Xe_HPC
[00:15:23] [PASSED] 12.70 Xe_LPG
[00:15:23] [PASSED] 12.71 Xe_LPG
[00:15:23] [PASSED] 12.74 Xe_LPG+
[00:15:23] [PASSED] 20.01 Xe2_HPG
[00:15:23] [PASSED] 20.02 Xe2_HPG
[00:15:23] [PASSED] 20.04 Xe2_LPG
[00:15:23] [PASSED] 30.00 Xe3_LPG
[00:15:23] [PASSED] 30.01 Xe3_LPG
[00:15:23] [PASSED] 30.03 Xe3_LPG
[00:15:23] [PASSED] 30.04 Xe3_LPG
[00:15:23] [PASSED] 30.05 Xe3_LPG
[00:15:23] [PASSED] 35.10 Xe3p_LPG
[00:15:23] [PASSED] 35.11 Xe3p_XPC
[00:15:23] ================ [PASSED] check_graphics_ip ================
[00:15:23] ===================== check_media_ip  ======================
[00:15:23] [PASSED] 12.00 Xe_M
[00:15:23] [PASSED] 12.55 Xe_HPM
[00:15:23] [PASSED] 13.00 Xe_LPM+
[00:15:23] [PASSED] 13.01 Xe2_HPM
[00:15:23] [PASSED] 20.00 Xe2_LPM
[00:15:23] [PASSED] 30.00 Xe3_LPM
[00:15:23] [PASSED] 30.02 Xe3_LPM
[00:15:23] [PASSED] 35.00 Xe3p_LPM
[00:15:23] [PASSED] 35.03 Xe3p_HPM
[00:15:23] ================= [PASSED] check_media_ip ==================
[00:15:23] =================== check_platform_desc  ===================
[00:15:23] [PASSED] 0x9A60 (TIGERLAKE)
[00:15:23] [PASSED] 0x9A68 (TIGERLAKE)
[00:15:23] [PASSED] 0x9A70 (TIGERLAKE)
[00:15:23] [PASSED] 0x9A40 (TIGERLAKE)
[00:15:23] [PASSED] 0x9A49 (TIGERLAKE)
[00:15:23] [PASSED] 0x9A59 (TIGERLAKE)
[00:15:23] [PASSED] 0x9A78 (TIGERLAKE)
[00:15:23] [PASSED] 0x9AC0 (TIGERLAKE)
[00:15:23] [PASSED] 0x9AC9 (TIGERLAKE)
[00:15:23] [PASSED] 0x9AD9 (TIGERLAKE)
[00:15:23] [PASSED] 0x9AF8 (TIGERLAKE)
[00:15:23] [PASSED] 0x4C80 (ROCKETLAKE)
[00:15:23] [PASSED] 0x4C8A (ROCKETLAKE)
[00:15:23] [PASSED] 0x4C8B (ROCKETLAKE)
[00:15:23] [PASSED] 0x4C8C (ROCKETLAKE)
[00:15:23] [PASSED] 0x4C90 (ROCKETLAKE)
[00:15:23] [PASSED] 0x4C9A (ROCKETLAKE)
[00:15:23] [PASSED] 0x4680 (ALDERLAKE_S)
[00:15:23] [PASSED] 0x4682 (ALDERLAKE_S)
[00:15:23] [PASSED] 0x4688 (ALDERLAKE_S)
[00:15:23] [PASSED] 0x468A (ALDERLAKE_S)
[00:15:23] [PASSED] 0x468B (ALDERLAKE_S)
[00:15:23] [PASSED] 0x4690 (ALDERLAKE_S)
[00:15:23] [PASSED] 0x4692 (ALDERLAKE_S)
[00:15:23] [PASSED] 0x4693 (ALDERLAKE_S)
[00:15:23] [PASSED] 0x46A0 (ALDERLAKE_P)
[00:15:23] [PASSED] 0x46A1 (ALDERLAKE_P)
[00:15:23] [PASSED] 0x46A2 (ALDERLAKE_P)
[00:15:23] [PASSED] 0x46A3 (ALDERLAKE_P)
[00:15:23] [PASSED] 0x46A6 (ALDERLAKE_P)
[00:15:23] [PASSED] 0x46A8 (ALDERLAKE_P)
[00:15:23] [PASSED] 0x46AA (ALDERLAKE_P)
[00:15:23] [PASSED] 0x462A (ALDERLAKE_P)
[00:15:23] [PASSED] 0x4626 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[00:15:23] [PASSED] 0x4628 (ALDERLAKE_P)
[00:15:23] [PASSED] 0x46B0 (ALDERLAKE_P)
[00:15:23] [PASSED] 0x46B1 (ALDERLAKE_P)
[00:15:23] [PASSED] 0x46B2 (ALDERLAKE_P)
[00:15:23] [PASSED] 0x46B3 (ALDERLAKE_P)
[00:15:23] [PASSED] 0x46C0 (ALDERLAKE_P)
[00:15:23] [PASSED] 0x46C1 (ALDERLAKE_P)
[00:15:23] [PASSED] 0x46C2 (ALDERLAKE_P)
[00:15:23] [PASSED] 0x46C3 (ALDERLAKE_P)
[00:15:23] [PASSED] 0x46D0 (ALDERLAKE_N)
[00:15:23] [PASSED] 0x46D1 (ALDERLAKE_N)
[00:15:23] [PASSED] 0x46D2 (ALDERLAKE_N)
[00:15:23] [PASSED] 0x46D3 (ALDERLAKE_N)
[00:15:23] [PASSED] 0x46D4 (ALDERLAKE_N)
[00:15:23] [PASSED] 0xA721 (ALDERLAKE_P)
[00:15:23] [PASSED] 0xA7A1 (ALDERLAKE_P)
[00:15:23] [PASSED] 0xA7A9 (ALDERLAKE_P)
[00:15:23] [PASSED] 0xA7AC (ALDERLAKE_P)
[00:15:23] [PASSED] 0xA7AD (ALDERLAKE_P)
[00:15:23] [PASSED] 0xA720 (ALDERLAKE_P)
[00:15:23] [PASSED] 0xA7A0 (ALDERLAKE_P)
[00:15:23] [PASSED] 0xA7A8 (ALDERLAKE_P)
[00:15:23] [PASSED] 0xA7AA (ALDERLAKE_P)
[00:15:23] [PASSED] 0xA7AB (ALDERLAKE_P)
[00:15:23] [PASSED] 0xA780 (ALDERLAKE_S)
[00:15:23] [PASSED] 0xA781 (ALDERLAKE_S)
[00:15:23] [PASSED] 0xA782 (ALDERLAKE_S)
[00:15:23] [PASSED] 0xA783 (ALDERLAKE_S)
[00:15:23] [PASSED] 0xA788 (ALDERLAKE_S)
[00:15:23] [PASSED] 0xA789 (ALDERLAKE_S)
[00:15:23] [PASSED] 0xA78A (ALDERLAKE_S)
[00:15:23] [PASSED] 0xA78B (ALDERLAKE_S)
[00:15:23] [PASSED] 0x4905 (DG1)
[00:15:23] [PASSED] 0x4906 (DG1)
[00:15:23] [PASSED] 0x4907 (DG1)
[00:15:23] [PASSED] 0x4908 (DG1)
[00:15:23] [PASSED] 0x4909 (DG1)
[00:15:23] [PASSED] 0x56C0 (DG2)
[00:15:23] [PASSED] 0x56C2 (DG2)
[00:15:23] [PASSED] 0x56C1 (DG2)
[00:15:23] [PASSED] 0x7D51 (METEORLAKE)
[00:15:23] [PASSED] 0x7DD1 (METEORLAKE)
[00:15:23] [PASSED] 0x7D41 (METEORLAKE)
[00:15:23] [PASSED] 0x7D67 (METEORLAKE)
[00:15:23] [PASSED] 0xB640 (METEORLAKE)
[00:15:23] [PASSED] 0x56A0 (DG2)
[00:15:23] [PASSED] 0x56A1 (DG2)
[00:15:23] [PASSED] 0x56A2 (DG2)
[00:15:23] [PASSED] 0x56BE (DG2)
[00:15:23] [PASSED] 0x56BF (DG2)
[00:15:23] [PASSED] 0x5690 (DG2)
[00:15:23] [PASSED] 0x5691 (DG2)
[00:15:23] [PASSED] 0x5692 (DG2)
[00:15:23] [PASSED] 0x56A5 (DG2)
[00:15:23] [PASSED] 0x56A6 (DG2)
[00:15:23] [PASSED] 0x56B0 (DG2)
[00:15:23] [PASSED] 0x56B1 (DG2)
[00:15:23] [PASSED] 0x56BA (DG2)
[00:15:23] [PASSED] 0x56BB (DG2)
[00:15:23] [PASSED] 0x56BC (DG2)
[00:15:23] [PASSED] 0x56BD (DG2)
[00:15:23] [PASSED] 0x5693 (DG2)
[00:15:23] [PASSED] 0x5694 (DG2)
[00:15:23] [PASSED] 0x5695 (DG2)
[00:15:23] [PASSED] 0x56A3 (DG2)
[00:15:23] [PASSED] 0x56A4 (DG2)
[00:15:23] [PASSED] 0x56B2 (DG2)
[00:15:23] [PASSED] 0x56B3 (DG2)
[00:15:23] [PASSED] 0x5696 (DG2)
[00:15:23] [PASSED] 0x5697 (DG2)
[00:15:23] [PASSED] 0xB69 (PVC)
[00:15:23] [PASSED] 0xB6E (PVC)
[00:15:23] [PASSED] 0xBD4 (PVC)
[00:15:23] [PASSED] 0xBD5 (PVC)
[00:15:23] [PASSED] 0xBD6 (PVC)
[00:15:23] [PASSED] 0xBD7 (PVC)
[00:15:23] [PASSED] 0xBD8 (PVC)
[00:15:23] [PASSED] 0xBD9 (PVC)
[00:15:23] [PASSED] 0xBDA (PVC)
[00:15:23] [PASSED] 0xBDB (PVC)
[00:15:23] [PASSED] 0xBE0 (PVC)
[00:15:23] [PASSED] 0xBE1 (PVC)
[00:15:23] [PASSED] 0xBE5 (PVC)
[00:15:23] [PASSED] 0x7D40 (METEORLAKE)
[00:15:23] [PASSED] 0x7D45 (METEORLAKE)
[00:15:23] [PASSED] 0x7D55 (METEORLAKE)
[00:15:23] [PASSED] 0x7D60 (METEORLAKE)
[00:15:23] [PASSED] 0x7DD5 (METEORLAKE)
[00:15:23] [PASSED] 0x6420 (LUNARLAKE)
[00:15:23] [PASSED] 0x64A0 (LUNARLAKE)
[00:15:23] [PASSED] 0x64B0 (LUNARLAKE)
[00:15:23] [PASSED] 0xE202 (BATTLEMAGE)
[00:15:23] [PASSED] 0xE209 (BATTLEMAGE)
[00:15:23] [PASSED] 0xE20B (BATTLEMAGE)
[00:15:23] [PASSED] 0xE20C (BATTLEMAGE)
[00:15:23] [PASSED] 0xE20D (BATTLEMAGE)
[00:15:23] [PASSED] 0xE210 (BATTLEMAGE)
[00:15:23] [PASSED] 0xE211 (BATTLEMAGE)
[00:15:23] [PASSED] 0xE212 (BATTLEMAGE)
[00:15:23] [PASSED] 0xE216 (BATTLEMAGE)
[00:15:23] [PASSED] 0xE220 (BATTLEMAGE)
[00:15:23] [PASSED] 0xE221 (BATTLEMAGE)
[00:15:23] [PASSED] 0xE222 (BATTLEMAGE)
[00:15:23] [PASSED] 0xE223 (BATTLEMAGE)
[00:15:23] [PASSED] 0xB080 (PANTHERLAKE)
[00:15:23] [PASSED] 0xB081 (PANTHERLAKE)
[00:15:23] [PASSED] 0xB082 (PANTHERLAKE)
[00:15:23] [PASSED] 0xB083 (PANTHERLAKE)
[00:15:23] [PASSED] 0xB084 (PANTHERLAKE)
[00:15:23] [PASSED] 0xB085 (PANTHERLAKE)
[00:15:23] [PASSED] 0xB086 (PANTHERLAKE)
[00:15:23] [PASSED] 0xB087 (PANTHERLAKE)
[00:15:23] [PASSED] 0xB08F (PANTHERLAKE)
[00:15:23] [PASSED] 0xB090 (PANTHERLAKE)
[00:15:23] [PASSED] 0xB0A0 (PANTHERLAKE)
[00:15:23] [PASSED] 0xB0B0 (PANTHERLAKE)
[00:15:23] [PASSED] 0xFD80 (PANTHERLAKE)
[00:15:23] [PASSED] 0xFD81 (PANTHERLAKE)
[00:15:23] [PASSED] 0xD740 (NOVALAKE_S)
[00:15:23] [PASSED] 0xD741 (NOVALAKE_S)
[00:15:23] [PASSED] 0xD742 (NOVALAKE_S)
[00:15:23] [PASSED] 0xD743 (NOVALAKE_S)
[00:15:23] [PASSED] 0xD744 (NOVALAKE_S)
[00:15:23] [PASSED] 0xD745 (NOVALAKE_S)
[00:15:23] [PASSED] 0x674C (CRESCENTISLAND)
[00:15:23] [PASSED] 0xD750 (NOVALAKE_P)
[00:15:23] [PASSED] 0xD751 (NOVALAKE_P)
[00:15:23] [PASSED] 0xD752 (NOVALAKE_P)
[00:15:23] [PASSED] 0xD753 (NOVALAKE_P)
[00:15:23] [PASSED] 0xD754 (NOVALAKE_P)
[00:15:23] [PASSED] 0xD755 (NOVALAKE_P)
[00:15:23] [PASSED] 0xD756 (NOVALAKE_P)
[00:15:23] [PASSED] 0xD757 (NOVALAKE_P)
[00:15:23] [PASSED] 0xD75F (NOVALAKE_P)
[00:15:23] =============== [PASSED] check_platform_desc ===============
[00:15:23] ===================== [PASSED] xe_pci ======================
[00:15:23] =================== xe_rtp (2 subtests) ====================
[00:15:23] =============== xe_rtp_process_to_sr_tests  ================
[00:15:23] [PASSED] coalesce-same-reg
[00:15:23] [PASSED] no-match-no-add
[00:15:23] [PASSED] match-or
[00:15:23] [PASSED] match-or-xfail
[00:15:23] [PASSED] no-match-no-add-multiple-rules
[00:15:23] [PASSED] two-regs-two-entries
[00:15:23] [PASSED] clr-one-set-other
[00:15:23] [PASSED] set-field
[00:15:23] [PASSED] conflict-duplicate
[00:15:23] [PASSED] conflict-not-disjoint
[00:15:23] [PASSED] conflict-reg-type
[00:15:23] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[00:15:23] ================== xe_rtp_process_tests  ===================
[00:15:23] [PASSED] active1
[00:15:23] [PASSED] active2
[00:15:23] [PASSED] active-inactive
[00:15:23] [PASSED] inactive-active
[00:15:23] [PASSED] inactive-1st_or_active-inactive
[00:15:23] [PASSED] inactive-2nd_or_active-inactive
[00:15:23] [PASSED] inactive-last_or_active-inactive
[00:15:23] [PASSED] inactive-no_or_active-inactive
[00:15:23] ============== [PASSED] xe_rtp_process_tests ===============
[00:15:23] ===================== [PASSED] xe_rtp ======================
[00:15:23] ==================== xe_wa (1 subtest) =====================
[00:15:23] ======================== xe_wa_gt  =========================
[00:15:23] [PASSED] TIGERLAKE B0
[00:15:23] [PASSED] DG1 A0
[00:15:23] [PASSED] DG1 B0
[00:15:23] [PASSED] ALDERLAKE_S A0
[00:15:23] [PASSED] ALDERLAKE_S B0
[00:15:23] [PASSED] ALDERLAKE_S C0
[00:15:23] [PASSED] ALDERLAKE_S D0
[00:15:23] [PASSED] ALDERLAKE_P A0
[00:15:23] [PASSED] ALDERLAKE_P B0
[00:15:23] [PASSED] ALDERLAKE_P C0
[00:15:23] [PASSED] ALDERLAKE_S RPLS D0
[00:15:23] [PASSED] ALDERLAKE_P RPLU E0
[00:15:23] [PASSED] DG2 G10 C0
[00:15:23] [PASSED] DG2 G11 B1
[00:15:23] [PASSED] DG2 G12 A1
[00:15:23] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[00:15:23] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[00:15:23] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[00:15:23] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[00:15:23] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[00:15:23] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[00:15:23] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[00:15:23] ==================== [PASSED] xe_wa_gt =====================
[00:15:23] ====================== [PASSED] xe_wa ======================
[00:15:23] ============================================================
[00:15:23] Testing complete. Ran 522 tests: passed: 504, skipped: 18
[00:15:23] Elapsed time: 36.329s total, 4.189s configuring, 31.623s building, 0.472s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[00:15:23] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[00:15:25] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[00:15:50] Starting KUnit Kernel (1/1)...
[00:15:50] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[00:15:51] ============ drm_test_pick_cmdline (2 subtests) ============
[00:15:51] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[00:15:51] =============== drm_test_pick_cmdline_named  ===============
[00:15:51] [PASSED] NTSC
[00:15:51] [PASSED] NTSC-J
[00:15:51] [PASSED] PAL
[00:15:51] [PASSED] PAL-M
[00:15:51] =========== [PASSED] drm_test_pick_cmdline_named ===========
[00:15:51] ============== [PASSED] drm_test_pick_cmdline ==============
[00:15:51] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[00:15:51] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[00:15:51] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[00:15:51] =========== drm_validate_clone_mode (2 subtests) ===========
[00:15:51] ============== drm_test_check_in_clone_mode  ===============
[00:15:51] [PASSED] in_clone_mode
[00:15:51] [PASSED] not_in_clone_mode
[00:15:51] ========== [PASSED] drm_test_check_in_clone_mode ===========
[00:15:51] =============== drm_test_check_valid_clones  ===============
[00:15:51] [PASSED] not_in_clone_mode
[00:15:51] [PASSED] valid_clone
[00:15:51] [PASSED] invalid_clone
[00:15:51] =========== [PASSED] drm_test_check_valid_clones ===========
[00:15:51] ============= [PASSED] drm_validate_clone_mode =============
[00:15:51] ============= drm_validate_modeset (1 subtest) =============
[00:15:51] [PASSED] drm_test_check_connector_changed_modeset
[00:15:51] ============== [PASSED] drm_validate_modeset ===============
[00:15:51] ====== drm_test_bridge_get_current_state (2 subtests) ======
[00:15:51] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[00:15:51] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[00:15:51] ======== [PASSED] drm_test_bridge_get_current_state ========
[00:15:51] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[00:15:51] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[00:15:51] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[00:15:51] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[00:15:51] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[00:15:51] ============== drm_bridge_alloc (2 subtests) ===============
[00:15:51] [PASSED] drm_test_drm_bridge_alloc_basic
[00:15:51] [PASSED] drm_test_drm_bridge_alloc_get_put
[00:15:51] ================ [PASSED] drm_bridge_alloc =================
[00:15:51] ============= drm_cmdline_parser (40 subtests) =============
[00:15:51] [PASSED] drm_test_cmdline_force_d_only
[00:15:51] [PASSED] drm_test_cmdline_force_D_only_dvi
[00:15:51] [PASSED] drm_test_cmdline_force_D_only_hdmi
[00:15:51] [PASSED] drm_test_cmdline_force_D_only_not_digital
[00:15:51] [PASSED] drm_test_cmdline_force_e_only
[00:15:51] [PASSED] drm_test_cmdline_res
[00:15:51] [PASSED] drm_test_cmdline_res_vesa
[00:15:51] [PASSED] drm_test_cmdline_res_vesa_rblank
[00:15:51] [PASSED] drm_test_cmdline_res_rblank
[00:15:51] [PASSED] drm_test_cmdline_res_bpp
[00:15:51] [PASSED] drm_test_cmdline_res_refresh
[00:15:51] [PASSED] drm_test_cmdline_res_bpp_refresh
[00:15:51] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[00:15:51] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[00:15:51] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[00:15:51] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[00:15:51] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[00:15:51] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[00:15:51] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[00:15:51] [PASSED] drm_test_cmdline_res_margins_force_on
[00:15:51] [PASSED] drm_test_cmdline_res_vesa_margins
[00:15:51] [PASSED] drm_test_cmdline_name
[00:15:51] [PASSED] drm_test_cmdline_name_bpp
[00:15:51] [PASSED] drm_test_cmdline_name_option
[00:15:51] [PASSED] drm_test_cmdline_name_bpp_option
[00:15:51] [PASSED] drm_test_cmdline_rotate_0
[00:15:51] [PASSED] drm_test_cmdline_rotate_90
[00:15:51] [PASSED] drm_test_cmdline_rotate_180
[00:15:51] [PASSED] drm_test_cmdline_rotate_270
[00:15:51] [PASSED] drm_test_cmdline_hmirror
[00:15:51] [PASSED] drm_test_cmdline_vmirror
[00:15:51] [PASSED] drm_test_cmdline_margin_options
[00:15:51] [PASSED] drm_test_cmdline_multiple_options
[00:15:51] [PASSED] drm_test_cmdline_bpp_extra_and_option
[00:15:51] [PASSED] drm_test_cmdline_extra_and_option
[00:15:51] [PASSED] drm_test_cmdline_freestanding_options
[00:15:51] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[00:15:51] [PASSED] drm_test_cmdline_panel_orientation
[00:15:51] ================ drm_test_cmdline_invalid  =================
[00:15:51] [PASSED] margin_only
[00:15:51] [PASSED] interlace_only
[00:15:51] [PASSED] res_missing_x
[00:15:51] [PASSED] res_missing_y
[00:15:51] [PASSED] res_bad_y
[00:15:51] [PASSED] res_missing_y_bpp
[00:15:51] [PASSED] res_bad_bpp
[00:15:51] [PASSED] res_bad_refresh
[00:15:51] [PASSED] res_bpp_refresh_force_on_off
[00:15:51] [PASSED] res_invalid_mode
[00:15:51] [PASSED] res_bpp_wrong_place_mode
[00:15:51] [PASSED] name_bpp_refresh
[00:15:51] [PASSED] name_refresh
[00:15:51] [PASSED] name_refresh_wrong_mode
[00:15:51] [PASSED] name_refresh_invalid_mode
[00:15:51] [PASSED] rotate_multiple
[00:15:51] [PASSED] rotate_invalid_val
[00:15:51] [PASSED] rotate_truncated
[00:15:51] [PASSED] invalid_option
[00:15:51] [PASSED] invalid_tv_option
[00:15:51] [PASSED] truncated_tv_option
[00:15:51] ============ [PASSED] drm_test_cmdline_invalid =============
[00:15:51] =============== drm_test_cmdline_tv_options  ===============
[00:15:51] [PASSED] NTSC
[00:15:51] [PASSED] NTSC_443
[00:15:51] [PASSED] NTSC_J
[00:15:51] [PASSED] PAL
[00:15:51] [PASSED] PAL_M
[00:15:51] [PASSED] PAL_N
[00:15:51] [PASSED] SECAM
[00:15:51] [PASSED] MONO_525
[00:15:51] [PASSED] MONO_625
[00:15:51] =========== [PASSED] drm_test_cmdline_tv_options ===========
[00:15:51] =============== [PASSED] drm_cmdline_parser ================
[00:15:51] ========== drmm_connector_hdmi_init (20 subtests) ==========
[00:15:51] [PASSED] drm_test_connector_hdmi_init_valid
[00:15:51] [PASSED] drm_test_connector_hdmi_init_bpc_8
[00:15:51] [PASSED] drm_test_connector_hdmi_init_bpc_10
[00:15:51] [PASSED] drm_test_connector_hdmi_init_bpc_12
[00:15:51] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[00:15:51] [PASSED] drm_test_connector_hdmi_init_bpc_null
[00:15:51] [PASSED] drm_test_connector_hdmi_init_formats_empty
[00:15:51] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[00:15:51] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[00:15:51] [PASSED] supported_formats=0x9 yuv420_allowed=1
[00:15:51] [PASSED] supported_formats=0x9 yuv420_allowed=0
[00:15:51] [PASSED] supported_formats=0x3 yuv420_allowed=1
[00:15:51] [PASSED] supported_formats=0x3 yuv420_allowed=0
[00:15:51] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[00:15:51] [PASSED] drm_test_connector_hdmi_init_null_ddc
[00:15:51] [PASSED] drm_test_connector_hdmi_init_null_product
[00:15:51] [PASSED] drm_test_connector_hdmi_init_null_vendor
[00:15:51] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[00:15:51] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[00:15:51] [PASSED] drm_test_connector_hdmi_init_product_valid
[00:15:51] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[00:15:51] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[00:15:51] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[00:15:51] ========= drm_test_connector_hdmi_init_type_valid  =========
[00:15:51] [PASSED] HDMI-A
[00:15:51] [PASSED] HDMI-B
[00:15:51] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[00:15:51] ======== drm_test_connector_hdmi_init_type_invalid  ========
[00:15:51] [PASSED] Unknown
[00:15:51] [PASSED] VGA
[00:15:51] [PASSED] DVI-I
[00:15:51] [PASSED] DVI-D
[00:15:51] [PASSED] DVI-A
[00:15:51] [PASSED] Composite
[00:15:51] [PASSED] SVIDEO
[00:15:51] [PASSED] LVDS
[00:15:51] [PASSED] Component
[00:15:51] [PASSED] DIN
[00:15:51] [PASSED] DP
[00:15:51] [PASSED] TV
[00:15:51] [PASSED] eDP
[00:15:51] [PASSED] Virtual
[00:15:51] [PASSED] DSI
[00:15:51] [PASSED] DPI
[00:15:51] [PASSED] Writeback
[00:15:51] [PASSED] SPI
[00:15:51] [PASSED] USB
[00:15:51] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[00:15:51] ============ [PASSED] drmm_connector_hdmi_init =============
[00:15:51] ============= drmm_connector_init (3 subtests) =============
[00:15:51] [PASSED] drm_test_drmm_connector_init
[00:15:51] [PASSED] drm_test_drmm_connector_init_null_ddc
[00:15:51] ========= drm_test_drmm_connector_init_type_valid  =========
[00:15:51] [PASSED] Unknown
[00:15:51] [PASSED] VGA
[00:15:51] [PASSED] DVI-I
[00:15:51] [PASSED] DVI-D
[00:15:51] [PASSED] DVI-A
[00:15:51] [PASSED] Composite
[00:15:51] [PASSED] SVIDEO
[00:15:51] [PASSED] LVDS
[00:15:51] [PASSED] Component
[00:15:51] [PASSED] DIN
[00:15:51] [PASSED] DP
[00:15:51] [PASSED] HDMI-A
[00:15:51] [PASSED] HDMI-B
[00:15:51] [PASSED] TV
[00:15:51] [PASSED] eDP
[00:15:51] [PASSED] Virtual
[00:15:51] [PASSED] DSI
[00:15:51] [PASSED] DPI
[00:15:51] [PASSED] Writeback
[00:15:51] [PASSED] SPI
[00:15:51] [PASSED] USB
[00:15:51] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[00:15:51] =============== [PASSED] drmm_connector_init ===============
[00:15:51] ========= drm_connector_dynamic_init (6 subtests) ==========
[00:15:51] [PASSED] drm_test_drm_connector_dynamic_init
[00:15:51] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[00:15:51] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[00:15:51] [PASSED] drm_test_drm_connector_dynamic_init_properties
[00:15:51] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[00:15:51] [PASSED] Unknown
[00:15:51] [PASSED] VGA
[00:15:51] [PASSED] DVI-I
[00:15:51] [PASSED] DVI-D
[00:15:51] [PASSED] DVI-A
[00:15:51] [PASSED] Composite
[00:15:51] [PASSED] SVIDEO
[00:15:51] [PASSED] LVDS
[00:15:51] [PASSED] Component
[00:15:51] [PASSED] DIN
[00:15:51] [PASSED] DP
[00:15:51] [PASSED] HDMI-A
[00:15:51] [PASSED] HDMI-B
[00:15:51] [PASSED] TV
[00:15:51] [PASSED] eDP
[00:15:51] [PASSED] Virtual
[00:15:51] [PASSED] DSI
[00:15:51] [PASSED] DPI
[00:15:51] [PASSED] Writeback
[00:15:51] [PASSED] SPI
[00:15:51] [PASSED] USB
[00:15:51] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[00:15:51] ======== drm_test_drm_connector_dynamic_init_name  =========
[00:15:51] [PASSED] Unknown
[00:15:51] [PASSED] VGA
[00:15:51] [PASSED] DVI-I
[00:15:51] [PASSED] DVI-D
[00:15:51] [PASSED] DVI-A
[00:15:51] [PASSED] Composite
[00:15:51] [PASSED] SVIDEO
[00:15:51] [PASSED] LVDS
[00:15:51] [PASSED] Component
[00:15:51] [PASSED] DIN
[00:15:51] [PASSED] DP
[00:15:51] [PASSED] HDMI-A
[00:15:51] [PASSED] HDMI-B
[00:15:51] [PASSED] TV
[00:15:51] [PASSED] eDP
[00:15:51] [PASSED] Virtual
[00:15:51] [PASSED] DSI
[00:15:51] [PASSED] DPI
[00:15:51] [PASSED] Writeback
[00:15:51] [PASSED] SPI
[00:15:51] [PASSED] USB
[00:15:51] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[00:15:51] =========== [PASSED] drm_connector_dynamic_init ============
[00:15:51] ==== drm_connector_dynamic_register_early (4 subtests) =====
[00:15:51] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[00:15:51] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[00:15:51] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[00:15:51] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[00:15:51] ====== [PASSED] drm_connector_dynamic_register_early =======
[00:15:51] ======= drm_connector_dynamic_register (7 subtests) ========
[00:15:51] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[00:15:51] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[00:15:51] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[00:15:51] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[00:15:51] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[00:15:51] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[00:15:51] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[00:15:51] ========= [PASSED] drm_connector_dynamic_register ==========
[00:15:51] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[00:15:51] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[00:15:51] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[00:15:51] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[00:15:51] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[00:15:51] ========== drm_test_get_tv_mode_from_name_valid  ===========
[00:15:51] [PASSED] NTSC
[00:15:51] [PASSED] NTSC-443
[00:15:51] [PASSED] NTSC-J
[00:15:51] [PASSED] PAL
[00:15:51] [PASSED] PAL-M
[00:15:51] [PASSED] PAL-N
[00:15:51] [PASSED] SECAM
[00:15:51] [PASSED] Mono
[00:15:51] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[00:15:51] [PASSED] drm_test_get_tv_mode_from_name_truncated
[00:15:51] ============ [PASSED] drm_get_tv_mode_from_name ============
[00:15:51] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[00:15:51] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[00:15:51] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[00:15:51] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[00:15:51] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[00:15:51] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[00:15:51] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[00:15:51] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[00:15:51] [PASSED] VIC 96
[00:15:51] [PASSED] VIC 97
[00:15:51] [PASSED] VIC 101
[00:15:51] [PASSED] VIC 102
[00:15:51] [PASSED] VIC 106
[00:15:51] [PASSED] VIC 107
[00:15:51] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[00:15:51] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[00:15:51] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[00:15:51] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[00:15:51] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[00:15:51] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[00:15:51] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[00:15:51] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[00:15:51] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[00:15:51] [PASSED] Automatic
[00:15:51] [PASSED] Full
[00:15:51] [PASSED] Limited 16:235
[00:15:51] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[00:15:51] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[00:15:51] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[00:15:51] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[00:15:51] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[00:15:51] [PASSED] RGB
[00:15:51] [PASSED] YUV 4:2:0
[00:15:51] [PASSED] YUV 4:2:2
[00:15:51] [PASSED] YUV 4:4:4
[00:15:51] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[00:15:51] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[00:15:51] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[00:15:51] ============= drm_damage_helper (21 subtests) ==============
[00:15:51] [PASSED] drm_test_damage_iter_no_damage
[00:15:51] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[00:15:51] [PASSED] drm_test_damage_iter_no_damage_src_moved
[00:15:51] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[00:15:51] [PASSED] drm_test_damage_iter_no_damage_not_visible
[00:15:51] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[00:15:51] [PASSED] drm_test_damage_iter_no_damage_no_fb
[00:15:51] [PASSED] drm_test_damage_iter_simple_damage
[00:15:51] [PASSED] drm_test_damage_iter_single_damage
[00:15:51] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[00:15:51] [PASSED] drm_test_damage_iter_single_damage_outside_src
[00:15:51] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[00:15:51] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[00:15:51] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[00:15:51] [PASSED] drm_test_damage_iter_single_damage_src_moved
[00:15:51] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[00:15:51] [PASSED] drm_test_damage_iter_damage
[00:15:51] [PASSED] drm_test_damage_iter_damage_one_intersect
[00:15:51] [PASSED] drm_test_damage_iter_damage_one_outside
[00:15:51] [PASSED] drm_test_damage_iter_damage_src_moved
[00:15:51] [PASSED] drm_test_damage_iter_damage_not_visible
[00:15:51] ================ [PASSED] drm_damage_helper ================
[00:15:51] ============== drm_dp_mst_helper (3 subtests) ==============
[00:15:51] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[00:15:51] [PASSED] Clock 154000 BPP 30 DSC disabled
[00:15:51] [PASSED] Clock 234000 BPP 30 DSC disabled
[00:15:51] [PASSED] Clock 297000 BPP 24 DSC disabled
[00:15:51] [PASSED] Clock 332880 BPP 24 DSC enabled
[00:15:51] [PASSED] Clock 324540 BPP 24 DSC enabled
[00:15:51] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[00:15:51] ============== drm_test_dp_mst_calc_pbn_div  ===============
[00:15:51] [PASSED] Link rate 2000000 lane count 4
[00:15:51] [PASSED] Link rate 2000000 lane count 2
[00:15:51] [PASSED] Link rate 2000000 lane count 1
[00:15:51] [PASSED] Link rate 1350000 lane count 4
[00:15:51] [PASSED] Link rate 1350000 lane count 2
[00:15:51] [PASSED] Link rate 1350000 lane count 1
[00:15:51] [PASSED] Link rate 1000000 lane count 4
[00:15:51] [PASSED] Link rate 1000000 lane count 2
[00:15:51] [PASSED] Link rate 1000000 lane count 1
[00:15:51] [PASSED] Link rate 810000 lane count 4
[00:15:51] [PASSED] Link rate 810000 lane count 2
[00:15:51] [PASSED] Link rate 810000 lane count 1
[00:15:51] [PASSED] Link rate 540000 lane count 4
[00:15:51] [PASSED] Link rate 540000 lane count 2
[00:15:51] [PASSED] Link rate 540000 lane count 1
[00:15:51] [PASSED] Link rate 270000 lane count 4
[00:15:51] [PASSED] Link rate 270000 lane count 2
[00:15:51] [PASSED] Link rate 270000 lane count 1
[00:15:51] [PASSED] Link rate 162000 lane count 4
[00:15:51] [PASSED] Link rate 162000 lane count 2
[00:15:51] [PASSED] Link rate 162000 lane count 1
[00:15:51] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[00:15:51] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[00:15:51] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[00:15:51] [PASSED] DP_POWER_UP_PHY with port number
[00:15:51] [PASSED] DP_POWER_DOWN_PHY with port number
[00:15:51] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[00:15:51] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[00:15:51] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[00:15:51] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[00:15:51] [PASSED] DP_QUERY_PAYLOAD with port number
[00:15:51] [PASSED] DP_QUERY_PAYLOAD with VCPI
[00:15:51] [PASSED] DP_REMOTE_DPCD_READ with port number
[00:15:51] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[00:15:51] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[00:15:51] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[00:15:51] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[00:15:51] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[00:15:51] [PASSED] DP_REMOTE_I2C_READ with port number
[00:15:51] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[00:15:51] [PASSED] DP_REMOTE_I2C_READ with transactions array
[00:15:51] [PASSED] DP_REMOTE_I2C_WRITE with port number
[00:15:51] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[00:15:51] [PASSED] DP_REMOTE_I2C_WRITE with data array
[00:15:51] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[00:15:51] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[00:15:51] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[00:15:51] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[00:15:51] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[00:15:51] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[00:15:51] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[00:15:51] ================ [PASSED] drm_dp_mst_helper ================
[00:15:51] ================== drm_exec (7 subtests) ===================
[00:15:51] [PASSED] sanitycheck
[00:15:51] [PASSED] test_lock
[00:15:51] [PASSED] test_lock_unlock
[00:15:51] [PASSED] test_duplicates
[00:15:51] [PASSED] test_prepare
[00:15:51] [PASSED] test_prepare_array
[00:15:51] [PASSED] test_multiple_loops
[00:15:51] ==================== [PASSED] drm_exec =====================
[00:15:51] =========== drm_format_helper_test (17 subtests) ===========
[00:15:51] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[00:15:51] [PASSED] single_pixel_source_buffer
[00:15:51] [PASSED] single_pixel_clip_rectangle
[00:15:51] [PASSED] well_known_colors
[00:15:51] [PASSED] destination_pitch
[00:15:51] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[00:15:51] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[00:15:51] [PASSED] single_pixel_source_buffer
[00:15:51] [PASSED] single_pixel_clip_rectangle
[00:15:51] [PASSED] well_known_colors
[00:15:51] [PASSED] destination_pitch
[00:15:51] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[00:15:51] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[00:15:51] [PASSED] single_pixel_source_buffer
[00:15:51] [PASSED] single_pixel_clip_rectangle
[00:15:51] [PASSED] well_known_colors
[00:15:51] [PASSED] destination_pitch
[00:15:51] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[00:15:51] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[00:15:51] [PASSED] single_pixel_source_buffer
[00:15:51] [PASSED] single_pixel_clip_rectangle
[00:15:51] [PASSED] well_known_colors
[00:15:51] [PASSED] destination_pitch
[00:15:51] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[00:15:51] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[00:15:51] [PASSED] single_pixel_source_buffer
[00:15:51] [PASSED] single_pixel_clip_rectangle
[00:15:51] [PASSED] well_known_colors
[00:15:51] [PASSED] destination_pitch
[00:15:51] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[00:15:51] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[00:15:51] [PASSED] single_pixel_source_buffer
[00:15:51] [PASSED] single_pixel_clip_rectangle
[00:15:51] [PASSED] well_known_colors
[00:15:51] [PASSED] destination_pitch
[00:15:51] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[00:15:51] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[00:15:51] [PASSED] single_pixel_source_buffer
[00:15:51] [PASSED] single_pixel_clip_rectangle
[00:15:51] [PASSED] well_known_colors
[00:15:51] [PASSED] destination_pitch
[00:15:51] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[00:15:51] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[00:15:51] [PASSED] single_pixel_source_buffer
[00:15:51] [PASSED] single_pixel_clip_rectangle
[00:15:51] [PASSED] well_known_colors
[00:15:51] [PASSED] destination_pitch
[00:15:51] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[00:15:51] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[00:15:51] [PASSED] single_pixel_source_buffer
[00:15:51] [PASSED] single_pixel_clip_rectangle
[00:15:51] [PASSED] well_known_colors
[00:15:51] [PASSED] destination_pitch
[00:15:51] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[00:15:51] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[00:15:51] [PASSED] single_pixel_source_buffer
[00:15:51] [PASSED] single_pixel_clip_rectangle
[00:15:51] [PASSED] well_known_colors
[00:15:51] [PASSED] destination_pitch
[00:15:51] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[00:15:51] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[00:15:51] [PASSED] single_pixel_source_buffer
[00:15:51] [PASSED] single_pixel_clip_rectangle
[00:15:51] [PASSED] well_known_colors
[00:15:51] [PASSED] destination_pitch
[00:15:51] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[00:15:51] ============== drm_test_fb_xrgb8888_to_mono  ===============
[00:15:51] [PASSED] single_pixel_source_buffer
[00:15:51] [PASSED] single_pixel_clip_rectangle
[00:15:51] [PASSED] well_known_colors
[00:15:51] [PASSED] destination_pitch
[00:15:51] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[00:15:51] ==================== drm_test_fb_swab  =====================
[00:15:51] [PASSED] single_pixel_source_buffer
[00:15:51] [PASSED] single_pixel_clip_rectangle
[00:15:51] [PASSED] well_known_colors
[00:15:51] [PASSED] destination_pitch
[00:15:51] ================ [PASSED] drm_test_fb_swab =================
[00:15:51] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[00:15:51] [PASSED] single_pixel_source_buffer
[00:15:51] [PASSED] single_pixel_clip_rectangle
[00:15:51] [PASSED] well_known_colors
[00:15:51] [PASSED] destination_pitch
[00:15:51] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[00:15:51] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[00:15:51] [PASSED] single_pixel_source_buffer
[00:15:51] [PASSED] single_pixel_clip_rectangle
[00:15:51] [PASSED] well_known_colors
[00:15:51] [PASSED] destination_pitch
[00:15:51] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[00:15:51] ================= drm_test_fb_clip_offset  =================
[00:15:51] [PASSED] pass through
[00:15:51] [PASSED] horizontal offset
[00:15:51] [PASSED] vertical offset
[00:15:51] [PASSED] horizontal and vertical offset
[00:15:51] [PASSED] horizontal offset (custom pitch)
[00:15:51] [PASSED] vertical offset (custom pitch)
[00:15:51] [PASSED] horizontal and vertical offset (custom pitch)
[00:15:51] ============= [PASSED] drm_test_fb_clip_offset =============
[00:15:51] =================== drm_test_fb_memcpy  ====================
[00:15:51] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[00:15:51] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[00:15:51] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[00:15:51] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[00:15:51] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[00:15:51] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[00:15:51] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[00:15:51] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[00:15:51] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[00:15:51] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[00:15:51] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[00:15:51] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[00:15:51] =============== [PASSED] drm_test_fb_memcpy ================
[00:15:51] ============= [PASSED] drm_format_helper_test ==============
[00:15:51] ================= drm_format (18 subtests) =================
[00:15:51] [PASSED] drm_test_format_block_width_invalid
[00:15:51] [PASSED] drm_test_format_block_width_one_plane
[00:15:51] [PASSED] drm_test_format_block_width_two_plane
[00:15:51] [PASSED] drm_test_format_block_width_three_plane
[00:15:51] [PASSED] drm_test_format_block_width_tiled
[00:15:51] [PASSED] drm_test_format_block_height_invalid
[00:15:51] [PASSED] drm_test_format_block_height_one_plane
[00:15:51] [PASSED] drm_test_format_block_height_two_plane
[00:15:51] [PASSED] drm_test_format_block_height_three_plane
[00:15:51] [PASSED] drm_test_format_block_height_tiled
[00:15:51] [PASSED] drm_test_format_min_pitch_invalid
[00:15:51] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[00:15:51] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[00:15:51] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[00:15:51] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[00:15:51] [PASSED] drm_test_format_min_pitch_two_plane
[00:15:51] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[00:15:51] [PASSED] drm_test_format_min_pitch_tiled
[00:15:51] =================== [PASSED] drm_format ====================
[00:15:51] ============== drm_framebuffer (10 subtests) ===============
[00:15:51] ========== drm_test_framebuffer_check_src_coords  ==========
[00:15:51] [PASSED] Success: source fits into fb
[00:15:51] [PASSED] Fail: overflowing fb with x-axis coordinate
[00:15:51] [PASSED] Fail: overflowing fb with y-axis coordinate
[00:15:51] [PASSED] Fail: overflowing fb with source width
[00:15:51] [PASSED] Fail: overflowing fb with source height
[00:15:51] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[00:15:51] [PASSED] drm_test_framebuffer_cleanup
[00:15:51] =============== drm_test_framebuffer_create  ===============
[00:15:51] [PASSED] ABGR8888 normal sizes
[00:15:51] [PASSED] ABGR8888 max sizes
[00:15:51] [PASSED] ABGR8888 pitch greater than min required
[00:15:51] [PASSED] ABGR8888 pitch less than min required
[00:15:51] [PASSED] ABGR8888 Invalid width
[00:15:51] [PASSED] ABGR8888 Invalid buffer handle
[00:15:51] [PASSED] No pixel format
[00:15:51] [PASSED] ABGR8888 Width 0
[00:15:51] [PASSED] ABGR8888 Height 0
[00:15:51] [PASSED] ABGR8888 Out of bound height * pitch combination
[00:15:51] [PASSED] ABGR8888 Large buffer offset
[00:15:51] [PASSED] ABGR8888 Buffer offset for inexistent plane
[00:15:51] [PASSED] ABGR8888 Invalid flag
[00:15:51] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[00:15:51] [PASSED] ABGR8888 Valid buffer modifier
[00:15:51] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[00:15:51] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[00:15:51] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[00:15:51] [PASSED] NV12 Normal sizes
[00:15:51] [PASSED] NV12 Max sizes
[00:15:51] [PASSED] NV12 Invalid pitch
[00:15:51] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[00:15:51] [PASSED] NV12 different  modifier per-plane
[00:15:51] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[00:15:51] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[00:15:51] [PASSED] NV12 Modifier for inexistent plane
[00:15:51] [PASSED] NV12 Handle for inexistent plane
[00:15:51] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[00:15:51] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[00:15:51] [PASSED] YVU420 Normal sizes
[00:15:51] [PASSED] YVU420 Max sizes
[00:15:51] [PASSED] YVU420 Invalid pitch
[00:15:51] [PASSED] YVU420 Different pitches
[00:15:51] [PASSED] YVU420 Different buffer offsets/pitches
[00:15:51] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[00:15:51] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[00:15:51] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[00:15:51] [PASSED] YVU420 Valid modifier
[00:15:51] [PASSED] YVU420 Different modifiers per plane
[00:15:51] [PASSED] YVU420 Modifier for inexistent plane
[00:15:51] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[00:15:51] [PASSED] X0L2 Normal sizes
[00:15:51] [PASSED] X0L2 Max sizes
[00:15:51] [PASSED] X0L2 Invalid pitch
[00:15:51] [PASSED] X0L2 Pitch greater than minimum required
[00:15:51] [PASSED] X0L2 Handle for inexistent plane
[00:15:51] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[00:15:51] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[00:15:51] [PASSED] X0L2 Valid modifier
[00:15:51] [PASSED] X0L2 Modifier for inexistent plane
[00:15:51] =========== [PASSED] drm_test_framebuffer_create ===========
[00:15:51] [PASSED] drm_test_framebuffer_free
[00:15:51] [PASSED] drm_test_framebuffer_init
[00:15:51] [PASSED] drm_test_framebuffer_init_bad_format
[00:15:51] [PASSED] drm_test_framebuffer_init_dev_mismatch
[00:15:51] [PASSED] drm_test_framebuffer_lookup
[00:15:51] [PASSED] drm_test_framebuffer_lookup_inexistent
[00:15:51] [PASSED] drm_test_framebuffer_modifiers_not_supported
[00:15:51] ================= [PASSED] drm_framebuffer =================
[00:15:51] ================ drm_gem_shmem (8 subtests) ================
[00:15:51] [PASSED] drm_gem_shmem_test_obj_create
[00:15:51] [PASSED] drm_gem_shmem_test_obj_create_private
[00:15:51] [PASSED] drm_gem_shmem_test_pin_pages
[00:15:51] [PASSED] drm_gem_shmem_test_vmap
[00:15:51] [PASSED] drm_gem_shmem_test_get_sg_table
[00:15:51] [PASSED] drm_gem_shmem_test_get_pages_sgt
[00:15:51] [PASSED] drm_gem_shmem_test_madvise
[00:15:51] [PASSED] drm_gem_shmem_test_purge
[00:15:51] ================== [PASSED] drm_gem_shmem ==================
[00:15:51] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[00:15:51] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[00:15:51] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[00:15:51] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[00:15:51] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[00:15:51] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[00:15:51] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[00:15:51] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[00:15:51] [PASSED] Automatic
[00:15:51] [PASSED] Full
[00:15:51] [PASSED] Limited 16:235
[00:15:51] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[00:15:51] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[00:15:51] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[00:15:51] [PASSED] drm_test_check_disable_connector
[00:15:51] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[00:15:51] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[00:15:51] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[00:15:51] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[00:15:51] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[00:15:51] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[00:15:51] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[00:15:51] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[00:15:51] [PASSED] drm_test_check_output_bpc_dvi
[00:15:51] [PASSED] drm_test_check_output_bpc_format_vic_1
[00:15:51] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[00:15:51] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[00:15:51] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[00:15:51] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[00:15:51] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[00:15:51] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[00:15:51] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[00:15:51] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[00:15:51] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[00:15:51] [PASSED] drm_test_check_broadcast_rgb_value
[00:15:51] [PASSED] drm_test_check_bpc_8_value
[00:15:51] [PASSED] drm_test_check_bpc_10_value
[00:15:51] [PASSED] drm_test_check_bpc_12_value
[00:15:51] [PASSED] drm_test_check_format_value
[00:15:51] [PASSED] drm_test_check_tmds_char_value
[00:15:51] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[00:15:51] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[00:15:51] [PASSED] drm_test_check_mode_valid
[00:15:51] [PASSED] drm_test_check_mode_valid_reject
[00:15:51] [PASSED] drm_test_check_mode_valid_reject_rate
[00:15:51] [PASSED] drm_test_check_mode_valid_reject_max_clock
[00:15:51] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[00:15:51] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[00:15:51] [PASSED] drm_test_check_infoframes
[00:15:51] [PASSED] drm_test_check_reject_avi_infoframe
[00:15:51] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[00:15:51] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[00:15:51] [PASSED] drm_test_check_reject_audio_infoframe
[00:15:51] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[00:15:51] ================= drm_managed (2 subtests) =================
[00:15:51] [PASSED] drm_test_managed_release_action
[00:15:51] [PASSED] drm_test_managed_run_action
[00:15:51] =================== [PASSED] drm_managed ===================
[00:15:51] =================== drm_mm (6 subtests) ====================
[00:15:51] [PASSED] drm_test_mm_init
[00:15:51] [PASSED] drm_test_mm_debug
[00:15:51] [PASSED] drm_test_mm_align32
[00:15:51] [PASSED] drm_test_mm_align64
[00:15:51] [PASSED] drm_test_mm_lowest
[00:15:51] [PASSED] drm_test_mm_highest
[00:15:51] ===================== [PASSED] drm_mm ======================
[00:15:51] ============= drm_modes_analog_tv (5 subtests) =============
[00:15:51] [PASSED] drm_test_modes_analog_tv_mono_576i
[00:15:51] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[00:15:51] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[00:15:51] [PASSED] drm_test_modes_analog_tv_pal_576i
[00:15:51] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[00:15:51] =============== [PASSED] drm_modes_analog_tv ===============
[00:15:51] ============== drm_plane_helper (2 subtests) ===============
[00:15:51] =============== drm_test_check_plane_state  ================
[00:15:51] [PASSED] clipping_simple
[00:15:51] [PASSED] clipping_rotate_reflect
[00:15:51] [PASSED] positioning_simple
[00:15:51] [PASSED] upscaling
[00:15:51] [PASSED] downscaling
[00:15:51] [PASSED] rounding1
[00:15:51] [PASSED] rounding2
[00:15:51] [PASSED] rounding3
[00:15:51] [PASSED] rounding4
[00:15:51] =========== [PASSED] drm_test_check_plane_state ============
[00:15:51] =========== drm_test_check_invalid_plane_state  ============
[00:15:51] [PASSED] positioning_invalid
[00:15:51] [PASSED] upscaling_invalid
[00:15:51] [PASSED] downscaling_invalid
[00:15:51] ======= [PASSED] drm_test_check_invalid_plane_state ========
[00:15:51] ================ [PASSED] drm_plane_helper =================
[00:15:51] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[00:15:51] ====== drm_test_connector_helper_tv_get_modes_check  =======
[00:15:51] [PASSED] None
[00:15:51] [PASSED] PAL
[00:15:51] [PASSED] NTSC
[00:15:51] [PASSED] Both, NTSC Default
[00:15:51] [PASSED] Both, PAL Default
[00:15:51] [PASSED] Both, NTSC Default, with PAL on command-line
[00:15:51] [PASSED] Both, PAL Default, with NTSC on command-line
[00:15:51] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[00:15:51] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[00:15:51] ================== drm_rect (9 subtests) ===================
[00:15:51] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[00:15:51] [PASSED] drm_test_rect_clip_scaled_not_clipped
[00:15:51] [PASSED] drm_test_rect_clip_scaled_clipped
[00:15:51] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[00:15:51] ================= drm_test_rect_intersect  =================
[00:15:51] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[00:15:51] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[00:15:51] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[00:15:51] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[00:15:51] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[00:15:51] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[00:15:51] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[00:15:51] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[00:15:51] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[00:15:51] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[00:15:51] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[00:15:51] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[00:15:51] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[00:15:51] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[00:15:51] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[00:15:51] ============= [PASSED] drm_test_rect_intersect =============
[00:15:51] ================ drm_test_rect_calc_hscale  ================
[00:15:51] [PASSED] normal use
[00:15:51] [PASSED] out of max range
[00:15:51] [PASSED] out of min range
[00:15:51] [PASSED] zero dst
[00:15:51] [PASSED] negative src
[00:15:51] [PASSED] negative dst
[00:15:51] ============ [PASSED] drm_test_rect_calc_hscale ============
[00:15:51] ================ drm_test_rect_calc_vscale  ================
[00:15:51] [PASSED] normal use
[00:15:51] [PASSED] out of max range
[00:15:51] [PASSED] out of min range
[00:15:51] [PASSED] zero dst
[00:15:51] [PASSED] negative src
[00:15:51] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[00:15:51] ============ [PASSED] drm_test_rect_calc_vscale ============
[00:15:51] ================== drm_test_rect_rotate  ===================
[00:15:51] [PASSED] reflect-x
[00:15:51] [PASSED] reflect-y
[00:15:51] [PASSED] rotate-0
[00:15:51] [PASSED] rotate-90
[00:15:51] [PASSED] rotate-180
[00:15:51] [PASSED] rotate-270
[00:15:51] ============== [PASSED] drm_test_rect_rotate ===============
[00:15:51] ================ drm_test_rect_rotate_inv  =================
[00:15:51] [PASSED] reflect-x
[00:15:51] [PASSED] reflect-y
[00:15:51] [PASSED] rotate-0
[00:15:51] [PASSED] rotate-90
[00:15:51] [PASSED] rotate-180
[00:15:51] [PASSED] rotate-270
[00:15:51] ============ [PASSED] drm_test_rect_rotate_inv =============
[00:15:51] ==================== [PASSED] drm_rect =====================
[00:15:51] ============ drm_sysfb_modeset_test (1 subtest) ============
[00:15:51] ============ drm_test_sysfb_build_fourcc_list  =============
[00:15:51] [PASSED] no native formats
[00:15:51] [PASSED] XRGB8888 as native format
[00:15:51] [PASSED] remove duplicates
[00:15:51] [PASSED] convert alpha formats
[00:15:51] [PASSED] random formats
[00:15:51] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[00:15:51] ============= [PASSED] drm_sysfb_modeset_test ==============
[00:15:51] ================== drm_fixp (2 subtests) ===================
[00:15:51] [PASSED] drm_test_int2fixp
[00:15:51] [PASSED] drm_test_sm2fixp
[00:15:51] ==================== [PASSED] drm_fixp =====================
[00:15:51] ============================================================
[00:15:51] Testing complete. Ran 621 tests: passed: 621
[00:15:51] Elapsed time: 27.489s total, 1.741s configuring, 25.581s building, 0.132s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[00:15:51] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[00:15:52] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[00:16:02] Starting KUnit Kernel (1/1)...
[00:16:02] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[00:16:02] ================= ttm_device (5 subtests) ==================
[00:16:02] [PASSED] ttm_device_init_basic
[00:16:02] [PASSED] ttm_device_init_multiple
[00:16:02] [PASSED] ttm_device_fini_basic
[00:16:02] [PASSED] ttm_device_init_no_vma_man
[00:16:02] ================== ttm_device_init_pools  ==================
[00:16:02] [PASSED] No DMA allocations, no DMA32 required
[00:16:02] [PASSED] DMA allocations, DMA32 required
[00:16:02] [PASSED] No DMA allocations, DMA32 required
[00:16:02] [PASSED] DMA allocations, no DMA32 required
[00:16:02] ============== [PASSED] ttm_device_init_pools ==============
[00:16:02] =================== [PASSED] ttm_device ====================
[00:16:02] ================== ttm_pool (8 subtests) ===================
[00:16:02] ================== ttm_pool_alloc_basic  ===================
[00:16:02] [PASSED] One page
[00:16:02] [PASSED] More than one page
[00:16:02] [PASSED] Above the allocation limit
[00:16:02] [PASSED] One page, with coherent DMA mappings enabled
[00:16:02] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[00:16:02] ============== [PASSED] ttm_pool_alloc_basic ===============
[00:16:02] ============== ttm_pool_alloc_basic_dma_addr  ==============
[00:16:02] [PASSED] One page
[00:16:02] [PASSED] More than one page
[00:16:02] [PASSED] Above the allocation limit
[00:16:02] [PASSED] One page, with coherent DMA mappings enabled
[00:16:02] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[00:16:02] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[00:16:02] [PASSED] ttm_pool_alloc_order_caching_match
[00:16:02] [PASSED] ttm_pool_alloc_caching_mismatch
[00:16:02] [PASSED] ttm_pool_alloc_order_mismatch
[00:16:02] [PASSED] ttm_pool_free_dma_alloc
[00:16:02] [PASSED] ttm_pool_free_no_dma_alloc
[00:16:02] [PASSED] ttm_pool_fini_basic
[00:16:02] ==================== [PASSED] ttm_pool =====================
[00:16:02] ================ ttm_resource (8 subtests) =================
[00:16:02] ================= ttm_resource_init_basic  =================
[00:16:02] [PASSED] Init resource in TTM_PL_SYSTEM
[00:16:02] [PASSED] Init resource in TTM_PL_VRAM
[00:16:02] [PASSED] Init resource in a private placement
[00:16:02] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[00:16:02] ============= [PASSED] ttm_resource_init_basic =============
[00:16:02] [PASSED] ttm_resource_init_pinned
[00:16:02] [PASSED] ttm_resource_fini_basic
[00:16:02] [PASSED] ttm_resource_manager_init_basic
[00:16:02] [PASSED] ttm_resource_manager_usage_basic
[00:16:02] [PASSED] ttm_resource_manager_set_used_basic
[00:16:02] [PASSED] ttm_sys_man_alloc_basic
[00:16:02] [PASSED] ttm_sys_man_free_basic
[00:16:02] ================== [PASSED] ttm_resource ===================
[00:16:02] =================== ttm_tt (15 subtests) ===================
[00:16:02] ==================== ttm_tt_init_basic  ====================
[00:16:02] [PASSED] Page-aligned size
[00:16:02] [PASSED] Extra pages requested
[00:16:02] ================ [PASSED] ttm_tt_init_basic ================
[00:16:02] [PASSED] ttm_tt_init_misaligned
[00:16:02] [PASSED] ttm_tt_fini_basic
[00:16:02] [PASSED] ttm_tt_fini_sg
[00:16:02] [PASSED] ttm_tt_fini_shmem
[00:16:02] [PASSED] ttm_tt_create_basic
[00:16:02] [PASSED] ttm_tt_create_invalid_bo_type
[00:16:02] [PASSED] ttm_tt_create_ttm_exists
[00:16:02] [PASSED] ttm_tt_create_failed
[00:16:02] [PASSED] ttm_tt_destroy_basic
[00:16:02] [PASSED] ttm_tt_populate_null_ttm
[00:16:02] [PASSED] ttm_tt_populate_populated_ttm
[00:16:02] [PASSED] ttm_tt_unpopulate_basic
[00:16:02] [PASSED] ttm_tt_unpopulate_empty_ttm
[00:16:02] [PASSED] ttm_tt_swapin_basic
[00:16:02] ===================== [PASSED] ttm_tt ======================
[00:16:02] =================== ttm_bo (14 subtests) ===================
[00:16:02] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[00:16:02] [PASSED] Cannot be interrupted and sleeps
[00:16:02] [PASSED] Cannot be interrupted, locks straight away
[00:16:02] [PASSED] Can be interrupted, sleeps
[00:16:02] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[00:16:02] [PASSED] ttm_bo_reserve_locked_no_sleep
[00:16:02] [PASSED] ttm_bo_reserve_no_wait_ticket
[00:16:02] [PASSED] ttm_bo_reserve_double_resv
[00:16:02] [PASSED] ttm_bo_reserve_interrupted
[00:16:02] [PASSED] ttm_bo_reserve_deadlock
[00:16:02] [PASSED] ttm_bo_unreserve_basic
[00:16:02] [PASSED] ttm_bo_unreserve_pinned
[00:16:02] [PASSED] ttm_bo_unreserve_bulk
[00:16:02] [PASSED] ttm_bo_fini_basic
[00:16:02] [PASSED] ttm_bo_fini_shared_resv
[00:16:02] [PASSED] ttm_bo_pin_basic
[00:16:02] [PASSED] ttm_bo_pin_unpin_resource
[00:16:02] [PASSED] ttm_bo_multiple_pin_one_unpin
[00:16:02] ===================== [PASSED] ttm_bo ======================
[00:16:02] ============== ttm_bo_validate (21 subtests) ===============
[00:16:02] ============== ttm_bo_init_reserved_sys_man  ===============
[00:16:02] [PASSED] Buffer object for userspace
[00:16:02] [PASSED] Kernel buffer object
[00:16:02] [PASSED] Shared buffer object
[00:16:02] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[00:16:02] ============== ttm_bo_init_reserved_mock_man  ==============
[00:16:02] [PASSED] Buffer object for userspace
[00:16:02] [PASSED] Kernel buffer object
[00:16:02] [PASSED] Shared buffer object
[00:16:02] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[00:16:02] [PASSED] ttm_bo_init_reserved_resv
[00:16:02] ================== ttm_bo_validate_basic  ==================
[00:16:02] [PASSED] Buffer object for userspace
[00:16:02] [PASSED] Kernel buffer object
[00:16:02] [PASSED] Shared buffer object
[00:16:02] ============== [PASSED] ttm_bo_validate_basic ==============
[00:16:02] [PASSED] ttm_bo_validate_invalid_placement
[00:16:02] ============= ttm_bo_validate_same_placement  ==============
[00:16:02] [PASSED] System manager
[00:16:02] [PASSED] VRAM manager
[00:16:02] ========= [PASSED] ttm_bo_validate_same_placement ==========
[00:16:02] [PASSED] ttm_bo_validate_failed_alloc
[00:16:02] [PASSED] ttm_bo_validate_pinned
[00:16:02] [PASSED] ttm_bo_validate_busy_placement
[00:16:02] ================ ttm_bo_validate_multihop  =================
[00:16:02] [PASSED] Buffer object for userspace
[00:16:02] [PASSED] Kernel buffer object
[00:16:02] [PASSED] Shared buffer object
[00:16:02] ============ [PASSED] ttm_bo_validate_multihop =============
[00:16:02] ========== ttm_bo_validate_no_placement_signaled  ==========
[00:16:02] [PASSED] Buffer object in system domain, no page vector
[00:16:02] [PASSED] Buffer object in system domain with an existing page vector
[00:16:02] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[00:16:02] ======== ttm_bo_validate_no_placement_not_signaled  ========
[00:16:02] [PASSED] Buffer object for userspace
[00:16:02] [PASSED] Kernel buffer object
[00:16:02] [PASSED] Shared buffer object
[00:16:02] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[00:16:02] [PASSED] ttm_bo_validate_move_fence_signaled
[00:16:02] ========= ttm_bo_validate_move_fence_not_signaled  =========
[00:16:02] [PASSED] Waits for GPU
[00:16:02] [PASSED] Tries to lock straight away
[00:16:02] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[00:16:02] [PASSED] ttm_bo_validate_happy_evict
[00:16:02] [PASSED] ttm_bo_validate_all_pinned_evict
[00:16:02] [PASSED] ttm_bo_validate_allowed_only_evict
[00:16:02] [PASSED] ttm_bo_validate_deleted_evict
[00:16:02] [PASSED] ttm_bo_validate_busy_domain_evict
[00:16:02] [PASSED] ttm_bo_validate_evict_gutting
[00:16:02] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[00:16:02] ================= [PASSED] ttm_bo_validate =================
[00:16:02] ============================================================
[00:16:02] Testing complete. Ran 101 tests: passed: 101
[00:16:02] Elapsed time: 11.556s total, 1.695s configuring, 9.595s building, 0.215s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel



^ permalink raw reply	[flat|nested] 10+ messages in thread

* ✓ Xe.CI.BAT: success for Add debugfs facility to catch RTP mistakes (rev2)
  2026-02-13  0:09 [PATCH v3 0/4] Add debugfs facility to catch RTP mistakes Matt Roper
                   ` (4 preceding siblings ...)
  2026-02-13  0:16 ` ✓ CI.KUnit: success for Add debugfs facility to catch RTP mistakes (rev2) Patchwork
@ 2026-02-13  0:59 ` Patchwork
  2026-02-14  1:07 ` ✗ Xe.CI.FULL: failure " Patchwork
  2026-02-23 17:40 ` [PATCH v3 0/4] Add debugfs facility to catch RTP mistakes Daniel Charles
  7 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-02-13  0:59 UTC (permalink / raw)
  To: Matt Roper; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 4641 bytes --]

== Series Details ==

Series: Add debugfs facility to catch RTP mistakes (rev2)
URL   : https://patchwork.freedesktop.org/series/161517/
State : success

== Summary ==

CI Bug Log - changes from xe-4551-8a3c5ed4673e2028f1fbfc55bdf121e0647f1ca2_BAT -> xe-pw-161517v2_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (11 -> 11)
------------------------------

  Additional (1): bat-dg2-oem2 
  Missing    (1): bat-bmg-3 

Known issues
------------

  Here are the changes found in xe-pw-161517v2_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][1] ([Intel XE#623])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161517v2/bat-dg2-oem2/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_dsc@dsc-basic:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][2] ([Intel XE#455])
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161517v2/bat-dg2-oem2/igt@kms_dsc@dsc-basic.html

  * igt@kms_psr@psr-cursor-plane-move:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][3] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +2 other tests skip
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161517v2/bat-dg2-oem2/igt@kms_psr@psr-cursor-plane-move.html

  * igt@sriov_basic@enable-vfs-autoprobe-off:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][4] ([Intel XE#1091] / [Intel XE#2849]) +1 other test skip
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161517v2/bat-dg2-oem2/igt@sriov_basic@enable-vfs-autoprobe-off.html

  * igt@xe_exec_fault_mode@twice-bindexecqueue-userptr:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][5] ([Intel XE#288]) +32 other tests skip
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161517v2/bat-dg2-oem2/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr.html

  * igt@xe_huc_copy@huc_copy:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][6] ([Intel XE#255])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161517v2/bat-dg2-oem2/igt@xe_huc_copy@huc_copy.html

  * igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][7] ([Intel XE#2229])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161517v2/bat-dg2-oem2/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html

  * igt@xe_pat@pat-index-xe2:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][8] ([Intel XE#977])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161517v2/bat-dg2-oem2/igt@xe_pat@pat-index-xe2.html

  * igt@xe_pat@pat-index-xehpc:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][9] ([Intel XE#2838] / [Intel XE#979])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161517v2/bat-dg2-oem2/igt@xe_pat@pat-index-xehpc.html

  * igt@xe_pat@pat-index-xelpg:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][10] ([Intel XE#979])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161517v2/bat-dg2-oem2/igt@xe_pat@pat-index-xelpg.html

  * igt@xe_sriov_flr@flr-vf1-clear:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][11] ([Intel XE#3342])
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161517v2/bat-dg2-oem2/igt@xe_sriov_flr@flr-vf1-clear.html

  
  [Intel XE#1091]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1091
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
  [Intel XE#255]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/255
  [Intel XE#2838]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2838
  [Intel XE#2849]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2849
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
  [Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
  [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
  [Intel XE#623]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/623
  [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
  [Intel XE#977]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/977
  [Intel XE#979]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/979


Build changes
-------------

  * Linux: xe-4551-8a3c5ed4673e2028f1fbfc55bdf121e0647f1ca2 -> xe-pw-161517v2

  IGT_8753: 8753
  xe-4551-8a3c5ed4673e2028f1fbfc55bdf121e0647f1ca2: 8a3c5ed4673e2028f1fbfc55bdf121e0647f1ca2
  xe-pw-161517v2: 161517v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161517v2/index.html

[-- Attachment #2: Type: text/html, Size: 5510 bytes --]

^ permalink raw reply	[flat|nested] 10+ messages in thread

* ✗ Xe.CI.FULL: failure for Add debugfs facility to catch RTP mistakes (rev2)
  2026-02-13  0:09 [PATCH v3 0/4] Add debugfs facility to catch RTP mistakes Matt Roper
                   ` (5 preceding siblings ...)
  2026-02-13  0:59 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-02-14  1:07 ` Patchwork
  2026-02-23 17:40 ` [PATCH v3 0/4] Add debugfs facility to catch RTP mistakes Daniel Charles
  7 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-02-14  1:07 UTC (permalink / raw)
  To: Matt Roper; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 9765 bytes --]

== Series Details ==

Series: Add debugfs facility to catch RTP mistakes (rev2)
URL   : https://patchwork.freedesktop.org/series/161517/
State : failure

== Summary ==

CI Bug Log - changes from xe-4551-8a3c5ed4673e2028f1fbfc55bdf121e0647f1ca2_FULL -> xe-pw-161517v2_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-161517v2_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-161517v2_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-161517v2_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@xe_pm@s4-basic:
    - shard-lnl:          [PASS][1] -> [DMESG-WARN][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4551-8a3c5ed4673e2028f1fbfc55bdf121e0647f1ca2/shard-lnl-4/igt@xe_pm@s4-basic.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161517v2/shard-lnl-5/igt@xe_pm@s4-basic.html

  
Known issues
------------

  Here are the changes found in xe-pw-161517v2_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [SKIP][3] ([Intel XE#2652] / [Intel XE#787]) +3 other tests skip
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161517v2/shard-bmg-6/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-dp-2.html

  * igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode:
    - shard-bmg:          NOTRUN -> [SKIP][4] ([Intel XE#2252])
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161517v2/shard-bmg-7/igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode.html

  * igt@kms_content_protection@lic-type-0-hdcp14@pipe-a-dp-1:
    - shard-bmg:          NOTRUN -> [FAIL][5] ([Intel XE#3304]) +1 other test fail
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161517v2/shard-bmg-5/igt@kms_content_protection@lic-type-0-hdcp14@pipe-a-dp-1.html

  * igt@kms_flip@flip-vs-expired-vblank@a-edp1:
    - shard-lnl:          [PASS][6] -> [FAIL][7] ([Intel XE#301]) +1 other test fail
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4551-8a3c5ed4673e2028f1fbfc55bdf121e0647f1ca2/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161517v2/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-bmg:          [PASS][8] -> [INCOMPLETE][9] ([Intel XE#2049] / [Intel XE#2597]) +1 other test incomplete
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4551-8a3c5ed4673e2028f1fbfc55bdf121e0647f1ca2/shard-bmg-5/igt@kms_flip@flip-vs-suspend-interruptible.html
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161517v2/shard-bmg-8/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_hdr@invalid-hdr:
    - shard-bmg:          [PASS][10] -> [SKIP][11] ([Intel XE#1503])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4551-8a3c5ed4673e2028f1fbfc55bdf121e0647f1ca2/shard-bmg-7/igt@kms_hdr@invalid-hdr.html
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161517v2/shard-bmg-4/igt@kms_hdr@invalid-hdr.html

  * igt@kms_setmode@basic:
    - shard-bmg:          [PASS][12] -> [FAIL][13] ([Intel XE#6361]) +3 other tests fail
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4551-8a3c5ed4673e2028f1fbfc55bdf121e0647f1ca2/shard-bmg-7/igt@kms_setmode@basic.html
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161517v2/shard-bmg-4/igt@kms_setmode@basic.html

  * igt@kms_vrr@cmrr@pipe-a-edp-1:
    - shard-lnl:          [PASS][14] -> [FAIL][15] ([Intel XE#4459]) +1 other test fail
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4551-8a3c5ed4673e2028f1fbfc55bdf121e0647f1ca2/shard-lnl-5/igt@kms_vrr@cmrr@pipe-a-edp-1.html
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161517v2/shard-lnl-1/igt@kms_vrr@cmrr@pipe-a-edp-1.html

  * igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma:
    - shard-lnl:          [PASS][16] -> [FAIL][17] ([Intel XE#5625])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4551-8a3c5ed4673e2028f1fbfc55bdf121e0647f1ca2/shard-lnl-1/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma.html
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161517v2/shard-lnl-5/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma.html

  * igt@xe_exec_threads@threads-multi-queue-fd-userptr-invalidate-race:
    - shard-bmg:          NOTRUN -> [SKIP][18] ([Intel XE#7138])
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161517v2/shard-bmg-7/igt@xe_exec_threads@threads-multi-queue-fd-userptr-invalidate-race.html

  
#### Possible fixes ####

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic:
    - shard-bmg:          [FAIL][19] ([Intel XE#6715]) -> [PASS][20]
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4551-8a3c5ed4673e2028f1fbfc55bdf121e0647f1ca2/shard-bmg-5/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161517v2/shard-bmg-6/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html

  * igt@xe_evict@evict-mixed-many-threads-small:
    - shard-bmg:          [INCOMPLETE][21] ([Intel XE#6321]) -> [PASS][22]
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4551-8a3c5ed4673e2028f1fbfc55bdf121e0647f1ca2/shard-bmg-9/igt@xe_evict@evict-mixed-many-threads-small.html
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161517v2/shard-bmg-5/igt@xe_evict@evict-mixed-many-threads-small.html

  * igt@xe_pm_residency@aspm_link_residency:
    - shard-bmg:          [SKIP][23] -> [PASS][24]
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4551-8a3c5ed4673e2028f1fbfc55bdf121e0647f1ca2/shard-bmg-6/igt@xe_pm_residency@aspm_link_residency.html
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161517v2/shard-bmg-1/igt@xe_pm_residency@aspm_link_residency.html

  
#### Warnings ####

  * igt@kms_cursor_legacy@short-flip-before-cursor-toggle:
    - shard-bmg:          [ABORT][25] ([Intel XE#2705] / [Intel XE#4760] / [Intel XE#7169]) -> [ABORT][26] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#4760] / [Intel XE#7169])
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4551-8a3c5ed4673e2028f1fbfc55bdf121e0647f1ca2/shard-bmg-1/igt@kms_cursor_legacy@short-flip-before-cursor-toggle.html
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161517v2/shard-bmg-8/igt@kms_cursor_legacy@short-flip-before-cursor-toggle.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][27] ([Intel XE#3544]) -> [SKIP][28] ([Intel XE#3374] / [Intel XE#3544])
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4551-8a3c5ed4673e2028f1fbfc55bdf121e0647f1ca2/shard-bmg-10/igt@kms_hdr@brightness-with-hdr.html
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161517v2/shard-bmg-7/igt@kms_hdr@brightness-with-hdr.html

  * igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv:
    - shard-bmg:          [ABORT][29] ([Intel XE#5466] / [Intel XE#6652]) -> [ABORT][30] ([Intel XE#5466])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4551-8a3c5ed4673e2028f1fbfc55bdf121e0647f1ca2/shard-bmg-2/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161517v2/shard-bmg-3/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html

  
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
  [Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#4459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4459
  [Intel XE#4760]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4760
  [Intel XE#5466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5466
  [Intel XE#5625]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5625
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6361
  [Intel XE#6652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6652
  [Intel XE#6715]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6715
  [Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
  [Intel XE#7169]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7169
  [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787


Build changes
-------------

  * Linux: xe-4551-8a3c5ed4673e2028f1fbfc55bdf121e0647f1ca2 -> xe-pw-161517v2

  IGT_8753: 8753
  xe-4551-8a3c5ed4673e2028f1fbfc55bdf121e0647f1ca2: 8a3c5ed4673e2028f1fbfc55bdf121e0647f1ca2
  xe-pw-161517v2: 161517v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161517v2/index.html

[-- Attachment #2: Type: text/html, Size: 11026 bytes --]

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v3 0/4] Add debugfs facility to catch RTP mistakes
  2026-02-13  0:09 [PATCH v3 0/4] Add debugfs facility to catch RTP mistakes Matt Roper
                   ` (6 preceding siblings ...)
  2026-02-14  1:07 ` ✗ Xe.CI.FULL: failure " Patchwork
@ 2026-02-23 17:40 ` Daniel Charles
  7 siblings, 0 replies; 10+ messages in thread
From: Daniel Charles @ 2026-02-23 17:40 UTC (permalink / raw)
  To: Matt Roper, intel-xe; +Cc: Michal Wajdeczko, Ashutosh Dixit


On 2/12/2026 4:09 PM, Matt Roper wrote:
> Unlike i915, Xe doesn't currently do any readback verification of
> workaround/tuning settings that it tries to program.  If an entry gets
> placed on the wrong table, or applied to the wrong platform/IP, the
> programming may be silently ineffective without anyone noticing.
>
> i915's solution of doing verification at application time was
> problematic because raising warnings during probe would be treated by CI
> as a fatal problem and would prevent CI from even attempting any other
> testing until the issue was dealt with.  Let's avoid that with Xe and
> instead perform the verification on-demand when a debugfs entry is read.
> This makes it very easy to do verification at various times during
> manual debugging.  It should also be simply to wrap a dedicated IGT test
> around the debugfs entry such that any unexpected failures are reported
> against that one test rather than bringing down the entire CI system.
>
> Note that verification of LRC programming is a bit more complicated than
> verification of GT/engine programming since we can't just blindly read
> the register values from the CPU and expect the RTP values to be in
> effect.  Applying LRC progamming ensures that every GPU context created
> should have the updated values in the LRC, and those values will get
> loaded into the register when the hardware context switches to it.
> However when no context is running on the hardware, the register values
> may revert to their hardware defaults which do not have the programming
> applied.  Instead, we should verify LRC programming by parsing the
> engine's 'default LRC' image and making sure the desired programming
> appears somewhere in one of the MI_LOAD_REGISTER_IMM state emission
> commands.
>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
>
> v2:
>   - Avoid processing RTP -> SR for gt/hwe lists in VF to ensure the
>     debugfs entry is safe to use in an SR-IOV VF.  (Ashutosh)
>   - Add verification of LRC adjustments by searching engine type's
>     default LRC.
>
> v3:
>   - Add missing checks to avoid SR-IOV VF processing of RTP -> SR in
>     hw_engine_setup_default_state() and
>     xe_reg_whitelist_process_engine().
>
> Matt Roper (4):
>    drm/xe/reg_sr: Don't process gt/hwe lists in VF
>    drm/xe/reg_sr: Add debugfs to verify status of reg_sr programming
>    drm/xe: Add facility to lookup the value of a register in a default
>      LRC
>    drm/xe/reg_sr: Allow register_save_restore_check debugfs to verify LRC
>      values

I reviewed the series and I have no further comments.

Reviewed-by: Daniel Charles <daniel.charles@intel.com>


>
>   drivers/gpu/drm/xe/xe_gt_debugfs.c    | 26 ++++++++
>   drivers/gpu/drm/xe/xe_hw_engine.c     |  3 +
>   drivers/gpu/drm/xe/xe_lrc.c           | 96 +++++++++++++++++++++++++++
>   drivers/gpu/drm/xe/xe_lrc.h           |  4 ++
>   drivers/gpu/drm/xe/xe_reg_sr.c        | 71 +++++++++++++++++++-
>   drivers/gpu/drm/xe/xe_reg_sr.h        |  7 ++
>   drivers/gpu/drm/xe/xe_reg_whitelist.c |  3 +
>   drivers/gpu/drm/xe/xe_tuning.c        |  7 ++
>   drivers/gpu/drm/xe/xe_wa.c            |  6 ++
>   9 files changed, 221 insertions(+), 2 deletions(-)
>

^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2026-02-23 17:40 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-02-13  0:09 [PATCH v3 0/4] Add debugfs facility to catch RTP mistakes Matt Roper
2026-02-13  0:09 ` [PATCH v3 1/4] drm/xe/reg_sr: Don't process gt/hwe lists in VF Matt Roper
2026-02-17 21:34   ` Dixit, Ashutosh
2026-02-13  0:09 ` [PATCH v3 2/4] drm/xe/reg_sr: Add debugfs to verify status of reg_sr programming Matt Roper
2026-02-13  0:09 ` [PATCH v3 3/4] drm/xe: Add facility to lookup the value of a register in a default LRC Matt Roper
2026-02-13  0:09 ` [PATCH v3 4/4] drm/xe/reg_sr: Allow register_save_restore_check debugfs to verify LRC values Matt Roper
2026-02-13  0:16 ` ✓ CI.KUnit: success for Add debugfs facility to catch RTP mistakes (rev2) Patchwork
2026-02-13  0:59 ` ✓ Xe.CI.BAT: " Patchwork
2026-02-14  1:07 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-02-23 17:40 ` [PATCH v3 0/4] Add debugfs facility to catch RTP mistakes Daniel Charles

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