From: Gustavo Sousa <gustavo.sousa@intel.com>
To: Matt Roper <matthew.d.roper@intel.com>, <intel-xe@lists.freedesktop.org>
Cc: Matt Roper <matthew.d.roper@intel.com>
Subject: Re: [PATCH 1/3] drm/xe/tuning: Stop applying CCCHKNREG1 tuning from Xe3p onward
Date: Mon, 13 Apr 2026 12:28:03 -0300 [thread overview]
Message-ID: <87mrz6op6k.fsf@intel.com> (raw)
In-Reply-To: <20260410-xe3p_tuning-v1-1-e206a62ee38f@intel.com>
Matt Roper <matthew.d.roper@intel.com> writes:
> Whereas the tuning guide gave guidance on adjusting various CCCHKNREG1
> on past platforms, starting from Xe3p the guidance is "Leave register at
> HW default settings." Set a version range upper bound of "34.99" so
> that the current programming will stop being applied on any Xe3p
> platforms that have graphics version 35.
>
> Bspec: 72161
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
> ---
> drivers/gpu/drm/xe/xe_tuning.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_tuning.c b/drivers/gpu/drm/xe/xe_tuning.c
> index f8de6a4bf189..ea48e2a60fcd 100644
> --- a/drivers/gpu/drm/xe/xe_tuning.c
> +++ b/drivers/gpu/drm/xe/xe_tuning.c
> @@ -43,7 +43,7 @@ static const struct xe_rtp_entry_sr gt_tunings[] = {
> REG_FIELD_PREP(L3_PWM_TIMER_INIT_VAL_MASK, 0x7f)))
> },
> { XE_RTP_NAME("Tuning: Compression Overfetch"),
> - XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, XE_RTP_END_VERSION_UNDEFINED),
> + XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 3499),
> FUNC(xe_rtp_match_has_flat_ccs)),
> XE_RTP_ACTIONS(CLR(CCCHKNREG1, ENCOMPPERFFIX),
> SET(CCCHKNREG1, L3CMPCTRL))
>
> --
> 2.53.0
next prev parent reply other threads:[~2026-04-13 15:28 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-10 22:50 [PATCH 0/3] Xe3p tuning and workaround fixes Matt Roper
2026-04-10 22:50 ` [PATCH 1/3] drm/xe/tuning: Stop applying CCCHKNREG1 tuning from Xe3p onward Matt Roper
2026-04-13 15:28 ` Gustavo Sousa [this message]
2026-04-10 22:50 ` [PATCH 2/3] drm/xe/tuning: Use proper register offset for GAMSTLB_CTRL Matt Roper
2026-04-13 15:36 ` Gustavo Sousa
2026-04-13 19:17 ` Matt Roper
2026-04-13 20:50 ` Gustavo Sousa
2026-04-10 22:50 ` [PATCH 3/3] drm/xe: Mark ROW_CHICKEN5 as a masked register Matt Roper
2026-04-13 15:44 ` Gustavo Sousa
2026-04-10 23:35 ` ✓ CI.KUnit: success for Xe3p tuning and workaround fixes Patchwork
2026-04-11 0:17 ` ✓ Xe.CI.BAT: " Patchwork
2026-04-11 10:51 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-04-13 19:42 ` Matt Roper
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