* [Intel-xe] [PATCH v5 1/2] drm/i915/lnl: possibility to enable FBC on first three planes
2023-09-22 13:30 [Intel-xe] [PATCH v5 0/2] fbc on any planes Vinod Govindapillai
@ 2023-09-22 13:30 ` Vinod Govindapillai
2023-09-22 13:30 ` [Intel-xe] [PATCH v5 2/2] drm/i915/lnl: update the supported plane formats with FBC Vinod Govindapillai
` (5 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Vinod Govindapillai @ 2023-09-22 13:30 UTC (permalink / raw)
To: intel-xe; +Cc: matthew.d.roper, intel-gfx, ville.syrjala
In LNL onwards, FBC can be associated to the first three planes.
FBC will be enabled on planes first come first served basis
until the userspace can select one of these FBC capable planes
explicitly.
v2:
- avoid fbc->state.plane check in intel_fbc_check_plane (Ville)
- simplify plane binding register writes (Matt)
- Update the subject to reflect that fbc can be enabled only in
the first three planes (Matt)
v3:
- use icl_is_hdr_plane(), use wrapper macro for plane binding
register access, comments update and patch split (Ville)
v4:
- update to the plane binding register access macro
Bspec: 69560
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
---
drivers/gpu/drm/i915/display/intel_fbc.c | 3 +++
drivers/gpu/drm/i915/display/skl_universal_plane.c | 9 ++++++---
drivers/gpu/drm/i915/i915_reg.h | 2 ++
3 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 7f70166f7035..aef5a4f6ad09 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -592,6 +592,9 @@ static u32 ivb_dpfc_ctl(struct intel_fbc *fbc)
if (IS_IVYBRIDGE(i915))
dpfc_ctl |= DPFC_CTL_PLANE_IVB(fbc_state->plane->i9xx_plane);
+ if (DISPLAY_VER(i915) >= 20)
+ dpfc_ctl |= DPFC_CTL_PLANE_BINDING(fbc_state->plane->id);
+
if (fbc_state->fence_id >= 0)
dpfc_ctl |= DPFC_CTL_FENCE_EN_IVB;
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 4d01c7ae4485..8f946c5a2fd8 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -1956,13 +1956,16 @@ static enum intel_fbc_id skl_fbc_id_for_pipe(enum pipe pipe)
return pipe - PIPE_A + INTEL_FBC_A;
}
-static bool skl_plane_has_fbc(struct drm_i915_private *dev_priv,
+static bool skl_plane_has_fbc(struct drm_i915_private *i915,
enum intel_fbc_id fbc_id, enum plane_id plane_id)
{
- if ((DISPLAY_RUNTIME_INFO(dev_priv)->fbc_mask & BIT(fbc_id)) == 0)
+ if ((DISPLAY_RUNTIME_INFO(i915)->fbc_mask & BIT(fbc_id)) == 0)
return false;
- return plane_id == PLANE_PRIMARY;
+ if (DISPLAY_VER(i915) >= 20)
+ return icl_is_hdr_plane(i915, plane_id);
+ else
+ return plane_id == PLANE_PRIMARY;
}
static struct intel_fbc *skl_plane_fbc(struct drm_i915_private *dev_priv,
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index aefad14ab27a..d44ac6f1c052 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1327,6 +1327,8 @@
#define DPFC_CTL_PLANE_IVB(i9xx_plane) REG_FIELD_PREP(DPFC_CTL_PLANE_MASK_IVB, (i9xx_plane))
#define DPFC_CTL_FENCE_EN_IVB REG_BIT(28) /* ivb+ */
#define DPFC_CTL_PERSISTENT_MODE REG_BIT(25) /* g4x-snb */
+#define DPFC_CTL_PLANE_BINDING_MASK REG_GENMASK(12, 11) /* lnl+ */
+#define DPFC_CTL_PLANE_BINDING(plane_id) REG_FIELD_PREP(DPFC_CTL_PLANE_BINDING_MASK, (plane_id))
#define DPFC_CTL_FALSE_COLOR REG_BIT(10) /* ivb+ */
#define DPFC_CTL_SR_EN REG_BIT(10) /* g4x only */
#define DPFC_CTL_SR_EXIT_DIS REG_BIT(9) /* g4x only */
--
2.34.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [Intel-xe] [PATCH v5 2/2] drm/i915/lnl: update the supported plane formats with FBC
2023-09-22 13:30 [Intel-xe] [PATCH v5 0/2] fbc on any planes Vinod Govindapillai
2023-09-22 13:30 ` [Intel-xe] [PATCH v5 1/2] drm/i915/lnl: possibility to enable FBC on first three planes Vinod Govindapillai
@ 2023-09-22 13:30 ` Vinod Govindapillai
2023-09-22 15:58 ` [Intel-xe] ✓ CI.Patch_applied: success for fbc on any planes Patchwork
` (4 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Vinod Govindapillai @ 2023-09-22 13:30 UTC (permalink / raw)
To: intel-xe; +Cc: matthew.d.roper, intel-gfx, ville.syrjala
FBC is supported with RGB32 8:8:8:8 with or without alpha
Bspec: 68904, 69560
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
---
drivers/gpu/drm/i915/display/intel_fbc.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index aef5a4f6ad09..9b19fe018bce 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -903,6 +903,11 @@ static bool pixel_format_is_valid(const struct intel_plane_state *plane_state)
if (IS_G4X(i915))
return false;
return true;
+ case DRM_FORMAT_ARGB8888:
+ case DRM_FORMAT_ABGR8888:
+ if (DISPLAY_VER(i915) >= 20)
+ return true;
+ fallthrough;
default:
return false;
}
@@ -1132,7 +1137,8 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
return 0;
}
- if (plane_state->hw.pixel_blend_mode != DRM_MODE_BLEND_PIXEL_NONE &&
+ if (DISPLAY_VER(i915) < 20 &&
+ plane_state->hw.pixel_blend_mode != DRM_MODE_BLEND_PIXEL_NONE &&
fb->format->has_alpha) {
plane_state->no_fbc_reason = "per-pixel alpha not supported";
return 0;
--
2.34.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [Intel-xe] ✓ CI.Patch_applied: success for fbc on any planes
2023-09-22 13:30 [Intel-xe] [PATCH v5 0/2] fbc on any planes Vinod Govindapillai
2023-09-22 13:30 ` [Intel-xe] [PATCH v5 1/2] drm/i915/lnl: possibility to enable FBC on first three planes Vinod Govindapillai
2023-09-22 13:30 ` [Intel-xe] [PATCH v5 2/2] drm/i915/lnl: update the supported plane formats with FBC Vinod Govindapillai
@ 2023-09-22 15:58 ` Patchwork
2023-09-22 15:58 ` [Intel-xe] ✗ CI.checkpatch: warning " Patchwork
` (3 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2023-09-22 15:58 UTC (permalink / raw)
To: Vinod Govindapillai; +Cc: intel-xe
== Series Details ==
Series: fbc on any planes
URL : https://patchwork.freedesktop.org/series/124116/
State : success
== Summary ==
=== Applying kernel patches on branch 'drm-xe-next' with base: ===
Base commit: 6149acb94 drm/xe: Implement fdinfo memory stats printing
=== git am output follows ===
Applying: drm/i915/lnl: possibility to enable FBC on first three planes
Applying: drm/i915/lnl: update the supported plane formats with FBC
^ permalink raw reply [flat|nested] 9+ messages in thread* [Intel-xe] ✗ CI.checkpatch: warning for fbc on any planes
2023-09-22 13:30 [Intel-xe] [PATCH v5 0/2] fbc on any planes Vinod Govindapillai
` (2 preceding siblings ...)
2023-09-22 15:58 ` [Intel-xe] ✓ CI.Patch_applied: success for fbc on any planes Patchwork
@ 2023-09-22 15:58 ` Patchwork
2023-09-22 15:59 ` [Intel-xe] ✓ CI.KUnit: success " Patchwork
` (2 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2023-09-22 15:58 UTC (permalink / raw)
To: Vinod Govindapillai; +Cc: intel-xe
== Series Details ==
Series: fbc on any planes
URL : https://patchwork.freedesktop.org/series/124116/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
63c2b6b160bca2df6efc7bc4cea6f442097d7854
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 1e9c8e979e7fcd154183a5e868325b0b6a447b3c
Author: Vinod Govindapillai <vinod.govindapillai@intel.com>
Date: Fri Sep 22 16:30:03 2023 +0300
drm/i915/lnl: update the supported plane formats with FBC
FBC is supported with RGB32 8:8:8:8 with or without alpha
Bspec: 68904, 69560
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
+ /mt/dim checkpatch 6149acb947f2f8b65ee1a058982a5d6fce3124ec drm-intel
687e8dafc drm/i915/lnl: possibility to enable FBC on first three planes
-:74: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#74: FILE: drivers/gpu/drm/i915/i915_reg.h:1331:
+#define DPFC_CTL_PLANE_BINDING(plane_id) REG_FIELD_PREP(DPFC_CTL_PLANE_BINDING_MASK, (plane_id))
total: 0 errors, 1 warnings, 0 checks, 36 lines checked
1e9c8e979 drm/i915/lnl: update the supported plane formats with FBC
^ permalink raw reply [flat|nested] 9+ messages in thread* [Intel-xe] ✓ CI.KUnit: success for fbc on any planes
2023-09-22 13:30 [Intel-xe] [PATCH v5 0/2] fbc on any planes Vinod Govindapillai
` (3 preceding siblings ...)
2023-09-22 15:58 ` [Intel-xe] ✗ CI.checkpatch: warning " Patchwork
@ 2023-09-22 15:59 ` Patchwork
2023-09-25 12:16 ` [Intel-xe] [PATCH v5 0/2] " Jani Nikula
2023-10-03 12:58 ` Ville Syrjälä
6 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2023-09-22 15:59 UTC (permalink / raw)
To: Vinod Govindapillai; +Cc: intel-xe
== Series Details ==
Series: fbc on any planes
URL : https://patchwork.freedesktop.org/series/124116/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
stty: 'standard input': Inappropriate ioctl for device
[15:58:34] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[15:58:38] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make ARCH=um O=.kunit --jobs=48
[15:58:58] Starting KUnit Kernel (1/1)...
[15:58:58] ============================================================
[15:58:58] ==================== xe_bo (2 subtests) ====================
[15:58:58] [SKIPPED] xe_ccs_migrate_kunit
[15:58:58] [SKIPPED] xe_bo_evict_kunit
[15:58:58] ===================== [SKIPPED] xe_bo ======================
[15:58:58] ================== xe_dma_buf (1 subtest) ==================
[15:58:58] [SKIPPED] xe_dma_buf_kunit
[15:58:58] =================== [SKIPPED] xe_dma_buf ===================
[15:58:58] ================== xe_migrate (1 subtest) ==================
[15:58:58] [SKIPPED] xe_migrate_sanity_kunit
[15:58:58] =================== [SKIPPED] xe_migrate ===================
[15:58:58] =================== xe_pci (2 subtests) ====================
[15:58:58] [PASSED] xe_gmdid_graphics_ip
[15:58:58] [PASSED] xe_gmdid_media_ip
[15:58:58] ===================== [PASSED] xe_pci ======================
[15:58:58] ==================== xe_rtp (1 subtest) ====================
[15:58:58] ================== xe_rtp_process_tests ===================
[15:58:58] [PASSED] coalesce-same-reg
[15:58:58] [PASSED] no-match-no-add
[15:58:58] [PASSED] no-match-no-add-multiple-rules
[15:58:58] [PASSED] two-regs-two-entries
[15:58:58] [PASSED] clr-one-set-other
[15:58:58] [PASSED] set-field
[15:58:58] [PASSED] conflict-duplicate
[15:58:58] [PASSED] conflict-not-disjoint
[15:58:58] [PASSED] conflict-reg-type
[15:58:58] ============== [PASSED] xe_rtp_process_tests ===============
[15:58:58] ===================== [PASSED] xe_rtp ======================
[15:58:58] ==================== xe_wa (1 subtest) =====================
[15:58:58] ======================== xe_wa_gt =========================
[15:58:58] [PASSED] TIGERLAKE (B0)
[15:58:58] [PASSED] DG1 (A0)
[15:58:58] [PASSED] DG1 (B0)
[15:58:58] [PASSED] ALDERLAKE_S (A0)
[15:58:58] [PASSED] ALDERLAKE_S (B0)
[15:58:58] [PASSED] ALDERLAKE_S (C0)
[15:58:58] [PASSED] ALDERLAKE_S (D0)
[15:58:58] [PASSED] ALDERLAKE_P (A0)
[15:58:58] [PASSED] ALDERLAKE_P (B0)
[15:58:58] [PASSED] ALDERLAKE_P (C0)
[15:58:58] [PASSED] DG2_G10 (A0)
[15:58:58] [PASSED] DG2_G10 (A1)
[15:58:58] [PASSED] DG2_G10 (B0)
[15:58:58] [PASSED] DG2_G10 (C0)
[15:58:58] [PASSED] DG2_G11 (A0)
[15:58:58] [PASSED] DG2_G11 (B0)
[15:58:58] [PASSED] DG2_G11 (B1)
[15:58:58] [PASSED] DG2_G12 (A0)
[15:58:58] [PASSED] DG2_G12 (A1)
[15:58:58] [PASSED] PVC (B0)
[15:58:58] [PASSED] PVC (B1)
[15:58:58] [PASSED] PVC (C0)
[15:58:58] ==================== [PASSED] xe_wa_gt =====================
[15:58:58] ====================== [PASSED] xe_wa ======================
[15:58:58] ============================================================
[15:58:58] Testing complete. Ran 37 tests: passed: 33, skipped: 4
[15:58:58] Elapsed time: 23.886s total, 4.191s configuring, 19.575s building, 0.095s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[15:58:58] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[15:59:00] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make ARCH=um O=.kunit --jobs=48
[15:59:19] Starting KUnit Kernel (1/1)...
[15:59:19] ============================================================
[15:59:19] ============ drm_test_pick_cmdline (2 subtests) ============
[15:59:19] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[15:59:19] =============== drm_test_pick_cmdline_named ===============
[15:59:19] [PASSED] NTSC
[15:59:19] [PASSED] NTSC-J
[15:59:19] [PASSED] PAL
[15:59:19] [PASSED] PAL-M
[15:59:19] =========== [PASSED] drm_test_pick_cmdline_named ===========
[15:59:19] ============== [PASSED] drm_test_pick_cmdline ==============
[15:59:19] ================== drm_buddy (6 subtests) ==================
[15:59:19] [PASSED] drm_test_buddy_alloc_limit
[15:59:19] [PASSED] drm_test_buddy_alloc_range
[15:59:19] [PASSED] drm_test_buddy_alloc_optimistic
[15:59:19] [PASSED] drm_test_buddy_alloc_pessimistic
[15:59:19] [PASSED] drm_test_buddy_alloc_smoke
[15:59:19] [PASSED] drm_test_buddy_alloc_pathological
[15:59:19] ==================== [PASSED] drm_buddy ====================
[15:59:19] ============= drm_cmdline_parser (40 subtests) =============
[15:59:19] [PASSED] drm_test_cmdline_force_d_only
[15:59:19] [PASSED] drm_test_cmdline_force_D_only_dvi
[15:59:19] [PASSED] drm_test_cmdline_force_D_only_hdmi
[15:59:19] [PASSED] drm_test_cmdline_force_D_only_not_digital
[15:59:19] [PASSED] drm_test_cmdline_force_e_only
[15:59:19] [PASSED] drm_test_cmdline_res
[15:59:19] [PASSED] drm_test_cmdline_res_vesa
[15:59:19] [PASSED] drm_test_cmdline_res_vesa_rblank
[15:59:19] [PASSED] drm_test_cmdline_res_rblank
[15:59:19] [PASSED] drm_test_cmdline_res_bpp
[15:59:19] [PASSED] drm_test_cmdline_res_refresh
[15:59:19] [PASSED] drm_test_cmdline_res_bpp_refresh
[15:59:19] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[15:59:19] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[15:59:19] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[15:59:19] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[15:59:19] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[15:59:19] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[15:59:19] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[15:59:19] [PASSED] drm_test_cmdline_res_margins_force_on
[15:59:19] [PASSED] drm_test_cmdline_res_vesa_margins
[15:59:19] [PASSED] drm_test_cmdline_name
[15:59:19] [PASSED] drm_test_cmdline_name_bpp
[15:59:19] [PASSED] drm_test_cmdline_name_option
[15:59:19] [PASSED] drm_test_cmdline_name_bpp_option
[15:59:19] [PASSED] drm_test_cmdline_rotate_0
[15:59:19] [PASSED] drm_test_cmdline_rotate_90
[15:59:19] [PASSED] drm_test_cmdline_rotate_180
[15:59:19] [PASSED] drm_test_cmdline_rotate_270
[15:59:19] [PASSED] drm_test_cmdline_hmirror
[15:59:19] [PASSED] drm_test_cmdline_vmirror
[15:59:19] [PASSED] drm_test_cmdline_margin_options
[15:59:19] [PASSED] drm_test_cmdline_multiple_options
[15:59:19] [PASSED] drm_test_cmdline_bpp_extra_and_option
[15:59:19] [PASSED] drm_test_cmdline_extra_and_option
[15:59:19] [PASSED] drm_test_cmdline_freestanding_options
[15:59:19] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[15:59:19] [PASSED] drm_test_cmdline_panel_orientation
[15:59:19] ================ drm_test_cmdline_invalid =================
[15:59:19] [PASSED] margin_only
[15:59:19] [PASSED] interlace_only
[15:59:19] [PASSED] res_missing_x
[15:59:19] [PASSED] res_missing_y
[15:59:19] [PASSED] res_bad_y
[15:59:19] [PASSED] res_missing_y_bpp
[15:59:19] [PASSED] res_bad_bpp
[15:59:19] [PASSED] res_bad_refresh
[15:59:19] [PASSED] res_bpp_refresh_force_on_off
[15:59:19] [PASSED] res_invalid_mode
[15:59:19] [PASSED] res_bpp_wrong_place_mode
[15:59:19] [PASSED] name_bpp_refresh
[15:59:19] [PASSED] name_refresh
[15:59:19] [PASSED] name_refresh_wrong_mode
[15:59:19] [PASSED] name_refresh_invalid_mode
[15:59:19] [PASSED] rotate_multiple
[15:59:19] [PASSED] rotate_invalid_val
[15:59:19] [PASSED] rotate_truncated
[15:59:19] [PASSED] invalid_option
[15:59:19] [PASSED] invalid_tv_option
[15:59:19] [PASSED] truncated_tv_option
[15:59:19] ============ [PASSED] drm_test_cmdline_invalid =============
[15:59:19] =============== drm_test_cmdline_tv_options ===============
[15:59:19] [PASSED] NTSC
[15:59:19] [PASSED] NTSC_443
[15:59:19] [PASSED] NTSC_J
[15:59:19] [PASSED] PAL
[15:59:19] [PASSED] PAL_M
[15:59:19] [PASSED] PAL_N
[15:59:19] [PASSED] SECAM
[15:59:19] =========== [PASSED] drm_test_cmdline_tv_options ===========
[15:59:19] =============== [PASSED] drm_cmdline_parser ================
[15:59:19] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[15:59:19] ========== drm_test_get_tv_mode_from_name_valid ===========
[15:59:19] [PASSED] NTSC
[15:59:19] [PASSED] NTSC-443
[15:59:19] [PASSED] NTSC-J
[15:59:19] [PASSED] PAL
[15:59:19] [PASSED] PAL-M
[15:59:19] [PASSED] PAL-N
[15:59:19] [PASSED] SECAM
[15:59:19] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[15:59:19] [PASSED] drm_test_get_tv_mode_from_name_truncated
[15:59:19] ============ [PASSED] drm_get_tv_mode_from_name ============
[15:59:19] ============= drm_damage_helper (21 subtests) ==============
[15:59:19] [PASSED] drm_test_damage_iter_no_damage
[15:59:19] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[15:59:19] [PASSED] drm_test_damage_iter_no_damage_src_moved
[15:59:19] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[15:59:19] [PASSED] drm_test_damage_iter_no_damage_not_visible
[15:59:19] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[15:59:19] [PASSED] drm_test_damage_iter_no_damage_no_fb
[15:59:19] [PASSED] drm_test_damage_iter_simple_damage
[15:59:19] [PASSED] drm_test_damage_iter_single_damage
[15:59:19] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[15:59:19] [PASSED] drm_test_damage_iter_single_damage_outside_src
[15:59:19] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[15:59:19] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[15:59:19] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[15:59:19] [PASSED] drm_test_damage_iter_single_damage_src_moved
[15:59:19] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[15:59:19] [PASSED] drm_test_damage_iter_damage
[15:59:19] [PASSED] drm_test_damage_iter_damage_one_intersect
[15:59:19] [PASSED] drm_test_damage_iter_damage_one_outside
[15:59:19] [PASSED] drm_test_damage_iter_damage_src_moved
[15:59:19] [PASSED] drm_test_damage_iter_damage_not_visible
[15:59:19] ================ [PASSED] drm_damage_helper ================
[15:59:19] ============== drm_dp_mst_helper (2 subtests) ==============
[15:59:19] ============== drm_test_dp_mst_calc_pbn_mode ==============
[15:59:19] [PASSED] Clock 154000 BPP 30 DSC disabled
[15:59:19] [PASSED] Clock 234000 BPP 30 DSC disabled
[15:59:19] [PASSED] Clock 297000 BPP 24 DSC disabled
[15:59:19] [PASSED] Clock 332880 BPP 24 DSC enabled
[15:59:19] [PASSED] Clock 324540 BPP 24 DSC enabled
[15:59:19] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[15:59:19] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[15:59:19] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[15:59:19] [PASSED] DP_POWER_UP_PHY with port number
[15:59:19] [PASSED] DP_POWER_DOWN_PHY with port number
[15:59:19] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[15:59:19] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[15:59:19] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[15:59:19] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[15:59:19] [PASSED] DP_QUERY_PAYLOAD with port number
[15:59:19] [PASSED] DP_QUERY_PAYLOAD with VCPI
[15:59:19] [PASSED] DP_REMOTE_DPCD_READ with port number
[15:59:19] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[15:59:19] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[15:59:19] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[15:59:19] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[15:59:19] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[15:59:19] [PASSED] DP_REMOTE_I2C_READ with port number
[15:59:19] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[15:59:19] [PASSED] DP_REMOTE_I2C_READ with transactions array
[15:59:19] [PASSED] DP_REMOTE_I2C_WRITE with port number
[15:59:19] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[15:59:19] [PASSED] DP_REMOTE_I2C_WRITE with data array
[15:59:19] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[15:59:19] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[15:59:19] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[15:59:19] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[15:59:19] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[15:59:19] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[15:59:19] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[15:59:19] ================ [PASSED] drm_dp_mst_helper ================
[15:59:19] =========== drm_format_helper_test (11 subtests) ===========
[15:59:19] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[15:59:19] [PASSED] single_pixel_source_buffer
[15:59:19] [PASSED] single_pixel_clip_rectangle
[15:59:19] [PASSED] well_known_colors
[15:59:19] [PASSED] destination_pitch
[15:59:19] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[15:59:19] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[15:59:19] [PASSED] single_pixel_source_buffer
[15:59:19] [PASSED] single_pixel_clip_rectangle
[15:59:19] [PASSED] well_known_colors
[15:59:19] [PASSED] destination_pitch
[15:59:19] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[15:59:19] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[15:59:19] [PASSED] single_pixel_source_buffer
[15:59:19] [PASSED] single_pixel_clip_rectangle
[15:59:19] [PASSED] well_known_colors
[15:59:19] [PASSED] destination_pitch
[15:59:19] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[15:59:19] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[15:59:19] [PASSED] single_pixel_source_buffer
[15:59:19] [PASSED] single_pixel_clip_rectangle
[15:59:19] [PASSED] well_known_colors
[15:59:19] [PASSED] destination_pitch
[15:59:19] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[15:59:19] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[15:59:19] [PASSED] single_pixel_source_buffer
[15:59:19] [PASSED] single_pixel_clip_rectangle
[15:59:19] [PASSED] well_known_colors
[15:59:19] [PASSED] destination_pitch
[15:59:19] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[15:59:19] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[15:59:19] [PASSED] single_pixel_source_buffer
[15:59:19] [PASSED] single_pixel_clip_rectangle
[15:59:19] [PASSED] well_known_colors
[15:59:19] [PASSED] destination_pitch
[15:59:19] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[15:59:19] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[15:59:19] [PASSED] single_pixel_source_buffer
[15:59:19] [PASSED] single_pixel_clip_rectangle
[15:59:19] [PASSED] well_known_colors
[15:59:19] [PASSED] destination_pitch
[15:59:19] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[15:59:19] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[15:59:19] [PASSED] single_pixel_source_buffer
[15:59:19] [PASSED] single_pixel_clip_rectangle
[15:59:19] [PASSED] well_known_colors
[15:59:19] [PASSED] destination_pitch
[15:59:19] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[15:59:19] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[15:59:19] [PASSED] single_pixel_source_buffer
[15:59:19] [PASSED] single_pixel_clip_rectangle
[15:59:19] [PASSED] well_known_colors
[15:59:19] [PASSED] destination_pitch
[15:59:19] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[15:59:19] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[15:59:19] [PASSED] single_pixel_source_buffer
[15:59:19] [PASSED] single_pixel_clip_rectangle
[15:59:19] [PASSED] well_known_colors
[15:59:19] [PASSED] destination_pitch
[15:59:19] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[15:59:19] ============== drm_test_fb_xrgb8888_to_mono ===============
[15:59:19] [PASSED] single_pixel_source_buffer
[15:59:19] [PASSED] single_pixel_clip_rectangle
[15:59:19] [PASSED] well_known_colors
[15:59:19] [PASSED] destination_pitch
[15:59:19] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[15:59:19] ============= [PASSED] drm_format_helper_test ==============
[15:59:19] ================= drm_format (18 subtests) =================
[15:59:19] [PASSED] drm_test_format_block_width_invalid
[15:59:19] [PASSED] drm_test_format_block_width_one_plane
[15:59:19] [PASSED] drm_test_format_block_width_two_plane
[15:59:19] [PASSED] drm_test_format_block_width_three_plane
[15:59:19] [PASSED] drm_test_format_block_width_tiled
[15:59:19] [PASSED] drm_test_format_block_height_invalid
[15:59:19] [PASSED] drm_test_format_block_height_one_plane
[15:59:19] [PASSED] drm_test_format_block_height_two_plane
[15:59:19] [PASSED] drm_test_format_block_height_three_plane
[15:59:19] [PASSED] drm_test_format_block_height_tiled
[15:59:19] [PASSED] drm_test_format_min_pitch_invalid
[15:59:19] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[15:59:19] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[15:59:19] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[15:59:19] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[15:59:19] [PASSED] drm_test_format_min_pitch_two_plane
[15:59:19] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[15:59:19] [PASSED] drm_test_format_min_pitch_tiled
[15:59:19] =================== [PASSED] drm_format ====================
[15:59:19] =============== drm_framebuffer (1 subtest) ================
[15:59:19] =============== drm_test_framebuffer_create ===============
[15:59:19] [PASSED] ABGR8888 normal sizes
[15:59:19] [PASSED] ABGR8888 max sizes
[15:59:19] [PASSED] ABGR8888 pitch greater than min required
[15:59:19] [PASSED] ABGR8888 pitch less than min required
[15:59:19] [PASSED] ABGR8888 Invalid width
[15:59:19] [PASSED] ABGR8888 Invalid buffer handle
[15:59:19] [PASSED] No pixel format
[15:59:19] [PASSED] ABGR8888 Width 0
[15:59:19] [PASSED] ABGR8888 Height 0
[15:59:19] [PASSED] ABGR8888 Out of bound height * pitch combination
[15:59:19] [PASSED] ABGR8888 Large buffer offset
[15:59:19] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[15:59:19] [PASSED] ABGR8888 Valid buffer modifier
[15:59:19] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[15:59:19] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[15:59:19] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[15:59:19] [PASSED] NV12 Normal sizes
[15:59:19] [PASSED] NV12 Max sizes
[15:59:19] [PASSED] NV12 Invalid pitch
[15:59:19] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[15:59:19] [PASSED] NV12 different modifier per-plane
[15:59:19] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[15:59:19] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[15:59:19] [PASSED] NV12 Modifier for inexistent plane
[15:59:19] [PASSED] NV12 Handle for inexistent plane
[15:59:19] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[15:59:19] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[15:59:19] [PASSED] YVU420 Normal sizes
[15:59:19] [PASSED] YVU420 Max sizes
[15:59:19] [PASSED] YVU420 Invalid pitch
[15:59:19] [PASSED] YVU420 Different pitches
[15:59:19] [PASSED] YVU420 Different buffer offsets/pitches
[15:59:19] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[15:59:19] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[15:59:19] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[15:59:19] [PASSED] YVU420 Valid modifier
[15:59:19] [PASSED] YVU420 Different modifiers per plane
[15:59:19] [PASSED] YVU420 Modifier for inexistent plane
[15:59:19] [PASSED] X0L2 Normal sizes
[15:59:19] [PASSED] X0L2 Max sizes
[15:59:19] [PASSED] X0L2 Invalid pitch
[15:59:19] [PASSED] X0L2 Pitch greater than minimum required
stty: 'standard input': Inappropriate ioctl for device
[15:59:19] [PASSED] X0L2 Handle for inexistent plane
[15:59:19] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[15:59:19] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[15:59:19] [PASSED] X0L2 Valid modifier
[15:59:19] [PASSED] X0L2 Modifier for inexistent plane
[15:59:19] =========== [PASSED] drm_test_framebuffer_create ===========
[15:59:19] ================= [PASSED] drm_framebuffer =================
[15:59:19] =============== drm-test-managed (1 subtest) ===============
[15:59:19] [PASSED] drm_test_managed_run_action
[15:59:19] ================ [PASSED] drm-test-managed =================
[15:59:19] =================== drm_mm (19 subtests) ===================
[15:59:19] [PASSED] drm_test_mm_init
[15:59:19] [PASSED] drm_test_mm_debug
[15:59:29] [PASSED] drm_test_mm_reserve
[15:59:39] [PASSED] drm_test_mm_insert
[15:59:39] [PASSED] drm_test_mm_replace
[15:59:39] [PASSED] drm_test_mm_insert_range
[15:59:39] [PASSED] drm_test_mm_frag
[15:59:39] [PASSED] drm_test_mm_align
[15:59:39] [PASSED] drm_test_mm_align32
[15:59:40] [PASSED] drm_test_mm_align64
[15:59:40] [PASSED] drm_test_mm_evict
[15:59:40] [PASSED] drm_test_mm_evict_range
[15:59:40] [PASSED] drm_test_mm_topdown
[15:59:40] [PASSED] drm_test_mm_bottomup
[15:59:40] [PASSED] drm_test_mm_lowest
[15:59:40] [PASSED] drm_test_mm_highest
[15:59:41] [PASSED] drm_test_mm_color
[15:59:41] [PASSED] drm_test_mm_color_evict
[15:59:41] [PASSED] drm_test_mm_color_evict_range
[15:59:41] ===================== [PASSED] drm_mm ======================
[15:59:41] ============= drm_modes_analog_tv (4 subtests) =============
[15:59:41] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[15:59:41] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[15:59:41] [PASSED] drm_test_modes_analog_tv_pal_576i
[15:59:41] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[15:59:41] =============== [PASSED] drm_modes_analog_tv ===============
[15:59:41] ============== drm_plane_helper (2 subtests) ===============
[15:59:41] =============== drm_test_check_plane_state ================
[15:59:41] [PASSED] clipping_simple
[15:59:41] [PASSED] clipping_rotate_reflect
[15:59:41] [PASSED] positioning_simple
[15:59:41] [PASSED] upscaling
[15:59:41] [PASSED] downscaling
[15:59:41] [PASSED] rounding1
[15:59:41] [PASSED] rounding2
[15:59:41] [PASSED] rounding3
[15:59:41] [PASSED] rounding4
[15:59:41] =========== [PASSED] drm_test_check_plane_state ============
[15:59:41] =========== drm_test_check_invalid_plane_state ============
[15:59:41] [PASSED] positioning_invalid
[15:59:41] [PASSED] upscaling_invalid
[15:59:41] [PASSED] downscaling_invalid
[15:59:41] ======= [PASSED] drm_test_check_invalid_plane_state ========
[15:59:41] ================ [PASSED] drm_plane_helper =================
[15:59:41] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[15:59:41] ====== drm_test_connector_helper_tv_get_modes_check =======
[15:59:41] [PASSED] None
[15:59:41] [PASSED] PAL
[15:59:41] [PASSED] NTSC
[15:59:41] [PASSED] Both, NTSC Default
[15:59:41] [PASSED] Both, PAL Default
[15:59:41] [PASSED] Both, NTSC Default, with PAL on command-line
[15:59:41] [PASSED] Both, PAL Default, with NTSC on command-line
[15:59:41] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[15:59:41] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[15:59:41] ================== drm_rect (9 subtests) ===================
[15:59:41] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[15:59:41] [PASSED] drm_test_rect_clip_scaled_not_clipped
[15:59:41] [PASSED] drm_test_rect_clip_scaled_clipped
[15:59:41] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[15:59:41] ================= drm_test_rect_intersect =================
[15:59:41] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[15:59:41] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[15:59:41] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[15:59:41] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[15:59:41] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[15:59:41] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[15:59:41] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[15:59:41] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[15:59:41] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[15:59:41] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[15:59:41] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[15:59:41] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[15:59:41] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[15:59:41] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[15:59:41] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[15:59:41] ============= [PASSED] drm_test_rect_intersect =============
[15:59:41] ================ drm_test_rect_calc_hscale ================
[15:59:41] [PASSED] normal use
[15:59:41] [PASSED] out of max range
[15:59:41] [PASSED] out of min range
[15:59:41] [PASSED] zero dst
[15:59:41] [PASSED] negative src
[15:59:41] [PASSED] negative dst
[15:59:41] ============ [PASSED] drm_test_rect_calc_hscale ============
[15:59:41] ================ drm_test_rect_calc_vscale ================
[15:59:41] [PASSED] normal use
[15:59:41] [PASSED] out of max range
[15:59:41] [PASSED] out of min range
[15:59:41] [PASSED] zero dst
[15:59:41] [PASSED] negative src
[15:59:41] [PASSED] negative dst
[15:59:41] ============ [PASSED] drm_test_rect_calc_vscale ============
[15:59:41] ================== drm_test_rect_rotate ===================
[15:59:41] [PASSED] reflect-x
[15:59:41] [PASSED] reflect-y
[15:59:41] [PASSED] rotate-0
[15:59:41] [PASSED] rotate-90
[15:59:41] [PASSED] rotate-180
[15:59:41] [PASSED] rotate-270
[15:59:41] ============== [PASSED] drm_test_rect_rotate ===============
[15:59:41] ================ drm_test_rect_rotate_inv =================
[15:59:41] [PASSED] reflect-x
[15:59:41] [PASSED] reflect-y
[15:59:41] [PASSED] rotate-0
[15:59:41] [PASSED] rotate-90
[15:59:41] [PASSED] rotate-180
[15:59:41] [PASSED] rotate-270
[15:59:41] ============ [PASSED] drm_test_rect_rotate_inv =============
[15:59:41] ==================== [PASSED] drm_rect =====================
[15:59:41] ================== drm_exec (7 subtests) ===================
[15:59:41] [PASSED] sanitycheck
[15:59:41] [PASSED] test_lock
[15:59:41] [PASSED] test_lock_unlock
[15:59:41] [PASSED] test_duplicates
[15:59:41] [PASSED] test_prepare
[15:59:41] [PASSED] test_prepare_array
[15:59:41] [PASSED] test_multiple_loops
[15:59:41] ==================== [PASSED] drm_exec =====================
[15:59:41] ============================================================
[15:59:41] Testing complete. Ran 340 tests: passed: 340
[15:59:42] Elapsed time: 43.550s total, 1.659s configuring, 19.157s building, 22.689s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [Intel-xe] [PATCH v5 0/2] fbc on any planes
2023-09-22 13:30 [Intel-xe] [PATCH v5 0/2] fbc on any planes Vinod Govindapillai
` (4 preceding siblings ...)
2023-09-22 15:59 ` [Intel-xe] ✓ CI.KUnit: success " Patchwork
@ 2023-09-25 12:16 ` Jani Nikula
2023-09-25 13:01 ` Govindapillai, Vinod
2023-10-03 12:58 ` Ville Syrjälä
6 siblings, 1 reply; 9+ messages in thread
From: Jani Nikula @ 2023-09-25 12:16 UTC (permalink / raw)
To: Vinod Govindapillai, intel-xe; +Cc: ville.syrjala, intel-gfx, matthew.d.roper
On Fri, 22 Sep 2023, Vinod Govindapillai <vinod.govindapillai@intel.com> wrote:
> FBC can be supported in first three planes in lnl
When you're cross-posting to intel-xe and intel-gfx lists, you need to
actually say what you want done with these patches. Otherwise we won't
know.
Before xe is upstream, the order of business for i915 changes should be:
1) Get them merged to upstream i915 (send to intel-gfx)
2) Get the merged commits backported to xe (send to intel-xe)
BR,
Jani.
>
> Vinod Govindapillai (2):
> drm/i915/lnl: possibility to enable FBC on first three planes
> drm/i915/lnl: update the supported plane formats with FBC
>
> drivers/gpu/drm/i915/display/intel_fbc.c | 11 ++++++++++-
> drivers/gpu/drm/i915/display/skl_universal_plane.c | 9 ++++++---
> drivers/gpu/drm/i915/i915_reg.h | 2 ++
> 3 files changed, 18 insertions(+), 4 deletions(-)
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [Intel-xe] [PATCH v5 0/2] fbc on any planes
2023-09-25 12:16 ` [Intel-xe] [PATCH v5 0/2] " Jani Nikula
@ 2023-09-25 13:01 ` Govindapillai, Vinod
0 siblings, 0 replies; 9+ messages in thread
From: Govindapillai, Vinod @ 2023-09-25 13:01 UTC (permalink / raw)
To: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com,
De Marchi, Lucas
Cc: Syrjala, Ville, intel-gfx@lists.freedesktop.org, Roper, Matthew D
On Mon, 2023-09-25 at 15:16 +0300, Jani Nikula wrote:
> On Fri, 22 Sep 2023, Vinod Govindapillai <vinod.govindapillai@intel.com> wrote:
> > FBC can be supported in first three planes in lnl
>
> When you're cross-posting to intel-xe and intel-gfx lists, you need to
> actually say what you want done with these patches. Otherwise we won't
> know.
>
> Before xe is upstream, the order of business for i915 changes should be:
>
> 1) Get them merged to upstream i915 (send to intel-gfx)
>
> 2) Get the merged commits backported to xe (send to intel-xe)
>
>
> BR,
> Jani.
Okay. I was following the [https://gfx-linux.intel.com/xe.html]
Here I assumed the flow as you have mentioned.
Lucas has asked to hold off merging until the initial display support is merged.
So wonder if I should take first internal and then upstream route for this.
BR
Vinod
>
> >
> > Vinod Govindapillai (2):
> > drm/i915/lnl: possibility to enable FBC on first three planes
> > drm/i915/lnl: update the supported plane formats with FBC
> >
> > drivers/gpu/drm/i915/display/intel_fbc.c | 11 ++++++++++-
> > drivers/gpu/drm/i915/display/skl_universal_plane.c | 9 ++++++---
> > drivers/gpu/drm/i915/i915_reg.h | 2 ++
> > 3 files changed, 18 insertions(+), 4 deletions(-)
>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-xe] [PATCH v5 0/2] fbc on any planes
2023-09-22 13:30 [Intel-xe] [PATCH v5 0/2] fbc on any planes Vinod Govindapillai
` (5 preceding siblings ...)
2023-09-25 12:16 ` [Intel-xe] [PATCH v5 0/2] " Jani Nikula
@ 2023-10-03 12:58 ` Ville Syrjälä
6 siblings, 0 replies; 9+ messages in thread
From: Ville Syrjälä @ 2023-10-03 12:58 UTC (permalink / raw)
To: Vinod Govindapillai; +Cc: ville.syrjala, intel-gfx, matthew.d.roper, intel-xe
On Fri, Sep 22, 2023 at 04:30:01PM +0300, Vinod Govindapillai wrote:
> FBC can be supported in first three planes in lnl
>
> Vinod Govindapillai (2):
> drm/i915/lnl: possibility to enable FBC on first three planes
> drm/i915/lnl: update the supported plane formats with FBC
Pushed to drm-intel-next. Thanks.
>
> drivers/gpu/drm/i915/display/intel_fbc.c | 11 ++++++++++-
> drivers/gpu/drm/i915/display/skl_universal_plane.c | 9 ++++++---
> drivers/gpu/drm/i915/i915_reg.h | 2 ++
> 3 files changed, 18 insertions(+), 4 deletions(-)
>
> --
> 2.34.1
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 9+ messages in thread